blob: 4c1a35f1583872d2ce39db5c1cacce28be48ccb1 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001config ARM
2 bool
3 default y
Scott Wood1d8f51d2016-09-22 03:35:18 -05004 select ARCH_CLOCKSOURCE_DATA
Florian Fainellie377cd82017-01-15 03:59:00 +01005 select ARCH_HAS_DEBUG_VIRTUAL
Dan Williams21266be2015-11-19 18:19:29 -08006 select ARCH_HAS_DEVMEM_IS_ALLOWED
Kees Cook2b68f6c2015-04-14 15:48:00 -07007 select ARCH_HAS_ELF_RANDOMIZE
Daniel Borkmannd2852a22017-02-21 16:09:33 +01008 select ARCH_HAS_SET_MEMORY
Laura Abbottad21fc42017-02-06 16:31:57 -08009 select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
10 select ARCH_HAS_STRICT_MODULE_RWX if MMU
Mark Rutland3d067702012-10-30 12:13:42 +000011 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Russell King171b3f02013-09-12 21:24:42 +010012 select ARCH_HAVE_CUSTOM_GPIO_H
Riku Voipio957e3fa2014-12-12 16:57:44 -080013 select ARCH_HAS_GCOV_PROFILE_ALL
Mark Salterd7018842013-10-07 22:07:58 -040014 select ARCH_MIGHT_HAVE_PC_PARPORT
Laura Abbottad21fc42017-02-06 16:31:57 -080015 select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
16 select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
Peter Zijlstra4badad32014-06-06 19:53:16 +020017 select ARCH_SUPPORTS_ATOMIC_RMW
Kim Phillips017f1612013-11-06 05:15:24 +010018 select ARCH_USE_BUILTIN_BSWAP
Will Deacon0cbad9c2013-10-09 17:19:22 +010019 select ARCH_USE_CMPXCHG_LOCKREF
Russell Kingb1b3f492012-10-06 17:12:25 +010020 select ARCH_WANT_IPC_PARSE_VERSION
Stephen Boydee951c62012-10-29 19:19:34 +010021 select BUILDTIME_EXTABLE_SORT if MMU
Russell King171b3f02013-09-12 21:24:42 +010022 select CLONE_BACKWARDS
Russell Kingb1b3f492012-10-06 17:12:25 +010023 select CPU_PM if (SUSPEND || CPU_IDLE)
Will Deacondce5c9e2013-12-17 19:50:16 +010024 select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
Borislav Petkovb01aec92015-05-21 19:59:31 +020025 select EDAC_SUPPORT
26 select EDAC_ATOMIC_SCRUB
Laura Abbott36d0fd22014-10-09 15:26:42 -070027 select GENERIC_ALLOCATOR
Uwe Kleine-König4477ca42013-03-21 21:02:37 +010028 select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
Russell Kingb1b3f492012-10-06 17:12:25 +010029 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
Ard Biesheuvelea2d9a92017-03-19 17:23:31 +010030 select GENERIC_CPU_AUTOPROBE
Ard Biesheuvel29373672015-09-01 08:59:28 +020031 select GENERIC_EARLY_IOREMAP
Russell King171b3f02013-09-12 21:24:42 +010032 select GENERIC_IDLE_POLL_SETUP
Russell Kingb1b3f492012-10-06 17:12:25 +010033 select GENERIC_IRQ_PROBE
34 select GENERIC_IRQ_SHOW
Geert Uytterhoeven7c070052015-04-01 13:37:11 +010035 select GENERIC_IRQ_SHOW_LEVEL
Russell Kingb1b3f492012-10-06 17:12:25 +010036 select GENERIC_PCI_IOMAP
Stephen Boyd38ff87f2013-06-01 23:39:40 -070037 select GENERIC_SCHED_CLOCK
Russell Kingb1b3f492012-10-06 17:12:25 +010038 select GENERIC_SMP_IDLE_THREAD
39 select GENERIC_STRNCPY_FROM_USER
40 select GENERIC_STRNLEN_USER
Marc Zyngiera71b0922014-08-26 11:03:18 +010041 select HANDLE_DOMAIN_IRQ
Russell Kingb1b3f492012-10-06 17:12:25 +010042 select HARDIRQS_SW_RESEND
AKASHI Takahiro7a017722014-02-25 18:16:24 +090043 select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
Yalin Wang0b7857d2015-01-16 02:45:55 +010044 select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6
Arnd Bergmann437682ee2015-11-19 13:30:42 +010045 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
46 select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU
Daniel Cashmane0c25d92016-01-14 15:19:57 -080047 select HAVE_ARCH_MMAP_RND_BITS if MMU
Kees Cook91702172013-11-09 00:51:56 +010048 select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
Wade Farnsworth0693bf62012-04-04 16:19:47 +010049 select HAVE_ARCH_TRACEHOOK
Jens Wiklanderb329f952016-01-04 15:42:55 +010050 select HAVE_ARM_SMCCC if CPU_V7
Daniel Borkmann60777762016-05-13 19:08:28 +020051 select HAVE_CBPF_JIT
Russell King51aaf812014-04-22 22:26:27 +010052 select HAVE_CC_STACKPROTECTOR
Russell King171b3f02013-09-12 21:24:42 +010053 select HAVE_CONTEXT_TRACKING
Russell Kingb1b3f492012-10-06 17:12:25 +010054 select HAVE_C_RECORDMCOUNT
55 select HAVE_DEBUG_KMEMLEAK
56 select HAVE_DMA_API_DEBUG
Russell Kingb1b3f492012-10-06 17:12:25 +010057 select HAVE_DMA_CONTIGUOUS if MMU
Arnd Bergmann437682ee2015-11-19 13:30:42 +010058 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) && !CPU_ENDIAN_BE32 && MMU
Will Deacondce5c9e2013-12-17 19:50:16 +010059 select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
Jiri Slaby5f56a5d2016-05-20 17:00:16 -070060 select HAVE_EXIT_THREAD
Russell Kingb1b3f492012-10-06 17:12:25 +010061 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
62 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
63 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
Emese Revfy6b90bd42016-05-24 00:09:38 +020064 select HAVE_GCC_PLUGINS
Russell Kingb1b3f492012-10-06 17:12:25 +010065 select HAVE_GENERIC_DMA_COHERENT
Russell Kingb1b3f492012-10-06 17:12:25 +010066 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
67 select HAVE_IDE if PCI || ISA || PCMCIA
Russell King87c46b62013-05-04 14:38:59 +010068 select HAVE_IRQ_TIME_ACCOUNTING
Russell Kingb1b3f492012-10-06 17:12:25 +010069 select HAVE_KERNEL_GZIP
Kyungsik Leef9b493a2013-07-08 16:01:48 -070070 select HAVE_KERNEL_LZ4
Russell Kingb1b3f492012-10-06 17:12:25 +010071 select HAVE_KERNEL_LZMA
72 select HAVE_KERNEL_LZO
73 select HAVE_KERNEL_XZ
Arnd Bergmanncb1293e2015-05-26 15:40:44 +010074 select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
Ananth N Mavinakayanahalli9edddaa2008-03-04 14:28:37 -080075 select HAVE_KRETPROBES if (HAVE_KPROBES)
Russell Kingb1b3f492012-10-06 17:12:25 +010076 select HAVE_MEMBLOCK
Ard Biesheuvel7d485f62014-11-24 16:54:35 +010077 select HAVE_MOD_ARCH_SPECIFIC
Petr Mladek42a0bb32016-05-20 17:00:33 -070078 select HAVE_NMI
Russell Kingb1b3f492012-10-06 17:12:25 +010079 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
Wang Nan0dc016d2015-01-09 14:37:36 +080080 select HAVE_OPTPROBES if !THUMB2_KERNEL
Jamie Iles7ada1892010-02-02 20:24:58 +010081 select HAVE_PERF_EVENTS
Will Deacon49863892013-09-26 12:36:35 +010082 select HAVE_PERF_REGS
83 select HAVE_PERF_USER_STACK_DUMP
Steve Cappera0ad5492014-10-09 15:29:18 -070084 select HAVE_RCU_TABLE_FREE if (SMP && ARM_LPAE)
Will Deacone513f8b2010-06-25 12:24:53 +010085 select HAVE_REGS_AND_STACK_ACCESS_API
Russell Kingb1b3f492012-10-06 17:12:25 +010086 select HAVE_SYSCALL_TRACEPOINTS
Catalin Marinasaf1839e2012-10-08 16:28:08 -070087 select HAVE_UID16
Kevin Hilman31c1fc82013-09-16 15:28:22 -070088 select HAVE_VIRT_CPU_ACCOUNTING_GEN
Thomas Gleixnerda0ec6f2013-08-14 20:43:17 +010089 select IRQ_FORCED_THREADING
Russell King171b3f02013-09-12 21:24:42 +010090 select MODULES_USE_ELF_REL
Santosh Shilimkar84f452b2013-06-30 00:28:46 -040091 select NO_BOOTMEM
Arnd Bergmannaa7d5f12015-11-19 13:20:54 +010092 select OF_EARLY_FLATTREE if OF
93 select OF_RESERVED_MEM if OF
Russell King171b3f02013-09-12 21:24:42 +010094 select OLD_SIGACTION
95 select OLD_SIGSUSPEND3
Russell Kingb1b3f492012-10-06 17:12:25 +010096 select PERF_USE_VMALLOC
97 select RTC_LIB
98 select SYS_SUPPORTS_APM_EMULATION
Russell King171b3f02013-09-12 21:24:42 +010099 # Above selects are sorted alphabetically; please add new ones
100 # according to that. Thanks.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 help
102 The ARM series is a line of low-power-consumption RISC chip designs
Martin Michlmayrf6c89652006-02-08 21:09:07 +0000103 licensed by ARM Ltd and targeted at embedded applications and
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
Martin Michlmayrf6c89652006-02-08 21:09:07 +0000105 manufactured, but legacy ARM-based PC hardware remains popular in
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106 Europe. There is an ARM Linux project with a web page at
107 <http://www.arm.linux.org.uk/>.
108
Russell King74facff2011-06-02 11:16:22 +0100109config ARM_HAS_SG_CHAIN
Laura Abbott308c09f2014-08-08 14:23:25 -0700110 select ARCH_HAS_SG_CHAIN
Russell King74facff2011-06-02 11:16:22 +0100111 bool
112
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200113config NEED_SG_DMA_LENGTH
114 bool
115
116config ARM_DMA_USE_IOMMU
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200117 bool
Russell Kingb1b3f492012-10-06 17:12:25 +0100118 select ARM_HAS_SG_CHAIN
119 select NEED_SG_DMA_LENGTH
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200120
Seung-Woo Kim60460ab2013-02-06 13:21:14 +0900121if ARM_DMA_USE_IOMMU
122
123config ARM_DMA_IOMMU_ALIGNMENT
124 int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
125 range 4 9
126 default 8
127 help
128 DMA mapping framework by default aligns all buffers to the smallest
129 PAGE_SIZE order which is greater than or equal to the requested buffer
130 size. This works well for buffers up to a few hundreds kilobytes, but
131 for larger buffers it just a waste of address space. Drivers which has
132 relatively small addressing window (like 64Mib) might run out of
133 virtual space with just a few allocations.
134
135 With this parameter you can specify the maximum PAGE_SIZE order for
136 DMA IOMMU buffers. Larger buffers will be aligned only to this
137 specified order. The order is expressed as a power of two multiplied
138 by the PAGE_SIZE.
139
140endif
141
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +0100142config MIGHT_HAVE_PCI
143 bool
144
Ralf Baechle75e71532007-02-09 17:08:58 +0000145config SYS_SUPPORTS_APM_EMULATION
146 bool
147
Linus Walleijbc581772009-09-15 17:30:37 +0100148config HAVE_TCM
149 bool
150 select GENERIC_ALLOCATOR
151
Russell Kinge119bff2010-01-10 17:23:29 +0000152config HAVE_PROC_CPU
153 bool
154
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700155config NO_IOPORT_MAP
Al Viro5ea81762007-02-11 15:41:31 +0000156 bool
Al Viro5ea81762007-02-11 15:41:31 +0000157
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158config EISA
159 bool
160 ---help---
161 The Extended Industry Standard Architecture (EISA) bus was
162 developed as an open alternative to the IBM MicroChannel bus.
163
164 The EISA bus provided some of the features of the IBM MicroChannel
165 bus while maintaining backward compatibility with cards made for
166 the older ISA bus. The EISA bus saw limited use between 1988 and
167 1995 when it was made obsolete by the PCI bus.
168
169 Say Y here if you are building a kernel for an EISA-based machine.
170
171 Otherwise, say N.
172
173config SBUS
174 bool
175
Russell Kingf16fb1e2007-04-28 09:59:37 +0100176config STACKTRACE_SUPPORT
177 bool
178 default y
179
180config LOCKDEP_SUPPORT
181 bool
182 default y
183
Russell King7ad1bcb2006-08-27 12:07:02 +0100184config TRACE_IRQFLAGS_SUPPORT
185 bool
Arnd Bergmanncb1293e2015-05-26 15:40:44 +0100186 default !CPU_V7M
Russell King7ad1bcb2006-08-27 12:07:02 +0100187
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188config RWSEM_XCHGADD_ALGORITHM
189 bool
Will Deacon8a874112014-05-02 17:06:19 +0100190 default y
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191
David Howellsf0d1b0b2006-12-08 02:37:49 -0800192config ARCH_HAS_ILOG2_U32
193 bool
David Howellsf0d1b0b2006-12-08 02:37:49 -0800194
195config ARCH_HAS_ILOG2_U64
196 bool
David Howellsf0d1b0b2006-12-08 02:37:49 -0800197
Eduardo Valentin4a1b5732013-06-13 22:58:52 +0100198config ARCH_HAS_BANDGAP
199 bool
200
Stefan Agnera5f4c562015-08-13 00:01:52 +0100201config FIX_EARLYCON_MEM
202 def_bool y if MMU
203
Akinobu Mitab89c3b12006-03-26 01:39:19 -0800204config GENERIC_HWEIGHT
205 bool
206 default y
207
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208config GENERIC_CALIBRATE_DELAY
209 bool
210 default y
211
viro@ZenIV.linux.org.uka08b6b72005-09-06 01:48:42 +0100212config ARCH_MAY_HAVE_PC_FDC
213 bool
214
Christoph Lameter5ac6da62007-02-10 01:43:14 -0800215config ZONE_DMA
216 bool
Christoph Lameter5ac6da62007-02-10 01:43:14 -0800217
FUJITA Tomonoriccd7ab72010-03-10 15:23:23 -0800218config NEED_DMA_MAP_STATE
219 def_bool y
220
David A. Longc7edc9e2014-03-07 11:23:04 -0500221config ARCH_SUPPORTS_UPROBES
222 def_bool y
223
Rob Herring58af4a22012-03-20 14:33:01 -0500224config ARCH_HAS_DMA_SET_COHERENT_MASK
225 bool
226
Linus Torvalds1da177e2005-04-16 15:20:36 -0700227config GENERIC_ISA_DMA
228 bool
229
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230config FIQ
231 bool
232
Rob Herring13a50452012-02-07 09:28:22 -0600233config NEED_RET_TO_USER
234 bool
235
Al Viro034d2f52005-12-19 16:27:59 -0500236config ARCH_MTD_XIP
237 bool
238
Hyok S. Choic760fc12006-03-27 15:18:50 +0100239config VECTORS_BASE
240 hex
Hyok S. Choi6afd6fa2006-09-28 21:46:34 +0900241 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
Hyok S. Choic760fc12006-03-27 15:18:50 +0100242 default DRAM_BASE if REMAP_VECTORS_TO_RAM
243 default 0x00000000
244 help
Russell King19accfd2013-07-04 11:40:32 +0100245 The base address of exception vectors. This must be two pages
246 in size.
Hyok S. Choic760fc12006-03-27 15:18:50 +0100247
Russell Kingdc21af92011-01-04 19:09:43 +0000248config ARM_PATCH_PHYS_VIRT
Russell Kingc1beced2011-08-10 10:23:45 +0100249 bool "Patch physical to virtual translations at runtime" if EMBEDDED
250 default y
Nicolas Pitreb511d752011-02-21 06:53:35 +0100251 depends on !XIP_KERNEL && MMU
Russell Kingdc21af92011-01-04 19:09:43 +0000252 help
Russell King111e9a52011-05-12 10:02:42 +0100253 Patch phys-to-virt and virt-to-phys translation functions at
254 boot and module load time according to the position of the
255 kernel in system memory.
Russell Kingdc21af92011-01-04 19:09:43 +0000256
Russell King111e9a52011-05-12 10:02:42 +0100257 This can only be used with non-XIP MMU kernels where the base
Nicolas Pitredaece592011-08-12 00:14:29 +0100258 of physical memory is at a 16MB boundary.
Russell Kingdc21af92011-01-04 19:09:43 +0000259
Russell Kingc1beced2011-08-10 10:23:45 +0100260 Only disable this option if you know that you do not require
261 this feature (eg, building a kernel for a single machine) and
262 you need to shrink the kernel to the minimal size.
263
Rob Herringc334bc12012-03-04 22:03:33 -0600264config NEED_MACH_IO_H
265 bool
266 help
267 Select this when mach/io.h is required to provide special
268 definitions for this platform. The need for mach/io.h should
269 be avoided when possible.
270
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400271config NEED_MACH_MEMORY_H
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400272 bool
Russell King111e9a52011-05-12 10:02:42 +0100273 help
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400274 Select this when mach/memory.h is required to provide special
275 definitions for this platform. The need for mach/memory.h should
276 be avoided when possible.
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400277
278config PHYS_OFFSET
Nicolas Pitre974c0722011-12-02 23:09:42 +0100279 hex "Physical address of main memory" if MMU
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100280 depends on !ARM_PATCH_PHYS_VIRT
Nicolas Pitre974c0722011-12-02 23:09:42 +0100281 default DRAM_BASE if !MMU
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100282 default 0x00000000 if ARCH_EBSA110 || \
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100283 ARCH_FOOTBRIDGE || \
284 ARCH_INTEGRATOR || \
285 ARCH_IOP13XX || \
286 ARCH_KS8695 || \
Linus Walleij8f2c0062016-08-10 14:30:35 +0200287 ARCH_REALVIEW
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100288 default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
289 default 0x20000000 if ARCH_S5PV210
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700290 default 0xc0000000 if ARCH_SA1100
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400291 help
292 Please provide the physical address corresponding to the
293 location of main memory in your system.
Russell Kingcada3c02011-01-04 19:39:29 +0000294
Simon Glass87e040b2011-08-16 23:44:26 +0100295config GENERIC_BUG
296 def_bool y
297 depends on BUG
298
Kirill A. Shutemov1bcad262015-04-14 15:45:42 -0700299config PGTABLE_LEVELS
300 int
301 default 3 if ARM_LPAE
302 default 2
303
Linus Torvalds1da177e2005-04-16 15:20:36 -0700304source "init/Kconfig"
305
Matt Helsleydc52ddc2008-10-18 20:27:21 -0700306source "kernel/Kconfig.freezer"
307
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308menu "System Type"
309
Hyok S. Choi3c427972009-07-24 12:35:00 +0100310config MMU
311 bool "MMU-based Paged Memory Management Support"
312 default y
313 help
314 Select if you want MMU-based virtualised addressing space
315 support by paged memory management. If unsure, say 'Y'.
316
Daniel Cashmane0c25d92016-01-14 15:19:57 -0800317config ARCH_MMAP_RND_BITS_MIN
318 default 8
319
320config ARCH_MMAP_RND_BITS_MAX
321 default 14 if PAGE_OFFSET=0x40000000
322 default 15 if PAGE_OFFSET=0x80000000
323 default 16
324
Russell Kingccf50e22010-03-15 19:03:06 +0000325#
326# The "ARM system type" choice list is ordered alphabetically by option
327# text. Please add new entries in the option alphabetic order.
328#
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329choice
330 prompt "ARM system type"
Arnd Bergmann70722802015-12-17 17:45:47 +0100331 default ARM_SINGLE_ARMV7M if !MMU
Arnd Bergmann1420b222013-02-14 13:33:36 +0100332 default ARCH_MULTIPLATFORM if MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333
Rob Herring387798b2012-09-06 13:41:12 -0500334config ARCH_MULTIPLATFORM
335 bool "Allow multiple platforms to be selected"
Russell Kingb1b3f492012-10-06 17:12:25 +0100336 depends on MMU
Olof Johansson42dc8362014-03-09 12:46:59 -0700337 select ARM_HAS_SG_CHAIN
Rob Herring387798b2012-09-06 13:41:12 -0500338 select ARM_PATCH_PHYS_VIRT
339 select AUTO_ZRELADDR
Rob Herring6d0add42014-04-16 08:42:13 -0500340 select CLKSRC_OF
Dinh Nguyen66314222012-07-18 16:07:18 -0600341 select COMMON_CLK
Rob Herringddb902c2013-11-22 09:29:37 -0600342 select GENERIC_CLOCKEVENTS
Will Deacon08d38be2014-05-27 23:26:35 +0100343 select MIGHT_HAVE_PCI
Rob Herring387798b2012-09-06 13:41:12 -0500344 select MULTI_IRQ_HANDLER
Kishon Vijay Abraham Ie13688f2016-09-14 15:49:06 +0530345 select PCI_DOMAINS if PCI
Dinh Nguyen66314222012-07-18 16:07:18 -0600346 select SPARSE_IRQ
347 select USE_OF
Dinh Nguyen66314222012-07-18 16:07:18 -0600348
Stefan Agner9c77bc42015-05-20 00:03:51 +0200349config ARM_SINGLE_ARMV7M
350 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
351 depends on !MMU
Stefan Agner9c77bc42015-05-20 00:03:51 +0200352 select ARM_NVIC
Stefan Agner499f1642015-05-21 00:35:44 +0200353 select AUTO_ZRELADDR
Stefan Agner9c77bc42015-05-20 00:03:51 +0200354 select CLKSRC_OF
355 select COMMON_CLK
356 select CPU_V7M
357 select GENERIC_CLOCKEVENTS
358 select NO_IOPORT_MAP
359 select SPARSE_IRQ
360 select USE_OF
361
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362config ARCH_EBSA110
363 bool "EBSA-110"
Russell Kingb1b3f492012-10-06 17:12:25 +0100364 select ARCH_USES_GETTIMEOFFSET
Russell Kingc7508152008-10-26 10:55:14 +0000365 select CPU_SA110
Russell Kingf7e68bb2005-05-05 14:49:01 +0100366 select ISA
Rob Herringc334bc12012-03-04 22:03:33 -0600367 select NEED_MACH_IO_H
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400368 select NEED_MACH_MEMORY_H
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700369 select NO_IOPORT_MAP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370 help
371 This is an evaluation board for the StrongARM processor available
Martin Michlmayrf6c89652006-02-08 21:09:07 +0000372 from Digital. It has limited hardware on-board, including an
Linus Torvalds1da177e2005-04-16 15:20:36 -0700373 Ethernet interface, two PCMCIA sockets, two serial ports and a
374 parallel port.
375
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000376config ARCH_EP93XX
377 bool "EP93xx-based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100378 select ARCH_HAS_HOLES_MEMORYMODEL
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000379 select ARM_AMBA
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700380 select ARM_PATCH_PHYS_VIRT
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000381 select ARM_VIC
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700382 select AUTO_ZRELADDR
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100383 select CLKDEV_LOOKUP
Linus Walleij000bc172015-06-15 14:34:03 +0200384 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100385 select CPU_ARM920T
Linus Walleij000bc172015-06-15 14:34:03 +0200386 select GENERIC_CLOCKEVENTS
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200387 select GPIOLIB
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000388 help
389 This enables support for the Cirrus EP93xx series of CPUs.
390
Linus Torvalds1da177e2005-04-16 15:20:36 -0700391config ARCH_FOOTBRIDGE
392 bool "FootBridge"
Russell Kingc7508152008-10-26 10:55:14 +0000393 select CPU_SA110
Linus Torvalds1da177e2005-04-16 15:20:36 -0700394 select FOOTBRIDGE
Russell King4e8d7632011-01-28 21:00:39 +0000395 select GENERIC_CLOCKEVENTS
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200396 select HAVE_IDE
Rob Herring8ef6e622012-03-01 20:48:12 -0600397 select NEED_MACH_IO_H if !MMU
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400398 select NEED_MACH_MEMORY_H
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000399 help
400 Support for systems based on the DC21285 companion chip
401 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700402
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100403config ARCH_NETX
404 bool "Hilscher NetX based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100405 select ARM_VIC
Russell King234b6ced2011-05-08 14:09:47 +0100406 select CLKSRC_MMIO
Russell Kingc7508152008-10-26 10:55:14 +0000407 select CPU_ARM926T
Uwe Kleine-König2fcfe6b2008-12-09 21:57:24 +0100408 select GENERIC_CLOCKEVENTS
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000409 help
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100410 This enables support for systems based on the Hilscher NetX Soc
411
Russell King3b938be2007-05-12 11:25:44 +0100412config ARCH_IOP13XX
413 bool "IOP13xx-based"
414 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100415 select CPU_XSC3
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400416 select NEED_MACH_MEMORY_H
Rob Herring13a50452012-02-07 09:28:22 -0600417 select NEED_RET_TO_USER
Russell Kingb1b3f492012-10-06 17:12:25 +0100418 select PCI
419 select PLAT_IOP
420 select VMSPLIT_1G
Thomas Gleixner37ebbcf2014-05-07 15:44:04 +0000421 select SPARSE_IRQ
Russell King3b938be2007-05-12 11:25:44 +0100422 help
423 Support for Intel's IOP13XX (XScale) family of processors.
424
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100425config ARCH_IOP32X
426 bool "IOP32x-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100427 depends on MMU
Russell Kingc7508152008-10-26 10:55:14 +0000428 select CPU_XSCALE
Linus Walleije9004f52013-09-09 11:59:51 +0200429 select GPIO_IOP
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200430 select GPIOLIB
Rob Herring13a50452012-02-07 09:28:22 -0600431 select NEED_RET_TO_USER
Russell Kingf7e68bb2005-05-05 14:49:01 +0100432 select PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100433 select PLAT_IOP
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000434 help
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100435 Support for Intel's 80219 and IOP32X (XScale) family of
436 processors.
437
438config ARCH_IOP33X
439 bool "IOP33x-based"
440 depends on MMU
Russell Kingc7508152008-10-26 10:55:14 +0000441 select CPU_XSCALE
Linus Walleije9004f52013-09-09 11:59:51 +0200442 select GPIO_IOP
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200443 select GPIOLIB
Rob Herring13a50452012-02-07 09:28:22 -0600444 select NEED_RET_TO_USER
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100445 select PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100446 select PLAT_IOP
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100447 help
448 Support for Intel's IOP33X (XScale) family of processors.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449
Russell King3b938be2007-05-12 11:25:44 +0100450config ARCH_IXP4XX
451 bool "IXP4xx-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100452 depends on MMU
Rob Herring58af4a22012-03-20 14:33:01 -0500453 select ARCH_HAS_DMA_SET_COHERENT_MASK
Russell King51aaf812014-04-22 22:26:27 +0100454 select ARCH_SUPPORTS_BIG_ENDIAN
Russell King234b6ced2011-05-08 14:09:47 +0100455 select CLKSRC_MMIO
Russell Kingc7508152008-10-26 10:55:14 +0000456 select CPU_XSCALE
Russell Kingb1b3f492012-10-06 17:12:25 +0100457 select DMABOUNCE if PCI
Russell King3b938be2007-05-12 11:25:44 +0100458 select GENERIC_CLOCKEVENTS
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200459 select GPIOLIB
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +0100460 select MIGHT_HAVE_PCI
Rob Herringc334bc12012-03-04 22:03:33 -0600461 select NEED_MACH_IO_H
Florian Fainelli9296d942013-04-09 14:29:26 +0200462 select USB_EHCI_BIG_ENDIAN_DESC
Russell King171b3f02013-09-12 21:24:42 +0100463 select USB_EHCI_BIG_ENDIAN_MMIO
Lennert Buytenhekc4713072006-03-28 21:18:54 +0100464 help
Russell King3b938be2007-05-12 11:25:44 +0100465 Support for Intel's IXP4XX (XScale) family of processors.
Lennert Buytenhekc4713072006-03-28 21:18:54 +0100466
Saeed Bisharaedabd382009-08-06 15:12:43 +0300467config ARCH_DOVE
468 bool "Marvell Dove"
Sebastian Hesselbarth756b2532013-05-02 19:56:12 +0100469 select CPU_PJ4
Saeed Bisharaedabd382009-08-06 15:12:43 +0300470 select GENERIC_CLOCKEVENTS
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200471 select GPIOLIB
Russell King0f81bd42012-09-09 20:34:13 +0100472 select MIGHT_HAVE_PCI
Arnd Bergmannb8cd3372015-12-02 22:27:04 +0100473 select MULTI_IRQ_HANDLER
Russell King171b3f02013-09-12 21:24:42 +0100474 select MVEBU_MBUS
Sebastian Hesselbarth9139acd2012-11-19 10:39:55 +0100475 select PINCTRL
476 select PINCTRL_DOVE
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +0200477 select PLAT_ORION_LEGACY
Arnd Bergmann5cdbe5d2015-12-02 22:27:05 +0100478 select SPARSE_IRQ
Russell Kingc5d431e2015-12-08 10:58:09 +0000479 select PM_GENERIC_DOMAINS if PM
Saeed Bisharaedabd382009-08-06 15:12:43 +0300480 help
481 Support for the Marvell Dove SoC 88AP510
482
Andrew Victorc53c9cf2007-05-11 21:01:28 +0100483config ARCH_KS8695
484 bool "Micrel/Kendin KS8695"
Linus Walleijc7e783d2012-08-29 20:27:22 +0200485 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100486 select CPU_ARM922T
Linus Walleijc7e783d2012-08-29 20:27:22 +0200487 select GENERIC_CLOCKEVENTS
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200488 select GPIOLIB
Russell Kingb1b3f492012-10-06 17:12:25 +0100489 select NEED_MACH_MEMORY_H
Andrew Victorc53c9cf2007-05-11 21:01:28 +0100490 help
491 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
492 System-on-Chip devices.
493
Russell King788c9702009-04-26 14:21:59 +0100494config ARCH_W90X900
495 bool "Nuvoton W90X900 CPU"
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100496 select CLKDEV_LOOKUP
Russell King6fa5d5f2011-05-08 15:34:39 +0100497 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100498 select CPU_ARM926T
wanzongshun58b53692009-08-14 15:36:44 +0100499 select GENERIC_CLOCKEVENTS
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200500 select GPIOLIB
Lennert Buytenhek777f9be2008-06-22 22:45:02 +0200501 help
wanzongshuna8bc4ea2009-08-14 15:38:29 +0100502 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
503 At present, the w90x900 has been renamed nuc900, regarding
504 the ARM series product line, you can login the following
505 link address to know more.
506
507 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
508 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
Tzachi Perelstein585cf172007-10-23 15:14:41 -0400509
Russell King93e22562012-10-12 14:20:52 +0100510config ARCH_LPC32XX
511 bool "NXP LPC32XX"
Russell King93e22562012-10-12 14:20:52 +0100512 select ARM_AMBA
Russell King40737232011-01-06 22:32:52 +0000513 select CLKDEV_LOOKUP
Vladimir Zapolskiyc227f122015-11-20 03:05:10 +0200514 select CLKSRC_LPC32XX
515 select COMMON_CLK
Russell King93e22562012-10-12 14:20:52 +0100516 select CPU_ARM926T
517 select GENERIC_CLOCKEVENTS
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200518 select GPIOLIB
Vladimir Zapolskiy8cb17b52016-04-25 04:00:38 +0300519 select MULTI_IRQ_HANDLER
520 select SPARSE_IRQ
Russell King93e22562012-10-12 14:20:52 +0100521 select USE_OF
522 help
523 Support for the NXP LPC32XX family of processors
524
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525config ARCH_PXA
eric miao2c8086a2007-09-11 19:13:17 -0700526 bool "PXA2xx/PXA3xx-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100527 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100528 select ARCH_MTD_XIP
Russell Kingb1b3f492012-10-06 17:12:25 +0100529 select ARM_CPU_SUSPEND if PM
530 select AUTO_ZRELADDR
Robert Jarzmika1c0a6a2015-02-07 22:54:03 +0100531 select COMMON_CLK
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100532 select CLKDEV_LOOKUP
Daniel Lezcano389d9b52015-10-09 15:48:38 +0200533 select CLKSRC_PXA
Russell King234b6ced2011-05-08 14:09:47 +0100534 select CLKSRC_MMIO
Robert Jarzmik6f6caea2014-07-14 18:52:03 +0200535 select CLKSRC_OF
Arnd Bergmann2f202862016-01-29 15:06:29 +0100536 select CPU_XSCALE if !CPU_XSC3
Eric Miao981d0f32007-07-24 01:22:43 +0100537 select GENERIC_CLOCKEVENTS
Haojian Zhuang157d2642011-10-17 20:37:52 +0800538 select GPIO_PXA
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200539 select GPIOLIB
Russell Kingb1b3f492012-10-06 17:12:25 +0100540 select HAVE_IDE
Robert Jarzmikd6cf30c2015-02-14 22:41:56 +0100541 select IRQ_DOMAIN
Russell Kingb1b3f492012-10-06 17:12:25 +0100542 select MULTI_IRQ_HANDLER
Eric Miaobd5ce432009-01-20 12:06:01 +0800543 select PLAT_PXA
Haojian Zhuang6ac6b812010-08-20 15:23:59 +0800544 select SPARSE_IRQ
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000545 help
eric miao2c8086a2007-09-11 19:13:17 -0700546 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547
548config ARCH_RPC
549 bool "RiscPC"
Russell King868e87c2015-09-28 10:31:50 +0100550 depends on MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 select ARCH_ACORN
viro@ZenIV.linux.org.uka08b6b72005-09-06 01:48:42 +0100552 select ARCH_MAY_HAVE_PC_FDC
Russell King07f841b2008-10-01 17:11:06 +0100553 select ARCH_SPARSEMEM_ENABLE
John Stultz5cfc8ee2010-03-24 00:22:36 +0000554 select ARCH_USES_GETTIMEOFFSET
Arnd Bergmannfa04e202014-02-26 17:39:12 +0100555 select CPU_SA110
Russell Kingb1b3f492012-10-06 17:12:25 +0100556 select FIQ
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200557 select HAVE_IDE
Russell Kingb1b3f492012-10-06 17:12:25 +0100558 select HAVE_PATA_PLATFORM
559 select ISA_DMA_API
Rob Herringc334bc12012-03-04 22:03:33 -0600560 select NEED_MACH_IO_H
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400561 select NEED_MACH_MEMORY_H
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700562 select NO_IOPORT_MAP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700563 help
564 On the Acorn Risc-PC, Linux can support the internal IDE disk and
565 CD-ROM interface, serial and parallel port, and the floppy drive.
566
567config ARCH_SA1100
568 bool "SA1100-based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100569 select ARCH_MTD_XIP
Russell Kingb1b3f492012-10-06 17:12:25 +0100570 select ARCH_SPARSEMEM_ENABLE
571 select CLKDEV_LOOKUP
572 select CLKSRC_MMIO
Daniel Lezcano389d9b52015-10-09 15:48:38 +0200573 select CLKSRC_PXA
574 select CLKSRC_OF if OF
Russell Kingb1b3f492012-10-06 17:12:25 +0100575 select CPU_FREQ
576 select CPU_SA1100
577 select GENERIC_CLOCKEVENTS
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200578 select GPIOLIB
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200579 select HAVE_IDE
Dmitry Eremin-Solenikov1eca42b2014-11-28 15:56:54 +0100580 select IRQ_DOMAIN
Russell Kingb1b3f492012-10-06 17:12:25 +0100581 select ISA
Dmitry Eremin-Solenikovaffcab32014-11-28 15:55:16 +0100582 select MULTI_IRQ_HANDLER
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400583 select NEED_MACH_MEMORY_H
Russell King375dec92012-02-23 14:29:33 +0100584 select SPARSE_IRQ
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000585 help
586 Support for StrongARM 11x0 based boards.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900588config ARCH_S3C24XX
589 bool "Samsung S3C24XX SoCs"
Arnd Bergmann335cce72014-03-13 14:11:16 +0100590 select ATAGS
Russell Kingb1b3f492012-10-06 17:12:25 +0100591 select CLKDEV_LOOKUP
Tomasz Figa42805062013-04-28 02:25:01 +0200592 select CLKSRC_SAMSUNG_PWM
Romain Naour7f78b6e2013-01-09 18:47:04 -0800593 select GENERIC_CLOCKEVENTS
Tomasz Figa880cf072013-06-19 01:22:20 +0900594 select GPIO_SAMSUNG
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200595 select GPIOLIB
Kukjin Kim20676c12010-11-13 16:08:32 +0900596 select HAVE_S3C2410_I2C if I2C
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900597 select HAVE_S3C2410_WATCHDOG if WATCHDOG
Russell Kingb1b3f492012-10-06 17:12:25 +0100598 select HAVE_S3C_RTC if RTC_CLASS
Heiko Stuebner17453dd2013-03-07 12:38:25 +0900599 select MULTI_IRQ_HANDLER
Rob Herringc334bc12012-03-04 22:03:33 -0600600 select NEED_MACH_IO_H
Tomasz Figacd8dc7a2013-06-15 09:01:49 +0900601 select SAMSUNG_ATAGS
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602 help
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900603 Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
604 and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
605 (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
606 Samsung SMDK2410 development board (and derivatives).
Ben Dooks63b1f512010-04-30 16:32:26 +0900607
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100608config ARCH_DAVINCI
609 bool "TI DaVinci"
Russell Kingb1b3f492012-10-06 17:12:25 +0100610 select ARCH_HAS_HOLES_MEMORYMODEL
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100611 select CLKDEV_LOOKUP
Arnd Bergmannce32c5c2016-02-01 21:35:57 +0100612 select CPU_ARM926T
David Brownell20e99692009-05-07 09:31:42 -0700613 select GENERIC_ALLOCATOR
Russell Kingb1b3f492012-10-06 17:12:25 +0100614 select GENERIC_CLOCKEVENTS
Russell Kingdc7ad3b2011-05-22 10:01:21 +0100615 select GENERIC_IRQ_CHIP
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200616 select GPIOLIB
Russell Kingb1b3f492012-10-06 17:12:25 +0100617 select HAVE_IDE
Sekhar Nori689e3312012-08-28 15:27:52 +0530618 select USE_OF
Russell Kingb1b3f492012-10-06 17:12:25 +0100619 select ZONE_DMA
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100620 help
621 Support for TI's DaVinci platform.
622
Tony Lindgrena0694862013-01-11 11:24:20 -0800623config ARCH_OMAP1
624 bool "TI OMAP1"
Arnd Bergmann00a36692012-06-07 18:50:51 -0600625 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100626 select ARCH_HAS_HOLES_MEMORYMODEL
Tony Lindgrena0694862013-01-11 11:24:20 -0800627 select ARCH_OMAP
Tony Priske9a91de2012-08-03 21:00:06 +1200628 select CLKDEV_LOOKUP
viresh kumarcee37e52010-04-01 12:31:05 +0100629 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100630 select GENERIC_CLOCKEVENTS
Tony Lindgrena0694862013-01-11 11:24:20 -0800631 select GENERIC_IRQ_CHIP
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200632 select GPIOLIB
Tony Lindgrena0694862013-01-11 11:24:20 -0800633 select HAVE_IDE
634 select IRQ_DOMAIN
Tony Lindgrenb6943312015-05-20 09:01:21 -0700635 select MULTI_IRQ_HANDLER
Tony Lindgrena0694862013-01-11 11:24:20 -0800636 select NEED_MACH_IO_H if PCCARD
637 select NEED_MACH_MEMORY_H
Tony Lindgren685e2d02015-05-20 09:01:21 -0700638 select SPARSE_IRQ
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100639 help
Tony Lindgrena0694862013-01-11 11:24:20 -0800640 Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
Binghua Duan02c981c2011-07-08 17:40:12 +0800641
Linus Torvalds1da177e2005-04-16 15:20:36 -0700642endchoice
643
Rob Herring387798b2012-09-06 13:41:12 -0500644menu "Multiple platform selection"
645 depends on ARCH_MULTIPLATFORM
646
647comment "CPU Core family selection"
648
Arnd Bergmannf8afae42014-03-25 22:19:00 +0100649config ARCH_MULTI_V4
650 bool "ARMv4 based platforms (FA526)"
651 depends on !ARCH_MULTI_V6_V7
652 select ARCH_MULTI_V4_V5
653 select CPU_FA526
654
Rob Herring387798b2012-09-06 13:41:12 -0500655config ARCH_MULTI_V4T
656 bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
Rob Herring387798b2012-09-06 13:41:12 -0500657 depends on !ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100658 select ARCH_MULTI_V4_V5
Arnd Bergmann24e860f2013-06-03 15:38:58 +0200659 select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
660 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
661 CPU_ARM925T || CPU_ARM940T)
Rob Herring387798b2012-09-06 13:41:12 -0500662
663config ARCH_MULTI_V5
664 bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
Rob Herring387798b2012-09-06 13:41:12 -0500665 depends on !ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100666 select ARCH_MULTI_V4_V5
Andrew Lunn12567bb2014-02-22 20:14:54 +0100667 select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
Arnd Bergmann24e860f2013-06-03 15:38:58 +0200668 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
669 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
Rob Herring387798b2012-09-06 13:41:12 -0500670
671config ARCH_MULTI_V4_V5
672 bool
673
674config ARCH_MULTI_V6
Stephen Boyd8dda05c2013-03-04 15:19:19 -0800675 bool "ARMv6 based platforms (ARM11)"
Rob Herring387798b2012-09-06 13:41:12 -0500676 select ARCH_MULTI_V6_V7
Rob Herring42f47542014-01-31 14:26:04 -0600677 select CPU_V6K
Rob Herring387798b2012-09-06 13:41:12 -0500678
679config ARCH_MULTI_V7
Stephen Boyd8dda05c2013-03-04 15:19:19 -0800680 bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
Rob Herring387798b2012-09-06 13:41:12 -0500681 default y
682 select ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100683 select CPU_V7
Rob Herring90bc8ac2014-01-31 15:32:02 -0600684 select HAVE_SMP
Rob Herring387798b2012-09-06 13:41:12 -0500685
686config ARCH_MULTI_V6_V7
687 bool
Rob Herring9352b052014-01-31 15:36:10 -0600688 select MIGHT_HAVE_CACHE_L2X0
Rob Herring387798b2012-09-06 13:41:12 -0500689
690config ARCH_MULTI_CPU_AUTO
691 def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
692 select ARCH_MULTI_V5
693
694endmenu
695
Rob Herring05e2a3d2013-12-05 10:04:54 -0600696config ARCH_VIRT
Masahiro Yamadae3246542015-11-16 12:06:10 +0900697 bool "Dummy Virtual Machine"
698 depends on ARCH_MULTI_V7
Rob Herring4b8b5f22013-12-05 10:10:34 -0600699 select ARM_AMBA
Rob Herring05e2a3d2013-12-05 10:04:54 -0600700 select ARM_GIC
Arnd Bergmann3ee80362016-06-15 15:47:33 -0500701 select ARM_GIC_V2M if PCI
Jean-Philippe Brucker0b28f1d2015-10-01 13:47:18 +0100702 select ARM_GIC_V3
Vladimir Murzinbb29cec2016-11-02 11:54:08 +0000703 select ARM_GIC_V3_ITS if PCI
Rob Herring05e2a3d2013-12-05 10:04:54 -0600704 select ARM_PSCI
Rob Herring4b8b5f22013-12-05 10:10:34 -0600705 select HAVE_ARM_ARCH_TIMER
Rob Herring05e2a3d2013-12-05 10:04:54 -0600706
Russell Kingccf50e22010-03-15 19:03:06 +0000707#
708# This is sorted alphabetically by mach-* pathname. However, plat-*
709# Kconfigs may be included either alphabetically (according to the
710# plat- suffix) or along side the corresponding mach-* source.
711#
Gregory CLEMENT3e93a222012-06-04 18:38:56 +0200712source "arch/arm/mach-mvebu/Kconfig"
713
Tsahee Zidenberg445d9b32015-03-12 13:53:00 +0200714source "arch/arm/mach-alpine/Kconfig"
715
Lars Persson590b4602016-02-11 17:06:19 +0100716source "arch/arm/mach-artpec/Kconfig"
717
Oleksij Rempeld9bfc862014-11-24 12:08:27 +0100718source "arch/arm/mach-asm9260/Kconfig"
719
Russell King95b8f202010-01-14 11:43:54 +0000720source "arch/arm/mach-at91/Kconfig"
721
Anders Berg1d22924e2014-05-23 11:08:35 +0200722source "arch/arm/mach-axxia/Kconfig"
723
Christian Daudt8ac49e02012-11-19 09:46:10 -0800724source "arch/arm/mach-bcm/Kconfig"
725
Sebastian Hesselbarth1c37fa12013-09-09 14:36:19 +0200726source "arch/arm/mach-berlin/Kconfig"
727
Linus Torvalds1da177e2005-04-16 15:20:36 -0700728source "arch/arm/mach-clps711x/Kconfig"
729
Anton Vorontsovd94f9442010-03-25 17:12:41 +0300730source "arch/arm/mach-cns3xxx/Kconfig"
731
Russell King95b8f202010-01-14 11:43:54 +0000732source "arch/arm/mach-davinci/Kconfig"
733
Baruch Siachdf8d7422015-01-14 10:40:30 +0200734source "arch/arm/mach-digicolor/Kconfig"
735
Russell King95b8f202010-01-14 11:43:54 +0000736source "arch/arm/mach-dove/Kconfig"
737
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000738source "arch/arm/mach-ep93xx/Kconfig"
739
Linus Torvalds1da177e2005-04-16 15:20:36 -0700740source "arch/arm/mach-footbridge/Kconfig"
741
Paulius Zaleckas59d3a192009-03-26 10:06:08 +0200742source "arch/arm/mach-gemini/Kconfig"
743
Rob Herring387798b2012-09-06 13:41:12 -0500744source "arch/arm/mach-highbank/Kconfig"
745
Haojian Zhuang389ee0c2013-12-20 10:52:56 +0800746source "arch/arm/mach-hisi/Kconfig"
747
Linus Torvalds1da177e2005-04-16 15:20:36 -0700748source "arch/arm/mach-integrator/Kconfig"
749
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100750source "arch/arm/mach-iop32x/Kconfig"
751
752source "arch/arm/mach-iop33x/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700753
Dan Williams285f5fa2006-12-07 02:59:39 +0100754source "arch/arm/mach-iop13xx/Kconfig"
755
Linus Torvalds1da177e2005-04-16 15:20:36 -0700756source "arch/arm/mach-ixp4xx/Kconfig"
757
Santosh Shilimkar828989a2013-06-10 11:27:13 -0400758source "arch/arm/mach-keystone/Kconfig"
759
Russell King95b8f202010-01-14 11:43:54 +0000760source "arch/arm/mach-ks8695/Kconfig"
761
Carlo Caione3b8f5032014-09-10 22:16:59 +0200762source "arch/arm/mach-meson/Kconfig"
763
Jonas Jensen17723fd32013-12-18 13:58:45 +0100764source "arch/arm/mach-moxart/Kconfig"
765
Joel Stanley8c2ed9b2016-03-21 17:22:31 +1030766source "arch/arm/mach-aspeed/Kconfig"
767
Stanislav Samsonov794d15b2008-06-22 22:45:10 +0200768source "arch/arm/mach-mv78xx0/Kconfig"
769
Shawn Guo3995eb82012-09-13 19:48:07 +0800770source "arch/arm/mach-imx/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700771
Matthias Bruggerf682a212014-05-13 01:06:13 +0200772source "arch/arm/mach-mediatek/Kconfig"
773
Shawn Guo1d3f33d2010-12-13 20:55:03 +0800774source "arch/arm/mach-mxs/Kconfig"
775
Russell King95b8f202010-01-14 11:43:54 +0000776source "arch/arm/mach-netx/Kconfig"
Eric Miao49cbe782009-01-20 14:15:18 +0800777
Russell King95b8f202010-01-14 11:43:54 +0000778source "arch/arm/mach-nomadik/Kconfig"
Russell King95b8f202010-01-14 11:43:54 +0000779
Daniel Tang9851ca52013-06-11 18:40:17 +1000780source "arch/arm/mach-nspire/Kconfig"
781
Tony Lindgrend48af152005-07-10 19:58:17 +0100782source "arch/arm/plat-omap/Kconfig"
783
784source "arch/arm/mach-omap1/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700785
Tony Lindgren1dbae812005-11-10 14:26:51 +0000786source "arch/arm/mach-omap2/Kconfig"
787
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400788source "arch/arm/mach-orion5x/Kconfig"
Tzachi Perelstein585cf172007-10-23 15:14:41 -0400789
Rob Herring387798b2012-09-06 13:41:12 -0500790source "arch/arm/mach-picoxcell/Kconfig"
791
Russell King95b8f202010-01-14 11:43:54 +0000792source "arch/arm/mach-pxa/Kconfig"
793source "arch/arm/plat-pxa/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700794
Russell King95b8f202010-01-14 11:43:54 +0000795source "arch/arm/mach-mmp/Kconfig"
796
Neil Armstrong8c9184b2016-03-03 10:42:15 +0100797source "arch/arm/mach-oxnas/Kconfig"
798
Kumar Gala8fc1b0f2014-01-21 17:14:10 -0600799source "arch/arm/mach-qcom/Kconfig"
800
Russell King95b8f202010-01-14 11:43:54 +0000801source "arch/arm/mach-realview/Kconfig"
802
Heiko Stuebnerd63dc052013-06-02 23:09:41 +0200803source "arch/arm/mach-rockchip/Kconfig"
804
Russell King95b8f202010-01-14 11:43:54 +0000805source "arch/arm/mach-sa1100/Kconfig"
Saeed Bisharaedabd382009-08-06 15:12:43 +0300806
Rob Herring387798b2012-09-06 13:41:12 -0500807source "arch/arm/mach-socfpga/Kconfig"
808
Arnd Bergmanna7ed0992012-12-02 15:12:47 +0100809source "arch/arm/mach-spear/Kconfig"
Ben Dooksa21765a2007-02-11 18:31:01 +0100810
Srinivas Kandagatla65ebcc12013-06-25 12:15:10 +0100811source "arch/arm/mach-sti/Kconfig"
812
Alexandre TORGUEbcb84fb2017-01-30 17:33:13 +0100813source "arch/arm/mach-stm32/Kconfig"
814
Kukjin Kim85fd6d62012-02-06 09:38:19 +0900815source "arch/arm/mach-s3c24xx/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700816
Ben Dooks431107e2010-01-26 10:11:04 +0900817source "arch/arm/mach-s3c64xx/Kconfig"
Ben Dooksa08ab632008-10-21 14:06:39 +0100818
Kukjin Kim170f4e42010-02-24 16:40:44 +0900819source "arch/arm/mach-s5pv210/Kconfig"
820
Kukjin Kim83014572011-11-06 13:54:56 +0900821source "arch/arm/mach-exynos/Kconfig"
Rob Herringe509b282014-06-10 09:06:09 -0500822source "arch/arm/plat-samsung/Kconfig"
Changhwan Youncc0e72b2010-07-16 12:15:38 +0900823
Russell King882d01f2010-03-02 23:40:15 +0000824source "arch/arm/mach-shmobile/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700825
Maxime Ripard3b526342012-11-08 12:40:16 +0100826source "arch/arm/mach-sunxi/Kconfig"
827
Barry Song156a0992012-08-23 13:41:58 +0800828source "arch/arm/mach-prima2/Kconfig"
829
Marc Gonzalezd6de5b02015-12-15 10:41:13 +0100830source "arch/arm/mach-tango/Kconfig"
831
Erik Gillingc5f80062010-01-21 16:53:02 -0800832source "arch/arm/mach-tegra/Kconfig"
833
Russell King95b8f202010-01-14 11:43:54 +0000834source "arch/arm/mach-u300/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700835
Masahiro Yamadaba56a982015-05-08 13:07:11 +0900836source "arch/arm/mach-uniphier/Kconfig"
837
Russell King95b8f202010-01-14 11:43:54 +0000838source "arch/arm/mach-ux500/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700839
840source "arch/arm/mach-versatile/Kconfig"
841
Russell Kingceade892010-02-11 21:44:53 +0000842source "arch/arm/mach-vexpress/Kconfig"
Russell King420c34e2011-01-18 20:08:06 +0000843source "arch/arm/plat-versatile/Kconfig"
Russell Kingceade892010-02-11 21:44:53 +0000844
Tony Prisk6f35f9a2012-10-11 20:13:09 +1300845source "arch/arm/mach-vt8500/Kconfig"
846
wanzongshun7ec80dd2008-12-03 03:55:38 +0100847source "arch/arm/mach-w90x900/Kconfig"
848
Jun Nieacede512015-04-28 17:18:05 +0800849source "arch/arm/mach-zx/Kconfig"
850
Josh Cartwright9a45eb62012-11-19 11:38:29 -0600851source "arch/arm/mach-zynq/Kconfig"
852
Stefan Agner499f1642015-05-21 00:35:44 +0200853# ARMv7-M architecture
854config ARCH_EFM32
855 bool "Energy Micro efm32"
856 depends on ARM_SINGLE_ARMV7M
Linus Walleij5c34a4e2016-06-02 14:10:16 +0200857 select GPIOLIB
Stefan Agner499f1642015-05-21 00:35:44 +0200858 help
859 Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
860 processors.
861
862config ARCH_LPC18XX
863 bool "NXP LPC18xx/LPC43xx"
864 depends on ARM_SINGLE_ARMV7M
865 select ARCH_HAS_RESET_CONTROLLER
866 select ARM_AMBA
867 select CLKSRC_LPC32XX
868 select PINCTRL
869 help
870 Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
871 high performance microcontrollers.
872
Vladimir Murzin18471192016-04-25 09:49:13 +0100873config ARCH_MPS2
Baruch Siach17bd2742016-07-17 11:35:29 +0300874 bool "ARM MPS2 platform"
Vladimir Murzin18471192016-04-25 09:49:13 +0100875 depends on ARM_SINGLE_ARMV7M
876 select ARM_AMBA
877 select CLKSRC_MPS2
878 help
879 Support for Cortex-M Prototyping System (or V2M-MPS2) which comes
880 with a range of available cores like Cortex-M3/M4/M7.
881
882 Please, note that depends which Application Note is used memory map
883 for the platform may vary, so adjustment of RAM base might be needed.
884
Linus Torvalds1da177e2005-04-16 15:20:36 -0700885# Definitions to make life easier
886config ARCH_ACORN
887 bool
888
Lennert Buytenhek7ae1f7e2006-09-18 23:12:53 +0100889config PLAT_IOP
890 bool
Mikael Pettersson469d30442009-10-29 11:46:54 -0700891 select GENERIC_CLOCKEVENTS
Lennert Buytenhek7ae1f7e2006-09-18 23:12:53 +0100892
Lennert Buytenhek69b02f62008-03-27 14:51:39 -0400893config PLAT_ORION
894 bool
Russell Kingbfe45e02011-05-08 15:33:30 +0100895 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100896 select COMMON_CLK
Russell Kingdc7ad3b2011-05-22 10:01:21 +0100897 select GENERIC_IRQ_CHIP
Andrew Lunn278b45b2012-06-27 13:40:04 +0200898 select IRQ_DOMAIN
Lennert Buytenhek69b02f62008-03-27 14:51:39 -0400899
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +0200900config PLAT_ORION_LEGACY
901 bool
902 select PLAT_ORION
903
Eric Miaobd5ce432009-01-20 12:06:01 +0800904config PLAT_PXA
905 bool
906
Russell Kingf4b8b312010-01-14 12:48:06 +0000907config PLAT_VERSATILE
908 bool
909
Alexandre Courbotd9a1bea2013-11-24 15:30:46 +0900910source "arch/arm/firmware/Kconfig"
911
Linus Torvalds1da177e2005-04-16 15:20:36 -0700912source arch/arm/mm/Kconfig
913
Lennert Buytenhekafe4b252006-12-03 18:51:14 +0100914config IWMMXT
Sebastian Hesselbarthd93003e2014-04-24 22:58:30 +0100915 bool "Enable iWMMXt support"
916 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
917 default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
Lennert Buytenhekafe4b252006-12-03 18:51:14 +0100918 help
919 Enable support for iWMMXt context switching at run time if
920 running on a CPU that supports it.
921
eric miao52108642010-12-13 09:42:34 +0100922config MULTI_IRQ_HANDLER
923 bool
924 help
925 Allow each machine to specify it's own IRQ handler at run time.
926
Hyok S. Choi3b93e7b2006-06-22 11:48:56 +0100927if !MMU
928source "arch/arm/Kconfig-nommu"
929endif
930
Gregory CLEMENT3e0a07f2013-06-23 10:17:11 +0100931config PJ4B_ERRATA_4742
932 bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
933 depends on CPU_PJ4B && MACH_ARMADA_370
934 default y
935 help
936 When coming out of either a Wait for Interrupt (WFI) or a Wait for
937 Event (WFE) IDLE states, a specific timing sensitivity exists between
938 the retiring WFI/WFE instructions and the newly issued subsequent
939 instructions. This sensitivity can result in a CPU hang scenario.
940 Workaround:
941 The software must insert either a Data Synchronization Barrier (DSB)
942 or Data Memory Barrier (DMB) command immediately after the WFI/WFE
943 instruction
944
Will Deaconf0c4b8d2012-04-20 17:20:08 +0100945config ARM_ERRATA_326103
946 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
947 depends on CPU_V6
948 help
949 Executing a SWP instruction to read-only memory does not set bit 11
950 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
951 treat the access as a read, preventing a COW from occurring and
952 causing the faulting task to livelock.
953
Catalin Marinas9cba3cc2009-04-30 17:06:03 +0100954config ARM_ERRATA_411920
955 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
Russell Kinge399b1a2011-01-17 15:08:32 +0000956 depends on CPU_V6 || CPU_V6K
Catalin Marinas9cba3cc2009-04-30 17:06:03 +0100957 help
958 Invalidation of the Instruction Cache operation can
959 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
960 It does not affect the MPCore. This option enables the ARM Ltd.
961 recommended workaround.
962
Catalin Marinas7ce236f2009-04-30 17:06:09 +0100963config ARM_ERRATA_430973
964 bool "ARM errata: Stale prediction on replaced interworking branch"
965 depends on CPU_V7
966 help
967 This option enables the workaround for the 430973 Cortex-A8
Russell King79403cd2015-04-13 16:14:37 +0100968 r1p* erratum. If a code sequence containing an ARM/Thumb
Catalin Marinas7ce236f2009-04-30 17:06:09 +0100969 interworking branch is replaced with another code sequence at the
970 same virtual address, whether due to self-modifying code or virtual
971 to physical address re-mapping, Cortex-A8 does not recover from the
972 stale interworking branch prediction. This results in Cortex-A8
973 executing the new code sequence in the incorrect ARM or Thumb state.
974 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
975 and also flushes the branch target cache at every context switch.
976 Note that setting specific bits in the ACTLR register may not be
977 available in non-secure mode.
978
Catalin Marinas855c5512009-04-30 17:06:15 +0100979config ARM_ERRATA_458693
980 bool "ARM errata: Processor deadlock when a false hazard is created"
981 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +0100982 depends on !ARCH_MULTIPLATFORM
Catalin Marinas855c5512009-04-30 17:06:15 +0100983 help
984 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
985 erratum. For very specific sequences of memory operations, it is
986 possible for a hazard condition intended for a cache line to instead
987 be incorrectly associated with a different cache line. This false
988 hazard might then cause a processor deadlock. The workaround enables
989 the L1 caching of the NEON accesses and disables the PLD instruction
990 in the ACTLR register. Note that setting specific bits in the ACTLR
991 register may not be available in non-secure mode.
992
Catalin Marinas0516e462009-04-30 17:06:20 +0100993config ARM_ERRATA_460075
994 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
995 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +0100996 depends on !ARCH_MULTIPLATFORM
Catalin Marinas0516e462009-04-30 17:06:20 +0100997 help
998 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
999 erratum. Any asynchronous access to the L2 cache may encounter a
1000 situation in which recent store transactions to the L2 cache are lost
1001 and overwritten with stale memory contents from external memory. The
1002 workaround disables the write-allocate mode for the L2 cache via the
1003 ACTLR register. Note that setting specific bits in the ACTLR register
1004 may not be available in non-secure mode.
1005
Will Deacon9f050272010-09-14 09:51:43 +01001006config ARM_ERRATA_742230
1007 bool "ARM errata: DMB operation may be faulty"
1008 depends on CPU_V7 && SMP
Rob Herring62e4d352012-12-21 22:42:40 +01001009 depends on !ARCH_MULTIPLATFORM
Will Deacon9f050272010-09-14 09:51:43 +01001010 help
1011 This option enables the workaround for the 742230 Cortex-A9
1012 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1013 between two write operations may not ensure the correct visibility
1014 ordering of the two writes. This workaround sets a specific bit in
1015 the diagnostic register of the Cortex-A9 which causes the DMB
1016 instruction to behave as a DSB, ensuring the correct behaviour of
1017 the two writes.
1018
Will Deacona672e992010-09-14 09:53:02 +01001019config ARM_ERRATA_742231
1020 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1021 depends on CPU_V7 && SMP
Rob Herring62e4d352012-12-21 22:42:40 +01001022 depends on !ARCH_MULTIPLATFORM
Will Deacona672e992010-09-14 09:53:02 +01001023 help
1024 This option enables the workaround for the 742231 Cortex-A9
1025 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1026 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1027 accessing some data located in the same cache line, may get corrupted
1028 data due to bad handling of the address hazard when the line gets
1029 replaced from one of the CPUs at the same time as another CPU is
1030 accessing it. This workaround sets specific bits in the diagnostic
1031 register of the Cortex-A9 which reduces the linefill issuing
1032 capabilities of the processor.
1033
Jon Medhurst69155792013-06-07 10:35:35 +01001034config ARM_ERRATA_643719
1035 bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1036 depends on CPU_V7 && SMP
Russell Kinge5a5de42015-04-02 23:58:55 +01001037 default y
Jon Medhurst69155792013-06-07 10:35:35 +01001038 help
1039 This option enables the workaround for the 643719 Cortex-A9 (prior to
1040 r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1041 register returns zero when it should return one. The workaround
1042 corrects this value, ensuring cache maintenance operations which use
1043 it behave as intended and avoiding data corruption.
1044
Will Deaconcdf357f2010-08-05 11:20:51 +01001045config ARM_ERRATA_720789
1046 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
Dave Martine66dc742011-12-08 13:37:46 +01001047 depends on CPU_V7
Will Deaconcdf357f2010-08-05 11:20:51 +01001048 help
1049 This option enables the workaround for the 720789 Cortex-A9 (prior to
1050 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1051 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1052 As a consequence of this erratum, some TLB entries which should be
1053 invalidated are not, resulting in an incoherency in the system page
1054 tables. The workaround changes the TLB flushing routines to invalidate
1055 entries regardless of the ASID.
Will Deacon475d92f2010-09-28 14:02:02 +01001056
1057config ARM_ERRATA_743622
1058 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1059 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001060 depends on !ARCH_MULTIPLATFORM
Will Deacon475d92f2010-09-28 14:02:02 +01001061 help
1062 This option enables the workaround for the 743622 Cortex-A9
Will Deaconefbc74a2012-02-24 12:12:38 +01001063 (r2p*) erratum. Under very rare conditions, a faulty
Will Deacon475d92f2010-09-28 14:02:02 +01001064 optimisation in the Cortex-A9 Store Buffer may lead to data
1065 corruption. This workaround sets a specific bit in the diagnostic
1066 register of the Cortex-A9 which disables the Store Buffer
1067 optimisation, preventing the defect from occurring. This has no
1068 visible impact on the overall performance or power consumption of the
1069 processor.
1070
Will Deacon9a27c272011-02-18 16:36:35 +01001071config ARM_ERRATA_751472
1072 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
Dave Martinba90c512011-12-08 13:41:06 +01001073 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001074 depends on !ARCH_MULTIPLATFORM
Will Deacon9a27c272011-02-18 16:36:35 +01001075 help
1076 This option enables the workaround for the 751472 Cortex-A9 (prior
1077 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1078 completion of a following broadcasted operation if the second
1079 operation is received by a CPU before the ICIALLUIS has completed,
1080 potentially leading to corrupted entries in the cache or TLB.
1081
Will Deaconfcbdc5fe2011-02-28 18:15:16 +01001082config ARM_ERRATA_754322
1083 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1084 depends on CPU_V7
1085 help
1086 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1087 r3p*) erratum. A speculative memory access may cause a page table walk
1088 which starts prior to an ASID switch but completes afterwards. This
1089 can populate the micro-TLB with a stale entry which may be hit with
1090 the new ASID. This workaround places two dsb instructions in the mm
1091 switching code so that no page table walks can cross the ASID switch.
1092
Will Deacon5dab26a2011-03-04 12:38:54 +01001093config ARM_ERRATA_754327
1094 bool "ARM errata: no automatic Store Buffer drain"
1095 depends on CPU_V7 && SMP
1096 help
1097 This option enables the workaround for the 754327 Cortex-A9 (prior to
1098 r2p0) erratum. The Store Buffer does not have any automatic draining
1099 mechanism and therefore a livelock may occur if an external agent
1100 continuously polls a memory location waiting to observe an update.
1101 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1102 written polling loops from denying visibility of updates to memory.
1103
Catalin Marinas145e10e2011-08-15 11:04:41 +01001104config ARM_ERRATA_364296
1105 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
Fabio Estevamfd832472013-07-09 18:34:01 +01001106 depends on CPU_V6
Catalin Marinas145e10e2011-08-15 11:04:41 +01001107 help
1108 This options enables the workaround for the 364296 ARM1136
1109 r0p2 erratum (possible cache data corruption with
1110 hit-under-miss enabled). It sets the undocumented bit 31 in
1111 the auxiliary control register and the FI bit in the control
1112 register, thus disabling hit-under-miss without putting the
1113 processor into full low interrupt latency mode. ARM11MPCore
1114 is not affected.
1115
Will Deaconf630c1b2011-09-15 11:45:15 +01001116config ARM_ERRATA_764369
1117 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1118 depends on CPU_V7 && SMP
1119 help
1120 This option enables the workaround for erratum 764369
1121 affecting Cortex-A9 MPCore with two or more processors (all
1122 current revisions). Under certain timing circumstances, a data
1123 cache line maintenance operation by MVA targeting an Inner
1124 Shareable memory region may fail to proceed up to either the
1125 Point of Coherency or to the Point of Unification of the
1126 system. This workaround adds a DSB instruction before the
1127 relevant cache maintenance functions and sets a specific bit
1128 in the diagnostic control register of the SCU.
1129
Simon Horman7253b852012-09-28 02:12:45 +01001130config ARM_ERRATA_775420
1131 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1132 depends on CPU_V7
1133 help
1134 This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1135 r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1136 operation aborts with MMU exception, it might cause the processor
1137 to deadlock. This workaround puts DSB before executing ISB if
1138 an abort may occur on cache maintenance.
1139
Catalin Marinas93dc6882013-03-26 23:35:04 +01001140config ARM_ERRATA_798181
1141 bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1142 depends on CPU_V7 && SMP
1143 help
1144 On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1145 adequately shooting down all use of the old entries. This
1146 option enables the Linux kernel workaround for this erratum
1147 which sends an IPI to the CPUs that are running the same ASID
1148 as the one being invalidated.
1149
Will Deacon84b65042013-08-20 17:29:55 +01001150config ARM_ERRATA_773022
1151 bool "ARM errata: incorrect instructions may be executed from loop buffer"
1152 depends on CPU_V7
1153 help
1154 This option enables the workaround for the 773022 Cortex-A15
1155 (up to r0p4) erratum. In certain rare sequences of code, the
1156 loop buffer may deliver incorrect instructions. This
1157 workaround disables the loop buffer to avoid the erratum.
1158
Doug Anderson62c0f4a2016-04-07 00:25:00 +01001159config ARM_ERRATA_818325_852422
1160 bool "ARM errata: A12: some seqs of opposed cond code instrs => deadlock or corruption"
1161 depends on CPU_V7
1162 help
1163 This option enables the workaround for:
1164 - Cortex-A12 818325: Execution of an UNPREDICTABLE STR or STM
1165 instruction might deadlock. Fixed in r0p1.
1166 - Cortex-A12 852422: Execution of a sequence of instructions might
1167 lead to either a data corruption or a CPU deadlock. Not fixed in
1168 any Cortex-A12 cores yet.
1169 This workaround for all both errata involves setting bit[12] of the
1170 Feature Register. This bit disables an optimisation applied to a
1171 sequence of 2 instructions that use opposing condition codes.
1172
Doug Anderson416bcf22016-04-07 00:26:05 +01001173config ARM_ERRATA_821420
1174 bool "ARM errata: A12: sequence of VMOV to core registers might lead to a dead lock"
1175 depends on CPU_V7
1176 help
1177 This option enables the workaround for the 821420 Cortex-A12
1178 (all revs) erratum. In very rare timing conditions, a sequence
1179 of VMOV to Core registers instructions, for which the second
1180 one is in the shadow of a branch or abort, can lead to a
1181 deadlock when the VMOV instructions are issued out-of-order.
1182
Doug Anderson9f6f9352016-04-07 00:27:26 +01001183config ARM_ERRATA_825619
1184 bool "ARM errata: A12: DMB NSHST/ISHST mixed ... might cause deadlock"
1185 depends on CPU_V7
1186 help
1187 This option enables the workaround for the 825619 Cortex-A12
1188 (all revs) erratum. Within rare timing constraints, executing a
1189 DMB NSHST or DMB ISHST instruction followed by a mix of Cacheable
1190 and Device/Strongly-Ordered loads and stores might cause deadlock
1191
1192config ARM_ERRATA_852421
1193 bool "ARM errata: A17: DMB ST might fail to create order between stores"
1194 depends on CPU_V7
1195 help
1196 This option enables the workaround for the 852421 Cortex-A17
1197 (r1p0, r1p1, r1p2) erratum. Under very rare timing conditions,
1198 execution of a DMB ST instruction might fail to properly order
1199 stores from GroupA and stores from GroupB.
1200
Doug Anderson62c0f4a2016-04-07 00:25:00 +01001201config ARM_ERRATA_852423
1202 bool "ARM errata: A17: some seqs of opposed cond code instrs => deadlock or corruption"
1203 depends on CPU_V7
1204 help
1205 This option enables the workaround for:
1206 - Cortex-A17 852423: Execution of a sequence of instructions might
1207 lead to either a data corruption or a CPU deadlock. Not fixed in
1208 any Cortex-A17 cores yet.
1209 This is identical to Cortex-A12 erratum 852422. It is a separate
1210 config option from the A12 erratum due to the way errata are checked
1211 for and handled.
1212
Linus Torvalds1da177e2005-04-16 15:20:36 -07001213endmenu
1214
1215source "arch/arm/common/Kconfig"
1216
Linus Torvalds1da177e2005-04-16 15:20:36 -07001217menu "Bus support"
1218
Linus Torvalds1da177e2005-04-16 15:20:36 -07001219config ISA
1220 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001221 help
1222 Find out whether you have ISA slots on your motherboard. ISA is the
1223 name of a bus system, i.e. the way the CPU talks to the other stuff
1224 inside your box. Other bus systems are PCI, EISA, MicroChannel
1225 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1226 newer boards don't support it. If you have ISA, say Y, otherwise N.
1227
Russell King065909b2006-01-04 15:44:16 +00001228# Select ISA DMA controller support
Linus Torvalds1da177e2005-04-16 15:20:36 -07001229config ISA_DMA
1230 bool
Russell King065909b2006-01-04 15:44:16 +00001231 select ISA_DMA_API
Linus Torvalds1da177e2005-04-16 15:20:36 -07001232
Russell King065909b2006-01-04 15:44:16 +00001233# Select ISA DMA interface
Al Viro5cae8412005-05-04 05:39:22 +01001234config ISA_DMA_API
1235 bool
Al Viro5cae8412005-05-04 05:39:22 +01001236
Linus Torvalds1da177e2005-04-16 15:20:36 -07001237config PCI
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +01001238 bool "PCI support" if MIGHT_HAVE_PCI
Linus Torvalds1da177e2005-04-16 15:20:36 -07001239 help
1240 Find out whether you have a PCI motherboard. PCI is the name of a
1241 bus system, i.e. the way the CPU talks to the other stuff inside
1242 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1243 VESA. If you have PCI, say Y, otherwise N.
1244
Anton Vorontsov52882172010-04-19 13:20:49 +01001245config PCI_DOMAINS
1246 bool
1247 depends on PCI
1248
Lorenzo Pieralisi8c7d14742014-11-21 11:29:26 +00001249config PCI_DOMAINS_GENERIC
1250 def_bool PCI_DOMAINS
1251
Marcelo Roberto Jimenezb080ac82010-12-16 21:34:51 +01001252config PCI_NANOENGINE
1253 bool "BSE nanoEngine PCI support"
1254 depends on SA1100_NANOENGINE
1255 help
1256 Enable PCI on the BSE nanoEngine board.
1257
Matthew Wilcox36e23592007-07-10 10:54:40 -06001258config PCI_SYSCALL
1259 def_bool PCI
1260
Mike Rapoporta0113a92007-11-25 08:55:34 +01001261config PCI_HOST_ITE8152
1262 bool
1263 depends on PCI && MACH_ARMCORE
1264 default y
1265 select DMABOUNCE
1266
Linus Torvalds1da177e2005-04-16 15:20:36 -07001267source "drivers/pci/Kconfig"
1268
1269source "drivers/pcmcia/Kconfig"
1270
1271endmenu
1272
1273menu "Kernel Features"
1274
Dave Martin3b556582011-12-07 15:38:04 +00001275config HAVE_SMP
1276 bool
1277 help
1278 This option should be selected by machines which have an SMP-
1279 capable CPU.
1280
1281 The only effect of this option is to make the SMP-related
1282 options available to the user for configuration.
1283
Linus Torvalds1da177e2005-04-16 15:20:36 -07001284config SMP
Russell Kingbb2d8132011-05-12 09:52:02 +01001285 bool "Symmetric Multi-Processing"
Russell Kingfbb4dda2011-01-17 18:01:58 +00001286 depends on CPU_V6K || CPU_V7
Russell Kingbc282482009-05-17 18:58:34 +01001287 depends on GENERIC_CLOCKEVENTS
Dave Martin3b556582011-12-07 15:38:04 +00001288 depends on HAVE_SMP
Jonathan Austin801bb212013-02-22 18:56:04 +00001289 depends on MMU || ARM_MPU
Arnd Bergmann03617482015-05-26 15:36:58 +01001290 select IRQ_WORK
Linus Torvalds1da177e2005-04-16 15:20:36 -07001291 help
1292 This enables support for systems with more than one CPU. If you have
Robert Graffham4a474152014-01-23 15:55:29 -08001293 a system with only one CPU, say N. If you have a system with more
1294 than one CPU, say Y.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001295
Robert Graffham4a474152014-01-23 15:55:29 -08001296 If you say N here, the kernel will run on uni- and multiprocessor
Linus Torvalds1da177e2005-04-16 15:20:36 -07001297 machines, but will use only one CPU of a multiprocessor machine. If
Robert Graffham4a474152014-01-23 15:55:29 -08001298 you say Y here, the kernel will run on many, but not all,
1299 uniprocessor machines. On a uniprocessor machine, the kernel
1300 will run faster if you say N here.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001301
Paul Bolle395cf962011-08-15 02:02:26 +02001302 See also <file:Documentation/x86/i386/IO-APIC.txt>,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001303 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
Justin P. Mattock50a23e62010-10-16 10:36:23 -07001304 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001305
1306 If you don't know what to do here, say N.
1307
Russell Kingf00ec482010-09-04 10:47:48 +01001308config SMP_ON_UP
Russell King5744ff42015-02-13 11:04:21 +00001309 bool "Allow booting SMP kernel on uniprocessor systems"
Jonathan Austin801bb212013-02-22 18:56:04 +00001310 depends on SMP && !XIP_KERNEL && MMU
Russell Kingf00ec482010-09-04 10:47:48 +01001311 default y
1312 help
1313 SMP kernels contain instructions which fail on non-SMP processors.
1314 Enabling this option allows the kernel to modify itself to make
1315 these instructions safe. Disabling it allows about 1K of space
1316 savings.
1317
1318 If you don't know what to do here, say Y.
1319
Vincent Guittotc9018aa2011-08-08 13:21:59 +01001320config ARM_CPU_TOPOLOGY
1321 bool "Support cpu topology definition"
1322 depends on SMP && CPU_V7
1323 default y
1324 help
1325 Support ARM cpu topology definition. The MPIDR register defines
1326 affinity between processors which is then used to describe the cpu
1327 topology of an ARM System.
1328
1329config SCHED_MC
1330 bool "Multi-core scheduler support"
1331 depends on ARM_CPU_TOPOLOGY
1332 help
1333 Multi-core scheduler support improves the CPU scheduler's decision
1334 making when dealing with multi-core CPU chips at a cost of slightly
1335 increased overhead in some places. If unsure say N here.
1336
1337config SCHED_SMT
1338 bool "SMT scheduler support"
1339 depends on ARM_CPU_TOPOLOGY
1340 help
1341 Improves the CPU scheduler's decision making when dealing with
1342 MultiThreading at a cost of slightly increased overhead in some
1343 places. If unsure say N here.
1344
Russell Kinga8cbcd92009-05-16 11:51:14 +01001345config HAVE_ARM_SCU
1346 bool
Russell Kinga8cbcd92009-05-16 11:51:14 +01001347 help
1348 This option enables support for the ARM system coherency unit
1349
Mark Rutland8a4da6e2012-11-12 14:33:44 +00001350config HAVE_ARM_ARCH_TIMER
Marc Zyngier022c03a2012-01-11 17:25:17 +00001351 bool "Architected timer support"
1352 depends on CPU_V7
Mark Rutland8a4da6e2012-11-12 14:33:44 +00001353 select ARM_ARCH_TIMER
Will Deacon0c4034622013-11-19 15:46:17 +01001354 select GENERIC_CLOCKEVENTS
Marc Zyngier022c03a2012-01-11 17:25:17 +00001355 help
1356 This option enables support for the ARM architected timer
1357
Russell Kingf32f4ce2009-05-16 12:14:21 +01001358config HAVE_ARM_TWD
1359 bool
Rob Herringda4a6862013-02-06 21:17:47 -06001360 select CLKSRC_OF if OF
Russell Kingf32f4ce2009-05-16 12:14:21 +01001361 help
1362 This options enables support for the ARM timer and watchdog unit
1363
Nicolas Pitree8db2882012-04-12 02:45:22 -04001364config MCPM
1365 bool "Multi-Cluster Power Management"
1366 depends on CPU_V7 && SMP
1367 help
1368 This option provides the common power management infrastructure
1369 for (multi-)cluster based systems, such as big.LITTLE based
1370 systems.
1371
Haojian Zhuangebf4a5c2014-04-15 14:52:00 +08001372config MCPM_QUAD_CLUSTER
1373 bool
1374 depends on MCPM
1375 help
1376 To avoid wasting resources unnecessarily, MCPM only supports up
1377 to 2 clusters by default.
1378 Platforms with 3 or 4 clusters that use MCPM must select this
1379 option to allow the additional clusters to be managed.
1380
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001381config BIG_LITTLE
1382 bool "big.LITTLE support (Experimental)"
1383 depends on CPU_V7 && SMP
1384 select MCPM
1385 help
1386 This option enables support selections for the big.LITTLE
1387 system architecture.
1388
1389config BL_SWITCHER
1390 bool "big.LITTLE switcher support"
Arnd Bergmann6c044fe2015-11-19 15:49:23 +01001391 depends on BIG_LITTLE && MCPM && HOTPLUG_CPU && ARM_GIC
Russell King51aaf812014-04-22 22:26:27 +01001392 select CPU_PM
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001393 help
1394 The big.LITTLE "switcher" provides the core functionality to
1395 transparently handle transition between a cluster of A15's
1396 and a cluster of A7's in a big.LITTLE system.
1397
Nicolas Pitreb22537c2012-04-12 03:04:28 -04001398config BL_SWITCHER_DUMMY_IF
1399 tristate "Simple big.LITTLE switcher user interface"
1400 depends on BL_SWITCHER && DEBUG_KERNEL
1401 help
1402 This is a simple and dummy char dev interface to control
1403 the big.LITTLE switcher core code. It is meant for
1404 debugging purposes only.
1405
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001406choice
1407 prompt "Memory split"
Russell King006fa252014-02-26 19:40:46 +00001408 depends on MMU
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001409 default VMSPLIT_3G
1410 help
1411 Select the desired split between kernel and user memory.
1412
1413 If you are not absolutely sure what you are doing, leave this
1414 option alone!
1415
1416 config VMSPLIT_3G
1417 bool "3G/1G user/kernel split"
Nicolas Pitre63ce4462015-09-13 03:30:11 +01001418 config VMSPLIT_3G_OPT
1419 bool "3G/1G user/kernel split (for full 1G low memory)"
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001420 config VMSPLIT_2G
1421 bool "2G/2G user/kernel split"
1422 config VMSPLIT_1G
1423 bool "1G/3G user/kernel split"
1424endchoice
1425
1426config PAGE_OFFSET
1427 hex
Russell King006fa252014-02-26 19:40:46 +00001428 default PHYS_OFFSET if !MMU
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001429 default 0x40000000 if VMSPLIT_1G
1430 default 0x80000000 if VMSPLIT_2G
Nicolas Pitre63ce4462015-09-13 03:30:11 +01001431 default 0xB0000000 if VMSPLIT_3G_OPT
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001432 default 0xC0000000
1433
Linus Torvalds1da177e2005-04-16 15:20:36 -07001434config NR_CPUS
1435 int "Maximum number of CPUs (2-32)"
1436 range 2 32
1437 depends on SMP
1438 default "4"
1439
Russell Kinga054a812005-11-02 22:24:33 +00001440config HOTPLUG_CPU
Russell King00b7ded2012-10-22 22:54:30 +01001441 bool "Support for hot-pluggable CPUs"
Stephen Rothwell40b31362013-05-21 13:49:35 +10001442 depends on SMP
Russell Kinga054a812005-11-02 22:24:33 +00001443 help
1444 Say Y here to experiment with turning CPUs off and on. CPUs
1445 can be controlled through /sys/devices/system/cpu.
1446
Will Deacon2bdd4242012-12-12 19:20:52 +00001447config ARM_PSCI
1448 bool "Support for the ARM Power State Coordination Interface (PSCI)"
Jens Wiklandere6796602016-01-04 15:46:47 +01001449 depends on HAVE_ARM_SMCCC
Mark Rutlandbe120392015-07-31 15:46:19 +01001450 select ARM_PSCI_FW
Will Deacon2bdd4242012-12-12 19:20:52 +00001451 help
1452 Say Y here if you want Linux to communicate with system firmware
1453 implementing the PSCI specification for CPU-centric power
1454 management operations described in ARM document number ARM DEN
1455 0022A ("Power State Coordination Interface System Software on
1456 ARM processors").
1457
Maxime Ripard2a6ad872013-02-03 12:24:48 +01001458# The GPIO number here must be sorted by descending number. In case of
1459# a multiplatform kernel, we just want the highest value required by the
1460# selected platforms.
Peter De Schrijver (NVIDIA)44986ab2011-12-21 10:48:45 +01001461config ARCH_NR_GPIO
1462 int
Gregory Fongb35d2e52015-05-28 19:14:10 -07001463 default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \
1464 ARCH_ZYNQ
Tomasz Figaaa425872014-07-03 13:17:12 +02001465 default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
1466 SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
Boris BREZILLONeb171a92014-04-10 15:52:46 +02001467 default 416 if ARCH_SUNXI
Olof Johansson06b851e2013-04-02 18:33:58 -07001468 default 392 if ARCH_U8500
Tony Prisk01bb9142013-03-09 18:22:30 +13001469 default 352 if ARCH_VT8500
Heiko Stuebner7b5da4c2014-05-26 00:13:51 +02001470 default 288 if ARCH_ROCKCHIP
Maxime Ripard2a6ad872013-02-03 12:24:48 +01001471 default 264 if MACH_H4700
Peter De Schrijver (NVIDIA)44986ab2011-12-21 10:48:45 +01001472 default 0
1473 help
1474 Maximum number of GPIOs in the system.
1475
1476 If unsure, leave the default value.
1477
Uwe Kleine-Königd45a3982009-08-13 20:38:17 +02001478source kernel/Kconfig.preempt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001479
Russell Kingc9218b12013-04-27 23:31:10 +01001480config HZ_FIXED
Russell Kingf8065812006-03-02 22:41:59 +00001481 int
Krzysztof Kozlowskida6b21e2016-11-18 13:15:12 +02001482 default 200 if ARCH_EBSA110
Alexandre Belloni1164f672015-03-13 22:57:24 +01001483 default 128 if SOC_AT91RM9200
Russell King47d84682013-09-10 23:47:55 +01001484 default 0
Russell Kingc9218b12013-04-27 23:31:10 +01001485
1486choice
Russell King47d84682013-09-10 23:47:55 +01001487 depends on HZ_FIXED = 0
Russell Kingc9218b12013-04-27 23:31:10 +01001488 prompt "Timer frequency"
1489
1490config HZ_100
1491 bool "100 Hz"
1492
1493config HZ_200
1494 bool "200 Hz"
1495
1496config HZ_250
1497 bool "250 Hz"
1498
1499config HZ_300
1500 bool "300 Hz"
1501
1502config HZ_500
1503 bool "500 Hz"
1504
1505config HZ_1000
1506 bool "1000 Hz"
1507
1508endchoice
1509
1510config HZ
1511 int
Russell King47d84682013-09-10 23:47:55 +01001512 default HZ_FIXED if HZ_FIXED != 0
Russell Kingc9218b12013-04-27 23:31:10 +01001513 default 100 if HZ_100
1514 default 200 if HZ_200
1515 default 250 if HZ_250
1516 default 300 if HZ_300
1517 default 500 if HZ_500
1518 default 1000
1519
1520config SCHED_HRTICK
1521 def_bool HIGH_RES_TIMERS
Russell Kingf8065812006-03-02 22:41:59 +00001522
Catalin Marinas16c79652009-07-24 12:33:02 +01001523config THUMB2_KERNEL
Uwe Kleine-Königbc7dea02011-12-09 20:52:10 +01001524 bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
Uwe Kleine-König4477ca42013-03-21 21:02:37 +01001525 depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
Uwe Kleine-Königbc7dea02011-12-09 20:52:10 +01001526 default y if CPU_THUMBONLY
Catalin Marinas16c79652009-07-24 12:33:02 +01001527 select AEABI
1528 select ARM_ASM_UNIFIED
Arnd Bergmann89bace62011-06-10 14:12:21 +00001529 select ARM_UNWIND
Catalin Marinas16c79652009-07-24 12:33:02 +01001530 help
1531 By enabling this option, the kernel will be compiled in
1532 Thumb-2 mode. A compiler/assembler that understand the unified
1533 ARM-Thumb syntax is needed.
1534
1535 If unsure, say N.
1536
Dave Martin6f685c52011-03-03 11:41:12 +01001537config THUMB2_AVOID_R_ARM_THM_JUMP11
1538 bool "Work around buggy Thumb-2 short branch relocations in gas"
1539 depends on THUMB2_KERNEL && MODULES
1540 default y
1541 help
1542 Various binutils versions can resolve Thumb-2 branches to
1543 locally-defined, preemptible global symbols as short-range "b.n"
1544 branch instructions.
1545
1546 This is a problem, because there's no guarantee the final
1547 destination of the symbol, or any candidate locations for a
1548 trampoline, are within range of the branch. For this reason, the
1549 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1550 relocation in modules at all, and it makes little sense to add
1551 support.
1552
1553 The symptom is that the kernel fails with an "unsupported
1554 relocation" error when loading some modules.
1555
1556 Until fixed tools are available, passing
1557 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1558 code which hits this problem, at the cost of a bit of extra runtime
1559 stack usage in some cases.
1560
1561 The problem is described in more detail at:
1562 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1563
1564 Only Thumb-2 kernels are affected.
1565
1566 Unless you are sure your tools don't have this problem, say Y.
1567
Catalin Marinas0becb082009-07-24 12:32:53 +01001568config ARM_ASM_UNIFIED
1569 bool
1570
Nicolas Pitre42f25bd2015-12-12 02:49:21 +01001571config ARM_PATCH_IDIV
1572 bool "Runtime patch udiv/sdiv instructions into __aeabi_{u}idiv()"
1573 depends on CPU_32v7 && !XIP_KERNEL
1574 default y
1575 help
1576 The ARM compiler inserts calls to __aeabi_idiv() and
1577 __aeabi_uidiv() when it needs to perform division on signed
1578 and unsigned integers. Some v7 CPUs have support for the sdiv
1579 and udiv instructions that can be used to implement those
1580 functions.
1581
1582 Enabling this option allows the kernel to modify itself to
1583 replace the first two instructions of these library functions
1584 with the sdiv or udiv plus "bx lr" instructions when the CPU
1585 it is running on supports them. Typically this will be faster
1586 and less power intensive than running the original library
1587 code to do integer division.
1588
Nicolas Pitre704bdda2006-01-14 16:33:50 +00001589config AEABI
1590 bool "Use the ARM EABI to compile the kernel"
1591 help
1592 This option allows for the kernel to be compiled using the latest
1593 ARM ABI (aka EABI). This is only useful if you are using a user
1594 space environment that is also compiled with EABI.
1595
1596 Since there are major incompatibilities between the legacy ABI and
1597 EABI, especially with regard to structure member alignment, this
1598 option also changes the kernel syscall calling convention to
1599 disambiguate both ABIs and allow for backward compatibility support
1600 (selected with CONFIG_OABI_COMPAT).
1601
1602 To use this you need GCC version 4.0.0 or later.
1603
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001604config OABI_COMPAT
Russell Kinga73a3ff2006-02-08 21:09:55 +00001605 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
Kees Cookd6f94fa2013-01-16 18:53:14 -08001606 depends on AEABI && !THUMB2_KERNEL
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001607 help
1608 This option preserves the old syscall interface along with the
1609 new (ARM EABI) one. It also provides a compatibility layer to
1610 intercept syscalls that have structure arguments which layout
1611 in memory differs between the legacy ABI and the new ARM EABI
1612 (only for non "thumb" binaries). This option adds a tiny
1613 overhead to all syscalls and produces a slightly larger kernel.
Kees Cook91702172013-11-09 00:51:56 +01001614
1615 The seccomp filter system will not be available when this is
1616 selected, since there is no way yet to sensibly distinguish
1617 between calling conventions during filtering.
1618
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001619 If you know you'll be using only pure EABI user space then you
1620 can say N here. If this option is not selected and you attempt
1621 to execute a legacy ABI binary then the result will be
1622 UNPREDICTABLE (in fact it can be predicted that it won't work
Kees Cookb02f8462013-11-09 00:31:11 +01001623 at all). If in doubt say N.
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001624
Mel Gormaneb335752009-05-13 17:34:48 +01001625config ARCH_HAS_HOLES_MEMORYMODEL
Mel Gormane80d6a22008-08-14 11:10:14 +01001626 bool
Mel Gormane80d6a22008-08-14 11:10:14 +01001627
Russell King05944d72006-11-30 20:43:51 +00001628config ARCH_SPARSEMEM_ENABLE
1629 bool
1630
Russell King07a2f732008-10-01 21:39:58 +01001631config ARCH_SPARSEMEM_DEFAULT
1632 def_bool ARCH_SPARSEMEM_ENABLE
1633
Russell King05944d72006-11-30 20:43:51 +00001634config ARCH_SELECT_MEMORY_MODEL
Russell Kingbe370302010-05-07 17:40:33 +01001635 def_bool ARCH_SPARSEMEM_ENABLE
Yasunori Gotoc80d79d2006-04-10 22:53:53 -07001636
Will Deacon7b7bf492011-05-19 13:21:14 +01001637config HAVE_ARCH_PFN_VALID
1638 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1639
Steve Capperb8cd51a2014-10-09 15:29:20 -07001640config HAVE_GENERIC_RCU_GUP
1641 def_bool y
1642 depends on ARM_LPAE
1643
Nicolas Pitre053a96c2008-09-19 00:36:12 -04001644config HIGHMEM
Russell Kinge8db89a2011-05-12 09:53:05 +01001645 bool "High Memory Support"
1646 depends on MMU
Nicolas Pitre053a96c2008-09-19 00:36:12 -04001647 help
1648 The address space of ARM processors is only 4 Gigabytes large
1649 and it has to accommodate user address space, kernel address
1650 space as well as some memory mapped IO. That means that, if you
1651 have a large amount of physical memory and/or IO, not all of the
1652 memory can be "permanently mapped" by the kernel. The physical
1653 memory that is not permanently mapped is called "high memory".
1654
1655 Depending on the selected kernel/user memory split, minimum
1656 vmalloc space and actual amount of RAM, you may not need this
1657 option which should result in a slightly faster kernel.
1658
1659 If unsure, say n.
1660
Russell King65cec8e2009-08-17 20:02:06 +01001661config HIGHPTE
Russell King9a431bd2015-06-25 10:44:08 +01001662 bool "Allocate 2nd-level pagetables from highmem" if EXPERT
Russell King65cec8e2009-08-17 20:02:06 +01001663 depends on HIGHMEM
Russell King9a431bd2015-06-25 10:44:08 +01001664 default y
Russell Kingb4d103d2015-06-25 10:49:45 +01001665 help
1666 The VM uses one page of physical memory for each page table.
1667 For systems with a lot of processes, this can use a lot of
1668 precious low memory, eventually leading to low memory being
1669 consumed by page tables. Setting this option will allow
1670 user-space 2nd level page tables to reside in high memory.
Russell King65cec8e2009-08-17 20:02:06 +01001671
Russell Kinga5e090a2015-08-19 20:40:41 +01001672config CPU_SW_DOMAIN_PAN
1673 bool "Enable use of CPU domains to implement privileged no-access"
1674 depends on MMU && !ARM_LPAE
Jamie Iles1b8873a2010-02-02 20:25:44 +01001675 default y
1676 help
Russell Kinga5e090a2015-08-19 20:40:41 +01001677 Increase kernel security by ensuring that normal kernel accesses
1678 are unable to access userspace addresses. This can help prevent
1679 use-after-free bugs becoming an exploitable privilege escalation
1680 by ensuring that magic values (such as LIST_POISON) will always
1681 fault when dereferenced.
1682
1683 CPUs with low-vector mappings use a best-efforts implementation.
1684 Their lower 1MB needs to remain accessible for the vectors, but
1685 the remainder of userspace will become appropriately inaccessible.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001686
1687config HW_PERF_EVENTS
Mark Rutlandfa8ad782015-07-06 12:23:53 +01001688 def_bool y
1689 depends on ARM_PMU
Jamie Iles1b8873a2010-02-02 20:25:44 +01001690
Catalin Marinas1355e2a2012-07-25 14:32:38 +01001691config SYS_SUPPORTS_HUGETLBFS
1692 def_bool y
1693 depends on ARM_LPAE
1694
Catalin Marinas8d962502012-07-25 14:39:26 +01001695config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1696 def_bool y
1697 depends on ARM_LPAE
1698
Steven Capper4bfab202013-07-26 14:58:22 +01001699config ARCH_WANT_GENERAL_HUGETLB
1700 def_bool y
1701
Ard Biesheuvel7d485f62014-11-24 16:54:35 +01001702config ARM_MODULE_PLTS
1703 bool "Use PLTs to allow module memory to spill over into vmalloc area"
1704 depends on MODULES
1705 help
1706 Allocate PLTs when loading modules so that jumps and calls whose
1707 targets are too far away for their relative offsets to be encoded
1708 in the instructions themselves can be bounced via veneers in the
1709 module's PLT. This allows modules to be allocated in the generic
1710 vmalloc area after the dedicated module memory area has been
1711 exhausted. The modules will use slightly more memory, but after
1712 rounding up to page size, the actual memory footprint is usually
1713 the same.
1714
1715 Say y if you are getting out of memory errors while loading modules
1716
Linus Torvalds1da177e2005-04-16 15:20:36 -07001717source "mm/Kconfig"
1718
Magnus Dammc1b2d972010-07-05 10:00:11 +01001719config FORCE_MAX_ZONEORDER
Ulrich Hecht36d6c922015-08-14 15:51:06 +02001720 int "Maximum zone order"
Yegor Yefremov898f08e2012-10-08 14:37:53 -07001721 default "12" if SOC_AM33XX
Uwe Kleine-König6d85e2b2011-11-17 14:36:23 +01001722 default "9" if SA1111 || ARCH_EFM32
Magnus Dammc1b2d972010-07-05 10:00:11 +01001723 default "11"
1724 help
1725 The kernel memory allocator divides physically contiguous memory
1726 blocks into "zones", where each zone is a power of two number of
1727 pages. This option selects the largest power of two that the kernel
1728 keeps in the memory allocator. If you need to allocate very large
1729 blocks of physically contiguous memory, then you may need to
1730 increase this value.
1731
1732 This config option is actually maximum order plus one. For example,
1733 a value of 11 means that the largest free memory block is 2^10 pages.
1734
Linus Torvalds1da177e2005-04-16 15:20:36 -07001735config ALIGNMENT_TRAP
1736 bool
Hyok S. Choif12d0d72006-09-26 17:36:37 +09001737 depends on CPU_CP15_MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -07001738 default y if !ARCH_EBSA110
Russell Kinge119bff2010-01-10 17:23:29 +00001739 select HAVE_PROC_CPU if PROC_FS
Linus Torvalds1da177e2005-04-16 15:20:36 -07001740 help
Matt LaPlante84eb8d02006-10-03 22:53:09 +02001741 ARM processors cannot fetch/store information which is not
Linus Torvalds1da177e2005-04-16 15:20:36 -07001742 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1743 address divisible by 4. On 32-bit ARM processors, these non-aligned
1744 fetch/store instructions will be emulated in software if you say
1745 here, which has a severe performance impact. This is necessary for
1746 correct operation of some network protocols. With an IP-only
1747 configuration it is safe to say N, otherwise say Y.
1748
Lennert Buytenhek39ec58f2009-03-09 14:30:09 -04001749config UACCESS_WITH_MEMCPY
Linus Walleij38ef2ad2012-09-10 16:36:37 +01001750 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1751 depends on MMU
Lennert Buytenhek39ec58f2009-03-09 14:30:09 -04001752 default y if CPU_FEROCEON
1753 help
1754 Implement faster copy_to_user and clear_user methods for CPU
1755 cores where a 8-word STM instruction give significantly higher
1756 memory write throughput than a sequence of individual 32bit stores.
1757
1758 A possible side effect is a slight increase in scheduling latency
1759 between threads sharing the same address space if they invoke
1760 such copy operations with large buffers.
1761
1762 However, if the CPU data cache is using a write-allocate mode,
1763 this option is unlikely to provide any performance gain.
1764
Nicolas Pitre70c70d92010-08-26 15:08:35 -07001765config SECCOMP
1766 bool
1767 prompt "Enable seccomp to safely compute untrusted bytecode"
1768 ---help---
1769 This kernel feature is useful for number crunching applications
1770 that may need to compute untrusted bytecode during their
1771 execution. By using pipes or other transports made available to
1772 the process as file descriptors supporting the read/write
1773 syscalls, it's possible to isolate those applications in
1774 their own address space using seccomp. Once seccomp is
1775 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1776 and the task is only allowed to execute a few safe syscalls
1777 defined by each seccomp mode.
1778
Stefano Stabellini06e62952013-10-15 15:47:14 +00001779config SWIOTLB
1780 def_bool y
1781
1782config IOMMU_HELPER
1783 def_bool SWIOTLB
1784
Stefano Stabellini02c24332015-11-23 10:32:57 +00001785config PARAVIRT
1786 bool "Enable paravirtualization code"
1787 help
1788 This changes the kernel so it can modify itself when it is run
1789 under a hypervisor, potentially improving performance significantly
1790 over full virtualization.
1791
1792config PARAVIRT_TIME_ACCOUNTING
1793 bool "Paravirtual steal time accounting"
1794 select PARAVIRT
1795 default n
1796 help
1797 Select this option to enable fine granularity task steal time
1798 accounting. Time spent executing other tasks in parallel with
1799 the current vCPU is discounted from the vCPU power. To account for
1800 that, there can be a small performance impact.
1801
1802 If in doubt, say N here.
1803
Stefano Stabellinieff8d642012-09-17 14:58:17 +00001804config XEN_DOM0
1805 def_bool y
1806 depends on XEN
1807
1808config XEN
Julien Grallc2ba1f72014-09-17 14:07:06 -07001809 bool "Xen guest support on ARM"
Ian Campbell85323a92013-03-07 07:17:25 +00001810 depends on ARM && AEABI && OF
Arnd Bergmannf880b672012-10-09 10:33:52 +00001811 depends on CPU_V7 && !CPU_V6
Ian Campbell85323a92013-03-07 07:17:25 +00001812 depends on !GENERIC_ATOMIC64
Uwe Kleine-König7693dec2014-03-03 09:25:52 -05001813 depends on MMU
Russell King51aaf812014-04-22 22:26:27 +01001814 select ARCH_DMA_ADDR_T_64BIT
Stefano Stabellini17b7ab82013-04-24 18:47:18 +00001815 select ARM_PSCI
Stefano Stabellini83862cc2013-10-10 13:40:44 +00001816 select SWIOTLB_XEN
Stefano Stabellini02c24332015-11-23 10:32:57 +00001817 select PARAVIRT
Stefano Stabellinieff8d642012-09-17 14:58:17 +00001818 help
1819 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1820
Linus Torvalds1da177e2005-04-16 15:20:36 -07001821endmenu
1822
1823menu "Boot options"
1824
Grant Likely9eb8f672011-04-28 14:27:20 -06001825config USE_OF
1826 bool "Flattened Device Tree support"
Russell Kingb1b3f492012-10-06 17:12:25 +01001827 select IRQ_DOMAIN
Grant Likely9eb8f672011-04-28 14:27:20 -06001828 select OF
Grant Likely9eb8f672011-04-28 14:27:20 -06001829 help
1830 Include support for flattened device tree machine descriptions.
1831
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001832config ATAGS
1833 bool "Support for the traditional ATAGS boot data passing" if USE_OF
1834 default y
1835 help
1836 This is the traditional way of passing data to the kernel at boot
1837 time. If you are solely relying on the flattened device tree (or
1838 the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1839 to remove ATAGS support from your kernel binary. If unsure,
1840 leave this to y.
1841
1842config DEPRECATED_PARAM_STRUCT
1843 bool "Provide old way to pass kernel parameters"
1844 depends on ATAGS
1845 help
1846 This was deprecated in 2001 and announced to live on for 5 years.
1847 Some old boot loaders still use this way.
1848
Linus Torvalds1da177e2005-04-16 15:20:36 -07001849# Compressed boot loader in ROM. Yes, we really want to ask about
1850# TEXT and BSS so we preserve their values in the config files.
1851config ZBOOT_ROM_TEXT
1852 hex "Compressed ROM boot loader base address"
1853 default "0"
1854 help
1855 The physical address at which the ROM-able zImage is to be
1856 placed in the target. Platforms which normally make use of
1857 ROM-able zImage formats normally set this to a suitable
1858 value in their defconfig file.
1859
1860 If ZBOOT_ROM is not enabled, this has no effect.
1861
1862config ZBOOT_ROM_BSS
1863 hex "Compressed ROM boot loader BSS address"
1864 default "0"
1865 help
Dan Fandrichf8c440b2006-09-20 23:28:51 +01001866 The base address of an area of read/write memory in the target
1867 for the ROM-able zImage which must be available while the
1868 decompressor is running. It must be large enough to hold the
1869 entire decompressed kernel plus an additional 128 KiB.
1870 Platforms which normally make use of ROM-able zImage formats
1871 normally set this to a suitable value in their defconfig file.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001872
1873 If ZBOOT_ROM is not enabled, this has no effect.
1874
1875config ZBOOT_ROM
1876 bool "Compressed boot loader in ROM/flash"
1877 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
Russell King10968132014-01-01 11:59:44 +00001878 depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
Linus Torvalds1da177e2005-04-16 15:20:36 -07001879 help
1880 Say Y here if you intend to execute your compressed kernel image
1881 (zImage) directly from ROM or flash. If unsure, say N.
1882
John Bonesioe2a6a3a2011-05-27 18:45:50 -04001883config ARM_APPENDED_DTB
1884 bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
Russell King10968132014-01-01 11:59:44 +00001885 depends on OF
John Bonesioe2a6a3a2011-05-27 18:45:50 -04001886 help
1887 With this option, the boot code will look for a device tree binary
1888 (DTB) appended to zImage
1889 (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1890
1891 This is meant as a backward compatibility convenience for those
1892 systems with a bootloader that can't be upgraded to accommodate
1893 the documented boot protocol using a device tree.
1894
1895 Beware that there is very little in terms of protection against
1896 this option being confused by leftover garbage in memory that might
1897 look like a DTB header after a reboot if no actual DTB is appended
1898 to zImage. Do not leave this option active in a production kernel
1899 if you don't intend to always append a DTB. Proper passing of the
1900 location into r2 of a bootloader provided DTB is always preferable
1901 to this option.
1902
Nicolas Pitreb90b9a32011-09-13 22:37:07 -04001903config ARM_ATAG_DTB_COMPAT
1904 bool "Supplement the appended DTB with traditional ATAG information"
1905 depends on ARM_APPENDED_DTB
1906 help
1907 Some old bootloaders can't be updated to a DTB capable one, yet
1908 they provide ATAGs with memory configuration, the ramdisk address,
1909 the kernel cmdline string, etc. Such information is dynamically
1910 provided by the bootloader and can't always be stored in a static
1911 DTB. To allow a device tree enabled kernel to be used with such
1912 bootloaders, this option allows zImage to extract the information
1913 from the ATAG list and store it at run time into the appended DTB.
1914
Genoud Richardd0f34a12012-06-26 16:37:59 +01001915choice
1916 prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1917 default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1918
1919config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1920 bool "Use bootloader kernel arguments if available"
1921 help
1922 Uses the command-line options passed by the boot loader instead of
1923 the device tree bootargs property. If the boot loader doesn't provide
1924 any, the device tree bootargs property will be used.
1925
1926config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1927 bool "Extend with bootloader kernel arguments"
1928 help
1929 The command-line arguments provided by the boot loader will be
1930 appended to the the device tree bootargs property.
1931
1932endchoice
1933
Linus Torvalds1da177e2005-04-16 15:20:36 -07001934config CMDLINE
1935 string "Default kernel command string"
1936 default ""
1937 help
1938 On some architectures (EBSA110 and CATS), there is currently no way
1939 for the boot loader to pass arguments to the kernel. For these
1940 architectures, you should supply some command-line options at build
1941 time by entering them here. As a minimum, you should specify the
1942 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1943
Victor Boivie4394c122011-05-04 17:07:55 +01001944choice
1945 prompt "Kernel command line type" if CMDLINE != ""
1946 default CMDLINE_FROM_BOOTLOADER
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001947 depends on ATAGS
Victor Boivie4394c122011-05-04 17:07:55 +01001948
1949config CMDLINE_FROM_BOOTLOADER
1950 bool "Use bootloader kernel arguments if available"
1951 help
1952 Uses the command-line options passed by the boot loader. If
1953 the boot loader doesn't provide any, the default kernel command
1954 string provided in CMDLINE will be used.
1955
1956config CMDLINE_EXTEND
1957 bool "Extend bootloader kernel arguments"
1958 help
1959 The command-line arguments provided by the boot loader will be
1960 appended to the default kernel command string.
1961
Alexander Holler92d20402010-02-16 19:04:53 +01001962config CMDLINE_FORCE
1963 bool "Always use the default kernel command string"
Alexander Holler92d20402010-02-16 19:04:53 +01001964 help
1965 Always use the default kernel command string, even if the boot
1966 loader passes other arguments to the kernel.
1967 This is useful if you cannot or don't want to change the
1968 command-line options your boot loader passes to the kernel.
Victor Boivie4394c122011-05-04 17:07:55 +01001969endchoice
Alexander Holler92d20402010-02-16 19:04:53 +01001970
Linus Torvalds1da177e2005-04-16 15:20:36 -07001971config XIP_KERNEL
1972 bool "Kernel Execute-In-Place from ROM"
Russell King10968132014-01-01 11:59:44 +00001973 depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
Linus Torvalds1da177e2005-04-16 15:20:36 -07001974 help
1975 Execute-In-Place allows the kernel to run from non-volatile storage
1976 directly addressable by the CPU, such as NOR flash. This saves RAM
1977 space since the text section of the kernel is not loaded from flash
1978 to RAM. Read-write sections, such as the data section and stack,
1979 are still copied to RAM. The XIP kernel is not compressed since
1980 it has to run directly from flash, so it will take more space to
1981 store it. The flash address used to link the kernel object files,
1982 and for storing it, is configuration dependent. Therefore, if you
1983 say Y here, you must know the proper physical address where to
1984 store the kernel image depending on your own flash memory usage.
1985
1986 Also note that the make target becomes "make xipImage" rather than
1987 "make zImage" or "make Image". The final kernel binary to put in
1988 ROM memory will be arch/arm/boot/xipImage.
1989
1990 If unsure, say N.
1991
1992config XIP_PHYS_ADDR
1993 hex "XIP Kernel Physical Location"
1994 depends on XIP_KERNEL
1995 default "0x00080000"
1996 help
1997 This is the physical address in your flash memory the kernel will
1998 be linked for and stored to. This address is dependent on your
1999 own flash usage.
2000
Richard Purdiec587e4a2007-02-06 21:29:00 +01002001config KEXEC
2002 bool "Kexec system call (EXPERIMENTAL)"
Stephen Warren19ab4282013-06-14 16:14:14 +01002003 depends on (!SMP || PM_SLEEP_SMP)
Arnd Bergmanncb1293e2015-05-26 15:40:44 +01002004 depends on !CPU_V7M
Dave Young2965faa2015-09-09 15:38:55 -07002005 select KEXEC_CORE
Richard Purdiec587e4a2007-02-06 21:29:00 +01002006 help
2007 kexec is a system call that implements the ability to shutdown your
2008 current kernel, and to start another kernel. It is like a reboot
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02002009 but it is independent of the system firmware. And like a reboot
Richard Purdiec587e4a2007-02-06 21:29:00 +01002010 you can start any kernel with it, not just Linux.
2011
2012 It is an ongoing process to be certain the hardware in a machine
2013 is properly shutdown, so do not be surprised if this code does not
Geert Uytterhoevenbf220692013-08-20 21:38:03 +02002014 initially work for you.
Richard Purdiec587e4a2007-02-06 21:29:00 +01002015
Richard Purdie4cd9d6f2008-01-02 00:56:46 +01002016config ATAGS_PROC
2017 bool "Export atags in procfs"
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01002018 depends on ATAGS && KEXEC
Uli Luckasb98d7292008-02-22 16:45:18 +01002019 default y
Richard Purdie4cd9d6f2008-01-02 00:56:46 +01002020 help
2021 Should the atags used to boot the kernel be exported in an "atags"
2022 file in procfs. Useful with kexec.
2023
Mika Westerbergcb5d39b2010-11-18 19:14:52 +01002024config CRASH_DUMP
2025 bool "Build kdump crash kernel (EXPERIMENTAL)"
Mika Westerbergcb5d39b2010-11-18 19:14:52 +01002026 help
2027 Generate crash dump after being started by kexec. This should
2028 be normally only set in special crash dump kernels which are
2029 loaded in the main kernel with kexec-tools into a specially
2030 reserved region and then later executed after a crash by
2031 kdump/kexec. The crash dump kernel must be compiled to a
2032 memory address not used by the main kernel
2033
2034 For more details see Documentation/kdump/kdump.txt
2035
Eric Miaoe69edc792010-07-05 15:56:50 +02002036config AUTO_ZRELADDR
2037 bool "Auto calculation of the decompressed kernel image address"
Eric Miaoe69edc792010-07-05 15:56:50 +02002038 help
2039 ZRELADDR is the physical address where the decompressed kernel
2040 image will be placed. If AUTO_ZRELADDR is selected, the address
2041 will be determined at run-time by masking the current IP with
2042 0xf8000000. This assumes the zImage being placed in the first 128MB
2043 from start of memory.
2044
Roy Franz81a0bc32015-09-23 20:17:54 -07002045config EFI_STUB
2046 bool
2047
2048config EFI
2049 bool "UEFI runtime support"
2050 depends on OF && !CPU_BIG_ENDIAN && MMU && AUTO_ZRELADDR && !XIP_KERNEL
2051 select UCS2_STRING
2052 select EFI_PARAMS_FROM_FDT
2053 select EFI_STUB
2054 select EFI_ARMSTUB
2055 select EFI_RUNTIME_WRAPPERS
2056 ---help---
2057 This option provides support for runtime services provided
2058 by UEFI firmware (such as non-volatile variables, realtime
2059 clock, and platform reset). A UEFI stub is also provided to
2060 allow the kernel to be booted as an EFI application. This
2061 is only useful for kernels that may run on systems that have
2062 UEFI firmware.
2063
Linus Torvalds1da177e2005-04-16 15:20:36 -07002064endmenu
2065
Russell Kingac9d7ef2008-08-18 17:26:00 +01002066menu "CPU Power Management"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002067
Linus Torvalds1da177e2005-04-16 15:20:36 -07002068source "drivers/cpufreq/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002069
Russell Kingac9d7ef2008-08-18 17:26:00 +01002070source "drivers/cpuidle/Kconfig"
2071
2072endmenu
2073
Linus Torvalds1da177e2005-04-16 15:20:36 -07002074menu "Floating point emulation"
2075
2076comment "At least one emulation must be selected"
2077
2078config FPE_NWFPE
2079 bool "NWFPE math emulation"
Dave Martin593c2522010-12-13 21:56:03 +01002080 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
Linus Torvalds1da177e2005-04-16 15:20:36 -07002081 ---help---
2082 Say Y to include the NWFPE floating point emulator in the kernel.
2083 This is necessary to run most binaries. Linux does not currently
2084 support floating point hardware so you need to say Y here even if
2085 your machine has an FPA or floating point co-processor podule.
2086
2087 You may say N here if you are going to load the Acorn FPEmulator
2088 early in the bootup.
2089
2090config FPE_NWFPE_XP
2091 bool "Support extended precision"
Lennert Buytenhekbedf1422005-11-07 21:12:08 +00002092 depends on FPE_NWFPE
Linus Torvalds1da177e2005-04-16 15:20:36 -07002093 help
2094 Say Y to include 80-bit support in the kernel floating-point
2095 emulator. Otherwise, only 32 and 64-bit support is compiled in.
2096 Note that gcc does not generate 80-bit operations by default,
2097 so in most cases this option only enlarges the size of the
2098 floating point emulator without any good reason.
2099
2100 You almost surely want to say N here.
2101
2102config FPE_FASTFPE
2103 bool "FastFPE math emulation (EXPERIMENTAL)"
Kees Cookd6f94fa2013-01-16 18:53:14 -08002104 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
Linus Torvalds1da177e2005-04-16 15:20:36 -07002105 ---help---
2106 Say Y here to include the FAST floating point emulator in the kernel.
2107 This is an experimental much faster emulator which now also has full
2108 precision for the mantissa. It does not support any exceptions.
2109 It is very simple, and approximately 3-6 times faster than NWFPE.
2110
2111 It should be sufficient for most programs. It may be not suitable
2112 for scientific calculations, but you have to check this for yourself.
2113 If you do not feel you need a faster FP emulation you should better
2114 choose NWFPE.
2115
2116config VFP
2117 bool "VFP-format floating point maths"
Russell Kinge399b1a2011-01-17 15:08:32 +00002118 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
Linus Torvalds1da177e2005-04-16 15:20:36 -07002119 help
2120 Say Y to include VFP support code in the kernel. This is needed
2121 if your hardware includes a VFP unit.
2122
2123 Please see <file:Documentation/arm/VFP/release-notes.txt> for
2124 release notes and additional status information.
2125
2126 Say N if your target does not have VFP hardware.
2127
Catalin Marinas25ebee02007-09-25 15:22:24 +01002128config VFPv3
2129 bool
2130 depends on VFP
2131 default y if CPU_V7
2132
Catalin Marinasb5872db2008-01-10 19:16:17 +01002133config NEON
2134 bool "Advanced SIMD (NEON) Extension support"
2135 depends on VFPv3 && CPU_V7
2136 help
2137 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2138 Extension.
2139
Ard Biesheuvel73c132c2013-05-16 11:41:48 +02002140config KERNEL_MODE_NEON
2141 bool "Support for NEON in kernel mode"
Russell Kingc4a30c32013-09-22 11:08:50 +01002142 depends on NEON && AEABI
Ard Biesheuvel73c132c2013-05-16 11:41:48 +02002143 help
2144 Say Y to include support for NEON in kernel mode.
2145
Linus Torvalds1da177e2005-04-16 15:20:36 -07002146endmenu
2147
2148menu "Userspace binary formats"
2149
2150source "fs/Kconfig.binfmt"
2151
Linus Torvalds1da177e2005-04-16 15:20:36 -07002152endmenu
2153
2154menu "Power management options"
2155
Russell Kingeceab4a2005-11-15 11:31:41 +00002156source "kernel/power/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002157
Johannes Bergf4cb5702007-12-08 02:14:00 +01002158config ARCH_SUSPEND_POSSIBLE
Ezequiel Garcia19a05192013-08-16 10:28:24 +01002159 depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
Uwe Kleine-Königf0d75152012-02-01 10:00:00 +01002160 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
Johannes Bergf4cb5702007-12-08 02:14:00 +01002161 def_bool y
2162
Arnd Bergmann15e0d9e2011-10-01 21:09:39 +02002163config ARM_CPU_SUSPEND
Lorenzo Pieralisi8b6f2492016-02-01 18:01:30 +01002164 def_bool PM_SLEEP || BL_SWITCHER || ARM_PSCI_FW
Lorenzo Pieralisi1b9bdf52016-02-01 18:01:29 +01002165 depends on ARCH_SUSPEND_POSSIBLE
Arnd Bergmann15e0d9e2011-10-01 21:09:39 +02002166
Sebastian Capella603fb422014-03-25 01:20:29 +01002167config ARCH_HIBERNATION_POSSIBLE
2168 bool
2169 depends on MMU
2170 default y if ARCH_SUSPEND_POSSIBLE
2171
Linus Torvalds1da177e2005-04-16 15:20:36 -07002172endmenu
2173
Sam Ravnborgd5950b42005-07-11 21:03:49 -07002174source "net/Kconfig"
2175
Uwe Kleine-Königac251502009-08-13 21:09:21 +02002176source "drivers/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002177
Kumar Gala916f7432015-02-26 15:49:09 -06002178source "drivers/firmware/Kconfig"
2179
Linus Torvalds1da177e2005-04-16 15:20:36 -07002180source "fs/Kconfig"
2181
Linus Torvalds1da177e2005-04-16 15:20:36 -07002182source "arch/arm/Kconfig.debug"
2183
2184source "security/Kconfig"
2185
2186source "crypto/Kconfig"
Ard Biesheuvel652ccae2015-03-10 09:47:44 +01002187if CRYPTO
2188source "arch/arm/crypto/Kconfig"
2189endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07002190
2191source "lib/Kconfig"
Christoffer Dall749cf76c2013-01-20 18:28:06 -05002192
2193source "arch/arm/kvm/Kconfig"