blob: c7b578bb6d4e4d1e7dc007e58b03a47008100d8e [file] [log] [blame]
Srinivas Ramana3cac2782017-09-13 16:31:17 +05301/*
2 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include "skeleton64.dtsi"
15#include <dt-bindings/gpio/gpio.h>
Kiran Gunda0954f392017-10-16 16:24:55 +053016#include <dt-bindings/spmi/spmi.h>
Kiran Gundaaf6a0b62017-10-23 16:03:10 +053017#include <dt-bindings/interrupt-controller/arm-gic.h>
Kiran Gunda0954f392017-10-16 16:24:55 +053018#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
Srinivas Ramana3cac2782017-09-13 16:31:17 +053019
20/ {
21 model = "Qualcomm Technologies, Inc. MSM 8953";
22 compatible = "qcom,msm8953";
23 qcom,msm-id = <293 0x0>;
24 interrupt-parent = <&intc>;
25
26 chosen {
27 bootargs = "sched_enable_hmp=1 sched_enable_power_aware=1";
28 };
29
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
33 ranges;
34
35 other_ext_mem: other_ext_region@0 {
36 compatible = "removed-dma-pool";
37 no-map;
38 reg = <0x0 0x85b00000 0x0 0xd00000>;
39 };
40
41 modem_mem: modem_region@0 {
42 compatible = "removed-dma-pool";
43 no-map-fixup;
44 reg = <0x0 0x86c00000 0x0 0x6a00000>;
45 };
46
47 adsp_fw_mem: adsp_fw_region@0 {
48 compatible = "removed-dma-pool";
49 no-map;
50 reg = <0x0 0x8d600000 0x0 0x1100000>;
51 };
52
53 wcnss_fw_mem: wcnss_fw_region@0 {
54 compatible = "removed-dma-pool";
55 no-map;
56 reg = <0x0 0x8e700000 0x0 0x700000>;
57 };
58
59 venus_mem: venus_region@0 {
60 compatible = "shared-dma-pool";
61 reusable;
62 alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
63 alignment = <0 0x400000>;
64 size = <0 0x0800000>;
65 };
66
67 secure_mem: secure_region@0 {
68 compatible = "shared-dma-pool";
69 reusable;
70 alignment = <0 0x400000>;
71 size = <0 0x09800000>;
72 };
73
74 qseecom_mem: qseecom_region@0 {
75 compatible = "shared-dma-pool";
76 reusable;
77 alignment = <0 0x400000>;
78 size = <0 0x1000000>;
79 };
80
81 adsp_mem: adsp_region@0 {
82 compatible = "shared-dma-pool";
83 reusable;
84 size = <0 0x400000>;
85 };
86
87 dfps_data_mem: dfps_data_mem@90000000 {
88 reg = <0 0x90000000 0 0x1000>;
89 label = "dfps_data_mem";
90 };
91
92 cont_splash_mem: splash_region@0x90001000 {
93 reg = <0x0 0x90001000 0x0 0x13ff000>;
94 label = "cont_splash_mem";
95 };
96
97 gpu_mem: gpu_region@0 {
98 compatible = "shared-dma-pool";
99 reusable;
100 alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
101 alignment = <0 0x400000>;
102 size = <0 0x800000>;
103 };
104 };
105
106 aliases {
107 /* smdtty devices */
Arun Kumar Neelakantam36151aa2017-11-02 21:34:33 +0530108 smd1 = &smdtty_apps_fm;
109 smd2 = &smdtty_apps_riva_bt_acl;
110 smd3 = &smdtty_apps_riva_bt_cmd;
111 smd4 = &smdtty_mbalbridge;
112 smd5 = &smdtty_apps_riva_ant_cmd;
113 smd6 = &smdtty_apps_riva_ant_data;
114 smd7 = &smdtty_data1;
115 smd8 = &smdtty_data4;
116 smd11 = &smdtty_data11;
117 smd21 = &smdtty_data21;
118 smd36 = &smdtty_loopback;
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530119 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
120 sdhc2 = &sdhc_2; /* SDC2 for SD card */
121 };
122
123 soc: soc { };
124
125};
126
127#include "msm8953-pinctrl.dtsi"
128#include "msm8953-cpu.dtsi"
Raju P.L.S.S.S.Ne0b22c92017-11-02 13:42:27 +0530129#include "msm8953-pm.dtsi"
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530130
131
132&soc {
133 #address-cells = <1>;
134 #size-cells = <1>;
135 ranges = <0 0 0 0xffffffff>;
136 compatible = "simple-bus";
137
138 apc_apm: apm@b111000 {
139 compatible = "qcom,msm8953-apm";
140 reg = <0xb111000 0x1000>;
141 reg-names = "pm-apcc-glb";
142 qcom,apm-post-halt-delay = <0x2>;
143 qcom,apm-halt-clk-delay = <0x11>;
144 qcom,apm-resume-clk-delay = <0x10>;
145 qcom,apm-sel-switch-delay = <0x01>;
146 };
147
148 intc: interrupt-controller@b000000 {
149 compatible = "qcom,msm-qgic2";
150 interrupt-controller;
151 #interrupt-cells = <3>;
152 reg = <0x0b000000 0x1000>,
153 <0x0b002000 0x1000>;
154 };
155
156 qcom,msm-gladiator@b1c0000 {
157 compatible = "qcom,msm-gladiator";
158 reg = <0x0b1c0000 0x4000>;
159 reg-names = "gladiator_base";
160 interrupts = <0 22 0>;
161 };
162
163 timer {
164 compatible = "arm,armv8-timer";
165 interrupts = <1 2 0xff08>,
166 <1 3 0xff08>,
167 <1 4 0xff08>,
168 <1 1 0xff08>;
169 clock-frequency = <19200000>;
170 };
171
172 timer@b120000 {
173 #address-cells = <1>;
174 #size-cells = <1>;
175 ranges;
176 compatible = "arm,armv7-timer-mem";
177 reg = <0xb120000 0x1000>;
178 clock-frequency = <19200000>;
179
180 frame@b121000 {
181 frame-number = <0>;
182 interrupts = <0 8 0x4>,
183 <0 7 0x4>;
184 reg = <0xb121000 0x1000>,
185 <0xb122000 0x1000>;
186 };
187
188 frame@b123000 {
189 frame-number = <1>;
190 interrupts = <0 9 0x4>;
191 reg = <0xb123000 0x1000>;
192 status = "disabled";
193 };
194
195 frame@b124000 {
196 frame-number = <2>;
197 interrupts = <0 10 0x4>;
198 reg = <0xb124000 0x1000>;
199 status = "disabled";
200 };
201
202 frame@b125000 {
203 frame-number = <3>;
204 interrupts = <0 11 0x4>;
205 reg = <0xb125000 0x1000>;
206 status = "disabled";
207 };
208
209 frame@b126000 {
210 frame-number = <4>;
211 interrupts = <0 12 0x4>;
212 reg = <0xb126000 0x1000>;
213 status = "disabled";
214 };
215
216 frame@b127000 {
217 frame-number = <5>;
218 interrupts = <0 13 0x4>;
219 reg = <0xb127000 0x1000>;
220 status = "disabled";
221 };
222
223 frame@b128000 {
224 frame-number = <6>;
225 interrupts = <0 14 0x4>;
226 reg = <0xb128000 0x1000>;
227 status = "disabled";
228 };
229 };
230 qcom,rmtfs_sharedmem@00000000 {
231 compatible = "qcom,sharedmem-uio";
232 reg = <0x00000000 0x00180000>;
233 reg-names = "rmtfs";
234 qcom,client-id = <0x00000001>;
235 };
236
237 restart@4ab000 {
238 compatible = "qcom,pshold";
239 reg = <0x4ab000 0x4>,
240 <0x193d100 0x4>;
241 reg-names = "pshold-base", "tcsr-boot-misc-detect";
242 };
243
244 qcom,mpm2-sleep-counter@4a3000 {
245 compatible = "qcom,mpm2-sleep-counter";
246 reg = <0x4a3000 0x1000>;
247 clock-frequency = <32768>;
248 };
249
250 cpu-pmu {
251 compatible = "arm,armv8-pmuv3";
252 interrupts = <1 7 0xff00>;
253 };
254
255 qcom,sps {
256 compatible = "qcom,msm_sps_4k";
257 qcom,pipe-attr-ee;
258 };
259
260 blsp1_uart0: serial@78af000 {
261 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
262 reg = <0x78af000 0x200>;
263 interrupts = <0 107 0>;
264 status = "disabled";
265 };
266
267 dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */
268 #dma-cells = <4>;
269 compatible = "qcom,sps-dma";
270 reg = <0x7884000 0x1f000>;
271 interrupts = <0 238 0>;
272 qcom,summing-threshold = <10>;
273 };
274
275 dma_blsp2: qcom,sps-dma@7ac4000 { /* BLSP2 */
276 #dma-cells = <4>;
277 compatible = "qcom,sps-dma";
278 reg = <0x7ac4000 0x1f000>;
279 interrupts = <0 239 0>;
280 qcom,summing-threshold = <10>;
281 };
282
283 slim_msm: slim@c140000{
284 cell-index = <1>;
285 compatible = "qcom,slim-ngd";
286 reg = <0xc140000 0x2c000>,
287 <0xc104000 0x2a000>;
288 reg-names = "slimbus_physical", "slimbus_bam_physical";
289 interrupts = <0 163 0>, <0 180 0>;
290 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
291 qcom,apps-ch-pipes = <0x600000>;
292 qcom,ea-pc = <0x200>;
293 status = "disabled";
294 };
295
296 cpubw: qcom,cpubw {
297 compatible = "qcom,devbw";
298 governor = "cpufreq";
299 qcom,src-dst-ports = <1 512>;
300 qcom,active-only;
301 qcom,bw-tbl =
302 < 769 /* 100.8 MHz */ >,
303 < 1611 /* 211.2 MHz */ >, /*Low SVS*/
304 < 2124 /* 278.4 MHz */ >,
305 < 2929 /* 384 MHz */ >,
306 < 3221 /* 422.4 MHz */ >, /* SVS */
307 < 4248 /* 556.8 MHz */ >,
308 < 5126 /* 672 MHz */ >,
309 < 5859 /* 768 MHz */ >, /* SVS+ */
310 < 6152 /* 806.4 MHz */ >,
311 < 6445 /* 844.8 MHz */ >, /* NOM */
312 < 7104 /* 931.2 MHz */ >; /* TURBO */
313 };
314
315 mincpubw: qcom,mincpubw {
316 compatible = "qcom,devbw";
317 governor = "cpufreq";
318 qcom,src-dst-ports = <1 512>;
319 qcom,active-only;
320 qcom,bw-tbl =
321 < 769 /* 100.8 MHz */ >,
322 < 1611 /* 211.2 MHz */ >, /*Low SVS*/
323 < 2124 /* 278.4 MHz */ >,
324 < 2929 /* 384 MHz */ >,
325 < 3221 /* 422.4 MHz */ >, /* SVS */
326 < 4248 /* 556.8 MHz */ >,
327 < 5126 /* 672 MHz */ >,
328 < 5859 /* 768 MHz */ >, /* SVS+ */
329 < 6152 /* 806.4 MHz */ >,
330 < 6445 /* 844.8 MHz */ >, /* NOM */
331 < 7104 /* 931.2 MHz */ >; /* TURBO */
332 };
333
334 qcom,cpu-bwmon {
335 compatible = "qcom,bimc-bwmon2";
336 reg = <0x408000 0x300>, <0x401000 0x200>;
337 reg-names = "base", "global_base";
338 interrupts = <0 183 4>;
339 qcom,mport = <0>;
340 qcom,target-dev = <&cpubw>;
341 };
342
343 devfreq-cpufreq {
344 cpubw-cpufreq {
345 target-dev = <&cpubw>;
346 cpu-to-dev-map =
347 < 652800 1611>,
348 < 1036800 3221>,
349 < 1401600 5859>,
350 < 1689600 6445>,
351 < 1804800 7104>,
352 < 1958400 7104>,
353 < 2208000 7104>;
354 };
355
356 mincpubw-cpufreq {
357 target-dev = <&mincpubw>;
358 cpu-to-dev-map =
359 < 652800 1611 >,
360 < 1401600 3221 >,
361 < 2208000 5859 >;
362 };
363 };
364
Jonathan Avilac7a6fd52017-10-12 15:24:05 -0700365 cpubw_compute: qcom,cpubw-compute {
366 compatible = "qcom,arm-cpu-mon";
367 qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
368 &CPU4 &CPU5 &CPU6 &CPU7 >;
369 qcom,target-dev = <&cpubw>;
370 qcom,core-dev-table =
371 < 652800 1611>,
372 < 1036800 3221>,
373 < 1401600 5859>,
374 < 1689600 6445>,
375 < 1804800 7104>,
376 < 1958400 7104>,
377 < 2208000 7104>;
378 };
379
380 mincpubw_compute: qcom,mincpubw-compute {
381 compatible = "qcom,arm-cpu-mon";
382 qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
383 &CPU4 &CPU5 &CPU6 &CPU7 >;
384 qcom,target-dev = <&mincpubw>;
385 qcom,core-dev-table =
386 < 652800 1611 >,
387 < 1401600 3221 >,
388 < 2208000 5859 >;
389 };
390
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530391 qcom,ipc-spinlock@1905000 {
392 compatible = "qcom,ipc-spinlock-sfpb";
393 reg = <0x1905000 0x8000>;
394 qcom,num-locks = <8>;
395 };
396
397 qcom,smem@86300000 {
398 compatible = "qcom,smem";
399 reg = <0x86300000 0x100000>,
400 <0x0b011008 0x4>,
401 <0x60000 0x8000>,
402 <0x193d000 0x8>;
403 reg-names = "smem", "irq-reg-base",
404 "aux-mem1", "smem_targ_info_reg";
405 qcom,mpu-enabled;
406
407 qcom,smd-modem {
408 compatible = "qcom,smd";
409 qcom,smd-edge = <0>;
410 qcom,smd-irq-offset = <0x0>;
411 qcom,smd-irq-bitmask = <0x1000>;
412 interrupts = <0 25 1>;
413 label = "modem";
414 qcom,not-loadable;
415 };
416
417 qcom,smsm-modem {
418 compatible = "qcom,smsm";
419 qcom,smsm-edge = <0>;
420 qcom,smsm-irq-offset = <0x0>;
421 qcom,smsm-irq-bitmask = <0x2000>;
422 interrupts = <0 26 1>;
423 };
424
425 qcom,smd-wcnss {
426 compatible = "qcom,smd";
427 qcom,smd-edge = <6>;
428 qcom,smd-irq-offset = <0x0>;
429 qcom,smd-irq-bitmask = <0x20000>;
430 interrupts = <0 142 1>;
431 label = "wcnss";
432 };
433
434 qcom,smsm-wcnss {
435 compatible = "qcom,smsm";
436 qcom,smsm-edge = <6>;
437 qcom,smsm-irq-offset = <0x0>;
438 qcom,smsm-irq-bitmask = <0x80000>;
439 interrupts = <0 144 1>;
440 };
441
442 qcom,smd-adsp {
443 compatible = "qcom,smd";
444 qcom,smd-edge = <1>;
445 qcom,smd-irq-offset = <0x0>;
446 qcom,smd-irq-bitmask = <0x100>;
447 interrupts = <0 289 1>;
448 label = "adsp";
449 };
450
451 qcom,smsm-adsp {
452 compatible = "qcom,smsm";
453 qcom,smsm-edge = <1>;
454 qcom,smsm-irq-offset = <0x0>;
455 qcom,smsm-irq-bitmask = <0x200>;
456 interrupts = <0 290 1>;
457 };
458
459 qcom,smd-rpm {
460 compatible = "qcom,smd";
461 qcom,smd-edge = <15>;
462 qcom,smd-irq-offset = <0x0>;
463 qcom,smd-irq-bitmask = <0x1>;
464 interrupts = <0 168 1>;
465 label = "rpm";
466 qcom,irq-no-suspend;
467 qcom,not-loadable;
468 };
469 };
470
Arun Kumar Neelakantam36151aa2017-11-02 21:34:33 +0530471 qcom,smdtty {
472 compatible = "qcom,smdtty";
473
474 smdtty_apps_fm: qcom,smdtty-apps-fm {
475 qcom,smdtty-remote = "wcnss";
476 qcom,smdtty-port-name = "APPS_FM";
477 };
478
479 smdtty_apps_riva_bt_acl: smdtty-apps-riva-bt-acl {
480 qcom,smdtty-remote = "wcnss";
481 qcom,smdtty-port-name = "APPS_RIVA_BT_ACL";
482 };
483
484 smdtty_apps_riva_bt_cmd: qcom,smdtty-apps-riva-bt-cmd {
485 qcom,smdtty-remote = "wcnss";
486 qcom,smdtty-port-name = "APPS_RIVA_BT_CMD";
487 };
488
489 smdtty_mbalbridge: qcom,smdtty-mbalbridge {
490 qcom,smdtty-remote = "modem";
491 qcom,smdtty-port-name = "MBALBRIDGE";
492 };
493
494 smdtty_apps_riva_ant_cmd: smdtty-apps-riva-ant-cmd {
495 qcom,smdtty-remote = "wcnss";
496 qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD";
497 };
498
499 smdtty_apps_riva_ant_data: smdtty-apps-riva-ant-data {
500 qcom,smdtty-remote = "wcnss";
501 qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA";
502 };
503
504 smdtty_data1: qcom,smdtty-data1 {
505 qcom,smdtty-remote = "modem";
506 qcom,smdtty-port-name = "DATA1";
507 };
508
509 smdtty_data4: qcom,smdtty-data4 {
510 qcom,smdtty-remote = "modem";
511 qcom,smdtty-port-name = "DATA4";
512 };
513
514 smdtty_data11: qcom,smdtty-data11 {
515 qcom,smdtty-remote = "modem";
516 qcom,smdtty-port-name = "DATA11";
517 };
518
519 smdtty_data21: qcom,smdtty-data21 {
520 qcom,smdtty-remote = "modem";
521 qcom,smdtty-port-name = "DATA21";
522 };
523
524 smdtty_loopback: smdtty-loopback {
525 qcom,smdtty-remote = "modem";
526 qcom,smdtty-port-name = "LOOPBACK";
527 qcom,smdtty-dev-name = "LOOPBACK_TTY";
528 };
529 };
530
Arun Kumar Neelakantamea07e3d2017-11-02 21:27:50 +0530531 qcom,smdpkt {
532 compatible = "qcom,smdpkt";
533
534 qcom,smdpkt-data5-cntl {
535 qcom,smdpkt-remote = "modem";
536 qcom,smdpkt-port-name = "DATA5_CNTL";
537 qcom,smdpkt-dev-name = "smdcntl0";
538 };
539
540 qcom,smdpkt-data22 {
541 qcom,smdpkt-remote = "modem";
542 qcom,smdpkt-port-name = "DATA22";
543 qcom,smdpkt-dev-name = "smd22";
544 };
545
546 qcom,smdpkt-data40-cntl {
547 qcom,smdpkt-remote = "modem";
548 qcom,smdpkt-port-name = "DATA40_CNTL";
549 qcom,smdpkt-dev-name = "smdcntl8";
550 };
551
552 qcom,smdpkt-apr-apps2 {
553 qcom,smdpkt-remote = "adsp";
554 qcom,smdpkt-port-name = "apr_apps2";
555 qcom,smdpkt-dev-name = "apr_apps2";
556 };
557
558 qcom,smdpkt-loopback {
559 qcom,smdpkt-remote = "modem";
560 qcom,smdpkt-port-name = "LOOPBACK";
561 qcom,smdpkt-dev-name = "smd_pkt_loopback";
562 };
563 };
564
Raju P.L.S.S.S.N786994d2017-11-08 17:03:56 +0530565 rpm_bus: qcom,rpm-smd {
566 compatible = "qcom,rpm-smd";
567 rpm-channel-name = "rpm_requests";
568 rpm-channel-type = <15>; /* SMD_APPS_RPM */
569 };
570
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530571 qcom,wdt@b017000 {
572 compatible = "qcom,msm-watchdog";
573 reg = <0xb017000 0x1000>;
574 reg-names = "wdt-base";
575 interrupts = <0 3 0>, <0 4 0>;
576 qcom,bark-time = <11000>;
577 qcom,pet-time = <10000>;
578 qcom,ipi-ping;
579 qcom,wakeup-enable;
580 };
581
582 qcom,chd {
583 compatible = "qcom,core-hang-detect";
584 qcom,threshold-arr = <0xb1880b0 0xb1980b0 0xb1a80b0
585 0xb1b80b0 0xb0880b0 0xb0980b0 0xb0a80b0 0xb0b80b0>;
586 qcom,config-arr = <0xb1880b8 0xb1980b8 0xb1a80b8
587 0xb1b80b8 0xb0880b8 0xb0980b8 0xb0a80b8 0xb0b80b8>;
588 };
589
590 qcom,msm-rtb {
591 compatible = "qcom,msm-rtb";
592 qcom,rtb-size = <0x100000>;
593 };
594
595 qcom,msm-imem@8600000 {
596 compatible = "qcom,msm-imem";
597 reg = <0x08600000 0x1000>;
598 ranges = <0x0 0x08600000 0x1000>;
599 #address-cells = <1>;
600 #size-cells = <1>;
601
602 mem_dump_table@10 {
603 compatible = "qcom,msm-imem-mem_dump_table";
604 reg = <0x10 8>;
605 };
606
Maria Yu06cf96e2017-09-21 17:35:13 +0800607 dload_type@18 {
608 compatible = "qcom,msm-imem-dload-type";
609 reg = <0x18 4>;
610 };
611
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530612 restart_reason@65c {
613 compatible = "qcom,msm-imem-restart_reason";
614 reg = <0x65c 4>;
615 };
616
617 boot_stats@6b0 {
618 compatible = "qcom,msm-imem-boot_stats";
619 reg = <0x6b0 32>;
620 };
621
622 pil@94c {
623 compatible = "qcom,msm-imem-pil";
624 reg = <0x94c 200>;
625
626 };
627 };
628
629 qcom,memshare {
630 compatible = "qcom,memshare";
631
632 qcom,client_1 {
633 compatible = "qcom,memshare-peripheral";
634 qcom,peripheral-size = <0x200000>;
635 qcom,client-id = <0>;
636 qcom,allocate-boot-time;
637 label = "modem";
638 };
639
640 qcom,client_2 {
641 compatible = "qcom,memshare-peripheral";
642 qcom,peripheral-size = <0x300000>;
643 qcom,client-id = <2>;
644 label = "modem";
645 };
646
647 mem_client_3_size: qcom,client_3 {
648 compatible = "qcom,memshare-peripheral";
649 qcom,peripheral-size = <0x0>;
650 qcom,client-id = <1>;
651 label = "modem";
652 };
653 };
654 sdcc1_ice: sdcc1ice@7803000 {
655 compatible = "qcom,ice";
656 reg = <0x7803000 0x8000>;
657 interrupt-names = "sdcc_ice_nonsec_level_irq",
658 "sdcc_ice_sec_level_irq";
659 interrupts = <0 312 0>, <0 313 0>;
660 qcom,enable-ice-clk;
661 qcom,op-freq-hz = <270000000>, <0>, <0>, <0>;
662 qcom,msm-bus,name = "sdcc_ice_noc";
663 qcom,msm-bus,num-cases = <2>;
664 qcom,msm-bus,num-paths = <1>;
665 qcom,msm-bus,vectors-KBps =
666 <78 512 0 0>, /* No vote */
667 <78 512 1000 0>; /* Max. bandwidth */
668 qcom,bus-vector-names = "MIN", "MAX";
669 qcom,instance-type = "sdcc";
670 };
671
672 sdhc_1: sdhci@7824900 {
673 compatible = "qcom,sdhci-msm";
674 reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>;
675 reg-names = "hc_mem", "core_mem", "cmdq_mem";
676
677 interrupts = <0 123 0>, <0 138 0>;
678 interrupt-names = "hc_irq", "pwr_irq";
679
680 sdhc-msm-crypto = <&sdcc1_ice>;
681 qcom,bus-width = <8>;
682
683 qcom,devfreq,freq-table = <50000000 200000000>;
684
685 qcom,pm-qos-irq-type = "affine_irq";
686 qcom,pm-qos-irq-latency = <2 213>;
687
688 qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
689 qcom,pm-qos-cmdq-latency-us = <2 213>, <2 213>;
690
691 qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;
692
693 qcom,msm-bus,name = "sdhc1";
694 qcom,msm-bus,num-cases = <9>;
695 qcom,msm-bus,num-paths = <1>;
696 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
697 <78 512 1046 3200>, /* 400 KB/s*/
698 <78 512 52286 160000>, /* 20 MB/s */
699 <78 512 65360 200000>, /* 25 MB/s */
700 <78 512 130718 400000>, /* 50 MB/s */
701 <78 512 130718 400000>, /* 100 MB/s */
702 <78 512 261438 800000>, /* 200 MB/s */
703 <78 512 261438 800000>, /* 400 MB/s */
704 <78 512 1338562 4096000>; /* Max. bandwidth */
705 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
706 100000000 200000000 400000000 4294967295>;
707
708 qcom,ice-clk-rates = <270000000 160000000>;
709 qcom,large-address-bus;
710
711 status = "disabled";
712 };
713
714 sdhc_2: sdhci@7864900 {
715 compatible = "qcom,sdhci-msm";
716 reg = <0x7864900 0x500>, <0x7864000 0x800>;
717 reg-names = "hc_mem", "core_mem";
718
719 interrupts = <0 125 0>, <0 221 0>;
720 interrupt-names = "hc_irq", "pwr_irq";
721
722 qcom,bus-width = <4>;
723
724 qcom,pm-qos-irq-type = "affine_irq";
725 qcom,pm-qos-irq-latency = <2 213>;
726
727 qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
728 qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;
729
730 qcom,devfreq,freq-table = <50000000 200000000>;
731
732 qcom,msm-bus,name = "sdhc2";
733 qcom,msm-bus,num-cases = <8>;
734 qcom,msm-bus,num-paths = <1>;
735 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
736 <81 512 1046 3200>, /* 400 KB/s*/
737 <81 512 52286 160000>, /* 20 MB/s */
738 <81 512 65360 200000>, /* 25 MB/s */
739 <81 512 130718 400000>, /* 50 MB/s */
740 <81 512 261438 800000>, /* 100 MB/s */
741 <81 512 261438 800000>, /* 200 MB/s */
742 <81 512 1338562 4096000>; /* Max. bandwidth */
743 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
744 100000000 200000000 4294967295>;
745
746 qcom,large-address-bus;
747 status = "disabled";
748 };
749
Kiran Gundaaf6a0b62017-10-23 16:03:10 +0530750 spmi_bus: qcom,spmi@200f000 {
751 compatible = "qcom,spmi-pmic-arb";
752 reg = <0x200f000 0x1000>,
753 <0x2400000 0x800000>,
754 <0x2c00000 0x800000>,
755 <0x3800000 0x200000>,
756 <0x200a000 0x2100>;
757 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
758 interrupt-names = "periph_irq";
759 interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
760 qcom,ee = <0>;
761 qcom,channel = <0>;
Kiran Gunda90e356a2017-11-22 17:04:46 +0530762 #address-cells = <2>;
Kiran Gundaaf6a0b62017-10-23 16:03:10 +0530763 #size-cells = <0>;
764 interrupt-controller;
Kiran Gunda90e356a2017-11-22 17:04:46 +0530765 #interrupt-cells = <4>;
Kiran Gundaaf6a0b62017-10-23 16:03:10 +0530766 cell-index = <0>;
767 };
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530768};
Kiran Gunda0954f392017-10-16 16:24:55 +0530769
770#include "pm8953-rpm-regulator.dtsi"
771#include "pm8953.dtsi"
772#include "msm8953-regulator.dtsi"