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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Stephen Boyd9bc70c32017-03-01 16:58:38 -08006 * Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070041#include <scsi/ufs/ioctl.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030042#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020043#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020044#include <linux/of.h>
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -070045#include <linux/blkdev.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053046#include "ufshcd.h"
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070047#include "ufshci.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020048#include "ufs_quirks.h"
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070049#include "ufs-debugfs.h"
Subhash Jadavani9c807702017-04-01 00:35:51 -070050#include "ufs-qcom.h"
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070051
52#define CREATE_TRACE_POINTS
53#include <trace/events/ufs.h>
54
55#ifdef CONFIG_DEBUG_FS
56
57static int ufshcd_tag_req_type(struct request *rq)
58{
59 int rq_type = TS_WRITE;
60
61 if (!rq || !(rq->cmd_type & REQ_TYPE_FS))
62 rq_type = TS_NOT_SUPPORTED;
63 else if (rq->cmd_flags & REQ_PREFLUSH)
64 rq_type = TS_FLUSH;
65 else if (rq_data_dir(rq) == READ)
66 rq_type = (rq->cmd_flags & REQ_URGENT) ?
67 TS_URGENT_READ : TS_READ;
68 else if (rq->cmd_flags & REQ_URGENT)
69 rq_type = TS_URGENT_WRITE;
70
71 return rq_type;
72}
73
74static void ufshcd_update_error_stats(struct ufs_hba *hba, int type)
75{
76 ufsdbg_set_err_state(hba);
77 if (type < UFS_ERR_MAX)
78 hba->ufs_stats.err_stats[type]++;
79}
80
81static void ufshcd_update_tag_stats(struct ufs_hba *hba, int tag)
82{
83 struct request *rq =
84 hba->lrb[tag].cmd ? hba->lrb[tag].cmd->request : NULL;
85 u64 **tag_stats = hba->ufs_stats.tag_stats;
86 int rq_type;
87
88 if (!hba->ufs_stats.enabled)
89 return;
90
91 tag_stats[tag][TS_TAG]++;
92 if (!rq || !(rq->cmd_type & REQ_TYPE_FS))
93 return;
94
95 WARN_ON(hba->ufs_stats.q_depth > hba->nutrs);
96 rq_type = ufshcd_tag_req_type(rq);
97 if (!(rq_type < 0 || rq_type > TS_NUM_STATS))
98 tag_stats[hba->ufs_stats.q_depth++][rq_type]++;
99}
100
101static void ufshcd_update_tag_stats_completion(struct ufs_hba *hba,
102 struct scsi_cmnd *cmd)
103{
104 struct request *rq = cmd ? cmd->request : NULL;
105
106 if (rq && rq->cmd_type & REQ_TYPE_FS)
107 hba->ufs_stats.q_depth--;
108}
109
110static void update_req_stats(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
111{
112 int rq_type;
113 struct request *rq = lrbp->cmd ? lrbp->cmd->request : NULL;
114 s64 delta = ktime_us_delta(lrbp->complete_time_stamp,
115 lrbp->issue_time_stamp);
116
117 /* update general request statistics */
118 if (hba->ufs_stats.req_stats[TS_TAG].count == 0)
119 hba->ufs_stats.req_stats[TS_TAG].min = delta;
120 hba->ufs_stats.req_stats[TS_TAG].count++;
121 hba->ufs_stats.req_stats[TS_TAG].sum += delta;
122 if (delta > hba->ufs_stats.req_stats[TS_TAG].max)
123 hba->ufs_stats.req_stats[TS_TAG].max = delta;
124 if (delta < hba->ufs_stats.req_stats[TS_TAG].min)
125 hba->ufs_stats.req_stats[TS_TAG].min = delta;
126
127 rq_type = ufshcd_tag_req_type(rq);
128 if (rq_type == TS_NOT_SUPPORTED)
129 return;
130
131 /* update request type specific statistics */
132 if (hba->ufs_stats.req_stats[rq_type].count == 0)
133 hba->ufs_stats.req_stats[rq_type].min = delta;
134 hba->ufs_stats.req_stats[rq_type].count++;
135 hba->ufs_stats.req_stats[rq_type].sum += delta;
136 if (delta > hba->ufs_stats.req_stats[rq_type].max)
137 hba->ufs_stats.req_stats[rq_type].max = delta;
138 if (delta < hba->ufs_stats.req_stats[rq_type].min)
139 hba->ufs_stats.req_stats[rq_type].min = delta;
140}
141
142static void
143ufshcd_update_query_stats(struct ufs_hba *hba, enum query_opcode opcode, u8 idn)
144{
145 if (opcode < UPIU_QUERY_OPCODE_MAX && idn < MAX_QUERY_IDN)
146 hba->ufs_stats.query_stats_arr[opcode][idn]++;
147}
148
149#else
150static inline void ufshcd_update_tag_stats(struct ufs_hba *hba, int tag)
151{
152}
153
154static inline void ufshcd_update_tag_stats_completion(struct ufs_hba *hba,
155 struct scsi_cmnd *cmd)
156{
157}
158
159static inline void ufshcd_update_error_stats(struct ufs_hba *hba, int type)
160{
161}
162
163static inline
164void update_req_stats(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
165{
166}
167
168static inline
169void ufshcd_update_query_stats(struct ufs_hba *hba,
170 enum query_opcode opcode, u8 idn)
171{
172}
173#endif
174
Asutosh Das3923c232017-09-15 16:14:26 +0530175#define PWR_INFO_MASK 0xF
176#define PWR_RX_OFFSET 4
177
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700178#define UFSHCD_REQ_SENSE_SIZE 18
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530179
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530180#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
181 UTP_TASK_REQ_COMPL |\
182 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +0530183/* UIC command timeout, unit: ms */
184#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530185
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530186/* NOP OUT retries waiting for NOP IN response */
187#define NOP_OUT_RETRIES 10
188/* Timeout after 30 msecs if NOP OUT hangs without response */
189#define NOP_OUT_TIMEOUT 30 /* msecs */
190
Dolev Raviv68078d52013-07-30 00:35:58 +0530191/* Query request retries */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700192#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +0530193/* Query request timeout */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700194#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +0530195
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530196/* Task management command timeout */
197#define TM_CMD_TIMEOUT 100 /* msecs */
198
Yaniv Gardi64238fb2016-02-01 15:02:43 +0200199/* maximum number of retries for a general UIC command */
200#define UFS_UIC_COMMAND_RETRIES 3
201
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300202/* maximum number of link-startup retries */
203#define DME_LINKSTARTUP_RETRIES 3
204
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +0200205/* Maximum retries for Hibern8 enter */
206#define UIC_HIBERN8_ENTER_RETRIES 3
207
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300208/* maximum number of reset retries before giving up */
209#define MAX_HOST_RESET_RETRIES 5
210
Dolev Raviv68078d52013-07-30 00:35:58 +0530211/* Expose the flag value from utp_upiu_query.value */
212#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
213
Seungwon Jeon7d568652013-08-31 21:40:20 +0530214/* Interrupt aggregation default timeout, unit: 40us */
215#define INT_AGGR_DEF_TO 0x02
216
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700217/* default value of auto suspend is 3 seconds */
218#define UFSHCD_AUTO_SUSPEND_DELAY_MS 3000 /* millisecs */
219
220#define UFSHCD_CLK_GATING_DELAY_MS_PWR_SAVE 10
221#define UFSHCD_CLK_GATING_DELAY_MS_PERF 50
222
223/* IOCTL opcode for command - ufs set device read only */
224#define UFS_IOCTL_BLKROSET BLKROSET
225
226#define UFSHCD_DEFAULT_LANES_PER_DIRECTION 2
227
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300228#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
229 ({ \
230 int _ret; \
231 if (_on) \
232 _ret = ufshcd_enable_vreg(_dev, _vreg); \
233 else \
234 _ret = ufshcd_disable_vreg(_dev, _vreg); \
235 _ret; \
236 })
237
Subhash Jadavani4386e022016-12-19 13:01:56 -0800238static void ufshcd_hex_dump(struct ufs_hba *hba, const char * const str,
239 const void *buf, size_t len)
240
241{
242 /*
243 * device name is expected to take up ~20 characters and "str" passed
244 * to this function is expected to be of ~10 character so we would need
245 * ~30 characters string to hold the concatenation of these 2 strings.
246 */
247 #define MAX_PREFIX_STR_SIZE 50
248 char prefix_str[MAX_PREFIX_STR_SIZE] = {0};
249
250 /* concatenate the device name and "str" */
251 snprintf(prefix_str, MAX_PREFIX_STR_SIZE, "%s %s: ",
252 dev_name(hba->dev), str);
253 print_hex_dump(KERN_ERR, prefix_str, DUMP_PREFIX_OFFSET,
254 16, 4, buf, len, false);
255}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700256
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530257enum {
258 UFSHCD_MAX_CHANNEL = 0,
259 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530260 UFSHCD_CMD_PER_LUN = 32,
261 UFSHCD_CAN_QUEUE = 32,
262};
263
264/* UFSHCD states */
265enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530266 UFSHCD_STATE_RESET,
267 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530268 UFSHCD_STATE_OPERATIONAL,
Zang Leiganga17bddc2017-04-04 19:32:20 +0000269 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530270};
271
272/* UFSHCD error handling flags */
273enum {
274 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530275};
276
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530277/* UFSHCD UIC layer error flags */
278enum {
279 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200280 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
281 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
282 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
283 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
284 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530285};
286
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530287/* Interrupt configuration options */
288enum {
289 UFSHCD_INT_DISABLE,
290 UFSHCD_INT_ENABLE,
291 UFSHCD_INT_CLEAR,
292};
293
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700294#define DEFAULT_UFSHCD_DBG_PRINT_EN UFSHCD_DBG_PRINT_ALL
295
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530296#define ufshcd_set_eh_in_progress(h) \
297 (h->eh_flags |= UFSHCD_EH_IN_PROGRESS)
298#define ufshcd_eh_in_progress(h) \
299 (h->eh_flags & UFSHCD_EH_IN_PROGRESS)
300#define ufshcd_clear_eh_in_progress(h) \
301 (h->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
302
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300303#define ufshcd_set_ufs_dev_active(h) \
304 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
305#define ufshcd_set_ufs_dev_sleep(h) \
306 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
307#define ufshcd_set_ufs_dev_poweroff(h) \
308 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
309#define ufshcd_is_ufs_dev_active(h) \
310 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
311#define ufshcd_is_ufs_dev_sleep(h) \
312 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
313#define ufshcd_is_ufs_dev_poweroff(h) \
314 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
315
316static struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
317 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
318 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
319 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
320 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
321 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
322 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
323};
324
325static inline enum ufs_dev_pwr_mode
326ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
327{
328 return ufs_pm_lvl_states[lvl].dev_state;
329}
330
331static inline enum uic_link_state
332ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
333{
334 return ufs_pm_lvl_states[lvl].link_state;
335}
336
Subhash Jadavanief542222017-08-02 16:23:55 -0700337static inline void ufshcd_set_card_online(struct ufs_hba *hba)
338{
339 atomic_set(&hba->card_state, UFS_CARD_STATE_ONLINE);
340}
341
342static inline void ufshcd_set_card_offline(struct ufs_hba *hba)
343{
344 atomic_set(&hba->card_state, UFS_CARD_STATE_OFFLINE);
345}
346
347static inline bool ufshcd_is_card_online(struct ufs_hba *hba)
348{
349 return (atomic_read(&hba->card_state) == UFS_CARD_STATE_ONLINE);
350}
351
352static inline bool ufshcd_is_card_offline(struct ufs_hba *hba)
353{
354 return (atomic_read(&hba->card_state) == UFS_CARD_STATE_OFFLINE);
355}
356
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700357static inline enum ufs_pm_level
358ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
359 enum uic_link_state link_state)
360{
361 enum ufs_pm_level lvl;
362
363 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
364 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
365 (ufs_pm_lvl_states[lvl].link_state == link_state))
366 return lvl;
367 }
368
369 /* if no match found, return the level 0 */
370 return UFS_PM_LVL_0;
371}
372
373static inline bool ufshcd_is_valid_pm_lvl(int lvl)
374{
375 if (lvl >= 0 && lvl < ARRAY_SIZE(ufs_pm_lvl_states))
376 return true;
377 else
378 return false;
379}
380
381static irqreturn_t ufshcd_intr(int irq, void *__hba);
Subhash Jadavani9c807702017-04-01 00:35:51 -0700382static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530383static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530384static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700385static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530386static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300387static void ufshcd_hba_exit(struct ufs_hba *hba);
388static int ufshcd_probe_hba(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700389static int ufshcd_enable_clocks(struct ufs_hba *hba);
390static int ufshcd_disable_clocks(struct ufs_hba *hba,
391 bool is_gating_context);
392static int ufshcd_disable_clocks_skip_ref_clk(struct ufs_hba *hba,
393 bool is_gating_context);
Subhash Jadavanid13daec2017-05-15 18:17:57 -0700394static void ufshcd_hold_all(struct ufs_hba *hba);
395static void ufshcd_release_all(struct ufs_hba *hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +0200396static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300397static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700398static inline void ufshcd_save_tstamp_of_last_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300399static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700400static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
401static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
402static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
403static void ufshcd_release_all(struct ufs_hba *hba);
404static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba);
405static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba);
Subhash Jadavani9c807702017-04-01 00:35:51 -0700406static int ufshcd_devfreq_target(struct device *dev,
407 unsigned long *freq, u32 flags);
408static int ufshcd_devfreq_get_dev_status(struct device *dev,
409 struct devfreq_dev_status *stat);
Subhash Jadavanief542222017-08-02 16:23:55 -0700410static void __ufshcd_shutdown_clkscaling(struct ufs_hba *hba);
Subhash Jadavani9c807702017-04-01 00:35:51 -0700411
412#if IS_ENABLED(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND)
413static struct devfreq_simple_ondemand_data ufshcd_ondemand_data = {
Subhash Jadavani99c76de2017-10-12 14:32:35 -0700414 .upthreshold = 70,
415 .downdifferential = 65,
Subhash Jadavani9c807702017-04-01 00:35:51 -0700416 .simple_scaling = 1,
417};
418
419static void *gov_data = &ufshcd_ondemand_data;
420#else
421static void *gov_data;
422#endif
423
424static struct devfreq_dev_profile ufs_devfreq_profile = {
Subhash Jadavani99c76de2017-10-12 14:32:35 -0700425 .polling_ms = 60,
Subhash Jadavani9c807702017-04-01 00:35:51 -0700426 .target = ufshcd_devfreq_target,
427 .get_dev_status = ufshcd_devfreq_get_dev_status,
428};
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700429
Yaniv Gardi14497322016-02-01 15:02:39 +0200430static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
431{
432 return tag >= 0 && tag < hba->nutrs;
433}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300434
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700435static inline void ufshcd_enable_irq(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300436{
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300437 if (!hba->is_irq_enabled) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700438 enable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300439 hba->is_irq_enabled = true;
440 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300441}
442
443static inline void ufshcd_disable_irq(struct ufs_hba *hba)
444{
445 if (hba->is_irq_enabled) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700446 disable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300447 hba->is_irq_enabled = false;
448 }
449}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530450
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700451void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
452{
453 unsigned long flags;
454 bool unblock = false;
455
456 spin_lock_irqsave(hba->host->host_lock, flags);
457 hba->scsi_block_reqs_cnt--;
458 unblock = !hba->scsi_block_reqs_cnt;
459 spin_unlock_irqrestore(hba->host->host_lock, flags);
460 if (unblock)
461 scsi_unblock_requests(hba->host);
462}
463EXPORT_SYMBOL(ufshcd_scsi_unblock_requests);
464
465static inline void __ufshcd_scsi_block_requests(struct ufs_hba *hba)
466{
467 if (!hba->scsi_block_reqs_cnt++)
468 scsi_block_requests(hba->host);
469}
470
471void ufshcd_scsi_block_requests(struct ufs_hba *hba)
472{
473 unsigned long flags;
474
475 spin_lock_irqsave(hba->host->host_lock, flags);
476 __ufshcd_scsi_block_requests(hba);
477 spin_unlock_irqrestore(hba->host->host_lock, flags);
478}
479EXPORT_SYMBOL(ufshcd_scsi_block_requests);
480
Subhash Jadavani9c807702017-04-01 00:35:51 -0700481static int ufshcd_device_reset_ctrl(struct ufs_hba *hba, bool ctrl)
482{
483 int ret = 0;
484
485 if (!hba->pctrl)
486 return 0;
487
488 /* Assert reset if ctrl == true */
489 if (ctrl)
490 ret = pinctrl_select_state(hba->pctrl,
491 pinctrl_lookup_state(hba->pctrl, "dev-reset-assert"));
492 else
493 ret = pinctrl_select_state(hba->pctrl,
494 pinctrl_lookup_state(hba->pctrl, "dev-reset-deassert"));
495
496 if (ret < 0)
497 dev_err(hba->dev, "%s: %s failed with err %d\n",
498 __func__, ctrl ? "Assert" : "Deassert", ret);
499
500 return ret;
501}
502
503static inline int ufshcd_assert_device_reset(struct ufs_hba *hba)
504{
505 return ufshcd_device_reset_ctrl(hba, true);
506}
507
508static inline int ufshcd_deassert_device_reset(struct ufs_hba *hba)
509{
510 return ufshcd_device_reset_ctrl(hba, false);
511}
512
513static int ufshcd_reset_device(struct ufs_hba *hba)
514{
515 int ret;
516
517 /* reset the connected UFS device */
518 ret = ufshcd_assert_device_reset(hba);
519 if (ret)
520 goto out;
521 /*
522 * The reset signal is active low.
523 * The UFS device shall detect more than or equal to 1us of positive
524 * or negative RST_n pulse width.
525 * To be on safe side, keep the reset low for atleast 10us.
526 */
527 usleep_range(10, 15);
528
529 ret = ufshcd_deassert_device_reset(hba);
530 if (ret)
531 goto out;
532 /* same as assert, wait for atleast 10us after deassert */
533 usleep_range(10, 15);
534out:
535 return ret;
536}
537
Yaniv Gardib573d482016-03-10 17:37:09 +0200538/* replace non-printable or non-ASCII characters with spaces */
539static inline void ufshcd_remove_non_printable(char *val)
540{
Subhash Jadavanibe096032017-03-23 12:55:25 -0700541 if (!val || !*val)
Yaniv Gardib573d482016-03-10 17:37:09 +0200542 return;
543
544 if (*val < 0x20 || *val > 0x7e)
545 *val = ' ';
546}
547
Can Guof6411eb2017-06-09 15:17:22 +0800548#define UFSHCD_MAX_CMD_LOGGING 200
Can Guob7147732017-04-18 16:22:56 +0800549
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700550#ifdef CONFIG_TRACEPOINTS
Can Guob7147732017-04-18 16:22:56 +0800551static inline void ufshcd_add_command_trace(struct ufs_hba *hba,
Subhash Jadavani114437e2017-11-08 16:22:16 -0800552 struct ufshcd_cmd_log_entry *entry)
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700553{
Can Guob7147732017-04-18 16:22:56 +0800554 if (trace_ufshcd_command_enabled()) {
555 u32 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
556
557 trace_ufshcd_command(dev_name(hba->dev), entry->str, entry->tag,
558 entry->doorbell, entry->transfer_len, intr,
Subhash Jadavani114437e2017-11-08 16:22:16 -0800559 entry->lba, entry->cmd_id);
Can Guob7147732017-04-18 16:22:56 +0800560 }
561}
562#else
563static inline void ufshcd_add_command_trace(struct ufs_hba *hba,
Subhash Jadavani114437e2017-11-08 16:22:16 -0800564 struct ufshcd_cmd_log_entry *entry)
Can Guob7147732017-04-18 16:22:56 +0800565{
566}
567#endif
568
569#ifdef CONFIG_SCSI_UFSHCD_CMD_LOGGING
570static void ufshcd_cmd_log_init(struct ufs_hba *hba)
571{
572 /* Allocate log entries */
573 if (!hba->cmd_log.entries) {
574 hba->cmd_log.entries = kzalloc(UFSHCD_MAX_CMD_LOGGING *
575 sizeof(struct ufshcd_cmd_log_entry), GFP_KERNEL);
576 if (!hba->cmd_log.entries)
577 return;
578 dev_dbg(hba->dev, "%s: cmd_log.entries initialized\n",
579 __func__);
580 }
581}
582
583static void __ufshcd_cmd_log(struct ufs_hba *hba, char *str, char *cmd_type,
584 unsigned int tag, u8 cmd_id, u8 idn, u8 lun,
Subhash Jadavani114437e2017-11-08 16:22:16 -0800585 sector_t lba, int transfer_len)
Can Guob7147732017-04-18 16:22:56 +0800586{
587 struct ufshcd_cmd_log_entry *entry;
588
589 if (!hba->cmd_log.entries)
590 return;
591
592 entry = &hba->cmd_log.entries[hba->cmd_log.pos];
593 entry->lun = lun;
594 entry->str = str;
595 entry->cmd_type = cmd_type;
596 entry->cmd_id = cmd_id;
597 entry->lba = lba;
598 entry->transfer_len = transfer_len;
599 entry->idn = idn;
600 entry->doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
601 entry->tag = tag;
602 entry->tstamp = ktime_get();
603 entry->outstanding_reqs = hba->outstanding_reqs;
604 entry->seq_num = hba->cmd_log.seq_num;
605 hba->cmd_log.seq_num++;
606 hba->cmd_log.pos =
607 (hba->cmd_log.pos + 1) % UFSHCD_MAX_CMD_LOGGING;
608
Subhash Jadavani114437e2017-11-08 16:22:16 -0800609 ufshcd_add_command_trace(hba, entry);
Can Guob7147732017-04-18 16:22:56 +0800610}
611
612static void ufshcd_cmd_log(struct ufs_hba *hba, char *str, char *cmd_type,
613 unsigned int tag, u8 cmd_id, u8 idn)
614{
Subhash Jadavani114437e2017-11-08 16:22:16 -0800615 __ufshcd_cmd_log(hba, str, cmd_type, tag, cmd_id, idn, 0, 0, 0);
Can Guob7147732017-04-18 16:22:56 +0800616}
617
618static void ufshcd_dme_cmd_log(struct ufs_hba *hba, char *str, u8 cmd_id)
619{
Subhash Jadavani114437e2017-11-08 16:22:16 -0800620 ufshcd_cmd_log(hba, str, "dme", 0, cmd_id, 0);
Can Guob7147732017-04-18 16:22:56 +0800621}
622
Can Guof6411eb2017-06-09 15:17:22 +0800623static void ufshcd_print_cmd_log(struct ufs_hba *hba)
Can Guob7147732017-04-18 16:22:56 +0800624{
625 int i;
626 int pos;
627 struct ufshcd_cmd_log_entry *p;
628
629 if (!hba->cmd_log.entries)
630 return;
631
632 pos = hba->cmd_log.pos;
633 for (i = 0; i < UFSHCD_MAX_CMD_LOGGING; i++) {
634 p = &hba->cmd_log.entries[pos];
635 pos = (pos + 1) % UFSHCD_MAX_CMD_LOGGING;
636
637 if (ktime_to_us(p->tstamp)) {
638 pr_err("%s: %s: seq_no=%u lun=0x%x cmd_id=0x%02x lba=0x%llx txfer_len=%d tag=%u, doorbell=0x%x outstanding=0x%x idn=%d time=%lld us\n",
639 p->cmd_type, p->str, p->seq_num,
640 p->lun, p->cmd_id, (unsigned long long)p->lba,
641 p->transfer_len, p->tag, p->doorbell,
642 p->outstanding_reqs, p->idn,
643 ktime_to_us(p->tstamp));
644 usleep_range(1000, 1100);
645 }
646 }
647}
648#else
649static void ufshcd_cmd_log_init(struct ufs_hba *hba)
650{
651}
652
653static void __ufshcd_cmd_log(struct ufs_hba *hba, char *str, char *cmd_type,
654 unsigned int tag, u8 cmd_id, u8 idn, u8 lun,
Subhash Jadavani114437e2017-11-08 16:22:16 -0800655 sector_t lba, int transfer_len)
Can Guob7147732017-04-18 16:22:56 +0800656{
657 struct ufshcd_cmd_log_entry entry;
658
659 entry.str = str;
660 entry.lba = lba;
661 entry.transfer_len = transfer_len;
662 entry.doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
663 entry.tag = tag;
664
Subhash Jadavani114437e2017-11-08 16:22:16 -0800665 ufshcd_add_command_trace(hba, &entry);
Can Guob7147732017-04-18 16:22:56 +0800666}
667
668static void ufshcd_dme_cmd_log(struct ufs_hba *hba, char *str, u8 cmd_id)
669{
670}
671
Can Guof6411eb2017-06-09 15:17:22 +0800672static void ufshcd_print_cmd_log(struct ufs_hba *hba)
Can Guob7147732017-04-18 16:22:56 +0800673{
674}
675#endif
676
677#ifdef CONFIG_TRACEPOINTS
678static inline void ufshcd_cond_add_cmd_trace(struct ufs_hba *hba,
679 unsigned int tag, const char *str)
680{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700681 struct ufshcd_lrb *lrbp;
Can Guob7147732017-04-18 16:22:56 +0800682 char *cmd_type = NULL;
683 u8 opcode = 0;
684 u8 cmd_id = 0, idn = 0;
Subhash Jadavani114437e2017-11-08 16:22:16 -0800685 sector_t lba = 0;
686 int transfer_len = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700687
688 lrbp = &hba->lrb[tag];
689
690 if (lrbp->cmd) { /* data phase exists */
691 opcode = (u8)(*lrbp->cmd->cmnd);
692 if ((opcode == READ_10) || (opcode == WRITE_10)) {
693 /*
694 * Currently we only fully trace read(10) and write(10)
695 * commands
696 */
697 if (lrbp->cmd->request && lrbp->cmd->request->bio)
698 lba =
Can Guob7147732017-04-18 16:22:56 +0800699 lrbp->cmd->request->bio->bi_iter.bi_sector;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700700 transfer_len = be32_to_cpu(
701 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
702 }
703 }
704
Can Guob7147732017-04-18 16:22:56 +0800705 if (lrbp->cmd && (lrbp->command_type == UTP_CMD_TYPE_SCSI)) {
706 cmd_type = "scsi";
707 cmd_id = (u8)(*lrbp->cmd->cmnd);
708 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
709 if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP) {
710 cmd_type = "nop";
711 cmd_id = 0;
712 } else if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY) {
713 cmd_type = "query";
714 cmd_id = hba->dev_cmd.query.request.upiu_req.opcode;
715 idn = hba->dev_cmd.query.request.upiu_req.idn;
716 }
717 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700718
Can Guob7147732017-04-18 16:22:56 +0800719 __ufshcd_cmd_log(hba, (char *) str, cmd_type, tag, cmd_id, idn,
Subhash Jadavani114437e2017-11-08 16:22:16 -0800720 lrbp->lun, lba, transfer_len);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700721}
722#else
723static inline void ufshcd_cond_add_cmd_trace(struct ufs_hba *hba,
724 unsigned int tag, const char *str)
725{
726}
727#endif
728
729static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
730{
731 struct ufs_clk_info *clki;
732 struct list_head *head = &hba->clk_list_head;
733
734 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_CLK_FREQ_EN))
735 return;
736
737 if (!head || list_empty(head))
738 return;
739
740 list_for_each_entry(clki, head, list) {
741 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
742 clki->max_freq)
743 dev_err(hba->dev, "clk: %s, rate: %u\n",
744 clki->name, clki->curr_freq);
745 }
746}
747
748static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
749 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
750{
751 int i;
752
753 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_UIC_ERR_HIST_EN))
754 return;
755
756 for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
757 int p = (i + err_hist->pos - 1) % UIC_ERR_REG_HIST_LENGTH;
758
759 if (err_hist->reg[p] == 0)
760 continue;
761 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us", err_name, i,
762 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
763 }
764}
765
Subhash Jadavani9c807702017-04-01 00:35:51 -0700766static inline void __ufshcd_print_host_regs(struct ufs_hba *hba, bool no_sleep)
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700767{
768 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_HOST_REGS_EN))
769 return;
770
771 /*
772 * hex_dump reads its data without the readl macro. This might
773 * cause inconsistency issues on some platform, as the printed
774 * values may be from cache and not the most recent value.
775 * To know whether you are looking at an un-cached version verify
776 * that IORESOURCE_MEM flag is on when xxx_get_resource() is invoked
777 * during platform/pci probe function.
778 */
Subhash Jadavani4386e022016-12-19 13:01:56 -0800779 ufshcd_hex_dump(hba, "host regs", hba->mmio_base,
780 UFSHCI_REG_SPACE_SIZE);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700781 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x",
782 hba->ufs_version, hba->capabilities);
783 dev_err(hba->dev,
784 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x",
785 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
786 dev_err(hba->dev,
787 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d",
788 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
789 hba->ufs_stats.hibern8_exit_cnt);
790
791 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
792 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
793 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
794 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
795 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
796
797 ufshcd_print_clk_freqs(hba);
798
Subhash Jadavani9c807702017-04-01 00:35:51 -0700799 ufshcd_vops_dbg_register_dump(hba, no_sleep);
800}
801
802static void ufshcd_print_host_regs(struct ufs_hba *hba)
803{
804 __ufshcd_print_host_regs(hba, false);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700805}
806
807static
808void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
809{
810 struct ufshcd_lrb *lrbp;
811 int prdt_length;
812 int tag;
813
814 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_TRS_EN))
815 return;
816
817 for_each_set_bit(tag, &bitmap, hba->nutrs) {
818 lrbp = &hba->lrb[tag];
819
820 dev_err(hba->dev, "UPIU[%d] - issue time %lld us",
821 tag, ktime_to_us(lrbp->issue_time_stamp));
822 dev_err(hba->dev,
823 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx",
824 tag, (u64)lrbp->utrd_dma_addr);
Subhash Jadavani4386e022016-12-19 13:01:56 -0800825 ufshcd_hex_dump(hba, "UPIU TRD", lrbp->utr_descriptor_ptr,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700826 sizeof(struct utp_transfer_req_desc));
827 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx", tag,
828 (u64)lrbp->ucd_req_dma_addr);
Subhash Jadavani4386e022016-12-19 13:01:56 -0800829 ufshcd_hex_dump(hba, "UPIU REQ", lrbp->ucd_req_ptr,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700830 sizeof(struct utp_upiu_req));
831 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx", tag,
832 (u64)lrbp->ucd_rsp_dma_addr);
Subhash Jadavani4386e022016-12-19 13:01:56 -0800833 ufshcd_hex_dump(hba, "UPIU RSP", lrbp->ucd_rsp_ptr,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700834 sizeof(struct utp_upiu_rsp));
835 prdt_length =
836 le16_to_cpu(lrbp->utr_descriptor_ptr->prd_table_length);
837 dev_err(hba->dev, "UPIU[%d] - PRDT - %d entries phys@0x%llx",
838 tag, prdt_length, (u64)lrbp->ucd_prdt_dma_addr);
839 if (pr_prdt)
Subhash Jadavani4386e022016-12-19 13:01:56 -0800840 ufshcd_hex_dump(hba, "UPIU PRDT", lrbp->ucd_prdt_ptr,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700841 sizeof(struct ufshcd_sg_entry) * prdt_length);
842 }
843}
844
845static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
846{
847 struct utp_task_req_desc *tmrdp;
848 int tag;
849
850 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_TMRS_EN))
851 return;
852
853 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
854 tmrdp = &hba->utmrdl_base_addr[tag];
855 dev_err(hba->dev, "TM[%d] - Task Management Header", tag);
Subhash Jadavani4386e022016-12-19 13:01:56 -0800856 ufshcd_hex_dump(hba, "TM TRD", &tmrdp->header,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700857 sizeof(struct request_desc_header));
858 dev_err(hba->dev, "TM[%d] - Task Management Request UPIU",
859 tag);
Subhash Jadavani4386e022016-12-19 13:01:56 -0800860 ufshcd_hex_dump(hba, "TM REQ", tmrdp->task_req_upiu,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700861 sizeof(struct utp_upiu_req));
862 dev_err(hba->dev, "TM[%d] - Task Management Response UPIU",
863 tag);
Subhash Jadavani4386e022016-12-19 13:01:56 -0800864 ufshcd_hex_dump(hba, "TM RSP", tmrdp->task_rsp_upiu,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700865 sizeof(struct utp_task_req_desc));
866 }
867}
868
Sayali Lokhande26c4bb52017-09-12 14:44:46 +0530869static void ufshcd_print_fsm_state(struct ufs_hba *hba)
870{
871 int err = 0, tx_fsm_val = 0, rx_fsm_val = 0;
872
873 err = ufshcd_dme_get(hba,
874 UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE,
875 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
876 &tx_fsm_val);
877 dev_err(hba->dev, "%s: TX_FSM_STATE = %u, err = %d\n", __func__,
878 tx_fsm_val, err);
879 err = ufshcd_dme_get(hba,
880 UIC_ARG_MIB_SEL(MPHY_RX_FSM_STATE,
881 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
882 &rx_fsm_val);
883 dev_err(hba->dev, "%s: RX_FSM_STATE = %u, err = %d\n", __func__,
884 rx_fsm_val, err);
885}
886
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700887static void ufshcd_print_host_state(struct ufs_hba *hba)
888{
889 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_HOST_STATE_EN))
890 return;
891
892 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
893 dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
894 hba->lrb_in_use, hba->outstanding_tasks, hba->outstanding_reqs);
895 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x, saved_ce_err=0x%x\n",
896 hba->saved_err, hba->saved_uic_err, hba->saved_ce_err);
897 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
898 hba->curr_dev_pwr_mode, hba->uic_link_state);
899 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
900 hba->pm_op_in_progress, hba->is_sys_suspended);
901 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
902 hba->auto_bkops_enabled, hba->host->host_self_blocked);
903 dev_err(hba->dev, "Clk gate=%d, hibern8 on idle=%d\n",
904 hba->clk_gating.state, hba->hibern8_on_idle.state);
905 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
906 hba->eh_flags, hba->req_abort_count);
907 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
908 hba->capabilities, hba->caps);
909 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
Subhash Jadavani4f0df17b2016-12-16 13:19:27 -0800910 hba->dev_info.quirks);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700911}
912
913/**
914 * ufshcd_print_pwr_info - print power params as saved in hba
915 * power info
916 * @hba: per-adapter instance
917 */
918static void ufshcd_print_pwr_info(struct ufs_hba *hba)
919{
920 char *names[] = {
921 "INVALID MODE",
922 "FAST MODE",
923 "SLOW_MODE",
924 "INVALID MODE",
925 "FASTAUTO_MODE",
926 "SLOWAUTO_MODE",
927 "INVALID MODE",
928 };
929
930 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_PWR_EN))
931 return;
932
933 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
934 __func__,
935 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
936 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
937 names[hba->pwr_info.pwr_rx],
938 names[hba->pwr_info.pwr_tx],
939 hba->pwr_info.hs_rate);
940}
941
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530942/*
943 * ufshcd_wait_for_register - wait for register value to change
944 * @hba - per-adapter interface
945 * @reg - mmio register offset
946 * @mask - mask to apply to read register value
947 * @val - wait condition
948 * @interval_us - polling interval in microsecs
949 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200950 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530951 * Returns -ETIMEDOUT on error, zero on success
952 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200953int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
954 u32 val, unsigned long interval_us,
955 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530956{
957 int err = 0;
958 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
959
960 /* ignore bits that we don't intend to wait on */
961 val = val & mask;
962
963 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200964 if (can_sleep)
965 usleep_range(interval_us, interval_us + 50);
966 else
967 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530968 if (time_after(jiffies, timeout)) {
969 if ((ufshcd_readl(hba, reg) & mask) != val)
970 err = -ETIMEDOUT;
971 break;
972 }
973 }
974
975 return err;
976}
977
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530978/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530979 * ufshcd_get_intr_mask - Get the interrupt bit mask
980 * @hba - Pointer to adapter instance
981 *
982 * Returns interrupt bit mask per version
983 */
984static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
985{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700986 u32 intr_mask = 0;
987
988 switch (hba->ufs_version) {
989 case UFSHCI_VERSION_10:
990 intr_mask = INTERRUPT_MASK_ALL_VER_10;
991 break;
992 /* allow fall through */
993 case UFSHCI_VERSION_11:
994 case UFSHCI_VERSION_20:
995 intr_mask = INTERRUPT_MASK_ALL_VER_11;
996 break;
997 /* allow fall through */
998 case UFSHCI_VERSION_21:
999 default:
1000 intr_mask = INTERRUPT_MASK_ALL_VER_21;
1001 }
1002
1003 if (!ufshcd_is_crypto_supported(hba))
1004 intr_mask &= ~CRYPTO_ENGINE_FATAL_ERROR;
1005
1006 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05301007}
1008
1009/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301010 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
1011 * @hba - Pointer to adapter instance
1012 *
1013 * Returns UFSHCI version supported by the controller
1014 */
1015static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
1016{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02001017 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
1018 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +03001019
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301020 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301021}
1022
1023/**
1024 * ufshcd_is_device_present - Check if any device connected to
1025 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03001026 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301027 *
Venkatraman S73ec5132012-07-10 19:39:23 +05301028 * Returns 1 if device present, 0 if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301029 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03001030static inline int ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301031{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03001032 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
1033 DEVICE_PRESENT) ? 1 : 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301034}
1035
1036/**
1037 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
1038 * @lrb: pointer to local command reference block
1039 *
1040 * This function is used to get the OCS field from UTRD
1041 * Returns the OCS field in the UTRD
1042 */
1043static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
1044{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05301045 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301046}
1047
1048/**
1049 * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
1050 * @task_req_descp: pointer to utp_task_req_desc structure
1051 *
1052 * This function is used to get the OCS field from UTMRD
1053 * Returns the OCS field in the UTMRD
1054 */
1055static inline int
1056ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
1057{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05301058 return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301059}
1060
1061/**
1062 * ufshcd_get_tm_free_slot - get a free slot for task management request
1063 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05301064 * @free_slot: pointer to variable with available slot value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301065 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05301066 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
1067 * Returns 0 if free slot is not available, else return 1 with tag value
1068 * in @free_slot.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301069 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05301070static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301071{
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05301072 int tag;
1073 bool ret = false;
1074
1075 if (!free_slot)
1076 goto out;
1077
1078 do {
1079 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
1080 if (tag >= hba->nutmrs)
1081 goto out;
1082 } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
1083
1084 *free_slot = tag;
1085 ret = true;
1086out:
1087 return ret;
1088}
1089
1090static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
1091{
1092 clear_bit_unlock(slot, &hba->tm_slots_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301093}
1094
1095/**
1096 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
1097 * @hba: per adapter instance
1098 * @pos: position of the bit to be cleared
1099 */
1100static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
1101{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301102 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301103}
1104
1105/**
Yaniv Gardia48353f2016-02-01 15:02:40 +02001106 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
1107 * @hba: per adapter instance
1108 * @tag: position of the bit to be cleared
1109 */
1110static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
1111{
1112 __clear_bit(tag, &hba->outstanding_reqs);
1113}
1114
1115/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301116 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
1117 * @reg: Register value of host controller status
1118 *
1119 * Returns integer, 0 on Success and positive value if failed
1120 */
1121static inline int ufshcd_get_lists_status(u32 reg)
1122{
1123 /*
1124 * The mask 0xFF is for the following HCS register bits
1125 * Bit Description
1126 * 0 Device Present
1127 * 1 UTRLRDY
1128 * 2 UTMRLRDY
1129 * 3 UCRDY
Yaniv Gardi897efe62016-02-01 15:02:48 +02001130 * 4-7 reserved
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301131 */
Yaniv Gardi897efe62016-02-01 15:02:48 +02001132 return ((reg & 0xFF) >> 1) ^ 0x07;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301133}
1134
1135/**
1136 * ufshcd_get_uic_cmd_result - Get the UIC command result
1137 * @hba: Pointer to adapter instance
1138 *
1139 * This function gets the result of UIC command completion
1140 * Returns 0 on success, non zero value on error
1141 */
1142static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
1143{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301144 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301145 MASK_UIC_COMMAND_RESULT;
1146}
1147
1148/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05301149 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
1150 * @hba: Pointer to adapter instance
1151 *
1152 * This function gets UIC command argument3
1153 * Returns 0 on success, non zero value on error
1154 */
1155static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
1156{
1157 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
1158}
1159
1160/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301161 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301162 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301163 */
1164static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301165ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301166{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301167 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301168}
1169
1170/**
1171 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
1172 * @ucd_rsp_ptr: pointer to response UPIU
1173 *
1174 * This function gets the response status and scsi_status from response UPIU
1175 * Returns the response result code.
1176 */
1177static inline int
1178ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
1179{
1180 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
1181}
1182
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301183/*
1184 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
1185 * from response UPIU
1186 * @ucd_rsp_ptr: pointer to response UPIU
1187 *
1188 * Return the data segment length.
1189 */
1190static inline unsigned int
1191ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
1192{
1193 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
1194 MASK_RSP_UPIU_DATA_SEG_LEN;
1195}
1196
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301197/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05301198 * ufshcd_is_exception_event - Check if the device raised an exception event
1199 * @ucd_rsp_ptr: pointer to response UPIU
1200 *
1201 * The function checks if the device raised an exception event indicated in
1202 * the Device Information field of response UPIU.
1203 *
1204 * Returns true if exception is raised, false otherwise.
1205 */
1206static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
1207{
1208 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
1209 MASK_RSP_EXCEPTION_EVENT ? true : false;
1210}
1211
1212/**
Seungwon Jeon7d568652013-08-31 21:40:20 +05301213 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301214 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301215 */
1216static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +05301217ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301218{
Seungwon Jeon7d568652013-08-31 21:40:20 +05301219 ufshcd_writel(hba, INT_AGGR_ENABLE |
1220 INT_AGGR_COUNTER_AND_TIMER_RESET,
1221 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
1222}
1223
1224/**
1225 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
1226 * @hba: per adapter instance
1227 * @cnt: Interrupt aggregation counter threshold
1228 * @tmout: Interrupt aggregation timeout value
1229 */
1230static inline void
1231ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
1232{
1233 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
1234 INT_AGGR_COUNTER_THLD_VAL(cnt) |
1235 INT_AGGR_TIMEOUT_VAL(tmout),
1236 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301237}
1238
1239/**
Yaniv Gardib8521902015-05-17 18:54:57 +03001240 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
1241 * @hba: per adapter instance
1242 */
1243static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
1244{
1245 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
1246}
1247
1248/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301249 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
1250 * When run-stop registers are set to 1, it indicates the
1251 * host controller that it can process the requests
1252 * @hba: per adapter instance
1253 */
1254static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
1255{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301256 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
1257 REG_UTP_TASK_REQ_LIST_RUN_STOP);
1258 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
1259 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301260}
1261
1262/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301263 * ufshcd_hba_start - Start controller initialization sequence
1264 * @hba: per adapter instance
1265 */
1266static inline void ufshcd_hba_start(struct ufs_hba *hba)
1267{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001268 u32 val = CONTROLLER_ENABLE;
1269
1270 if (ufshcd_is_crypto_supported(hba))
1271 val |= CRYPTO_GENERAL_ENABLE;
1272 ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301273}
1274
1275/**
1276 * ufshcd_is_hba_active - Get controller state
1277 * @hba: per adapter instance
1278 *
1279 * Returns zero if controller is active, 1 otherwise
1280 */
1281static inline int ufshcd_is_hba_active(struct ufs_hba *hba)
1282{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301283 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301284}
1285
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001286static const char *ufschd_uic_link_state_to_string(
1287 enum uic_link_state state)
1288{
1289 switch (state) {
1290 case UIC_LINK_OFF_STATE: return "OFF";
1291 case UIC_LINK_ACTIVE_STATE: return "ACTIVE";
1292 case UIC_LINK_HIBERN8_STATE: return "HIBERN8";
1293 default: return "UNKNOWN";
1294 }
1295}
1296
1297static const char *ufschd_ufs_dev_pwr_mode_to_string(
1298 enum ufs_dev_pwr_mode state)
1299{
1300 switch (state) {
1301 case UFS_ACTIVE_PWR_MODE: return "ACTIVE";
1302 case UFS_SLEEP_PWR_MODE: return "SLEEP";
1303 case UFS_POWERDOWN_PWR_MODE: return "POWERDOWN";
1304 default: return "UNKNOWN";
1305 }
1306}
1307
Yaniv Gardi37113102016-03-10 17:37:16 +02001308u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
1309{
1310 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
1311 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
1312 (hba->ufs_version == UFSHCI_VERSION_11))
1313 return UFS_UNIPRO_VER_1_41;
1314 else
1315 return UFS_UNIPRO_VER_1_6;
1316}
1317EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
1318
1319static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
1320{
1321 /*
1322 * If both host and device support UniPro ver1.6 or later, PA layer
1323 * parameters tuning happens during link startup itself.
1324 *
1325 * We can manually tune PA layer parameters if either host or device
1326 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
1327 * logic simple, we will only do manual tuning if local unipro version
1328 * doesn't support ver1.6 or later.
1329 */
1330 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
1331 return true;
1332 else
1333 return false;
1334}
1335
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001336/**
1337 * ufshcd_set_clk_freq - set UFS controller clock frequencies
1338 * @hba: per adapter instance
1339 * @scale_up: If True, set max possible frequency othewise set low frequency
1340 *
1341 * Returns 0 if successful
1342 * Returns < 0 for any other errors
1343 */
1344static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
1345{
1346 int ret = 0;
1347 struct ufs_clk_info *clki;
1348 struct list_head *head = &hba->clk_list_head;
1349
1350 if (!head || list_empty(head))
1351 goto out;
1352
1353 list_for_each_entry(clki, head, list) {
1354 if (!IS_ERR_OR_NULL(clki->clk)) {
1355 if (scale_up && clki->max_freq) {
1356 if (clki->curr_freq == clki->max_freq)
1357 continue;
1358
1359 ret = clk_set_rate(clki->clk, clki->max_freq);
1360 if (ret) {
1361 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
1362 __func__, clki->name,
1363 clki->max_freq, ret);
1364 break;
1365 }
1366 trace_ufshcd_clk_scaling(dev_name(hba->dev),
1367 "scaled up", clki->name,
1368 clki->curr_freq,
1369 clki->max_freq);
1370 clki->curr_freq = clki->max_freq;
1371
1372 } else if (!scale_up && clki->min_freq) {
1373 if (clki->curr_freq == clki->min_freq)
1374 continue;
1375
1376 ret = clk_set_rate(clki->clk, clki->min_freq);
1377 if (ret) {
1378 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
1379 __func__, clki->name,
1380 clki->min_freq, ret);
1381 break;
1382 }
1383 trace_ufshcd_clk_scaling(dev_name(hba->dev),
1384 "scaled down", clki->name,
1385 clki->curr_freq,
1386 clki->min_freq);
1387 clki->curr_freq = clki->min_freq;
1388 }
1389 }
1390 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
1391 clki->name, clk_get_rate(clki->clk));
1392 }
1393
1394out:
1395 return ret;
1396}
1397
1398/**
1399 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
1400 * @hba: per adapter instance
1401 * @scale_up: True if scaling up and false if scaling down
1402 *
1403 * Returns 0 if successful
1404 * Returns < 0 for any other errors
1405 */
1406static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
1407{
1408 int ret = 0;
1409
1410 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
1411 if (ret)
1412 return ret;
1413
1414 ret = ufshcd_set_clk_freq(hba, scale_up);
1415 if (ret)
1416 return ret;
1417
1418 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1419 if (ret) {
1420 ufshcd_set_clk_freq(hba, !scale_up);
1421 return ret;
1422 }
1423
1424 return ret;
1425}
1426
Subhash Jadavani9c807702017-04-01 00:35:51 -07001427static inline void ufshcd_cancel_gate_work(struct ufs_hba *hba)
1428{
1429 hrtimer_cancel(&hba->clk_gating.gate_hrtimer);
1430 cancel_work_sync(&hba->clk_gating.gate_work);
1431}
1432
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001433static void ufshcd_ungate_work(struct work_struct *work)
1434{
1435 int ret;
1436 unsigned long flags;
1437 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1438 clk_gating.ungate_work);
1439
Subhash Jadavani9c807702017-04-01 00:35:51 -07001440 ufshcd_cancel_gate_work(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001441
1442 spin_lock_irqsave(hba->host->host_lock, flags);
1443 if (hba->clk_gating.state == CLKS_ON) {
1444 spin_unlock_irqrestore(hba->host->host_lock, flags);
1445 goto unblock_reqs;
1446 }
1447
1448 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001449 ufshcd_hba_vreg_set_hpm(hba);
1450 ufshcd_enable_clocks(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001451
1452 /* Exit from hibern8 */
1453 if (ufshcd_can_hibern8_during_gating(hba)) {
1454 /* Prevent gating in this path */
1455 hba->clk_gating.is_suspended = true;
1456 if (ufshcd_is_link_hibern8(hba)) {
1457 ret = ufshcd_uic_hibern8_exit(hba);
1458 if (ret)
1459 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1460 __func__, ret);
1461 else
1462 ufshcd_set_link_active(hba);
1463 }
1464 hba->clk_gating.is_suspended = false;
1465 }
1466unblock_reqs:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001467 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001468}
1469
1470/**
1471 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1472 * Also, exit from hibern8 mode and set the link as active.
1473 * @hba: per adapter instance
1474 * @async: This indicates whether caller should ungate clocks asynchronously.
1475 */
1476int ufshcd_hold(struct ufs_hba *hba, bool async)
1477{
1478 int rc = 0;
1479 unsigned long flags;
1480
1481 if (!ufshcd_is_clkgating_allowed(hba))
1482 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001483 spin_lock_irqsave(hba->host->host_lock, flags);
1484 hba->clk_gating.active_reqs++;
1485
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001486 if (ufshcd_eh_in_progress(hba)) {
1487 spin_unlock_irqrestore(hba->host->host_lock, flags);
1488 return 0;
1489 }
1490
Sahitya Tummala856b3482014-09-25 15:32:34 +03001491start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001492 switch (hba->clk_gating.state) {
1493 case CLKS_ON:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001494 /*
1495 * Wait for the ungate work to complete if in progress.
1496 * Though the clocks may be in ON state, the link could
1497 * still be in hibner8 state if hibern8 is allowed
1498 * during clock gating.
1499 * Make sure we exit hibern8 state also in addition to
1500 * clocks being ON.
1501 */
1502 if (ufshcd_can_hibern8_during_gating(hba) &&
1503 ufshcd_is_link_hibern8(hba)) {
1504 spin_unlock_irqrestore(hba->host->host_lock, flags);
1505 flush_work(&hba->clk_gating.ungate_work);
1506 spin_lock_irqsave(hba->host->host_lock, flags);
1507 goto start;
1508 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001509 break;
1510 case REQ_CLKS_OFF:
Subhash Jadavani9c807702017-04-01 00:35:51 -07001511 /*
1512 * If the timer was active but the callback was not running
1513 * we have nothing to do, just change state and return.
1514 */
1515 if (hrtimer_try_to_cancel(&hba->clk_gating.gate_hrtimer) == 1) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001516 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001517 trace_ufshcd_clk_gating(dev_name(hba->dev),
1518 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001519 break;
1520 }
1521 /*
Subhash Jadavani9c807702017-04-01 00:35:51 -07001522 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001523 * currently running. Hence, fall through to cancel gating
1524 * work and to enable clocks.
1525 */
1526 case CLKS_OFF:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001527 __ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001528 hba->clk_gating.state = REQ_CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001529 trace_ufshcd_clk_gating(dev_name(hba->dev),
1530 hba->clk_gating.state);
Sayali Lokhandeab6db442017-07-06 12:03:10 +05301531 queue_work(hba->clk_gating.clk_gating_workq,
Subhash Jadavani9c807702017-04-01 00:35:51 -07001532 &hba->clk_gating.ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001533 /*
1534 * fall through to check if we should wait for this
1535 * work to be done or not.
1536 */
1537 case REQ_CLKS_ON:
1538 if (async) {
1539 rc = -EAGAIN;
1540 hba->clk_gating.active_reqs--;
1541 break;
1542 }
1543
1544 spin_unlock_irqrestore(hba->host->host_lock, flags);
1545 flush_work(&hba->clk_gating.ungate_work);
1546 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001547 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001548 goto start;
1549 default:
1550 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1551 __func__, hba->clk_gating.state);
1552 break;
1553 }
1554 spin_unlock_irqrestore(hba->host->host_lock, flags);
1555out:
Asutosh Das3da913a2017-03-24 10:32:16 +05301556 hba->ufs_stats.clk_hold.ts = ktime_get();
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001557 return rc;
1558}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001559EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001560
1561static void ufshcd_gate_work(struct work_struct *work)
1562{
1563 struct ufs_hba *hba = container_of(work, struct ufs_hba,
Subhash Jadavani9c807702017-04-01 00:35:51 -07001564 clk_gating.gate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001565 unsigned long flags;
1566
1567 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani9c807702017-04-01 00:35:51 -07001568 /*
1569 * In case you are here to cancel this work the gating state
1570 * would be marked as REQ_CLKS_ON. In this case save time by
1571 * skipping the gating work and exit after changing the clock
1572 * state to CLKS_ON.
1573 */
1574 if (hba->clk_gating.is_suspended ||
Asutosh Dasdd96ffa2017-03-23 15:01:56 +05301575 (hba->clk_gating.state != REQ_CLKS_OFF)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001576 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001577 trace_ufshcd_clk_gating(dev_name(hba->dev),
1578 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001579 goto rel_lock;
1580 }
1581
1582 if (hba->clk_gating.active_reqs
1583 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1584 || hba->lrb_in_use || hba->outstanding_tasks
1585 || hba->active_uic_cmd || hba->uic_async_done)
1586 goto rel_lock;
1587
1588 spin_unlock_irqrestore(hba->host->host_lock, flags);
1589
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001590 if (ufshcd_is_hibern8_on_idle_allowed(hba) &&
1591 hba->hibern8_on_idle.is_enabled)
1592 /*
1593 * Hibern8 enter work (on Idle) needs clocks to be ON hence
1594 * make sure that it is flushed before turning off the clocks.
1595 */
1596 flush_delayed_work(&hba->hibern8_on_idle.enter_work);
1597
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001598 /* put the link into hibern8 mode before turning off clocks */
1599 if (ufshcd_can_hibern8_during_gating(hba)) {
1600 if (ufshcd_uic_hibern8_enter(hba)) {
1601 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001602 trace_ufshcd_clk_gating(dev_name(hba->dev),
1603 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001604 goto out;
1605 }
1606 ufshcd_set_link_hibern8(hba);
1607 }
1608
Subhash Jadavani9c807702017-04-01 00:35:51 -07001609 /*
1610 * If auto hibern8 is supported then the link will already
1611 * be in hibern8 state and the ref clock can be gated.
1612 */
1613 if ((ufshcd_is_auto_hibern8_supported(hba) ||
1614 !ufshcd_is_link_active(hba)) && !hba->no_ref_clk_gating)
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001615 ufshcd_disable_clocks(hba, true);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001616 else
1617 /* If link is active, device ref_clk can't be switched off */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001618 ufshcd_disable_clocks_skip_ref_clk(hba, true);
1619
1620 /* Put the host controller in low power mode if possible */
1621 ufshcd_hba_vreg_set_lpm(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001622
1623 /*
1624 * In case you are here to cancel this work the gating state
1625 * would be marked as REQ_CLKS_ON. In this case keep the state
1626 * as REQ_CLKS_ON which would anyway imply that clocks are off
1627 * and a request to turn them on is pending. By doing this way,
1628 * we keep the state machine in tact and this would ultimately
1629 * prevent from doing cancel work multiple times when there are
1630 * new requests arriving before the current cancel work is done.
1631 */
1632 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001633 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001634 hba->clk_gating.state = CLKS_OFF;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001635 trace_ufshcd_clk_gating(dev_name(hba->dev),
1636 hba->clk_gating.state);
1637 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001638rel_lock:
1639 spin_unlock_irqrestore(hba->host->host_lock, flags);
1640out:
1641 return;
1642}
1643
1644/* host lock must be held before calling this variant */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001645static void __ufshcd_release(struct ufs_hba *hba, bool no_sched)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001646{
1647 if (!ufshcd_is_clkgating_allowed(hba))
1648 return;
1649
1650 hba->clk_gating.active_reqs--;
1651
1652 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1653 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1654 || hba->lrb_in_use || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001655 || hba->active_uic_cmd || hba->uic_async_done
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001656 || ufshcd_eh_in_progress(hba) || no_sched)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001657 return;
1658
1659 hba->clk_gating.state = REQ_CLKS_OFF;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001660 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Asutosh Das3da913a2017-03-24 10:32:16 +05301661 hba->ufs_stats.clk_rel.ts = ktime_get();
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001662
Subhash Jadavani9c807702017-04-01 00:35:51 -07001663 hrtimer_start(&hba->clk_gating.gate_hrtimer,
1664 ms_to_ktime(hba->clk_gating.delay_ms),
1665 HRTIMER_MODE_REL);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001666}
1667
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001668void ufshcd_release(struct ufs_hba *hba, bool no_sched)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001669{
1670 unsigned long flags;
1671
1672 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001673 __ufshcd_release(hba, no_sched);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001674 spin_unlock_irqrestore(hba->host->host_lock, flags);
1675}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001676EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001677
1678static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1679 struct device_attribute *attr, char *buf)
1680{
1681 struct ufs_hba *hba = dev_get_drvdata(dev);
1682
1683 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1684}
1685
1686static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1687 struct device_attribute *attr, const char *buf, size_t count)
1688{
1689 struct ufs_hba *hba = dev_get_drvdata(dev);
1690 unsigned long flags, value;
1691
1692 if (kstrtoul(buf, 0, &value))
1693 return -EINVAL;
1694
1695 spin_lock_irqsave(hba->host->host_lock, flags);
1696 hba->clk_gating.delay_ms = value;
1697 spin_unlock_irqrestore(hba->host->host_lock, flags);
1698 return count;
1699}
1700
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001701static ssize_t ufshcd_clkgate_delay_pwr_save_show(struct device *dev,
1702 struct device_attribute *attr, char *buf)
1703{
1704 struct ufs_hba *hba = dev_get_drvdata(dev);
1705
1706 return snprintf(buf, PAGE_SIZE, "%lu\n",
1707 hba->clk_gating.delay_ms_pwr_save);
1708}
1709
1710static ssize_t ufshcd_clkgate_delay_pwr_save_store(struct device *dev,
1711 struct device_attribute *attr, const char *buf, size_t count)
1712{
1713 struct ufs_hba *hba = dev_get_drvdata(dev);
1714 unsigned long flags, value;
1715
1716 if (kstrtoul(buf, 0, &value))
1717 return -EINVAL;
1718
1719 spin_lock_irqsave(hba->host->host_lock, flags);
1720
1721 hba->clk_gating.delay_ms_pwr_save = value;
1722 if (ufshcd_is_clkscaling_supported(hba) &&
1723 !hba->clk_scaling.is_scaled_up)
1724 hba->clk_gating.delay_ms = hba->clk_gating.delay_ms_pwr_save;
1725
1726 spin_unlock_irqrestore(hba->host->host_lock, flags);
1727 return count;
1728}
1729
1730static ssize_t ufshcd_clkgate_delay_perf_show(struct device *dev,
1731 struct device_attribute *attr, char *buf)
1732{
1733 struct ufs_hba *hba = dev_get_drvdata(dev);
1734
1735 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms_perf);
1736}
1737
1738static ssize_t ufshcd_clkgate_delay_perf_store(struct device *dev,
1739 struct device_attribute *attr, const char *buf, size_t count)
1740{
1741 struct ufs_hba *hba = dev_get_drvdata(dev);
1742 unsigned long flags, value;
1743
1744 if (kstrtoul(buf, 0, &value))
1745 return -EINVAL;
1746
1747 spin_lock_irqsave(hba->host->host_lock, flags);
1748
1749 hba->clk_gating.delay_ms_perf = value;
1750 if (ufshcd_is_clkscaling_supported(hba) &&
1751 hba->clk_scaling.is_scaled_up)
1752 hba->clk_gating.delay_ms = hba->clk_gating.delay_ms_perf;
1753
1754 spin_unlock_irqrestore(hba->host->host_lock, flags);
1755 return count;
1756}
1757
1758static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1759 struct device_attribute *attr, char *buf)
1760{
1761 struct ufs_hba *hba = dev_get_drvdata(dev);
1762
1763 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1764}
1765
1766static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1767 struct device_attribute *attr, const char *buf, size_t count)
1768{
1769 struct ufs_hba *hba = dev_get_drvdata(dev);
1770 unsigned long flags;
1771 u32 value;
1772
1773 if (kstrtou32(buf, 0, &value))
1774 return -EINVAL;
1775
1776 value = !!value;
1777 if (value == hba->clk_gating.is_enabled)
1778 goto out;
1779
1780 if (value) {
1781 ufshcd_release(hba, false);
1782 } else {
1783 spin_lock_irqsave(hba->host->host_lock, flags);
1784 hba->clk_gating.active_reqs++;
1785 spin_unlock_irqrestore(hba->host->host_lock, flags);
1786 }
1787
1788 hba->clk_gating.is_enabled = value;
1789out:
1790 return count;
1791}
1792
Subhash Jadavani9c807702017-04-01 00:35:51 -07001793static enum hrtimer_restart ufshcd_clkgate_hrtimer_handler(
1794 struct hrtimer *timer)
1795{
1796 struct ufs_hba *hba = container_of(timer, struct ufs_hba,
1797 clk_gating.gate_hrtimer);
1798
Sayali Lokhandeab6db442017-07-06 12:03:10 +05301799 queue_work(hba->clk_gating.clk_gating_workq,
1800 &hba->clk_gating.gate_work);
Subhash Jadavani9c807702017-04-01 00:35:51 -07001801
1802 return HRTIMER_NORESTART;
1803}
1804
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001805static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1806{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001807 struct ufs_clk_gating *gating = &hba->clk_gating;
Sayali Lokhandeab6db442017-07-06 12:03:10 +05301808 char wq_name[sizeof("ufs_clk_gating_00")];
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001809
1810 hba->clk_gating.state = CLKS_ON;
1811
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001812 if (!ufshcd_is_clkgating_allowed(hba))
1813 return;
1814
Subhash Jadavani9c807702017-04-01 00:35:51 -07001815 /*
1816 * Disable hibern8 during clk gating if
1817 * auto hibern8 is supported
1818 */
1819 if (ufshcd_is_auto_hibern8_supported(hba))
1820 hba->caps &= ~UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
1821
1822 INIT_WORK(&gating->gate_work, ufshcd_gate_work);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001823 INIT_WORK(&gating->ungate_work, ufshcd_ungate_work);
Subhash Jadavani9c807702017-04-01 00:35:51 -07001824 /*
1825 * Clock gating work must be executed only after auto hibern8
1826 * timeout has expired in the hardware or after aggressive
1827 * hibern8 on idle software timeout. Using jiffy based low
1828 * resolution delayed work is not reliable to guarantee this,
1829 * hence use a high resolution timer to make sure we schedule
1830 * the gate work precisely more than hibern8 timeout.
1831 *
1832 * Always make sure gating->delay_ms > hibern8_on_idle->delay_ms
1833 */
1834 hrtimer_init(&gating->gate_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1835 gating->gate_hrtimer.function = ufshcd_clkgate_hrtimer_handler;
1836
Sayali Lokhandeab6db442017-07-06 12:03:10 +05301837 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
Subhash Jadavani9c807702017-04-01 00:35:51 -07001838 hba->host->host_no);
Sayali Lokhandeab6db442017-07-06 12:03:10 +05301839 hba->clk_gating.clk_gating_workq =
1840 create_singlethread_workqueue(wq_name);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001841
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001842 gating->is_enabled = true;
1843
Subhash Jadavani9c807702017-04-01 00:35:51 -07001844 gating->delay_ms_pwr_save = UFSHCD_CLK_GATING_DELAY_MS_PWR_SAVE;
1845 gating->delay_ms_perf = UFSHCD_CLK_GATING_DELAY_MS_PERF;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001846
1847 /* start with performance mode */
1848 gating->delay_ms = gating->delay_ms_perf;
1849
1850 if (!ufshcd_is_clkscaling_supported(hba))
1851 goto scaling_not_supported;
1852
1853 gating->delay_pwr_save_attr.show = ufshcd_clkgate_delay_pwr_save_show;
1854 gating->delay_pwr_save_attr.store = ufshcd_clkgate_delay_pwr_save_store;
1855 sysfs_attr_init(&gating->delay_pwr_save_attr.attr);
1856 gating->delay_pwr_save_attr.attr.name = "clkgate_delay_ms_pwr_save";
1857 gating->delay_pwr_save_attr.attr.mode = S_IRUGO | S_IWUSR;
1858 if (device_create_file(hba->dev, &gating->delay_pwr_save_attr))
1859 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay_ms_pwr_save\n");
1860
1861 gating->delay_perf_attr.show = ufshcd_clkgate_delay_perf_show;
1862 gating->delay_perf_attr.store = ufshcd_clkgate_delay_perf_store;
1863 sysfs_attr_init(&gating->delay_perf_attr.attr);
1864 gating->delay_perf_attr.attr.name = "clkgate_delay_ms_perf";
1865 gating->delay_perf_attr.attr.mode = S_IRUGO | S_IWUSR;
1866 if (device_create_file(hba->dev, &gating->delay_perf_attr))
1867 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay_ms_perf\n");
1868
1869 goto add_clkgate_enable;
1870
1871scaling_not_supported:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001872 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1873 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1874 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1875 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1876 hba->clk_gating.delay_attr.attr.mode = S_IRUGO | S_IWUSR;
1877 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1878 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001879
1880add_clkgate_enable:
1881 gating->enable_attr.show = ufshcd_clkgate_enable_show;
1882 gating->enable_attr.store = ufshcd_clkgate_enable_store;
1883 sysfs_attr_init(&gating->enable_attr.attr);
1884 gating->enable_attr.attr.name = "clkgate_enable";
1885 gating->enable_attr.attr.mode = S_IRUGO | S_IWUSR;
1886 if (device_create_file(hba->dev, &gating->enable_attr))
1887 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001888}
1889
1890static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1891{
1892 if (!ufshcd_is_clkgating_allowed(hba))
1893 return;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001894 if (ufshcd_is_clkscaling_supported(hba)) {
1895 device_remove_file(hba->dev,
1896 &hba->clk_gating.delay_pwr_save_attr);
1897 device_remove_file(hba->dev, &hba->clk_gating.delay_perf_attr);
1898 } else {
1899 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1900 }
1901 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Subhash Jadavani9c807702017-04-01 00:35:51 -07001902 ufshcd_cancel_gate_work(hba);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001903 cancel_work_sync(&hba->clk_gating.ungate_work);
Sayali Lokhandeab6db442017-07-06 12:03:10 +05301904 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001905}
1906
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001907static void ufshcd_set_auto_hibern8_timer(struct ufs_hba *hba, u32 delay)
1908{
1909 ufshcd_rmwl(hba, AUTO_HIBERN8_TIMER_SCALE_MASK |
1910 AUTO_HIBERN8_IDLE_TIMER_MASK,
1911 AUTO_HIBERN8_TIMER_SCALE_1_MS | delay,
1912 REG_AUTO_HIBERN8_IDLE_TIMER);
1913 /* Make sure the timer gets applied before further operations */
1914 mb();
1915}
1916
1917/**
1918 * ufshcd_hibern8_hold - Make sure that link is not in hibern8.
1919 *
1920 * @hba: per adapter instance
1921 * @async: This indicates whether caller wants to exit hibern8 asynchronously.
1922 *
1923 * Exit from hibern8 mode and set the link as active.
1924 *
1925 * Return 0 on success, non-zero on failure.
1926 */
1927static int ufshcd_hibern8_hold(struct ufs_hba *hba, bool async)
1928{
1929 int rc = 0;
1930 unsigned long flags;
1931
1932 if (!ufshcd_is_hibern8_on_idle_allowed(hba))
1933 goto out;
1934
1935 spin_lock_irqsave(hba->host->host_lock, flags);
1936 hba->hibern8_on_idle.active_reqs++;
1937
1938 if (ufshcd_eh_in_progress(hba)) {
1939 spin_unlock_irqrestore(hba->host->host_lock, flags);
1940 return 0;
1941 }
1942
1943start:
1944 switch (hba->hibern8_on_idle.state) {
1945 case HIBERN8_EXITED:
1946 break;
1947 case REQ_HIBERN8_ENTER:
1948 if (cancel_delayed_work(&hba->hibern8_on_idle.enter_work)) {
1949 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1950 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1951 hba->hibern8_on_idle.state);
1952 break;
1953 }
1954 /*
1955 * If we here, it means Hibern8 enter work is either done or
1956 * currently running. Hence, fall through to cancel hibern8
1957 * work and exit hibern8.
1958 */
1959 case HIBERN8_ENTERED:
1960 __ufshcd_scsi_block_requests(hba);
1961 hba->hibern8_on_idle.state = REQ_HIBERN8_EXIT;
1962 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1963 hba->hibern8_on_idle.state);
1964 schedule_work(&hba->hibern8_on_idle.exit_work);
1965 /*
1966 * fall through to check if we should wait for this
1967 * work to be done or not.
1968 */
1969 case REQ_HIBERN8_EXIT:
1970 if (async) {
1971 rc = -EAGAIN;
1972 hba->hibern8_on_idle.active_reqs--;
1973 break;
1974 } else {
1975 spin_unlock_irqrestore(hba->host->host_lock, flags);
1976 flush_work(&hba->hibern8_on_idle.exit_work);
1977 /* Make sure state is HIBERN8_EXITED before returning */
1978 spin_lock_irqsave(hba->host->host_lock, flags);
1979 goto start;
1980 }
1981 default:
1982 dev_err(hba->dev, "%s: H8 is in invalid state %d\n",
1983 __func__, hba->hibern8_on_idle.state);
1984 break;
1985 }
1986 spin_unlock_irqrestore(hba->host->host_lock, flags);
1987out:
1988 return rc;
1989}
1990
1991/* host lock must be held before calling this variant */
1992static void __ufshcd_hibern8_release(struct ufs_hba *hba, bool no_sched)
1993{
1994 unsigned long delay_in_jiffies;
1995
1996 if (!ufshcd_is_hibern8_on_idle_allowed(hba))
1997 return;
1998
1999 hba->hibern8_on_idle.active_reqs--;
2000 BUG_ON(hba->hibern8_on_idle.active_reqs < 0);
2001
2002 if (hba->hibern8_on_idle.active_reqs
2003 || hba->hibern8_on_idle.is_suspended
2004 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
2005 || hba->lrb_in_use || hba->outstanding_tasks
2006 || hba->active_uic_cmd || hba->uic_async_done
2007 || ufshcd_eh_in_progress(hba) || no_sched)
2008 return;
2009
2010 hba->hibern8_on_idle.state = REQ_HIBERN8_ENTER;
2011 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
2012 hba->hibern8_on_idle.state);
2013 /*
2014 * Scheduling the delayed work after 1 jiffies will make the work to
2015 * get schedule any time from 0ms to 1000/HZ ms which is not desirable
2016 * for hibern8 enter work as it may impact the performance if it gets
2017 * scheduled almost immediately. Hence make sure that hibern8 enter
2018 * work gets scheduled atleast after 2 jiffies (any time between
2019 * 1000/HZ ms to 2000/HZ ms).
2020 */
2021 delay_in_jiffies = msecs_to_jiffies(hba->hibern8_on_idle.delay_ms);
2022 if (delay_in_jiffies == 1)
2023 delay_in_jiffies++;
2024
2025 schedule_delayed_work(&hba->hibern8_on_idle.enter_work,
2026 delay_in_jiffies);
2027}
2028
2029static void ufshcd_hibern8_release(struct ufs_hba *hba, bool no_sched)
2030{
2031 unsigned long flags;
2032
2033 spin_lock_irqsave(hba->host->host_lock, flags);
2034 __ufshcd_hibern8_release(hba, no_sched);
2035 spin_unlock_irqrestore(hba->host->host_lock, flags);
2036}
2037
2038static void ufshcd_hibern8_enter_work(struct work_struct *work)
2039{
2040 struct ufs_hba *hba = container_of(work, struct ufs_hba,
2041 hibern8_on_idle.enter_work.work);
2042 unsigned long flags;
2043
2044 spin_lock_irqsave(hba->host->host_lock, flags);
2045 if (hba->hibern8_on_idle.is_suspended) {
2046 hba->hibern8_on_idle.state = HIBERN8_EXITED;
2047 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
2048 hba->hibern8_on_idle.state);
2049 goto rel_lock;
2050 }
2051
2052 if (hba->hibern8_on_idle.active_reqs
2053 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
2054 || hba->lrb_in_use || hba->outstanding_tasks
2055 || hba->active_uic_cmd || hba->uic_async_done)
2056 goto rel_lock;
2057
2058 spin_unlock_irqrestore(hba->host->host_lock, flags);
2059
2060 if (ufshcd_is_link_active(hba) && ufshcd_uic_hibern8_enter(hba)) {
2061 /* Enter failed */
2062 hba->hibern8_on_idle.state = HIBERN8_EXITED;
2063 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
2064 hba->hibern8_on_idle.state);
2065 goto out;
2066 }
2067 ufshcd_set_link_hibern8(hba);
2068
2069 /*
2070 * In case you are here to cancel this work the hibern8_on_idle.state
2071 * would be marked as REQ_HIBERN8_EXIT. In this case keep the state
2072 * as REQ_HIBERN8_EXIT which would anyway imply that we are in hibern8
2073 * and a request to exit from it is pending. By doing this way,
2074 * we keep the state machine in tact and this would ultimately
2075 * prevent from doing cancel work multiple times when there are
2076 * new requests arriving before the current cancel work is done.
2077 */
2078 spin_lock_irqsave(hba->host->host_lock, flags);
2079 if (hba->hibern8_on_idle.state == REQ_HIBERN8_ENTER) {
2080 hba->hibern8_on_idle.state = HIBERN8_ENTERED;
2081 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
2082 hba->hibern8_on_idle.state);
2083 }
2084rel_lock:
2085 spin_unlock_irqrestore(hba->host->host_lock, flags);
2086out:
2087 return;
2088}
2089
Subhash Jadavanid13daec2017-05-15 18:17:57 -07002090static void __ufshcd_set_auto_hibern8_timer(struct ufs_hba *hba,
2091 unsigned long delay_ms)
2092{
2093 pm_runtime_get_sync(hba->dev);
2094 ufshcd_hold_all(hba);
2095 ufshcd_scsi_block_requests(hba);
2096 down_write(&hba->lock);
2097 /* wait for all the outstanding requests to finish */
2098 ufshcd_wait_for_doorbell_clr(hba, U64_MAX);
2099 ufshcd_set_auto_hibern8_timer(hba, delay_ms);
2100 up_write(&hba->lock);
2101 ufshcd_scsi_unblock_requests(hba);
2102 ufshcd_release_all(hba);
2103 pm_runtime_put_sync(hba->dev);
2104}
2105
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002106static void ufshcd_hibern8_exit_work(struct work_struct *work)
2107{
2108 int ret;
2109 unsigned long flags;
2110 struct ufs_hba *hba = container_of(work, struct ufs_hba,
2111 hibern8_on_idle.exit_work);
2112
2113 cancel_delayed_work_sync(&hba->hibern8_on_idle.enter_work);
2114
2115 spin_lock_irqsave(hba->host->host_lock, flags);
2116 if ((hba->hibern8_on_idle.state == HIBERN8_EXITED)
2117 || ufshcd_is_link_active(hba)) {
2118 hba->hibern8_on_idle.state = HIBERN8_EXITED;
2119 spin_unlock_irqrestore(hba->host->host_lock, flags);
2120 goto unblock_reqs;
2121 }
2122 spin_unlock_irqrestore(hba->host->host_lock, flags);
2123
2124 /* Exit from hibern8 */
2125 if (ufshcd_is_link_hibern8(hba)) {
Asutosh Das3da913a2017-03-24 10:32:16 +05302126 hba->ufs_stats.clk_hold.ctx = H8_EXIT_WORK;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002127 ufshcd_hold(hba, false);
2128 ret = ufshcd_uic_hibern8_exit(hba);
Asutosh Das3da913a2017-03-24 10:32:16 +05302129 hba->ufs_stats.clk_rel.ctx = H8_EXIT_WORK;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002130 ufshcd_release(hba, false);
2131 if (!ret) {
2132 spin_lock_irqsave(hba->host->host_lock, flags);
2133 ufshcd_set_link_active(hba);
2134 hba->hibern8_on_idle.state = HIBERN8_EXITED;
2135 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
2136 hba->hibern8_on_idle.state);
2137 spin_unlock_irqrestore(hba->host->host_lock, flags);
2138 }
2139 }
2140unblock_reqs:
2141 ufshcd_scsi_unblock_requests(hba);
2142}
2143
2144static ssize_t ufshcd_hibern8_on_idle_delay_show(struct device *dev,
2145 struct device_attribute *attr, char *buf)
2146{
2147 struct ufs_hba *hba = dev_get_drvdata(dev);
2148
2149 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->hibern8_on_idle.delay_ms);
2150}
2151
2152static ssize_t ufshcd_hibern8_on_idle_delay_store(struct device *dev,
2153 struct device_attribute *attr, const char *buf, size_t count)
2154{
2155 struct ufs_hba *hba = dev_get_drvdata(dev);
2156 unsigned long flags, value;
Subhash Jadavanid13daec2017-05-15 18:17:57 -07002157 bool change = true;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002158
2159 if (kstrtoul(buf, 0, &value))
2160 return -EINVAL;
2161
2162 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanid13daec2017-05-15 18:17:57 -07002163 if (hba->hibern8_on_idle.delay_ms == value)
2164 change = false;
2165
2166 if (value >= hba->clk_gating.delay_ms_pwr_save ||
2167 value >= hba->clk_gating.delay_ms_perf) {
2168 dev_err(hba->dev, "hibern8_on_idle_delay (%lu) can not be >= to clkgate_delay_ms_pwr_save (%lu) and clkgate_delay_ms_perf (%lu)\n",
2169 value, hba->clk_gating.delay_ms_pwr_save,
2170 hba->clk_gating.delay_ms_perf);
2171 spin_unlock_irqrestore(hba->host->host_lock, flags);
2172 return -EINVAL;
2173 }
2174
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002175 hba->hibern8_on_idle.delay_ms = value;
2176 spin_unlock_irqrestore(hba->host->host_lock, flags);
2177
2178 /* Update auto hibern8 timer value if supported */
Subhash Jadavanid13daec2017-05-15 18:17:57 -07002179 if (change && ufshcd_is_auto_hibern8_supported(hba) &&
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002180 hba->hibern8_on_idle.is_enabled)
Subhash Jadavanid13daec2017-05-15 18:17:57 -07002181 __ufshcd_set_auto_hibern8_timer(hba,
2182 hba->hibern8_on_idle.delay_ms);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002183
2184 return count;
2185}
2186
2187static ssize_t ufshcd_hibern8_on_idle_enable_show(struct device *dev,
2188 struct device_attribute *attr, char *buf)
2189{
2190 struct ufs_hba *hba = dev_get_drvdata(dev);
2191
2192 return snprintf(buf, PAGE_SIZE, "%d\n",
2193 hba->hibern8_on_idle.is_enabled);
2194}
2195
2196static ssize_t ufshcd_hibern8_on_idle_enable_store(struct device *dev,
2197 struct device_attribute *attr, const char *buf, size_t count)
2198{
2199 struct ufs_hba *hba = dev_get_drvdata(dev);
2200 unsigned long flags;
2201 u32 value;
2202
2203 if (kstrtou32(buf, 0, &value))
2204 return -EINVAL;
2205
2206 value = !!value;
2207 if (value == hba->hibern8_on_idle.is_enabled)
2208 goto out;
2209
2210 /* Update auto hibern8 timer value if supported */
2211 if (ufshcd_is_auto_hibern8_supported(hba)) {
Subhash Jadavanid13daec2017-05-15 18:17:57 -07002212 __ufshcd_set_auto_hibern8_timer(hba,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002213 value ? hba->hibern8_on_idle.delay_ms : value);
2214 goto update;
2215 }
2216
2217 if (value) {
2218 /*
2219 * As clock gating work would wait for the hibern8 enter work
2220 * to finish, clocks would remain on during hibern8 enter work.
2221 */
2222 ufshcd_hold(hba, false);
2223 ufshcd_release_all(hba);
2224 } else {
2225 spin_lock_irqsave(hba->host->host_lock, flags);
2226 hba->hibern8_on_idle.active_reqs++;
2227 spin_unlock_irqrestore(hba->host->host_lock, flags);
2228 }
2229
2230update:
2231 hba->hibern8_on_idle.is_enabled = value;
2232out:
2233 return count;
2234}
2235
2236static void ufshcd_init_hibern8_on_idle(struct ufs_hba *hba)
2237{
2238 /* initialize the state variable here */
2239 hba->hibern8_on_idle.state = HIBERN8_EXITED;
2240
2241 if (!ufshcd_is_hibern8_on_idle_allowed(hba) &&
2242 !ufshcd_is_auto_hibern8_supported(hba))
2243 return;
2244
2245 if (ufshcd_is_auto_hibern8_supported(hba)) {
Subhash Jadavani9c807702017-04-01 00:35:51 -07002246 hba->hibern8_on_idle.delay_ms = 1;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002247 hba->hibern8_on_idle.state = AUTO_HIBERN8;
2248 /*
2249 * Disable SW hibern8 enter on idle in case
2250 * auto hibern8 is supported
2251 */
2252 hba->caps &= ~UFSHCD_CAP_HIBERN8_ENTER_ON_IDLE;
2253 } else {
Subhash Jadavani9c807702017-04-01 00:35:51 -07002254 hba->hibern8_on_idle.delay_ms = 10;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002255 INIT_DELAYED_WORK(&hba->hibern8_on_idle.enter_work,
2256 ufshcd_hibern8_enter_work);
2257 INIT_WORK(&hba->hibern8_on_idle.exit_work,
2258 ufshcd_hibern8_exit_work);
2259 }
2260
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002261 hba->hibern8_on_idle.is_enabled = true;
2262
2263 hba->hibern8_on_idle.delay_attr.show =
2264 ufshcd_hibern8_on_idle_delay_show;
2265 hba->hibern8_on_idle.delay_attr.store =
2266 ufshcd_hibern8_on_idle_delay_store;
2267 sysfs_attr_init(&hba->hibern8_on_idle.delay_attr.attr);
2268 hba->hibern8_on_idle.delay_attr.attr.name = "hibern8_on_idle_delay_ms";
2269 hba->hibern8_on_idle.delay_attr.attr.mode = S_IRUGO | S_IWUSR;
2270 if (device_create_file(hba->dev, &hba->hibern8_on_idle.delay_attr))
2271 dev_err(hba->dev, "Failed to create sysfs for hibern8_on_idle_delay\n");
2272
2273 hba->hibern8_on_idle.enable_attr.show =
2274 ufshcd_hibern8_on_idle_enable_show;
2275 hba->hibern8_on_idle.enable_attr.store =
2276 ufshcd_hibern8_on_idle_enable_store;
2277 sysfs_attr_init(&hba->hibern8_on_idle.enable_attr.attr);
2278 hba->hibern8_on_idle.enable_attr.attr.name = "hibern8_on_idle_enable";
2279 hba->hibern8_on_idle.enable_attr.attr.mode = S_IRUGO | S_IWUSR;
2280 if (device_create_file(hba->dev, &hba->hibern8_on_idle.enable_attr))
2281 dev_err(hba->dev, "Failed to create sysfs for hibern8_on_idle_enable\n");
2282}
2283
2284static void ufshcd_exit_hibern8_on_idle(struct ufs_hba *hba)
2285{
2286 if (!ufshcd_is_hibern8_on_idle_allowed(hba) &&
2287 !ufshcd_is_auto_hibern8_supported(hba))
2288 return;
2289 device_remove_file(hba->dev, &hba->hibern8_on_idle.delay_attr);
2290 device_remove_file(hba->dev, &hba->hibern8_on_idle.enable_attr);
2291}
2292
2293static void ufshcd_hold_all(struct ufs_hba *hba)
2294{
2295 ufshcd_hold(hba, false);
2296 ufshcd_hibern8_hold(hba, false);
2297}
2298
2299static void ufshcd_release_all(struct ufs_hba *hba)
2300{
2301 ufshcd_hibern8_release(hba, false);
2302 ufshcd_release(hba, false);
2303}
2304
Sahitya Tummala856b3482014-09-25 15:32:34 +03002305/* Must be called with host lock acquired */
2306static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
2307{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002308 bool queue_resume_work = false;
2309
2310 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03002311 return;
2312
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002313 if (!hba->clk_scaling.active_reqs++)
2314 queue_resume_work = true;
2315
2316 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
2317 return;
2318
2319 if (queue_resume_work)
2320 queue_work(hba->clk_scaling.workq,
2321 &hba->clk_scaling.resume_work);
2322
2323 if (!hba->clk_scaling.window_start_t) {
2324 hba->clk_scaling.window_start_t = jiffies;
2325 hba->clk_scaling.tot_busy_t = 0;
2326 hba->clk_scaling.is_busy_started = false;
2327 }
2328
Sahitya Tummala856b3482014-09-25 15:32:34 +03002329 if (!hba->clk_scaling.is_busy_started) {
2330 hba->clk_scaling.busy_start_t = ktime_get();
2331 hba->clk_scaling.is_busy_started = true;
2332 }
2333}
2334
2335static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
2336{
2337 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
2338
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002339 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03002340 return;
2341
2342 if (!hba->outstanding_reqs && scaling->is_busy_started) {
2343 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
2344 scaling->busy_start_t));
2345 scaling->busy_start_t = ktime_set(0, 0);
2346 scaling->is_busy_started = false;
2347 }
2348}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002349
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302350/**
2351 * ufshcd_send_command - Send SCSI or device management commands
2352 * @hba: per adapter instance
2353 * @task_tag: Task tag of the command
2354 */
2355static inline
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002356int ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302357{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002358 int ret = 0;
2359
2360 hba->lrb[task_tag].issue_time_stamp = ktime_get();
2361 hba->lrb[task_tag].complete_time_stamp = ktime_set(0, 0);
Sahitya Tummala856b3482014-09-25 15:32:34 +03002362 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302363 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302364 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002365 /* Make sure that doorbell is committed immediately */
2366 wmb();
Subhash Jadavani114437e2017-11-08 16:22:16 -08002367 ufshcd_cond_add_cmd_trace(hba, task_tag,
2368 hba->lrb[task_tag].cmd ? "scsi_send" : "dev_cmd_send");
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002369 ufshcd_update_tag_stats(hba, task_tag);
2370 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302371}
2372
2373/**
2374 * ufshcd_copy_sense_data - Copy sense data in case of check condition
2375 * @lrb - pointer to local reference block
2376 */
2377static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
2378{
2379 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05302380 if (lrbp->sense_buffer &&
2381 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002382 int len_to_copy;
2383
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302384 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002385 len_to_copy = min_t(int, RESPONSE_UPIU_SENSE_DATA_LENGTH, len);
2386
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302387 memcpy(lrbp->sense_buffer,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302388 lrbp->ucd_rsp_ptr->sr.sense_data,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002389 min_t(int, len_to_copy, UFSHCD_REQ_SENSE_SIZE));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302390 }
2391}
2392
2393/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302394 * ufshcd_copy_query_response() - Copy the Query Response and the data
2395 * descriptor
2396 * @hba: per adapter instance
2397 * @lrb - pointer to local reference block
2398 */
2399static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002400int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05302401{
2402 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2403
Dolev Raviv68078d52013-07-30 00:35:58 +05302404 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302405
Dolev Raviv68078d52013-07-30 00:35:58 +05302406 /* Get the descriptor */
2407 if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002408 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05302409 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002410 u16 resp_len;
2411 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05302412
2413 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002414 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302415 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002416 buf_len = be16_to_cpu(
2417 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002418 if (likely(buf_len >= resp_len)) {
2419 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
2420 } else {
2421 dev_warn(hba->dev,
2422 "%s: Response size is bigger than buffer",
2423 __func__);
2424 return -EINVAL;
2425 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302426 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002427
2428 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302429}
2430
2431/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302432 * ufshcd_hba_capabilities - Read controller capabilities
2433 * @hba: per adapter instance
2434 */
2435static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
2436{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302437 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302438
2439 /* nutrs and nutmrs are 0 based values */
2440 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2441 hba->nutmrs =
2442 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
2443}
2444
2445/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302446 * ufshcd_ready_for_uic_cmd - Check if controller is ready
2447 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302448 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302449 * Return true on success, else false
2450 */
2451static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2452{
2453 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2454 return true;
2455 else
2456 return false;
2457}
2458
2459/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05302460 * ufshcd_get_upmcrs - Get the power mode change request status
2461 * @hba: Pointer to adapter instance
2462 *
2463 * This function gets the UPMCRS field of HCS register
2464 * Returns value of UPMCRS field
2465 */
2466static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2467{
2468 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2469}
2470
2471/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302472 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
2473 * @hba: per adapter instance
2474 * @uic_cmd: UIC command
2475 *
2476 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302477 */
2478static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302479ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302480{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302481 WARN_ON(hba->active_uic_cmd);
2482
2483 hba->active_uic_cmd = uic_cmd;
2484
Subhash Jadavani114437e2017-11-08 16:22:16 -08002485 ufshcd_dme_cmd_log(hba, "dme_send", hba->active_uic_cmd->command);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302486 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302487 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2488 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2489 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302490
2491 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302492 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302493 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302494}
2495
2496/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302497 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2498 * @hba: per adapter instance
2499 * @uic_command: UIC command
2500 *
2501 * Must be called with mutex held.
2502 * Returns 0 only if success.
2503 */
2504static int
2505ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2506{
2507 int ret;
2508 unsigned long flags;
2509
2510 if (wait_for_completion_timeout(&uic_cmd->done,
2511 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2512 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2513 else
2514 ret = -ETIMEDOUT;
2515
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002516 if (ret)
2517 ufsdbg_set_err_state(hba);
2518
Subhash Jadavani114437e2017-11-08 16:22:16 -08002519 ufshcd_dme_cmd_log(hba, "dme_cmpl_1", hba->active_uic_cmd->command);
Can Guob7147732017-04-18 16:22:56 +08002520
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302521 spin_lock_irqsave(hba->host->host_lock, flags);
2522 hba->active_uic_cmd = NULL;
2523 spin_unlock_irqrestore(hba->host->host_lock, flags);
2524
2525 return ret;
2526}
2527
2528/**
2529 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2530 * @hba: per adapter instance
2531 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002532 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302533 *
2534 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002535 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302536 * Returns 0 only if success.
2537 */
2538static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002539__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2540 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302541{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302542 if (!ufshcd_ready_for_uic_cmd(hba)) {
2543 dev_err(hba->dev,
2544 "Controller not ready to accept UIC commands\n");
2545 return -EIO;
2546 }
2547
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002548 if (completion)
2549 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302550
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302551 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302552
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002553 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302554}
2555
2556/**
2557 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2558 * @hba: per adapter instance
2559 * @uic_cmd: UIC command
2560 *
2561 * Returns 0 only if success.
2562 */
2563static int
2564ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2565{
2566 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002567 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302568
Asutosh Das3da913a2017-03-24 10:32:16 +05302569 hba->ufs_stats.clk_hold.ctx = UIC_CMD_SEND;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002570 ufshcd_hold_all(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302571 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002572 ufshcd_add_delay_before_dme_cmd(hba);
2573
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002574 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002575 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002576 spin_unlock_irqrestore(hba->host->host_lock, flags);
2577 if (!ret)
2578 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2579
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002580 ufshcd_save_tstamp_of_last_dme_cmd(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302581 mutex_unlock(&hba->uic_cmd_mutex);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002582 ufshcd_release_all(hba);
Asutosh Das3da913a2017-03-24 10:32:16 +05302583 hba->ufs_stats.clk_rel.ctx = UIC_CMD_SEND;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302584
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002585 ufsdbg_error_inject_dispatcher(hba,
2586 ERR_INJECT_UIC, 0, &ret);
2587
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302588 return ret;
2589}
2590
2591/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302592 * ufshcd_map_sg - Map scatter-gather list to prdt
2593 * @lrbp - pointer to local reference block
2594 *
2595 * Returns 0 in case of success, non-zero value in case of failure
2596 */
Kiwoong Kim9b41ed72017-04-04 19:32:05 +00002597static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302598{
2599 struct ufshcd_sg_entry *prd_table;
2600 struct scatterlist *sg;
2601 struct scsi_cmnd *cmd;
2602 int sg_segments;
2603 int i;
2604
2605 cmd = lrbp->cmd;
2606 sg_segments = scsi_dma_map(cmd);
2607 if (sg_segments < 0)
2608 return sg_segments;
2609
2610 if (sg_segments) {
Kiwoong Kim9b41ed72017-04-04 19:32:05 +00002611 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2612 lrbp->utr_descriptor_ptr->prd_table_length =
2613 cpu_to_le16((u16)(sg_segments *
2614 sizeof(struct ufshcd_sg_entry)));
2615 else
2616 lrbp->utr_descriptor_ptr->prd_table_length =
2617 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302618
2619 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2620
2621 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2622 prd_table[i].size =
2623 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2624 prd_table[i].base_addr =
2625 cpu_to_le32(lower_32_bits(sg->dma_address));
2626 prd_table[i].upper_addr =
2627 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002628 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302629 }
2630 } else {
2631 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2632 }
2633
2634 return 0;
2635}
2636
2637/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302638 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302639 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302640 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302641 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302642static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302643{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302644 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2645
2646 if (hba->ufs_version == UFSHCI_VERSION_10) {
2647 u32 rw;
2648 rw = set & INTERRUPT_MASK_RW_VER_10;
2649 set = rw | ((set ^ intrs) & intrs);
2650 } else {
2651 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302652 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302653
2654 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2655}
2656
2657/**
2658 * ufshcd_disable_intr - disable interrupts
2659 * @hba: per adapter instance
2660 * @intrs: interrupt bits
2661 */
2662static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2663{
2664 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2665
2666 if (hba->ufs_version == UFSHCI_VERSION_10) {
2667 u32 rw;
2668 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2669 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2670 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2671
2672 } else {
2673 set &= ~intrs;
2674 }
2675
2676 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302677}
2678
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002679static int ufshcd_prepare_crypto_utrd(struct ufs_hba *hba,
2680 struct ufshcd_lrb *lrbp)
2681{
2682 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2683 u8 cc_index = 0;
2684 bool enable = false;
2685 u64 dun = 0;
2686 int ret;
2687
2688 /*
2689 * Call vendor specific code to get crypto info for this request:
2690 * enable, crypto config. index, DUN.
2691 * If bypass is set, don't bother setting the other fields.
2692 */
2693 ret = ufshcd_vops_crypto_req_setup(hba, lrbp, &cc_index, &enable, &dun);
2694 if (ret) {
2695 if (ret != -EAGAIN) {
2696 dev_err(hba->dev,
2697 "%s: failed to setup crypto request (%d)\n",
2698 __func__, ret);
2699 }
2700
2701 return ret;
2702 }
2703
2704 if (!enable)
2705 goto out;
2706
2707 req_desc->header.dword_0 |= cc_index | UTRD_CRYPTO_ENABLE;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002708 req_desc->header.dword_1 = (u32)(dun & 0xFFFFFFFF);
2709 req_desc->header.dword_3 = (u32)((dun >> 32) & 0xFFFFFFFF);
2710out:
2711 return 0;
2712}
2713
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302714/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302715 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2716 * descriptor according to request
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002717 * @hba: per adapter instance
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302718 * @lrbp: pointer to local reference block
2719 * @upiu_flags: flags required in the header
2720 * @cmd_dir: requests data direction
2721 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002722static int ufshcd_prepare_req_desc_hdr(struct ufs_hba *hba,
2723 struct ufshcd_lrb *lrbp, u32 *upiu_flags,
2724 enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302725{
2726 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2727 u32 data_direction;
2728 u32 dword_0;
2729
2730 if (cmd_dir == DMA_FROM_DEVICE) {
2731 data_direction = UTP_DEVICE_TO_HOST;
2732 *upiu_flags = UPIU_CMD_FLAGS_READ;
2733 } else if (cmd_dir == DMA_TO_DEVICE) {
2734 data_direction = UTP_HOST_TO_DEVICE;
2735 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2736 } else {
2737 data_direction = UTP_NO_DATA_TRANSFER;
2738 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2739 }
2740
2741 dword_0 = data_direction | (lrbp->command_type
2742 << UPIU_COMMAND_TYPE_OFFSET);
2743 if (lrbp->intr_cmd)
2744 dword_0 |= UTP_REQ_DESC_INT_CMD;
2745
2746 /* Transfer request descriptor header fields */
2747 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002748 /* dword_1 is reserved, hence it is set to 0 */
2749 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302750 /*
2751 * assigning invalid value for command status. Controller
2752 * updates OCS on command completion, with the command
2753 * status
2754 */
2755 req_desc->header.dword_2 =
2756 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002757 /* dword_3 is reserved, hence it is set to 0 */
2758 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002759
2760 req_desc->prd_table_length = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002761
2762 if (ufshcd_is_crypto_supported(hba))
2763 return ufshcd_prepare_crypto_utrd(hba, lrbp);
2764
2765 return 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302766}
2767
2768/**
2769 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2770 * for scsi commands
2771 * @lrbp - local reference block pointer
2772 * @upiu_flags - flags
2773 */
2774static
2775void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2776{
2777 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002778 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302779
2780 /* command descriptor fields */
2781 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2782 UPIU_TRANSACTION_COMMAND, upiu_flags,
2783 lrbp->lun, lrbp->task_tag);
2784 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2785 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2786
2787 /* Total EHS length and Data segment length will be zero */
2788 ucd_req_ptr->header.dword_2 = 0;
2789
2790 ucd_req_ptr->sc.exp_data_transfer_len =
2791 cpu_to_be32(lrbp->cmd->sdb.length);
2792
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002793 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002794 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002795 if (cdb_len < MAX_CDB_SIZE)
2796 memset(ucd_req_ptr->sc.cdb + cdb_len, 0,
2797 (MAX_CDB_SIZE - cdb_len));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002798 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302799}
2800
Dolev Raviv68078d52013-07-30 00:35:58 +05302801/**
2802 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2803 * for query requsts
2804 * @hba: UFS hba
2805 * @lrbp: local reference block pointer
2806 * @upiu_flags: flags
2807 */
2808static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2809 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2810{
2811 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2812 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302813 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302814 u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
2815
2816 /* Query request header */
2817 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2818 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2819 lrbp->lun, lrbp->task_tag);
2820 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2821 0, query->request.query_func, 0, 0);
2822
Zang Leigang68612852016-08-25 17:39:19 +08002823 /* Data segment length only need for WRITE_DESC */
2824 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2825 ucd_req_ptr->header.dword_2 =
2826 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2827 else
2828 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302829
2830 /* Copy the Query Request buffer as is */
2831 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2832 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302833
2834 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002835 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2836 memcpy(descp, query->descriptor, len);
2837
Yaniv Gardi51047262016-02-01 15:02:38 +02002838 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302839}
2840
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302841static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2842{
2843 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2844
2845 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2846
2847 /* command descriptor fields */
2848 ucd_req_ptr->header.dword_0 =
2849 UPIU_HEADER_DWORD(
2850 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002851 /* clear rest of the fields of basic header */
2852 ucd_req_ptr->header.dword_1 = 0;
2853 ucd_req_ptr->header.dword_2 = 0;
2854
2855 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302856}
2857
2858/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002859 * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302860 * @hba - per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302861 * @lrb - pointer to local reference block
2862 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002863static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302864{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302865 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302866 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302867
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002868 switch (lrbp->command_type) {
2869 case UTP_CMD_TYPE_SCSI:
2870 if (likely(lrbp->cmd)) {
2871 ret = ufshcd_prepare_req_desc_hdr(hba, lrbp,
2872 &upiu_flags, lrbp->cmd->sc_data_direction);
2873 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2874 } else {
2875 ret = -EINVAL;
2876 }
2877 break;
2878 case UTP_CMD_TYPE_DEV_MANAGE:
2879 ret = ufshcd_prepare_req_desc_hdr(hba, lrbp, &upiu_flags,
2880 DMA_NONE);
2881 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2882 ufshcd_prepare_utp_query_req_upiu(
2883 hba, lrbp, upiu_flags);
2884 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2885 ufshcd_prepare_utp_nop_upiu(lrbp);
2886 else
2887 ret = -EINVAL;
2888 break;
2889 case UTP_CMD_TYPE_UFS:
2890 /* For UFS native command implementation */
2891 ret = -ENOTSUPP;
2892 dev_err(hba->dev, "%s: UFS native command are not supported\n",
2893 __func__);
2894 break;
2895 default:
2896 ret = -ENOTSUPP;
2897 dev_err(hba->dev, "%s: unknown command type: 0x%x\n",
2898 __func__, lrbp->command_type);
2899 break;
2900 } /* end of switch */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302901
2902 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302903}
2904
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002905/*
2906 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
2907 * @scsi_lun: scsi LUN id
2908 *
2909 * Returns UPIU LUN id
2910 */
2911static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
2912{
2913 if (scsi_is_wlun(scsi_lun))
2914 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
2915 | UFS_UPIU_WLUN_ID;
2916 else
2917 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
2918}
2919
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302920/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002921 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2922 * @scsi_lun: UPIU W-LUN id
2923 *
2924 * Returns SCSI W-LUN id
2925 */
2926static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2927{
2928 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2929}
2930
2931/**
Subhash Jadavani9c807702017-04-01 00:35:51 -07002932 * ufshcd_get_write_lock - synchronize between shutdown, scaling &
2933 * arrival of requests
2934 * @hba: ufs host
2935 *
2936 * Lock is predominantly held by shutdown context thus, ensuring
2937 * that no requests from any other context may sneak through.
2938 */
2939static inline void ufshcd_get_write_lock(struct ufs_hba *hba)
2940{
2941 down_write(&hba->lock);
2942}
2943
2944/**
2945 * ufshcd_get_read_lock - synchronize between shutdown, scaling &
2946 * arrival of requests
2947 * @hba: ufs host
2948 *
2949 * Returns 1 if acquired, < 0 on contention
2950 *
2951 * After shutdown's initiated, allow requests only directed to the
2952 * well known device lun. The sync between scaling & issue is maintained
2953 * as is and this restructuring syncs shutdown with these too.
2954 */
2955static int ufshcd_get_read_lock(struct ufs_hba *hba, u64 lun)
2956{
2957 int err = 0;
2958
2959 err = down_read_trylock(&hba->lock);
2960 if (err > 0)
2961 goto out;
2962 /* let requests for well known device lun to go through */
2963 if (ufshcd_scsi_to_upiu_lun(lun) == UFS_UPIU_UFS_DEVICE_WLUN)
2964 return 0;
2965 else if (!ufshcd_is_shutdown_ongoing(hba))
2966 return -EAGAIN;
2967 else
2968 return -EPERM;
2969
2970out:
2971 return err;
2972}
2973
2974/**
2975 * ufshcd_put_read_lock - synchronize between shutdown, scaling &
2976 * arrival of requests
2977 * @hba: ufs host
2978 *
2979 * Returns none
2980 */
2981static inline void ufshcd_put_read_lock(struct ufs_hba *hba)
2982{
2983 up_read(&hba->lock);
2984}
2985
2986/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302987 * ufshcd_queuecommand - main entry point for SCSI requests
2988 * @cmd: command from SCSI Midlayer
2989 * @done: call back function
2990 *
2991 * Returns 0 for success, non-zero in case of failure
2992 */
2993static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2994{
2995 struct ufshcd_lrb *lrbp;
2996 struct ufs_hba *hba;
2997 unsigned long flags;
2998 int tag;
2999 int err = 0;
Subhash Jadavani9c807702017-04-01 00:35:51 -07003000 bool has_read_lock = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303001
3002 hba = shost_priv(host);
3003
Subhash Jadavani9c807702017-04-01 00:35:51 -07003004 if (!cmd || !cmd->request || !hba)
3005 return -EINVAL;
3006
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303007 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02003008 if (!ufshcd_valid_tag(hba, tag)) {
3009 dev_err(hba->dev,
3010 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
3011 __func__, tag, cmd, cmd->request);
3012 BUG();
3013 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303014
Subhash Jadavani9c807702017-04-01 00:35:51 -07003015 err = ufshcd_get_read_lock(hba, cmd->device->lun);
3016 if (unlikely(err < 0)) {
3017 if (err == -EPERM) {
3018 set_host_byte(cmd, DID_ERROR);
3019 cmd->scsi_done(cmd);
3020 return 0;
3021 }
3022 if (err == -EAGAIN)
3023 return SCSI_MLQUEUE_HOST_BUSY;
3024 } else if (err == 1) {
3025 has_read_lock = true;
3026 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003027
Subhash Jadavanief542222017-08-02 16:23:55 -07003028 /*
3029 * err might be non-zero here but logic later in this function
3030 * assumes that err is set to 0.
3031 */
3032 err = 0;
3033
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05303034 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani9c807702017-04-01 00:35:51 -07003035
3036 /* if error handling is in progress, return host busy */
3037 if (ufshcd_eh_in_progress(hba)) {
3038 err = SCSI_MLQUEUE_HOST_BUSY;
3039 goto out_unlock;
3040 }
3041
Subhash Jadavanief542222017-08-02 16:23:55 -07003042 if (hba->extcon && ufshcd_is_card_offline(hba)) {
3043 set_host_byte(cmd, DID_BAD_TARGET);
3044 cmd->scsi_done(cmd);
3045 goto out_unlock;
3046 }
3047
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05303048 switch (hba->ufshcd_state) {
3049 case UFSHCD_STATE_OPERATIONAL:
3050 break;
Zang Leiganga17bddc2017-04-04 19:32:20 +00003051 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05303052 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303053 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05303054 goto out_unlock;
3055 case UFSHCD_STATE_ERROR:
3056 set_host_byte(cmd, DID_ERROR);
3057 cmd->scsi_done(cmd);
3058 goto out_unlock;
3059 default:
3060 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
3061 __func__, hba->ufshcd_state);
3062 set_host_byte(cmd, DID_BAD_TARGET);
3063 cmd->scsi_done(cmd);
3064 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303065 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05303066 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303067
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003068 hba->req_abort_count = 0;
3069
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303070 /* acquire the tag to make sure device cmds don't use it */
3071 if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
3072 /*
3073 * Dev manage command in progress, requeue the command.
3074 * Requeuing the command helps in cases where the request *may*
3075 * find different tag instead of waiting for dev manage command
3076 * completion.
3077 */
3078 err = SCSI_MLQUEUE_HOST_BUSY;
3079 goto out;
3080 }
3081
Asutosh Das3da913a2017-03-24 10:32:16 +05303082 hba->ufs_stats.clk_hold.ctx = QUEUE_CMD;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003083 err = ufshcd_hold(hba, true);
3084 if (err) {
3085 err = SCSI_MLQUEUE_HOST_BUSY;
3086 clear_bit_unlock(tag, &hba->lrb_in_use);
3087 goto out;
3088 }
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07003089
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003090 if (ufshcd_is_clkgating_allowed(hba))
3091 WARN_ON(hba->clk_gating.state != CLKS_ON);
3092
3093 err = ufshcd_hibern8_hold(hba, true);
3094 if (err) {
3095 clear_bit_unlock(tag, &hba->lrb_in_use);
3096 err = SCSI_MLQUEUE_HOST_BUSY;
Asutosh Das3da913a2017-03-24 10:32:16 +05303097 hba->ufs_stats.clk_rel.ctx = QUEUE_CMD;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003098 ufshcd_release(hba, true);
3099 goto out;
3100 }
3101 if (ufshcd_is_hibern8_on_idle_allowed(hba))
3102 WARN_ON(hba->hibern8_on_idle.state != HIBERN8_EXITED);
3103
3104 /* Vote PM QoS for the request */
3105 ufshcd_vops_pm_qos_req_start(hba, cmd->request);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003106
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07003107 /* IO svc time latency histogram */
Subhash Jadavani9c807702017-04-01 00:35:51 -07003108 if (hba->latency_hist_enabled &&
3109 (cmd->request->cmd_type == REQ_TYPE_FS)) {
3110 cmd->request->lat_hist_io_start = ktime_get();
3111 cmd->request->lat_hist_enabled = 1;
3112 } else {
3113 cmd->request->lat_hist_enabled = 0;
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07003114 }
3115
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303116 WARN_ON(hba->clk_gating.state != CLKS_ON);
3117
3118 lrbp = &hba->lrb[tag];
3119
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303120 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303121 lrbp->cmd = cmd;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003122 lrbp->sense_bufflen = UFSHCD_REQ_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303123 lrbp->sense_buffer = cmd->sense_buffer;
3124 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03003125 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03003126 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003127 lrbp->command_type = UTP_CMD_TYPE_SCSI;
3128 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303129
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003130 /* form UPIU before issuing the command */
3131 err = ufshcd_compose_upiu(hba, lrbp);
3132 if (err) {
3133 if (err != -EAGAIN)
3134 dev_err(hba->dev,
3135 "%s: failed to compose upiu %d\n",
3136 __func__, err);
Stephen Boyd9bc70c32017-03-01 16:58:38 -08003137 lrbp->cmd = NULL;
3138 clear_bit_unlock(tag, &hba->lrb_in_use);
3139 ufshcd_release_all(hba);
3140 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
3141 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003142 }
Joao Pinto300bb132016-05-11 12:21:27 +01003143
Kiwoong Kim9b41ed72017-04-04 19:32:05 +00003144 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303145 if (err) {
3146 lrbp->cmd = NULL;
3147 clear_bit_unlock(tag, &hba->lrb_in_use);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003148 ufshcd_release_all(hba);
3149 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303150 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303151 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303152
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003153 err = ufshcd_vops_crypto_engine_cfg_start(hba, tag);
3154 if (err) {
3155 if (err != -EAGAIN)
3156 dev_err(hba->dev,
3157 "%s: failed to configure crypto engine %d\n",
3158 __func__, err);
3159
3160 scsi_dma_unmap(lrbp->cmd);
3161 lrbp->cmd = NULL;
3162 clear_bit_unlock(tag, &hba->lrb_in_use);
3163 ufshcd_release_all(hba);
3164 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
3165
3166 goto out;
3167 }
3168
3169 /* Make sure descriptors are ready before ringing the doorbell */
3170 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303171 /* issue command to the controller */
3172 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003173
3174 err = ufshcd_send_command(hba, tag);
3175 if (err) {
3176 spin_unlock_irqrestore(hba->host->host_lock, flags);
3177 scsi_dma_unmap(lrbp->cmd);
3178 lrbp->cmd = NULL;
3179 clear_bit_unlock(tag, &hba->lrb_in_use);
3180 ufshcd_release_all(hba);
3181 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
3182 ufshcd_vops_crypto_engine_cfg_end(hba, lrbp, cmd->request);
3183 dev_err(hba->dev, "%s: failed sending command, %d\n",
3184 __func__, err);
3185 err = DID_ERROR;
3186 goto out;
3187 }
3188
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05303189out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303190 spin_unlock_irqrestore(hba->host->host_lock, flags);
3191out:
Subhash Jadavani9c807702017-04-01 00:35:51 -07003192 if (has_read_lock)
3193 ufshcd_put_read_lock(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303194 return err;
3195}
3196
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303197static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
3198 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
3199{
3200 lrbp->cmd = NULL;
3201 lrbp->sense_bufflen = 0;
3202 lrbp->sense_buffer = NULL;
3203 lrbp->task_tag = tag;
3204 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003205 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303206 lrbp->intr_cmd = true; /* No interrupt aggregation */
3207 hba->dev_cmd.type = cmd_type;
3208
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003209 return ufshcd_compose_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303210}
3211
3212static int
3213ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
3214{
3215 int err = 0;
3216 unsigned long flags;
3217 u32 mask = 1 << tag;
3218
3219 /* clear outstanding transaction before retry */
3220 spin_lock_irqsave(hba->host->host_lock, flags);
3221 ufshcd_utrl_clear(hba, tag);
3222 spin_unlock_irqrestore(hba->host->host_lock, flags);
3223
3224 /*
3225 * wait for for h/w to clear corresponding bit in door-bell.
3226 * max. wait is 1 sec.
3227 */
3228 err = ufshcd_wait_for_register(hba,
3229 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02003230 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303231
3232 return err;
3233}
3234
Dolev Ravivc6d4a832014-06-29 09:40:18 +03003235static int
3236ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
3237{
3238 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
3239
3240 /* Get the UPIU response */
3241 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
3242 UPIU_RSP_CODE_OFFSET;
3243 return query_res->response;
3244}
3245
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303246/**
3247 * ufshcd_dev_cmd_completion() - handles device management command responses
3248 * @hba: per adapter instance
3249 * @lrbp: pointer to local reference block
3250 */
3251static int
3252ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
3253{
3254 int resp;
3255 int err = 0;
3256
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003257 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303258 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
3259
3260 switch (resp) {
3261 case UPIU_TRANSACTION_NOP_IN:
3262 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
3263 err = -EINVAL;
3264 dev_err(hba->dev, "%s: unexpected response %x\n",
3265 __func__, resp);
3266 }
3267 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05303268 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03003269 err = ufshcd_check_query_response(hba, lrbp);
3270 if (!err)
3271 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05303272 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303273 case UPIU_TRANSACTION_REJECT_UPIU:
3274 /* TODO: handle Reject UPIU Response */
3275 err = -EPERM;
3276 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
3277 __func__);
3278 break;
3279 default:
3280 err = -EINVAL;
3281 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
3282 __func__, resp);
3283 break;
3284 }
3285
3286 return err;
3287}
3288
3289static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
3290 struct ufshcd_lrb *lrbp, int max_timeout)
3291{
3292 int err = 0;
3293 unsigned long time_left;
3294 unsigned long flags;
3295
3296 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
3297 msecs_to_jiffies(max_timeout));
3298
3299 spin_lock_irqsave(hba->host->host_lock, flags);
3300 hba->dev_cmd.complete = NULL;
3301 if (likely(time_left)) {
3302 err = ufshcd_get_tr_ocs(lrbp);
3303 if (!err)
3304 err = ufshcd_dev_cmd_completion(hba, lrbp);
3305 }
3306 spin_unlock_irqrestore(hba->host->host_lock, flags);
3307
3308 if (!time_left) {
3309 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02003310 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
3311 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303312 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02003313 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303314 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02003315 /*
3316 * in case of an error, after clearing the doorbell,
3317 * we also need to clear the outstanding_request
3318 * field in hba
3319 */
3320 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303321 }
3322
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003323 if (err)
3324 ufsdbg_set_err_state(hba);
3325
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303326 return err;
3327}
3328
3329/**
3330 * ufshcd_get_dev_cmd_tag - Get device management command tag
3331 * @hba: per-adapter instance
3332 * @tag: pointer to variable with available slot value
3333 *
3334 * Get a free slot and lock it until device management command
3335 * completes.
3336 *
3337 * Returns false if free slot is unavailable for locking, else
3338 * return true with tag value in @tag.
3339 */
3340static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
3341{
3342 int tag;
3343 bool ret = false;
3344 unsigned long tmp;
3345
3346 if (!tag_out)
3347 goto out;
3348
3349 do {
3350 tmp = ~hba->lrb_in_use;
3351 tag = find_last_bit(&tmp, hba->nutrs);
3352 if (tag >= hba->nutrs)
3353 goto out;
3354 } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
3355
3356 *tag_out = tag;
3357 ret = true;
3358out:
3359 return ret;
3360}
3361
3362static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
3363{
3364 clear_bit_unlock(tag, &hba->lrb_in_use);
3365}
3366
3367/**
3368 * ufshcd_exec_dev_cmd - API for sending device management requests
3369 * @hba - UFS hba
3370 * @cmd_type - specifies the type (NOP, Query...)
3371 * @timeout - time in seconds
3372 *
Dolev Raviv68078d52013-07-30 00:35:58 +05303373 * NOTE: Since there is only one available tag for device management commands,
3374 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303375 */
3376static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
3377 enum dev_cmd_type cmd_type, int timeout)
3378{
3379 struct ufshcd_lrb *lrbp;
3380 int err;
3381 int tag;
3382 struct completion wait;
3383 unsigned long flags;
3384
Subhash Jadavani9c807702017-04-01 00:35:51 -07003385 /*
3386 * May get invoked from shutdown and IOCTL contexts.
3387 * In shutdown context, it comes in with lock acquired.
Bao D. Nguyen80d4ffb2017-06-05 17:31:53 -07003388 * In error recovery context, it may come with lock acquired.
Subhash Jadavani9c807702017-04-01 00:35:51 -07003389 */
Bao D. Nguyen80d4ffb2017-06-05 17:31:53 -07003390
3391 if (!ufshcd_is_shutdown_ongoing(hba) && !ufshcd_eh_in_progress(hba))
Subhash Jadavani9c807702017-04-01 00:35:51 -07003392 down_read(&hba->lock);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003393
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303394 /*
3395 * Get free slot, sleep if slots are unavailable.
3396 * Even though we use wait_event() which sleeps indefinitely,
3397 * the maximum wait time is bounded by SCSI request timeout.
3398 */
3399 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
3400
3401 init_completion(&wait);
3402 lrbp = &hba->lrb[tag];
3403 WARN_ON(lrbp->cmd);
3404 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
3405 if (unlikely(err))
3406 goto out_put_tag;
3407
3408 hba->dev_cmd.complete = &wait;
3409
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02003410 /* Make sure descriptors are ready before ringing the doorbell */
3411 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303412 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003413 err = ufshcd_send_command(hba, tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303414 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003415 if (err) {
3416 dev_err(hba->dev, "%s: failed sending command, %d\n",
3417 __func__, err);
3418 goto out_put_tag;
3419 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303420 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
3421
3422out_put_tag:
3423 ufshcd_put_dev_cmd_tag(hba, tag);
3424 wake_up(&hba->dev_cmd.tag_wq);
Bao D. Nguyen80d4ffb2017-06-05 17:31:53 -07003425 if (!ufshcd_is_shutdown_ongoing(hba) && !ufshcd_eh_in_progress(hba))
Subhash Jadavani9c807702017-04-01 00:35:51 -07003426 up_read(&hba->lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303427 return err;
3428}
3429
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303430/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003431 * ufshcd_init_query() - init the query response and request parameters
3432 * @hba: per-adapter instance
3433 * @request: address of the request pointer to be initialized
3434 * @response: address of the response pointer to be initialized
3435 * @opcode: operation to perform
3436 * @idn: flag idn to access
3437 * @index: LU number to access
3438 * @selector: query/flag/descriptor further identification
3439 */
3440static inline void ufshcd_init_query(struct ufs_hba *hba,
3441 struct ufs_query_req **request, struct ufs_query_res **response,
3442 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
3443{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003444 int idn_t = (int)idn;
3445
3446 ufsdbg_error_inject_dispatcher(hba,
3447 ERR_INJECT_QUERY, idn_t, (int *)&idn_t);
3448 idn = idn_t;
3449
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003450 *request = &hba->dev_cmd.query.request;
3451 *response = &hba->dev_cmd.query.response;
3452 memset(*request, 0, sizeof(struct ufs_query_req));
3453 memset(*response, 0, sizeof(struct ufs_query_res));
3454 (*request)->upiu_req.opcode = opcode;
3455 (*request)->upiu_req.idn = idn;
3456 (*request)->upiu_req.index = index;
3457 (*request)->upiu_req.selector = selector;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003458
3459 ufshcd_update_query_stats(hba, opcode, idn);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003460}
3461
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003462static int ufshcd_query_flag_retry(struct ufs_hba *hba,
3463 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
3464{
3465 int ret;
3466 int retries;
3467
3468 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
3469 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
3470 if (ret)
3471 dev_dbg(hba->dev,
3472 "%s: failed with error %d, retries %d\n",
3473 __func__, ret, retries);
3474 else
3475 break;
3476 }
3477
3478 if (ret)
3479 dev_err(hba->dev,
3480 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
3481 __func__, opcode, idn, ret, retries);
3482 return ret;
3483}
3484
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003485/**
Dolev Raviv68078d52013-07-30 00:35:58 +05303486 * ufshcd_query_flag() - API function for sending flag query requests
3487 * hba: per-adapter instance
3488 * query_opcode: flag query to perform
3489 * idn: flag idn to access
3490 * flag_res: the flag value after the query request completes
3491 *
3492 * Returns 0 for success, non-zero in case of failure
3493 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003494int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05303495 enum flag_idn idn, bool *flag_res)
3496{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003497 struct ufs_query_req *request = NULL;
3498 struct ufs_query_res *response = NULL;
3499 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02003500 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05303501
3502 BUG_ON(!hba);
3503
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003504 ufshcd_hold_all(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05303505 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003506 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3507 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05303508
3509 switch (opcode) {
3510 case UPIU_QUERY_OPCODE_SET_FLAG:
3511 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
3512 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
3513 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3514 break;
3515 case UPIU_QUERY_OPCODE_READ_FLAG:
3516 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3517 if (!flag_res) {
3518 /* No dummy reads */
3519 dev_err(hba->dev, "%s: Invalid argument for read request\n",
3520 __func__);
3521 err = -EINVAL;
3522 goto out_unlock;
3523 }
3524 break;
3525 default:
3526 dev_err(hba->dev,
3527 "%s: Expected query flag opcode but got = %d\n",
3528 __func__, opcode);
3529 err = -EINVAL;
3530 goto out_unlock;
3531 }
Dolev Raviv68078d52013-07-30 00:35:58 +05303532
Yaniv Gardie5ad4062016-02-01 15:02:41 +02003533 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05303534
3535 if (err) {
3536 dev_err(hba->dev,
3537 "%s: Sending flag query for idn %d failed, err = %d\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003538 __func__, request->upiu_req.idn, err);
Dolev Raviv68078d52013-07-30 00:35:58 +05303539 goto out_unlock;
3540 }
3541
3542 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303543 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05303544 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
3545
3546out_unlock:
3547 mutex_unlock(&hba->dev_cmd.lock);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003548 ufshcd_release_all(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05303549 return err;
3550}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003551EXPORT_SYMBOL(ufshcd_query_flag);
Dolev Raviv68078d52013-07-30 00:35:58 +05303552
3553/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303554 * ufshcd_query_attr - API function for sending attribute requests
3555 * hba: per-adapter instance
3556 * opcode: attribute opcode
3557 * idn: attribute idn to access
3558 * index: index field
3559 * selector: selector field
3560 * attr_val: the attribute value after the query request completes
3561 *
3562 * Returns 0 for success, non-zero in case of failure
3563*/
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003564int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303565 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
3566{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003567 struct ufs_query_req *request = NULL;
3568 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303569 int err;
3570
3571 BUG_ON(!hba);
3572
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003573 ufshcd_hold_all(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303574 if (!attr_val) {
3575 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
3576 __func__, opcode);
3577 err = -EINVAL;
3578 goto out;
3579 }
3580
3581 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003582 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3583 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303584
3585 switch (opcode) {
3586 case UPIU_QUERY_OPCODE_WRITE_ATTR:
3587 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303588 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303589 break;
3590 case UPIU_QUERY_OPCODE_READ_ATTR:
3591 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3592 break;
3593 default:
3594 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
3595 __func__, opcode);
3596 err = -EINVAL;
3597 goto out_unlock;
3598 }
3599
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003600 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303601
3602 if (err) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003603 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3604 __func__, opcode,
3605 request->upiu_req.idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303606 goto out_unlock;
3607 }
3608
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303609 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303610
3611out_unlock:
3612 mutex_unlock(&hba->dev_cmd.lock);
3613out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003614 ufshcd_release_all(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303615 return err;
3616}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003617EXPORT_SYMBOL(ufshcd_query_attr);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303618
3619/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003620 * ufshcd_query_attr_retry() - API function for sending query
3621 * attribute with retries
3622 * @hba: per-adapter instance
3623 * @opcode: attribute opcode
3624 * @idn: attribute idn to access
3625 * @index: index field
3626 * @selector: selector field
3627 * @attr_val: the attribute value after the query request
3628 * completes
3629 *
3630 * Returns 0 for success, non-zero in case of failure
3631*/
3632static int ufshcd_query_attr_retry(struct ufs_hba *hba,
3633 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
3634 u32 *attr_val)
3635{
3636 int ret = 0;
3637 u32 retries;
3638
3639 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3640 ret = ufshcd_query_attr(hba, opcode, idn, index,
3641 selector, attr_val);
3642 if (ret)
3643 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
3644 __func__, ret, retries);
3645 else
3646 break;
3647 }
3648
3649 if (ret)
3650 dev_err(hba->dev,
3651 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003652 __func__, idn, ret, retries);
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003653 return ret;
3654}
3655
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003656static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003657 enum query_opcode opcode, enum desc_idn idn, u8 index,
3658 u8 selector, u8 *desc_buf, int *buf_len)
3659{
3660 struct ufs_query_req *request = NULL;
3661 struct ufs_query_res *response = NULL;
3662 int err;
3663
3664 BUG_ON(!hba);
3665
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003666 ufshcd_hold_all(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003667 if (!desc_buf) {
3668 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
3669 __func__, opcode);
3670 err = -EINVAL;
3671 goto out;
3672 }
3673
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303674 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003675 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
3676 __func__, *buf_len);
3677 err = -EINVAL;
3678 goto out;
3679 }
3680
3681 mutex_lock(&hba->dev_cmd.lock);
3682 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3683 selector);
3684 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003685 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003686
3687 switch (opcode) {
3688 case UPIU_QUERY_OPCODE_WRITE_DESC:
3689 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3690 break;
3691 case UPIU_QUERY_OPCODE_READ_DESC:
3692 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3693 break;
3694 default:
3695 dev_err(hba->dev,
3696 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3697 __func__, opcode);
3698 err = -EINVAL;
3699 goto out_unlock;
3700 }
3701
3702 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3703
3704 if (err) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003705 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3706 __func__, opcode,
3707 request->upiu_req.idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003708 goto out_unlock;
3709 }
3710
3711 hba->dev_cmd.query.descriptor = NULL;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003712 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003713
3714out_unlock:
3715 mutex_unlock(&hba->dev_cmd.lock);
3716out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003717 ufshcd_release_all(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003718 return err;
3719}
3720
3721/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003722 * ufshcd_query_descriptor - API function for sending descriptor requests
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003723 * hba: per-adapter instance
3724 * opcode: attribute opcode
3725 * idn: attribute idn to access
3726 * index: index field
3727 * selector: selector field
3728 * desc_buf: the buffer that contains the descriptor
3729 * buf_len: length parameter passed to the device
3730 *
3731 * Returns 0 for success, non-zero in case of failure.
3732 * The buf_len parameter will contain, on return, the length parameter
3733 * received on the response.
3734 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003735int ufshcd_query_descriptor(struct ufs_hba *hba,
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003736 enum query_opcode opcode, enum desc_idn idn, u8 index,
3737 u8 selector, u8 *desc_buf, int *buf_len)
3738{
3739 int err;
3740 int retries;
3741
3742 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3743 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3744 selector, desc_buf, buf_len);
3745 if (!err || err == -EINVAL)
3746 break;
3747 }
3748
3749 return err;
3750}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003751EXPORT_SYMBOL(ufshcd_query_descriptor);
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003752
3753/**
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303754 * ufshcd_read_desc_length - read the specified descriptor length from header
3755 * @hba: Pointer to adapter instance
3756 * @desc_id: descriptor idn value
3757 * @desc_index: descriptor index
3758 * @desc_length: pointer to variable to read the length of descriptor
3759 *
3760 * Return 0 in case of success, non-zero otherwise
3761 */
3762static int ufshcd_read_desc_length(struct ufs_hba *hba,
3763 enum desc_idn desc_id,
3764 int desc_index,
3765 int *desc_length)
3766{
3767 int ret;
3768 u8 header[QUERY_DESC_HDR_SIZE];
3769 int header_len = QUERY_DESC_HDR_SIZE;
3770
3771 if (desc_id >= QUERY_DESC_IDN_MAX)
3772 return -EINVAL;
3773
3774 ret = ufshcd_query_descriptor(hba, UPIU_QUERY_OPCODE_READ_DESC,
3775 desc_id, desc_index, 0, header,
3776 &header_len);
3777
3778 if (ret) {
3779 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3780 __func__, desc_id);
3781 return ret;
3782 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3783 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3784 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3785 desc_id);
3786 ret = -EINVAL;
3787 }
3788
3789 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3790 return ret;
3791
3792}
3793
3794/**
3795 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3796 * @hba: Pointer to adapter instance
3797 * @desc_id: descriptor idn value
3798 * @desc_len: mapped desc length (out)
3799 *
3800 * Return 0 in case of success, non-zero otherwise
3801 */
3802int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3803 enum desc_idn desc_id, int *desc_len)
3804{
3805 switch (desc_id) {
3806 case QUERY_DESC_IDN_DEVICE:
3807 *desc_len = hba->desc_size.dev_desc;
3808 break;
3809 case QUERY_DESC_IDN_POWER:
3810 *desc_len = hba->desc_size.pwr_desc;
3811 break;
3812 case QUERY_DESC_IDN_GEOMETRY:
3813 *desc_len = hba->desc_size.geom_desc;
3814 break;
3815 case QUERY_DESC_IDN_CONFIGURATION:
3816 *desc_len = hba->desc_size.conf_desc;
3817 break;
3818 case QUERY_DESC_IDN_UNIT:
3819 *desc_len = hba->desc_size.unit_desc;
3820 break;
3821 case QUERY_DESC_IDN_INTERCONNECT:
3822 *desc_len = hba->desc_size.interc_desc;
3823 break;
3824 case QUERY_DESC_IDN_STRING:
3825 *desc_len = QUERY_DESC_MAX_SIZE;
3826 break;
3827 case QUERY_DESC_IDN_RFU_0:
3828 case QUERY_DESC_IDN_RFU_1:
3829 *desc_len = 0;
3830 break;
3831 default:
3832 *desc_len = 0;
3833 return -EINVAL;
3834 }
3835 return 0;
3836}
3837EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3838
3839/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003840 * ufshcd_read_desc_param - read the specified descriptor parameter
3841 * @hba: Pointer to adapter instance
3842 * @desc_id: descriptor idn value
3843 * @desc_index: descriptor index
3844 * @param_offset: offset of the parameter to read
3845 * @param_read_buf: pointer to buffer where parameter would be read
3846 * @param_size: sizeof(param_read_buf)
3847 *
3848 * Return 0 in case of success, non-zero otherwise
3849 */
3850static int ufshcd_read_desc_param(struct ufs_hba *hba,
3851 enum desc_idn desc_id,
3852 int desc_index,
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303853 u8 param_offset,
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003854 u8 *param_read_buf,
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303855 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003856{
3857 int ret;
3858 u8 *desc_buf;
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303859 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003860 bool is_kmalloc = true;
3861
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303862 /* Safety check */
3863 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003864 return -EINVAL;
3865
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303866 /* Get the max length of descriptor from structure filled up at probe
3867 * time.
3868 */
3869 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003870
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303871 /* Sanity checks */
3872 if (ret || !buff_len) {
3873 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3874 __func__);
3875 return ret;
3876 }
3877
3878 /* Check whether we need temp memory */
3879 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003880 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3881 if (!desc_buf)
3882 return -ENOMEM;
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303883 } else {
3884 desc_buf = param_read_buf;
3885 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003886 }
3887
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303888 /* Request for full descriptor */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003889 ret = ufshcd_query_descriptor(hba, UPIU_QUERY_OPCODE_READ_DESC,
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303890 desc_id, desc_index, 0,
3891 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003892
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003893 if (ret) {
3894 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3895 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003896
3897 goto out;
3898 }
3899
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003900 /* Sanity check */
3901 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3902 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3903 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3904 ret = -EINVAL;
3905 goto out;
3906 }
3907
Michal' Potomski833ea2a2017-05-31 15:25:11 +05303908 /* Check wherher we will not copy more data, than available */
3909 if (is_kmalloc && param_size > buff_len)
3910 param_size = buff_len;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003911
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003912 if (is_kmalloc)
3913 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3914out:
3915 if (is_kmalloc)
3916 kfree(desc_buf);
3917 return ret;
3918}
3919
3920static inline int ufshcd_read_desc(struct ufs_hba *hba,
3921 enum desc_idn desc_id,
3922 int desc_index,
3923 u8 *buf,
3924 u32 size)
3925{
3926 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3927}
3928
3929static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3930 u8 *buf,
3931 u32 size)
3932{
3933 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
3934}
3935
Yaniv Gardib573d482016-03-10 17:37:09 +02003936int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
3937{
3938 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3939}
Yaniv Gardib573d482016-03-10 17:37:09 +02003940
3941/**
3942 * ufshcd_read_string_desc - read string descriptor
3943 * @hba: pointer to adapter instance
3944 * @desc_index: descriptor index
3945 * @buf: pointer to buffer where descriptor would be read
3946 * @size: size of buf
3947 * @ascii: if true convert from unicode to ascii characters
3948 *
3949 * Return 0 in case of success, non-zero otherwise
3950 */
3951int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, u8 *buf,
3952 u32 size, bool ascii)
3953{
3954 int err = 0;
3955
3956 err = ufshcd_read_desc(hba,
3957 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3958
3959 if (err) {
3960 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3961 __func__, QUERY_REQ_RETRIES, err);
3962 goto out;
3963 }
3964
3965 if (ascii) {
3966 int desc_len;
3967 int ascii_len;
3968 int i;
3969 char *buff_ascii;
3970
3971 desc_len = buf[0];
3972 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3973 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3974 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3975 dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3976 __func__);
3977 err = -ENOMEM;
3978 goto out;
3979 }
3980
Subhash Jadavanibe096032017-03-23 12:55:25 -07003981 buff_ascii = kzalloc(ascii_len, GFP_KERNEL);
Yaniv Gardib573d482016-03-10 17:37:09 +02003982 if (!buff_ascii) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003983 dev_err(hba->dev, "%s: Failed allocating %d bytes\n",
3984 __func__, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003985 err = -ENOMEM;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003986 goto out_free_buff;
Yaniv Gardib573d482016-03-10 17:37:09 +02003987 }
3988
3989 /*
3990 * the descriptor contains string in UTF16 format
3991 * we need to convert to utf-8 so it can be displayed
3992 */
3993 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3994 desc_len - QUERY_DESC_HDR_SIZE,
3995 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3996
3997 /* replace non-printable or non-ASCII characters with spaces */
3998 for (i = 0; i < ascii_len; i++)
3999 ufshcd_remove_non_printable(&buff_ascii[i]);
4000
4001 memset(buf + QUERY_DESC_HDR_SIZE, 0,
4002 size - QUERY_DESC_HDR_SIZE);
4003 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
4004 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004005out_free_buff:
Yaniv Gardib573d482016-03-10 17:37:09 +02004006 kfree(buff_ascii);
4007 }
4008out:
4009 return err;
4010}
Yaniv Gardib573d482016-03-10 17:37:09 +02004011
Subhash Jadavanida461ce2014-09-25 15:32:25 +03004012/**
4013 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
4014 * @hba: Pointer to adapter instance
4015 * @lun: lun id
4016 * @param_offset: offset of the parameter to read
4017 * @param_read_buf: pointer to buffer where parameter would be read
4018 * @param_size: sizeof(param_read_buf)
4019 *
4020 * Return 0 in case of success, non-zero otherwise
4021 */
4022static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
4023 int lun,
4024 enum unit_desc_param param_offset,
4025 u8 *param_read_buf,
4026 u32 param_size)
4027{
4028 /*
4029 * Unit descriptors are only available for general purpose LUs (LUN id
4030 * from 0 to 7) and RPMB Well known LU.
4031 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004032 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03004033 return -EOPNOTSUPP;
4034
4035 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
4036 param_offset, param_read_buf, param_size);
4037}
4038
4039/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304040 * ufshcd_memory_alloc - allocate memory for host memory space data structures
4041 * @hba: per adapter instance
4042 *
4043 * 1. Allocate DMA memory for Command Descriptor array
4044 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
4045 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
4046 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
4047 * (UTMRDL)
4048 * 4. Allocate memory for local reference block(lrb).
4049 *
4050 * Returns 0 for success, non-zero in case of failure
4051 */
4052static int ufshcd_memory_alloc(struct ufs_hba *hba)
4053{
4054 size_t utmrdl_size, utrdl_size, ucdl_size;
4055
4056 /* Allocate memory for UTP command descriptors */
4057 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09004058 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
4059 ucdl_size,
4060 &hba->ucdl_dma_addr,
4061 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304062
4063 /*
4064 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
4065 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
4066 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
4067 * be aligned to 128 bytes as well
4068 */
4069 if (!hba->ucdl_base_addr ||
4070 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304071 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304072 "Command Descriptor Memory allocation failed\n");
4073 goto out;
4074 }
4075
4076 /*
4077 * Allocate memory for UTP Transfer descriptors
4078 * UFSHCI requires 1024 byte alignment of UTRD
4079 */
4080 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09004081 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
4082 utrdl_size,
4083 &hba->utrdl_dma_addr,
4084 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304085 if (!hba->utrdl_base_addr ||
4086 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304087 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304088 "Transfer Descriptor Memory allocation failed\n");
4089 goto out;
4090 }
4091
4092 /*
4093 * Allocate memory for UTP Task Management descriptors
4094 * UFSHCI requires 1024 byte alignment of UTMRD
4095 */
4096 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09004097 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
4098 utmrdl_size,
4099 &hba->utmrdl_dma_addr,
4100 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304101 if (!hba->utmrdl_base_addr ||
4102 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304103 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304104 "Task Management Descriptor Memory allocation failed\n");
4105 goto out;
4106 }
4107
4108 /* Allocate memory for local reference block */
Seungwon Jeon2953f852013-06-27 13:31:54 +09004109 hba->lrb = devm_kzalloc(hba->dev,
4110 hba->nutrs * sizeof(struct ufshcd_lrb),
4111 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304112 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304113 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304114 goto out;
4115 }
4116 return 0;
4117out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304118 return -ENOMEM;
4119}
4120
4121/**
4122 * ufshcd_host_memory_configure - configure local reference block with
4123 * memory offsets
4124 * @hba: per adapter instance
4125 *
4126 * Configure Host memory space
4127 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
4128 * address.
4129 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
4130 * and PRDT offset.
4131 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
4132 * into local reference block.
4133 */
4134static void ufshcd_host_memory_configure(struct ufs_hba *hba)
4135{
4136 struct utp_transfer_cmd_desc *cmd_descp;
4137 struct utp_transfer_req_desc *utrdlp;
4138 dma_addr_t cmd_desc_dma_addr;
4139 dma_addr_t cmd_desc_element_addr;
4140 u16 response_offset;
4141 u16 prdt_offset;
4142 int cmd_desc_size;
4143 int i;
4144
4145 utrdlp = hba->utrdl_base_addr;
4146 cmd_descp = hba->ucdl_base_addr;
4147
4148 response_offset =
4149 offsetof(struct utp_transfer_cmd_desc, response_upiu);
4150 prdt_offset =
4151 offsetof(struct utp_transfer_cmd_desc, prd_table);
4152
4153 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
4154 cmd_desc_dma_addr = hba->ucdl_dma_addr;
4155
4156 for (i = 0; i < hba->nutrs; i++) {
4157 /* Configure UTRD with command descriptor base address */
4158 cmd_desc_element_addr =
4159 (cmd_desc_dma_addr + (cmd_desc_size * i));
4160 utrdlp[i].command_desc_base_addr_lo =
4161 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
4162 utrdlp[i].command_desc_base_addr_hi =
4163 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
4164
4165 /* Response upiu and prdt offset should be in double words */
Kiwoong Kim9b41ed72017-04-04 19:32:05 +00004166 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
4167 utrdlp[i].response_upiu_offset =
4168 cpu_to_le16(response_offset);
4169 utrdlp[i].prd_table_offset =
4170 cpu_to_le16(prdt_offset);
4171 utrdlp[i].response_upiu_length =
4172 cpu_to_le16(ALIGNED_UPIU_SIZE);
4173 } else {
4174 utrdlp[i].response_upiu_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304175 cpu_to_le16((response_offset >> 2));
Kiwoong Kim9b41ed72017-04-04 19:32:05 +00004176 utrdlp[i].prd_table_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304177 cpu_to_le16((prdt_offset >> 2));
Kiwoong Kim9b41ed72017-04-04 19:32:05 +00004178 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05304179 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Kiwoong Kim9b41ed72017-04-04 19:32:05 +00004180 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304181
4182 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004183 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
4184 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304185 hba->lrb[i].ucd_req_ptr =
4186 (struct utp_upiu_req *)(cmd_descp + i);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004187 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304188 hba->lrb[i].ucd_rsp_ptr =
4189 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004190 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
4191 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304192 hba->lrb[i].ucd_prdt_ptr =
4193 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004194 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
4195 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304196 }
4197}
4198
4199/**
4200 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
4201 * @hba: per adapter instance
4202 *
4203 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
4204 * in order to initialize the Unipro link startup procedure.
4205 * Once the Unipro links are up, the device connected to the controller
4206 * is detected.
4207 *
4208 * Returns 0 on success, non-zero value on failure
4209 */
4210static int ufshcd_dme_link_startup(struct ufs_hba *hba)
4211{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304212 struct uic_command uic_cmd = {0};
4213 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304214
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304215 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
4216
4217 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
4218 if (ret)
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004219 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304220 "dme-link-startup: error code %d\n", ret);
4221 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304222}
4223
Yaniv Gardicad2e032015-03-31 17:37:14 +03004224static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
4225{
4226 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
4227 unsigned long min_sleep_time_us;
4228
4229 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
4230 return;
4231
4232 /*
4233 * last_dme_cmd_tstamp will be 0 only for 1st call to
4234 * this function
4235 */
4236 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
4237 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
4238 } else {
4239 unsigned long delta =
4240 (unsigned long) ktime_to_us(
4241 ktime_sub(ktime_get(),
4242 hba->last_dme_cmd_tstamp));
4243
4244 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
4245 min_sleep_time_us =
4246 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
4247 else
4248 return; /* no more delay required */
4249 }
4250
4251 /* allow sleep for extra 50us if needed */
4252 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
4253}
4254
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004255static inline void ufshcd_save_tstamp_of_last_dme_cmd(
4256 struct ufs_hba *hba)
4257{
4258 if (hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS)
4259 hba->last_dme_cmd_tstamp = ktime_get();
4260}
4261
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304262/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304263 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
4264 * @hba: per adapter instance
4265 * @attr_sel: uic command argument1
4266 * @attr_set: attribute set type as uic command argument2
4267 * @mib_val: setting value as uic command argument3
4268 * @peer: indicate whether peer or local
4269 *
4270 * Returns 0 on success, non-zero value on failure
4271 */
4272int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
4273 u8 attr_set, u32 mib_val, u8 peer)
4274{
4275 struct uic_command uic_cmd = {0};
4276 static const char *const action[] = {
4277 "dme-set",
4278 "dme-peer-set"
4279 };
4280 const char *set = action[!!peer];
4281 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02004282 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304283
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004284 ufsdbg_error_inject_dispatcher(hba,
4285 ERR_INJECT_DME_ATTR, attr_sel, &attr_sel);
4286
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304287 uic_cmd.command = peer ?
4288 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
4289 uic_cmd.argument1 = attr_sel;
4290 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
4291 uic_cmd.argument3 = mib_val;
4292
Yaniv Gardi64238fb2016-02-01 15:02:43 +02004293 do {
4294 /* for peer attributes we retry upon failure */
4295 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
4296 if (ret)
4297 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
4298 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
4299 } while (ret && peer && --retries);
4300
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004301 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02004302 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004303 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
4304 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304305
4306 return ret;
4307}
4308EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
4309
4310/**
4311 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
4312 * @hba: per adapter instance
4313 * @attr_sel: uic command argument1
4314 * @mib_val: the value of the attribute as returned by the UIC command
4315 * @peer: indicate whether peer or local
4316 *
4317 * Returns 0 on success, non-zero value on failure
4318 */
4319int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
4320 u32 *mib_val, u8 peer)
4321{
4322 struct uic_command uic_cmd = {0};
4323 static const char *const action[] = {
4324 "dme-get",
4325 "dme-peer-get"
4326 };
4327 const char *get = action[!!peer];
4328 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02004329 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03004330 struct ufs_pa_layer_attr orig_pwr_info;
4331 struct ufs_pa_layer_attr temp_pwr_info;
4332 bool pwr_mode_change = false;
4333
4334 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
4335 orig_pwr_info = hba->pwr_info;
4336 temp_pwr_info = orig_pwr_info;
4337
4338 if (orig_pwr_info.pwr_tx == FAST_MODE ||
4339 orig_pwr_info.pwr_rx == FAST_MODE) {
4340 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
4341 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
4342 pwr_mode_change = true;
4343 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
4344 orig_pwr_info.pwr_rx == SLOW_MODE) {
4345 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
4346 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
4347 pwr_mode_change = true;
4348 }
4349 if (pwr_mode_change) {
4350 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
4351 if (ret)
4352 goto out;
4353 }
4354 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304355
4356 uic_cmd.command = peer ?
4357 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004358
4359 ufsdbg_error_inject_dispatcher(hba,
4360 ERR_INJECT_DME_ATTR, attr_sel, &attr_sel);
4361
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304362 uic_cmd.argument1 = attr_sel;
4363
Yaniv Gardi64238fb2016-02-01 15:02:43 +02004364 do {
4365 /* for peer attributes we retry upon failure */
4366 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
4367 if (ret)
4368 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
4369 get, UIC_GET_ATTR_ID(attr_sel), ret);
4370 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304371
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004372 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02004373 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004374 get, UIC_GET_ATTR_ID(attr_sel),
4375 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02004376
4377 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304378 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03004379
4380 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
4381 && pwr_mode_change)
4382 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304383out:
4384 return ret;
4385}
4386EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
4387
4388/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004389 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
4390 * state) and waits for it to take effect.
4391 *
4392 * @hba: per adapter instance
4393 * @cmd: UIC command to execute
4394 *
4395 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
4396 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
4397 * and device UniPro link and hence it's final completion would be indicated by
4398 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
4399 * addition to normal UIC command completion Status (UCCS). This function only
4400 * returns after the relevant status bits indicate the completion.
4401 *
4402 * Returns 0 on success, non-zero value on failure
4403 */
4404static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
4405{
4406 struct completion uic_async_done;
4407 unsigned long flags;
4408 u8 status;
4409 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02004410 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004411
4412 mutex_lock(&hba->uic_cmd_mutex);
4413 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03004414 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004415
4416 spin_lock_irqsave(hba->host->host_lock, flags);
4417 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02004418 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
4419 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
4420 /*
4421 * Make sure UIC command completion interrupt is disabled before
4422 * issuing UIC command.
4423 */
4424 wmb();
4425 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004426 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02004427 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
4428 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004429 if (ret) {
4430 dev_err(hba->dev,
4431 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
4432 cmd->command, cmd->argument3, ret);
4433 goto out;
4434 }
4435
4436 if (!wait_for_completion_timeout(hba->uic_async_done,
4437 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
4438 dev_err(hba->dev,
4439 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
4440 cmd->command, cmd->argument3);
4441 ret = -ETIMEDOUT;
4442 goto out;
4443 }
4444
4445 status = ufshcd_get_upmcrs(hba);
4446 if (status != PWR_LOCAL) {
4447 dev_err(hba->dev,
Kiwoong Kim73615422016-09-08 16:50:02 +09004448 "pwr ctrl cmd 0x%0x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004449 cmd->command, status);
4450 ret = (status != PWR_OK) ? status : -1;
4451 }
Subhash Jadavani114437e2017-11-08 16:22:16 -08004452 ufshcd_dme_cmd_log(hba, "dme_cmpl_2", hba->active_uic_cmd->command);
Can Guob7147732017-04-18 16:22:56 +08004453
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004454out:
Subhash Jadavani9c807702017-04-01 00:35:51 -07004455 if (ret) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004456 ufsdbg_set_err_state(hba);
Subhash Jadavani9c807702017-04-01 00:35:51 -07004457 ufshcd_print_host_state(hba);
4458 ufshcd_print_pwr_info(hba);
4459 ufshcd_print_host_regs(hba);
Can Guof6411eb2017-06-09 15:17:22 +08004460 ufshcd_print_cmd_log(hba);
Subhash Jadavani9c807702017-04-01 00:35:51 -07004461 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004462
4463 ufshcd_save_tstamp_of_last_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004464 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02004465 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004466 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02004467 if (reenable_intr)
4468 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004469 spin_unlock_irqrestore(hba->host->host_lock, flags);
4470 mutex_unlock(&hba->uic_cmd_mutex);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004471 return ret;
4472}
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004473
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004474int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba, u64 wait_timeout_us)
4475{
4476 unsigned long flags;
4477 int ret = 0;
4478 u32 tm_doorbell;
4479 u32 tr_doorbell;
4480 bool timeout = false, do_last_check = false;
4481 ktime_t start;
4482
4483 ufshcd_hold_all(hba);
4484 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004485 /*
4486 * Wait for all the outstanding tasks/transfer requests.
4487 * Verify by checking the doorbell registers are clear.
4488 */
4489 start = ktime_get();
4490 do {
Subhash Jadavani9c807702017-04-01 00:35:51 -07004491 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
4492 ret = -EBUSY;
4493 goto out;
4494 }
4495
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004496 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
4497 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4498 if (!tm_doorbell && !tr_doorbell) {
4499 timeout = false;
4500 break;
4501 } else if (do_last_check) {
4502 break;
4503 }
4504
4505 spin_unlock_irqrestore(hba->host->host_lock, flags);
4506 schedule();
4507 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
4508 wait_timeout_us) {
4509 timeout = true;
4510 /*
4511 * We might have scheduled out for long time so make
4512 * sure to check if doorbells are cleared by this time
4513 * or not.
4514 */
4515 do_last_check = true;
4516 }
4517 spin_lock_irqsave(hba->host->host_lock, flags);
4518 } while (tm_doorbell || tr_doorbell);
4519
4520 if (timeout) {
4521 dev_err(hba->dev,
4522 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
4523 __func__, tm_doorbell, tr_doorbell);
4524 ret = -EBUSY;
4525 }
4526out:
4527 spin_unlock_irqrestore(hba->host->host_lock, flags);
4528 ufshcd_release_all(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004529 return ret;
4530}
4531
4532/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304533 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
4534 * using DME_SET primitives.
4535 * @hba: per adapter instance
4536 * @mode: powr mode value
4537 *
4538 * Returns 0 on success, non-zero value on failure
4539 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05304540static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304541{
4542 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004543 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304544
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03004545 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
4546 ret = ufshcd_dme_set(hba,
4547 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
4548 if (ret) {
4549 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
4550 __func__, ret);
4551 goto out;
4552 }
4553 }
4554
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304555 uic_cmd.command = UIC_CMD_DME_SET;
4556 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
4557 uic_cmd.argument3 = mode;
Asutosh Das3da913a2017-03-24 10:32:16 +05304558 hba->ufs_stats.clk_hold.ctx = PWRCTL_CMD_SEND;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004559 ufshcd_hold_all(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004560 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
Asutosh Das3da913a2017-03-24 10:32:16 +05304561 hba->ufs_stats.clk_rel.ctx = PWRCTL_CMD_SEND;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004562 ufshcd_release_all(hba);
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03004563out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004564 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004565}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304566
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004567static int ufshcd_link_recovery(struct ufs_hba *hba)
4568{
Subhash Jadavani9c807702017-04-01 00:35:51 -07004569 int ret = 0;
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004570 unsigned long flags;
4571
Subhash Jadavani9c807702017-04-01 00:35:51 -07004572 /*
4573 * Check if there is any race with fatal error handling.
4574 * If so, wait for it to complete. Even though fatal error
4575 * handling does reset and restore in some cases, don't assume
4576 * anything out of it. We are just avoiding race here.
4577 */
4578 do {
4579 spin_lock_irqsave(hba->host->host_lock, flags);
4580 if (!(work_pending(&hba->eh_work) ||
4581 hba->ufshcd_state == UFSHCD_STATE_RESET))
4582 break;
4583 spin_unlock_irqrestore(hba->host->host_lock, flags);
4584 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
4585 flush_work(&hba->eh_work);
4586 } while (1);
4587
4588
4589 /*
4590 * we don't know if previous reset had really reset the host controller
4591 * or not. So let's force reset here to be sure.
4592 */
4593 hba->ufshcd_state = UFSHCD_STATE_ERROR;
4594 hba->force_host_reset = true;
4595 schedule_work(&hba->eh_work);
4596
4597 /* wait for the reset work to finish */
4598 do {
4599 if (!(work_pending(&hba->eh_work) ||
4600 hba->ufshcd_state == UFSHCD_STATE_RESET))
4601 break;
4602 spin_unlock_irqrestore(hba->host->host_lock, flags);
4603 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
4604 flush_work(&hba->eh_work);
4605 spin_lock_irqsave(hba->host->host_lock, flags);
4606 } while (1);
4607
4608 if (!((hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) &&
4609 ufshcd_is_link_active(hba)))
4610 ret = -ENOLINK;
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004611 spin_unlock_irqrestore(hba->host->host_lock, flags);
4612
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004613 return ret;
4614}
4615
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004616static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004617{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004618 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004619 struct uic_command uic_cmd = {0};
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004620 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004621
4622 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004623 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004624 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
4625 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004626
Subhash Jadavani9c807702017-04-01 00:35:51 -07004627 /*
4628 * Do full reinit if enter failed or if LINERESET was detected during
4629 * Hibern8 operation. After LINERESET, link moves to default PWM-G1
4630 * mode hence full reinit is required to move link to HS speeds.
4631 */
4632 if (ret || hba->full_init_linereset) {
Subhash Jadavani68e11712017-03-24 14:44:01 -07004633 int err;
4634
Subhash Jadavani9c807702017-04-01 00:35:51 -07004635 hba->full_init_linereset = false;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004636 ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_ENTER);
4637 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d",
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004638 __func__, ret);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004639 /*
Subhash Jadavani68e11712017-03-24 14:44:01 -07004640 * If link recovery fails then return error code (-ENOLINK)
4641 * returned ufshcd_link_recovery().
4642 * If link recovery succeeds then return -EAGAIN to attempt
4643 * hibern8 enter retry again.
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004644 */
Subhash Jadavani68e11712017-03-24 14:44:01 -07004645 err = ufshcd_link_recovery(hba);
4646 if (err) {
4647 dev_err(hba->dev, "%s: link recovery failed", __func__);
4648 ret = err;
4649 } else {
4650 ret = -EAGAIN;
4651 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004652 } else {
4653 dev_dbg(hba->dev, "%s: Hibern8 Enter at %lld us", __func__,
4654 ktime_to_us(ktime_get()));
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004655 }
4656
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004657 return ret;
4658}
4659
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004660int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004661{
4662 int ret = 0, retries;
4663
4664 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
4665 ret = __ufshcd_uic_hibern8_enter(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004666 if (!ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004667 goto out;
Subhash Jadavani68e11712017-03-24 14:44:01 -07004668 else if (ret != -EAGAIN)
4669 /* Unable to recover the link, so no point proceeding */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004670 BUG();
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004671 }
4672out:
4673 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004674}
4675
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004676int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004677{
4678 struct uic_command uic_cmd = {0};
4679 int ret;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004680 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004681
4682 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
4683 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004684 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
4685 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4686
Subhash Jadavani9c807702017-04-01 00:35:51 -07004687 /* Do full reinit if exit failed */
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304688 if (ret) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004689 ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_EXIT);
4690 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d",
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004691 __func__, ret);
4692 ret = ufshcd_link_recovery(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004693 /* Unable to recover the link, so no point proceeding */
4694 if (ret)
4695 BUG();
4696 } else {
4697 dev_dbg(hba->dev, "%s: Hibern8 Exit at %lld us", __func__,
4698 ktime_to_us(ktime_get()));
4699 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
4700 hba->ufs_stats.hibern8_exit_cnt++;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304701 }
4702
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304703 return ret;
4704}
4705
Yaniv Gardi50646362014-10-23 13:25:13 +03004706 /**
4707 * ufshcd_init_pwr_info - setting the POR (power on reset)
4708 * values in hba power info
4709 * @hba: per-adapter instance
4710 */
4711static void ufshcd_init_pwr_info(struct ufs_hba *hba)
4712{
4713 hba->pwr_info.gear_rx = UFS_PWM_G1;
4714 hba->pwr_info.gear_tx = UFS_PWM_G1;
4715 hba->pwr_info.lane_rx = 1;
4716 hba->pwr_info.lane_tx = 1;
4717 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
4718 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
4719 hba->pwr_info.hs_rate = 0;
4720}
4721
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304722/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004723 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
4724 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304725 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004726static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304727{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004728 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
4729
4730 if (hba->max_pwr_info.is_valid)
4731 return 0;
4732
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004733 pwr_info->pwr_tx = FAST_MODE;
4734 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004735 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304736
4737 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004738 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4739 &pwr_info->lane_rx);
4740 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4741 &pwr_info->lane_tx);
4742
4743 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4744 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4745 __func__,
4746 pwr_info->lane_rx,
4747 pwr_info->lane_tx);
4748 return -EINVAL;
4749 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304750
4751 /*
4752 * First, get the maximum gears of HS speed.
4753 * If a zero value, it means there is no HSGEAR capability.
4754 * Then, get the maximum gears of PWM speed.
4755 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004756 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4757 if (!pwr_info->gear_rx) {
4758 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4759 &pwr_info->gear_rx);
4760 if (!pwr_info->gear_rx) {
4761 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4762 __func__, pwr_info->gear_rx);
4763 return -EINVAL;
Subhash Jadavani5e45e702016-08-09 18:43:10 -07004764 } else {
4765 if (hba->limit_rx_pwm_gear > 0 &&
4766 (hba->limit_rx_pwm_gear < pwr_info->gear_rx))
4767 pwr_info->gear_rx = hba->limit_rx_pwm_gear;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004768 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004769 pwr_info->pwr_rx = SLOW_MODE;
Subhash Jadavani5e45e702016-08-09 18:43:10 -07004770 } else {
4771 if (hba->limit_rx_hs_gear > 0 &&
4772 (hba->limit_rx_hs_gear < pwr_info->gear_rx))
4773 pwr_info->gear_rx = hba->limit_rx_hs_gear;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304774 }
4775
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004776 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4777 &pwr_info->gear_tx);
4778 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304779 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004780 &pwr_info->gear_tx);
4781 if (!pwr_info->gear_tx) {
4782 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4783 __func__, pwr_info->gear_tx);
4784 return -EINVAL;
Subhash Jadavani5e45e702016-08-09 18:43:10 -07004785 } else {
4786 if (hba->limit_tx_pwm_gear > 0 &&
4787 (hba->limit_tx_pwm_gear < pwr_info->gear_tx))
4788 pwr_info->gear_tx = hba->limit_tx_pwm_gear;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004789 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004790 pwr_info->pwr_tx = SLOW_MODE;
Subhash Jadavani5e45e702016-08-09 18:43:10 -07004791 } else {
4792 if (hba->limit_tx_hs_gear > 0 &&
4793 (hba->limit_tx_hs_gear < pwr_info->gear_tx))
4794 pwr_info->gear_tx = hba->limit_tx_hs_gear;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004795 }
4796
4797 hba->max_pwr_info.is_valid = true;
4798 return 0;
4799}
4800
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004801int ufshcd_change_power_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004802 struct ufs_pa_layer_attr *pwr_mode)
4803{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004804 int ret = 0;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004805
4806 /* if already configured to the requested pwr_mode */
Asutosh Das3923c232017-09-15 16:14:26 +05304807 if (!hba->restore_needed &&
4808 pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4809 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004810 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4811 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4812 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4813 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4814 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4815 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4816 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304817 }
4818
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004819 ufsdbg_error_inject_dispatcher(hba, ERR_INJECT_PWR_CHANGE, 0, &ret);
4820 if (ret)
4821 return ret;
4822
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304823 /*
4824 * Configure attributes for power mode change with below.
4825 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4826 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4827 * - PA_HSSERIES
4828 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004829 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4830 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4831 pwr_mode->lane_rx);
4832 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4833 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304834 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004835 else
4836 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304837
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004838 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4839 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4840 pwr_mode->lane_tx);
4841 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4842 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304843 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004844 else
4845 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304846
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004847 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4848 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4849 pwr_mode->pwr_rx == FAST_MODE ||
4850 pwr_mode->pwr_tx == FAST_MODE)
4851 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4852 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304853
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004854 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4855 DL_FC0ProtectionTimeOutVal_Default);
4856 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4857 DL_TC0ReplayTimeOutVal_Default);
4858 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4859 DL_AFC0ReqTimeOutVal_Default);
4860
4861 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4862 DL_FC0ProtectionTimeOutVal_Default);
4863 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4864 DL_TC0ReplayTimeOutVal_Default);
4865 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4866 DL_AFC0ReqTimeOutVal_Default);
4867
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004868 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4869 | pwr_mode->pwr_tx);
4870
4871 if (ret) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004872 ufshcd_update_error_stats(hba, UFS_ERR_POWER_MODE_CHANGE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304873 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004874 "%s: power mode change failed %d\n", __func__, ret);
4875 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004876 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4877 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004878
4879 memcpy(&hba->pwr_info, pwr_mode,
4880 sizeof(struct ufs_pa_layer_attr));
Sayali Lokhandebb03f312017-09-20 19:39:18 +05304881 hba->ufs_stats.power_mode_change_cnt++;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004882 }
4883
4884 return ret;
4885}
4886
4887/**
4888 * ufshcd_config_pwr_mode - configure a new power mode
4889 * @hba: per-adapter instance
4890 * @desired_pwr_mode: desired power configuration
4891 */
4892static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4893 struct ufs_pa_layer_attr *desired_pwr_mode)
4894{
4895 struct ufs_pa_layer_attr final_params = { 0 };
4896 int ret;
4897
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004898 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4899 desired_pwr_mode, &final_params);
4900
4901 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004902 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4903
4904 ret = ufshcd_change_power_mode(hba, &final_params);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004905 if (!ret)
4906 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304907
4908 return ret;
4909}
4910
4911/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304912 * ufshcd_complete_dev_init() - checks device readiness
4913 * hba: per-adapter instance
4914 *
4915 * Set fDeviceInit flag and poll until device toggles it.
4916 */
4917static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4918{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004919 int i;
4920 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05304921 bool flag_res = 1;
4922
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004923 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4924 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304925 if (err) {
4926 dev_err(hba->dev,
4927 "%s setting fDeviceInit flag failed with error %d\n",
4928 __func__, err);
4929 goto out;
4930 }
4931
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004932 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4933 for (i = 0; i < 1000 && !err && flag_res; i++)
4934 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4935 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4936
Dolev Raviv68078d52013-07-30 00:35:58 +05304937 if (err)
4938 dev_err(hba->dev,
4939 "%s reading fDeviceInit flag failed with error %d\n",
4940 __func__, err);
4941 else if (flag_res)
4942 dev_err(hba->dev,
4943 "%s fDeviceInit was not cleared by the device\n",
4944 __func__);
4945
4946out:
4947 return err;
4948}
4949
4950/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304951 * ufshcd_make_hba_operational - Make UFS controller operational
4952 * @hba: per adapter instance
4953 *
4954 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004955 * 1. Enable required interrupts
4956 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004957 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004958 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304959 *
4960 * Returns 0 on success, non-zero value on failure
4961 */
4962static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4963{
4964 int err = 0;
4965 u32 reg;
4966
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304967 /* Enable required interrupts */
4968 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4969
4970 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004971 if (ufshcd_is_intr_aggr_allowed(hba))
4972 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4973 else
4974 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304975
4976 /* Configure UTRL and UTMRL base address registers */
4977 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4978 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4979 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4980 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4981 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4982 REG_UTP_TASK_REQ_LIST_BASE_L);
4983 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4984 REG_UTP_TASK_REQ_LIST_BASE_H);
4985
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304986 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004987 * Make sure base address and interrupt setup are updated before
4988 * enabling the run/stop registers below.
4989 */
4990 wmb();
4991
4992 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304993 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304994 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004995 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304996 if (!(ufshcd_get_lists_status(reg))) {
4997 ufshcd_enable_run_stop_reg(hba);
4998 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304999 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305000 "Host controller not ready to process requests");
5001 err = -EIO;
5002 goto out;
5003 }
5004
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305005out:
5006 return err;
5007}
5008
5009/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02005010 * ufshcd_hba_stop - Send controller to reset state
5011 * @hba: per adapter instance
5012 * @can_sleep: perform sleep or just spin
5013 */
5014static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
5015{
5016 int err;
5017
5018 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
5019 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
5020 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
5021 10, 1, can_sleep);
5022 if (err)
5023 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
5024}
5025
5026/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305027 * ufshcd_hba_enable - initialize the controller
5028 * @hba: per adapter instance
5029 *
5030 * The controller resets itself and controller firmware initialization
5031 * sequence kicks off. When controller is ready it will set
5032 * the Host Controller Enable bit to 1.
5033 *
5034 * Returns 0 on success, non-zero value on failure
5035 */
5036static int ufshcd_hba_enable(struct ufs_hba *hba)
5037{
5038 int retry;
5039
5040 /*
5041 * msleep of 1 and 5 used in this function might result in msleep(20),
5042 * but it was necessary to send the UFS FPGA to reset mode during
5043 * development and testing of this driver. msleep can be changed to
5044 * mdelay and retry count can be reduced based on the controller.
5045 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02005046 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305047 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02005048 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305049
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005050 /* UniPro link is disabled at this point */
5051 ufshcd_set_link_off(hba);
5052
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02005053 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03005054
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305055 /* start controller initialization sequence */
5056 ufshcd_hba_start(hba);
5057
5058 /*
5059 * To initialize a UFS host controller HCE bit must be set to 1.
5060 * During initialization the HCE bit value changes from 1->0->1.
5061 * When the host controller completes initialization sequence
5062 * it sets the value of HCE bit to 1. The same HCE bit is read back
5063 * to check if the controller has completed initialization sequence.
5064 * So without this delay the value HCE = 1, set in the previous
5065 * instruction might be read back.
5066 * This delay can be changed based on the controller.
5067 */
5068 msleep(1);
5069
5070 /* wait for the host controller to complete initialization */
5071 retry = 10;
5072 while (ufshcd_is_hba_active(hba)) {
5073 if (retry) {
5074 retry--;
5075 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305076 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305077 "Controller enable failed\n");
5078 return -EIO;
5079 }
5080 msleep(5);
5081 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03005082
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005083 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005084 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005085
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02005086 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03005087
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305088 return 0;
5089}
5090
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03005091static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
5092{
5093 int tx_lanes, i, err = 0;
5094
5095 if (!peer)
5096 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
5097 &tx_lanes);
5098 else
5099 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
5100 &tx_lanes);
5101 for (i = 0; i < tx_lanes; i++) {
5102 if (!peer)
5103 err = ufshcd_dme_set(hba,
5104 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
5105 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
5106 0);
5107 else
5108 err = ufshcd_dme_peer_set(hba,
5109 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
5110 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
5111 0);
5112 if (err) {
5113 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
5114 __func__, peer, i, err);
5115 break;
5116 }
5117 }
5118
5119 return err;
5120}
5121
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005122static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
5123{
5124 return ufshcd_disable_tx_lcc(hba, false);
5125}
5126
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03005127static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
5128{
5129 return ufshcd_disable_tx_lcc(hba, true);
5130}
5131
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305132/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305133 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305134 * @hba: per adapter instance
5135 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305136 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305137 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305138static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305139{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305140 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005141 int retries = DME_LINKSTARTUP_RETRIES;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005142 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305143
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005144 /*
5145 * If UFS device isn't active then we will have to issue link startup
5146 * 2 times to make sure the device state move to active.
5147 */
5148 if (!ufshcd_is_ufs_dev_active(hba))
5149 link_startup_again = true;
5150
5151link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005152 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02005153 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305154
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005155 ret = ufshcd_dme_link_startup(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005156 if (ret)
5157 ufshcd_update_error_stats(hba, UFS_ERR_LINKSTARTUP);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03005158
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005159 /* check if device is detected by inter-connect layer */
5160 if (!ret && !ufshcd_is_device_present(hba)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005161 ufshcd_update_error_stats(hba, UFS_ERR_LINKSTARTUP);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005162 dev_err(hba->dev, "%s: Device not present\n", __func__);
5163 ret = -ENXIO;
5164 goto out;
5165 }
5166
5167 /*
5168 * DME link lost indication is only received when link is up,
5169 * but we can't be sure if the link is up until link startup
5170 * succeeds. So reset the local Uni-Pro and try again.
5171 */
5172 if (ret && ufshcd_hba_enable(hba))
5173 goto out;
5174 } while (ret && retries--);
5175
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305176 if (ret)
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005177 /* failed to get the link up... retire */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305178 goto out;
5179
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005180 if (link_startup_again) {
5181 link_startup_again = false;
5182 retries = DME_LINKSTARTUP_RETRIES;
5183 goto link_startup;
5184 }
5185
5186 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
5187 ufshcd_init_pwr_info(hba);
5188 ufshcd_print_pwr_info(hba);
5189
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03005190 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
5191 ret = ufshcd_disable_device_tx_lcc(hba);
5192 if (ret)
5193 goto out;
5194 }
5195
Subhash Jadavani4f0df17b2016-12-16 13:19:27 -08005196 if (hba->dev_info.quirks & UFS_DEVICE_QUIRK_BROKEN_LCC) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005197 ret = ufshcd_disable_host_tx_lcc(hba);
5198 if (ret)
5199 goto out;
5200 }
5201
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03005202 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02005203 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
5204 if (ret)
5205 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03005206
5207 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305208out:
Subhash Jadavani6808e992017-04-05 15:32:09 -07005209 if (ret)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305210 dev_err(hba->dev, "link startup failed %d\n", ret);
Subhash Jadavanief542222017-08-02 16:23:55 -07005211 /*
5212 * For some external cards, link startup succeeds only after few link
5213 * startup attempts and err_state may get set in this case.
5214 * But as the link startup has finally succeded, we are clearing the
5215 * error state.
5216 */
5217 else if (hba->extcon)
5218 ufsdbg_clr_err_state(hba);
Subhash Jadavani6808e992017-04-05 15:32:09 -07005219
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305220 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305221}
5222
5223/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305224 * ufshcd_verify_dev_init() - Verify device initialization
5225 * @hba: per-adapter instance
5226 *
5227 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
5228 * device Transport Protocol (UTP) layer is ready after a reset.
5229 * If the UTP layer at the device side is not initialized, it may
5230 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
5231 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
5232 */
5233static int ufshcd_verify_dev_init(struct ufs_hba *hba)
5234{
5235 int err = 0;
5236 int retries;
5237
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005238 ufshcd_hold_all(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305239 mutex_lock(&hba->dev_cmd.lock);
5240 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
5241 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
5242 NOP_OUT_TIMEOUT);
5243
5244 if (!err || err == -ETIMEDOUT)
5245 break;
5246
5247 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
5248 }
5249 mutex_unlock(&hba->dev_cmd.lock);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005250 ufshcd_release_all(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305251
5252 if (err)
5253 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
5254 return err;
5255}
5256
5257/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005258 * ufshcd_set_queue_depth - set lun queue depth
5259 * @sdev: pointer to SCSI device
5260 *
5261 * Read bLUQueueDepth value and activate scsi tagged command
5262 * queueing. For WLUN, queue depth is set to 1. For best-effort
5263 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
5264 * value that host can queue.
5265 */
5266static void ufshcd_set_queue_depth(struct scsi_device *sdev)
5267{
5268 int ret = 0;
5269 u8 lun_qdepth;
5270 struct ufs_hba *hba;
5271
5272 hba = shost_priv(sdev->host);
5273
5274 lun_qdepth = hba->nutrs;
5275 ret = ufshcd_read_unit_desc_param(hba,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005276 ufshcd_scsi_to_upiu_lun(sdev->lun),
5277 UNIT_DESC_PARAM_LU_Q_DEPTH,
5278 &lun_qdepth,
5279 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005280
5281 /* Some WLUN doesn't support unit descriptor */
5282 if (ret == -EOPNOTSUPP)
5283 lun_qdepth = 1;
5284 else if (!lun_qdepth)
5285 /* eventually, we can figure out the real queue depth */
5286 lun_qdepth = hba->nutrs;
5287 else
5288 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
5289
5290 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
5291 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01005292 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005293}
5294
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005295/*
5296 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
5297 * @hba: per-adapter instance
5298 * @lun: UFS device lun id
5299 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
5300 *
5301 * Returns 0 in case of success and b_lu_write_protect status would be returned
5302 * @b_lu_write_protect parameter.
5303 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
5304 * Returns -EINVAL in case of invalid parameters passed to this function.
5305 */
5306static int ufshcd_get_lu_wp(struct ufs_hba *hba,
5307 u8 lun,
5308 u8 *b_lu_write_protect)
5309{
5310 int ret;
5311
5312 if (!b_lu_write_protect)
5313 ret = -EINVAL;
5314 /*
5315 * According to UFS device spec, RPMB LU can't be write
5316 * protected so skip reading bLUWriteProtect parameter for
5317 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
5318 */
5319 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
5320 ret = -ENOTSUPP;
5321 else
5322 ret = ufshcd_read_unit_desc_param(hba,
5323 lun,
5324 UNIT_DESC_PARAM_LU_WR_PROTECT,
5325 b_lu_write_protect,
5326 sizeof(*b_lu_write_protect));
5327 return ret;
5328}
5329
5330/**
5331 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
5332 * status
5333 * @hba: per-adapter instance
5334 * @sdev: pointer to SCSI device
5335 *
5336 */
5337static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
5338 struct scsi_device *sdev)
5339{
5340 if (hba->dev_info.f_power_on_wp_en &&
5341 !hba->dev_info.is_lu_power_on_wp) {
5342 u8 b_lu_write_protect;
5343
5344 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
5345 &b_lu_write_protect) &&
5346 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
5347 hba->dev_info.is_lu_power_on_wp = true;
5348 }
5349}
5350
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005351/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305352 * ufshcd_slave_alloc - handle initial SCSI device configurations
5353 * @sdev: pointer to SCSI device
5354 *
5355 * Returns success
5356 */
5357static int ufshcd_slave_alloc(struct scsi_device *sdev)
5358{
5359 struct ufs_hba *hba;
5360
5361 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305362
5363 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
5364 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305365
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305366 /* allow SCSI layer to restart the device in case of errors */
5367 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03005368
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03005369 /* REPORT SUPPORTED OPERATION CODES is not supported */
5370 sdev->no_report_opcodes = 1;
5371
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005372 /* WRITE_SAME command is not supported*/
5373 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03005374
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005375 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03005376
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005377 ufshcd_get_lu_power_on_wp_status(hba, sdev);
5378
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03005379 return 0;
5380}
5381
5382/**
5383 * ufshcd_change_queue_depth - change queue depth
5384 * @sdev: pointer to SCSI device
5385 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03005386 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01005387 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03005388 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01005389static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03005390{
5391 struct ufs_hba *hba = shost_priv(sdev->host);
5392
5393 if (depth > hba->nutrs)
5394 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01005395 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305396}
5397
5398/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09005399 * ufshcd_slave_configure - adjust SCSI device configurations
5400 * @sdev: pointer to SCSI device
5401 */
5402static int ufshcd_slave_configure(struct scsi_device *sdev)
5403{
5404 struct request_queue *q = sdev->request_queue;
Subhash Jadavani5ea586f2016-08-17 19:08:09 -07005405 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09005406
5407 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
5408 blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
5409
Subhash Jadavani5ea586f2016-08-17 19:08:09 -07005410 if (hba->scsi_cmd_timeout) {
5411 blk_queue_rq_timeout(q, hba->scsi_cmd_timeout * HZ);
5412 scsi_set_cmd_timeout_override(sdev, hba->scsi_cmd_timeout * HZ);
5413 }
5414
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005415 sdev->autosuspend_delay = UFSHCD_AUTO_SUSPEND_DELAY_MS;
5416 sdev->use_rpm_auto = 1;
5417
Akinobu Mitaeeda4742014-07-01 23:00:32 +09005418 return 0;
5419}
5420
5421/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305422 * ufshcd_slave_destroy - remove SCSI device configurations
5423 * @sdev: pointer to SCSI device
5424 */
5425static void ufshcd_slave_destroy(struct scsi_device *sdev)
5426{
5427 struct ufs_hba *hba;
5428
5429 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005430 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005431 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
5432 unsigned long flags;
5433
5434 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005435 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005436 spin_unlock_irqrestore(hba->host->host_lock, flags);
5437 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305438}
5439
5440/**
5441 * ufshcd_task_req_compl - handle task management request completion
5442 * @hba: per adapter instance
5443 * @index: index of the completed request
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305444 * @resp: task management service response
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305445 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305446 * Returns non-zero value on error, zero on success
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305447 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305448static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index, u8 *resp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305449{
5450 struct utp_task_req_desc *task_req_descp;
5451 struct utp_upiu_task_rsp *task_rsp_upiup;
5452 unsigned long flags;
5453 int ocs_value;
5454 int task_result;
5455
5456 spin_lock_irqsave(hba->host->host_lock, flags);
5457
5458 /* Clear completed tasks from outstanding_tasks */
5459 __clear_bit(index, &hba->outstanding_tasks);
5460
5461 task_req_descp = hba->utmrdl_base_addr;
5462 ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
5463
5464 if (ocs_value == OCS_SUCCESS) {
5465 task_rsp_upiup = (struct utp_upiu_task_rsp *)
5466 task_req_descp[index].task_rsp_upiu;
Kiwoong Kim8794ee02016-09-09 08:22:22 +09005467 task_result = be32_to_cpu(task_rsp_upiup->output_param1);
5468 task_result = task_result & MASK_TM_SERVICE_RESP;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305469 if (resp)
5470 *resp = (u8)task_result;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305471 } else {
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305472 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5473 __func__, ocs_value);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305474 }
5475 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305476
5477 return ocs_value;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305478}
5479
5480/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305481 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
5482 * @lrb: pointer to local reference block of completed command
5483 * @scsi_status: SCSI command status
5484 *
5485 * Returns value base on SCSI command status
5486 */
5487static inline int
5488ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
5489{
5490 int result = 0;
5491
5492 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05305493 case SAM_STAT_CHECK_CONDITION:
5494 ufshcd_copy_sense_data(lrbp);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305495 case SAM_STAT_GOOD:
5496 result |= DID_OK << 16 |
5497 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05305498 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305499 break;
5500 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05305501 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305502 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05305503 ufshcd_copy_sense_data(lrbp);
5504 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305505 break;
5506 default:
5507 result |= DID_ERROR << 16;
5508 break;
5509 } /* end of switch */
5510
5511 return result;
5512}
5513
5514/**
5515 * ufshcd_transfer_rsp_status - Get overall status of the response
5516 * @hba: per adapter instance
5517 * @lrb: pointer to local reference block of completed command
5518 *
5519 * Returns result of the command to notify SCSI midlayer
5520 */
5521static inline int
5522ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
5523{
5524 int result = 0;
5525 int scsi_status;
5526 int ocs;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005527 bool print_prdt;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305528
5529 /* overall command status of utrd */
5530 ocs = ufshcd_get_tr_ocs(lrbp);
5531
5532 switch (ocs) {
5533 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305534 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005535 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305536 switch (result) {
5537 case UPIU_TRANSACTION_RESPONSE:
5538 /*
5539 * get the response UPIU result to extract
5540 * the SCSI command status
5541 */
5542 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
5543
5544 /*
5545 * get the result based on SCSI status response
5546 * to notify the SCSI midlayer of the command status
5547 */
5548 scsi_status = result & MASK_SCSI_STATUS;
5549 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305550
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02005551 /*
5552 * Currently we are only supporting BKOPs exception
5553 * events hence we can ignore BKOPs exception event
5554 * during power management callbacks. BKOPs exception
5555 * event is not expected to be raised in runtime suspend
5556 * callback as it allows the urgent bkops.
5557 * During system suspend, we are anyway forcefully
5558 * disabling the bkops and if urgent bkops is needed
5559 * it will be enabled on system resume. Long term
5560 * solution could be to abort the system suspend if
5561 * UFS device needs urgent BKOPs.
5562 */
5563 if (!hba->pm_op_in_progress &&
5564 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305565 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305566 break;
5567 case UPIU_TRANSACTION_REJECT_UPIU:
5568 /* TODO: handle Reject UPIU Response */
5569 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305570 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305571 "Reject UPIU not fully implemented\n");
5572 break;
5573 default:
5574 result = DID_ERROR << 16;
5575 dev_err(hba->dev,
5576 "Unexpected request response code = %x\n",
5577 result);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305578 break;
5579 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305580 break;
5581 case OCS_ABORTED:
5582 result |= DID_ABORT << 16;
5583 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305584 case OCS_INVALID_COMMAND_STATUS:
5585 result |= DID_REQUEUE << 16;
5586 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305587 case OCS_INVALID_CMD_TABLE_ATTR:
5588 case OCS_INVALID_PRDT_ATTR:
5589 case OCS_MISMATCH_DATA_BUF_SIZE:
5590 case OCS_MISMATCH_RESP_UPIU_SIZE:
5591 case OCS_PEER_COMM_FAILURE:
5592 case OCS_FATAL_ERROR:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005593 case OCS_DEVICE_FATAL_ERROR:
5594 case OCS_INVALID_CRYPTO_CONFIG:
5595 case OCS_GENERAL_CRYPTO_ERROR:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305596 default:
5597 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305598 dev_err(hba->dev,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005599 "OCS error from controller = %x for tag %d\n",
5600 ocs, lrbp->task_tag);
Subhash Jadavani9c807702017-04-01 00:35:51 -07005601 /*
5602 * This is called in interrupt context, hence avoid sleep
5603 * while printing debug registers. Also print only the minimum
5604 * debug registers needed to debug OCS failure.
5605 */
5606 __ufshcd_print_host_regs(hba, true);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005607 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305608 break;
5609 } /* end of switch */
5610
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005611 if ((host_byte(result) != DID_OK) && !hba->silence_err_logs) {
5612 print_prdt = (ocs == OCS_INVALID_PRDT_ATTR ||
5613 ocs == OCS_MISMATCH_DATA_BUF_SIZE);
5614 ufshcd_print_trs(hba, 1 << lrbp->task_tag, print_prdt);
5615 }
5616
5617 if ((host_byte(result) == DID_ERROR) ||
5618 (host_byte(result) == DID_ABORT))
5619 ufsdbg_set_err_state(hba);
5620
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305621 return result;
5622}
5623
5624/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305625 * ufshcd_uic_cmd_compl - handle completion of uic command
5626 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305627 * @intr_status: interrupt status generated by the controller
Subhash Jadavani9c807702017-04-01 00:35:51 -07005628 *
5629 * Returns
5630 * IRQ_HANDLED - If interrupt is valid
5631 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305632 */
Subhash Jadavani9c807702017-04-01 00:35:51 -07005633static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305634{
Subhash Jadavani9c807702017-04-01 00:35:51 -07005635 irqreturn_t retval = IRQ_NONE;
5636
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305637 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305638 hba->active_uic_cmd->argument2 |=
5639 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05305640 hba->active_uic_cmd->argument3 =
5641 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305642 complete(&hba->active_uic_cmd->done);
Subhash Jadavani9c807702017-04-01 00:35:51 -07005643 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305644 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305645
Subhash Jadavani9c807702017-04-01 00:35:51 -07005646 if (intr_status & UFSHCD_UIC_PWR_MASK) {
5647 if (hba->uic_async_done) {
5648 complete(hba->uic_async_done);
5649 retval = IRQ_HANDLED;
5650 } else if (ufshcd_is_auto_hibern8_supported(hba)) {
5651 /*
5652 * If uic_async_done flag is not set then this
5653 * is an Auto hibern8 err interrupt.
5654 * Perform a host reset followed by a full
5655 * link recovery.
5656 */
5657 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5658 hba->force_host_reset = true;
5659 dev_err(hba->dev, "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5660 __func__, (intr_status & UIC_HIBERNATE_ENTER) ?
5661 "Enter" : "Exit",
5662 intr_status, ufshcd_get_upmcrs(hba));
Subhash Jadavanief542222017-08-02 16:23:55 -07005663 /*
5664 * It is possible to see auto-h8 errors during card
5665 * removal, so set this flag and let the error handler
5666 * decide if this error is seen while card was present
5667 * or due to card removal.
5668 * If error is seen during card removal, we don't want
5669 * to printout the debug messages.
5670 */
5671 hba->auto_h8_err = true;
Subhash Jadavani9c807702017-04-01 00:35:51 -07005672 schedule_work(&hba->eh_work);
5673 retval = IRQ_HANDLED;
5674 }
5675 }
5676 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305677}
5678
5679/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005680 * ufshcd_abort_outstanding_requests - abort all outstanding transfer requests.
5681 * @hba: per adapter instance
5682 * @result: error result to inform scsi layer about
5683 */
5684void ufshcd_abort_outstanding_transfer_requests(struct ufs_hba *hba, int result)
5685{
5686 u8 index;
5687 struct ufshcd_lrb *lrbp;
5688 struct scsi_cmnd *cmd;
5689
5690 if (!hba->outstanding_reqs)
5691 return;
5692
5693 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
5694 lrbp = &hba->lrb[index];
5695 cmd = lrbp->cmd;
5696 if (cmd) {
Subhash Jadavani114437e2017-11-08 16:22:16 -08005697 ufshcd_cond_add_cmd_trace(hba, index, "scsi_failed");
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005698 ufshcd_update_error_stats(hba,
5699 UFS_ERR_INT_FATAL_ERRORS);
5700 scsi_dma_unmap(cmd);
5701 cmd->result = result;
5702 /* Clear pending transfer requests */
5703 ufshcd_clear_cmd(hba, index);
5704 ufshcd_outstanding_req_clear(hba, index);
5705 clear_bit_unlock(index, &hba->lrb_in_use);
5706 lrbp->complete_time_stamp = ktime_get();
5707 update_req_stats(hba, lrbp);
5708 /* Mark completed command as NULL in LRB */
5709 lrbp->cmd = NULL;
5710 ufshcd_release_all(hba);
5711 if (cmd->request) {
5712 /*
5713 * As we are accessing the "request" structure,
5714 * this must be called before calling
5715 * ->scsi_done() callback.
5716 */
5717 ufshcd_vops_pm_qos_req_end(hba, cmd->request,
5718 true);
5719 ufshcd_vops_crypto_engine_cfg_end(hba,
5720 lrbp, cmd->request);
5721 }
5722 /* Do not touch lrbp after scsi done */
5723 cmd->scsi_done(cmd);
5724 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
5725 if (hba->dev_cmd.complete) {
5726 ufshcd_cond_add_cmd_trace(hba, index,
Subhash Jadavani114437e2017-11-08 16:22:16 -08005727 "dev_cmd_failed");
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005728 ufshcd_outstanding_req_clear(hba, index);
5729 complete(hba->dev_cmd.complete);
5730 }
5731 }
5732 if (ufshcd_is_clkscaling_supported(hba))
5733 hba->clk_scaling.active_reqs--;
5734 }
5735}
5736
5737/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005738 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305739 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005740 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305741 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005742static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
5743 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305744{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305745 struct ufshcd_lrb *lrbp;
5746 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305747 int result;
5748 int index;
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07005749 struct request *req;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005750
Dolev Ravive9d501b2014-07-01 12:22:37 +03005751 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
5752 lrbp = &hba->lrb[index];
5753 cmd = lrbp->cmd;
5754 if (cmd) {
Subhash Jadavani114437e2017-11-08 16:22:16 -08005755 ufshcd_cond_add_cmd_trace(hba, index, "scsi_cmpl");
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005756 ufshcd_update_tag_stats_completion(hba, cmd);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005757 result = ufshcd_transfer_rsp_status(hba, lrbp);
5758 scsi_dma_unmap(cmd);
5759 cmd->result = result;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005760 clear_bit_unlock(index, &hba->lrb_in_use);
5761 lrbp->complete_time_stamp = ktime_get();
5762 update_req_stats(hba, lrbp);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005763 /* Mark completed command as NULL in LRB */
5764 lrbp->cmd = NULL;
Asutosh Das3da913a2017-03-24 10:32:16 +05305765 hba->ufs_stats.clk_rel.ctx = XFR_REQ_COMPL;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005766 __ufshcd_release(hba, false);
5767 __ufshcd_hibern8_release(hba, false);
5768 if (cmd->request) {
5769 /*
5770 * As we are accessing the "request" structure,
5771 * this must be called before calling
5772 * ->scsi_done() callback.
5773 */
5774 ufshcd_vops_pm_qos_req_end(hba, cmd->request,
5775 false);
5776 ufshcd_vops_crypto_engine_cfg_end(hba,
5777 lrbp, cmd->request);
5778 }
5779
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07005780 req = cmd->request;
5781 if (req) {
5782 /* Update IO svc time latency histogram */
5783 if (req->lat_hist_enabled) {
5784 ktime_t completion;
5785 u_int64_t delta_us;
5786
5787 completion = ktime_get();
5788 delta_us = ktime_us_delta(completion,
5789 req->lat_hist_io_start);
5790 /* rq_data_dir() => true if WRITE */
5791 blk_update_latency_hist(&hba->io_lat_s,
5792 (rq_data_dir(req) == READ),
5793 delta_us);
5794 }
5795 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03005796 /* Do not touch lrbp after scsi done */
5797 cmd->scsi_done(cmd);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005798 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
5799 if (hba->dev_cmd.complete) {
5800 ufshcd_cond_add_cmd_trace(hba, index,
Subhash Jadavani114437e2017-11-08 16:22:16 -08005801 "dev_cmd_cmpl");
Dolev Ravive9d501b2014-07-01 12:22:37 +03005802 complete(hba->dev_cmd.complete);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005803 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03005804 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005805 if (ufshcd_is_clkscaling_supported(hba))
5806 hba->clk_scaling.active_reqs--;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005807 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305808
5809 /* clear corresponding bits of completed commands */
5810 hba->outstanding_reqs ^= completed_reqs;
5811
Sahitya Tummala856b3482014-09-25 15:32:34 +03005812 ufshcd_clk_scaling_update_busy(hba);
5813
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305814 /* we might have free'd some tags above */
5815 wake_up(&hba->dev_cmd.tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305816}
5817
5818/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005819 * ufshcd_transfer_req_compl - handle SCSI and query command completion
5820 * @hba: per adapter instance
Subhash Jadavani9c807702017-04-01 00:35:51 -07005821 *
5822 * Returns
5823 * IRQ_HANDLED - If interrupt is valid
5824 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005825 */
Subhash Jadavani9c807702017-04-01 00:35:51 -07005826static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005827{
5828 unsigned long completed_reqs;
5829 u32 tr_doorbell;
5830
5831 /* Resetting interrupt aggregation counters first and reading the
5832 * DOOR_BELL afterward allows us to handle all the completed requests.
5833 * In order to prevent other interrupts starvation the DB is read once
5834 * after reset. The down side of this solution is the possibility of
5835 * false interrupt if device completes another request after resetting
5836 * aggregation and before reading the DB.
5837 */
5838 if (ufshcd_is_intr_aggr_allowed(hba))
5839 ufshcd_reset_intr_aggr(hba);
5840
5841 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5842 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
5843
Subhash Jadavani9c807702017-04-01 00:35:51 -07005844 if (completed_reqs) {
5845 __ufshcd_transfer_req_compl(hba, completed_reqs);
5846 return IRQ_HANDLED;
5847 } else {
5848 return IRQ_NONE;
5849 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005850}
5851
5852/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305853 * ufshcd_disable_ee - disable exception event
5854 * @hba: per-adapter instance
5855 * @mask: exception event to disable
5856 *
5857 * Disables exception event in the device so that the EVENT_ALERT
5858 * bit is not set.
5859 *
5860 * Returns zero on success, non-zero error value on failure.
5861 */
5862static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
5863{
5864 int err = 0;
5865 u32 val;
5866
5867 if (!(hba->ee_ctrl_mask & mask))
5868 goto out;
5869
5870 val = hba->ee_ctrl_mask & ~mask;
5871 val &= 0xFFFF; /* 2 bytes */
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005872 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305873 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
5874 if (!err)
5875 hba->ee_ctrl_mask &= ~mask;
5876out:
5877 return err;
5878}
5879
5880/**
5881 * ufshcd_enable_ee - enable exception event
5882 * @hba: per-adapter instance
5883 * @mask: exception event to enable
5884 *
5885 * Enable corresponding exception event in the device to allow
5886 * device to alert host in critical scenarios.
5887 *
5888 * Returns zero on success, non-zero error value on failure.
5889 */
5890static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
5891{
5892 int err = 0;
5893 u32 val;
5894
5895 if (hba->ee_ctrl_mask & mask)
5896 goto out;
5897
5898 val = hba->ee_ctrl_mask | mask;
5899 val &= 0xFFFF; /* 2 bytes */
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005900 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305901 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
5902 if (!err)
5903 hba->ee_ctrl_mask |= mask;
5904out:
5905 return err;
5906}
5907
5908/**
5909 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
5910 * @hba: per-adapter instance
5911 *
5912 * Allow device to manage background operations on its own. Enabling
5913 * this might lead to inconsistent latencies during normal data transfers
5914 * as the device is allowed to manage its own way of handling background
5915 * operations.
5916 *
5917 * Returns zero on success, non-zero on failure.
5918 */
5919static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
5920{
5921 int err = 0;
5922
5923 if (hba->auto_bkops_enabled)
5924 goto out;
5925
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005926 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305927 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5928 if (err) {
5929 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
5930 __func__, err);
5931 goto out;
5932 }
5933
5934 hba->auto_bkops_enabled = true;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005935 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), 1);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305936
5937 /* No need of URGENT_BKOPS exception from the device */
5938 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5939 if (err)
5940 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5941 __func__, err);
5942out:
5943 return err;
5944}
5945
5946/**
5947 * ufshcd_disable_auto_bkops - block device in doing background operations
5948 * @hba: per-adapter instance
5949 *
5950 * Disabling background operations improves command response latency but
5951 * has drawback of device moving into critical state where the device is
5952 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5953 * host is idle so that BKOPS are managed effectively without any negative
5954 * impacts.
5955 *
5956 * Returns zero on success, non-zero on failure.
5957 */
5958static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5959{
5960 int err = 0;
5961
5962 if (!hba->auto_bkops_enabled)
5963 goto out;
5964
5965 /*
5966 * If host assisted BKOPs is to be enabled, make sure
5967 * urgent bkops exception is allowed.
5968 */
5969 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5970 if (err) {
5971 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5972 __func__, err);
5973 goto out;
5974 }
5975
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005976 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305977 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5978 if (err) {
5979 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5980 __func__, err);
5981 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5982 goto out;
5983 }
5984
5985 hba->auto_bkops_enabled = false;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005986 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), 0);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305987out:
5988 return err;
5989}
5990
5991/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005992 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305993 * @hba: per adapter instance
5994 *
5995 * After a device reset the device may toggle the BKOPS_EN flag
5996 * to default value. The s/w tracking variables should be updated
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005997 * as well. This function would change the auto-bkops state based on
5998 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305999 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006000static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306001{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006002 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
6003 hba->auto_bkops_enabled = false;
6004 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
6005 ufshcd_enable_auto_bkops(hba);
6006 } else {
6007 hba->auto_bkops_enabled = true;
6008 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
6009 ufshcd_disable_auto_bkops(hba);
6010 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306011}
6012
6013static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
6014{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02006015 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306016 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
6017}
6018
6019/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006020 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
6021 * @hba: per-adapter instance
6022 * @status: bkops_status value
6023 *
6024 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
6025 * flag in the device to permit background operations if the device
6026 * bkops_status is greater than or equal to "status" argument passed to
6027 * this function, disable otherwise.
6028 *
6029 * Returns 0 for success, non-zero in case of failure.
6030 *
6031 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
6032 * to know whether auto bkops is enabled or disabled after this function
6033 * returns control to it.
6034 */
6035static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
6036 enum bkops_status status)
6037{
6038 int err;
6039 u32 curr_status = 0;
6040
6041 err = ufshcd_get_bkops_status(hba, &curr_status);
6042 if (err) {
6043 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
6044 __func__, err);
6045 goto out;
6046 } else if (curr_status > BKOPS_STATUS_MAX) {
6047 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
6048 __func__, curr_status);
6049 err = -EINVAL;
6050 goto out;
6051 }
6052
6053 if (curr_status >= status)
6054 err = ufshcd_enable_auto_bkops(hba);
6055 else
6056 err = ufshcd_disable_auto_bkops(hba);
6057out:
6058 return err;
6059}
6060
6061/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306062 * ufshcd_urgent_bkops - handle urgent bkops exception event
6063 * @hba: per-adapter instance
6064 *
6065 * Enable fBackgroundOpsEn flag in the device to permit background
6066 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006067 *
6068 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
6069 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306070 */
6071static int ufshcd_urgent_bkops(struct ufs_hba *hba)
6072{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006073 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306074}
6075
6076static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
6077{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02006078 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306079 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
6080}
6081
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006082static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
6083{
6084 int err;
6085 u32 curr_status = 0;
6086
6087 if (hba->is_urgent_bkops_lvl_checked)
6088 goto enable_auto_bkops;
6089
6090 err = ufshcd_get_bkops_status(hba, &curr_status);
6091 if (err) {
6092 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
6093 __func__, err);
6094 goto out;
6095 }
6096
6097 /*
6098 * We are seeing that some devices are raising the urgent bkops
6099 * exception events even when BKOPS status doesn't indicate performace
6100 * impacted or critical. Handle these device by determining their urgent
6101 * bkops status at runtime.
6102 */
6103 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
6104 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
6105 __func__, curr_status);
6106 /* update the current status as the urgent bkops level */
6107 hba->urgent_bkops_lvl = curr_status;
6108 hba->is_urgent_bkops_lvl_checked = true;
6109 }
6110
6111enable_auto_bkops:
6112 err = ufshcd_enable_auto_bkops(hba);
6113out:
6114 if (err < 0)
6115 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
6116 __func__, err);
6117}
6118
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306119/**
6120 * ufshcd_exception_event_handler - handle exceptions raised by device
6121 * @work: pointer to work data
6122 *
6123 * Read bExceptionEventStatus attribute from the device and handle the
6124 * exception event accordingly.
6125 */
6126static void ufshcd_exception_event_handler(struct work_struct *work)
6127{
6128 struct ufs_hba *hba;
6129 int err;
6130 u32 status = 0;
6131 hba = container_of(work, struct ufs_hba, eeh_work);
6132
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05306133 pm_runtime_get_sync(hba->dev);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006134 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306135 err = ufshcd_get_ee_status(hba, &status);
6136 if (err) {
6137 dev_err(hba->dev, "%s: failed to get exception status %d\n",
6138 __func__, err);
6139 goto out;
6140 }
6141
6142 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006143
6144 if (status & MASK_EE_URGENT_BKOPS)
6145 ufshcd_bkops_exception_event_handler(hba);
6146
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306147out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006148 ufshcd_scsi_unblock_requests(hba);
Asutosh Das43545b72017-11-14 17:01:40 +05306149 pm_runtime_put(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306150 return;
6151}
6152
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006153/* Complete requests that have door-bell cleared */
6154static void ufshcd_complete_requests(struct ufs_hba *hba)
6155{
6156 ufshcd_transfer_req_compl(hba);
6157 ufshcd_tmc_handler(hba);
6158}
6159
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306160/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02006161 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
6162 * to recover from the DL NAC errors or not.
6163 * @hba: per-adapter instance
6164 *
6165 * Returns true if error handling is required, false otherwise
6166 */
6167static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
6168{
6169 unsigned long flags;
6170 bool err_handling = true;
6171
6172 spin_lock_irqsave(hba->host->host_lock, flags);
6173 /*
6174 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
6175 * device fatal error and/or DL NAC & REPLAY timeout errors.
6176 */
6177 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
6178 goto out;
6179
6180 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
6181 ((hba->saved_err & UIC_ERROR) &&
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006182 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR))) {
6183 /*
6184 * we have to do error recovery but atleast silence the error
6185 * logs.
6186 */
6187 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02006188 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006189 }
Yaniv Gardi583fa622016-03-10 17:37:13 +02006190
6191 if ((hba->saved_err & UIC_ERROR) &&
6192 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
6193 int err;
6194 /*
6195 * wait for 50ms to see if we can get any other errors or not.
6196 */
6197 spin_unlock_irqrestore(hba->host->host_lock, flags);
6198 msleep(50);
6199 spin_lock_irqsave(hba->host->host_lock, flags);
6200
6201 /*
6202 * now check if we have got any other severe errors other than
6203 * DL NAC error?
6204 */
6205 if ((hba->saved_err & INT_FATAL_ERRORS) ||
6206 ((hba->saved_err & UIC_ERROR) &&
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006207 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR))) {
6208 if (((hba->saved_err & INT_FATAL_ERRORS) ==
6209 DEVICE_FATAL_ERROR) || (hba->saved_uic_err &
6210 ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR))
6211 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02006212 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006213 }
Yaniv Gardi583fa622016-03-10 17:37:13 +02006214
6215 /*
6216 * As DL NAC is the only error received so far, send out NOP
6217 * command to confirm if link is still active or not.
6218 * - If we don't get any response then do error recovery.
6219 * - If we get response then clear the DL NAC error bit.
6220 */
6221
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006222 /* silence the error logs from NOP command */
6223 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02006224 spin_unlock_irqrestore(hba->host->host_lock, flags);
6225 err = ufshcd_verify_dev_init(hba);
6226 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006227 hba->silence_err_logs = false;
Yaniv Gardi583fa622016-03-10 17:37:13 +02006228
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006229 if (err) {
6230 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02006231 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006232 }
Yaniv Gardi583fa622016-03-10 17:37:13 +02006233
6234 /* Link seems to be alive hence ignore the DL NAC errors */
6235 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
6236 hba->saved_err &= ~UIC_ERROR;
6237 /* clear NAC error */
6238 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
6239 if (!hba->saved_uic_err) {
6240 err_handling = false;
6241 goto out;
6242 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006243 /*
6244 * there seems to be some errors other than NAC, so do error
6245 * recovery
6246 */
6247 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02006248 }
6249out:
6250 spin_unlock_irqrestore(hba->host->host_lock, flags);
6251 return err_handling;
6252}
6253
6254/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306255 * ufshcd_err_handler - handle UFS errors that require s/w attention
6256 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306257 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306258static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306259{
6260 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306261 unsigned long flags;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006262 bool err_xfer = false, err_tm = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306263 int err = 0;
6264 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006265 bool needs_reset = false;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006266 bool clks_enabled = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306267
6268 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306269
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306270 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanief542222017-08-02 16:23:55 -07006271 if (hba->extcon) {
6272 if (ufshcd_is_card_online(hba)) {
6273 spin_unlock_irqrestore(hba->host->host_lock, flags);
6274 /*
6275 * TODO: need better way to ensure that this delay is
6276 * more than extcon's debounce-ms
6277 */
6278 msleep(300);
6279 spin_lock_irqsave(hba->host->host_lock, flags);
6280 }
6281
6282 /*
6283 * ignore error if card was online and offline/removed now or
6284 * card was already offline.
6285 */
6286 if (ufshcd_is_card_offline(hba)) {
6287 hba->saved_err = 0;
6288 hba->saved_uic_err = 0;
6289 hba->saved_ce_err = 0;
6290 hba->auto_h8_err = false;
6291 hba->force_host_reset = false;
6292 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6293 goto out;
6294 }
6295 }
6296
Subhash Jadavani9c807702017-04-01 00:35:51 -07006297 ufsdbg_set_err_state(hba);
6298
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006299 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306300 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306301
Subhash Jadavani9c807702017-04-01 00:35:51 -07006302 /*
6303 * Make sure the clocks are ON before we proceed with err
6304 * handling. For the majority of cases err handler would be
6305 * run with clocks ON. There is a possibility that the err
6306 * handler was scheduled due to auto hibern8 error interrupt,
6307 * in which case the clocks could be gated or be in the
6308 * process of gating when the err handler runs.
6309 */
6310 if (unlikely((hba->clk_gating.state != CLKS_ON) &&
6311 ufshcd_is_auto_hibern8_supported(hba))) {
6312 spin_unlock_irqrestore(hba->host->host_lock, flags);
Asutosh Das3da913a2017-03-24 10:32:16 +05306313 hba->ufs_stats.clk_hold.ctx = ERR_HNDLR_WORK;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006314 ufshcd_hold(hba, false);
6315 spin_lock_irqsave(hba->host->host_lock, flags);
6316 clks_enabled = true;
6317 }
6318
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306319 hba->ufshcd_state = UFSHCD_STATE_RESET;
6320 ufshcd_set_eh_in_progress(hba);
6321
6322 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006323 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02006324
Subhash Jadavani4f0df17b2016-12-16 13:19:27 -08006325 if (hba->dev_info.quirks &
6326 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
Yaniv Gardi583fa622016-03-10 17:37:13 +02006327 bool ret;
6328
6329 spin_unlock_irqrestore(hba->host->host_lock, flags);
6330 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
6331 ret = ufshcd_quirk_dl_nac_errors(hba);
6332 spin_lock_irqsave(hba->host->host_lock, flags);
6333 if (!ret)
6334 goto skip_err_handling;
6335 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006336
6337 /*
6338 * Dump controller state before resetting. Transfer requests state
6339 * will be dump as part of the request completion.
6340 */
Subhash Jadavanief542222017-08-02 16:23:55 -07006341 if ((hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) ||
6342 hba->auto_h8_err) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006343 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x",
6344 __func__, hba->saved_err, hba->saved_uic_err);
6345 if (!hba->silence_err_logs) {
Subhash Jadavani9c807702017-04-01 00:35:51 -07006346 /* release lock as print host regs sleeps */
6347 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006348 ufshcd_print_host_regs(hba);
6349 ufshcd_print_host_state(hba);
6350 ufshcd_print_pwr_info(hba);
6351 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
Can Guof6411eb2017-06-09 15:17:22 +08006352 ufshcd_print_cmd_log(hba);
Subhash Jadavani9c807702017-04-01 00:35:51 -07006353 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006354 }
Subhash Jadavanief542222017-08-02 16:23:55 -07006355 hba->auto_h8_err = false;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006356 }
6357
Subhash Jadavani9c807702017-04-01 00:35:51 -07006358 if ((hba->saved_err & INT_FATAL_ERRORS)
6359 || hba->saved_ce_err || hba->force_host_reset ||
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006360 ((hba->saved_err & UIC_ERROR) &&
6361 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
6362 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
6363 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
6364 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306365
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006366 /*
6367 * if host reset is required then skip clearing the pending
6368 * transfers forcefully because they will automatically get
6369 * cleared after link startup.
6370 */
6371 if (needs_reset)
6372 goto skip_pending_xfer_clear;
6373
6374 /* release lock as clear command might sleep */
6375 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306376 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006377 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
6378 if (ufshcd_clear_cmd(hba, tag)) {
6379 err_xfer = true;
6380 goto lock_skip_pending_xfer_clear;
6381 }
6382 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306383
6384 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006385 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
6386 if (ufshcd_clear_tm_cmd(hba, tag)) {
6387 err_tm = true;
6388 goto lock_skip_pending_xfer_clear;
6389 }
6390 }
6391
6392lock_skip_pending_xfer_clear:
6393 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306394
6395 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006396 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306397
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006398 if (err_xfer || err_tm)
6399 needs_reset = true;
6400
6401skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306402 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006403 if (needs_reset) {
6404 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
6405
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006406 if (hba->saved_err & INT_FATAL_ERRORS)
6407 ufshcd_update_error_stats(hba,
6408 UFS_ERR_INT_FATAL_ERRORS);
6409 if (hba->saved_ce_err)
6410 ufshcd_update_error_stats(hba, UFS_ERR_CRYPTO_ENGINE);
6411
6412 if (hba->saved_err & UIC_ERROR)
6413 ufshcd_update_error_stats(hba,
6414 UFS_ERR_INT_UIC_ERROR);
6415
6416 if (err_xfer || err_tm)
6417 ufshcd_update_error_stats(hba,
6418 UFS_ERR_CLEAR_PEND_XFER_TM);
6419
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006420 /*
6421 * ufshcd_reset_and_restore() does the link reinitialization
6422 * which will need atleast one empty doorbell slot to send the
6423 * device management commands (NOP and query commands).
6424 * If there is no slot empty at this moment then free up last
6425 * slot forcefully.
6426 */
6427 if (hba->outstanding_reqs == max_doorbells)
6428 __ufshcd_transfer_req_compl(hba,
6429 (1UL << (hba->nutrs - 1)));
6430
6431 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306432 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006433 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306434 if (err) {
6435 dev_err(hba->dev, "%s: reset and restore failed\n",
6436 __func__);
6437 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6438 }
6439 /*
6440 * Inform scsi mid-layer that we did reset and allow to handle
6441 * Unit Attention properly.
6442 */
6443 scsi_report_bus_reset(hba->host, 0);
6444 hba->saved_err = 0;
6445 hba->saved_uic_err = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006446 hba->saved_ce_err = 0;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006447 hba->force_host_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306448 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006449
Yaniv Gardi583fa622016-03-10 17:37:13 +02006450skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006451 if (!needs_reset) {
6452 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6453 if (hba->saved_err || hba->saved_uic_err)
6454 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
6455 __func__, hba->saved_err, hba->saved_uic_err);
6456 }
6457
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006458 hba->silence_err_logs = false;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006459
Asutosh Das3da913a2017-03-24 10:32:16 +05306460 if (clks_enabled) {
Subhash Jadavani9c807702017-04-01 00:35:51 -07006461 __ufshcd_release(hba, false);
Asutosh Das3da913a2017-03-24 10:32:16 +05306462 hba->ufs_stats.clk_rel.ctx = ERR_HNDLR_WORK;
6463 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306464out:
Subhash Jadavani9c807702017-04-01 00:35:51 -07006465 ufshcd_clear_eh_in_progress(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006466 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306467}
6468
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006469static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
6470 u32 reg)
6471{
6472 reg_hist->reg[reg_hist->pos] = reg;
6473 reg_hist->tstamp[reg_hist->pos] = ktime_get();
6474 reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
6475}
6476
Asutosh Das3923c232017-09-15 16:14:26 +05306477static void ufshcd_rls_handler(struct work_struct *work)
6478{
6479 struct ufs_hba *hba;
6480 int ret = 0;
6481 u32 mode;
6482
6483 hba = container_of(work, struct ufs_hba, rls_work);
6484 ufshcd_scsi_block_requests(hba);
6485 pm_runtime_get_sync(hba->dev);
6486 ret = ufshcd_wait_for_doorbell_clr(hba, U64_MAX);
6487 if (ret) {
6488 dev_err(hba->dev,
6489 "Timed out (%d) waiting for DB to clear\n",
6490 ret);
6491 goto out;
6492 }
6493
6494 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode);
6495 if (hba->pwr_info.pwr_rx != ((mode >> PWR_RX_OFFSET) & PWR_INFO_MASK))
6496 hba->restore_needed = true;
6497
6498 if (hba->pwr_info.pwr_tx != (mode & PWR_INFO_MASK))
6499 hba->restore_needed = true;
6500
6501 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_RXGEAR), &mode);
6502 if (hba->pwr_info.gear_rx != mode)
6503 hba->restore_needed = true;
6504
6505 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TXGEAR), &mode);
6506 if (hba->pwr_info.gear_tx != mode)
6507 hba->restore_needed = true;
6508
6509 if (hba->restore_needed)
6510 ret = ufshcd_config_pwr_mode(hba, &(hba->pwr_info));
6511
6512 if (ret)
6513 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6514 __func__, ret);
6515 else
6516 hba->restore_needed = false;
6517
6518out:
6519 ufshcd_scsi_unblock_requests(hba);
6520 pm_runtime_put_sync(hba->dev);
6521}
6522
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306523/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306524 * ufshcd_update_uic_error - check and set fatal UIC error flags.
6525 * @hba: per-adapter instance
Subhash Jadavani9c807702017-04-01 00:35:51 -07006526 *
6527 * Returns
6528 * IRQ_HANDLED - If interrupt is valid
6529 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306530 */
Subhash Jadavani9c807702017-04-01 00:35:51 -07006531static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306532{
6533 u32 reg;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006534 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306535
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006536 /* PHY layer lane error */
6537 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006538 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Subhash Jadavani9c807702017-04-01 00:35:51 -07006539 (reg & UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006540 /*
6541 * To know whether this error is fatal or not, DB timeout
6542 * must be checked but this error is handled separately.
6543 */
6544 dev_dbg(hba->dev, "%s: UIC Lane error reported, reg 0x%x\n",
6545 __func__, reg);
6546 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
Subhash Jadavani9c807702017-04-01 00:35:51 -07006547
6548 /*
6549 * Don't ignore LINERESET indication during hibern8
6550 * enter operation.
6551 */
6552 if (reg & UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR) {
6553 struct uic_command *cmd = hba->active_uic_cmd;
6554
6555 if (cmd) {
6556 if (cmd->command == UIC_CMD_DME_HIBER_ENTER) {
6557 dev_err(hba->dev, "%s: LINERESET during hibern8 enter, reg 0x%x\n",
6558 __func__, reg);
6559 hba->full_init_linereset = true;
6560 }
6561 }
Asutosh Das3923c232017-09-15 16:14:26 +05306562 if (!hba->full_init_linereset)
6563 schedule_work(&hba->rls_work);
Subhash Jadavani9c807702017-04-01 00:35:51 -07006564 }
6565 retval |= IRQ_HANDLED;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006566 }
6567
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306568 /* PA_INIT_ERROR is fatal and needs UIC reset */
6569 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Subhash Jadavani9c807702017-04-01 00:35:51 -07006570 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
6571 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006572 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
6573
Subhash Jadavani9c807702017-04-01 00:35:51 -07006574 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT) {
6575 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
6576 } else if (hba->dev_info.quirks &
6577 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6578 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
6579 hba->uic_error |=
6580 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
6581 else if (reg &
6582 UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
6583 hba->uic_error |=
6584 UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
6585 }
6586 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02006587 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306588
6589 /* UIC NL/TL/DME errors needs software retry */
6590 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Subhash Jadavani9c807702017-04-01 00:35:51 -07006591 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
6592 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006593 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306594 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006595 retval |= IRQ_HANDLED;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006596 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306597
6598 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Subhash Jadavani9c807702017-04-01 00:35:51 -07006599 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
6600 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006601 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306602 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006603 retval |= IRQ_HANDLED;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006604 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306605
6606 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Subhash Jadavani9c807702017-04-01 00:35:51 -07006607 if ((reg & UIC_DME_ERROR) &&
6608 (reg & UIC_DME_ERROR_CODE_MASK)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006609 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306610 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006611 retval |= IRQ_HANDLED;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006612 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306613
6614 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
6615 __func__, hba->uic_error);
Subhash Jadavani9c807702017-04-01 00:35:51 -07006616 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306617}
6618
6619/**
6620 * ufshcd_check_errors - Check for errors that need s/w attention
6621 * @hba: per-adapter instance
Subhash Jadavani9c807702017-04-01 00:35:51 -07006622 *
6623 * Returns
6624 * IRQ_HANDLED - If interrupt is valid
6625 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306626 */
Subhash Jadavani9c807702017-04-01 00:35:51 -07006627static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306628{
6629 bool queue_eh_work = false;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006630 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306631
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006632 if (hba->errors & INT_FATAL_ERRORS || hba->ce_error)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306633 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306634
6635 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306636 hba->uic_error = 0;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006637 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306638 if (hba->uic_error)
6639 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306640 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306641
Subhash Jadavanief542222017-08-02 16:23:55 -07006642 if (hba->extcon && ufshcd_is_card_offline(hba)) {
6643 /* ignore UIC errors if card is offline */
6644 retval |= IRQ_HANDLED;
6645 } else if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006646 /*
6647 * update the transfer error masks to sticky bits, let's do this
6648 * irrespective of current ufshcd_state.
6649 */
6650 hba->saved_err |= hba->errors;
6651 hba->saved_uic_err |= hba->uic_error;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006652 hba->saved_ce_err |= hba->ce_error;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006653
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306654 /* handle fatal errors only when link is functional */
6655 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
Subhash Jadavani9c807702017-04-01 00:35:51 -07006656 /*
6657 * Set error handling in progress flag early so that we
6658 * don't issue new requests any more.
6659 */
6660 ufshcd_set_eh_in_progress(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306661
Zang Leiganga17bddc2017-04-04 19:32:20 +00006662 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306663 schedule_work(&hba->eh_work);
6664 }
Subhash Jadavani9c807702017-04-01 00:35:51 -07006665 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306666 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306667 /*
6668 * if (!queue_eh_work) -
6669 * Other errors are either non-fatal where host recovers
6670 * itself without s/w intervention or errors that will be
6671 * handled by the SCSI core layer.
6672 */
Subhash Jadavani9c807702017-04-01 00:35:51 -07006673 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306674}
6675
6676/**
6677 * ufshcd_tmc_handler - handle task management function completion
6678 * @hba: per adapter instance
Subhash Jadavani9c807702017-04-01 00:35:51 -07006679 *
6680 * Returns
6681 * IRQ_HANDLED - If interrupt is valid
6682 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306683 */
Subhash Jadavani9c807702017-04-01 00:35:51 -07006684static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306685{
6686 u32 tm_doorbell;
6687
Seungwon Jeonb873a2752013-06-26 22:39:26 +05306688 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306689 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006690 if (hba->tm_condition) {
6691 wake_up(&hba->tm_wq);
6692 return IRQ_HANDLED;
6693 } else {
6694 return IRQ_NONE;
6695 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306696}
6697
6698/**
6699 * ufshcd_sl_intr - Interrupt service routine
6700 * @hba: per adapter instance
6701 * @intr_status: contains interrupts generated by the controller
Subhash Jadavani9c807702017-04-01 00:35:51 -07006702 *
6703 * Returns
6704 * IRQ_HANDLED - If interrupt is valid
6705 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306706 */
Subhash Jadavani9c807702017-04-01 00:35:51 -07006707static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306708{
Subhash Jadavani9c807702017-04-01 00:35:51 -07006709 irqreturn_t retval = IRQ_NONE;
6710
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006711 ufsdbg_error_inject_dispatcher(hba,
6712 ERR_INJECT_INTR, intr_status, &intr_status);
6713
6714 ufshcd_vops_crypto_engine_get_status(hba, &hba->ce_error);
6715
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306716 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006717 if (hba->errors || hba->ce_error)
Subhash Jadavani9c807702017-04-01 00:35:51 -07006718 retval |= ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306719
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05306720 if (intr_status & UFSHCD_UIC_MASK)
Subhash Jadavani9c807702017-04-01 00:35:51 -07006721 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306722
6723 if (intr_status & UTP_TASK_REQ_COMPL)
Subhash Jadavani9c807702017-04-01 00:35:51 -07006724 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306725
6726 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Subhash Jadavani9c807702017-04-01 00:35:51 -07006727 retval |= ufshcd_transfer_req_compl(hba);
6728
6729 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306730}
6731
6732/**
6733 * ufshcd_intr - Main interrupt service routine
6734 * @irq: irq number
6735 * @__hba: pointer to adapter instance
6736 *
Subhash Jadavani9c807702017-04-01 00:35:51 -07006737 * Returns
6738 * IRQ_HANDLED - If interrupt is valid
6739 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306740 */
6741static irqreturn_t ufshcd_intr(int irq, void *__hba)
6742{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02006743 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306744 irqreturn_t retval = IRQ_NONE;
6745 struct ufs_hba *hba = __hba;
Subhash Jadavani9c807702017-04-01 00:35:51 -07006746 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306747
6748 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05306749 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Asutosh Das3da913a2017-03-24 10:32:16 +05306750 hba->ufs_stats.last_intr_status = intr_status;
6751 hba->ufs_stats.last_intr_ts = ktime_get();
Subhash Jadavani9c807702017-04-01 00:35:51 -07006752 /*
6753 * There could be max of hba->nutrs reqs in flight and in worst case
6754 * if the reqs get finished 1 by 1 after the interrupt status is
6755 * read, make sure we handle them by checking the interrupt status
6756 * again in a loop until we process all of the reqs before returning.
6757 */
6758 do {
6759 enabled_intr_status =
6760 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
6761 if (intr_status)
6762 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
6763 if (enabled_intr_status)
6764 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02006765
Subhash Jadavani9c807702017-04-01 00:35:51 -07006766 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
6767 } while (intr_status && --retries);
6768
6769 if (retval == IRQ_NONE) {
6770 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
6771 __func__, intr_status);
6772 ufshcd_hex_dump(hba, "host regs: ", hba->mmio_base,
6773 UFSHCI_REG_SPACE_SIZE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306774 }
Subhash Jadavani9c807702017-04-01 00:35:51 -07006775
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306776 spin_unlock(hba->host->host_lock);
6777 return retval;
6778}
6779
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306780static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
6781{
6782 int err = 0;
6783 u32 mask = 1 << tag;
6784 unsigned long flags;
6785
6786 if (!test_bit(tag, &hba->outstanding_tasks))
6787 goto out;
6788
6789 spin_lock_irqsave(hba->host->host_lock, flags);
6790 ufshcd_writel(hba, ~(1 << tag), REG_UTP_TASK_REQ_LIST_CLEAR);
6791 spin_unlock_irqrestore(hba->host->host_lock, flags);
6792
6793 /* poll for max. 1 sec to clear door bell register by h/w */
6794 err = ufshcd_wait_for_register(hba,
6795 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02006796 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306797out:
6798 return err;
6799}
6800
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306801/**
6802 * ufshcd_issue_tm_cmd - issues task management commands to controller
6803 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306804 * @lun_id: LUN ID to which TM command is sent
6805 * @task_id: task ID to which the TM command is applicable
6806 * @tm_function: task management function opcode
6807 * @tm_response: task management service response return value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306808 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306809 * Returns non-zero value on error, zero on success.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306810 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306811static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
6812 u8 tm_function, u8 *tm_response)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306813{
6814 struct utp_task_req_desc *task_req_descp;
6815 struct utp_upiu_task_req *task_req_upiup;
6816 struct Scsi_Host *host;
6817 unsigned long flags;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306818 int free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306819 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306820 int task_tag;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306821
6822 host = hba->host;
6823
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306824 /*
6825 * Get free slot, sleep if slots are unavailable.
6826 * Even though we use wait_event() which sleeps indefinitely,
6827 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
6828 */
6829 wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
Asutosh Das3da913a2017-03-24 10:32:16 +05306830 hba->ufs_stats.clk_hold.ctx = TM_CMD_SEND;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006831 ufshcd_hold_all(hba);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306832
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306833 spin_lock_irqsave(host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306834 task_req_descp = hba->utmrdl_base_addr;
6835 task_req_descp += free_slot;
6836
6837 /* Configure task request descriptor */
6838 task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6839 task_req_descp->header.dword_2 =
6840 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6841
6842 /* Configure task request UPIU */
6843 task_req_upiup =
6844 (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306845 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306846 task_req_upiup->header.dword_0 =
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306847 UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306848 lun_id, task_tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306849 task_req_upiup->header.dword_1 =
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306850 UPIU_HEADER_DWORD(0, tm_function, 0, 0);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03006851 /*
6852 * The host shall provide the same value for LUN field in the basic
6853 * header and for Input Parameter.
6854 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306855 task_req_upiup->input_param1 = cpu_to_be32(lun_id);
6856 task_req_upiup->input_param2 = cpu_to_be32(task_id);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306857
6858 /* send command to the controller */
6859 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02006860
6861 /* Make sure descriptors are ready before ringing the task doorbell */
6862 wmb();
6863
Seungwon Jeonb873a2752013-06-26 22:39:26 +05306864 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006865 /* Make sure that doorbell is committed immediately */
6866 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306867
6868 spin_unlock_irqrestore(host->host_lock, flags);
6869
6870 /* wait until the task management command is completed */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306871 err = wait_event_timeout(hba->tm_wq,
6872 test_bit(free_slot, &hba->tm_condition),
6873 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306874 if (!err) {
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306875 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
6876 __func__, tm_function);
6877 if (ufshcd_clear_tm_cmd(hba, free_slot))
6878 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
6879 __func__, free_slot);
6880 err = -ETIMEDOUT;
6881 } else {
6882 err = ufshcd_task_req_compl(hba, free_slot, tm_response);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306883 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306884
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306885 clear_bit(free_slot, &hba->tm_condition);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306886 ufshcd_put_tm_slot(hba, free_slot);
6887 wake_up(&hba->tm_tag_wq);
Asutosh Das3da913a2017-03-24 10:32:16 +05306888 hba->ufs_stats.clk_rel.ctx = TM_CMD_SEND;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306889
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006890 ufshcd_release_all(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306891 return err;
6892}
6893
6894/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306895 * ufshcd_eh_device_reset_handler - device reset handler registered to
6896 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306897 * @cmd: SCSI command pointer
6898 *
6899 * Returns SUCCESS/FAILED
6900 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306901static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306902{
6903 struct Scsi_Host *host;
6904 struct ufs_hba *hba;
6905 unsigned int tag;
6906 u32 pos;
6907 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306908 u8 resp = 0xF;
6909 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306910 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306911
6912 host = cmd->device->host;
6913 hba = shost_priv(host);
6914 tag = cmd->request->tag;
6915
Can Guof6411eb2017-06-09 15:17:22 +08006916 ufshcd_print_cmd_log(hba);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306917 lrbp = &hba->lrb[tag];
6918 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6919 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306920 if (!err)
6921 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306922 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306923 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306924
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306925 /* clear the commands that were pending for corresponding LUN */
6926 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6927 if (hba->lrb[pos].lun == lrbp->lun) {
6928 err = ufshcd_clear_cmd(hba, pos);
6929 if (err)
6930 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306931 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306932 }
6933 spin_lock_irqsave(host->host_lock, flags);
6934 ufshcd_transfer_req_compl(hba);
6935 spin_unlock_irqrestore(host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006936
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306937out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006938 hba->req_abort_count = 0;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306939 if (!err) {
6940 err = SUCCESS;
6941 } else {
6942 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6943 err = FAILED;
6944 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306945 return err;
6946}
6947
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006948static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6949{
6950 struct ufshcd_lrb *lrbp;
6951 int tag;
6952
6953 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6954 lrbp = &hba->lrb[tag];
6955 lrbp->req_abort_skip = true;
6956 }
6957}
6958
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306959/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306960 * ufshcd_abort - abort a specific command
6961 * @cmd: SCSI command pointer
6962 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306963 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6964 * command, and in host controller by clearing the door-bell register. There can
6965 * be race between controller sending the command to the device while abort is
6966 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6967 * really issued and then try to abort it.
6968 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306969 * Returns SUCCESS/FAILED
6970 */
6971static int ufshcd_abort(struct scsi_cmnd *cmd)
6972{
6973 struct Scsi_Host *host;
6974 struct ufs_hba *hba;
6975 unsigned long flags;
6976 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306977 int err = 0;
6978 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306979 u8 resp = 0xF;
6980 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006981 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306982
6983 host = cmd->device->host;
6984 hba = shost_priv(host);
6985 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02006986 if (!ufshcd_valid_tag(hba, tag)) {
6987 dev_err(hba->dev,
6988 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6989 __func__, tag, cmd, cmd->request);
6990 BUG();
6991 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306992
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006993 lrbp = &hba->lrb[tag];
6994
6995 ufshcd_update_error_stats(hba, UFS_ERR_TASK_ABORT);
6996
6997 /*
6998 * Task abort to the device W-LUN is illegal. When this command
6999 * will fail, due to spec violation, scsi err handling next step
7000 * will be to send LU reset which, again, is a spec violation.
7001 * To avoid these unnecessary/illegal step we skip to the last error
7002 * handling stage: reset and restore.
7003 */
7004 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
7005 return ufshcd_eh_host_reset_handler(cmd);
7006
7007 ufshcd_hold_all(hba);
Dolev Ravive9d501b2014-07-01 12:22:37 +03007008 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02007009 /* If command is already aborted/completed, return SUCCESS */
7010 if (!(test_bit(tag, &hba->outstanding_reqs))) {
7011 dev_err(hba->dev,
7012 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
7013 __func__, tag, hba->outstanding_reqs, reg);
7014 goto out;
7015 }
7016
Dolev Ravive9d501b2014-07-01 12:22:37 +03007017 if (!(reg & (1 << tag))) {
7018 dev_err(hba->dev,
7019 "%s: cmd was completed, but without a notifying intr, tag = %d",
7020 __func__, tag);
7021 }
7022
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007023 /* Print Transfer Request of aborted task */
7024 dev_err(hba->dev, "%s: Device abort task at tag %d", __func__, tag);
7025
7026 /*
7027 * Print detailed info about aborted request.
7028 * As more than one request might get aborted at the same time,
7029 * print full information only for the first aborted request in order
7030 * to reduce repeated printouts. For other aborted requests only print
7031 * basic details.
7032 */
7033 scsi_print_command(cmd);
7034 if (!hba->req_abort_count) {
Sayali Lokhande501c5bb2017-11-15 15:54:33 +05307035 ufshcd_print_fsm_state(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007036 ufshcd_print_host_regs(hba);
7037 ufshcd_print_host_state(hba);
7038 ufshcd_print_pwr_info(hba);
7039 ufshcd_print_trs(hba, 1 << tag, true);
7040 } else {
7041 ufshcd_print_trs(hba, 1 << tag, false);
7042 }
7043 hba->req_abort_count++;
7044
7045
7046 /* Skip task abort in case previous aborts failed and report failure */
7047 if (lrbp->req_abort_skip) {
7048 err = -EIO;
7049 goto out;
7050 }
7051
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307052 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
7053 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
7054 UFS_QUERY_TASK, &resp);
7055 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
7056 /* cmd pending in the device */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007057 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d",
7058 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307059 break;
7060 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307061 /*
7062 * cmd not pending in the device, check if it is
7063 * in transition.
7064 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007065 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.",
7066 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307067 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
7068 if (reg & (1 << tag)) {
7069 /* sleep for max. 200us to stabilize */
7070 usleep_range(100, 200);
7071 continue;
7072 }
7073 /* command completed already */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007074 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.",
7075 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307076 goto out;
7077 } else {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007078 dev_err(hba->dev,
7079 "%s: no response from device. tag = %d, err %d",
7080 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307081 if (!err)
7082 err = resp; /* service response error */
7083 goto out;
7084 }
7085 }
7086
7087 if (!poll_cnt) {
7088 err = -EBUSY;
7089 goto out;
7090 }
7091
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05307092 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
7093 UFS_ABORT_TASK, &resp);
7094 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007095 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307096 err = resp; /* service response error */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007097 dev_err(hba->dev, "%s: issued. tag = %d, err %d",
7098 __func__, tag, err);
7099 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307100 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05307101 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307102
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307103 err = ufshcd_clear_cmd(hba, tag);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007104 if (err) {
7105 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d",
7106 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307107 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007108 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307109
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307110 scsi_dma_unmap(cmd);
7111
7112 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02007113 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307114 hba->lrb[tag].cmd = NULL;
7115 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307116
7117 clear_bit_unlock(tag, &hba->lrb_in_use);
7118 wake_up(&hba->dev_cmd.tag_wq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007119
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307120out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307121 if (!err) {
7122 err = SUCCESS;
7123 } else {
7124 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007125 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307126 err = FAILED;
7127 }
7128
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007129 /*
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007130 * This ufshcd_release_all() corresponds to the original scsi cmd that
7131 * got aborted here (as we won't get any IRQ for it).
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007132 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007133 ufshcd_release_all(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307134 return err;
7135}
7136
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307137/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307138 * ufshcd_host_reset_and_restore - reset and restore host controller
7139 * @hba: per-adapter instance
7140 *
7141 * Note that host controller reset may issue DME_RESET to
7142 * local and remote (device) Uni-Pro stack and the attributes
7143 * are reset to default state.
7144 *
7145 * Returns zero on success, non-zero on failure
7146 */
7147static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
7148{
7149 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307150 unsigned long flags;
7151
7152 /* Reset the host controller */
7153 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02007154 ufshcd_hba_stop(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307155 spin_unlock_irqrestore(hba->host->host_lock, flags);
7156
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007157 /* scale up clocks to max frequency before full reinitialization */
7158 ufshcd_set_clk_freq(hba, true);
7159
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307160 err = ufshcd_hba_enable(hba);
7161 if (err)
7162 goto out;
7163
7164 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007165 err = ufshcd_probe_hba(hba);
7166
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007167 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL)) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307168 err = -EIO;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007169 goto out;
7170 }
7171
7172 if (!err) {
7173 err = ufshcd_vops_crypto_engine_reset(hba);
7174 if (err) {
7175 dev_err(hba->dev,
7176 "%s: failed to reset crypto engine %d\n",
7177 __func__, err);
7178 goto out;
7179 }
7180 }
7181
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307182out:
7183 if (err)
7184 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
7185
7186 return err;
7187}
7188
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07007189static int ufshcd_detect_device(struct ufs_hba *hba)
7190{
7191 int err = 0;
7192
7193 err = ufshcd_vops_full_reset(hba);
7194 if (err)
7195 dev_warn(hba->dev, "%s: full reset returned %d\n",
7196 __func__, err);
7197
7198 err = ufshcd_reset_device(hba);
7199 if (err)
7200 dev_warn(hba->dev, "%s: device reset failed. err %d\n",
7201 __func__, err);
7202
7203 return ufshcd_host_reset_and_restore(hba);
7204}
7205
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307206/**
7207 * ufshcd_reset_and_restore - reset and re-initialize host/device
7208 * @hba: per-adapter instance
7209 *
7210 * Reset and recover device, host and re-establish link. This
7211 * is helpful to recover the communication in fatal error conditions.
7212 *
7213 * Returns zero on success, non-zero on failure
7214 */
7215static int ufshcd_reset_and_restore(struct ufs_hba *hba)
7216{
7217 int err = 0;
7218 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007219 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307220
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007221 do {
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07007222 err = ufshcd_detect_device(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007223 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307224
7225 /*
Sayali Lokhande8d7652782017-09-15 12:08:17 +05307226 * There is no point proceeding even after failing
7227 * to recover after multiple retries.
7228 */
7229 if (err && ufshcd_is_embedded_dev(hba))
7230 BUG();
7231 /*
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307232 * After reset the door-bell might be cleared, complete
7233 * outstanding requests in s/w here.
7234 */
7235 spin_lock_irqsave(hba->host->host_lock, flags);
7236 ufshcd_transfer_req_compl(hba);
7237 ufshcd_tmc_handler(hba);
7238 spin_unlock_irqrestore(hba->host->host_lock, flags);
7239
7240 return err;
7241}
7242
7243/**
7244 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
7245 * @cmd - SCSI command pointer
7246 *
7247 * Returns SUCCESS/FAILED
7248 */
7249static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
7250{
Subhash Jadavani9c807702017-04-01 00:35:51 -07007251 int err = SUCCESS;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307252 unsigned long flags;
7253 struct ufs_hba *hba;
7254
7255 hba = shost_priv(cmd->device->host);
7256
7257 /*
7258 * Check if there is any race with fatal error handling.
7259 * If so, wait for it to complete. Even though fatal error
7260 * handling does reset and restore in some cases, don't assume
7261 * anything out of it. We are just avoiding race here.
7262 */
7263 do {
7264 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05307265 if (!(work_pending(&hba->eh_work) ||
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307266 hba->ufshcd_state == UFSHCD_STATE_RESET))
7267 break;
7268 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani9c807702017-04-01 00:35:51 -07007269 dev_err(hba->dev, "%s: reset in progress - 1\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05307270 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307271 } while (1);
7272
Subhash Jadavani9c807702017-04-01 00:35:51 -07007273 /*
7274 * we don't know if previous reset had really reset the host controller
7275 * or not. So let's force reset here to be sure.
7276 */
7277 hba->ufshcd_state = UFSHCD_STATE_ERROR;
7278 hba->force_host_reset = true;
7279 schedule_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307280
Subhash Jadavani9c807702017-04-01 00:35:51 -07007281 /* wait for the reset work to finish */
7282 do {
7283 if (!(work_pending(&hba->eh_work) ||
7284 hba->ufshcd_state == UFSHCD_STATE_RESET))
7285 break;
7286 spin_unlock_irqrestore(hba->host->host_lock, flags);
7287 dev_err(hba->dev, "%s: reset in progress - 2\n", __func__);
7288 flush_work(&hba->eh_work);
7289 spin_lock_irqsave(hba->host->host_lock, flags);
7290 } while (1);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307291
Subhash Jadavani9c807702017-04-01 00:35:51 -07007292 if (!((hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) &&
7293 ufshcd_is_link_active(hba))) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307294 err = FAILED;
7295 hba->ufshcd_state = UFSHCD_STATE_ERROR;
7296 }
Subhash Jadavani9c807702017-04-01 00:35:51 -07007297
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307298 spin_unlock_irqrestore(hba->host->host_lock, flags);
7299
7300 return err;
7301}
7302
7303/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007304 * ufshcd_get_max_icc_level - calculate the ICC level
7305 * @sup_curr_uA: max. current supported by the regulator
7306 * @start_scan: row at the desc table to start scan from
7307 * @buff: power descriptor buffer
7308 *
7309 * Returns calculated max ICC level for specific regulator
7310 */
7311static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
7312{
7313 int i;
7314 int curr_uA;
7315 u16 data;
7316 u16 unit;
7317
7318 for (i = start_scan; i >= 0; i--) {
7319 data = be16_to_cpu(*((u16 *)(buff + 2*i)));
7320 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
7321 ATTR_ICC_LVL_UNIT_OFFSET;
7322 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
7323 switch (unit) {
7324 case UFSHCD_NANO_AMP:
7325 curr_uA = curr_uA / 1000;
7326 break;
7327 case UFSHCD_MILI_AMP:
7328 curr_uA = curr_uA * 1000;
7329 break;
7330 case UFSHCD_AMP:
7331 curr_uA = curr_uA * 1000 * 1000;
7332 break;
7333 case UFSHCD_MICRO_AMP:
7334 default:
7335 break;
7336 }
7337 if (sup_curr_uA >= curr_uA)
7338 break;
7339 }
7340 if (i < 0) {
7341 i = 0;
7342 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
7343 }
7344
7345 return (u32)i;
7346}
7347
7348/**
Subhash Jadavania8d1ba32016-12-12 18:19:21 -08007349 * ufshcd_find_max_sup_active_icc_level - find the max ICC level
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007350 * In case regulators are not initialized we'll return 0
7351 * @hba: per-adapter instance
7352 * @desc_buf: power descriptor buffer to extract ICC levels from.
7353 * @len: length of desc_buff
7354 *
Subhash Jadavania8d1ba32016-12-12 18:19:21 -08007355 * Returns calculated max ICC level
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007356 */
7357static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
7358 u8 *desc_buf, int len)
7359{
7360 u32 icc_level = 0;
7361
Subhash Jadavania8d1ba32016-12-12 18:19:21 -08007362 /*
7363 * VCCQ rail is optional for removable UFS card and also most of the
7364 * vendors don't use this rail for embedded UFS devices as well. So
7365 * it is normal that VCCQ rail may not be provided for given platform.
7366 */
7367 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq2) {
7368 dev_err(hba->dev, "%s: Regulator capability was not set, bActiveICCLevel=%d\n",
7369 __func__, icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007370 goto out;
7371 }
7372
7373 if (hba->vreg_info.vcc)
7374 icc_level = ufshcd_get_max_icc_level(
7375 hba->vreg_info.vcc->max_uA,
7376 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
7377 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
7378
7379 if (hba->vreg_info.vccq)
7380 icc_level = ufshcd_get_max_icc_level(
7381 hba->vreg_info.vccq->max_uA,
7382 icc_level,
7383 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
7384
7385 if (hba->vreg_info.vccq2)
7386 icc_level = ufshcd_get_max_icc_level(
7387 hba->vreg_info.vccq2->max_uA,
7388 icc_level,
7389 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
7390out:
7391 return icc_level;
7392}
7393
Subhash Jadavani8a93dbd2016-12-12 17:59:44 -08007394static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007395{
7396 int ret;
Michal' Potomski833ea2a2017-05-31 15:25:11 +05307397 int buff_len = hba->desc_size.pwr_desc;
7398 u8 *desc_buf = NULL;
Subhash Jadavani35732e52016-12-09 16:09:42 -08007399 u32 icc_level;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007400
Michal' Potomski833ea2a2017-05-31 15:25:11 +05307401 if (buff_len) {
7402 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7403 if (!desc_buf) {
7404 dev_err(hba->dev,
7405 "%s: Failed to allocate desc_buf\n", __func__);
7406 return;
7407 }
7408 }
7409
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007410 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
7411 if (ret) {
7412 dev_err(hba->dev,
7413 "%s: Failed reading power descriptor.len = %d ret = %d",
7414 __func__, buff_len, ret);
7415 return;
7416 }
7417
Subhash Jadavani35732e52016-12-09 16:09:42 -08007418 icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
7419 buff_len);
7420 dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007421
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02007422 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Subhash Jadavani35732e52016-12-09 16:09:42 -08007423 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007424
7425 if (ret)
7426 dev_err(hba->dev,
7427 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
Subhash Jadavani35732e52016-12-09 16:09:42 -08007428 __func__, icc_level, ret);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007429}
7430
7431/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007432 * ufshcd_scsi_add_wlus - Adds required W-LUs
7433 * @hba: per-adapter instance
7434 *
Subhash Jadavani2df121a2016-12-15 18:27:31 -08007435 * UFS devices can support upto 4 well known logical units:
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007436 * "REPORT_LUNS" (address: 01h)
7437 * "UFS Device" (address: 50h)
7438 * "RPMB" (address: 44h)
7439 * "BOOT" (address: 30h)
Subhash Jadavani2df121a2016-12-15 18:27:31 -08007440 *
7441 * "REPORT_LUNS" & "UFS Device" are mandatory for all device classes (see
7442 * "bDeviceSubClass" parameter of device descriptor) while "BOOT" is supported
7443 * only for bootable devices. "RPMB" is only supported with embedded devices.
7444 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007445 * UFS device's power management needs to be controlled by "POWER CONDITION"
7446 * field of SSU (START STOP UNIT) command. But this "power condition" field
7447 * will take effect only when its sent to "UFS device" well known logical unit
7448 * hence we require the scsi_device instance to represent this logical unit in
7449 * order for the UFS host driver to send the SSU command for power management.
7450
7451 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
7452 * Block) LU so user space process can control this LU. User space may also
7453 * want to have access to BOOT LU.
7454
Subhash Jadavani2df121a2016-12-15 18:27:31 -08007455 * This function tries to add scsi device instances for each of all well known
7456 * LUs (except "REPORT LUNS" LU) depending on device class.
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007457 *
7458 * Returns zero on success (all required W-LUs are added successfully),
7459 * non-zero error value on failure (if failed to add any of the required W-LU).
7460 */
7461static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
7462{
7463 int ret = 0;
Channagoud Kadabi075db3b2017-03-16 14:26:17 -07007464 struct scsi_device *sdev_rpmb = NULL;
7465 struct scsi_device *sdev_boot = NULL;
Subhash Jadavani2df121a2016-12-15 18:27:31 -08007466 bool is_bootable_dev = false;
7467 bool is_embedded_dev = false;
7468
7469 if ((hba->dev_info.b_device_sub_class == UFS_DEV_EMBEDDED_BOOTABLE) ||
7470 (hba->dev_info.b_device_sub_class == UFS_DEV_REMOVABLE_BOOTABLE))
7471 is_bootable_dev = true;
7472
7473 if ((hba->dev_info.b_device_sub_class == UFS_DEV_EMBEDDED_BOOTABLE) ||
7474 (hba->dev_info.b_device_sub_class == UFS_DEV_EMBEDDED_NON_BOOTABLE))
7475 is_embedded_dev = true;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007476
7477 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
7478 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
7479 if (IS_ERR(hba->sdev_ufs_device)) {
7480 ret = PTR_ERR(hba->sdev_ufs_device);
Subhash Jadavani2df121a2016-12-15 18:27:31 -08007481 dev_err(hba->dev, "%s: failed adding DEVICE_WLUN. ret %d\n",
7482 __func__, ret);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007483 hba->sdev_ufs_device = NULL;
7484 goto out;
7485 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007486 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007487
Subhash Jadavani2df121a2016-12-15 18:27:31 -08007488 if (is_bootable_dev) {
7489 sdev_boot = __scsi_add_device(hba->host, 0, 0,
7490 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN),
7491 NULL);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007492
Subhash Jadavani2df121a2016-12-15 18:27:31 -08007493 if (IS_ERR(sdev_boot)) {
7494 dev_err(hba->dev, "%s: failed adding BOOT_WLUN. ret %d\n",
7495 __func__, ret);
7496 ret = PTR_ERR(sdev_boot);
7497 goto remove_sdev_ufs_device;
7498 }
7499 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007500 }
Subhash Jadavani2df121a2016-12-15 18:27:31 -08007501
7502 if (is_embedded_dev) {
7503 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
7504 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN),
7505 NULL);
7506 if (IS_ERR(sdev_rpmb)) {
7507 dev_err(hba->dev, "%s: failed adding RPMB_WLUN. ret %d\n",
7508 __func__, ret);
7509 ret = PTR_ERR(sdev_rpmb);
7510 goto remove_sdev_boot;
7511 }
7512 scsi_device_put(sdev_rpmb);
7513 }
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007514 goto out;
7515
7516remove_sdev_boot:
Subhash Jadavani2df121a2016-12-15 18:27:31 -08007517 if (is_bootable_dev)
7518 scsi_remove_device(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007519remove_sdev_ufs_device:
7520 scsi_remove_device(hba->sdev_ufs_device);
7521out:
7522 return ret;
7523}
7524
7525/**
Yaniv Gardi37113102016-03-10 17:37:16 +02007526 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
7527 * @hba: per-adapter instance
7528 *
7529 * PA_TActivate parameter can be tuned manually if UniPro version is less than
7530 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
7531 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
7532 * the hibern8 exit latency.
7533 *
7534 * Returns zero on success, non-zero error value on failure.
7535 */
7536static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
7537{
7538 int ret = 0;
7539 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
7540
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007541 if (!ufshcd_is_unipro_pa_params_tuning_req(hba))
7542 return 0;
7543
Yaniv Gardi37113102016-03-10 17:37:16 +02007544 ret = ufshcd_dme_peer_get(hba,
7545 UIC_ARG_MIB_SEL(
7546 RX_MIN_ACTIVATETIME_CAPABILITY,
7547 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7548 &peer_rx_min_activatetime);
7549 if (ret)
7550 goto out;
7551
7552 /* make sure proper unit conversion is applied */
7553 tuned_pa_tactivate =
7554 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
7555 / PA_TACTIVATE_TIME_UNIT_US);
7556 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7557 tuned_pa_tactivate);
7558
7559out:
7560 return ret;
7561}
7562
7563/**
7564 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
7565 * @hba: per-adapter instance
7566 *
7567 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
7568 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
7569 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
7570 * This optimal value can help reduce the hibern8 exit latency.
7571 *
7572 * Returns zero on success, non-zero error value on failure.
7573 */
7574static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
7575{
7576 int ret = 0;
7577 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
7578 u32 max_hibern8_time, tuned_pa_hibern8time;
7579
7580 ret = ufshcd_dme_get(hba,
7581 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
7582 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
7583 &local_tx_hibern8_time_cap);
7584 if (ret)
7585 goto out;
7586
7587 ret = ufshcd_dme_peer_get(hba,
7588 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
7589 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7590 &peer_rx_hibern8_time_cap);
7591 if (ret)
7592 goto out;
7593
7594 max_hibern8_time = max(local_tx_hibern8_time_cap,
7595 peer_rx_hibern8_time_cap);
7596 /* make sure proper unit conversion is applied */
7597 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
7598 / PA_HIBERN8_TIME_UNIT_US);
7599 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
7600 tuned_pa_hibern8time);
7601out:
7602 return ret;
7603}
7604
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007605/**
7606 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
7607 * less than device PA_TACTIVATE time.
7608 * @hba: per-adapter instance
7609 *
7610 * Some UFS devices require host PA_TACTIVATE to be lower than device
7611 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
7612 * for such devices.
7613 *
7614 * Returns zero on success, non-zero error value on failure.
7615 */
7616static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
7617{
7618 int ret = 0;
7619 u32 granularity, peer_granularity;
7620 u32 pa_tactivate, peer_pa_tactivate;
7621 u32 pa_tactivate_us, peer_pa_tactivate_us;
7622 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
7623
7624 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7625 &granularity);
7626 if (ret)
7627 goto out;
7628
7629 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7630 &peer_granularity);
7631 if (ret)
7632 goto out;
7633
7634 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
7635 (granularity > PA_GRANULARITY_MAX_VAL)) {
7636 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
7637 __func__, granularity);
7638 return -EINVAL;
7639 }
7640
7641 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
7642 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
7643 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
7644 __func__, peer_granularity);
7645 return -EINVAL;
7646 }
7647
7648 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
7649 if (ret)
7650 goto out;
7651
7652 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
7653 &peer_pa_tactivate);
7654 if (ret)
7655 goto out;
7656
7657 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
7658 peer_pa_tactivate_us = peer_pa_tactivate *
7659 gran_to_us_table[peer_granularity - 1];
7660
7661 if (pa_tactivate_us > peer_pa_tactivate_us) {
7662 u32 new_peer_pa_tactivate;
7663
7664 new_peer_pa_tactivate = pa_tactivate_us /
7665 gran_to_us_table[peer_granularity - 1];
7666 new_peer_pa_tactivate++;
7667 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7668 new_peer_pa_tactivate);
7669 }
7670
7671out:
7672 return ret;
7673}
7674
Yaniv Gardi37113102016-03-10 17:37:16 +02007675static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
7676{
7677 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
7678 ufshcd_tune_pa_tactivate(hba);
7679 ufshcd_tune_pa_hibern8time(hba);
7680 }
7681
Subhash Jadavani4f0df17b2016-12-16 13:19:27 -08007682 if (hba->dev_info.quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
Yaniv Gardi37113102016-03-10 17:37:16 +02007683 /* set 1ms timeout for PA_TACTIVATE */
7684 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007685
Subhash Jadavani4f0df17b2016-12-16 13:19:27 -08007686 if (hba->dev_info.quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007687 ufshcd_quirk_tune_host_pa_tactivate(hba);
7688
7689 ufshcd_vops_apply_dev_quirks(hba);
7690}
7691
7692static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
7693{
7694 int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
7695
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007696 memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
7697 memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
7698 memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
7699 memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
7700 memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
7701
7702 hba->req_abort_count = 0;
7703}
7704
7705static void ufshcd_apply_pm_quirks(struct ufs_hba *hba)
7706{
Subhash Jadavani4f0df17b2016-12-16 13:19:27 -08007707 if (hba->dev_info.quirks & UFS_DEVICE_QUIRK_NO_LINK_OFF) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007708 if (ufs_get_pm_lvl_to_link_pwr_state(hba->rpm_lvl) ==
7709 UIC_LINK_OFF_STATE) {
7710 hba->rpm_lvl =
7711 ufs_get_desired_pm_lvl_for_dev_link_state(
7712 UFS_SLEEP_PWR_MODE,
7713 UIC_LINK_HIBERN8_STATE);
7714 dev_info(hba->dev, "UFS_DEVICE_QUIRK_NO_LINK_OFF enabled, changed rpm_lvl to %d\n",
7715 hba->rpm_lvl);
7716 }
7717 if (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
7718 UIC_LINK_OFF_STATE) {
7719 hba->spm_lvl =
7720 ufs_get_desired_pm_lvl_for_dev_link_state(
7721 UFS_SLEEP_PWR_MODE,
7722 UIC_LINK_HIBERN8_STATE);
7723 dev_info(hba->dev, "UFS_DEVICE_QUIRK_NO_LINK_OFF enabled, changed spm_lvl to %d\n",
7724 hba->spm_lvl);
7725 }
7726 }
Yaniv Gardi37113102016-03-10 17:37:16 +02007727}
7728
7729/**
Subhash Jadavani88f99992016-12-13 15:52:21 -08007730 * ufshcd_set_dev_ref_clk - set the device bRefClkFreq
7731 * @hba: per-adapter instance
7732 *
7733 * Read the current value of the bRefClkFreq attribute from device and update it
7734 * if host is supplying different reference clock frequency than one mentioned
7735 * in bRefClkFreq attribute.
7736 *
7737 * Returns zero on success, non-zero error value on failure.
7738 */
7739static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
7740{
7741 int err = 0;
7742 int ref_clk = -1;
7743 static const char * const ref_clk_freqs[] = {"19.2 MHz", "26 MHz",
7744 "38.4 MHz", "52 MHz"};
7745
7746 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
7747 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
7748
7749 if (err) {
7750 dev_err(hba->dev, "%s: failed reading bRefClkFreq. err = %d\n",
7751 __func__, err);
7752 goto out;
7753 }
7754
7755 if ((ref_clk < 0) || (ref_clk > REF_CLK_FREQ_52_MHZ)) {
7756 dev_err(hba->dev, "%s: invalid ref_clk setting = %d\n",
7757 __func__, ref_clk);
7758 err = -EINVAL;
7759 goto out;
7760 }
7761
7762 if (ref_clk == hba->dev_ref_clk_freq)
7763 goto out; /* nothing to update */
7764
7765 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7766 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0,
7767 &hba->dev_ref_clk_freq);
7768
7769 if (err)
7770 dev_err(hba->dev, "%s: bRefClkFreq setting to %s failed\n",
7771 __func__, ref_clk_freqs[hba->dev_ref_clk_freq]);
7772 else
7773 /*
7774 * It is good to print this out here to debug any later failures
7775 * related to gear switch.
7776 */
7777 dev_info(hba->dev, "%s: bRefClkFreq setting to %s succeeded\n",
7778 __func__, ref_clk_freqs[hba->dev_ref_clk_freq]);
7779
7780out:
7781 return err;
7782}
7783
Subhash Jadavani344c16c2016-12-15 17:09:35 -08007784static int ufs_read_device_desc_data(struct ufs_hba *hba)
7785{
7786 int err;
Michal' Potomski833ea2a2017-05-31 15:25:11 +05307787 u8 *desc_buf = NULL;
Subhash Jadavani344c16c2016-12-15 17:09:35 -08007788
Michal' Potomski833ea2a2017-05-31 15:25:11 +05307789 if (hba->desc_size.dev_desc) {
7790 desc_buf = kmalloc(hba->desc_size.dev_desc, GFP_KERNEL);
7791 if (!desc_buf) {
7792 err = -ENOMEM;
7793 dev_err(hba->dev,
7794 "%s: Failed to allocate desc_buf\n", __func__);
7795 return err;
7796 }
7797 }
7798 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
Subhash Jadavani344c16c2016-12-15 17:09:35 -08007799 if (err)
7800 return err;
7801
7802 /*
7803 * getting vendor (manufacturerID) and Bank Index in big endian
7804 * format
7805 */
7806 hba->dev_info.w_manufacturer_id =
7807 desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
7808 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
7809 hba->dev_info.b_device_sub_class =
7810 desc_buf[DEVICE_DESC_PARAM_DEVICE_SUB_CLASS];
7811 hba->dev_info.i_product_name = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
7812
7813 return 0;
7814}
7815
Michal' Potomski833ea2a2017-05-31 15:25:11 +05307816static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
7817{
7818 int err;
7819
7820 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
7821 &hba->desc_size.dev_desc);
7822 if (err)
7823 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
7824
7825 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
7826 &hba->desc_size.pwr_desc);
7827 if (err)
7828 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
7829
7830 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
7831 &hba->desc_size.interc_desc);
7832 if (err)
7833 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
7834
7835 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
7836 &hba->desc_size.conf_desc);
7837 if (err)
7838 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
7839
7840 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
7841 &hba->desc_size.unit_desc);
7842 if (err)
7843 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
7844
7845 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
7846 &hba->desc_size.geom_desc);
7847 if (err)
7848 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
7849}
7850
7851static void ufshcd_def_desc_sizes(struct ufs_hba *hba)
7852{
7853 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
7854 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
7855 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
7856 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
7857 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
7858 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
7859}
7860
Subhash Jadavani88f99992016-12-13 15:52:21 -08007861/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007862 * ufshcd_probe_hba - probe hba to detect device and initialize
7863 * @hba: per-adapter instance
7864 *
7865 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307866 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007867static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307868{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307869 int ret;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007870 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307871
7872 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307873 if (ret)
7874 goto out;
7875
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007876 /* Debug counters initialization */
7877 ufshcd_clear_dbg_ufs_stats(hba);
Yaniv Gardiafdfff52016-03-10 17:37:15 +02007878 /* set the default level for urgent bkops */
7879 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
7880 hba->is_urgent_bkops_lvl_checked = false;
7881
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007882 /* UniPro link is active now */
7883 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05307884
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307885 ret = ufshcd_verify_dev_init(hba);
7886 if (ret)
7887 goto out;
7888
Dolev Raviv68078d52013-07-30 00:35:58 +05307889 ret = ufshcd_complete_dev_init(hba);
7890 if (ret)
7891 goto out;
7892
Subhash Jadavani2df121a2016-12-15 18:27:31 -08007893 /* clear any previous UFS device information */
7894 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
7895
Subhash Jadavani344c16c2016-12-15 17:09:35 -08007896 /* cache important parameters from device descriptor for later use */
7897 ret = ufs_read_device_desc_data(hba);
7898 if (ret)
7899 goto out;
7900
Michal' Potomski833ea2a2017-05-31 15:25:11 +05307901 /* Init check for device descriptor sizes */
7902 ufshcd_init_desc_sizes(hba);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007903 ufs_advertise_fixup_device(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02007904 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02007905
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007906 ufshcd_apply_pm_quirks(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02007907 ret = ufshcd_set_vccq_rail_unused(hba,
Subhash Jadavani4f0df17b2016-12-16 13:19:27 -08007908 (hba->dev_info.quirks & UFS_DEVICE_NO_VCCQ) ? true : false);
Yaniv Gardi60f01872016-03-10 17:37:11 +02007909 if (ret)
7910 goto out;
7911
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007912 /* UFS device is also active now */
7913 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307914 ufshcd_force_reset_auto_bkops(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307915
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007916 if (ufshcd_get_max_pwr_mode(hba)) {
7917 dev_err(hba->dev,
7918 "%s: Failed getting max supported power mode\n",
7919 __func__);
7920 } else {
Subhash Jadavani88f99992016-12-13 15:52:21 -08007921 /*
7922 * Set the right value to bRefClkFreq before attempting to
7923 * switch to HS gears.
7924 */
7925 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007926 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007927 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007928 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
7929 __func__, ret);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007930 goto out;
7931 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007932 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007933
Subhash Jadavani8a93dbd2016-12-12 17:59:44 -08007934 /*
7935 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
7936 * and for removable UFS card as well, hence always set the parameter.
7937 * Note: Error handler may issue the device reset hence resetting
7938 * bActiveICCLevel as well so it is always safe to set this here.
7939 */
7940 ufshcd_set_active_icc_lvl(hba);
7941
Yaniv Gardi53c12d02016-02-01 15:02:45 +02007942 /* set the state as operational after switching to desired gear */
7943 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007944 /*
7945 * If we are in error handling context or in power management callbacks
7946 * context, no need to scan the host
7947 */
7948 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7949 bool flag;
7950
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02007951 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7952 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007953 hba->dev_info.f_power_on_wp_en = flag;
7954
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007955 /* Add required well known logical units to scsi mid layer */
7956 if (ufshcd_scsi_add_wlus(hba))
7957 goto out;
7958
Subhash Jadavani9c807702017-04-01 00:35:51 -07007959 /* Initialize devfreq after UFS device is detected */
7960 if (ufshcd_is_clkscaling_supported(hba)) {
7961 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7962 &hba->pwr_info, sizeof(struct ufs_pa_layer_attr));
7963 hba->clk_scaling.saved_pwr_info.is_valid = true;
7964 hba->clk_scaling.is_scaled_up = true;
7965 if (!hba->devfreq) {
7966 hba->devfreq = devfreq_add_device(hba->dev,
7967 &ufs_devfreq_profile,
7968 "simple_ondemand",
7969 gov_data);
7970 if (IS_ERR(hba->devfreq)) {
7971 ret = PTR_ERR(hba->devfreq);
7972 dev_err(hba->dev, "Unable to register with devfreq %d\n",
7973 ret);
7974 goto out;
7975 }
7976 }
7977 hba->clk_scaling.is_allowed = true;
7978 }
7979
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307980 scsi_scan_host(hba->host);
7981 pm_runtime_put_sync(hba->dev);
7982 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007983
Subhash Jadavani9c807702017-04-01 00:35:51 -07007984 /*
7985 * Enable auto hibern8 if supported, after full host and
7986 * device initialization.
7987 */
7988 if (ufshcd_is_auto_hibern8_supported(hba))
7989 ufshcd_set_auto_hibern8_timer(hba,
7990 hba->hibern8_on_idle.delay_ms);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307991out:
Subhash Jadavani0eebfea2017-07-19 16:53:47 -07007992 if (ret) {
7993 ufshcd_set_ufs_dev_poweroff(hba);
7994 ufshcd_set_link_off(hba);
Subhash Jadavanief542222017-08-02 16:23:55 -07007995 if (hba->extcon) {
7996 if (!ufshcd_is_card_online(hba))
7997 ufsdbg_clr_err_state(hba);
7998 ufshcd_set_card_offline(hba);
7999 }
8000 } else if (hba->extcon) {
8001 ufshcd_set_card_online(hba);
Subhash Jadavani0eebfea2017-07-19 16:53:47 -07008002 }
8003
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008004 /*
8005 * If we failed to initialize the device or the device is not
8006 * present, turn off the power/clocks etc.
8007 */
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07008008 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008009 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008010
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008011 trace_ufshcd_init(dev_name(hba->dev), ret,
8012 ktime_to_us(ktime_sub(ktime_get(), start)),
8013 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008014 return ret;
8015}
8016
Subhash Jadavanief542222017-08-02 16:23:55 -07008017static void ufshcd_remove_device(struct ufs_hba *hba)
8018{
8019 struct scsi_device *sdev;
8020 struct scsi_device *sdev_cache[UFS_MAX_LUS];
8021 int sdev_count = 0, i;
8022 unsigned long flags;
8023
8024 ufshcd_hold_all(hba);
8025 /* Reset the host controller */
8026 spin_lock_irqsave(hba->host->host_lock, flags);
8027 hba->silence_err_logs = true;
8028 ufshcd_hba_stop(hba, false);
8029 spin_unlock_irqrestore(hba->host->host_lock, flags);
8030
8031 ufshcd_set_ufs_dev_poweroff(hba);
8032 ufshcd_set_link_off(hba);
8033 __ufshcd_shutdown_clkscaling(hba);
8034
8035 /* Complete requests that have door-bell cleared by h/w */
8036 ufshcd_complete_requests(hba);
8037
8038 /* remove all scsi devices */
8039 list_for_each_entry(sdev, &hba->host->__devices, siblings) {
8040 if (sdev_count < UFS_MAX_LUS) {
8041 sdev_cache[sdev_count] = sdev;
8042 sdev_count++;
8043 }
8044 }
8045
8046 for (i = 0; i < sdev_count; i++)
8047 scsi_remove_device(sdev_cache[i]);
8048
8049 spin_lock_irqsave(hba->host->host_lock, flags);
8050 hba->silence_err_logs = false;
8051 spin_unlock_irqrestore(hba->host->host_lock, flags);
8052
8053 ufshcd_release_all(hba);
8054}
8055
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07008056static void ufshcd_card_detect_handler(struct work_struct *work)
8057{
8058 struct ufs_hba *hba;
8059
8060 hba = container_of(work, struct ufs_hba, card_detect_work);
Subhash Jadavanief542222017-08-02 16:23:55 -07008061
8062 if (ufshcd_is_card_online(hba) && !hba->sdev_ufs_device) {
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07008063 pm_runtime_get_sync(hba->dev);
8064 ufshcd_detect_device(hba);
Subhash Jadavani2d7e4e82017-07-25 15:56:45 -07008065 /* ufshcd_probe_hba() calls pm_runtime_put_sync() on exit */
Subhash Jadavanief542222017-08-02 16:23:55 -07008066 } else if (ufshcd_is_card_offline(hba) && hba->sdev_ufs_device) {
8067 pm_runtime_get_sync(hba->dev);
8068 ufshcd_remove_device(hba);
8069 pm_runtime_put_sync(hba->dev);
8070 ufsdbg_clr_err_state(hba);
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07008071 }
8072}
8073
8074static int ufshcd_card_detect_notifier(struct notifier_block *nb,
8075 unsigned long event, void *ptr)
8076{
8077 struct ufs_hba *hba = container_of(nb, struct ufs_hba, card_detect_nb);
8078
Subhash Jadavanief542222017-08-02 16:23:55 -07008079 if (event)
8080 ufshcd_set_card_online(hba);
8081 else
8082 ufshcd_set_card_offline(hba);
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07008083
Subhash Jadavanief542222017-08-02 16:23:55 -07008084 if (ufshcd_is_card_offline(hba) && !hba->sdev_ufs_device)
8085 goto out;
8086
8087 /*
8088 * card insertion/removal are very infrequent events and having this
8089 * message helps if there is some issue with card detection/removal.
8090 */
8091 dev_info(hba->dev, "%s: card %s notification rcvd\n",
8092 __func__, ufshcd_is_card_online(hba) ? "inserted" : "removed");
8093
8094 schedule_work(&hba->card_detect_work);
8095out:
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07008096 return NOTIFY_DONE;
8097}
8098
8099static int ufshcd_extcon_register(struct ufs_hba *hba)
8100{
8101 int ret;
8102
8103 if (!hba->extcon)
8104 return 0;
8105
8106 hba->card_detect_nb.notifier_call = ufshcd_card_detect_notifier;
8107 ret = extcon_register_notifier(hba->extcon,
8108 EXTCON_MECHANICAL,
8109 &hba->card_detect_nb);
8110 if (ret)
8111 dev_err(hba->dev, "%s: extcon_register_notifier() failed, ret %d\n",
8112 __func__, ret);
8113
8114 return ret;
8115}
8116
8117static int ufshcd_extcon_unregister(struct ufs_hba *hba)
8118{
8119 int ret;
8120
8121 if (!hba->extcon)
8122 return 0;
8123
8124 ret = extcon_unregister_notifier(hba->extcon, EXTCON_MECHANICAL,
8125 &hba->card_detect_nb);
8126 if (ret)
8127 dev_err(hba->dev, "%s: extcon_unregister_notifier() failed, ret %d\n",
8128 __func__, ret);
8129
8130 return ret;
8131}
8132
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008133/**
8134 * ufshcd_async_scan - asynchronous execution for probing hba
8135 * @data: data pointer to pass to this function
8136 * @cookie: cookie data
8137 */
8138static void ufshcd_async_scan(void *data, async_cookie_t cookie)
8139{
8140 struct ufs_hba *hba = (struct ufs_hba *)data;
8141
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008142 /*
8143 * Don't allow clock gating and hibern8 enter for faster device
8144 * detection.
8145 */
8146 ufshcd_hold_all(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008147 ufshcd_probe_hba(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008148 ufshcd_release_all(hba);
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07008149
8150 ufshcd_extcon_register(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008151}
8152
8153/**
8154 * ufshcd_query_ioctl - perform user read queries
8155 * @hba: per-adapter instance
8156 * @lun: used for lun specific queries
8157 * @buffer: user space buffer for reading and submitting query data and params
8158 * @return: 0 for success negative error code otherwise
8159 *
8160 * Expected/Submitted buffer structure is struct ufs_ioctl_query_data.
8161 * It will read the opcode, idn and buf_length parameters, and, put the
8162 * response in the buffer field while updating the used size in buf_length.
8163 */
8164static int ufshcd_query_ioctl(struct ufs_hba *hba, u8 lun, void __user *buffer)
8165{
8166 struct ufs_ioctl_query_data *ioctl_data;
8167 int err = 0;
8168 int length = 0;
8169 void *data_ptr;
8170 bool flag;
8171 u32 att;
8172 u8 index;
8173 u8 *desc = NULL;
8174
8175 ioctl_data = kzalloc(sizeof(struct ufs_ioctl_query_data), GFP_KERNEL);
8176 if (!ioctl_data) {
8177 dev_err(hba->dev, "%s: Failed allocating %zu bytes\n", __func__,
8178 sizeof(struct ufs_ioctl_query_data));
8179 err = -ENOMEM;
8180 goto out;
8181 }
8182
8183 /* extract params from user buffer */
8184 err = copy_from_user(ioctl_data, buffer,
8185 sizeof(struct ufs_ioctl_query_data));
8186 if (err) {
8187 dev_err(hba->dev,
8188 "%s: Failed copying buffer from user, err %d\n",
8189 __func__, err);
8190 goto out_release_mem;
8191 }
8192
8193 /* verify legal parameters & send query */
8194 switch (ioctl_data->opcode) {
8195 case UPIU_QUERY_OPCODE_READ_DESC:
8196 switch (ioctl_data->idn) {
8197 case QUERY_DESC_IDN_DEVICE:
8198 case QUERY_DESC_IDN_CONFIGURAION:
8199 case QUERY_DESC_IDN_INTERCONNECT:
8200 case QUERY_DESC_IDN_GEOMETRY:
8201 case QUERY_DESC_IDN_POWER:
8202 index = 0;
8203 break;
8204 case QUERY_DESC_IDN_UNIT:
8205 if (!ufs_is_valid_unit_desc_lun(lun)) {
8206 dev_err(hba->dev,
8207 "%s: No unit descriptor for lun 0x%x\n",
8208 __func__, lun);
8209 err = -EINVAL;
8210 goto out_release_mem;
8211 }
8212 index = lun;
8213 break;
8214 default:
8215 goto out_einval;
8216 }
8217 length = min_t(int, QUERY_DESC_MAX_SIZE,
8218 ioctl_data->buf_size);
8219 desc = kzalloc(length, GFP_KERNEL);
8220 if (!desc) {
8221 dev_err(hba->dev, "%s: Failed allocating %d bytes\n",
8222 __func__, length);
8223 err = -ENOMEM;
8224 goto out_release_mem;
8225 }
8226 err = ufshcd_query_descriptor(hba, ioctl_data->opcode,
8227 ioctl_data->idn, index, 0, desc, &length);
8228 break;
8229 case UPIU_QUERY_OPCODE_READ_ATTR:
8230 switch (ioctl_data->idn) {
8231 case QUERY_ATTR_IDN_BOOT_LU_EN:
8232 case QUERY_ATTR_IDN_POWER_MODE:
8233 case QUERY_ATTR_IDN_ACTIVE_ICC_LVL:
8234 case QUERY_ATTR_IDN_OOO_DATA_EN:
8235 case QUERY_ATTR_IDN_BKOPS_STATUS:
8236 case QUERY_ATTR_IDN_PURGE_STATUS:
8237 case QUERY_ATTR_IDN_MAX_DATA_IN:
8238 case QUERY_ATTR_IDN_MAX_DATA_OUT:
8239 case QUERY_ATTR_IDN_REF_CLK_FREQ:
8240 case QUERY_ATTR_IDN_CONF_DESC_LOCK:
8241 case QUERY_ATTR_IDN_MAX_NUM_OF_RTT:
8242 case QUERY_ATTR_IDN_EE_CONTROL:
8243 case QUERY_ATTR_IDN_EE_STATUS:
8244 case QUERY_ATTR_IDN_SECONDS_PASSED:
8245 index = 0;
8246 break;
8247 case QUERY_ATTR_IDN_DYN_CAP_NEEDED:
8248 case QUERY_ATTR_IDN_CORR_PRG_BLK_NUM:
8249 index = lun;
8250 break;
8251 default:
8252 goto out_einval;
8253 }
8254 err = ufshcd_query_attr(hba, ioctl_data->opcode, ioctl_data->idn,
8255 index, 0, &att);
8256 break;
8257
8258 case UPIU_QUERY_OPCODE_WRITE_ATTR:
8259 err = copy_from_user(&att,
8260 buffer + sizeof(struct ufs_ioctl_query_data),
8261 sizeof(u32));
8262 if (err) {
8263 dev_err(hba->dev,
8264 "%s: Failed copying buffer from user, err %d\n",
8265 __func__, err);
8266 goto out_release_mem;
8267 }
8268
8269 switch (ioctl_data->idn) {
8270 case QUERY_ATTR_IDN_BOOT_LU_EN:
8271 index = 0;
8272 if (att > QUERY_ATTR_IDN_BOOT_LU_EN_MAX) {
8273 dev_err(hba->dev,
8274 "%s: Illegal ufs query ioctl data, opcode 0x%x, idn 0x%x, att 0x%x\n",
8275 __func__, ioctl_data->opcode,
8276 (unsigned int)ioctl_data->idn, att);
8277 err = -EINVAL;
8278 goto out_release_mem;
8279 }
8280 break;
8281 default:
8282 goto out_einval;
8283 }
8284 err = ufshcd_query_attr(hba, ioctl_data->opcode,
8285 ioctl_data->idn, index, 0, &att);
8286 break;
8287
8288 case UPIU_QUERY_OPCODE_READ_FLAG:
8289 switch (ioctl_data->idn) {
8290 case QUERY_FLAG_IDN_FDEVICEINIT:
8291 case QUERY_FLAG_IDN_PERMANENT_WPE:
8292 case QUERY_FLAG_IDN_PWR_ON_WPE:
8293 case QUERY_FLAG_IDN_BKOPS_EN:
8294 case QUERY_FLAG_IDN_PURGE_ENABLE:
8295 case QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL:
8296 case QUERY_FLAG_IDN_BUSY_RTC:
8297 break;
8298 default:
8299 goto out_einval;
8300 }
8301 err = ufshcd_query_flag_retry(hba, ioctl_data->opcode,
8302 ioctl_data->idn, &flag);
8303 break;
8304 default:
8305 goto out_einval;
8306 }
8307
8308 if (err) {
8309 dev_err(hba->dev, "%s: Query for idn %d failed\n", __func__,
8310 ioctl_data->idn);
8311 goto out_release_mem;
8312 }
8313
8314 /*
8315 * copy response data
8316 * As we might end up reading less data then what is specified in
8317 * "ioctl_data->buf_size". So we are updating "ioctl_data->
8318 * buf_size" to what exactly we have read.
8319 */
8320 switch (ioctl_data->opcode) {
8321 case UPIU_QUERY_OPCODE_READ_DESC:
8322 ioctl_data->buf_size = min_t(int, ioctl_data->buf_size, length);
8323 data_ptr = desc;
8324 break;
8325 case UPIU_QUERY_OPCODE_READ_ATTR:
8326 ioctl_data->buf_size = sizeof(u32);
8327 data_ptr = &att;
8328 break;
8329 case UPIU_QUERY_OPCODE_READ_FLAG:
8330 ioctl_data->buf_size = 1;
8331 data_ptr = &flag;
8332 break;
8333 case UPIU_QUERY_OPCODE_WRITE_ATTR:
8334 goto out_release_mem;
8335 default:
8336 goto out_einval;
8337 }
8338
8339 /* copy to user */
8340 err = copy_to_user(buffer, ioctl_data,
8341 sizeof(struct ufs_ioctl_query_data));
8342 if (err)
8343 dev_err(hba->dev, "%s: Failed copying back to user.\n",
8344 __func__);
8345 err = copy_to_user(buffer + sizeof(struct ufs_ioctl_query_data),
8346 data_ptr, ioctl_data->buf_size);
8347 if (err)
8348 dev_err(hba->dev, "%s: err %d copying back to user.\n",
8349 __func__, err);
8350 goto out_release_mem;
8351
8352out_einval:
8353 dev_err(hba->dev,
8354 "%s: illegal ufs query ioctl data, opcode 0x%x, idn 0x%x\n",
8355 __func__, ioctl_data->opcode, (unsigned int)ioctl_data->idn);
8356 err = -EINVAL;
8357out_release_mem:
8358 kfree(ioctl_data);
8359 kfree(desc);
8360out:
8361 return err;
8362}
8363
8364/**
8365 * ufshcd_ioctl - ufs ioctl callback registered in scsi_host
8366 * @dev: scsi device required for per LUN queries
8367 * @cmd: command opcode
8368 * @buffer: user space buffer for transferring data
8369 *
8370 * Supported commands:
8371 * UFS_IOCTL_QUERY
8372 */
8373static int ufshcd_ioctl(struct scsi_device *dev, int cmd, void __user *buffer)
8374{
8375 struct ufs_hba *hba = shost_priv(dev->host);
8376 int err = 0;
8377
8378 BUG_ON(!hba);
8379 if (!buffer) {
8380 dev_err(hba->dev, "%s: User buffer is NULL!\n", __func__);
8381 return -EINVAL;
8382 }
8383
8384 switch (cmd) {
8385 case UFS_IOCTL_QUERY:
8386 pm_runtime_get_sync(hba->dev);
8387 err = ufshcd_query_ioctl(hba, ufshcd_scsi_to_upiu_lun(dev->lun),
8388 buffer);
8389 pm_runtime_put_sync(hba->dev);
8390 break;
8391 default:
8392 err = -ENOIOCTLCMD;
8393 dev_dbg(hba->dev, "%s: Unsupported ioctl cmd %d\n", __func__,
8394 cmd);
8395 break;
8396 }
8397
8398 return err;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308399}
8400
Yaniv Gardif550c652016-03-10 17:37:07 +02008401static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
8402{
8403 unsigned long flags;
8404 struct Scsi_Host *host;
8405 struct ufs_hba *hba;
8406 int index;
8407 bool found = false;
8408
8409 if (!scmd || !scmd->device || !scmd->device->host)
8410 return BLK_EH_NOT_HANDLED;
8411
8412 host = scmd->device->host;
8413 hba = shost_priv(host);
8414 if (!hba)
8415 return BLK_EH_NOT_HANDLED;
8416
8417 spin_lock_irqsave(host->host_lock, flags);
8418
8419 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
8420 if (hba->lrb[index].cmd == scmd) {
8421 found = true;
8422 break;
8423 }
8424 }
8425
8426 spin_unlock_irqrestore(host->host_lock, flags);
8427
8428 /*
8429 * Bypass SCSI error handling and reset the block layer timer if this
8430 * SCSI command was not actually dispatched to UFS driver, otherwise
8431 * let SCSI layer handle the error as usual.
8432 */
8433 return found ? BLK_EH_NOT_HANDLED : BLK_EH_RESET_TIMER;
8434}
8435
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308436static struct scsi_host_template ufshcd_driver_template = {
8437 .module = THIS_MODULE,
8438 .name = UFSHCD,
8439 .proc_name = UFSHCD,
8440 .queuecommand = ufshcd_queuecommand,
8441 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09008442 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308443 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03008444 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308445 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05308446 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
8447 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Yaniv Gardif550c652016-03-10 17:37:07 +02008448 .eh_timed_out = ufshcd_eh_timed_out,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008449 .ioctl = ufshcd_ioctl,
8450#ifdef CONFIG_COMPAT
8451 .compat_ioctl = ufshcd_ioctl,
8452#endif
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308453 .this_id = -1,
8454 .sg_tablesize = SG_ALL,
8455 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
8456 .can_queue = UFSHCD_CAN_QUEUE,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008457 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01008458 .track_queue_depth = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308459};
8460
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008461static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
8462 int ua)
8463{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008464 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008465
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008466 if (!vreg)
8467 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008468
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008469 ret = regulator_set_load(vreg->reg, ua);
8470 if (ret < 0) {
8471 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
8472 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008473 }
8474
8475 return ret;
8476}
8477
8478static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
8479 struct ufs_vreg *vreg)
8480{
Yaniv Gardi60f01872016-03-10 17:37:11 +02008481 if (!vreg)
8482 return 0;
8483 else if (vreg->unused)
8484 return 0;
8485 else
8486 return ufshcd_config_vreg_load(hba->dev, vreg,
8487 UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008488}
8489
8490static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
8491 struct ufs_vreg *vreg)
8492{
Yaniv Gardi60f01872016-03-10 17:37:11 +02008493 if (!vreg)
8494 return 0;
8495 else if (vreg->unused)
8496 return 0;
8497 else
8498 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008499}
8500
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008501static int ufshcd_config_vreg(struct device *dev,
8502 struct ufs_vreg *vreg, bool on)
8503{
8504 int ret = 0;
8505 struct regulator *reg = vreg->reg;
8506 const char *name = vreg->name;
8507 int min_uV, uA_load;
8508
8509 BUG_ON(!vreg);
8510
8511 if (regulator_count_voltages(reg) > 0) {
8512 min_uV = on ? vreg->min_uV : 0;
8513 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
8514 if (ret) {
8515 dev_err(dev, "%s: %s set voltage failed, err=%d\n",
8516 __func__, name, ret);
8517 goto out;
8518 }
8519
8520 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008521 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
8522 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008523 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008524 }
8525out:
8526 return ret;
8527}
8528
8529static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
8530{
8531 int ret = 0;
8532
Yaniv Gardi60f01872016-03-10 17:37:11 +02008533 if (!vreg)
8534 goto out;
8535 else if (vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008536 goto out;
8537
8538 ret = ufshcd_config_vreg(dev, vreg, true);
8539 if (!ret)
8540 ret = regulator_enable(vreg->reg);
8541
8542 if (!ret)
8543 vreg->enabled = true;
8544 else
8545 dev_err(dev, "%s: %s enable failed, err=%d\n",
8546 __func__, vreg->name, ret);
8547out:
8548 return ret;
8549}
8550
8551static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
8552{
8553 int ret = 0;
8554
Yaniv Gardi60f01872016-03-10 17:37:11 +02008555 if (!vreg)
8556 goto out;
8557 else if (!vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008558 goto out;
8559
8560 ret = regulator_disable(vreg->reg);
8561
8562 if (!ret) {
8563 /* ignore errors on applying disable config */
8564 ufshcd_config_vreg(dev, vreg, false);
8565 vreg->enabled = false;
8566 } else {
8567 dev_err(dev, "%s: %s disable failed, err=%d\n",
8568 __func__, vreg->name, ret);
8569 }
8570out:
8571 return ret;
8572}
8573
8574static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
8575{
8576 int ret = 0;
8577 struct device *dev = hba->dev;
8578 struct ufs_vreg_info *info = &hba->vreg_info;
8579
8580 if (!info)
8581 goto out;
8582
8583 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
8584 if (ret)
8585 goto out;
8586
8587 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
8588 if (ret)
8589 goto out;
8590
8591 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
8592 if (ret)
8593 goto out;
8594
8595out:
8596 if (ret) {
8597 ufshcd_toggle_vreg(dev, info->vccq2, false);
8598 ufshcd_toggle_vreg(dev, info->vccq, false);
8599 ufshcd_toggle_vreg(dev, info->vcc, false);
8600 }
8601 return ret;
8602}
8603
Raviv Shvili6a771a62014-09-25 15:32:24 +03008604static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
8605{
8606 struct ufs_vreg_info *info = &hba->vreg_info;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008607 int ret = 0;
Raviv Shvili6a771a62014-09-25 15:32:24 +03008608
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008609 if (info->vdd_hba) {
8610 ret = ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03008611
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008612 if (!ret)
8613 ufshcd_vops_update_sec_cfg(hba, on);
8614 }
8615
8616 return ret;
Raviv Shvili6a771a62014-09-25 15:32:24 +03008617}
8618
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008619static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
8620{
8621 int ret = 0;
8622
8623 if (!vreg)
8624 goto out;
8625
8626 vreg->reg = devm_regulator_get(dev, vreg->name);
8627 if (IS_ERR(vreg->reg)) {
8628 ret = PTR_ERR(vreg->reg);
8629 dev_err(dev, "%s: %s get failed, err=%d\n",
8630 __func__, vreg->name, ret);
8631 }
8632out:
8633 return ret;
8634}
8635
8636static int ufshcd_init_vreg(struct ufs_hba *hba)
8637{
8638 int ret = 0;
8639 struct device *dev = hba->dev;
8640 struct ufs_vreg_info *info = &hba->vreg_info;
8641
8642 if (!info)
8643 goto out;
8644
8645 ret = ufshcd_get_vreg(dev, info->vcc);
8646 if (ret)
8647 goto out;
8648
8649 ret = ufshcd_get_vreg(dev, info->vccq);
8650 if (ret)
8651 goto out;
8652
8653 ret = ufshcd_get_vreg(dev, info->vccq2);
8654out:
8655 return ret;
8656}
8657
Raviv Shvili6a771a62014-09-25 15:32:24 +03008658static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
8659{
8660 struct ufs_vreg_info *info = &hba->vreg_info;
8661
8662 if (info)
8663 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
8664
8665 return 0;
8666}
8667
Yaniv Gardi60f01872016-03-10 17:37:11 +02008668static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused)
8669{
8670 int ret = 0;
8671 struct ufs_vreg_info *info = &hba->vreg_info;
8672
8673 if (!info)
8674 goto out;
8675 else if (!info->vccq)
8676 goto out;
8677
8678 if (unused) {
8679 /* shut off the rail here */
8680 ret = ufshcd_toggle_vreg(hba->dev, info->vccq, false);
8681 /*
8682 * Mark this rail as no longer used, so it doesn't get enabled
8683 * later by mistake
8684 */
8685 if (!ret)
8686 info->vccq->unused = true;
8687 } else {
8688 /*
8689 * rail should have been already enabled hence just make sure
8690 * that unused flag is cleared.
8691 */
8692 info->vccq->unused = false;
8693 }
8694out:
8695 return ret;
8696}
8697
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008698static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
8699 bool skip_ref_clk, bool is_gating_context)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008700{
8701 int ret = 0;
8702 struct ufs_clk_info *clki;
8703 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008704 unsigned long flags;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008705 ktime_t start = ktime_get();
8706 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008707
8708 if (!head || list_empty(head))
8709 goto out;
8710
Subhash Jadavani9c807702017-04-01 00:35:51 -07008711 /* call vendor specific bus vote before enabling the clocks */
8712 if (on) {
8713 ret = ufshcd_vops_set_bus_vote(hba, on);
8714 if (ret)
8715 return ret;
8716 }
8717
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008718 /*
8719 * vendor specific setup_clocks ops may depend on clocks managed by
8720 * this standard driver hence call the vendor specific setup_clocks
8721 * before disabling the clocks managed here.
8722 */
8723 if (!on) {
8724 ret = ufshcd_vops_setup_clocks(hba, on, is_gating_context);
8725 if (ret)
8726 return ret;
8727 }
8728
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008729 list_for_each_entry(clki, head, list) {
8730 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008731 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
8732 continue;
8733
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008734 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008735 if (on && !clki->enabled) {
8736 ret = clk_prepare_enable(clki->clk);
8737 if (ret) {
8738 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
8739 __func__, clki->name, ret);
8740 goto out;
8741 }
8742 } else if (!on && clki->enabled) {
8743 clk_disable_unprepare(clki->clk);
8744 }
8745 clki->enabled = on;
8746 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
8747 clki->name, on ? "en" : "dis");
8748 }
8749 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008750
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008751 /*
8752 * vendor specific setup_clocks ops may depend on clocks managed by
8753 * this standard driver hence call the vendor specific setup_clocks
8754 * after enabling the clocks managed here.
8755 */
Subhash Jadavani9c807702017-04-01 00:35:51 -07008756 if (on) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008757 ret = ufshcd_vops_setup_clocks(hba, on, is_gating_context);
Subhash Jadavani9c807702017-04-01 00:35:51 -07008758 if (ret)
8759 goto out;
8760 }
8761
8762 /*
8763 * call vendor specific bus vote to remove the vote after
8764 * disabling the clocks.
8765 */
8766 if (!on)
8767 ret = ufshcd_vops_set_bus_vote(hba, on);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008768
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008769out:
8770 if (ret) {
Subhash Jadavani9c807702017-04-01 00:35:51 -07008771 if (on)
8772 /* Can't do much if this fails */
8773 (void) ufshcd_vops_set_bus_vote(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008774 list_for_each_entry(clki, head, list) {
8775 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
8776 clk_disable_unprepare(clki->clk);
8777 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008778 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008779 spin_lock_irqsave(hba->host->host_lock, flags);
8780 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008781 trace_ufshcd_clk_gating(dev_name(hba->dev),
8782 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008783 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008784 /* restore the secure configuration as clocks are enabled */
8785 ufshcd_vops_update_sec_cfg(hba, true);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008786 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008787
8788 if (clk_state_changed)
8789 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
8790 (on ? "on" : "off"),
8791 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008792 return ret;
8793}
8794
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008795static int ufshcd_enable_clocks(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008796{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008797 return ufshcd_setup_clocks(hba, true, false, false);
8798}
8799
8800static int ufshcd_disable_clocks(struct ufs_hba *hba,
8801 bool is_gating_context)
8802{
8803 return ufshcd_setup_clocks(hba, false, false, is_gating_context);
8804}
8805
8806static int ufshcd_disable_clocks_skip_ref_clk(struct ufs_hba *hba,
8807 bool is_gating_context)
8808{
8809 return ufshcd_setup_clocks(hba, false, true, is_gating_context);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008810}
8811
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008812static int ufshcd_init_clocks(struct ufs_hba *hba)
8813{
8814 int ret = 0;
8815 struct ufs_clk_info *clki;
8816 struct device *dev = hba->dev;
8817 struct list_head *head = &hba->clk_list_head;
8818
8819 if (!head || list_empty(head))
8820 goto out;
8821
8822 list_for_each_entry(clki, head, list) {
8823 if (!clki->name)
8824 continue;
8825
8826 clki->clk = devm_clk_get(dev, clki->name);
8827 if (IS_ERR(clki->clk)) {
8828 ret = PTR_ERR(clki->clk);
8829 dev_err(dev, "%s: %s clk get failed, %d\n",
8830 __func__, clki->name, ret);
8831 goto out;
8832 }
8833
8834 if (clki->max_freq) {
8835 ret = clk_set_rate(clki->clk, clki->max_freq);
8836 if (ret) {
8837 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
8838 __func__, clki->name,
8839 clki->max_freq, ret);
8840 goto out;
8841 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03008842 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008843 }
8844 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
8845 clki->name, clk_get_rate(clki->clk));
8846 }
8847out:
8848 return ret;
8849}
8850
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008851static int ufshcd_variant_hba_init(struct ufs_hba *hba)
8852{
8853 int err = 0;
8854
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008855 if (!hba->var || !hba->var->vops)
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008856 goto out;
8857
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008858 err = ufshcd_vops_init(hba);
8859 if (err)
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008860 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008861 __func__, ufshcd_get_var_name(hba), err);
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07008862out:
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008863 return err;
8864}
8865
8866static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
8867{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008868 if (!hba->var || !hba->var->vops)
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008869 return;
8870
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008871 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008872}
8873
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008874static int ufshcd_hba_init(struct ufs_hba *hba)
8875{
8876 int err;
8877
Raviv Shvili6a771a62014-09-25 15:32:24 +03008878 /*
8879 * Handle host controller power separately from the UFS device power
8880 * rails as it will help controlling the UFS host controller power
8881 * collapse easily which is different than UFS device power collapse.
8882 * Also, enable the host controller power before we go ahead with rest
8883 * of the initialization here.
8884 */
8885 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008886 if (err)
8887 goto out;
8888
Raviv Shvili6a771a62014-09-25 15:32:24 +03008889 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008890 if (err)
8891 goto out;
8892
Raviv Shvili6a771a62014-09-25 15:32:24 +03008893 err = ufshcd_init_clocks(hba);
8894 if (err)
8895 goto out_disable_hba_vreg;
8896
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008897 err = ufshcd_enable_clocks(hba);
Raviv Shvili6a771a62014-09-25 15:32:24 +03008898 if (err)
8899 goto out_disable_hba_vreg;
8900
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008901 err = ufshcd_init_vreg(hba);
8902 if (err)
8903 goto out_disable_clks;
8904
8905 err = ufshcd_setup_vreg(hba, true);
8906 if (err)
8907 goto out_disable_clks;
8908
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008909 err = ufshcd_variant_hba_init(hba);
8910 if (err)
8911 goto out_disable_vreg;
8912
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008913 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008914 goto out;
8915
8916out_disable_vreg:
8917 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008918out_disable_clks:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008919 ufshcd_disable_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03008920out_disable_hba_vreg:
8921 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008922out:
8923 return err;
8924}
8925
8926static void ufshcd_hba_exit(struct ufs_hba *hba)
8927{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008928 if (hba->is_powered) {
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07008929 ufshcd_extcon_unregister(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008930 ufshcd_variant_hba_exit(hba);
8931 ufshcd_setup_vreg(hba, false);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008932 if (ufshcd_is_clkscaling_supported(hba)) {
Subhash Jadavani9c807702017-04-01 00:35:51 -07008933 if (hba->devfreq)
8934 ufshcd_suspend_clkscaling(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008935 destroy_workqueue(hba->clk_scaling.workq);
8936 }
8937 ufshcd_disable_clocks(hba, false);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008938 ufshcd_setup_hba_vreg(hba, false);
8939 hba->is_powered = false;
8940 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008941}
8942
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008943static int
8944ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308945{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008946 unsigned char cmd[6] = {REQUEST_SENSE,
8947 0,
8948 0,
8949 0,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008950 UFSHCD_REQ_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008951 0};
8952 char *buffer;
8953 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308954
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008955 buffer = kzalloc(UFSHCD_REQ_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008956 if (!buffer) {
8957 ret = -ENOMEM;
8958 goto out;
8959 }
8960
8961 ret = scsi_execute_req_flags(sdp, cmd, DMA_FROM_DEVICE, buffer,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008962 UFSHCD_REQ_SENSE_SIZE, NULL,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008963 msecs_to_jiffies(1000), 3, NULL, REQ_PM);
8964 if (ret)
8965 pr_err("%s: failed with err %d\n", __func__, ret);
8966
8967 kfree(buffer);
8968out:
8969 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308970}
8971
8972/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008973 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
8974 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308975 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008976 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308977 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008978 * Returns 0 if requested power mode is set successfully
8979 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308980 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008981static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
8982 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308983{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008984 unsigned char cmd[6] = { START_STOP };
8985 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008986 struct scsi_device *sdp;
8987 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008988 int ret;
8989
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008990 spin_lock_irqsave(hba->host->host_lock, flags);
8991 sdp = hba->sdev_ufs_device;
8992 if (sdp) {
8993 ret = scsi_device_get(sdp);
8994 if (!ret && !scsi_device_online(sdp)) {
8995 ret = -ENODEV;
8996 scsi_device_put(sdp);
8997 }
8998 } else {
8999 ret = -ENODEV;
9000 }
9001 spin_unlock_irqrestore(hba->host->host_lock, flags);
9002
9003 if (ret)
9004 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009005
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309006 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009007 * If scsi commands fail, the scsi mid-layer schedules scsi error-
9008 * handling, which would wait for host to be resumed. Since we know
9009 * we are functional while we are here, skip host resume in error
9010 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309011 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009012 hba->host->eh_noresume = 1;
Subhash Jadavani23df2312016-12-16 12:54:30 -08009013 if (!hba->dev_info.is_ufs_dev_wlun_ua_cleared) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009014 ret = ufshcd_send_request_sense(hba, sdp);
9015 if (ret)
9016 goto out;
9017 /* Unit attention condition is cleared now */
Subhash Jadavani23df2312016-12-16 12:54:30 -08009018 hba->dev_info.is_ufs_dev_wlun_ua_cleared = 1;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009019 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309020
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009021 cmd[4] = pwr_mode << 4;
9022
9023 /*
9024 * Current function would be generally called from the power management
9025 * callbacks hence set the REQ_PM flag so that it doesn't resume the
9026 * already suspended childs.
9027 */
9028 ret = scsi_execute_req_flags(sdp, cmd, DMA_NONE, NULL, 0, &sshdr,
9029 START_STOP_TIMEOUT, 0, NULL, REQ_PM);
9030 if (ret) {
9031 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02009032 "START_STOP failed for power mode: %d, result %x\n",
9033 pwr_mode, ret);
Hannes Reinecke21045512015-01-08 07:43:46 +01009034 if (driver_byte(ret) & DRIVER_SENSE)
9035 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009036 }
9037
9038 if (!ret)
9039 hba->curr_dev_pwr_mode = pwr_mode;
9040out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03009041 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009042 hba->host->eh_noresume = 0;
9043 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309044}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309045
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009046static int ufshcd_link_state_transition(struct ufs_hba *hba,
9047 enum uic_link_state req_link_state,
9048 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309049{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009050 int ret = 0;
9051
9052 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309053 return 0;
9054
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009055 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
9056 ret = ufshcd_uic_hibern8_enter(hba);
9057 if (!ret)
9058 ufshcd_set_link_hibern8(hba);
9059 else
9060 goto out;
9061 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309062 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009063 * If autobkops is enabled, link can't be turned off because
9064 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309065 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009066 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
9067 (!check_for_bkops || (check_for_bkops &&
9068 !hba->auto_bkops_enabled))) {
9069 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02009070 * Let's make sure that link is in low power mode, we are doing
9071 * this currently by putting the link in Hibern8. Otherway to
9072 * put the link in low power mode is to send the DME end point
9073 * to device and then send the DME reset command to local
9074 * unipro. But putting the link in hibern8 is much faster.
9075 */
9076 ret = ufshcd_uic_hibern8_enter(hba);
9077 if (ret)
9078 goto out;
9079 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009080 * Change controller state to "reset state" which
9081 * should also put the link in off/reset state
9082 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02009083 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009084 /*
9085 * TODO: Check if we need any delay to make sure that
9086 * controller is reset
9087 */
9088 ufshcd_set_link_off(hba);
9089 }
9090
9091out:
9092 return ret;
9093}
9094
9095static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
9096{
9097 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02009098 * It seems some UFS devices may keep drawing more than sleep current
9099 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
9100 * To avoid this situation, add 2ms delay before putting these UFS
9101 * rails in LPM mode.
9102 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009103 if (!ufshcd_is_link_active(hba))
Yaniv Gardib799fdf2016-03-10 17:37:18 +02009104 usleep_range(2000, 2100);
9105
9106 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009107 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
9108 * power.
9109 *
9110 * If UFS device and link is in OFF state, all power supplies (VCC,
9111 * VCCQ, VCCQ2) can be turned off if power on write protect is not
9112 * required. If UFS link is inactive (Hibern8 or OFF state) and device
9113 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
9114 *
9115 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
9116 * in low power state which would save some power.
9117 */
9118 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
9119 !hba->dev_info.is_lu_power_on_wp) {
9120 ufshcd_setup_vreg(hba, false);
9121 } else if (!ufshcd_is_ufs_dev_active(hba)) {
9122 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
9123 if (!ufshcd_is_link_active(hba)) {
9124 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
9125 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
9126 }
9127 }
9128}
9129
9130static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
9131{
9132 int ret = 0;
9133
9134 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
9135 !hba->dev_info.is_lu_power_on_wp) {
9136 ret = ufshcd_setup_vreg(hba, true);
9137 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009138 if (!ret && !ufshcd_is_link_active(hba)) {
9139 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
9140 if (ret)
9141 goto vcc_disable;
9142 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
9143 if (ret)
9144 goto vccq_lpm;
9145 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009146 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009147 }
9148 goto out;
9149
9150vccq_lpm:
9151 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
9152vcc_disable:
9153 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
9154out:
9155 return ret;
9156}
9157
9158static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
9159{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009160 if (ufshcd_is_link_off(hba) ||
9161 (ufshcd_is_link_hibern8(hba)
9162 && ufshcd_is_power_collapse_during_hibern8_allowed(hba)))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009163 ufshcd_setup_hba_vreg(hba, false);
9164}
9165
9166static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
9167{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009168 if (ufshcd_is_link_off(hba) ||
9169 (ufshcd_is_link_hibern8(hba)
9170 && ufshcd_is_power_collapse_during_hibern8_allowed(hba)))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009171 ufshcd_setup_hba_vreg(hba, true);
9172}
9173
9174/**
9175 * ufshcd_suspend - helper function for suspend operations
9176 * @hba: per adapter instance
9177 * @pm_op: desired low power operation type
9178 *
9179 * This function will try to put the UFS device and link into low power
9180 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
9181 * (System PM level).
9182 *
9183 * If this function is called during shutdown, it will make sure that
9184 * both UFS device and UFS link is powered off.
9185 *
9186 * NOTE: UFS device & link must be active before we enter in this function.
9187 *
9188 * Returns 0 for success and non-zero for failure
9189 */
9190static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
9191{
9192 int ret = 0;
9193 enum ufs_pm_level pm_lvl;
9194 enum ufs_dev_pwr_mode req_dev_pwr_mode;
9195 enum uic_link_state req_link_state;
9196
9197 hba->pm_op_in_progress = 1;
9198 if (!ufshcd_is_shutdown_pm(pm_op)) {
9199 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
9200 hba->rpm_lvl : hba->spm_lvl;
9201 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
9202 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
9203 } else {
9204 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
9205 req_link_state = UIC_LINK_OFF_STATE;
9206 }
9207
9208 /*
9209 * If we can't transition into any of the low power modes
9210 * just gate the clocks.
9211 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009212 WARN_ON(hba->hibern8_on_idle.is_enabled &&
9213 hba->hibern8_on_idle.active_reqs);
9214 ufshcd_hold_all(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009215 hba->clk_gating.is_suspended = true;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009216 hba->hibern8_on_idle.is_suspended = true;
9217
9218 if (hba->clk_scaling.is_allowed) {
9219 cancel_work_sync(&hba->clk_scaling.suspend_work);
9220 cancel_work_sync(&hba->clk_scaling.resume_work);
9221 ufshcd_suspend_clkscaling(hba);
9222 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009223
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009224 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
9225 req_link_state == UIC_LINK_ACTIVE_STATE) {
9226 goto disable_clks;
9227 }
9228
9229 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
9230 (req_link_state == hba->uic_link_state))
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009231 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009232
9233 /* UFS device & link must be active before we enter in this function */
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07009234 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba))
9235 goto set_vreg_lpm;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009236
9237 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03009238 if (ufshcd_can_autobkops_during_suspend(hba)) {
9239 /*
9240 * The device is idle with no requests in the queue,
9241 * allow background operations if bkops status shows
9242 * that performance might be impacted.
9243 */
9244 ret = ufshcd_urgent_bkops(hba);
9245 if (ret)
9246 goto enable_gating;
9247 } else {
9248 /* make sure that auto bkops is disabled */
9249 ufshcd_disable_auto_bkops(hba);
9250 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009251 }
9252
9253 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
9254 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
9255 !ufshcd_is_runtime_pm(pm_op))) {
9256 /* ensure that bkops is disabled */
9257 ufshcd_disable_auto_bkops(hba);
9258 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
9259 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009260 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009261 }
9262
9263 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
9264 if (ret)
9265 goto set_dev_active;
9266
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009267 if (ufshcd_is_link_hibern8(hba) &&
9268 ufshcd_is_hibern8_on_idle_allowed(hba))
9269 hba->hibern8_on_idle.state = HIBERN8_ENTERED;
9270
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07009271set_vreg_lpm:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009272 ufshcd_vreg_set_lpm(hba);
9273
9274disable_clks:
9275 /*
9276 * Call vendor specific suspend callback. As these callbacks may access
9277 * vendor specific host controller register space call them before the
9278 * host clocks are ON.
9279 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02009280 ret = ufshcd_vops_suspend(hba, pm_op);
9281 if (ret)
9282 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009283
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009284 if (!ufshcd_is_link_active(hba))
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009285 ret = ufshcd_disable_clocks(hba, false);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009286 else
9287 /* If link is active, device ref_clk can't be switched off */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009288 ret = ufshcd_disable_clocks_skip_ref_clk(hba, false);
9289 if (ret)
9290 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009291
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009292 if (ufshcd_is_clkgating_allowed(hba)) {
9293 hba->clk_gating.state = CLKS_OFF;
9294 trace_ufshcd_clk_gating(dev_name(hba->dev),
9295 hba->clk_gating.state);
9296 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009297 /*
9298 * Disable the host irq as host controller as there won't be any
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02009299 * host controller transaction expected till resume.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009300 */
9301 ufshcd_disable_irq(hba);
9302 /* Put the host controller in low power mode if possible */
9303 ufshcd_hba_vreg_set_lpm(hba);
9304 goto out;
9305
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009306set_link_active:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009307 if (hba->clk_scaling.is_allowed)
9308 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009309 ufshcd_vreg_set_hpm(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009310 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009311 ufshcd_set_link_active(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009312 } else if (ufshcd_is_link_off(hba)) {
9313 ufshcd_update_error_stats(hba, UFS_ERR_VOPS_SUSPEND);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009314 ufshcd_host_reset_and_restore(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009315 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009316set_dev_active:
9317 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
9318 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009319enable_gating:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009320 if (hba->clk_scaling.is_allowed)
9321 ufshcd_resume_clkscaling(hba);
9322 hba->hibern8_on_idle.is_suspended = false;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009323 hba->clk_gating.is_suspended = false;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009324 ufshcd_release_all(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009325out:
9326 hba->pm_op_in_progress = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009327
9328 if (ret)
9329 ufshcd_update_error_stats(hba, UFS_ERR_SUSPEND);
9330
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009331 return ret;
9332}
9333
9334/**
9335 * ufshcd_resume - helper function for resume operations
9336 * @hba: per adapter instance
9337 * @pm_op: runtime PM or system PM
9338 *
9339 * This function basically brings the UFS device, UniPro link and controller
9340 * to active state.
9341 *
9342 * Returns 0 for success and non-zero for failure
9343 */
9344static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
9345{
9346 int ret;
9347 enum uic_link_state old_link_state;
9348
9349 hba->pm_op_in_progress = 1;
9350 old_link_state = hba->uic_link_state;
9351
9352 ufshcd_hba_vreg_set_hpm(hba);
9353 /* Make sure clocks are enabled before accessing controller */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009354 ret = ufshcd_enable_clocks(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009355 if (ret)
9356 goto out;
9357
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009358 /* enable the host irq as host controller would be active soon */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009359 ufshcd_enable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009360
9361 ret = ufshcd_vreg_set_hpm(hba);
9362 if (ret)
9363 goto disable_irq_and_vops_clks;
9364
9365 /*
9366 * Call vendor specific resume callback. As these callbacks may access
9367 * vendor specific host controller register space call them when the
9368 * host clocks are ON.
9369 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02009370 ret = ufshcd_vops_resume(hba, pm_op);
9371 if (ret)
9372 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009373
Subhash Jadavanief542222017-08-02 16:23:55 -07009374 if (hba->extcon &&
9375 (ufshcd_is_card_offline(hba) ||
9376 (ufshcd_is_card_online(hba) && !hba->sdev_ufs_device)))
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07009377 goto skip_dev_ops;
9378
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009379 if (ufshcd_is_link_hibern8(hba)) {
9380 ret = ufshcd_uic_hibern8_exit(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009381 if (!ret) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009382 ufshcd_set_link_active(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009383 if (ufshcd_is_hibern8_on_idle_allowed(hba))
9384 hba->hibern8_on_idle.state = HIBERN8_EXITED;
9385 } else {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009386 goto vendor_suspend;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009387 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009388 } else if (ufshcd_is_link_off(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009389 /*
Subhash Jadavani9c807702017-04-01 00:35:51 -07009390 * A full initialization of the host and the device is required
9391 * since the link was put to off during suspend.
9392 */
9393 ret = ufshcd_reset_and_restore(hba);
9394 /*
9395 * ufshcd_reset_and_restore() should have already
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009396 * set the link state as active
9397 */
9398 if (ret || !ufshcd_is_link_active(hba))
9399 goto vendor_suspend;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009400 /* mark link state as hibern8 exited */
9401 if (ufshcd_is_hibern8_on_idle_allowed(hba))
9402 hba->hibern8_on_idle.state = HIBERN8_EXITED;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009403 }
9404
9405 if (!ufshcd_is_ufs_dev_active(hba)) {
9406 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
9407 if (ret)
9408 goto set_old_link_state;
9409 }
9410
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009411 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
9412 ufshcd_enable_auto_bkops(hba);
9413 else
9414 /*
9415 * If BKOPs operations are urgently needed at this moment then
9416 * keep auto-bkops enabled or else disable it.
9417 */
9418 ufshcd_urgent_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009419
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009420 hba->clk_gating.is_suspended = false;
9421 hba->hibern8_on_idle.is_suspended = false;
9422
9423 if (hba->clk_scaling.is_allowed)
9424 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03009425
Subhash Jadavani9e7ed482017-05-08 18:29:45 -07009426skip_dev_ops:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009427 /* Schedule clock gating in case of no access to UFS device yet */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009428 ufshcd_release_all(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009429 goto out;
9430
9431set_old_link_state:
9432 ufshcd_link_state_transition(hba, old_link_state, 0);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009433 if (ufshcd_is_link_hibern8(hba) &&
9434 ufshcd_is_hibern8_on_idle_allowed(hba))
9435 hba->hibern8_on_idle.state = HIBERN8_ENTERED;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009436vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02009437 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009438disable_vreg:
9439 ufshcd_vreg_set_lpm(hba);
9440disable_irq_and_vops_clks:
9441 ufshcd_disable_irq(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009442 if (hba->clk_scaling.is_allowed)
9443 ufshcd_suspend_clkscaling(hba);
9444 ufshcd_disable_clocks(hba, false);
9445 if (ufshcd_is_clkgating_allowed(hba))
9446 hba->clk_gating.state = CLKS_OFF;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009447out:
9448 hba->pm_op_in_progress = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009449
9450 if (ret)
9451 ufshcd_update_error_stats(hba, UFS_ERR_RESUME);
9452
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009453 return ret;
9454}
9455
9456/**
9457 * ufshcd_system_suspend - system suspend routine
9458 * @hba: per adapter instance
9459 * @pm_op: runtime PM or system PM
9460 *
9461 * Check the description of ufshcd_suspend() function for more details.
9462 *
9463 * Returns 0 for success and non-zero for failure
9464 */
9465int ufshcd_system_suspend(struct ufs_hba *hba)
9466{
9467 int ret = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009468 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009469
9470 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03009471 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009472
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009473 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
9474 hba->curr_dev_pwr_mode) &&
9475 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
9476 hba->uic_link_state))
9477 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009478
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009479 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009480 /*
9481 * UFS device and/or UFS link low power states during runtime
9482 * suspend seems to be different than what is expected during
9483 * system suspend. Hence runtime resume the devic & link and
9484 * let the system suspend low power states to take effect.
9485 * TODO: If resume takes longer time, we might have optimize
9486 * it in future by not resuming everything if possible.
9487 */
9488 ret = ufshcd_runtime_resume(hba);
9489 if (ret)
9490 goto out;
9491 }
9492
9493 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
9494out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009495 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
9496 ktime_to_us(ktime_sub(ktime_get(), start)),
9497 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03009498 if (!ret)
9499 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009500 return ret;
9501}
9502EXPORT_SYMBOL(ufshcd_system_suspend);
9503
9504/**
9505 * ufshcd_system_resume - system resume routine
9506 * @hba: per adapter instance
9507 *
9508 * Returns 0 for success and non-zero for failure
9509 */
9510
9511int ufshcd_system_resume(struct ufs_hba *hba)
9512{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009513 int ret = 0;
9514 ktime_t start = ktime_get();
9515
9516 if (!hba)
9517 return -EINVAL;
9518
9519 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009520 /*
9521 * Let the runtime resume take care of resuming
9522 * if runtime suspended.
9523 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009524 goto out;
9525 else
9526 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
9527out:
9528 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
9529 ktime_to_us(ktime_sub(ktime_get(), start)),
9530 hba->curr_dev_pwr_mode, hba->uic_link_state);
9531 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009532}
9533EXPORT_SYMBOL(ufshcd_system_resume);
9534
9535/**
9536 * ufshcd_runtime_suspend - runtime suspend routine
9537 * @hba: per adapter instance
9538 *
9539 * Check the description of ufshcd_suspend() function for more details.
9540 *
9541 * Returns 0 for success and non-zero for failure
9542 */
9543int ufshcd_runtime_suspend(struct ufs_hba *hba)
9544{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009545 int ret = 0;
9546 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009547
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009548 if (!hba)
9549 return -EINVAL;
9550
9551 if (!hba->is_powered)
9552 goto out;
9553 else
9554 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
9555out:
9556 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
9557 ktime_to_us(ktime_sub(ktime_get(), start)),
9558 hba->curr_dev_pwr_mode,
9559 hba->uic_link_state);
9560 return ret;
9561
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309562}
9563EXPORT_SYMBOL(ufshcd_runtime_suspend);
9564
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009565/**
9566 * ufshcd_runtime_resume - runtime resume routine
9567 * @hba: per adapter instance
9568 *
9569 * This function basically brings the UFS device, UniPro link and controller
9570 * to active state. Following operations are done in this function:
9571 *
9572 * 1. Turn on all the controller related clocks
9573 * 2. Bring the UniPro link out of Hibernate state
9574 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
9575 * to active state.
9576 * 4. If auto-bkops is enabled on the device, disable it.
9577 *
9578 * So following would be the possible power state after this function return
9579 * successfully:
9580 * S1: UFS device in Active state with VCC rail ON
9581 * UniPro link in Active state
9582 * All the UFS/UniPro controller clocks are ON
9583 *
9584 * Returns 0 for success and non-zero for failure
9585 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309586int ufshcd_runtime_resume(struct ufs_hba *hba)
9587{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009588 int ret = 0;
9589 ktime_t start = ktime_get();
9590
9591 if (!hba)
9592 return -EINVAL;
9593
9594 if (!hba->is_powered)
9595 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009596 else
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009597 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
9598out:
9599 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
9600 ktime_to_us(ktime_sub(ktime_get(), start)),
9601 hba->curr_dev_pwr_mode,
9602 hba->uic_link_state);
9603 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309604}
9605EXPORT_SYMBOL(ufshcd_runtime_resume);
9606
9607int ufshcd_runtime_idle(struct ufs_hba *hba)
9608{
9609 return 0;
9610}
9611EXPORT_SYMBOL(ufshcd_runtime_idle);
9612
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009613static inline ssize_t ufshcd_pm_lvl_store(struct device *dev,
9614 struct device_attribute *attr,
9615 const char *buf, size_t count,
9616 bool rpm)
9617{
9618 struct ufs_hba *hba = dev_get_drvdata(dev);
9619 unsigned long flags, value;
9620
9621 if (kstrtoul(buf, 0, &value))
9622 return -EINVAL;
9623
9624 if (value >= UFS_PM_LVL_MAX)
9625 return -EINVAL;
9626
9627 spin_lock_irqsave(hba->host->host_lock, flags);
9628 if (rpm)
9629 hba->rpm_lvl = value;
9630 else
9631 hba->spm_lvl = value;
9632 ufshcd_apply_pm_quirks(hba);
9633 spin_unlock_irqrestore(hba->host->host_lock, flags);
9634 return count;
9635}
9636
9637static ssize_t ufshcd_rpm_lvl_show(struct device *dev,
9638 struct device_attribute *attr, char *buf)
9639{
9640 struct ufs_hba *hba = dev_get_drvdata(dev);
9641 int curr_len;
9642 u8 lvl;
9643
9644 curr_len = snprintf(buf, PAGE_SIZE,
9645 "\nCurrent Runtime PM level [%d] => dev_state [%s] link_state [%s]\n",
9646 hba->rpm_lvl,
9647 ufschd_ufs_dev_pwr_mode_to_string(
9648 ufs_pm_lvl_states[hba->rpm_lvl].dev_state),
9649 ufschd_uic_link_state_to_string(
9650 ufs_pm_lvl_states[hba->rpm_lvl].link_state));
9651
9652 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
9653 "\nAll available Runtime PM levels info:\n");
9654 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++)
9655 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
9656 "\tRuntime PM level [%d] => dev_state [%s] link_state [%s]\n",
9657 lvl,
9658 ufschd_ufs_dev_pwr_mode_to_string(
9659 ufs_pm_lvl_states[lvl].dev_state),
9660 ufschd_uic_link_state_to_string(
9661 ufs_pm_lvl_states[lvl].link_state));
9662
9663 return curr_len;
9664}
9665
9666static ssize_t ufshcd_rpm_lvl_store(struct device *dev,
9667 struct device_attribute *attr, const char *buf, size_t count)
9668{
9669 return ufshcd_pm_lvl_store(dev, attr, buf, count, true);
9670}
9671
9672static void ufshcd_add_rpm_lvl_sysfs_nodes(struct ufs_hba *hba)
9673{
9674 hba->rpm_lvl_attr.show = ufshcd_rpm_lvl_show;
9675 hba->rpm_lvl_attr.store = ufshcd_rpm_lvl_store;
9676 sysfs_attr_init(&hba->rpm_lvl_attr.attr);
9677 hba->rpm_lvl_attr.attr.name = "rpm_lvl";
9678 hba->rpm_lvl_attr.attr.mode = S_IRUGO | S_IWUSR;
9679 if (device_create_file(hba->dev, &hba->rpm_lvl_attr))
9680 dev_err(hba->dev, "Failed to create sysfs for rpm_lvl\n");
9681}
9682
9683static ssize_t ufshcd_spm_lvl_show(struct device *dev,
9684 struct device_attribute *attr, char *buf)
9685{
9686 struct ufs_hba *hba = dev_get_drvdata(dev);
9687 int curr_len;
9688 u8 lvl;
9689
9690 curr_len = snprintf(buf, PAGE_SIZE,
9691 "\nCurrent System PM level [%d] => dev_state [%s] link_state [%s]\n",
9692 hba->spm_lvl,
9693 ufschd_ufs_dev_pwr_mode_to_string(
9694 ufs_pm_lvl_states[hba->spm_lvl].dev_state),
9695 ufschd_uic_link_state_to_string(
9696 ufs_pm_lvl_states[hba->spm_lvl].link_state));
9697
9698 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
9699 "\nAll available System PM levels info:\n");
9700 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++)
9701 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
9702 "\tSystem PM level [%d] => dev_state [%s] link_state [%s]\n",
9703 lvl,
9704 ufschd_ufs_dev_pwr_mode_to_string(
9705 ufs_pm_lvl_states[lvl].dev_state),
9706 ufschd_uic_link_state_to_string(
9707 ufs_pm_lvl_states[lvl].link_state));
9708
9709 return curr_len;
9710}
9711
9712static ssize_t ufshcd_spm_lvl_store(struct device *dev,
9713 struct device_attribute *attr, const char *buf, size_t count)
9714{
9715 return ufshcd_pm_lvl_store(dev, attr, buf, count, false);
9716}
9717
9718static void ufshcd_add_spm_lvl_sysfs_nodes(struct ufs_hba *hba)
9719{
9720 hba->spm_lvl_attr.show = ufshcd_spm_lvl_show;
9721 hba->spm_lvl_attr.store = ufshcd_spm_lvl_store;
9722 sysfs_attr_init(&hba->spm_lvl_attr.attr);
9723 hba->spm_lvl_attr.attr.name = "spm_lvl";
9724 hba->spm_lvl_attr.attr.mode = S_IRUGO | S_IWUSR;
9725 if (device_create_file(hba->dev, &hba->spm_lvl_attr))
9726 dev_err(hba->dev, "Failed to create sysfs for spm_lvl\n");
9727}
9728
9729static inline void ufshcd_add_sysfs_nodes(struct ufs_hba *hba)
9730{
9731 ufshcd_add_rpm_lvl_sysfs_nodes(hba);
9732 ufshcd_add_spm_lvl_sysfs_nodes(hba);
9733}
9734
Subhash Jadavanief542222017-08-02 16:23:55 -07009735static void __ufshcd_shutdown_clkscaling(struct ufs_hba *hba)
Subhash Jadavani9c807702017-04-01 00:35:51 -07009736{
9737 bool suspend = false;
9738 unsigned long flags;
9739
9740 spin_lock_irqsave(hba->host->host_lock, flags);
9741 if (hba->clk_scaling.is_allowed) {
9742 hba->clk_scaling.is_allowed = false;
9743 suspend = true;
9744 }
9745 spin_unlock_irqrestore(hba->host->host_lock, flags);
9746
9747 /**
9748 * Scaling may be scheduled before, hence make sure it
9749 * doesn't race with shutdown
9750 */
9751 if (ufshcd_is_clkscaling_supported(hba)) {
Subhash Jadavani9c807702017-04-01 00:35:51 -07009752 cancel_work_sync(&hba->clk_scaling.suspend_work);
9753 cancel_work_sync(&hba->clk_scaling.resume_work);
9754 if (suspend)
9755 ufshcd_suspend_clkscaling(hba);
9756 }
9757
9758 /* Unregister so that devfreq_monitor can't race with shutdown */
Subhash Jadavanief542222017-08-02 16:23:55 -07009759 if (hba->devfreq) {
Subhash Jadavani9c807702017-04-01 00:35:51 -07009760 devfreq_remove_device(hba->devfreq);
Subhash Jadavanief542222017-08-02 16:23:55 -07009761 hba->devfreq = NULL;
9762 }
9763}
9764
9765static void ufshcd_shutdown_clkscaling(struct ufs_hba *hba)
9766{
Sayali Lokhande378d03f2017-09-06 20:09:32 +05309767 if (!ufshcd_is_clkscaling_supported(hba))
9768 return;
Subhash Jadavanief542222017-08-02 16:23:55 -07009769 __ufshcd_shutdown_clkscaling(hba);
9770 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Subhash Jadavani9c807702017-04-01 00:35:51 -07009771}
9772
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309773/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009774 * ufshcd_shutdown - shutdown routine
9775 * @hba: per adapter instance
9776 *
9777 * This function would power off both UFS device and UFS link.
9778 *
9779 * Returns 0 always to allow force shutdown even in case of errors.
9780 */
9781int ufshcd_shutdown(struct ufs_hba *hba)
9782{
Subhash Jadavani9c807702017-04-01 00:35:51 -07009783 int ret = 0;
9784
9785 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
9786 goto out;
9787
9788 pm_runtime_get_sync(hba->dev);
9789 ufshcd_hold_all(hba);
9790 ufshcd_mark_shutdown_ongoing(hba);
9791 ufshcd_shutdown_clkscaling(hba);
9792 /**
9793 * (1) Acquire the lock to stop any more requests
9794 * (2) Wait for all issued requests to complete
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009795 */
Subhash Jadavani9c807702017-04-01 00:35:51 -07009796 ufshcd_get_write_lock(hba);
9797 ufshcd_scsi_block_requests(hba);
9798 ret = ufshcd_wait_for_doorbell_clr(hba, U64_MAX);
9799 if (ret)
9800 dev_err(hba->dev, "%s: waiting for DB clear: failed: %d\n",
9801 __func__, ret);
9802 /* Requests may have errored out above, let it be handled */
9803 flush_work(&hba->eh_work);
9804 /* reqs issued from contexts other than shutdown will fail from now */
9805 ufshcd_scsi_unblock_requests(hba);
9806 ufshcd_release_all(hba);
9807 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
9808out:
9809 if (ret)
9810 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
9811 /* allow force shutdown even in case of errors */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009812 return 0;
9813}
9814EXPORT_SYMBOL(ufshcd_shutdown);
9815
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07009816/*
9817 * Values permitted 0, 1, 2.
9818 * 0 -> Disable IO latency histograms (default)
9819 * 1 -> Enable IO latency histograms
9820 * 2 -> Zero out IO latency histograms
9821 */
9822static ssize_t
9823latency_hist_store(struct device *dev, struct device_attribute *attr,
9824 const char *buf, size_t count)
9825{
9826 struct ufs_hba *hba = dev_get_drvdata(dev);
9827 long value;
9828
9829 if (kstrtol(buf, 0, &value))
9830 return -EINVAL;
9831 if (value == BLK_IO_LAT_HIST_ZERO)
9832 blk_zero_latency_hist(&hba->io_lat_s);
9833 else if (value == BLK_IO_LAT_HIST_ENABLE ||
9834 value == BLK_IO_LAT_HIST_DISABLE)
9835 hba->latency_hist_enabled = value;
9836 return count;
9837}
9838
9839ssize_t
9840latency_hist_show(struct device *dev, struct device_attribute *attr,
9841 char *buf)
9842{
9843 struct ufs_hba *hba = dev_get_drvdata(dev);
9844
9845 return blk_latency_hist_show(&hba->io_lat_s, buf);
9846}
9847
9848static DEVICE_ATTR(latency_hist, S_IRUGO | S_IWUSR,
9849 latency_hist_show, latency_hist_store);
9850
9851static void
9852ufshcd_init_latency_hist(struct ufs_hba *hba)
9853{
9854 if (device_create_file(hba->dev, &dev_attr_latency_hist))
9855 dev_err(hba->dev, "Failed to create latency_hist sysfs entry\n");
9856}
9857
9858static void
9859ufshcd_exit_latency_hist(struct ufs_hba *hba)
9860{
9861 device_create_file(hba->dev, &dev_attr_latency_hist);
9862}
9863
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009864/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309865 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309866 * data structure memory
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309867 * @hba - per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309868 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309869void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309870{
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05309871 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309872 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05309873 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02009874 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309875
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009876 ufshcd_exit_clk_gating(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009877 ufshcd_exit_hibern8_on_idle(hba);
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -07009878 ufshcd_exit_latency_hist(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009879 if (ufshcd_is_clkscaling_supported(hba)) {
9880 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Kyle Yan65be4a52016-10-31 15:05:00 -07009881 if (hba->devfreq)
9882 devfreq_remove_device(hba->devfreq);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009883 }
Channagoud Kadabi8810e5f2017-02-17 16:01:05 -08009884
9885 ufshcd_exit_latency_hist(hba);
9886
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009887 ufshcd_hba_exit(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009888 ufsdbg_remove_debugfs(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309889}
9890EXPORT_SYMBOL_GPL(ufshcd_remove);
9891
9892/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02009893 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
9894 * @hba: pointer to Host Bus Adapter (HBA)
9895 */
9896void ufshcd_dealloc_host(struct ufs_hba *hba)
9897{
9898 scsi_host_put(hba->host);
9899}
9900EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
9901
9902/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09009903 * ufshcd_set_dma_mask - Set dma mask based on the controller
9904 * addressing capability
9905 * @hba: per adapter instance
9906 *
9907 * Returns 0 for success, non-zero for failure
9908 */
9909static int ufshcd_set_dma_mask(struct ufs_hba *hba)
9910{
9911 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
9912 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
9913 return 0;
9914 }
9915 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
9916}
9917
9918/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009919 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309920 * @dev: pointer to device handle
9921 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309922 * Returns 0 on success, non-zero value on failure
9923 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009924int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309925{
9926 struct Scsi_Host *host;
9927 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009928 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309929
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309930 if (!dev) {
9931 dev_err(dev,
9932 "Invalid memory reference for dev is NULL\n");
9933 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309934 goto out_error;
9935 }
9936
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309937 host = scsi_host_alloc(&ufshcd_driver_template,
9938 sizeof(struct ufs_hba));
9939 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309940 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309941 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309942 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309943 }
9944 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309945 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309946 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009947 *hba_handle = hba;
9948
9949out_error:
9950 return err;
9951}
9952EXPORT_SYMBOL(ufshcd_alloc_host);
9953
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009954/**
9955 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
9956 * @hba: per adapter instance
9957 * @scale_up: True if scaling up and false if scaling down
9958 *
9959 * Returns true if scaling is required, false otherwise.
9960 */
9961static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
9962 bool scale_up)
Sahitya Tummala856b3482014-09-25 15:32:34 +03009963{
Sahitya Tummala856b3482014-09-25 15:32:34 +03009964 struct ufs_clk_info *clki;
9965 struct list_head *head = &hba->clk_list_head;
9966
9967 if (!head || list_empty(head))
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009968 return false;
Yaniv Gardif06fcc72015-10-28 13:15:51 +02009969
Sahitya Tummala856b3482014-09-25 15:32:34 +03009970 list_for_each_entry(clki, head, list) {
9971 if (!IS_ERR_OR_NULL(clki->clk)) {
9972 if (scale_up && clki->max_freq) {
9973 if (clki->curr_freq == clki->max_freq)
9974 continue;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009975 return true;
Sahitya Tummala856b3482014-09-25 15:32:34 +03009976 } else if (!scale_up && clki->min_freq) {
9977 if (clki->curr_freq == clki->min_freq)
9978 continue;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009979 return true;
Sahitya Tummala856b3482014-09-25 15:32:34 +03009980 }
9981 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03009982 }
Yaniv Gardif06fcc72015-10-28 13:15:51 +02009983
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009984 return false;
9985}
Yaniv Gardif06fcc72015-10-28 13:15:51 +02009986
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009987/**
9988 * ufshcd_scale_gear - scale up/down UFS gear
9989 * @hba: per adapter instance
9990 * @scale_up: True for scaling up gear and false for scaling down
9991 *
9992 * Returns 0 for success,
9993 * Returns -EBUSY if scaling can't happen at this time
9994 * Returns non-zero for any other errors
9995 */
9996static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
9997{
9998 int ret = 0;
9999 struct ufs_pa_layer_attr new_pwr_info;
10000 u32 scale_down_gear = ufshcd_vops_get_scale_down_gear(hba);
10001
10002 BUG_ON(!hba->clk_scaling.saved_pwr_info.is_valid);
10003
10004 if (scale_up) {
10005 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
10006 sizeof(struct ufs_pa_layer_attr));
Subhash Jadavanibe096032017-03-23 12:55:25 -070010007 /*
10008 * Some UFS devices may stop responding after switching from
10009 * HS-G1 to HS-G3. Also, it is found that these devices work
10010 * fine if we do 2 steps switch: HS-G1 to HS-G2 followed by
10011 * HS-G2 to HS-G3. If UFS_DEVICE_QUIRK_HS_G1_TO_HS_G3_SWITCH
10012 * quirk is enabled for such devices, this 2 steps gear switch
10013 * workaround will be applied.
10014 */
10015 if ((hba->dev_info.quirks &
10016 UFS_DEVICE_QUIRK_HS_G1_TO_HS_G3_SWITCH)
10017 && (hba->pwr_info.gear_tx == UFS_HS_G1)
10018 && (new_pwr_info.gear_tx == UFS_HS_G3)) {
10019 /* scale up to G2 first */
10020 new_pwr_info.gear_tx = UFS_HS_G2;
10021 new_pwr_info.gear_rx = UFS_HS_G2;
10022 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
10023 if (ret)
10024 goto out;
10025
10026 /* scale up to G3 now */
10027 new_pwr_info.gear_tx = UFS_HS_G3;
10028 new_pwr_info.gear_rx = UFS_HS_G3;
Subhash Jadavanicfd76732017-04-18 11:06:22 -070010029 /* now, fall through to set the HS-G3 */
Subhash Jadavanibe096032017-03-23 12:55:25 -070010030 }
Subhash Jadavanicfd76732017-04-18 11:06:22 -070010031 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
10032 if (ret)
10033 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010034 } else {
10035 memcpy(&new_pwr_info, &hba->pwr_info,
10036 sizeof(struct ufs_pa_layer_attr));
10037
10038 if (hba->pwr_info.gear_tx > scale_down_gear
10039 || hba->pwr_info.gear_rx > scale_down_gear) {
10040 /* save the current power mode */
10041 memcpy(&hba->clk_scaling.saved_pwr_info.info,
10042 &hba->pwr_info,
10043 sizeof(struct ufs_pa_layer_attr));
10044
10045 /* scale down gear */
10046 new_pwr_info.gear_tx = scale_down_gear;
10047 new_pwr_info.gear_rx = scale_down_gear;
Subhash Jadavani4f0df17b2016-12-16 13:19:27 -080010048 if (!(hba->dev_info.quirks & UFS_DEVICE_NO_FASTAUTO)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010049 new_pwr_info.pwr_tx = FASTAUTO_MODE;
10050 new_pwr_info.pwr_rx = FASTAUTO_MODE;
10051 }
10052 }
Subhash Jadavanibe096032017-03-23 12:55:25 -070010053 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010054 }
10055
Subhash Jadavanibe096032017-03-23 12:55:25 -070010056out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010057 if (ret)
10058 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d), scale_up = %d",
10059 __func__, ret,
10060 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
10061 new_pwr_info.gear_tx, new_pwr_info.gear_rx,
10062 scale_up);
10063
Sahitya Tummala856b3482014-09-25 15:32:34 +030010064 return ret;
10065}
10066
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010067static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
10068{
10069 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
10070 int ret = 0;
10071 /*
10072 * make sure that there are no outstanding requests when
10073 * clock scaling is in progress
10074 */
10075 ufshcd_scsi_block_requests(hba);
Subhash Jadavani9c807702017-04-01 00:35:51 -070010076 down_write(&hba->lock);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010077 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
10078 ret = -EBUSY;
Subhash Jadavani9c807702017-04-01 00:35:51 -070010079 up_write(&hba->lock);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010080 ufshcd_scsi_unblock_requests(hba);
10081 }
10082
10083 return ret;
10084}
10085
10086static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
10087{
Subhash Jadavani9c807702017-04-01 00:35:51 -070010088 up_write(&hba->lock);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010089 ufshcd_scsi_unblock_requests(hba);
10090}
10091
10092/**
10093 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
10094 * @hba: per adapter instance
10095 * @scale_up: True for scaling up and false for scalin down
10096 *
10097 * Returns 0 for success,
10098 * Returns -EBUSY if scaling can't happen at this time
10099 * Returns non-zero for any other errors
10100 */
10101static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
10102{
10103 int ret = 0;
10104
Subhash Jadavanief542222017-08-02 16:23:55 -070010105 if (hba->extcon && ufshcd_is_card_offline(hba))
10106 return 0;
10107
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010108 /* let's not get into low power until clock scaling is completed */
Asutosh Das3da913a2017-03-24 10:32:16 +053010109 hba->ufs_stats.clk_hold.ctx = CLK_SCALE_WORK;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010110 ufshcd_hold_all(hba);
10111
10112 ret = ufshcd_clock_scaling_prepare(hba);
10113 if (ret)
10114 goto out;
10115
10116 /* scale down the gear before scaling down clocks */
10117 if (!scale_up) {
10118 ret = ufshcd_scale_gear(hba, false);
10119 if (ret)
10120 goto clk_scaling_unprepare;
10121 }
10122
Subhash Jadavani67c53302017-03-22 17:00:54 -070010123 /*
10124 * If auto hibern8 is supported then put the link in
10125 * hibern8 manually, this is to avoid auto hibern8
10126 * racing during clock frequency scaling sequence.
10127 */
10128 if (ufshcd_is_auto_hibern8_supported(hba)) {
10129 ret = ufshcd_uic_hibern8_enter(hba);
10130 if (ret)
10131 /* link will be bad state so no need to scale_up_gear */
10132 return ret;
10133 }
10134
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010135 ret = ufshcd_scale_clks(hba, scale_up);
10136 if (ret)
10137 goto scale_up_gear;
10138
Subhash Jadavani67c53302017-03-22 17:00:54 -070010139 if (ufshcd_is_auto_hibern8_supported(hba)) {
10140 ret = ufshcd_uic_hibern8_exit(hba);
10141 if (ret)
10142 /* link will be bad state so no need to scale_up_gear */
10143 return ret;
10144 }
10145
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010146 /* scale up the gear after scaling up clocks */
10147 if (scale_up) {
10148 ret = ufshcd_scale_gear(hba, true);
10149 if (ret) {
10150 ufshcd_scale_clks(hba, false);
10151 goto clk_scaling_unprepare;
10152 }
10153 }
10154
10155 if (!ret) {
10156 hba->clk_scaling.is_scaled_up = scale_up;
10157 if (scale_up)
10158 hba->clk_gating.delay_ms =
10159 hba->clk_gating.delay_ms_perf;
10160 else
10161 hba->clk_gating.delay_ms =
10162 hba->clk_gating.delay_ms_pwr_save;
10163 }
10164
10165 goto clk_scaling_unprepare;
10166
10167scale_up_gear:
10168 if (!scale_up)
10169 ufshcd_scale_gear(hba, true);
10170clk_scaling_unprepare:
10171 ufshcd_clock_scaling_unprepare(hba);
10172out:
Asutosh Das3da913a2017-03-24 10:32:16 +053010173 hba->ufs_stats.clk_rel.ctx = CLK_SCALE_WORK;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010174 ufshcd_release_all(hba);
10175 return ret;
10176}
10177
10178static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
10179{
10180 unsigned long flags;
10181
10182 devfreq_suspend_device(hba->devfreq);
10183 spin_lock_irqsave(hba->host->host_lock, flags);
10184 hba->clk_scaling.window_start_t = 0;
10185 spin_unlock_irqrestore(hba->host->host_lock, flags);
10186}
10187
10188static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
10189{
10190 unsigned long flags;
10191 bool suspend = false;
10192
10193 if (!ufshcd_is_clkscaling_supported(hba))
10194 return;
10195
10196 spin_lock_irqsave(hba->host->host_lock, flags);
10197 if (!hba->clk_scaling.is_suspended) {
10198 suspend = true;
10199 hba->clk_scaling.is_suspended = true;
10200 }
10201 spin_unlock_irqrestore(hba->host->host_lock, flags);
10202
10203 if (suspend)
10204 __ufshcd_suspend_clkscaling(hba);
10205}
10206
10207static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
10208{
10209 unsigned long flags;
10210 bool resume = false;
10211
10212 if (!ufshcd_is_clkscaling_supported(hba))
10213 return;
10214
10215 spin_lock_irqsave(hba->host->host_lock, flags);
10216 if (hba->clk_scaling.is_suspended) {
10217 resume = true;
10218 hba->clk_scaling.is_suspended = false;
10219 }
10220 spin_unlock_irqrestore(hba->host->host_lock, flags);
10221
10222 if (resume)
10223 devfreq_resume_device(hba->devfreq);
10224}
10225
10226static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
10227 struct device_attribute *attr, char *buf)
10228{
10229 struct ufs_hba *hba = dev_get_drvdata(dev);
10230
10231 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
10232}
10233
10234static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
10235 struct device_attribute *attr, const char *buf, size_t count)
10236{
10237 struct ufs_hba *hba = dev_get_drvdata(dev);
10238 u32 value;
10239 int err;
10240
10241 if (kstrtou32(buf, 0, &value))
10242 return -EINVAL;
10243
10244 value = !!value;
10245 if (value == hba->clk_scaling.is_allowed)
10246 goto out;
10247
10248 pm_runtime_get_sync(hba->dev);
10249 ufshcd_hold(hba, false);
10250
10251 cancel_work_sync(&hba->clk_scaling.suspend_work);
10252 cancel_work_sync(&hba->clk_scaling.resume_work);
10253
10254 hba->clk_scaling.is_allowed = value;
10255
10256 if (value) {
10257 ufshcd_resume_clkscaling(hba);
10258 } else {
10259 ufshcd_suspend_clkscaling(hba);
10260 err = ufshcd_devfreq_scale(hba, true);
10261 if (err)
10262 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
10263 __func__, err);
10264 }
10265
10266 ufshcd_release(hba, false);
10267 pm_runtime_put_sync(hba->dev);
10268out:
10269 return count;
10270}
10271
10272static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
10273{
10274 struct ufs_hba *hba = container_of(work, struct ufs_hba,
10275 clk_scaling.suspend_work);
10276 unsigned long irq_flags;
10277
10278 spin_lock_irqsave(hba->host->host_lock, irq_flags);
10279 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
10280 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
10281 return;
10282 }
10283 hba->clk_scaling.is_suspended = true;
10284 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
10285
10286 __ufshcd_suspend_clkscaling(hba);
10287}
10288
10289static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
10290{
10291 struct ufs_hba *hba = container_of(work, struct ufs_hba,
10292 clk_scaling.resume_work);
10293 unsigned long irq_flags;
10294
10295 spin_lock_irqsave(hba->host->host_lock, irq_flags);
10296 if (!hba->clk_scaling.is_suspended) {
10297 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
10298 return;
10299 }
10300 hba->clk_scaling.is_suspended = false;
10301 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
10302
10303 devfreq_resume_device(hba->devfreq);
10304}
10305
Sahitya Tummala856b3482014-09-25 15:32:34 +030010306static int ufshcd_devfreq_target(struct device *dev,
10307 unsigned long *freq, u32 flags)
10308{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010309 int ret = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +030010310 struct ufs_hba *hba = dev_get_drvdata(dev);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010311 unsigned long irq_flags;
10312 ktime_t start;
10313 bool scale_up, sched_clk_scaling_suspend_work = false;
Sahitya Tummala856b3482014-09-25 15:32:34 +030010314
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010315 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +030010316 return -EINVAL;
10317
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010318 if ((*freq > 0) && (*freq < UINT_MAX)) {
10319 dev_err(hba->dev, "%s: invalid freq = %lu\n", __func__, *freq);
10320 return -EINVAL;
10321 }
Sahitya Tummala856b3482014-09-25 15:32:34 +030010322
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010323 spin_lock_irqsave(hba->host->host_lock, irq_flags);
10324 if (ufshcd_eh_in_progress(hba)) {
10325 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
10326 return 0;
10327 }
10328
10329 if (!hba->clk_scaling.active_reqs)
10330 sched_clk_scaling_suspend_work = true;
10331
10332 scale_up = (*freq == UINT_MAX) ? true : false;
10333 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
10334 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
10335 ret = 0;
10336 goto out; /* no state change required */
10337 }
10338 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
10339
10340 start = ktime_get();
10341 ret = ufshcd_devfreq_scale(hba, scale_up);
10342 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
10343 (scale_up ? "up" : "down"),
10344 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
10345
10346out:
10347 if (sched_clk_scaling_suspend_work)
10348 queue_work(hba->clk_scaling.workq,
10349 &hba->clk_scaling.suspend_work);
10350
10351 return ret;
Sahitya Tummala856b3482014-09-25 15:32:34 +030010352}
10353
10354static int ufshcd_devfreq_get_dev_status(struct device *dev,
10355 struct devfreq_dev_status *stat)
10356{
10357 struct ufs_hba *hba = dev_get_drvdata(dev);
10358 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
10359 unsigned long flags;
10360
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010361 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +030010362 return -EINVAL;
10363
10364 memset(stat, 0, sizeof(*stat));
10365
10366 spin_lock_irqsave(hba->host->host_lock, flags);
10367 if (!scaling->window_start_t)
10368 goto start_window;
10369
10370 if (scaling->is_busy_started)
10371 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
10372 scaling->busy_start_t));
10373
10374 stat->total_time = jiffies_to_usecs((long)jiffies -
10375 (long)scaling->window_start_t);
10376 stat->busy_time = scaling->tot_busy_t;
10377start_window:
10378 scaling->window_start_t = jiffies;
10379 scaling->tot_busy_t = 0;
10380
10381 if (hba->outstanding_reqs) {
10382 scaling->busy_start_t = ktime_get();
10383 scaling->is_busy_started = true;
10384 } else {
10385 scaling->busy_start_t = ktime_set(0, 0);
10386 scaling->is_busy_started = false;
10387 }
10388 spin_unlock_irqrestore(hba->host->host_lock, flags);
10389 return 0;
10390}
10391
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010392static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
10393{
10394 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
10395 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
10396 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
10397 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
10398 hba->clk_scaling.enable_attr.attr.mode = S_IRUGO | S_IWUSR;
10399 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
10400 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
10401}
Sahitya Tummala856b3482014-09-25 15:32:34 +030010402
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010403static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba)
10404{
10405 struct device *dev = hba->dev;
10406 int ret;
10407
10408 ret = of_property_read_u32(dev->of_node, "lanes-per-direction",
10409 &hba->lanes_per_direction);
10410 if (ret) {
10411 dev_dbg(hba->dev,
10412 "%s: failed to read lanes-per-direction, ret=%d\n",
10413 __func__, ret);
10414 hba->lanes_per_direction = UFSHCD_DEFAULT_LANES_PER_DIRECTION;
10415 }
10416}
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030010417/**
10418 * ufshcd_init - Driver initialization routine
10419 * @hba: per-adapter instance
10420 * @mmio_base: base register address
10421 * @irq: Interrupt line of device
10422 * Returns 0 on success, non-zero value on failure
10423 */
10424int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
10425{
10426 int err;
10427 struct Scsi_Host *host = hba->host;
10428 struct device *dev = hba->dev;
10429
10430 if (!mmio_base) {
10431 dev_err(hba->dev,
10432 "Invalid memory reference for mmio_base is NULL\n");
10433 err = -ENODEV;
10434 goto out_error;
10435 }
10436
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053010437 hba->mmio_base = mmio_base;
10438 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010439
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010440 ufshcd_init_lanes_per_dir(hba);
10441
Michal' Potomski833ea2a2017-05-31 15:25:11 +053010442 /* Set descriptor lengths to specification defaults */
10443 ufshcd_def_desc_sizes(hba);
10444
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030010445 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030010446 if (err)
10447 goto out_error;
10448
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010449 /* Read capabilities registers */
10450 ufshcd_hba_capabilities(hba);
10451
10452 /* Get UFS version supported by the controller */
10453 hba->ufs_version = ufshcd_get_ufs_version(hba);
10454
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010455 /* print error message if ufs_version is not valid */
10456 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
10457 (hba->ufs_version != UFSHCI_VERSION_11) &&
10458 (hba->ufs_version != UFSHCI_VERSION_20) &&
10459 (hba->ufs_version != UFSHCI_VERSION_21))
10460 dev_err(hba->dev, "invalid UFS version 0x%x\n",
10461 hba->ufs_version);
10462
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053010463 /* Get Interrupt bit mask per version */
10464 hba->intr_mask = ufshcd_get_intr_mask(hba);
10465
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010466 /* Enable debug prints */
10467 hba->ufshcd_dbg_print = DEFAULT_UFSHCD_DBG_PRINT_EN;
10468
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +090010469 err = ufshcd_set_dma_mask(hba);
10470 if (err) {
10471 dev_err(hba->dev, "set dma mask failed\n");
10472 goto out_disable;
10473 }
10474
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010475 /* Allocate memory for host memory space */
10476 err = ufshcd_memory_alloc(hba);
10477 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053010478 dev_err(hba->dev, "Memory allocation failed\n");
10479 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010480 }
10481
10482 /* Configure LRB */
10483 ufshcd_host_memory_configure(hba);
10484
10485 host->can_queue = hba->nutrs;
10486 host->cmd_per_lun = hba->nutrs;
10487 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +030010488 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010489 host->max_channel = UFSHCD_MAX_CHANNEL;
10490 host->unique_id = host->host_no;
10491 host->max_cmd_len = MAX_CDB_SIZE;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010492 host->set_dbd_for_caching = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010493
Dolev Raviv7eb584d2014-09-25 15:32:31 +030010494 hba->max_pwr_info.is_valid = false;
10495
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010496 /* Initailize wait queue for task management */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053010497 init_waitqueue_head(&hba->tm_wq);
10498 init_waitqueue_head(&hba->tm_tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010499
10500 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +053010501 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +053010502 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Subhash Jadavani9e7ed482017-05-08 18:29:45 -070010503 INIT_WORK(&hba->card_detect_work, ufshcd_card_detect_handler);
Asutosh Das3923c232017-09-15 16:14:26 +053010504 INIT_WORK(&hba->rls_work, ufshcd_rls_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010505
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053010506 /* Initialize UIC command mutex */
10507 mutex_init(&hba->uic_cmd_mutex);
10508
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053010509 /* Initialize mutex for device management commands */
10510 mutex_init(&hba->dev_cmd.lock);
10511
Subhash Jadavani9c807702017-04-01 00:35:51 -070010512 init_rwsem(&hba->lock);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010513
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053010514 /* Initialize device management tag acquire wait queue */
10515 init_waitqueue_head(&hba->dev_cmd.tag_wq);
10516
Sahitya Tummala1ab27c92014-09-25 15:32:32 +030010517 ufshcd_init_clk_gating(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010518 ufshcd_init_hibern8_on_idle(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +020010519
10520 /*
10521 * In order to avoid any spurious interrupt immediately after
10522 * registering UFS controller interrupt handler, clear any pending UFS
10523 * interrupt status and disable all the UFS interrupts.
10524 */
10525 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
10526 REG_INTERRUPT_STATUS);
10527 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
10528 /*
10529 * Make sure that UFS interrupts are disabled and any pending interrupt
10530 * status is cleared before registering UFS interrupt handler.
10531 */
10532 mb();
10533
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010534 /* IRQ registration */
Can Guo8bf59ba2017-05-18 15:30:04 +080010535 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED,
10536 dev_name(dev), hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010537 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053010538 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +030010539 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +030010540 } else {
10541 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010542 }
10543
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053010544 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010545 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053010546 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +030010547 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010548 }
10549
Subhash Jadavani9c807702017-04-01 00:35:51 -070010550 /* Reset controller to power on reset (POR) state */
10551 ufshcd_vops_full_reset(hba);
10552
10553 /* reset connected UFS device */
10554 err = ufshcd_reset_device(hba);
10555 if (err)
10556 dev_warn(hba->dev, "%s: device reset failed. err %d\n",
10557 __func__, err);
10558
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053010559 /* Host controller enable */
10560 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010561 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053010562 dev_err(hba->dev, "Host controller enable failed\n");
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010563 ufshcd_print_host_regs(hba);
10564 ufshcd_print_host_state(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053010565 goto out_remove_scsi_host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010566 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053010567
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010568 if (ufshcd_is_clkscaling_supported(hba)) {
10569 char wq_name[sizeof("ufs_clkscaling_00")];
10570
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010571 INIT_WORK(&hba->clk_scaling.suspend_work,
10572 ufshcd_clk_scaling_suspend_work);
10573 INIT_WORK(&hba->clk_scaling.resume_work,
10574 ufshcd_clk_scaling_resume_work);
10575
10576 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clkscaling_%d",
10577 host->host_no);
10578 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
10579
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010580 ufshcd_clkscaling_init_sysfs(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +030010581 }
10582
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010583 /*
10584 * If rpm_lvl and and spm_lvl are not already set to valid levels,
10585 * set the default power management level for UFS runtime and system
10586 * suspend. Default power saving mode selected is keeping UFS link in
10587 * Hibern8 state and UFS device in sleep.
10588 */
10589 if (!ufshcd_is_valid_pm_lvl(hba->rpm_lvl))
10590 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
10591 UFS_SLEEP_PWR_MODE,
10592 UIC_LINK_HIBERN8_STATE);
10593 if (!ufshcd_is_valid_pm_lvl(hba->spm_lvl))
10594 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
10595 UFS_SLEEP_PWR_MODE,
10596 UIC_LINK_HIBERN8_STATE);
10597
Sujit Reddy Thumma62694732013-07-30 00:36:00 +053010598 /* Hold auto suspend until async scan completes */
10599 pm_runtime_get_sync(dev);
10600
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -070010601 ufshcd_init_latency_hist(hba);
10602
Subhash Jadavani57d104c2014-09-25 15:32:30 +030010603 /*
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010604 * We are assuming that device wasn't put in sleep/power-down
10605 * state exclusively during the boot stage before kernel.
10606 * This assumption helps avoid doing link startup twice during
10607 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +030010608 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010609 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +030010610
Can Guob7147732017-04-18 16:22:56 +080010611 ufshcd_cmd_log_init(hba);
10612
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053010613 async_schedule(ufshcd_async_scan, hba);
10614
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070010615 ufsdbg_add_debugfs(hba);
10616
10617 ufshcd_add_sysfs_nodes(hba);
10618
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010619 return 0;
10620
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053010621out_remove_scsi_host:
10622 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +030010623exit_gating:
10624 ufshcd_exit_clk_gating(hba);
Mohan Srinivasan0ef170d2016-08-25 18:31:01 -070010625 ufshcd_exit_latency_hist(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053010626out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +030010627 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030010628 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053010629out_error:
10630 return err;
10631}
10632EXPORT_SYMBOL_GPL(ufshcd_init);
10633
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053010634MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
10635MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +053010636MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010637MODULE_LICENSE("GPL");
10638MODULE_VERSION(UFSHCD_DRIVER_VERSION);