Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1 | /* |
Vinayak Holikatti | e0eca63 | 2013-02-25 21:44:33 +0530 | [diff] [blame] | 2 | * Universal Flash Storage Host controller driver Core |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3 | * |
| 4 | * This code is based on drivers/scsi/ufs/ufshcd.c |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 5 | * Copyright (C) 2011-2013 Samsung India Software Operations |
Stephen Boyd | 9bc70c3 | 2017-03-01 16:58:38 -0800 | [diff] [blame] | 6 | * Copyright (c) 2013-2017, The Linux Foundation. All rights reserved. |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 7 | * |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 8 | * Authors: |
| 9 | * Santosh Yaraganavi <santosh.sy@samsung.com> |
| 10 | * Vinayak Holikatti <h.vinayak@samsung.com> |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License |
| 14 | * as published by the Free Software Foundation; either version 2 |
| 15 | * of the License, or (at your option) any later version. |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 16 | * See the COPYING file in the top-level directory or visit |
| 17 | * <http://www.gnu.org/licenses/gpl-2.0.html> |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 18 | * |
| 19 | * This program is distributed in the hope that it will be useful, |
| 20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 22 | * GNU General Public License for more details. |
| 23 | * |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 24 | * This program is provided "AS IS" and "WITH ALL FAULTS" and |
| 25 | * without warranty of any kind. You are solely responsible for |
| 26 | * determining the appropriateness of using and distributing |
| 27 | * the program and assume all risks associated with your exercise |
| 28 | * of rights with respect to the program, including but not limited |
| 29 | * to infringement of third party rights, the risks and costs of |
| 30 | * program errors, damage to or loss of data, programs or equipment, |
| 31 | * and unavailability or interruption of operations. Under no |
| 32 | * circumstances will the contributor of this Program be liable for |
| 33 | * any damages of any kind arising from your use or distribution of |
| 34 | * this program. |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 35 | * |
| 36 | * The Linux Foundation chooses to take subject only to the GPLv2 |
| 37 | * license terms, and distributes only under these terms. |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 38 | */ |
| 39 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 40 | #include <linux/async.h> |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 41 | #include <scsi/ufs/ioctl.h> |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 42 | #include <linux/devfreq.h> |
Yaniv Gardi | b573d48 | 2016-03-10 17:37:09 +0200 | [diff] [blame] | 43 | #include <linux/nls.h> |
Yaniv Gardi | 54b879b | 2016-03-10 17:37:05 +0200 | [diff] [blame] | 44 | #include <linux/of.h> |
Mohan Srinivasan | 0ef170d | 2016-08-25 18:31:01 -0700 | [diff] [blame] | 45 | #include <linux/blkdev.h> |
Vinayak Holikatti | e0eca63 | 2013-02-25 21:44:33 +0530 | [diff] [blame] | 46 | #include "ufshcd.h" |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 47 | #include "ufshci.h" |
Yaniv Gardi | c58ab7a | 2016-03-10 17:37:10 +0200 | [diff] [blame] | 48 | #include "ufs_quirks.h" |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 49 | #include "ufs-debugfs.h" |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 50 | #include "ufs-qcom.h" |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 51 | |
| 52 | #define CREATE_TRACE_POINTS |
| 53 | #include <trace/events/ufs.h> |
| 54 | |
| 55 | #ifdef CONFIG_DEBUG_FS |
| 56 | |
| 57 | static int ufshcd_tag_req_type(struct request *rq) |
| 58 | { |
| 59 | int rq_type = TS_WRITE; |
| 60 | |
| 61 | if (!rq || !(rq->cmd_type & REQ_TYPE_FS)) |
| 62 | rq_type = TS_NOT_SUPPORTED; |
| 63 | else if (rq->cmd_flags & REQ_PREFLUSH) |
| 64 | rq_type = TS_FLUSH; |
| 65 | else if (rq_data_dir(rq) == READ) |
| 66 | rq_type = (rq->cmd_flags & REQ_URGENT) ? |
| 67 | TS_URGENT_READ : TS_READ; |
| 68 | else if (rq->cmd_flags & REQ_URGENT) |
| 69 | rq_type = TS_URGENT_WRITE; |
| 70 | |
| 71 | return rq_type; |
| 72 | } |
| 73 | |
| 74 | static void ufshcd_update_error_stats(struct ufs_hba *hba, int type) |
| 75 | { |
| 76 | ufsdbg_set_err_state(hba); |
| 77 | if (type < UFS_ERR_MAX) |
| 78 | hba->ufs_stats.err_stats[type]++; |
| 79 | } |
| 80 | |
| 81 | static void ufshcd_update_tag_stats(struct ufs_hba *hba, int tag) |
| 82 | { |
| 83 | struct request *rq = |
| 84 | hba->lrb[tag].cmd ? hba->lrb[tag].cmd->request : NULL; |
| 85 | u64 **tag_stats = hba->ufs_stats.tag_stats; |
| 86 | int rq_type; |
| 87 | |
| 88 | if (!hba->ufs_stats.enabled) |
| 89 | return; |
| 90 | |
| 91 | tag_stats[tag][TS_TAG]++; |
| 92 | if (!rq || !(rq->cmd_type & REQ_TYPE_FS)) |
| 93 | return; |
| 94 | |
| 95 | WARN_ON(hba->ufs_stats.q_depth > hba->nutrs); |
| 96 | rq_type = ufshcd_tag_req_type(rq); |
| 97 | if (!(rq_type < 0 || rq_type > TS_NUM_STATS)) |
| 98 | tag_stats[hba->ufs_stats.q_depth++][rq_type]++; |
| 99 | } |
| 100 | |
| 101 | static void ufshcd_update_tag_stats_completion(struct ufs_hba *hba, |
| 102 | struct scsi_cmnd *cmd) |
| 103 | { |
| 104 | struct request *rq = cmd ? cmd->request : NULL; |
| 105 | |
| 106 | if (rq && rq->cmd_type & REQ_TYPE_FS) |
| 107 | hba->ufs_stats.q_depth--; |
| 108 | } |
| 109 | |
| 110 | static void update_req_stats(struct ufs_hba *hba, struct ufshcd_lrb *lrbp) |
| 111 | { |
| 112 | int rq_type; |
| 113 | struct request *rq = lrbp->cmd ? lrbp->cmd->request : NULL; |
| 114 | s64 delta = ktime_us_delta(lrbp->complete_time_stamp, |
| 115 | lrbp->issue_time_stamp); |
| 116 | |
| 117 | /* update general request statistics */ |
| 118 | if (hba->ufs_stats.req_stats[TS_TAG].count == 0) |
| 119 | hba->ufs_stats.req_stats[TS_TAG].min = delta; |
| 120 | hba->ufs_stats.req_stats[TS_TAG].count++; |
| 121 | hba->ufs_stats.req_stats[TS_TAG].sum += delta; |
| 122 | if (delta > hba->ufs_stats.req_stats[TS_TAG].max) |
| 123 | hba->ufs_stats.req_stats[TS_TAG].max = delta; |
| 124 | if (delta < hba->ufs_stats.req_stats[TS_TAG].min) |
| 125 | hba->ufs_stats.req_stats[TS_TAG].min = delta; |
| 126 | |
| 127 | rq_type = ufshcd_tag_req_type(rq); |
| 128 | if (rq_type == TS_NOT_SUPPORTED) |
| 129 | return; |
| 130 | |
| 131 | /* update request type specific statistics */ |
| 132 | if (hba->ufs_stats.req_stats[rq_type].count == 0) |
| 133 | hba->ufs_stats.req_stats[rq_type].min = delta; |
| 134 | hba->ufs_stats.req_stats[rq_type].count++; |
| 135 | hba->ufs_stats.req_stats[rq_type].sum += delta; |
| 136 | if (delta > hba->ufs_stats.req_stats[rq_type].max) |
| 137 | hba->ufs_stats.req_stats[rq_type].max = delta; |
| 138 | if (delta < hba->ufs_stats.req_stats[rq_type].min) |
| 139 | hba->ufs_stats.req_stats[rq_type].min = delta; |
| 140 | } |
| 141 | |
| 142 | static void |
| 143 | ufshcd_update_query_stats(struct ufs_hba *hba, enum query_opcode opcode, u8 idn) |
| 144 | { |
| 145 | if (opcode < UPIU_QUERY_OPCODE_MAX && idn < MAX_QUERY_IDN) |
| 146 | hba->ufs_stats.query_stats_arr[opcode][idn]++; |
| 147 | } |
| 148 | |
| 149 | #else |
| 150 | static inline void ufshcd_update_tag_stats(struct ufs_hba *hba, int tag) |
| 151 | { |
| 152 | } |
| 153 | |
| 154 | static inline void ufshcd_update_tag_stats_completion(struct ufs_hba *hba, |
| 155 | struct scsi_cmnd *cmd) |
| 156 | { |
| 157 | } |
| 158 | |
| 159 | static inline void ufshcd_update_error_stats(struct ufs_hba *hba, int type) |
| 160 | { |
| 161 | } |
| 162 | |
| 163 | static inline |
| 164 | void update_req_stats(struct ufs_hba *hba, struct ufshcd_lrb *lrbp) |
| 165 | { |
| 166 | } |
| 167 | |
| 168 | static inline |
| 169 | void ufshcd_update_query_stats(struct ufs_hba *hba, |
| 170 | enum query_opcode opcode, u8 idn) |
| 171 | { |
| 172 | } |
| 173 | #endif |
| 174 | |
| 175 | #define UFSHCD_REQ_SENSE_SIZE 18 |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 176 | |
Seungwon Jeon | 2fbd009 | 2013-06-26 22:39:27 +0530 | [diff] [blame] | 177 | #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\ |
| 178 | UTP_TASK_REQ_COMPL |\ |
| 179 | UFSHCD_ERROR_MASK) |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 180 | /* UIC command timeout, unit: ms */ |
| 181 | #define UIC_CMD_TIMEOUT 500 |
Seungwon Jeon | 2fbd009 | 2013-06-26 22:39:27 +0530 | [diff] [blame] | 182 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 183 | /* NOP OUT retries waiting for NOP IN response */ |
| 184 | #define NOP_OUT_RETRIES 10 |
| 185 | /* Timeout after 30 msecs if NOP OUT hangs without response */ |
| 186 | #define NOP_OUT_TIMEOUT 30 /* msecs */ |
| 187 | |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 188 | /* Query request retries */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 189 | #define QUERY_REQ_RETRIES 3 |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 190 | /* Query request timeout */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 191 | #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */ |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 192 | |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 193 | /* Task management command timeout */ |
| 194 | #define TM_CMD_TIMEOUT 100 /* msecs */ |
| 195 | |
Yaniv Gardi | 64238fb | 2016-02-01 15:02:43 +0200 | [diff] [blame] | 196 | /* maximum number of retries for a general UIC command */ |
| 197 | #define UFS_UIC_COMMAND_RETRIES 3 |
| 198 | |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 199 | /* maximum number of link-startup retries */ |
| 200 | #define DME_LINKSTARTUP_RETRIES 3 |
| 201 | |
Yaniv Gardi | 87d0b4a | 2016-02-01 15:02:44 +0200 | [diff] [blame] | 202 | /* Maximum retries for Hibern8 enter */ |
| 203 | #define UIC_HIBERN8_ENTER_RETRIES 3 |
| 204 | |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 205 | /* maximum number of reset retries before giving up */ |
| 206 | #define MAX_HOST_RESET_RETRIES 5 |
| 207 | |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 208 | /* Expose the flag value from utp_upiu_query.value */ |
| 209 | #define MASK_QUERY_UPIU_FLAG_LOC 0xFF |
| 210 | |
Seungwon Jeon | 7d56865 | 2013-08-31 21:40:20 +0530 | [diff] [blame] | 211 | /* Interrupt aggregation default timeout, unit: 40us */ |
| 212 | #define INT_AGGR_DEF_TO 0x02 |
| 213 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 214 | /* default value of auto suspend is 3 seconds */ |
| 215 | #define UFSHCD_AUTO_SUSPEND_DELAY_MS 3000 /* millisecs */ |
| 216 | |
| 217 | #define UFSHCD_CLK_GATING_DELAY_MS_PWR_SAVE 10 |
| 218 | #define UFSHCD_CLK_GATING_DELAY_MS_PERF 50 |
| 219 | |
| 220 | /* IOCTL opcode for command - ufs set device read only */ |
| 221 | #define UFS_IOCTL_BLKROSET BLKROSET |
| 222 | |
| 223 | #define UFSHCD_DEFAULT_LANES_PER_DIRECTION 2 |
| 224 | |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 225 | #define ufshcd_toggle_vreg(_dev, _vreg, _on) \ |
| 226 | ({ \ |
| 227 | int _ret; \ |
| 228 | if (_on) \ |
| 229 | _ret = ufshcd_enable_vreg(_dev, _vreg); \ |
| 230 | else \ |
| 231 | _ret = ufshcd_disable_vreg(_dev, _vreg); \ |
| 232 | _ret; \ |
| 233 | }) |
| 234 | |
Subhash Jadavani | 4386e02 | 2016-12-19 13:01:56 -0800 | [diff] [blame] | 235 | static void ufshcd_hex_dump(struct ufs_hba *hba, const char * const str, |
| 236 | const void *buf, size_t len) |
| 237 | |
| 238 | { |
| 239 | /* |
| 240 | * device name is expected to take up ~20 characters and "str" passed |
| 241 | * to this function is expected to be of ~10 character so we would need |
| 242 | * ~30 characters string to hold the concatenation of these 2 strings. |
| 243 | */ |
| 244 | #define MAX_PREFIX_STR_SIZE 50 |
| 245 | char prefix_str[MAX_PREFIX_STR_SIZE] = {0}; |
| 246 | |
| 247 | /* concatenate the device name and "str" */ |
| 248 | snprintf(prefix_str, MAX_PREFIX_STR_SIZE, "%s %s: ", |
| 249 | dev_name(hba->dev), str); |
| 250 | print_hex_dump(KERN_ERR, prefix_str, DUMP_PREFIX_OFFSET, |
| 251 | 16, 4, buf, len, false); |
| 252 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 253 | |
Subhash Jadavani | da461ce | 2014-09-25 15:32:25 +0300 | [diff] [blame] | 254 | static u32 ufs_query_desc_max_size[] = { |
| 255 | QUERY_DESC_DEVICE_MAX_SIZE, |
| 256 | QUERY_DESC_CONFIGURAION_MAX_SIZE, |
| 257 | QUERY_DESC_UNIT_MAX_SIZE, |
| 258 | QUERY_DESC_RFU_MAX_SIZE, |
| 259 | QUERY_DESC_INTERCONNECT_MAX_SIZE, |
| 260 | QUERY_DESC_STRING_MAX_SIZE, |
| 261 | QUERY_DESC_RFU_MAX_SIZE, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 262 | QUERY_DESC_GEOMETRY_MAZ_SIZE, |
Subhash Jadavani | da461ce | 2014-09-25 15:32:25 +0300 | [diff] [blame] | 263 | QUERY_DESC_POWER_MAX_SIZE, |
| 264 | QUERY_DESC_RFU_MAX_SIZE, |
| 265 | }; |
| 266 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 267 | enum { |
| 268 | UFSHCD_MAX_CHANNEL = 0, |
| 269 | UFSHCD_MAX_ID = 1, |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 270 | UFSHCD_CMD_PER_LUN = 32, |
| 271 | UFSHCD_CAN_QUEUE = 32, |
| 272 | }; |
| 273 | |
| 274 | /* UFSHCD states */ |
| 275 | enum { |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 276 | UFSHCD_STATE_RESET, |
| 277 | UFSHCD_STATE_ERROR, |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 278 | UFSHCD_STATE_OPERATIONAL, |
| 279 | }; |
| 280 | |
| 281 | /* UFSHCD error handling flags */ |
| 282 | enum { |
| 283 | UFSHCD_EH_IN_PROGRESS = (1 << 0), |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 284 | }; |
| 285 | |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 286 | /* UFSHCD UIC layer error flags */ |
| 287 | enum { |
| 288 | UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */ |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 289 | UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */ |
| 290 | UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */ |
| 291 | UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */ |
| 292 | UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */ |
| 293 | UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */ |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 294 | }; |
| 295 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 296 | /* Interrupt configuration options */ |
| 297 | enum { |
| 298 | UFSHCD_INT_DISABLE, |
| 299 | UFSHCD_INT_ENABLE, |
| 300 | UFSHCD_INT_CLEAR, |
| 301 | }; |
| 302 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 303 | #define DEFAULT_UFSHCD_DBG_PRINT_EN UFSHCD_DBG_PRINT_ALL |
| 304 | |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 305 | #define ufshcd_set_eh_in_progress(h) \ |
| 306 | (h->eh_flags |= UFSHCD_EH_IN_PROGRESS) |
| 307 | #define ufshcd_eh_in_progress(h) \ |
| 308 | (h->eh_flags & UFSHCD_EH_IN_PROGRESS) |
| 309 | #define ufshcd_clear_eh_in_progress(h) \ |
| 310 | (h->eh_flags &= ~UFSHCD_EH_IN_PROGRESS) |
| 311 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 312 | #define ufshcd_set_ufs_dev_active(h) \ |
| 313 | ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE) |
| 314 | #define ufshcd_set_ufs_dev_sleep(h) \ |
| 315 | ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE) |
| 316 | #define ufshcd_set_ufs_dev_poweroff(h) \ |
| 317 | ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE) |
| 318 | #define ufshcd_is_ufs_dev_active(h) \ |
| 319 | ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE) |
| 320 | #define ufshcd_is_ufs_dev_sleep(h) \ |
| 321 | ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE) |
| 322 | #define ufshcd_is_ufs_dev_poweroff(h) \ |
| 323 | ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE) |
| 324 | |
| 325 | static struct ufs_pm_lvl_states ufs_pm_lvl_states[] = { |
| 326 | {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE}, |
| 327 | {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE}, |
| 328 | {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE}, |
| 329 | {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE}, |
| 330 | {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE}, |
| 331 | {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE}, |
| 332 | }; |
| 333 | |
| 334 | static inline enum ufs_dev_pwr_mode |
| 335 | ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl) |
| 336 | { |
| 337 | return ufs_pm_lvl_states[lvl].dev_state; |
| 338 | } |
| 339 | |
| 340 | static inline enum uic_link_state |
| 341 | ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl) |
| 342 | { |
| 343 | return ufs_pm_lvl_states[lvl].link_state; |
| 344 | } |
| 345 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 346 | static inline enum ufs_pm_level |
| 347 | ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state, |
| 348 | enum uic_link_state link_state) |
| 349 | { |
| 350 | enum ufs_pm_level lvl; |
| 351 | |
| 352 | for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) { |
| 353 | if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) && |
| 354 | (ufs_pm_lvl_states[lvl].link_state == link_state)) |
| 355 | return lvl; |
| 356 | } |
| 357 | |
| 358 | /* if no match found, return the level 0 */ |
| 359 | return UFS_PM_LVL_0; |
| 360 | } |
| 361 | |
| 362 | static inline bool ufshcd_is_valid_pm_lvl(int lvl) |
| 363 | { |
| 364 | if (lvl >= 0 && lvl < ARRAY_SIZE(ufs_pm_lvl_states)) |
| 365 | return true; |
| 366 | else |
| 367 | return false; |
| 368 | } |
| 369 | |
| 370 | static irqreturn_t ufshcd_intr(int irq, void *__hba); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 371 | static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba); |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 372 | static void ufshcd_async_scan(void *data, async_cookie_t cookie); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 373 | static int ufshcd_reset_and_restore(struct ufs_hba *hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 374 | static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 375 | static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag); |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 376 | static void ufshcd_hba_exit(struct ufs_hba *hba); |
| 377 | static int ufshcd_probe_hba(struct ufs_hba *hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 378 | static int ufshcd_enable_clocks(struct ufs_hba *hba); |
| 379 | static int ufshcd_disable_clocks(struct ufs_hba *hba, |
| 380 | bool is_gating_context); |
| 381 | static int ufshcd_disable_clocks_skip_ref_clk(struct ufs_hba *hba, |
| 382 | bool is_gating_context); |
Yaniv Gardi | 60f0187 | 2016-03-10 17:37:11 +0200 | [diff] [blame] | 383 | static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused); |
Yaniv Gardi | cad2e03 | 2015-03-31 17:37:14 +0300 | [diff] [blame] | 384 | static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 385 | static inline void ufshcd_save_tstamp_of_last_dme_cmd(struct ufs_hba *hba); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 386 | static int ufshcd_host_reset_and_restore(struct ufs_hba *hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 387 | static void ufshcd_resume_clkscaling(struct ufs_hba *hba); |
| 388 | static void ufshcd_suspend_clkscaling(struct ufs_hba *hba); |
| 389 | static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba); |
| 390 | static void ufshcd_release_all(struct ufs_hba *hba); |
| 391 | static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba); |
| 392 | static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 393 | static int ufshcd_devfreq_target(struct device *dev, |
| 394 | unsigned long *freq, u32 flags); |
| 395 | static int ufshcd_devfreq_get_dev_status(struct device *dev, |
| 396 | struct devfreq_dev_status *stat); |
| 397 | |
| 398 | #if IS_ENABLED(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND) |
| 399 | static struct devfreq_simple_ondemand_data ufshcd_ondemand_data = { |
| 400 | .upthreshold = 35, |
| 401 | .downdifferential = 30, |
| 402 | .simple_scaling = 1, |
| 403 | }; |
| 404 | |
| 405 | static void *gov_data = &ufshcd_ondemand_data; |
| 406 | #else |
| 407 | static void *gov_data; |
| 408 | #endif |
| 409 | |
| 410 | static struct devfreq_dev_profile ufs_devfreq_profile = { |
| 411 | .polling_ms = 40, |
| 412 | .target = ufshcd_devfreq_target, |
| 413 | .get_dev_status = ufshcd_devfreq_get_dev_status, |
| 414 | }; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 415 | |
Yaniv Gardi | 1449732 | 2016-02-01 15:02:39 +0200 | [diff] [blame] | 416 | static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag) |
| 417 | { |
| 418 | return tag >= 0 && tag < hba->nutrs; |
| 419 | } |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 420 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 421 | static inline void ufshcd_enable_irq(struct ufs_hba *hba) |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 422 | { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 423 | if (!hba->is_irq_enabled) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 424 | enable_irq(hba->irq); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 425 | hba->is_irq_enabled = true; |
| 426 | } |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 427 | } |
| 428 | |
| 429 | static inline void ufshcd_disable_irq(struct ufs_hba *hba) |
| 430 | { |
| 431 | if (hba->is_irq_enabled) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 432 | disable_irq(hba->irq); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 433 | hba->is_irq_enabled = false; |
| 434 | } |
| 435 | } |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 436 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 437 | void ufshcd_scsi_unblock_requests(struct ufs_hba *hba) |
| 438 | { |
| 439 | unsigned long flags; |
| 440 | bool unblock = false; |
| 441 | |
| 442 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 443 | hba->scsi_block_reqs_cnt--; |
| 444 | unblock = !hba->scsi_block_reqs_cnt; |
| 445 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 446 | if (unblock) |
| 447 | scsi_unblock_requests(hba->host); |
| 448 | } |
| 449 | EXPORT_SYMBOL(ufshcd_scsi_unblock_requests); |
| 450 | |
| 451 | static inline void __ufshcd_scsi_block_requests(struct ufs_hba *hba) |
| 452 | { |
| 453 | if (!hba->scsi_block_reqs_cnt++) |
| 454 | scsi_block_requests(hba->host); |
| 455 | } |
| 456 | |
| 457 | void ufshcd_scsi_block_requests(struct ufs_hba *hba) |
| 458 | { |
| 459 | unsigned long flags; |
| 460 | |
| 461 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 462 | __ufshcd_scsi_block_requests(hba); |
| 463 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 464 | } |
| 465 | EXPORT_SYMBOL(ufshcd_scsi_block_requests); |
| 466 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 467 | static int ufshcd_device_reset_ctrl(struct ufs_hba *hba, bool ctrl) |
| 468 | { |
| 469 | int ret = 0; |
| 470 | |
| 471 | if (!hba->pctrl) |
| 472 | return 0; |
| 473 | |
| 474 | /* Assert reset if ctrl == true */ |
| 475 | if (ctrl) |
| 476 | ret = pinctrl_select_state(hba->pctrl, |
| 477 | pinctrl_lookup_state(hba->pctrl, "dev-reset-assert")); |
| 478 | else |
| 479 | ret = pinctrl_select_state(hba->pctrl, |
| 480 | pinctrl_lookup_state(hba->pctrl, "dev-reset-deassert")); |
| 481 | |
| 482 | if (ret < 0) |
| 483 | dev_err(hba->dev, "%s: %s failed with err %d\n", |
| 484 | __func__, ctrl ? "Assert" : "Deassert", ret); |
| 485 | |
| 486 | return ret; |
| 487 | } |
| 488 | |
| 489 | static inline int ufshcd_assert_device_reset(struct ufs_hba *hba) |
| 490 | { |
| 491 | return ufshcd_device_reset_ctrl(hba, true); |
| 492 | } |
| 493 | |
| 494 | static inline int ufshcd_deassert_device_reset(struct ufs_hba *hba) |
| 495 | { |
| 496 | return ufshcd_device_reset_ctrl(hba, false); |
| 497 | } |
| 498 | |
| 499 | static int ufshcd_reset_device(struct ufs_hba *hba) |
| 500 | { |
| 501 | int ret; |
| 502 | |
| 503 | /* reset the connected UFS device */ |
| 504 | ret = ufshcd_assert_device_reset(hba); |
| 505 | if (ret) |
| 506 | goto out; |
| 507 | /* |
| 508 | * The reset signal is active low. |
| 509 | * The UFS device shall detect more than or equal to 1us of positive |
| 510 | * or negative RST_n pulse width. |
| 511 | * To be on safe side, keep the reset low for atleast 10us. |
| 512 | */ |
| 513 | usleep_range(10, 15); |
| 514 | |
| 515 | ret = ufshcd_deassert_device_reset(hba); |
| 516 | if (ret) |
| 517 | goto out; |
| 518 | /* same as assert, wait for atleast 10us after deassert */ |
| 519 | usleep_range(10, 15); |
| 520 | out: |
| 521 | return ret; |
| 522 | } |
| 523 | |
Yaniv Gardi | b573d48 | 2016-03-10 17:37:09 +0200 | [diff] [blame] | 524 | /* replace non-printable or non-ASCII characters with spaces */ |
| 525 | static inline void ufshcd_remove_non_printable(char *val) |
| 526 | { |
Subhash Jadavani | be09603 | 2017-03-23 12:55:25 -0700 | [diff] [blame] | 527 | if (!val || !*val) |
Yaniv Gardi | b573d48 | 2016-03-10 17:37:09 +0200 | [diff] [blame] | 528 | return; |
| 529 | |
| 530 | if (*val < 0x20 || *val > 0x7e) |
| 531 | *val = ' '; |
| 532 | } |
| 533 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 534 | #ifdef CONFIG_TRACEPOINTS |
| 535 | static void ufshcd_add_command_trace(struct ufs_hba *hba, |
| 536 | unsigned int tag, const char *str) |
| 537 | { |
| 538 | sector_t lba = -1; |
| 539 | u8 opcode = 0; |
| 540 | u32 intr, doorbell; |
| 541 | struct ufshcd_lrb *lrbp; |
| 542 | int transfer_len = -1; |
| 543 | |
| 544 | lrbp = &hba->lrb[tag]; |
| 545 | |
| 546 | if (lrbp->cmd) { /* data phase exists */ |
| 547 | opcode = (u8)(*lrbp->cmd->cmnd); |
| 548 | if ((opcode == READ_10) || (opcode == WRITE_10)) { |
| 549 | /* |
| 550 | * Currently we only fully trace read(10) and write(10) |
| 551 | * commands |
| 552 | */ |
| 553 | if (lrbp->cmd->request && lrbp->cmd->request->bio) |
| 554 | lba = |
| 555 | lrbp->cmd->request->bio->bi_iter.bi_sector; |
| 556 | transfer_len = be32_to_cpu( |
| 557 | lrbp->ucd_req_ptr->sc.exp_data_transfer_len); |
| 558 | } |
| 559 | } |
| 560 | |
| 561 | intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS); |
| 562 | doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL); |
| 563 | trace_ufshcd_command(dev_name(hba->dev), str, tag, |
| 564 | doorbell, transfer_len, intr, lba, opcode); |
| 565 | } |
| 566 | |
| 567 | static inline void ufshcd_cond_add_cmd_trace(struct ufs_hba *hba, |
| 568 | unsigned int tag, const char *str) |
| 569 | { |
| 570 | if (trace_ufshcd_command_enabled()) |
| 571 | ufshcd_add_command_trace(hba, tag, str); |
| 572 | } |
| 573 | #else |
| 574 | static inline void ufshcd_cond_add_cmd_trace(struct ufs_hba *hba, |
| 575 | unsigned int tag, const char *str) |
| 576 | { |
| 577 | } |
| 578 | #endif |
| 579 | |
| 580 | static void ufshcd_print_clk_freqs(struct ufs_hba *hba) |
| 581 | { |
| 582 | struct ufs_clk_info *clki; |
| 583 | struct list_head *head = &hba->clk_list_head; |
| 584 | |
| 585 | if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_CLK_FREQ_EN)) |
| 586 | return; |
| 587 | |
| 588 | if (!head || list_empty(head)) |
| 589 | return; |
| 590 | |
| 591 | list_for_each_entry(clki, head, list) { |
| 592 | if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq && |
| 593 | clki->max_freq) |
| 594 | dev_err(hba->dev, "clk: %s, rate: %u\n", |
| 595 | clki->name, clki->curr_freq); |
| 596 | } |
| 597 | } |
| 598 | |
| 599 | static void ufshcd_print_uic_err_hist(struct ufs_hba *hba, |
| 600 | struct ufs_uic_err_reg_hist *err_hist, char *err_name) |
| 601 | { |
| 602 | int i; |
| 603 | |
| 604 | if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_UIC_ERR_HIST_EN)) |
| 605 | return; |
| 606 | |
| 607 | for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) { |
| 608 | int p = (i + err_hist->pos - 1) % UIC_ERR_REG_HIST_LENGTH; |
| 609 | |
| 610 | if (err_hist->reg[p] == 0) |
| 611 | continue; |
| 612 | dev_err(hba->dev, "%s[%d] = 0x%x at %lld us", err_name, i, |
| 613 | err_hist->reg[p], ktime_to_us(err_hist->tstamp[p])); |
| 614 | } |
| 615 | } |
| 616 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 617 | static inline void __ufshcd_print_host_regs(struct ufs_hba *hba, bool no_sleep) |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 618 | { |
| 619 | if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_HOST_REGS_EN)) |
| 620 | return; |
| 621 | |
| 622 | /* |
| 623 | * hex_dump reads its data without the readl macro. This might |
| 624 | * cause inconsistency issues on some platform, as the printed |
| 625 | * values may be from cache and not the most recent value. |
| 626 | * To know whether you are looking at an un-cached version verify |
| 627 | * that IORESOURCE_MEM flag is on when xxx_get_resource() is invoked |
| 628 | * during platform/pci probe function. |
| 629 | */ |
Subhash Jadavani | 4386e02 | 2016-12-19 13:01:56 -0800 | [diff] [blame] | 630 | ufshcd_hex_dump(hba, "host regs", hba->mmio_base, |
| 631 | UFSHCI_REG_SPACE_SIZE); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 632 | dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x", |
| 633 | hba->ufs_version, hba->capabilities); |
| 634 | dev_err(hba->dev, |
| 635 | "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x", |
| 636 | (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks); |
| 637 | dev_err(hba->dev, |
| 638 | "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d", |
| 639 | ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp), |
| 640 | hba->ufs_stats.hibern8_exit_cnt); |
| 641 | |
| 642 | ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err"); |
| 643 | ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err"); |
| 644 | ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err"); |
| 645 | ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err"); |
| 646 | ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err"); |
| 647 | |
| 648 | ufshcd_print_clk_freqs(hba); |
| 649 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 650 | ufshcd_vops_dbg_register_dump(hba, no_sleep); |
| 651 | } |
| 652 | |
| 653 | static void ufshcd_print_host_regs(struct ufs_hba *hba) |
| 654 | { |
| 655 | __ufshcd_print_host_regs(hba, false); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 656 | } |
| 657 | |
| 658 | static |
| 659 | void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt) |
| 660 | { |
| 661 | struct ufshcd_lrb *lrbp; |
| 662 | int prdt_length; |
| 663 | int tag; |
| 664 | |
| 665 | if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_TRS_EN)) |
| 666 | return; |
| 667 | |
| 668 | for_each_set_bit(tag, &bitmap, hba->nutrs) { |
| 669 | lrbp = &hba->lrb[tag]; |
| 670 | |
| 671 | dev_err(hba->dev, "UPIU[%d] - issue time %lld us", |
| 672 | tag, ktime_to_us(lrbp->issue_time_stamp)); |
| 673 | dev_err(hba->dev, |
| 674 | "UPIU[%d] - Transfer Request Descriptor phys@0x%llx", |
| 675 | tag, (u64)lrbp->utrd_dma_addr); |
Subhash Jadavani | 4386e02 | 2016-12-19 13:01:56 -0800 | [diff] [blame] | 676 | ufshcd_hex_dump(hba, "UPIU TRD", lrbp->utr_descriptor_ptr, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 677 | sizeof(struct utp_transfer_req_desc)); |
| 678 | dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx", tag, |
| 679 | (u64)lrbp->ucd_req_dma_addr); |
Subhash Jadavani | 4386e02 | 2016-12-19 13:01:56 -0800 | [diff] [blame] | 680 | ufshcd_hex_dump(hba, "UPIU REQ", lrbp->ucd_req_ptr, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 681 | sizeof(struct utp_upiu_req)); |
| 682 | dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx", tag, |
| 683 | (u64)lrbp->ucd_rsp_dma_addr); |
Subhash Jadavani | 4386e02 | 2016-12-19 13:01:56 -0800 | [diff] [blame] | 684 | ufshcd_hex_dump(hba, "UPIU RSP", lrbp->ucd_rsp_ptr, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 685 | sizeof(struct utp_upiu_rsp)); |
| 686 | prdt_length = |
| 687 | le16_to_cpu(lrbp->utr_descriptor_ptr->prd_table_length); |
| 688 | dev_err(hba->dev, "UPIU[%d] - PRDT - %d entries phys@0x%llx", |
| 689 | tag, prdt_length, (u64)lrbp->ucd_prdt_dma_addr); |
| 690 | if (pr_prdt) |
Subhash Jadavani | 4386e02 | 2016-12-19 13:01:56 -0800 | [diff] [blame] | 691 | ufshcd_hex_dump(hba, "UPIU PRDT", lrbp->ucd_prdt_ptr, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 692 | sizeof(struct ufshcd_sg_entry) * prdt_length); |
| 693 | } |
| 694 | } |
| 695 | |
| 696 | static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap) |
| 697 | { |
| 698 | struct utp_task_req_desc *tmrdp; |
| 699 | int tag; |
| 700 | |
| 701 | if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_TMRS_EN)) |
| 702 | return; |
| 703 | |
| 704 | for_each_set_bit(tag, &bitmap, hba->nutmrs) { |
| 705 | tmrdp = &hba->utmrdl_base_addr[tag]; |
| 706 | dev_err(hba->dev, "TM[%d] - Task Management Header", tag); |
Subhash Jadavani | 4386e02 | 2016-12-19 13:01:56 -0800 | [diff] [blame] | 707 | ufshcd_hex_dump(hba, "TM TRD", &tmrdp->header, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 708 | sizeof(struct request_desc_header)); |
| 709 | dev_err(hba->dev, "TM[%d] - Task Management Request UPIU", |
| 710 | tag); |
Subhash Jadavani | 4386e02 | 2016-12-19 13:01:56 -0800 | [diff] [blame] | 711 | ufshcd_hex_dump(hba, "TM REQ", tmrdp->task_req_upiu, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 712 | sizeof(struct utp_upiu_req)); |
| 713 | dev_err(hba->dev, "TM[%d] - Task Management Response UPIU", |
| 714 | tag); |
Subhash Jadavani | 4386e02 | 2016-12-19 13:01:56 -0800 | [diff] [blame] | 715 | ufshcd_hex_dump(hba, "TM RSP", tmrdp->task_rsp_upiu, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 716 | sizeof(struct utp_task_req_desc)); |
| 717 | } |
| 718 | } |
| 719 | |
| 720 | static void ufshcd_print_host_state(struct ufs_hba *hba) |
| 721 | { |
| 722 | if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_HOST_STATE_EN)) |
| 723 | return; |
| 724 | |
| 725 | dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state); |
| 726 | dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n", |
| 727 | hba->lrb_in_use, hba->outstanding_tasks, hba->outstanding_reqs); |
| 728 | dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x, saved_ce_err=0x%x\n", |
| 729 | hba->saved_err, hba->saved_uic_err, hba->saved_ce_err); |
| 730 | dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n", |
| 731 | hba->curr_dev_pwr_mode, hba->uic_link_state); |
| 732 | dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n", |
| 733 | hba->pm_op_in_progress, hba->is_sys_suspended); |
| 734 | dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n", |
| 735 | hba->auto_bkops_enabled, hba->host->host_self_blocked); |
| 736 | dev_err(hba->dev, "Clk gate=%d, hibern8 on idle=%d\n", |
| 737 | hba->clk_gating.state, hba->hibern8_on_idle.state); |
| 738 | dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n", |
| 739 | hba->eh_flags, hba->req_abort_count); |
| 740 | dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n", |
| 741 | hba->capabilities, hba->caps); |
| 742 | dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks, |
Subhash Jadavani | 4f0df17b | 2016-12-16 13:19:27 -0800 | [diff] [blame] | 743 | hba->dev_info.quirks); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 744 | } |
| 745 | |
| 746 | /** |
| 747 | * ufshcd_print_pwr_info - print power params as saved in hba |
| 748 | * power info |
| 749 | * @hba: per-adapter instance |
| 750 | */ |
| 751 | static void ufshcd_print_pwr_info(struct ufs_hba *hba) |
| 752 | { |
| 753 | char *names[] = { |
| 754 | "INVALID MODE", |
| 755 | "FAST MODE", |
| 756 | "SLOW_MODE", |
| 757 | "INVALID MODE", |
| 758 | "FASTAUTO_MODE", |
| 759 | "SLOWAUTO_MODE", |
| 760 | "INVALID MODE", |
| 761 | }; |
| 762 | |
| 763 | if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_PWR_EN)) |
| 764 | return; |
| 765 | |
| 766 | dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n", |
| 767 | __func__, |
| 768 | hba->pwr_info.gear_rx, hba->pwr_info.gear_tx, |
| 769 | hba->pwr_info.lane_rx, hba->pwr_info.lane_tx, |
| 770 | names[hba->pwr_info.pwr_rx], |
| 771 | names[hba->pwr_info.pwr_tx], |
| 772 | hba->pwr_info.hs_rate); |
| 773 | } |
| 774 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 775 | /* |
| 776 | * ufshcd_wait_for_register - wait for register value to change |
| 777 | * @hba - per-adapter interface |
| 778 | * @reg - mmio register offset |
| 779 | * @mask - mask to apply to read register value |
| 780 | * @val - wait condition |
| 781 | * @interval_us - polling interval in microsecs |
| 782 | * @timeout_ms - timeout in millisecs |
Yaniv Gardi | 596585a | 2016-03-10 17:37:08 +0200 | [diff] [blame] | 783 | * @can_sleep - perform sleep or just spin |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 784 | * Returns -ETIMEDOUT on error, zero on success |
| 785 | */ |
Yaniv Gardi | 596585a | 2016-03-10 17:37:08 +0200 | [diff] [blame] | 786 | int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, |
| 787 | u32 val, unsigned long interval_us, |
| 788 | unsigned long timeout_ms, bool can_sleep) |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 789 | { |
| 790 | int err = 0; |
| 791 | unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); |
| 792 | |
| 793 | /* ignore bits that we don't intend to wait on */ |
| 794 | val = val & mask; |
| 795 | |
| 796 | while ((ufshcd_readl(hba, reg) & mask) != val) { |
Yaniv Gardi | 596585a | 2016-03-10 17:37:08 +0200 | [diff] [blame] | 797 | if (can_sleep) |
| 798 | usleep_range(interval_us, interval_us + 50); |
| 799 | else |
| 800 | udelay(interval_us); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 801 | if (time_after(jiffies, timeout)) { |
| 802 | if ((ufshcd_readl(hba, reg) & mask) != val) |
| 803 | err = -ETIMEDOUT; |
| 804 | break; |
| 805 | } |
| 806 | } |
| 807 | |
| 808 | return err; |
| 809 | } |
| 810 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 811 | /** |
Seungwon Jeon | 2fbd009 | 2013-06-26 22:39:27 +0530 | [diff] [blame] | 812 | * ufshcd_get_intr_mask - Get the interrupt bit mask |
| 813 | * @hba - Pointer to adapter instance |
| 814 | * |
| 815 | * Returns interrupt bit mask per version |
| 816 | */ |
| 817 | static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba) |
| 818 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 819 | u32 intr_mask = 0; |
| 820 | |
| 821 | switch (hba->ufs_version) { |
| 822 | case UFSHCI_VERSION_10: |
| 823 | intr_mask = INTERRUPT_MASK_ALL_VER_10; |
| 824 | break; |
| 825 | /* allow fall through */ |
| 826 | case UFSHCI_VERSION_11: |
| 827 | case UFSHCI_VERSION_20: |
| 828 | intr_mask = INTERRUPT_MASK_ALL_VER_11; |
| 829 | break; |
| 830 | /* allow fall through */ |
| 831 | case UFSHCI_VERSION_21: |
| 832 | default: |
| 833 | intr_mask = INTERRUPT_MASK_ALL_VER_21; |
| 834 | } |
| 835 | |
| 836 | if (!ufshcd_is_crypto_supported(hba)) |
| 837 | intr_mask &= ~CRYPTO_ENGINE_FATAL_ERROR; |
| 838 | |
| 839 | return intr_mask; |
Seungwon Jeon | 2fbd009 | 2013-06-26 22:39:27 +0530 | [diff] [blame] | 840 | } |
| 841 | |
| 842 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 843 | * ufshcd_get_ufs_version - Get the UFS version supported by the HBA |
| 844 | * @hba - Pointer to adapter instance |
| 845 | * |
| 846 | * Returns UFSHCI version supported by the controller |
| 847 | */ |
| 848 | static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba) |
| 849 | { |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 850 | if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION) |
| 851 | return ufshcd_vops_get_ufs_hci_version(hba); |
Yaniv Gardi | 9949e70 | 2015-05-17 18:55:05 +0300 | [diff] [blame] | 852 | |
Seungwon Jeon | b873a275 | 2013-06-26 22:39:26 +0530 | [diff] [blame] | 853 | return ufshcd_readl(hba, REG_UFS_VERSION); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 854 | } |
| 855 | |
| 856 | /** |
| 857 | * ufshcd_is_device_present - Check if any device connected to |
| 858 | * the host controller |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 859 | * @hba: pointer to adapter instance |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 860 | * |
Venkatraman S | 73ec513 | 2012-07-10 19:39:23 +0530 | [diff] [blame] | 861 | * Returns 1 if device present, 0 if no device detected |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 862 | */ |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 863 | static inline int ufshcd_is_device_present(struct ufs_hba *hba) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 864 | { |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 865 | return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & |
| 866 | DEVICE_PRESENT) ? 1 : 0; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 867 | } |
| 868 | |
| 869 | /** |
| 870 | * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status |
| 871 | * @lrb: pointer to local command reference block |
| 872 | * |
| 873 | * This function is used to get the OCS field from UTRD |
| 874 | * Returns the OCS field in the UTRD |
| 875 | */ |
| 876 | static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp) |
| 877 | { |
Sujit Reddy Thumma | e8c8e82 | 2014-05-26 10:59:10 +0530 | [diff] [blame] | 878 | return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 879 | } |
| 880 | |
| 881 | /** |
| 882 | * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status |
| 883 | * @task_req_descp: pointer to utp_task_req_desc structure |
| 884 | * |
| 885 | * This function is used to get the OCS field from UTMRD |
| 886 | * Returns the OCS field in the UTMRD |
| 887 | */ |
| 888 | static inline int |
| 889 | ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp) |
| 890 | { |
Sujit Reddy Thumma | e8c8e82 | 2014-05-26 10:59:10 +0530 | [diff] [blame] | 891 | return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 892 | } |
| 893 | |
| 894 | /** |
| 895 | * ufshcd_get_tm_free_slot - get a free slot for task management request |
| 896 | * @hba: per adapter instance |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 897 | * @free_slot: pointer to variable with available slot value |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 898 | * |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 899 | * Get a free tag and lock it until ufshcd_put_tm_slot() is called. |
| 900 | * Returns 0 if free slot is not available, else return 1 with tag value |
| 901 | * in @free_slot. |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 902 | */ |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 903 | static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 904 | { |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 905 | int tag; |
| 906 | bool ret = false; |
| 907 | |
| 908 | if (!free_slot) |
| 909 | goto out; |
| 910 | |
| 911 | do { |
| 912 | tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs); |
| 913 | if (tag >= hba->nutmrs) |
| 914 | goto out; |
| 915 | } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use)); |
| 916 | |
| 917 | *free_slot = tag; |
| 918 | ret = true; |
| 919 | out: |
| 920 | return ret; |
| 921 | } |
| 922 | |
| 923 | static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot) |
| 924 | { |
| 925 | clear_bit_unlock(slot, &hba->tm_slots_in_use); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 926 | } |
| 927 | |
| 928 | /** |
| 929 | * ufshcd_utrl_clear - Clear a bit in UTRLCLR register |
| 930 | * @hba: per adapter instance |
| 931 | * @pos: position of the bit to be cleared |
| 932 | */ |
| 933 | static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos) |
| 934 | { |
Seungwon Jeon | b873a275 | 2013-06-26 22:39:26 +0530 | [diff] [blame] | 935 | ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 936 | } |
| 937 | |
| 938 | /** |
Yaniv Gardi | a48353f | 2016-02-01 15:02:40 +0200 | [diff] [blame] | 939 | * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field |
| 940 | * @hba: per adapter instance |
| 941 | * @tag: position of the bit to be cleared |
| 942 | */ |
| 943 | static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag) |
| 944 | { |
| 945 | __clear_bit(tag, &hba->outstanding_reqs); |
| 946 | } |
| 947 | |
| 948 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 949 | * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY |
| 950 | * @reg: Register value of host controller status |
| 951 | * |
| 952 | * Returns integer, 0 on Success and positive value if failed |
| 953 | */ |
| 954 | static inline int ufshcd_get_lists_status(u32 reg) |
| 955 | { |
| 956 | /* |
| 957 | * The mask 0xFF is for the following HCS register bits |
| 958 | * Bit Description |
| 959 | * 0 Device Present |
| 960 | * 1 UTRLRDY |
| 961 | * 2 UTMRLRDY |
| 962 | * 3 UCRDY |
Yaniv Gardi | 897efe6 | 2016-02-01 15:02:48 +0200 | [diff] [blame] | 963 | * 4-7 reserved |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 964 | */ |
Yaniv Gardi | 897efe6 | 2016-02-01 15:02:48 +0200 | [diff] [blame] | 965 | return ((reg & 0xFF) >> 1) ^ 0x07; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 966 | } |
| 967 | |
| 968 | /** |
| 969 | * ufshcd_get_uic_cmd_result - Get the UIC command result |
| 970 | * @hba: Pointer to adapter instance |
| 971 | * |
| 972 | * This function gets the result of UIC command completion |
| 973 | * Returns 0 on success, non zero value on error |
| 974 | */ |
| 975 | static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba) |
| 976 | { |
Seungwon Jeon | b873a275 | 2013-06-26 22:39:26 +0530 | [diff] [blame] | 977 | return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) & |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 978 | MASK_UIC_COMMAND_RESULT; |
| 979 | } |
| 980 | |
| 981 | /** |
Seungwon Jeon | 12b4fdb | 2013-08-31 21:40:21 +0530 | [diff] [blame] | 982 | * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command |
| 983 | * @hba: Pointer to adapter instance |
| 984 | * |
| 985 | * This function gets UIC command argument3 |
| 986 | * Returns 0 on success, non zero value on error |
| 987 | */ |
| 988 | static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba) |
| 989 | { |
| 990 | return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3); |
| 991 | } |
| 992 | |
| 993 | /** |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 994 | * ufshcd_get_req_rsp - returns the TR response transaction type |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 995 | * @ucd_rsp_ptr: pointer to response UPIU |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 996 | */ |
| 997 | static inline int |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 998 | ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 999 | { |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 1000 | return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1001 | } |
| 1002 | |
| 1003 | /** |
| 1004 | * ufshcd_get_rsp_upiu_result - Get the result from response UPIU |
| 1005 | * @ucd_rsp_ptr: pointer to response UPIU |
| 1006 | * |
| 1007 | * This function gets the response status and scsi_status from response UPIU |
| 1008 | * Returns the response result code. |
| 1009 | */ |
| 1010 | static inline int |
| 1011 | ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr) |
| 1012 | { |
| 1013 | return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT; |
| 1014 | } |
| 1015 | |
Seungwon Jeon | 1c2623c | 2013-08-31 21:40:19 +0530 | [diff] [blame] | 1016 | /* |
| 1017 | * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length |
| 1018 | * from response UPIU |
| 1019 | * @ucd_rsp_ptr: pointer to response UPIU |
| 1020 | * |
| 1021 | * Return the data segment length. |
| 1022 | */ |
| 1023 | static inline unsigned int |
| 1024 | ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr) |
| 1025 | { |
| 1026 | return be32_to_cpu(ucd_rsp_ptr->header.dword_2) & |
| 1027 | MASK_RSP_UPIU_DATA_SEG_LEN; |
| 1028 | } |
| 1029 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1030 | /** |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 1031 | * ufshcd_is_exception_event - Check if the device raised an exception event |
| 1032 | * @ucd_rsp_ptr: pointer to response UPIU |
| 1033 | * |
| 1034 | * The function checks if the device raised an exception event indicated in |
| 1035 | * the Device Information field of response UPIU. |
| 1036 | * |
| 1037 | * Returns true if exception is raised, false otherwise. |
| 1038 | */ |
| 1039 | static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr) |
| 1040 | { |
| 1041 | return be32_to_cpu(ucd_rsp_ptr->header.dword_2) & |
| 1042 | MASK_RSP_EXCEPTION_EVENT ? true : false; |
| 1043 | } |
| 1044 | |
| 1045 | /** |
Seungwon Jeon | 7d56865 | 2013-08-31 21:40:20 +0530 | [diff] [blame] | 1046 | * ufshcd_reset_intr_aggr - Reset interrupt aggregation values. |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1047 | * @hba: per adapter instance |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1048 | */ |
| 1049 | static inline void |
Seungwon Jeon | 7d56865 | 2013-08-31 21:40:20 +0530 | [diff] [blame] | 1050 | ufshcd_reset_intr_aggr(struct ufs_hba *hba) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1051 | { |
Seungwon Jeon | 7d56865 | 2013-08-31 21:40:20 +0530 | [diff] [blame] | 1052 | ufshcd_writel(hba, INT_AGGR_ENABLE | |
| 1053 | INT_AGGR_COUNTER_AND_TIMER_RESET, |
| 1054 | REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL); |
| 1055 | } |
| 1056 | |
| 1057 | /** |
| 1058 | * ufshcd_config_intr_aggr - Configure interrupt aggregation values. |
| 1059 | * @hba: per adapter instance |
| 1060 | * @cnt: Interrupt aggregation counter threshold |
| 1061 | * @tmout: Interrupt aggregation timeout value |
| 1062 | */ |
| 1063 | static inline void |
| 1064 | ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout) |
| 1065 | { |
| 1066 | ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE | |
| 1067 | INT_AGGR_COUNTER_THLD_VAL(cnt) | |
| 1068 | INT_AGGR_TIMEOUT_VAL(tmout), |
| 1069 | REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1070 | } |
| 1071 | |
| 1072 | /** |
Yaniv Gardi | b852190 | 2015-05-17 18:54:57 +0300 | [diff] [blame] | 1073 | * ufshcd_disable_intr_aggr - Disables interrupt aggregation. |
| 1074 | * @hba: per adapter instance |
| 1075 | */ |
| 1076 | static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba) |
| 1077 | { |
| 1078 | ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL); |
| 1079 | } |
| 1080 | |
| 1081 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1082 | * ufshcd_enable_run_stop_reg - Enable run-stop registers, |
| 1083 | * When run-stop registers are set to 1, it indicates the |
| 1084 | * host controller that it can process the requests |
| 1085 | * @hba: per adapter instance |
| 1086 | */ |
| 1087 | static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba) |
| 1088 | { |
Seungwon Jeon | b873a275 | 2013-06-26 22:39:26 +0530 | [diff] [blame] | 1089 | ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT, |
| 1090 | REG_UTP_TASK_REQ_LIST_RUN_STOP); |
| 1091 | ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT, |
| 1092 | REG_UTP_TRANSFER_REQ_LIST_RUN_STOP); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1093 | } |
| 1094 | |
| 1095 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1096 | * ufshcd_hba_start - Start controller initialization sequence |
| 1097 | * @hba: per adapter instance |
| 1098 | */ |
| 1099 | static inline void ufshcd_hba_start(struct ufs_hba *hba) |
| 1100 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1101 | u32 val = CONTROLLER_ENABLE; |
| 1102 | |
| 1103 | if (ufshcd_is_crypto_supported(hba)) |
| 1104 | val |= CRYPTO_GENERAL_ENABLE; |
| 1105 | ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1106 | } |
| 1107 | |
| 1108 | /** |
| 1109 | * ufshcd_is_hba_active - Get controller state |
| 1110 | * @hba: per adapter instance |
| 1111 | * |
| 1112 | * Returns zero if controller is active, 1 otherwise |
| 1113 | */ |
| 1114 | static inline int ufshcd_is_hba_active(struct ufs_hba *hba) |
| 1115 | { |
Seungwon Jeon | b873a275 | 2013-06-26 22:39:26 +0530 | [diff] [blame] | 1116 | return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 1117 | } |
| 1118 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1119 | static const char *ufschd_uic_link_state_to_string( |
| 1120 | enum uic_link_state state) |
| 1121 | { |
| 1122 | switch (state) { |
| 1123 | case UIC_LINK_OFF_STATE: return "OFF"; |
| 1124 | case UIC_LINK_ACTIVE_STATE: return "ACTIVE"; |
| 1125 | case UIC_LINK_HIBERN8_STATE: return "HIBERN8"; |
| 1126 | default: return "UNKNOWN"; |
| 1127 | } |
| 1128 | } |
| 1129 | |
| 1130 | static const char *ufschd_ufs_dev_pwr_mode_to_string( |
| 1131 | enum ufs_dev_pwr_mode state) |
| 1132 | { |
| 1133 | switch (state) { |
| 1134 | case UFS_ACTIVE_PWR_MODE: return "ACTIVE"; |
| 1135 | case UFS_SLEEP_PWR_MODE: return "SLEEP"; |
| 1136 | case UFS_POWERDOWN_PWR_MODE: return "POWERDOWN"; |
| 1137 | default: return "UNKNOWN"; |
| 1138 | } |
| 1139 | } |
| 1140 | |
Yaniv Gardi | 3711310 | 2016-03-10 17:37:16 +0200 | [diff] [blame] | 1141 | u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba) |
| 1142 | { |
| 1143 | /* HCI version 1.0 and 1.1 supports UniPro 1.41 */ |
| 1144 | if ((hba->ufs_version == UFSHCI_VERSION_10) || |
| 1145 | (hba->ufs_version == UFSHCI_VERSION_11)) |
| 1146 | return UFS_UNIPRO_VER_1_41; |
| 1147 | else |
| 1148 | return UFS_UNIPRO_VER_1_6; |
| 1149 | } |
| 1150 | EXPORT_SYMBOL(ufshcd_get_local_unipro_ver); |
| 1151 | |
| 1152 | static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba) |
| 1153 | { |
| 1154 | /* |
| 1155 | * If both host and device support UniPro ver1.6 or later, PA layer |
| 1156 | * parameters tuning happens during link startup itself. |
| 1157 | * |
| 1158 | * We can manually tune PA layer parameters if either host or device |
| 1159 | * doesn't support UniPro ver 1.6 or later. But to keep manual tuning |
| 1160 | * logic simple, we will only do manual tuning if local unipro version |
| 1161 | * doesn't support ver1.6 or later. |
| 1162 | */ |
| 1163 | if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6) |
| 1164 | return true; |
| 1165 | else |
| 1166 | return false; |
| 1167 | } |
| 1168 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1169 | /** |
| 1170 | * ufshcd_set_clk_freq - set UFS controller clock frequencies |
| 1171 | * @hba: per adapter instance |
| 1172 | * @scale_up: If True, set max possible frequency othewise set low frequency |
| 1173 | * |
| 1174 | * Returns 0 if successful |
| 1175 | * Returns < 0 for any other errors |
| 1176 | */ |
| 1177 | static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up) |
| 1178 | { |
| 1179 | int ret = 0; |
| 1180 | struct ufs_clk_info *clki; |
| 1181 | struct list_head *head = &hba->clk_list_head; |
| 1182 | |
| 1183 | if (!head || list_empty(head)) |
| 1184 | goto out; |
| 1185 | |
| 1186 | list_for_each_entry(clki, head, list) { |
| 1187 | if (!IS_ERR_OR_NULL(clki->clk)) { |
| 1188 | if (scale_up && clki->max_freq) { |
| 1189 | if (clki->curr_freq == clki->max_freq) |
| 1190 | continue; |
| 1191 | |
| 1192 | ret = clk_set_rate(clki->clk, clki->max_freq); |
| 1193 | if (ret) { |
| 1194 | dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n", |
| 1195 | __func__, clki->name, |
| 1196 | clki->max_freq, ret); |
| 1197 | break; |
| 1198 | } |
| 1199 | trace_ufshcd_clk_scaling(dev_name(hba->dev), |
| 1200 | "scaled up", clki->name, |
| 1201 | clki->curr_freq, |
| 1202 | clki->max_freq); |
| 1203 | clki->curr_freq = clki->max_freq; |
| 1204 | |
| 1205 | } else if (!scale_up && clki->min_freq) { |
| 1206 | if (clki->curr_freq == clki->min_freq) |
| 1207 | continue; |
| 1208 | |
| 1209 | ret = clk_set_rate(clki->clk, clki->min_freq); |
| 1210 | if (ret) { |
| 1211 | dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n", |
| 1212 | __func__, clki->name, |
| 1213 | clki->min_freq, ret); |
| 1214 | break; |
| 1215 | } |
| 1216 | trace_ufshcd_clk_scaling(dev_name(hba->dev), |
| 1217 | "scaled down", clki->name, |
| 1218 | clki->curr_freq, |
| 1219 | clki->min_freq); |
| 1220 | clki->curr_freq = clki->min_freq; |
| 1221 | } |
| 1222 | } |
| 1223 | dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__, |
| 1224 | clki->name, clk_get_rate(clki->clk)); |
| 1225 | } |
| 1226 | |
| 1227 | out: |
| 1228 | return ret; |
| 1229 | } |
| 1230 | |
| 1231 | /** |
| 1232 | * ufshcd_scale_clks - scale up or scale down UFS controller clocks |
| 1233 | * @hba: per adapter instance |
| 1234 | * @scale_up: True if scaling up and false if scaling down |
| 1235 | * |
| 1236 | * Returns 0 if successful |
| 1237 | * Returns < 0 for any other errors |
| 1238 | */ |
| 1239 | static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up) |
| 1240 | { |
| 1241 | int ret = 0; |
| 1242 | |
| 1243 | ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE); |
| 1244 | if (ret) |
| 1245 | return ret; |
| 1246 | |
| 1247 | ret = ufshcd_set_clk_freq(hba, scale_up); |
| 1248 | if (ret) |
| 1249 | return ret; |
| 1250 | |
| 1251 | ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE); |
| 1252 | if (ret) { |
| 1253 | ufshcd_set_clk_freq(hba, !scale_up); |
| 1254 | return ret; |
| 1255 | } |
| 1256 | |
| 1257 | return ret; |
| 1258 | } |
| 1259 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1260 | static inline void ufshcd_cancel_gate_work(struct ufs_hba *hba) |
| 1261 | { |
| 1262 | hrtimer_cancel(&hba->clk_gating.gate_hrtimer); |
| 1263 | cancel_work_sync(&hba->clk_gating.gate_work); |
| 1264 | } |
| 1265 | |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1266 | static void ufshcd_ungate_work(struct work_struct *work) |
| 1267 | { |
| 1268 | int ret; |
| 1269 | unsigned long flags; |
| 1270 | struct ufs_hba *hba = container_of(work, struct ufs_hba, |
| 1271 | clk_gating.ungate_work); |
| 1272 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1273 | ufshcd_cancel_gate_work(hba); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1274 | |
| 1275 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1276 | if (hba->clk_gating.state == CLKS_ON) { |
| 1277 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1278 | goto unblock_reqs; |
| 1279 | } |
| 1280 | |
| 1281 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1282 | ufshcd_hba_vreg_set_hpm(hba); |
| 1283 | ufshcd_enable_clocks(hba); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1284 | |
| 1285 | /* Exit from hibern8 */ |
| 1286 | if (ufshcd_can_hibern8_during_gating(hba)) { |
| 1287 | /* Prevent gating in this path */ |
| 1288 | hba->clk_gating.is_suspended = true; |
| 1289 | if (ufshcd_is_link_hibern8(hba)) { |
| 1290 | ret = ufshcd_uic_hibern8_exit(hba); |
| 1291 | if (ret) |
| 1292 | dev_err(hba->dev, "%s: hibern8 exit failed %d\n", |
| 1293 | __func__, ret); |
| 1294 | else |
| 1295 | ufshcd_set_link_active(hba); |
| 1296 | } |
| 1297 | hba->clk_gating.is_suspended = false; |
| 1298 | } |
| 1299 | unblock_reqs: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1300 | ufshcd_scsi_unblock_requests(hba); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1301 | } |
| 1302 | |
| 1303 | /** |
| 1304 | * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release. |
| 1305 | * Also, exit from hibern8 mode and set the link as active. |
| 1306 | * @hba: per adapter instance |
| 1307 | * @async: This indicates whether caller should ungate clocks asynchronously. |
| 1308 | */ |
| 1309 | int ufshcd_hold(struct ufs_hba *hba, bool async) |
| 1310 | { |
| 1311 | int rc = 0; |
| 1312 | unsigned long flags; |
| 1313 | |
| 1314 | if (!ufshcd_is_clkgating_allowed(hba)) |
| 1315 | goto out; |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1316 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1317 | hba->clk_gating.active_reqs++; |
| 1318 | |
Yaniv Gardi | 53c12d0 | 2016-02-01 15:02:45 +0200 | [diff] [blame] | 1319 | if (ufshcd_eh_in_progress(hba)) { |
| 1320 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1321 | return 0; |
| 1322 | } |
| 1323 | |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 1324 | start: |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1325 | switch (hba->clk_gating.state) { |
| 1326 | case CLKS_ON: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1327 | /* |
| 1328 | * Wait for the ungate work to complete if in progress. |
| 1329 | * Though the clocks may be in ON state, the link could |
| 1330 | * still be in hibner8 state if hibern8 is allowed |
| 1331 | * during clock gating. |
| 1332 | * Make sure we exit hibern8 state also in addition to |
| 1333 | * clocks being ON. |
| 1334 | */ |
| 1335 | if (ufshcd_can_hibern8_during_gating(hba) && |
| 1336 | ufshcd_is_link_hibern8(hba)) { |
| 1337 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1338 | flush_work(&hba->clk_gating.ungate_work); |
| 1339 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1340 | goto start; |
| 1341 | } |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1342 | break; |
| 1343 | case REQ_CLKS_OFF: |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1344 | /* |
| 1345 | * If the timer was active but the callback was not running |
| 1346 | * we have nothing to do, just change state and return. |
| 1347 | */ |
| 1348 | if (hrtimer_try_to_cancel(&hba->clk_gating.gate_hrtimer) == 1) { |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1349 | hba->clk_gating.state = CLKS_ON; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1350 | trace_ufshcd_clk_gating(dev_name(hba->dev), |
| 1351 | hba->clk_gating.state); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1352 | break; |
| 1353 | } |
| 1354 | /* |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1355 | * If we are here, it means gating work is either done or |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1356 | * currently running. Hence, fall through to cancel gating |
| 1357 | * work and to enable clocks. |
| 1358 | */ |
| 1359 | case CLKS_OFF: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1360 | __ufshcd_scsi_block_requests(hba); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1361 | hba->clk_gating.state = REQ_CLKS_ON; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1362 | trace_ufshcd_clk_gating(dev_name(hba->dev), |
| 1363 | hba->clk_gating.state); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1364 | queue_work(hba->clk_gating.ungating_workq, |
| 1365 | &hba->clk_gating.ungate_work); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1366 | /* |
| 1367 | * fall through to check if we should wait for this |
| 1368 | * work to be done or not. |
| 1369 | */ |
| 1370 | case REQ_CLKS_ON: |
| 1371 | if (async) { |
| 1372 | rc = -EAGAIN; |
| 1373 | hba->clk_gating.active_reqs--; |
| 1374 | break; |
| 1375 | } |
| 1376 | |
| 1377 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1378 | flush_work(&hba->clk_gating.ungate_work); |
| 1379 | /* Make sure state is CLKS_ON before returning */ |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 1380 | spin_lock_irqsave(hba->host->host_lock, flags); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1381 | goto start; |
| 1382 | default: |
| 1383 | dev_err(hba->dev, "%s: clk gating is in invalid state %d\n", |
| 1384 | __func__, hba->clk_gating.state); |
| 1385 | break; |
| 1386 | } |
| 1387 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1388 | out: |
| 1389 | return rc; |
| 1390 | } |
Yaniv Gardi | 6e3fd44 | 2015-10-28 13:15:50 +0200 | [diff] [blame] | 1391 | EXPORT_SYMBOL_GPL(ufshcd_hold); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1392 | |
| 1393 | static void ufshcd_gate_work(struct work_struct *work) |
| 1394 | { |
| 1395 | struct ufs_hba *hba = container_of(work, struct ufs_hba, |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1396 | clk_gating.gate_work); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1397 | unsigned long flags; |
| 1398 | |
| 1399 | spin_lock_irqsave(hba->host->host_lock, flags); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1400 | /* |
| 1401 | * In case you are here to cancel this work the gating state |
| 1402 | * would be marked as REQ_CLKS_ON. In this case save time by |
| 1403 | * skipping the gating work and exit after changing the clock |
| 1404 | * state to CLKS_ON. |
| 1405 | */ |
| 1406 | if (hba->clk_gating.is_suspended || |
| 1407 | (hba->clk_gating.state == REQ_CLKS_ON)) { |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1408 | hba->clk_gating.state = CLKS_ON; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1409 | trace_ufshcd_clk_gating(dev_name(hba->dev), |
| 1410 | hba->clk_gating.state); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1411 | goto rel_lock; |
| 1412 | } |
| 1413 | |
| 1414 | if (hba->clk_gating.active_reqs |
| 1415 | || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL |
| 1416 | || hba->lrb_in_use || hba->outstanding_tasks |
| 1417 | || hba->active_uic_cmd || hba->uic_async_done) |
| 1418 | goto rel_lock; |
| 1419 | |
| 1420 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1421 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1422 | if (ufshcd_is_hibern8_on_idle_allowed(hba) && |
| 1423 | hba->hibern8_on_idle.is_enabled) |
| 1424 | /* |
| 1425 | * Hibern8 enter work (on Idle) needs clocks to be ON hence |
| 1426 | * make sure that it is flushed before turning off the clocks. |
| 1427 | */ |
| 1428 | flush_delayed_work(&hba->hibern8_on_idle.enter_work); |
| 1429 | |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1430 | /* put the link into hibern8 mode before turning off clocks */ |
| 1431 | if (ufshcd_can_hibern8_during_gating(hba)) { |
| 1432 | if (ufshcd_uic_hibern8_enter(hba)) { |
| 1433 | hba->clk_gating.state = CLKS_ON; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1434 | trace_ufshcd_clk_gating(dev_name(hba->dev), |
| 1435 | hba->clk_gating.state); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1436 | goto out; |
| 1437 | } |
| 1438 | ufshcd_set_link_hibern8(hba); |
| 1439 | } |
| 1440 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1441 | /* |
| 1442 | * If auto hibern8 is supported then the link will already |
| 1443 | * be in hibern8 state and the ref clock can be gated. |
| 1444 | */ |
| 1445 | if ((ufshcd_is_auto_hibern8_supported(hba) || |
| 1446 | !ufshcd_is_link_active(hba)) && !hba->no_ref_clk_gating) |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1447 | ufshcd_disable_clocks(hba, true); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1448 | else |
| 1449 | /* If link is active, device ref_clk can't be switched off */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1450 | ufshcd_disable_clocks_skip_ref_clk(hba, true); |
| 1451 | |
| 1452 | /* Put the host controller in low power mode if possible */ |
| 1453 | ufshcd_hba_vreg_set_lpm(hba); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1454 | |
| 1455 | /* |
| 1456 | * In case you are here to cancel this work the gating state |
| 1457 | * would be marked as REQ_CLKS_ON. In this case keep the state |
| 1458 | * as REQ_CLKS_ON which would anyway imply that clocks are off |
| 1459 | * and a request to turn them on is pending. By doing this way, |
| 1460 | * we keep the state machine in tact and this would ultimately |
| 1461 | * prevent from doing cancel work multiple times when there are |
| 1462 | * new requests arriving before the current cancel work is done. |
| 1463 | */ |
| 1464 | spin_lock_irqsave(hba->host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1465 | if (hba->clk_gating.state == REQ_CLKS_OFF) { |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1466 | hba->clk_gating.state = CLKS_OFF; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1467 | trace_ufshcd_clk_gating(dev_name(hba->dev), |
| 1468 | hba->clk_gating.state); |
| 1469 | } |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1470 | rel_lock: |
| 1471 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1472 | out: |
| 1473 | return; |
| 1474 | } |
| 1475 | |
| 1476 | /* host lock must be held before calling this variant */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1477 | static void __ufshcd_release(struct ufs_hba *hba, bool no_sched) |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1478 | { |
| 1479 | if (!ufshcd_is_clkgating_allowed(hba)) |
| 1480 | return; |
| 1481 | |
| 1482 | hba->clk_gating.active_reqs--; |
| 1483 | |
| 1484 | if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended |
| 1485 | || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL |
| 1486 | || hba->lrb_in_use || hba->outstanding_tasks |
Yaniv Gardi | 53c12d0 | 2016-02-01 15:02:45 +0200 | [diff] [blame] | 1487 | || hba->active_uic_cmd || hba->uic_async_done |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1488 | || ufshcd_eh_in_progress(hba) || no_sched) |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1489 | return; |
| 1490 | |
| 1491 | hba->clk_gating.state = REQ_CLKS_OFF; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1492 | trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state); |
| 1493 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1494 | hrtimer_start(&hba->clk_gating.gate_hrtimer, |
| 1495 | ms_to_ktime(hba->clk_gating.delay_ms), |
| 1496 | HRTIMER_MODE_REL); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1497 | } |
| 1498 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1499 | void ufshcd_release(struct ufs_hba *hba, bool no_sched) |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1500 | { |
| 1501 | unsigned long flags; |
| 1502 | |
| 1503 | spin_lock_irqsave(hba->host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1504 | __ufshcd_release(hba, no_sched); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1505 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1506 | } |
Yaniv Gardi | 6e3fd44 | 2015-10-28 13:15:50 +0200 | [diff] [blame] | 1507 | EXPORT_SYMBOL_GPL(ufshcd_release); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1508 | |
| 1509 | static ssize_t ufshcd_clkgate_delay_show(struct device *dev, |
| 1510 | struct device_attribute *attr, char *buf) |
| 1511 | { |
| 1512 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1513 | |
| 1514 | return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms); |
| 1515 | } |
| 1516 | |
| 1517 | static ssize_t ufshcd_clkgate_delay_store(struct device *dev, |
| 1518 | struct device_attribute *attr, const char *buf, size_t count) |
| 1519 | { |
| 1520 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1521 | unsigned long flags, value; |
| 1522 | |
| 1523 | if (kstrtoul(buf, 0, &value)) |
| 1524 | return -EINVAL; |
| 1525 | |
| 1526 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1527 | hba->clk_gating.delay_ms = value; |
| 1528 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1529 | return count; |
| 1530 | } |
| 1531 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1532 | static ssize_t ufshcd_clkgate_delay_pwr_save_show(struct device *dev, |
| 1533 | struct device_attribute *attr, char *buf) |
| 1534 | { |
| 1535 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1536 | |
| 1537 | return snprintf(buf, PAGE_SIZE, "%lu\n", |
| 1538 | hba->clk_gating.delay_ms_pwr_save); |
| 1539 | } |
| 1540 | |
| 1541 | static ssize_t ufshcd_clkgate_delay_pwr_save_store(struct device *dev, |
| 1542 | struct device_attribute *attr, const char *buf, size_t count) |
| 1543 | { |
| 1544 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1545 | unsigned long flags, value; |
| 1546 | |
| 1547 | if (kstrtoul(buf, 0, &value)) |
| 1548 | return -EINVAL; |
| 1549 | |
| 1550 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1551 | |
| 1552 | hba->clk_gating.delay_ms_pwr_save = value; |
| 1553 | if (ufshcd_is_clkscaling_supported(hba) && |
| 1554 | !hba->clk_scaling.is_scaled_up) |
| 1555 | hba->clk_gating.delay_ms = hba->clk_gating.delay_ms_pwr_save; |
| 1556 | |
| 1557 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1558 | return count; |
| 1559 | } |
| 1560 | |
| 1561 | static ssize_t ufshcd_clkgate_delay_perf_show(struct device *dev, |
| 1562 | struct device_attribute *attr, char *buf) |
| 1563 | { |
| 1564 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1565 | |
| 1566 | return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms_perf); |
| 1567 | } |
| 1568 | |
| 1569 | static ssize_t ufshcd_clkgate_delay_perf_store(struct device *dev, |
| 1570 | struct device_attribute *attr, const char *buf, size_t count) |
| 1571 | { |
| 1572 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1573 | unsigned long flags, value; |
| 1574 | |
| 1575 | if (kstrtoul(buf, 0, &value)) |
| 1576 | return -EINVAL; |
| 1577 | |
| 1578 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1579 | |
| 1580 | hba->clk_gating.delay_ms_perf = value; |
| 1581 | if (ufshcd_is_clkscaling_supported(hba) && |
| 1582 | hba->clk_scaling.is_scaled_up) |
| 1583 | hba->clk_gating.delay_ms = hba->clk_gating.delay_ms_perf; |
| 1584 | |
| 1585 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1586 | return count; |
| 1587 | } |
| 1588 | |
| 1589 | static ssize_t ufshcd_clkgate_enable_show(struct device *dev, |
| 1590 | struct device_attribute *attr, char *buf) |
| 1591 | { |
| 1592 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1593 | |
| 1594 | return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled); |
| 1595 | } |
| 1596 | |
| 1597 | static ssize_t ufshcd_clkgate_enable_store(struct device *dev, |
| 1598 | struct device_attribute *attr, const char *buf, size_t count) |
| 1599 | { |
| 1600 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1601 | unsigned long flags; |
| 1602 | u32 value; |
| 1603 | |
| 1604 | if (kstrtou32(buf, 0, &value)) |
| 1605 | return -EINVAL; |
| 1606 | |
| 1607 | value = !!value; |
| 1608 | if (value == hba->clk_gating.is_enabled) |
| 1609 | goto out; |
| 1610 | |
| 1611 | if (value) { |
| 1612 | ufshcd_release(hba, false); |
| 1613 | } else { |
| 1614 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1615 | hba->clk_gating.active_reqs++; |
| 1616 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1617 | } |
| 1618 | |
| 1619 | hba->clk_gating.is_enabled = value; |
| 1620 | out: |
| 1621 | return count; |
| 1622 | } |
| 1623 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1624 | static enum hrtimer_restart ufshcd_clkgate_hrtimer_handler( |
| 1625 | struct hrtimer *timer) |
| 1626 | { |
| 1627 | struct ufs_hba *hba = container_of(timer, struct ufs_hba, |
| 1628 | clk_gating.gate_hrtimer); |
| 1629 | |
| 1630 | schedule_work(&hba->clk_gating.gate_work); |
| 1631 | |
| 1632 | return HRTIMER_NORESTART; |
| 1633 | } |
| 1634 | |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1635 | static void ufshcd_init_clk_gating(struct ufs_hba *hba) |
| 1636 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1637 | struct ufs_clk_gating *gating = &hba->clk_gating; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1638 | char wq_name[sizeof("ufs_clk_ungating_00")]; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1639 | |
| 1640 | hba->clk_gating.state = CLKS_ON; |
| 1641 | |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1642 | if (!ufshcd_is_clkgating_allowed(hba)) |
| 1643 | return; |
| 1644 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1645 | /* |
| 1646 | * Disable hibern8 during clk gating if |
| 1647 | * auto hibern8 is supported |
| 1648 | */ |
| 1649 | if (ufshcd_is_auto_hibern8_supported(hba)) |
| 1650 | hba->caps &= ~UFSHCD_CAP_HIBERN8_WITH_CLK_GATING; |
| 1651 | |
| 1652 | INIT_WORK(&gating->gate_work, ufshcd_gate_work); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1653 | INIT_WORK(&gating->ungate_work, ufshcd_ungate_work); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1654 | /* |
| 1655 | * Clock gating work must be executed only after auto hibern8 |
| 1656 | * timeout has expired in the hardware or after aggressive |
| 1657 | * hibern8 on idle software timeout. Using jiffy based low |
| 1658 | * resolution delayed work is not reliable to guarantee this, |
| 1659 | * hence use a high resolution timer to make sure we schedule |
| 1660 | * the gate work precisely more than hibern8 timeout. |
| 1661 | * |
| 1662 | * Always make sure gating->delay_ms > hibern8_on_idle->delay_ms |
| 1663 | */ |
| 1664 | hrtimer_init(&gating->gate_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
| 1665 | gating->gate_hrtimer.function = ufshcd_clkgate_hrtimer_handler; |
| 1666 | |
| 1667 | snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_ungating_%d", |
| 1668 | hba->host->host_no); |
| 1669 | hba->clk_gating.ungating_workq = create_singlethread_workqueue(wq_name); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1670 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1671 | gating->is_enabled = true; |
| 1672 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1673 | gating->delay_ms_pwr_save = UFSHCD_CLK_GATING_DELAY_MS_PWR_SAVE; |
| 1674 | gating->delay_ms_perf = UFSHCD_CLK_GATING_DELAY_MS_PERF; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1675 | |
| 1676 | /* start with performance mode */ |
| 1677 | gating->delay_ms = gating->delay_ms_perf; |
| 1678 | |
| 1679 | if (!ufshcd_is_clkscaling_supported(hba)) |
| 1680 | goto scaling_not_supported; |
| 1681 | |
| 1682 | gating->delay_pwr_save_attr.show = ufshcd_clkgate_delay_pwr_save_show; |
| 1683 | gating->delay_pwr_save_attr.store = ufshcd_clkgate_delay_pwr_save_store; |
| 1684 | sysfs_attr_init(&gating->delay_pwr_save_attr.attr); |
| 1685 | gating->delay_pwr_save_attr.attr.name = "clkgate_delay_ms_pwr_save"; |
| 1686 | gating->delay_pwr_save_attr.attr.mode = S_IRUGO | S_IWUSR; |
| 1687 | if (device_create_file(hba->dev, &gating->delay_pwr_save_attr)) |
| 1688 | dev_err(hba->dev, "Failed to create sysfs for clkgate_delay_ms_pwr_save\n"); |
| 1689 | |
| 1690 | gating->delay_perf_attr.show = ufshcd_clkgate_delay_perf_show; |
| 1691 | gating->delay_perf_attr.store = ufshcd_clkgate_delay_perf_store; |
| 1692 | sysfs_attr_init(&gating->delay_perf_attr.attr); |
| 1693 | gating->delay_perf_attr.attr.name = "clkgate_delay_ms_perf"; |
| 1694 | gating->delay_perf_attr.attr.mode = S_IRUGO | S_IWUSR; |
| 1695 | if (device_create_file(hba->dev, &gating->delay_perf_attr)) |
| 1696 | dev_err(hba->dev, "Failed to create sysfs for clkgate_delay_ms_perf\n"); |
| 1697 | |
| 1698 | goto add_clkgate_enable; |
| 1699 | |
| 1700 | scaling_not_supported: |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1701 | hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show; |
| 1702 | hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store; |
| 1703 | sysfs_attr_init(&hba->clk_gating.delay_attr.attr); |
| 1704 | hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms"; |
| 1705 | hba->clk_gating.delay_attr.attr.mode = S_IRUGO | S_IWUSR; |
| 1706 | if (device_create_file(hba->dev, &hba->clk_gating.delay_attr)) |
| 1707 | dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n"); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1708 | |
| 1709 | add_clkgate_enable: |
| 1710 | gating->enable_attr.show = ufshcd_clkgate_enable_show; |
| 1711 | gating->enable_attr.store = ufshcd_clkgate_enable_store; |
| 1712 | sysfs_attr_init(&gating->enable_attr.attr); |
| 1713 | gating->enable_attr.attr.name = "clkgate_enable"; |
| 1714 | gating->enable_attr.attr.mode = S_IRUGO | S_IWUSR; |
| 1715 | if (device_create_file(hba->dev, &gating->enable_attr)) |
| 1716 | dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n"); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1717 | } |
| 1718 | |
| 1719 | static void ufshcd_exit_clk_gating(struct ufs_hba *hba) |
| 1720 | { |
| 1721 | if (!ufshcd_is_clkgating_allowed(hba)) |
| 1722 | return; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1723 | if (ufshcd_is_clkscaling_supported(hba)) { |
| 1724 | device_remove_file(hba->dev, |
| 1725 | &hba->clk_gating.delay_pwr_save_attr); |
| 1726 | device_remove_file(hba->dev, &hba->clk_gating.delay_perf_attr); |
| 1727 | } else { |
| 1728 | device_remove_file(hba->dev, &hba->clk_gating.delay_attr); |
| 1729 | } |
| 1730 | device_remove_file(hba->dev, &hba->clk_gating.enable_attr); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1731 | ufshcd_cancel_gate_work(hba); |
Akinobu Mita | 97cd680 | 2014-11-24 14:24:18 +0900 | [diff] [blame] | 1732 | cancel_work_sync(&hba->clk_gating.ungate_work); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 1733 | destroy_workqueue(hba->clk_gating.ungating_workq); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 1734 | } |
| 1735 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 1736 | static void ufshcd_set_auto_hibern8_timer(struct ufs_hba *hba, u32 delay) |
| 1737 | { |
| 1738 | ufshcd_rmwl(hba, AUTO_HIBERN8_TIMER_SCALE_MASK | |
| 1739 | AUTO_HIBERN8_IDLE_TIMER_MASK, |
| 1740 | AUTO_HIBERN8_TIMER_SCALE_1_MS | delay, |
| 1741 | REG_AUTO_HIBERN8_IDLE_TIMER); |
| 1742 | /* Make sure the timer gets applied before further operations */ |
| 1743 | mb(); |
| 1744 | } |
| 1745 | |
| 1746 | /** |
| 1747 | * ufshcd_hibern8_hold - Make sure that link is not in hibern8. |
| 1748 | * |
| 1749 | * @hba: per adapter instance |
| 1750 | * @async: This indicates whether caller wants to exit hibern8 asynchronously. |
| 1751 | * |
| 1752 | * Exit from hibern8 mode and set the link as active. |
| 1753 | * |
| 1754 | * Return 0 on success, non-zero on failure. |
| 1755 | */ |
| 1756 | static int ufshcd_hibern8_hold(struct ufs_hba *hba, bool async) |
| 1757 | { |
| 1758 | int rc = 0; |
| 1759 | unsigned long flags; |
| 1760 | |
| 1761 | if (!ufshcd_is_hibern8_on_idle_allowed(hba)) |
| 1762 | goto out; |
| 1763 | |
| 1764 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1765 | hba->hibern8_on_idle.active_reqs++; |
| 1766 | |
| 1767 | if (ufshcd_eh_in_progress(hba)) { |
| 1768 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1769 | return 0; |
| 1770 | } |
| 1771 | |
| 1772 | start: |
| 1773 | switch (hba->hibern8_on_idle.state) { |
| 1774 | case HIBERN8_EXITED: |
| 1775 | break; |
| 1776 | case REQ_HIBERN8_ENTER: |
| 1777 | if (cancel_delayed_work(&hba->hibern8_on_idle.enter_work)) { |
| 1778 | hba->hibern8_on_idle.state = HIBERN8_EXITED; |
| 1779 | trace_ufshcd_hibern8_on_idle(dev_name(hba->dev), |
| 1780 | hba->hibern8_on_idle.state); |
| 1781 | break; |
| 1782 | } |
| 1783 | /* |
| 1784 | * If we here, it means Hibern8 enter work is either done or |
| 1785 | * currently running. Hence, fall through to cancel hibern8 |
| 1786 | * work and exit hibern8. |
| 1787 | */ |
| 1788 | case HIBERN8_ENTERED: |
| 1789 | __ufshcd_scsi_block_requests(hba); |
| 1790 | hba->hibern8_on_idle.state = REQ_HIBERN8_EXIT; |
| 1791 | trace_ufshcd_hibern8_on_idle(dev_name(hba->dev), |
| 1792 | hba->hibern8_on_idle.state); |
| 1793 | schedule_work(&hba->hibern8_on_idle.exit_work); |
| 1794 | /* |
| 1795 | * fall through to check if we should wait for this |
| 1796 | * work to be done or not. |
| 1797 | */ |
| 1798 | case REQ_HIBERN8_EXIT: |
| 1799 | if (async) { |
| 1800 | rc = -EAGAIN; |
| 1801 | hba->hibern8_on_idle.active_reqs--; |
| 1802 | break; |
| 1803 | } else { |
| 1804 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1805 | flush_work(&hba->hibern8_on_idle.exit_work); |
| 1806 | /* Make sure state is HIBERN8_EXITED before returning */ |
| 1807 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1808 | goto start; |
| 1809 | } |
| 1810 | default: |
| 1811 | dev_err(hba->dev, "%s: H8 is in invalid state %d\n", |
| 1812 | __func__, hba->hibern8_on_idle.state); |
| 1813 | break; |
| 1814 | } |
| 1815 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1816 | out: |
| 1817 | return rc; |
| 1818 | } |
| 1819 | |
| 1820 | /* host lock must be held before calling this variant */ |
| 1821 | static void __ufshcd_hibern8_release(struct ufs_hba *hba, bool no_sched) |
| 1822 | { |
| 1823 | unsigned long delay_in_jiffies; |
| 1824 | |
| 1825 | if (!ufshcd_is_hibern8_on_idle_allowed(hba)) |
| 1826 | return; |
| 1827 | |
| 1828 | hba->hibern8_on_idle.active_reqs--; |
| 1829 | BUG_ON(hba->hibern8_on_idle.active_reqs < 0); |
| 1830 | |
| 1831 | if (hba->hibern8_on_idle.active_reqs |
| 1832 | || hba->hibern8_on_idle.is_suspended |
| 1833 | || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL |
| 1834 | || hba->lrb_in_use || hba->outstanding_tasks |
| 1835 | || hba->active_uic_cmd || hba->uic_async_done |
| 1836 | || ufshcd_eh_in_progress(hba) || no_sched) |
| 1837 | return; |
| 1838 | |
| 1839 | hba->hibern8_on_idle.state = REQ_HIBERN8_ENTER; |
| 1840 | trace_ufshcd_hibern8_on_idle(dev_name(hba->dev), |
| 1841 | hba->hibern8_on_idle.state); |
| 1842 | /* |
| 1843 | * Scheduling the delayed work after 1 jiffies will make the work to |
| 1844 | * get schedule any time from 0ms to 1000/HZ ms which is not desirable |
| 1845 | * for hibern8 enter work as it may impact the performance if it gets |
| 1846 | * scheduled almost immediately. Hence make sure that hibern8 enter |
| 1847 | * work gets scheduled atleast after 2 jiffies (any time between |
| 1848 | * 1000/HZ ms to 2000/HZ ms). |
| 1849 | */ |
| 1850 | delay_in_jiffies = msecs_to_jiffies(hba->hibern8_on_idle.delay_ms); |
| 1851 | if (delay_in_jiffies == 1) |
| 1852 | delay_in_jiffies++; |
| 1853 | |
| 1854 | schedule_delayed_work(&hba->hibern8_on_idle.enter_work, |
| 1855 | delay_in_jiffies); |
| 1856 | } |
| 1857 | |
| 1858 | static void ufshcd_hibern8_release(struct ufs_hba *hba, bool no_sched) |
| 1859 | { |
| 1860 | unsigned long flags; |
| 1861 | |
| 1862 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1863 | __ufshcd_hibern8_release(hba, no_sched); |
| 1864 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1865 | } |
| 1866 | |
| 1867 | static void ufshcd_hibern8_enter_work(struct work_struct *work) |
| 1868 | { |
| 1869 | struct ufs_hba *hba = container_of(work, struct ufs_hba, |
| 1870 | hibern8_on_idle.enter_work.work); |
| 1871 | unsigned long flags; |
| 1872 | |
| 1873 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1874 | if (hba->hibern8_on_idle.is_suspended) { |
| 1875 | hba->hibern8_on_idle.state = HIBERN8_EXITED; |
| 1876 | trace_ufshcd_hibern8_on_idle(dev_name(hba->dev), |
| 1877 | hba->hibern8_on_idle.state); |
| 1878 | goto rel_lock; |
| 1879 | } |
| 1880 | |
| 1881 | if (hba->hibern8_on_idle.active_reqs |
| 1882 | || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL |
| 1883 | || hba->lrb_in_use || hba->outstanding_tasks |
| 1884 | || hba->active_uic_cmd || hba->uic_async_done) |
| 1885 | goto rel_lock; |
| 1886 | |
| 1887 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1888 | |
| 1889 | if (ufshcd_is_link_active(hba) && ufshcd_uic_hibern8_enter(hba)) { |
| 1890 | /* Enter failed */ |
| 1891 | hba->hibern8_on_idle.state = HIBERN8_EXITED; |
| 1892 | trace_ufshcd_hibern8_on_idle(dev_name(hba->dev), |
| 1893 | hba->hibern8_on_idle.state); |
| 1894 | goto out; |
| 1895 | } |
| 1896 | ufshcd_set_link_hibern8(hba); |
| 1897 | |
| 1898 | /* |
| 1899 | * In case you are here to cancel this work the hibern8_on_idle.state |
| 1900 | * would be marked as REQ_HIBERN8_EXIT. In this case keep the state |
| 1901 | * as REQ_HIBERN8_EXIT which would anyway imply that we are in hibern8 |
| 1902 | * and a request to exit from it is pending. By doing this way, |
| 1903 | * we keep the state machine in tact and this would ultimately |
| 1904 | * prevent from doing cancel work multiple times when there are |
| 1905 | * new requests arriving before the current cancel work is done. |
| 1906 | */ |
| 1907 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1908 | if (hba->hibern8_on_idle.state == REQ_HIBERN8_ENTER) { |
| 1909 | hba->hibern8_on_idle.state = HIBERN8_ENTERED; |
| 1910 | trace_ufshcd_hibern8_on_idle(dev_name(hba->dev), |
| 1911 | hba->hibern8_on_idle.state); |
| 1912 | } |
| 1913 | rel_lock: |
| 1914 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1915 | out: |
| 1916 | return; |
| 1917 | } |
| 1918 | |
| 1919 | static void ufshcd_hibern8_exit_work(struct work_struct *work) |
| 1920 | { |
| 1921 | int ret; |
| 1922 | unsigned long flags; |
| 1923 | struct ufs_hba *hba = container_of(work, struct ufs_hba, |
| 1924 | hibern8_on_idle.exit_work); |
| 1925 | |
| 1926 | cancel_delayed_work_sync(&hba->hibern8_on_idle.enter_work); |
| 1927 | |
| 1928 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1929 | if ((hba->hibern8_on_idle.state == HIBERN8_EXITED) |
| 1930 | || ufshcd_is_link_active(hba)) { |
| 1931 | hba->hibern8_on_idle.state = HIBERN8_EXITED; |
| 1932 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1933 | goto unblock_reqs; |
| 1934 | } |
| 1935 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1936 | |
| 1937 | /* Exit from hibern8 */ |
| 1938 | if (ufshcd_is_link_hibern8(hba)) { |
| 1939 | ufshcd_hold(hba, false); |
| 1940 | ret = ufshcd_uic_hibern8_exit(hba); |
| 1941 | ufshcd_release(hba, false); |
| 1942 | if (!ret) { |
| 1943 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1944 | ufshcd_set_link_active(hba); |
| 1945 | hba->hibern8_on_idle.state = HIBERN8_EXITED; |
| 1946 | trace_ufshcd_hibern8_on_idle(dev_name(hba->dev), |
| 1947 | hba->hibern8_on_idle.state); |
| 1948 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1949 | } |
| 1950 | } |
| 1951 | unblock_reqs: |
| 1952 | ufshcd_scsi_unblock_requests(hba); |
| 1953 | } |
| 1954 | |
| 1955 | static ssize_t ufshcd_hibern8_on_idle_delay_show(struct device *dev, |
| 1956 | struct device_attribute *attr, char *buf) |
| 1957 | { |
| 1958 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1959 | |
| 1960 | return snprintf(buf, PAGE_SIZE, "%lu\n", hba->hibern8_on_idle.delay_ms); |
| 1961 | } |
| 1962 | |
| 1963 | static ssize_t ufshcd_hibern8_on_idle_delay_store(struct device *dev, |
| 1964 | struct device_attribute *attr, const char *buf, size_t count) |
| 1965 | { |
| 1966 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1967 | unsigned long flags, value; |
| 1968 | |
| 1969 | if (kstrtoul(buf, 0, &value)) |
| 1970 | return -EINVAL; |
| 1971 | |
| 1972 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1973 | hba->hibern8_on_idle.delay_ms = value; |
| 1974 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1975 | |
| 1976 | /* Update auto hibern8 timer value if supported */ |
| 1977 | if (ufshcd_is_auto_hibern8_supported(hba) && |
| 1978 | hba->hibern8_on_idle.is_enabled) |
| 1979 | ufshcd_set_auto_hibern8_timer(hba, |
| 1980 | hba->hibern8_on_idle.delay_ms); |
| 1981 | |
| 1982 | return count; |
| 1983 | } |
| 1984 | |
| 1985 | static ssize_t ufshcd_hibern8_on_idle_enable_show(struct device *dev, |
| 1986 | struct device_attribute *attr, char *buf) |
| 1987 | { |
| 1988 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1989 | |
| 1990 | return snprintf(buf, PAGE_SIZE, "%d\n", |
| 1991 | hba->hibern8_on_idle.is_enabled); |
| 1992 | } |
| 1993 | |
| 1994 | static ssize_t ufshcd_hibern8_on_idle_enable_store(struct device *dev, |
| 1995 | struct device_attribute *attr, const char *buf, size_t count) |
| 1996 | { |
| 1997 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 1998 | unsigned long flags; |
| 1999 | u32 value; |
| 2000 | |
| 2001 | if (kstrtou32(buf, 0, &value)) |
| 2002 | return -EINVAL; |
| 2003 | |
| 2004 | value = !!value; |
| 2005 | if (value == hba->hibern8_on_idle.is_enabled) |
| 2006 | goto out; |
| 2007 | |
| 2008 | /* Update auto hibern8 timer value if supported */ |
| 2009 | if (ufshcd_is_auto_hibern8_supported(hba)) { |
| 2010 | ufshcd_set_auto_hibern8_timer(hba, |
| 2011 | value ? hba->hibern8_on_idle.delay_ms : value); |
| 2012 | goto update; |
| 2013 | } |
| 2014 | |
| 2015 | if (value) { |
| 2016 | /* |
| 2017 | * As clock gating work would wait for the hibern8 enter work |
| 2018 | * to finish, clocks would remain on during hibern8 enter work. |
| 2019 | */ |
| 2020 | ufshcd_hold(hba, false); |
| 2021 | ufshcd_release_all(hba); |
| 2022 | } else { |
| 2023 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 2024 | hba->hibern8_on_idle.active_reqs++; |
| 2025 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 2026 | } |
| 2027 | |
| 2028 | update: |
| 2029 | hba->hibern8_on_idle.is_enabled = value; |
| 2030 | out: |
| 2031 | return count; |
| 2032 | } |
| 2033 | |
| 2034 | static void ufshcd_init_hibern8_on_idle(struct ufs_hba *hba) |
| 2035 | { |
| 2036 | /* initialize the state variable here */ |
| 2037 | hba->hibern8_on_idle.state = HIBERN8_EXITED; |
| 2038 | |
| 2039 | if (!ufshcd_is_hibern8_on_idle_allowed(hba) && |
| 2040 | !ufshcd_is_auto_hibern8_supported(hba)) |
| 2041 | return; |
| 2042 | |
| 2043 | if (ufshcd_is_auto_hibern8_supported(hba)) { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 2044 | hba->hibern8_on_idle.delay_ms = 1; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2045 | hba->hibern8_on_idle.state = AUTO_HIBERN8; |
| 2046 | /* |
| 2047 | * Disable SW hibern8 enter on idle in case |
| 2048 | * auto hibern8 is supported |
| 2049 | */ |
| 2050 | hba->caps &= ~UFSHCD_CAP_HIBERN8_ENTER_ON_IDLE; |
| 2051 | } else { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 2052 | hba->hibern8_on_idle.delay_ms = 10; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2053 | INIT_DELAYED_WORK(&hba->hibern8_on_idle.enter_work, |
| 2054 | ufshcd_hibern8_enter_work); |
| 2055 | INIT_WORK(&hba->hibern8_on_idle.exit_work, |
| 2056 | ufshcd_hibern8_exit_work); |
| 2057 | } |
| 2058 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2059 | hba->hibern8_on_idle.is_enabled = true; |
| 2060 | |
| 2061 | hba->hibern8_on_idle.delay_attr.show = |
| 2062 | ufshcd_hibern8_on_idle_delay_show; |
| 2063 | hba->hibern8_on_idle.delay_attr.store = |
| 2064 | ufshcd_hibern8_on_idle_delay_store; |
| 2065 | sysfs_attr_init(&hba->hibern8_on_idle.delay_attr.attr); |
| 2066 | hba->hibern8_on_idle.delay_attr.attr.name = "hibern8_on_idle_delay_ms"; |
| 2067 | hba->hibern8_on_idle.delay_attr.attr.mode = S_IRUGO | S_IWUSR; |
| 2068 | if (device_create_file(hba->dev, &hba->hibern8_on_idle.delay_attr)) |
| 2069 | dev_err(hba->dev, "Failed to create sysfs for hibern8_on_idle_delay\n"); |
| 2070 | |
| 2071 | hba->hibern8_on_idle.enable_attr.show = |
| 2072 | ufshcd_hibern8_on_idle_enable_show; |
| 2073 | hba->hibern8_on_idle.enable_attr.store = |
| 2074 | ufshcd_hibern8_on_idle_enable_store; |
| 2075 | sysfs_attr_init(&hba->hibern8_on_idle.enable_attr.attr); |
| 2076 | hba->hibern8_on_idle.enable_attr.attr.name = "hibern8_on_idle_enable"; |
| 2077 | hba->hibern8_on_idle.enable_attr.attr.mode = S_IRUGO | S_IWUSR; |
| 2078 | if (device_create_file(hba->dev, &hba->hibern8_on_idle.enable_attr)) |
| 2079 | dev_err(hba->dev, "Failed to create sysfs for hibern8_on_idle_enable\n"); |
| 2080 | } |
| 2081 | |
| 2082 | static void ufshcd_exit_hibern8_on_idle(struct ufs_hba *hba) |
| 2083 | { |
| 2084 | if (!ufshcd_is_hibern8_on_idle_allowed(hba) && |
| 2085 | !ufshcd_is_auto_hibern8_supported(hba)) |
| 2086 | return; |
| 2087 | device_remove_file(hba->dev, &hba->hibern8_on_idle.delay_attr); |
| 2088 | device_remove_file(hba->dev, &hba->hibern8_on_idle.enable_attr); |
| 2089 | } |
| 2090 | |
| 2091 | static void ufshcd_hold_all(struct ufs_hba *hba) |
| 2092 | { |
| 2093 | ufshcd_hold(hba, false); |
| 2094 | ufshcd_hibern8_hold(hba, false); |
| 2095 | } |
| 2096 | |
| 2097 | static void ufshcd_release_all(struct ufs_hba *hba) |
| 2098 | { |
| 2099 | ufshcd_hibern8_release(hba, false); |
| 2100 | ufshcd_release(hba, false); |
| 2101 | } |
| 2102 | |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 2103 | /* Must be called with host lock acquired */ |
| 2104 | static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba) |
| 2105 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2106 | bool queue_resume_work = false; |
| 2107 | |
| 2108 | if (!ufshcd_is_clkscaling_supported(hba)) |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 2109 | return; |
| 2110 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2111 | if (!hba->clk_scaling.active_reqs++) |
| 2112 | queue_resume_work = true; |
| 2113 | |
| 2114 | if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress) |
| 2115 | return; |
| 2116 | |
| 2117 | if (queue_resume_work) |
| 2118 | queue_work(hba->clk_scaling.workq, |
| 2119 | &hba->clk_scaling.resume_work); |
| 2120 | |
| 2121 | if (!hba->clk_scaling.window_start_t) { |
| 2122 | hba->clk_scaling.window_start_t = jiffies; |
| 2123 | hba->clk_scaling.tot_busy_t = 0; |
| 2124 | hba->clk_scaling.is_busy_started = false; |
| 2125 | } |
| 2126 | |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 2127 | if (!hba->clk_scaling.is_busy_started) { |
| 2128 | hba->clk_scaling.busy_start_t = ktime_get(); |
| 2129 | hba->clk_scaling.is_busy_started = true; |
| 2130 | } |
| 2131 | } |
| 2132 | |
| 2133 | static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba) |
| 2134 | { |
| 2135 | struct ufs_clk_scaling *scaling = &hba->clk_scaling; |
| 2136 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2137 | if (!ufshcd_is_clkscaling_supported(hba)) |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 2138 | return; |
| 2139 | |
| 2140 | if (!hba->outstanding_reqs && scaling->is_busy_started) { |
| 2141 | scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(), |
| 2142 | scaling->busy_start_t)); |
| 2143 | scaling->busy_start_t = ktime_set(0, 0); |
| 2144 | scaling->is_busy_started = false; |
| 2145 | } |
| 2146 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2147 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2148 | /** |
| 2149 | * ufshcd_send_command - Send SCSI or device management commands |
| 2150 | * @hba: per adapter instance |
| 2151 | * @task_tag: Task tag of the command |
| 2152 | */ |
| 2153 | static inline |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2154 | int ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2155 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2156 | int ret = 0; |
| 2157 | |
| 2158 | hba->lrb[task_tag].issue_time_stamp = ktime_get(); |
| 2159 | hba->lrb[task_tag].complete_time_stamp = ktime_set(0, 0); |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 2160 | ufshcd_clk_scaling_start_busy(hba); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2161 | __set_bit(task_tag, &hba->outstanding_reqs); |
Seungwon Jeon | b873a275 | 2013-06-26 22:39:26 +0530 | [diff] [blame] | 2162 | ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2163 | /* Make sure that doorbell is committed immediately */ |
| 2164 | wmb(); |
| 2165 | ufshcd_cond_add_cmd_trace(hba, task_tag, "send"); |
| 2166 | ufshcd_update_tag_stats(hba, task_tag); |
| 2167 | return ret; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2168 | } |
| 2169 | |
| 2170 | /** |
| 2171 | * ufshcd_copy_sense_data - Copy sense data in case of check condition |
| 2172 | * @lrb - pointer to local reference block |
| 2173 | */ |
| 2174 | static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp) |
| 2175 | { |
| 2176 | int len; |
Seungwon Jeon | 1c2623c | 2013-08-31 21:40:19 +0530 | [diff] [blame] | 2177 | if (lrbp->sense_buffer && |
| 2178 | ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2179 | int len_to_copy; |
| 2180 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2181 | len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2182 | len_to_copy = min_t(int, RESPONSE_UPIU_SENSE_DATA_LENGTH, len); |
| 2183 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2184 | memcpy(lrbp->sense_buffer, |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2185 | lrbp->ucd_rsp_ptr->sr.sense_data, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2186 | min_t(int, len_to_copy, UFSHCD_REQ_SENSE_SIZE)); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2187 | } |
| 2188 | } |
| 2189 | |
| 2190 | /** |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2191 | * ufshcd_copy_query_response() - Copy the Query Response and the data |
| 2192 | * descriptor |
| 2193 | * @hba: per adapter instance |
| 2194 | * @lrb - pointer to local reference block |
| 2195 | */ |
| 2196 | static |
Dolev Raviv | c6d4a83 | 2014-06-29 09:40:18 +0300 | [diff] [blame] | 2197 | int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp) |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2198 | { |
| 2199 | struct ufs_query_res *query_res = &hba->dev_cmd.query.response; |
| 2200 | |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2201 | memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2202 | |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2203 | /* Get the descriptor */ |
| 2204 | if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) { |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 2205 | u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2206 | GENERAL_UPIU_REQUEST_SIZE; |
Dolev Raviv | c6d4a83 | 2014-06-29 09:40:18 +0300 | [diff] [blame] | 2207 | u16 resp_len; |
| 2208 | u16 buf_len; |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2209 | |
| 2210 | /* data segment length */ |
Dolev Raviv | c6d4a83 | 2014-06-29 09:40:18 +0300 | [diff] [blame] | 2211 | resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) & |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2212 | MASK_QUERY_DATA_SEG_LEN; |
Sujit Reddy Thumma | ea2aab2 | 2014-07-23 09:31:12 +0300 | [diff] [blame] | 2213 | buf_len = be16_to_cpu( |
| 2214 | hba->dev_cmd.query.request.upiu_req.length); |
Dolev Raviv | c6d4a83 | 2014-06-29 09:40:18 +0300 | [diff] [blame] | 2215 | if (likely(buf_len >= resp_len)) { |
| 2216 | memcpy(hba->dev_cmd.query.descriptor, descp, resp_len); |
| 2217 | } else { |
| 2218 | dev_warn(hba->dev, |
| 2219 | "%s: Response size is bigger than buffer", |
| 2220 | __func__); |
| 2221 | return -EINVAL; |
| 2222 | } |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2223 | } |
Dolev Raviv | c6d4a83 | 2014-06-29 09:40:18 +0300 | [diff] [blame] | 2224 | |
| 2225 | return 0; |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2226 | } |
| 2227 | |
| 2228 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2229 | * ufshcd_hba_capabilities - Read controller capabilities |
| 2230 | * @hba: per adapter instance |
| 2231 | */ |
| 2232 | static inline void ufshcd_hba_capabilities(struct ufs_hba *hba) |
| 2233 | { |
Seungwon Jeon | b873a275 | 2013-06-26 22:39:26 +0530 | [diff] [blame] | 2234 | hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2235 | |
| 2236 | /* nutrs and nutmrs are 0 based values */ |
| 2237 | hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1; |
| 2238 | hba->nutmrs = |
| 2239 | ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1; |
| 2240 | } |
| 2241 | |
| 2242 | /** |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2243 | * ufshcd_ready_for_uic_cmd - Check if controller is ready |
| 2244 | * to accept UIC commands |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2245 | * @hba: per adapter instance |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2246 | * Return true on success, else false |
| 2247 | */ |
| 2248 | static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba) |
| 2249 | { |
| 2250 | if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY) |
| 2251 | return true; |
| 2252 | else |
| 2253 | return false; |
| 2254 | } |
| 2255 | |
| 2256 | /** |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 2257 | * ufshcd_get_upmcrs - Get the power mode change request status |
| 2258 | * @hba: Pointer to adapter instance |
| 2259 | * |
| 2260 | * This function gets the UPMCRS field of HCS register |
| 2261 | * Returns value of UPMCRS field |
| 2262 | */ |
| 2263 | static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba) |
| 2264 | { |
| 2265 | return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7; |
| 2266 | } |
| 2267 | |
| 2268 | /** |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2269 | * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers |
| 2270 | * @hba: per adapter instance |
| 2271 | * @uic_cmd: UIC command |
| 2272 | * |
| 2273 | * Mutex must be held. |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2274 | */ |
| 2275 | static inline void |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2276 | ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2277 | { |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2278 | WARN_ON(hba->active_uic_cmd); |
| 2279 | |
| 2280 | hba->active_uic_cmd = uic_cmd; |
| 2281 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2282 | /* Write Args */ |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2283 | ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1); |
| 2284 | ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2); |
| 2285 | ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2286 | |
| 2287 | /* Write UIC Cmd */ |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2288 | ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK, |
Seungwon Jeon | b873a275 | 2013-06-26 22:39:26 +0530 | [diff] [blame] | 2289 | REG_UIC_COMMAND); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2290 | } |
| 2291 | |
| 2292 | /** |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2293 | * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command |
| 2294 | * @hba: per adapter instance |
| 2295 | * @uic_command: UIC command |
| 2296 | * |
| 2297 | * Must be called with mutex held. |
| 2298 | * Returns 0 only if success. |
| 2299 | */ |
| 2300 | static int |
| 2301 | ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd) |
| 2302 | { |
| 2303 | int ret; |
| 2304 | unsigned long flags; |
| 2305 | |
| 2306 | if (wait_for_completion_timeout(&uic_cmd->done, |
| 2307 | msecs_to_jiffies(UIC_CMD_TIMEOUT))) |
| 2308 | ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT; |
| 2309 | else |
| 2310 | ret = -ETIMEDOUT; |
| 2311 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2312 | if (ret) |
| 2313 | ufsdbg_set_err_state(hba); |
| 2314 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2315 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 2316 | hba->active_uic_cmd = NULL; |
| 2317 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 2318 | |
| 2319 | return ret; |
| 2320 | } |
| 2321 | |
| 2322 | /** |
| 2323 | * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result |
| 2324 | * @hba: per adapter instance |
| 2325 | * @uic_cmd: UIC command |
Yaniv Gardi | d75f7fe | 2016-02-01 15:02:47 +0200 | [diff] [blame] | 2326 | * @completion: initialize the completion only if this is set to true |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2327 | * |
| 2328 | * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 2329 | * with mutex held and host_lock locked. |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2330 | * Returns 0 only if success. |
| 2331 | */ |
| 2332 | static int |
Yaniv Gardi | d75f7fe | 2016-02-01 15:02:47 +0200 | [diff] [blame] | 2333 | __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd, |
| 2334 | bool completion) |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2335 | { |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2336 | if (!ufshcd_ready_for_uic_cmd(hba)) { |
| 2337 | dev_err(hba->dev, |
| 2338 | "Controller not ready to accept UIC commands\n"); |
| 2339 | return -EIO; |
| 2340 | } |
| 2341 | |
Yaniv Gardi | d75f7fe | 2016-02-01 15:02:47 +0200 | [diff] [blame] | 2342 | if (completion) |
| 2343 | init_completion(&uic_cmd->done); |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2344 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2345 | ufshcd_dispatch_uic_cmd(hba, uic_cmd); |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2346 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 2347 | return 0; |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2348 | } |
| 2349 | |
| 2350 | /** |
| 2351 | * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result |
| 2352 | * @hba: per adapter instance |
| 2353 | * @uic_cmd: UIC command |
| 2354 | * |
| 2355 | * Returns 0 only if success. |
| 2356 | */ |
| 2357 | static int |
| 2358 | ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd) |
| 2359 | { |
| 2360 | int ret; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 2361 | unsigned long flags; |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2362 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2363 | ufshcd_hold_all(hba); |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2364 | mutex_lock(&hba->uic_cmd_mutex); |
Yaniv Gardi | cad2e03 | 2015-03-31 17:37:14 +0300 | [diff] [blame] | 2365 | ufshcd_add_delay_before_dme_cmd(hba); |
| 2366 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 2367 | spin_lock_irqsave(hba->host->host_lock, flags); |
Yaniv Gardi | d75f7fe | 2016-02-01 15:02:47 +0200 | [diff] [blame] | 2368 | ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 2369 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 2370 | if (!ret) |
| 2371 | ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd); |
| 2372 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2373 | ufshcd_save_tstamp_of_last_dme_cmd(hba); |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2374 | mutex_unlock(&hba->uic_cmd_mutex); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2375 | ufshcd_release_all(hba); |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2376 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2377 | ufsdbg_error_inject_dispatcher(hba, |
| 2378 | ERR_INJECT_UIC, 0, &ret); |
| 2379 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 2380 | return ret; |
| 2381 | } |
| 2382 | |
| 2383 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2384 | * ufshcd_map_sg - Map scatter-gather list to prdt |
| 2385 | * @lrbp - pointer to local reference block |
| 2386 | * |
| 2387 | * Returns 0 in case of success, non-zero value in case of failure |
| 2388 | */ |
| 2389 | static int ufshcd_map_sg(struct ufshcd_lrb *lrbp) |
| 2390 | { |
| 2391 | struct ufshcd_sg_entry *prd_table; |
| 2392 | struct scatterlist *sg; |
| 2393 | struct scsi_cmnd *cmd; |
| 2394 | int sg_segments; |
| 2395 | int i; |
| 2396 | |
| 2397 | cmd = lrbp->cmd; |
| 2398 | sg_segments = scsi_dma_map(cmd); |
| 2399 | if (sg_segments < 0) |
| 2400 | return sg_segments; |
| 2401 | |
| 2402 | if (sg_segments) { |
| 2403 | lrbp->utr_descriptor_ptr->prd_table_length = |
| 2404 | cpu_to_le16((u16) (sg_segments)); |
| 2405 | |
| 2406 | prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr; |
| 2407 | |
| 2408 | scsi_for_each_sg(cmd, sg, sg_segments, i) { |
| 2409 | prd_table[i].size = |
| 2410 | cpu_to_le32(((u32) sg_dma_len(sg))-1); |
| 2411 | prd_table[i].base_addr = |
| 2412 | cpu_to_le32(lower_32_bits(sg->dma_address)); |
| 2413 | prd_table[i].upper_addr = |
| 2414 | cpu_to_le32(upper_32_bits(sg->dma_address)); |
Yaniv Gardi | 52ac95f | 2016-02-01 15:02:37 +0200 | [diff] [blame] | 2415 | prd_table[i].reserved = 0; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2416 | } |
| 2417 | } else { |
| 2418 | lrbp->utr_descriptor_ptr->prd_table_length = 0; |
| 2419 | } |
| 2420 | |
| 2421 | return 0; |
| 2422 | } |
| 2423 | |
| 2424 | /** |
Seungwon Jeon | 2fbd009 | 2013-06-26 22:39:27 +0530 | [diff] [blame] | 2425 | * ufshcd_enable_intr - enable interrupts |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2426 | * @hba: per adapter instance |
Seungwon Jeon | 2fbd009 | 2013-06-26 22:39:27 +0530 | [diff] [blame] | 2427 | * @intrs: interrupt bits |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2428 | */ |
Seungwon Jeon | 2fbd009 | 2013-06-26 22:39:27 +0530 | [diff] [blame] | 2429 | static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2430 | { |
Seungwon Jeon | 2fbd009 | 2013-06-26 22:39:27 +0530 | [diff] [blame] | 2431 | u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE); |
| 2432 | |
| 2433 | if (hba->ufs_version == UFSHCI_VERSION_10) { |
| 2434 | u32 rw; |
| 2435 | rw = set & INTERRUPT_MASK_RW_VER_10; |
| 2436 | set = rw | ((set ^ intrs) & intrs); |
| 2437 | } else { |
| 2438 | set |= intrs; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2439 | } |
Seungwon Jeon | 2fbd009 | 2013-06-26 22:39:27 +0530 | [diff] [blame] | 2440 | |
| 2441 | ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE); |
| 2442 | } |
| 2443 | |
| 2444 | /** |
| 2445 | * ufshcd_disable_intr - disable interrupts |
| 2446 | * @hba: per adapter instance |
| 2447 | * @intrs: interrupt bits |
| 2448 | */ |
| 2449 | static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs) |
| 2450 | { |
| 2451 | u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE); |
| 2452 | |
| 2453 | if (hba->ufs_version == UFSHCI_VERSION_10) { |
| 2454 | u32 rw; |
| 2455 | rw = (set & INTERRUPT_MASK_RW_VER_10) & |
| 2456 | ~(intrs & INTERRUPT_MASK_RW_VER_10); |
| 2457 | set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10); |
| 2458 | |
| 2459 | } else { |
| 2460 | set &= ~intrs; |
| 2461 | } |
| 2462 | |
| 2463 | ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2464 | } |
| 2465 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2466 | static int ufshcd_prepare_crypto_utrd(struct ufs_hba *hba, |
| 2467 | struct ufshcd_lrb *lrbp) |
| 2468 | { |
| 2469 | struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr; |
| 2470 | u8 cc_index = 0; |
| 2471 | bool enable = false; |
| 2472 | u64 dun = 0; |
| 2473 | int ret; |
| 2474 | |
| 2475 | /* |
| 2476 | * Call vendor specific code to get crypto info for this request: |
| 2477 | * enable, crypto config. index, DUN. |
| 2478 | * If bypass is set, don't bother setting the other fields. |
| 2479 | */ |
| 2480 | ret = ufshcd_vops_crypto_req_setup(hba, lrbp, &cc_index, &enable, &dun); |
| 2481 | if (ret) { |
| 2482 | if (ret != -EAGAIN) { |
| 2483 | dev_err(hba->dev, |
| 2484 | "%s: failed to setup crypto request (%d)\n", |
| 2485 | __func__, ret); |
| 2486 | } |
| 2487 | |
| 2488 | return ret; |
| 2489 | } |
| 2490 | |
| 2491 | if (!enable) |
| 2492 | goto out; |
| 2493 | |
| 2494 | req_desc->header.dword_0 |= cc_index | UTRD_CRYPTO_ENABLE; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2495 | req_desc->header.dword_1 = (u32)(dun & 0xFFFFFFFF); |
| 2496 | req_desc->header.dword_3 = (u32)((dun >> 32) & 0xFFFFFFFF); |
| 2497 | out: |
| 2498 | return 0; |
| 2499 | } |
| 2500 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2501 | /** |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2502 | * ufshcd_prepare_req_desc_hdr() - Fills the requests header |
| 2503 | * descriptor according to request |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2504 | * @hba: per adapter instance |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2505 | * @lrbp: pointer to local reference block |
| 2506 | * @upiu_flags: flags required in the header |
| 2507 | * @cmd_dir: requests data direction |
| 2508 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2509 | static int ufshcd_prepare_req_desc_hdr(struct ufs_hba *hba, |
| 2510 | struct ufshcd_lrb *lrbp, u32 *upiu_flags, |
| 2511 | enum dma_data_direction cmd_dir) |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2512 | { |
| 2513 | struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr; |
| 2514 | u32 data_direction; |
| 2515 | u32 dword_0; |
| 2516 | |
| 2517 | if (cmd_dir == DMA_FROM_DEVICE) { |
| 2518 | data_direction = UTP_DEVICE_TO_HOST; |
| 2519 | *upiu_flags = UPIU_CMD_FLAGS_READ; |
| 2520 | } else if (cmd_dir == DMA_TO_DEVICE) { |
| 2521 | data_direction = UTP_HOST_TO_DEVICE; |
| 2522 | *upiu_flags = UPIU_CMD_FLAGS_WRITE; |
| 2523 | } else { |
| 2524 | data_direction = UTP_NO_DATA_TRANSFER; |
| 2525 | *upiu_flags = UPIU_CMD_FLAGS_NONE; |
| 2526 | } |
| 2527 | |
| 2528 | dword_0 = data_direction | (lrbp->command_type |
| 2529 | << UPIU_COMMAND_TYPE_OFFSET); |
| 2530 | if (lrbp->intr_cmd) |
| 2531 | dword_0 |= UTP_REQ_DESC_INT_CMD; |
| 2532 | |
| 2533 | /* Transfer request descriptor header fields */ |
| 2534 | req_desc->header.dword_0 = cpu_to_le32(dword_0); |
Yaniv Gardi | 52ac95f | 2016-02-01 15:02:37 +0200 | [diff] [blame] | 2535 | /* dword_1 is reserved, hence it is set to 0 */ |
| 2536 | req_desc->header.dword_1 = 0; |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2537 | /* |
| 2538 | * assigning invalid value for command status. Controller |
| 2539 | * updates OCS on command completion, with the command |
| 2540 | * status |
| 2541 | */ |
| 2542 | req_desc->header.dword_2 = |
| 2543 | cpu_to_le32(OCS_INVALID_COMMAND_STATUS); |
Yaniv Gardi | 52ac95f | 2016-02-01 15:02:37 +0200 | [diff] [blame] | 2544 | /* dword_3 is reserved, hence it is set to 0 */ |
| 2545 | req_desc->header.dword_3 = 0; |
Yaniv Gardi | 5104726 | 2016-02-01 15:02:38 +0200 | [diff] [blame] | 2546 | |
| 2547 | req_desc->prd_table_length = 0; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2548 | |
| 2549 | if (ufshcd_is_crypto_supported(hba)) |
| 2550 | return ufshcd_prepare_crypto_utrd(hba, lrbp); |
| 2551 | |
| 2552 | return 0; |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2553 | } |
| 2554 | |
| 2555 | /** |
| 2556 | * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc, |
| 2557 | * for scsi commands |
| 2558 | * @lrbp - local reference block pointer |
| 2559 | * @upiu_flags - flags |
| 2560 | */ |
| 2561 | static |
| 2562 | void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags) |
| 2563 | { |
| 2564 | struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr; |
Yaniv Gardi | 52ac95f | 2016-02-01 15:02:37 +0200 | [diff] [blame] | 2565 | unsigned short cdb_len; |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2566 | |
| 2567 | /* command descriptor fields */ |
| 2568 | ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD( |
| 2569 | UPIU_TRANSACTION_COMMAND, upiu_flags, |
| 2570 | lrbp->lun, lrbp->task_tag); |
| 2571 | ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD( |
| 2572 | UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0); |
| 2573 | |
| 2574 | /* Total EHS length and Data segment length will be zero */ |
| 2575 | ucd_req_ptr->header.dword_2 = 0; |
| 2576 | |
| 2577 | ucd_req_ptr->sc.exp_data_transfer_len = |
| 2578 | cpu_to_be32(lrbp->cmd->sdb.length); |
| 2579 | |
Yaniv Gardi | 52ac95f | 2016-02-01 15:02:37 +0200 | [diff] [blame] | 2580 | cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE); |
Yaniv Gardi | 52ac95f | 2016-02-01 15:02:37 +0200 | [diff] [blame] | 2581 | memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2582 | if (cdb_len < MAX_CDB_SIZE) |
| 2583 | memset(ucd_req_ptr->sc.cdb + cdb_len, 0, |
| 2584 | (MAX_CDB_SIZE - cdb_len)); |
Yaniv Gardi | 52ac95f | 2016-02-01 15:02:37 +0200 | [diff] [blame] | 2585 | memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2586 | } |
| 2587 | |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2588 | /** |
| 2589 | * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc, |
| 2590 | * for query requsts |
| 2591 | * @hba: UFS hba |
| 2592 | * @lrbp: local reference block pointer |
| 2593 | * @upiu_flags: flags |
| 2594 | */ |
| 2595 | static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba, |
| 2596 | struct ufshcd_lrb *lrbp, u32 upiu_flags) |
| 2597 | { |
| 2598 | struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr; |
| 2599 | struct ufs_query *query = &hba->dev_cmd.query; |
Sujit Reddy Thumma | e8c8e82 | 2014-05-26 10:59:10 +0530 | [diff] [blame] | 2600 | u16 len = be16_to_cpu(query->request.upiu_req.length); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2601 | u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE; |
| 2602 | |
| 2603 | /* Query request header */ |
| 2604 | ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD( |
| 2605 | UPIU_TRANSACTION_QUERY_REQ, upiu_flags, |
| 2606 | lrbp->lun, lrbp->task_tag); |
| 2607 | ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD( |
| 2608 | 0, query->request.query_func, 0, 0); |
| 2609 | |
Zang Leigang | 6861285 | 2016-08-25 17:39:19 +0800 | [diff] [blame] | 2610 | /* Data segment length only need for WRITE_DESC */ |
| 2611 | if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC) |
| 2612 | ucd_req_ptr->header.dword_2 = |
| 2613 | UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len); |
| 2614 | else |
| 2615 | ucd_req_ptr->header.dword_2 = 0; |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2616 | |
| 2617 | /* Copy the Query Request buffer as is */ |
| 2618 | memcpy(&ucd_req_ptr->qr, &query->request.upiu_req, |
| 2619 | QUERY_OSF_SIZE); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2620 | |
| 2621 | /* Copy the Descriptor */ |
Dolev Raviv | c6d4a83 | 2014-06-29 09:40:18 +0300 | [diff] [blame] | 2622 | if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC) |
| 2623 | memcpy(descp, query->descriptor, len); |
| 2624 | |
Yaniv Gardi | 5104726 | 2016-02-01 15:02:38 +0200 | [diff] [blame] | 2625 | memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 2626 | } |
| 2627 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2628 | static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp) |
| 2629 | { |
| 2630 | struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr; |
| 2631 | |
| 2632 | memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req)); |
| 2633 | |
| 2634 | /* command descriptor fields */ |
| 2635 | ucd_req_ptr->header.dword_0 = |
| 2636 | UPIU_HEADER_DWORD( |
| 2637 | UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag); |
Yaniv Gardi | 5104726 | 2016-02-01 15:02:38 +0200 | [diff] [blame] | 2638 | /* clear rest of the fields of basic header */ |
| 2639 | ucd_req_ptr->header.dword_1 = 0; |
| 2640 | ucd_req_ptr->header.dword_2 = 0; |
| 2641 | |
| 2642 | memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2643 | } |
| 2644 | |
| 2645 | /** |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2646 | * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU) |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2647 | * @hba - per adapter instance |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2648 | * @lrb - pointer to local reference block |
| 2649 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2650 | static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2651 | { |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2652 | u32 upiu_flags; |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2653 | int ret = 0; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2654 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2655 | switch (lrbp->command_type) { |
| 2656 | case UTP_CMD_TYPE_SCSI: |
| 2657 | if (likely(lrbp->cmd)) { |
| 2658 | ret = ufshcd_prepare_req_desc_hdr(hba, lrbp, |
| 2659 | &upiu_flags, lrbp->cmd->sc_data_direction); |
| 2660 | ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags); |
| 2661 | } else { |
| 2662 | ret = -EINVAL; |
| 2663 | } |
| 2664 | break; |
| 2665 | case UTP_CMD_TYPE_DEV_MANAGE: |
| 2666 | ret = ufshcd_prepare_req_desc_hdr(hba, lrbp, &upiu_flags, |
| 2667 | DMA_NONE); |
| 2668 | if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY) |
| 2669 | ufshcd_prepare_utp_query_req_upiu( |
| 2670 | hba, lrbp, upiu_flags); |
| 2671 | else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP) |
| 2672 | ufshcd_prepare_utp_nop_upiu(lrbp); |
| 2673 | else |
| 2674 | ret = -EINVAL; |
| 2675 | break; |
| 2676 | case UTP_CMD_TYPE_UFS: |
| 2677 | /* For UFS native command implementation */ |
| 2678 | ret = -ENOTSUPP; |
| 2679 | dev_err(hba->dev, "%s: UFS native command are not supported\n", |
| 2680 | __func__); |
| 2681 | break; |
| 2682 | default: |
| 2683 | ret = -ENOTSUPP; |
| 2684 | dev_err(hba->dev, "%s: unknown command type: 0x%x\n", |
| 2685 | __func__, lrbp->command_type); |
| 2686 | break; |
| 2687 | } /* end of switch */ |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2688 | |
| 2689 | return ret; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2690 | } |
| 2691 | |
Subhash Jadavani | 0ce147d | 2014-09-25 15:32:29 +0300 | [diff] [blame] | 2692 | /* |
| 2693 | * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN |
| 2694 | * @scsi_lun: scsi LUN id |
| 2695 | * |
| 2696 | * Returns UPIU LUN id |
| 2697 | */ |
| 2698 | static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun) |
| 2699 | { |
| 2700 | if (scsi_is_wlun(scsi_lun)) |
| 2701 | return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID) |
| 2702 | | UFS_UPIU_WLUN_ID; |
| 2703 | else |
| 2704 | return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID; |
| 2705 | } |
| 2706 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2707 | /** |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 2708 | * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID |
| 2709 | * @scsi_lun: UPIU W-LUN id |
| 2710 | * |
| 2711 | * Returns SCSI W-LUN id |
| 2712 | */ |
| 2713 | static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id) |
| 2714 | { |
| 2715 | return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE; |
| 2716 | } |
| 2717 | |
| 2718 | /** |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 2719 | * ufshcd_get_write_lock - synchronize between shutdown, scaling & |
| 2720 | * arrival of requests |
| 2721 | * @hba: ufs host |
| 2722 | * |
| 2723 | * Lock is predominantly held by shutdown context thus, ensuring |
| 2724 | * that no requests from any other context may sneak through. |
| 2725 | */ |
| 2726 | static inline void ufshcd_get_write_lock(struct ufs_hba *hba) |
| 2727 | { |
| 2728 | down_write(&hba->lock); |
| 2729 | } |
| 2730 | |
| 2731 | /** |
| 2732 | * ufshcd_get_read_lock - synchronize between shutdown, scaling & |
| 2733 | * arrival of requests |
| 2734 | * @hba: ufs host |
| 2735 | * |
| 2736 | * Returns 1 if acquired, < 0 on contention |
| 2737 | * |
| 2738 | * After shutdown's initiated, allow requests only directed to the |
| 2739 | * well known device lun. The sync between scaling & issue is maintained |
| 2740 | * as is and this restructuring syncs shutdown with these too. |
| 2741 | */ |
| 2742 | static int ufshcd_get_read_lock(struct ufs_hba *hba, u64 lun) |
| 2743 | { |
| 2744 | int err = 0; |
| 2745 | |
| 2746 | err = down_read_trylock(&hba->lock); |
| 2747 | if (err > 0) |
| 2748 | goto out; |
| 2749 | /* let requests for well known device lun to go through */ |
| 2750 | if (ufshcd_scsi_to_upiu_lun(lun) == UFS_UPIU_UFS_DEVICE_WLUN) |
| 2751 | return 0; |
| 2752 | else if (!ufshcd_is_shutdown_ongoing(hba)) |
| 2753 | return -EAGAIN; |
| 2754 | else |
| 2755 | return -EPERM; |
| 2756 | |
| 2757 | out: |
| 2758 | return err; |
| 2759 | } |
| 2760 | |
| 2761 | /** |
| 2762 | * ufshcd_put_read_lock - synchronize between shutdown, scaling & |
| 2763 | * arrival of requests |
| 2764 | * @hba: ufs host |
| 2765 | * |
| 2766 | * Returns none |
| 2767 | */ |
| 2768 | static inline void ufshcd_put_read_lock(struct ufs_hba *hba) |
| 2769 | { |
| 2770 | up_read(&hba->lock); |
| 2771 | } |
| 2772 | |
| 2773 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2774 | * ufshcd_queuecommand - main entry point for SCSI requests |
| 2775 | * @cmd: command from SCSI Midlayer |
| 2776 | * @done: call back function |
| 2777 | * |
| 2778 | * Returns 0 for success, non-zero in case of failure |
| 2779 | */ |
| 2780 | static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd) |
| 2781 | { |
| 2782 | struct ufshcd_lrb *lrbp; |
| 2783 | struct ufs_hba *hba; |
| 2784 | unsigned long flags; |
| 2785 | int tag; |
| 2786 | int err = 0; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 2787 | bool has_read_lock = false; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2788 | |
| 2789 | hba = shost_priv(host); |
| 2790 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 2791 | if (!cmd || !cmd->request || !hba) |
| 2792 | return -EINVAL; |
| 2793 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2794 | tag = cmd->request->tag; |
Yaniv Gardi | 1449732 | 2016-02-01 15:02:39 +0200 | [diff] [blame] | 2795 | if (!ufshcd_valid_tag(hba, tag)) { |
| 2796 | dev_err(hba->dev, |
| 2797 | "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p", |
| 2798 | __func__, tag, cmd, cmd->request); |
| 2799 | BUG(); |
| 2800 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2801 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 2802 | err = ufshcd_get_read_lock(hba, cmd->device->lun); |
| 2803 | if (unlikely(err < 0)) { |
| 2804 | if (err == -EPERM) { |
| 2805 | set_host_byte(cmd, DID_ERROR); |
| 2806 | cmd->scsi_done(cmd); |
| 2807 | return 0; |
| 2808 | } |
| 2809 | if (err == -EAGAIN) |
| 2810 | return SCSI_MLQUEUE_HOST_BUSY; |
| 2811 | } else if (err == 1) { |
| 2812 | has_read_lock = true; |
| 2813 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2814 | |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 2815 | spin_lock_irqsave(hba->host->host_lock, flags); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 2816 | |
| 2817 | /* if error handling is in progress, return host busy */ |
| 2818 | if (ufshcd_eh_in_progress(hba)) { |
| 2819 | err = SCSI_MLQUEUE_HOST_BUSY; |
| 2820 | goto out_unlock; |
| 2821 | } |
| 2822 | |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 2823 | switch (hba->ufshcd_state) { |
| 2824 | case UFSHCD_STATE_OPERATIONAL: |
| 2825 | break; |
| 2826 | case UFSHCD_STATE_RESET: |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2827 | err = SCSI_MLQUEUE_HOST_BUSY; |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 2828 | goto out_unlock; |
| 2829 | case UFSHCD_STATE_ERROR: |
| 2830 | set_host_byte(cmd, DID_ERROR); |
| 2831 | cmd->scsi_done(cmd); |
| 2832 | goto out_unlock; |
| 2833 | default: |
| 2834 | dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n", |
| 2835 | __func__, hba->ufshcd_state); |
| 2836 | set_host_byte(cmd, DID_BAD_TARGET); |
| 2837 | cmd->scsi_done(cmd); |
| 2838 | goto out_unlock; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2839 | } |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 2840 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2841 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2842 | hba->req_abort_count = 0; |
| 2843 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2844 | /* acquire the tag to make sure device cmds don't use it */ |
| 2845 | if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) { |
| 2846 | /* |
| 2847 | * Dev manage command in progress, requeue the command. |
| 2848 | * Requeuing the command helps in cases where the request *may* |
| 2849 | * find different tag instead of waiting for dev manage command |
| 2850 | * completion. |
| 2851 | */ |
| 2852 | err = SCSI_MLQUEUE_HOST_BUSY; |
| 2853 | goto out; |
| 2854 | } |
| 2855 | |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 2856 | err = ufshcd_hold(hba, true); |
| 2857 | if (err) { |
| 2858 | err = SCSI_MLQUEUE_HOST_BUSY; |
| 2859 | clear_bit_unlock(tag, &hba->lrb_in_use); |
| 2860 | goto out; |
| 2861 | } |
Mohan Srinivasan | 0ef170d | 2016-08-25 18:31:01 -0700 | [diff] [blame] | 2862 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2863 | if (ufshcd_is_clkgating_allowed(hba)) |
| 2864 | WARN_ON(hba->clk_gating.state != CLKS_ON); |
| 2865 | |
| 2866 | err = ufshcd_hibern8_hold(hba, true); |
| 2867 | if (err) { |
| 2868 | clear_bit_unlock(tag, &hba->lrb_in_use); |
| 2869 | err = SCSI_MLQUEUE_HOST_BUSY; |
| 2870 | ufshcd_release(hba, true); |
| 2871 | goto out; |
| 2872 | } |
| 2873 | if (ufshcd_is_hibern8_on_idle_allowed(hba)) |
| 2874 | WARN_ON(hba->hibern8_on_idle.state != HIBERN8_EXITED); |
| 2875 | |
| 2876 | /* Vote PM QoS for the request */ |
| 2877 | ufshcd_vops_pm_qos_req_start(hba, cmd->request); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 2878 | |
Mohan Srinivasan | 0ef170d | 2016-08-25 18:31:01 -0700 | [diff] [blame] | 2879 | /* IO svc time latency histogram */ |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 2880 | if (hba->latency_hist_enabled && |
| 2881 | (cmd->request->cmd_type == REQ_TYPE_FS)) { |
| 2882 | cmd->request->lat_hist_io_start = ktime_get(); |
| 2883 | cmd->request->lat_hist_enabled = 1; |
| 2884 | } else { |
| 2885 | cmd->request->lat_hist_enabled = 0; |
Mohan Srinivasan | 0ef170d | 2016-08-25 18:31:01 -0700 | [diff] [blame] | 2886 | } |
| 2887 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2888 | WARN_ON(hba->clk_gating.state != CLKS_ON); |
| 2889 | |
| 2890 | lrbp = &hba->lrb[tag]; |
| 2891 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2892 | WARN_ON(lrbp->cmd); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2893 | lrbp->cmd = cmd; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2894 | lrbp->sense_bufflen = UFSHCD_REQ_SENSE_SIZE; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2895 | lrbp->sense_buffer = cmd->sense_buffer; |
| 2896 | lrbp->task_tag = tag; |
Subhash Jadavani | 0ce147d | 2014-09-25 15:32:29 +0300 | [diff] [blame] | 2897 | lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun); |
Yaniv Gardi | b852190 | 2015-05-17 18:54:57 +0300 | [diff] [blame] | 2898 | lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2899 | lrbp->command_type = UTP_CMD_TYPE_SCSI; |
| 2900 | lrbp->req_abort_skip = false; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2901 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2902 | /* form UPIU before issuing the command */ |
| 2903 | err = ufshcd_compose_upiu(hba, lrbp); |
| 2904 | if (err) { |
| 2905 | if (err != -EAGAIN) |
| 2906 | dev_err(hba->dev, |
| 2907 | "%s: failed to compose upiu %d\n", |
| 2908 | __func__, err); |
Stephen Boyd | 9bc70c3 | 2017-03-01 16:58:38 -0800 | [diff] [blame] | 2909 | lrbp->cmd = NULL; |
| 2910 | clear_bit_unlock(tag, &hba->lrb_in_use); |
| 2911 | ufshcd_release_all(hba); |
| 2912 | ufshcd_vops_pm_qos_req_end(hba, cmd->request, true); |
| 2913 | goto out; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2914 | } |
Joao Pinto | 300bb13 | 2016-05-11 12:21:27 +0100 | [diff] [blame] | 2915 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2916 | err = ufshcd_map_sg(lrbp); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2917 | if (err) { |
| 2918 | lrbp->cmd = NULL; |
| 2919 | clear_bit_unlock(tag, &hba->lrb_in_use); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2920 | ufshcd_release_all(hba); |
| 2921 | ufshcd_vops_pm_qos_req_end(hba, cmd->request, true); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2922 | goto out; |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2923 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2924 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2925 | err = ufshcd_vops_crypto_engine_cfg_start(hba, tag); |
| 2926 | if (err) { |
| 2927 | if (err != -EAGAIN) |
| 2928 | dev_err(hba->dev, |
| 2929 | "%s: failed to configure crypto engine %d\n", |
| 2930 | __func__, err); |
| 2931 | |
| 2932 | scsi_dma_unmap(lrbp->cmd); |
| 2933 | lrbp->cmd = NULL; |
| 2934 | clear_bit_unlock(tag, &hba->lrb_in_use); |
| 2935 | ufshcd_release_all(hba); |
| 2936 | ufshcd_vops_pm_qos_req_end(hba, cmd->request, true); |
| 2937 | |
| 2938 | goto out; |
| 2939 | } |
| 2940 | |
| 2941 | /* Make sure descriptors are ready before ringing the doorbell */ |
| 2942 | wmb(); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2943 | /* issue command to the controller */ |
| 2944 | spin_lock_irqsave(hba->host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2945 | |
| 2946 | err = ufshcd_send_command(hba, tag); |
| 2947 | if (err) { |
| 2948 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 2949 | scsi_dma_unmap(lrbp->cmd); |
| 2950 | lrbp->cmd = NULL; |
| 2951 | clear_bit_unlock(tag, &hba->lrb_in_use); |
| 2952 | ufshcd_release_all(hba); |
| 2953 | ufshcd_vops_pm_qos_req_end(hba, cmd->request, true); |
| 2954 | ufshcd_vops_crypto_engine_cfg_end(hba, lrbp, cmd->request); |
| 2955 | dev_err(hba->dev, "%s: failed sending command, %d\n", |
| 2956 | __func__, err); |
| 2957 | err = DID_ERROR; |
| 2958 | goto out; |
| 2959 | } |
| 2960 | |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 2961 | out_unlock: |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2962 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 2963 | out: |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 2964 | if (has_read_lock) |
| 2965 | ufshcd_put_read_lock(hba); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 2966 | return err; |
| 2967 | } |
| 2968 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2969 | static int ufshcd_compose_dev_cmd(struct ufs_hba *hba, |
| 2970 | struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag) |
| 2971 | { |
| 2972 | lrbp->cmd = NULL; |
| 2973 | lrbp->sense_bufflen = 0; |
| 2974 | lrbp->sense_buffer = NULL; |
| 2975 | lrbp->task_tag = tag; |
| 2976 | lrbp->lun = 0; /* device management cmd is not specific to any LUN */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2977 | lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE; |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2978 | lrbp->intr_cmd = true; /* No interrupt aggregation */ |
| 2979 | hba->dev_cmd.type = cmd_type; |
| 2980 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 2981 | return ufshcd_compose_upiu(hba, lrbp); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 2982 | } |
| 2983 | |
| 2984 | static int |
| 2985 | ufshcd_clear_cmd(struct ufs_hba *hba, int tag) |
| 2986 | { |
| 2987 | int err = 0; |
| 2988 | unsigned long flags; |
| 2989 | u32 mask = 1 << tag; |
| 2990 | |
| 2991 | /* clear outstanding transaction before retry */ |
| 2992 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 2993 | ufshcd_utrl_clear(hba, tag); |
| 2994 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 2995 | |
| 2996 | /* |
| 2997 | * wait for for h/w to clear corresponding bit in door-bell. |
| 2998 | * max. wait is 1 sec. |
| 2999 | */ |
| 3000 | err = ufshcd_wait_for_register(hba, |
| 3001 | REG_UTP_TRANSFER_REQ_DOOR_BELL, |
Yaniv Gardi | 596585a | 2016-03-10 17:37:08 +0200 | [diff] [blame] | 3002 | mask, ~mask, 1000, 1000, true); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3003 | |
| 3004 | return err; |
| 3005 | } |
| 3006 | |
Dolev Raviv | c6d4a83 | 2014-06-29 09:40:18 +0300 | [diff] [blame] | 3007 | static int |
| 3008 | ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp) |
| 3009 | { |
| 3010 | struct ufs_query_res *query_res = &hba->dev_cmd.query.response; |
| 3011 | |
| 3012 | /* Get the UPIU response */ |
| 3013 | query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >> |
| 3014 | UPIU_RSP_CODE_OFFSET; |
| 3015 | return query_res->response; |
| 3016 | } |
| 3017 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3018 | /** |
| 3019 | * ufshcd_dev_cmd_completion() - handles device management command responses |
| 3020 | * @hba: per adapter instance |
| 3021 | * @lrbp: pointer to local reference block |
| 3022 | */ |
| 3023 | static int |
| 3024 | ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp) |
| 3025 | { |
| 3026 | int resp; |
| 3027 | int err = 0; |
| 3028 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3029 | hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3030 | resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr); |
| 3031 | |
| 3032 | switch (resp) { |
| 3033 | case UPIU_TRANSACTION_NOP_IN: |
| 3034 | if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) { |
| 3035 | err = -EINVAL; |
| 3036 | dev_err(hba->dev, "%s: unexpected response %x\n", |
| 3037 | __func__, resp); |
| 3038 | } |
| 3039 | break; |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3040 | case UPIU_TRANSACTION_QUERY_RSP: |
Dolev Raviv | c6d4a83 | 2014-06-29 09:40:18 +0300 | [diff] [blame] | 3041 | err = ufshcd_check_query_response(hba, lrbp); |
| 3042 | if (!err) |
| 3043 | err = ufshcd_copy_query_response(hba, lrbp); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3044 | break; |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3045 | case UPIU_TRANSACTION_REJECT_UPIU: |
| 3046 | /* TODO: handle Reject UPIU Response */ |
| 3047 | err = -EPERM; |
| 3048 | dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n", |
| 3049 | __func__); |
| 3050 | break; |
| 3051 | default: |
| 3052 | err = -EINVAL; |
| 3053 | dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n", |
| 3054 | __func__, resp); |
| 3055 | break; |
| 3056 | } |
| 3057 | |
| 3058 | return err; |
| 3059 | } |
| 3060 | |
| 3061 | static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba, |
| 3062 | struct ufshcd_lrb *lrbp, int max_timeout) |
| 3063 | { |
| 3064 | int err = 0; |
| 3065 | unsigned long time_left; |
| 3066 | unsigned long flags; |
| 3067 | |
| 3068 | time_left = wait_for_completion_timeout(hba->dev_cmd.complete, |
| 3069 | msecs_to_jiffies(max_timeout)); |
| 3070 | |
| 3071 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 3072 | hba->dev_cmd.complete = NULL; |
| 3073 | if (likely(time_left)) { |
| 3074 | err = ufshcd_get_tr_ocs(lrbp); |
| 3075 | if (!err) |
| 3076 | err = ufshcd_dev_cmd_completion(hba, lrbp); |
| 3077 | } |
| 3078 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 3079 | |
| 3080 | if (!time_left) { |
| 3081 | err = -ETIMEDOUT; |
Yaniv Gardi | a48353f | 2016-02-01 15:02:40 +0200 | [diff] [blame] | 3082 | dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n", |
| 3083 | __func__, lrbp->task_tag); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3084 | if (!ufshcd_clear_cmd(hba, lrbp->task_tag)) |
Yaniv Gardi | a48353f | 2016-02-01 15:02:40 +0200 | [diff] [blame] | 3085 | /* successfully cleared the command, retry if needed */ |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3086 | err = -EAGAIN; |
Yaniv Gardi | a48353f | 2016-02-01 15:02:40 +0200 | [diff] [blame] | 3087 | /* |
| 3088 | * in case of an error, after clearing the doorbell, |
| 3089 | * we also need to clear the outstanding_request |
| 3090 | * field in hba |
| 3091 | */ |
| 3092 | ufshcd_outstanding_req_clear(hba, lrbp->task_tag); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3093 | } |
| 3094 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3095 | if (err) |
| 3096 | ufsdbg_set_err_state(hba); |
| 3097 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3098 | return err; |
| 3099 | } |
| 3100 | |
| 3101 | /** |
| 3102 | * ufshcd_get_dev_cmd_tag - Get device management command tag |
| 3103 | * @hba: per-adapter instance |
| 3104 | * @tag: pointer to variable with available slot value |
| 3105 | * |
| 3106 | * Get a free slot and lock it until device management command |
| 3107 | * completes. |
| 3108 | * |
| 3109 | * Returns false if free slot is unavailable for locking, else |
| 3110 | * return true with tag value in @tag. |
| 3111 | */ |
| 3112 | static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out) |
| 3113 | { |
| 3114 | int tag; |
| 3115 | bool ret = false; |
| 3116 | unsigned long tmp; |
| 3117 | |
| 3118 | if (!tag_out) |
| 3119 | goto out; |
| 3120 | |
| 3121 | do { |
| 3122 | tmp = ~hba->lrb_in_use; |
| 3123 | tag = find_last_bit(&tmp, hba->nutrs); |
| 3124 | if (tag >= hba->nutrs) |
| 3125 | goto out; |
| 3126 | } while (test_and_set_bit_lock(tag, &hba->lrb_in_use)); |
| 3127 | |
| 3128 | *tag_out = tag; |
| 3129 | ret = true; |
| 3130 | out: |
| 3131 | return ret; |
| 3132 | } |
| 3133 | |
| 3134 | static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag) |
| 3135 | { |
| 3136 | clear_bit_unlock(tag, &hba->lrb_in_use); |
| 3137 | } |
| 3138 | |
| 3139 | /** |
| 3140 | * ufshcd_exec_dev_cmd - API for sending device management requests |
| 3141 | * @hba - UFS hba |
| 3142 | * @cmd_type - specifies the type (NOP, Query...) |
| 3143 | * @timeout - time in seconds |
| 3144 | * |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3145 | * NOTE: Since there is only one available tag for device management commands, |
| 3146 | * it is expected you hold the hba->dev_cmd.lock mutex. |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3147 | */ |
| 3148 | static int ufshcd_exec_dev_cmd(struct ufs_hba *hba, |
| 3149 | enum dev_cmd_type cmd_type, int timeout) |
| 3150 | { |
| 3151 | struct ufshcd_lrb *lrbp; |
| 3152 | int err; |
| 3153 | int tag; |
| 3154 | struct completion wait; |
| 3155 | unsigned long flags; |
| 3156 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 3157 | /* |
| 3158 | * May get invoked from shutdown and IOCTL contexts. |
| 3159 | * In shutdown context, it comes in with lock acquired. |
| 3160 | */ |
| 3161 | if (!ufshcd_is_shutdown_ongoing(hba)) |
| 3162 | down_read(&hba->lock); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3163 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3164 | /* |
| 3165 | * Get free slot, sleep if slots are unavailable. |
| 3166 | * Even though we use wait_event() which sleeps indefinitely, |
| 3167 | * the maximum wait time is bounded by SCSI request timeout. |
| 3168 | */ |
| 3169 | wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag)); |
| 3170 | |
| 3171 | init_completion(&wait); |
| 3172 | lrbp = &hba->lrb[tag]; |
| 3173 | WARN_ON(lrbp->cmd); |
| 3174 | err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag); |
| 3175 | if (unlikely(err)) |
| 3176 | goto out_put_tag; |
| 3177 | |
| 3178 | hba->dev_cmd.complete = &wait; |
| 3179 | |
Yaniv Gardi | e3dfdc5 | 2016-02-01 15:02:49 +0200 | [diff] [blame] | 3180 | /* Make sure descriptors are ready before ringing the doorbell */ |
| 3181 | wmb(); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3182 | spin_lock_irqsave(hba->host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3183 | err = ufshcd_send_command(hba, tag); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3184 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3185 | if (err) { |
| 3186 | dev_err(hba->dev, "%s: failed sending command, %d\n", |
| 3187 | __func__, err); |
| 3188 | goto out_put_tag; |
| 3189 | } |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3190 | err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout); |
| 3191 | |
| 3192 | out_put_tag: |
| 3193 | ufshcd_put_dev_cmd_tag(hba, tag); |
| 3194 | wake_up(&hba->dev_cmd.tag_wq); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 3195 | if (!ufshcd_is_shutdown_ongoing(hba)) |
| 3196 | up_read(&hba->lock); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3197 | return err; |
| 3198 | } |
| 3199 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3200 | /** |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3201 | * ufshcd_init_query() - init the query response and request parameters |
| 3202 | * @hba: per-adapter instance |
| 3203 | * @request: address of the request pointer to be initialized |
| 3204 | * @response: address of the response pointer to be initialized |
| 3205 | * @opcode: operation to perform |
| 3206 | * @idn: flag idn to access |
| 3207 | * @index: LU number to access |
| 3208 | * @selector: query/flag/descriptor further identification |
| 3209 | */ |
| 3210 | static inline void ufshcd_init_query(struct ufs_hba *hba, |
| 3211 | struct ufs_query_req **request, struct ufs_query_res **response, |
| 3212 | enum query_opcode opcode, u8 idn, u8 index, u8 selector) |
| 3213 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3214 | int idn_t = (int)idn; |
| 3215 | |
| 3216 | ufsdbg_error_inject_dispatcher(hba, |
| 3217 | ERR_INJECT_QUERY, idn_t, (int *)&idn_t); |
| 3218 | idn = idn_t; |
| 3219 | |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3220 | *request = &hba->dev_cmd.query.request; |
| 3221 | *response = &hba->dev_cmd.query.response; |
| 3222 | memset(*request, 0, sizeof(struct ufs_query_req)); |
| 3223 | memset(*response, 0, sizeof(struct ufs_query_res)); |
| 3224 | (*request)->upiu_req.opcode = opcode; |
| 3225 | (*request)->upiu_req.idn = idn; |
| 3226 | (*request)->upiu_req.index = index; |
| 3227 | (*request)->upiu_req.selector = selector; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3228 | |
| 3229 | ufshcd_update_query_stats(hba, opcode, idn); |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3230 | } |
| 3231 | |
Yaniv Gardi | dc3c8d3 | 2016-02-01 15:02:46 +0200 | [diff] [blame] | 3232 | static int ufshcd_query_flag_retry(struct ufs_hba *hba, |
| 3233 | enum query_opcode opcode, enum flag_idn idn, bool *flag_res) |
| 3234 | { |
| 3235 | int ret; |
| 3236 | int retries; |
| 3237 | |
| 3238 | for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) { |
| 3239 | ret = ufshcd_query_flag(hba, opcode, idn, flag_res); |
| 3240 | if (ret) |
| 3241 | dev_dbg(hba->dev, |
| 3242 | "%s: failed with error %d, retries %d\n", |
| 3243 | __func__, ret, retries); |
| 3244 | else |
| 3245 | break; |
| 3246 | } |
| 3247 | |
| 3248 | if (ret) |
| 3249 | dev_err(hba->dev, |
| 3250 | "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n", |
| 3251 | __func__, opcode, idn, ret, retries); |
| 3252 | return ret; |
| 3253 | } |
| 3254 | |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3255 | /** |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3256 | * ufshcd_query_flag() - API function for sending flag query requests |
| 3257 | * hba: per-adapter instance |
| 3258 | * query_opcode: flag query to perform |
| 3259 | * idn: flag idn to access |
| 3260 | * flag_res: the flag value after the query request completes |
| 3261 | * |
| 3262 | * Returns 0 for success, non-zero in case of failure |
| 3263 | */ |
Yaniv Gardi | dc3c8d3 | 2016-02-01 15:02:46 +0200 | [diff] [blame] | 3264 | int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode, |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3265 | enum flag_idn idn, bool *flag_res) |
| 3266 | { |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3267 | struct ufs_query_req *request = NULL; |
| 3268 | struct ufs_query_res *response = NULL; |
| 3269 | int err, index = 0, selector = 0; |
Yaniv Gardi | e5ad406 | 2016-02-01 15:02:41 +0200 | [diff] [blame] | 3270 | int timeout = QUERY_REQ_TIMEOUT; |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3271 | |
| 3272 | BUG_ON(!hba); |
| 3273 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3274 | ufshcd_hold_all(hba); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3275 | mutex_lock(&hba->dev_cmd.lock); |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3276 | ufshcd_init_query(hba, &request, &response, opcode, idn, index, |
| 3277 | selector); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3278 | |
| 3279 | switch (opcode) { |
| 3280 | case UPIU_QUERY_OPCODE_SET_FLAG: |
| 3281 | case UPIU_QUERY_OPCODE_CLEAR_FLAG: |
| 3282 | case UPIU_QUERY_OPCODE_TOGGLE_FLAG: |
| 3283 | request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST; |
| 3284 | break; |
| 3285 | case UPIU_QUERY_OPCODE_READ_FLAG: |
| 3286 | request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST; |
| 3287 | if (!flag_res) { |
| 3288 | /* No dummy reads */ |
| 3289 | dev_err(hba->dev, "%s: Invalid argument for read request\n", |
| 3290 | __func__); |
| 3291 | err = -EINVAL; |
| 3292 | goto out_unlock; |
| 3293 | } |
| 3294 | break; |
| 3295 | default: |
| 3296 | dev_err(hba->dev, |
| 3297 | "%s: Expected query flag opcode but got = %d\n", |
| 3298 | __func__, opcode); |
| 3299 | err = -EINVAL; |
| 3300 | goto out_unlock; |
| 3301 | } |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3302 | |
Yaniv Gardi | e5ad406 | 2016-02-01 15:02:41 +0200 | [diff] [blame] | 3303 | err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3304 | |
| 3305 | if (err) { |
| 3306 | dev_err(hba->dev, |
| 3307 | "%s: Sending flag query for idn %d failed, err = %d\n", |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3308 | __func__, request->upiu_req.idn, err); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3309 | goto out_unlock; |
| 3310 | } |
| 3311 | |
| 3312 | if (flag_res) |
Sujit Reddy Thumma | e8c8e82 | 2014-05-26 10:59:10 +0530 | [diff] [blame] | 3313 | *flag_res = (be32_to_cpu(response->upiu_res.value) & |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3314 | MASK_QUERY_UPIU_FLAG_LOC) & 0x1; |
| 3315 | |
| 3316 | out_unlock: |
| 3317 | mutex_unlock(&hba->dev_cmd.lock); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3318 | ufshcd_release_all(hba); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3319 | return err; |
| 3320 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3321 | EXPORT_SYMBOL(ufshcd_query_flag); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 3322 | |
| 3323 | /** |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 3324 | * ufshcd_query_attr - API function for sending attribute requests |
| 3325 | * hba: per-adapter instance |
| 3326 | * opcode: attribute opcode |
| 3327 | * idn: attribute idn to access |
| 3328 | * index: index field |
| 3329 | * selector: selector field |
| 3330 | * attr_val: the attribute value after the query request completes |
| 3331 | * |
| 3332 | * Returns 0 for success, non-zero in case of failure |
| 3333 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3334 | int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode, |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 3335 | enum attr_idn idn, u8 index, u8 selector, u32 *attr_val) |
| 3336 | { |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3337 | struct ufs_query_req *request = NULL; |
| 3338 | struct ufs_query_res *response = NULL; |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 3339 | int err; |
| 3340 | |
| 3341 | BUG_ON(!hba); |
| 3342 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3343 | ufshcd_hold_all(hba); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 3344 | if (!attr_val) { |
| 3345 | dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n", |
| 3346 | __func__, opcode); |
| 3347 | err = -EINVAL; |
| 3348 | goto out; |
| 3349 | } |
| 3350 | |
| 3351 | mutex_lock(&hba->dev_cmd.lock); |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3352 | ufshcd_init_query(hba, &request, &response, opcode, idn, index, |
| 3353 | selector); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 3354 | |
| 3355 | switch (opcode) { |
| 3356 | case UPIU_QUERY_OPCODE_WRITE_ATTR: |
| 3357 | request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST; |
Sujit Reddy Thumma | e8c8e82 | 2014-05-26 10:59:10 +0530 | [diff] [blame] | 3358 | request->upiu_req.value = cpu_to_be32(*attr_val); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 3359 | break; |
| 3360 | case UPIU_QUERY_OPCODE_READ_ATTR: |
| 3361 | request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST; |
| 3362 | break; |
| 3363 | default: |
| 3364 | dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n", |
| 3365 | __func__, opcode); |
| 3366 | err = -EINVAL; |
| 3367 | goto out_unlock; |
| 3368 | } |
| 3369 | |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3370 | err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 3371 | |
| 3372 | if (err) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3373 | dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n", |
| 3374 | __func__, opcode, |
| 3375 | request->upiu_req.idn, index, err); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 3376 | goto out_unlock; |
| 3377 | } |
| 3378 | |
Sujit Reddy Thumma | e8c8e82 | 2014-05-26 10:59:10 +0530 | [diff] [blame] | 3379 | *attr_val = be32_to_cpu(response->upiu_res.value); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 3380 | |
| 3381 | out_unlock: |
| 3382 | mutex_unlock(&hba->dev_cmd.lock); |
| 3383 | out: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3384 | ufshcd_release_all(hba); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 3385 | return err; |
| 3386 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3387 | EXPORT_SYMBOL(ufshcd_query_attr); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 3388 | |
| 3389 | /** |
Yaniv Gardi | 5e86ae4 | 2016-02-01 15:02:50 +0200 | [diff] [blame] | 3390 | * ufshcd_query_attr_retry() - API function for sending query |
| 3391 | * attribute with retries |
| 3392 | * @hba: per-adapter instance |
| 3393 | * @opcode: attribute opcode |
| 3394 | * @idn: attribute idn to access |
| 3395 | * @index: index field |
| 3396 | * @selector: selector field |
| 3397 | * @attr_val: the attribute value after the query request |
| 3398 | * completes |
| 3399 | * |
| 3400 | * Returns 0 for success, non-zero in case of failure |
| 3401 | */ |
| 3402 | static int ufshcd_query_attr_retry(struct ufs_hba *hba, |
| 3403 | enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector, |
| 3404 | u32 *attr_val) |
| 3405 | { |
| 3406 | int ret = 0; |
| 3407 | u32 retries; |
| 3408 | |
| 3409 | for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) { |
| 3410 | ret = ufshcd_query_attr(hba, opcode, idn, index, |
| 3411 | selector, attr_val); |
| 3412 | if (ret) |
| 3413 | dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n", |
| 3414 | __func__, ret, retries); |
| 3415 | else |
| 3416 | break; |
| 3417 | } |
| 3418 | |
| 3419 | if (ret) |
| 3420 | dev_err(hba->dev, |
| 3421 | "%s: query attribute, idn %d, failed with error %d after %d retires\n", |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3422 | __func__, idn, ret, retries); |
Yaniv Gardi | 5e86ae4 | 2016-02-01 15:02:50 +0200 | [diff] [blame] | 3423 | return ret; |
| 3424 | } |
| 3425 | |
Yaniv Gardi | a70e91b | 2016-03-10 17:37:14 +0200 | [diff] [blame] | 3426 | static int __ufshcd_query_descriptor(struct ufs_hba *hba, |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3427 | enum query_opcode opcode, enum desc_idn idn, u8 index, |
| 3428 | u8 selector, u8 *desc_buf, int *buf_len) |
| 3429 | { |
| 3430 | struct ufs_query_req *request = NULL; |
| 3431 | struct ufs_query_res *response = NULL; |
| 3432 | int err; |
| 3433 | |
| 3434 | BUG_ON(!hba); |
| 3435 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3436 | ufshcd_hold_all(hba); |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3437 | if (!desc_buf) { |
| 3438 | dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n", |
| 3439 | __func__, opcode); |
| 3440 | err = -EINVAL; |
| 3441 | goto out; |
| 3442 | } |
| 3443 | |
| 3444 | if (*buf_len <= QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) { |
| 3445 | dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n", |
| 3446 | __func__, *buf_len); |
| 3447 | err = -EINVAL; |
| 3448 | goto out; |
| 3449 | } |
| 3450 | |
| 3451 | mutex_lock(&hba->dev_cmd.lock); |
| 3452 | ufshcd_init_query(hba, &request, &response, opcode, idn, index, |
| 3453 | selector); |
| 3454 | hba->dev_cmd.query.descriptor = desc_buf; |
Sujit Reddy Thumma | ea2aab2 | 2014-07-23 09:31:12 +0300 | [diff] [blame] | 3455 | request->upiu_req.length = cpu_to_be16(*buf_len); |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3456 | |
| 3457 | switch (opcode) { |
| 3458 | case UPIU_QUERY_OPCODE_WRITE_DESC: |
| 3459 | request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST; |
| 3460 | break; |
| 3461 | case UPIU_QUERY_OPCODE_READ_DESC: |
| 3462 | request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST; |
| 3463 | break; |
| 3464 | default: |
| 3465 | dev_err(hba->dev, |
| 3466 | "%s: Expected query descriptor opcode but got = 0x%.2x\n", |
| 3467 | __func__, opcode); |
| 3468 | err = -EINVAL; |
| 3469 | goto out_unlock; |
| 3470 | } |
| 3471 | |
| 3472 | err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT); |
| 3473 | |
| 3474 | if (err) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3475 | dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n", |
| 3476 | __func__, opcode, |
| 3477 | request->upiu_req.idn, index, err); |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3478 | goto out_unlock; |
| 3479 | } |
| 3480 | |
| 3481 | hba->dev_cmd.query.descriptor = NULL; |
Sujit Reddy Thumma | ea2aab2 | 2014-07-23 09:31:12 +0300 | [diff] [blame] | 3482 | *buf_len = be16_to_cpu(response->upiu_res.length); |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3483 | |
| 3484 | out_unlock: |
| 3485 | mutex_unlock(&hba->dev_cmd.lock); |
| 3486 | out: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3487 | ufshcd_release_all(hba); |
Dolev Raviv | d44a5f9 | 2014-06-29 09:40:17 +0300 | [diff] [blame] | 3488 | return err; |
| 3489 | } |
| 3490 | |
| 3491 | /** |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3492 | * ufshcd_query_descriptor - API function for sending descriptor requests |
Yaniv Gardi | a70e91b | 2016-03-10 17:37:14 +0200 | [diff] [blame] | 3493 | * hba: per-adapter instance |
| 3494 | * opcode: attribute opcode |
| 3495 | * idn: attribute idn to access |
| 3496 | * index: index field |
| 3497 | * selector: selector field |
| 3498 | * desc_buf: the buffer that contains the descriptor |
| 3499 | * buf_len: length parameter passed to the device |
| 3500 | * |
| 3501 | * Returns 0 for success, non-zero in case of failure. |
| 3502 | * The buf_len parameter will contain, on return, the length parameter |
| 3503 | * received on the response. |
| 3504 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3505 | int ufshcd_query_descriptor(struct ufs_hba *hba, |
Yaniv Gardi | a70e91b | 2016-03-10 17:37:14 +0200 | [diff] [blame] | 3506 | enum query_opcode opcode, enum desc_idn idn, u8 index, |
| 3507 | u8 selector, u8 *desc_buf, int *buf_len) |
| 3508 | { |
| 3509 | int err; |
| 3510 | int retries; |
| 3511 | |
| 3512 | for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) { |
| 3513 | err = __ufshcd_query_descriptor(hba, opcode, idn, index, |
| 3514 | selector, desc_buf, buf_len); |
| 3515 | if (!err || err == -EINVAL) |
| 3516 | break; |
| 3517 | } |
| 3518 | |
| 3519 | return err; |
| 3520 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3521 | EXPORT_SYMBOL(ufshcd_query_descriptor); |
Yaniv Gardi | a70e91b | 2016-03-10 17:37:14 +0200 | [diff] [blame] | 3522 | |
| 3523 | /** |
Subhash Jadavani | da461ce | 2014-09-25 15:32:25 +0300 | [diff] [blame] | 3524 | * ufshcd_read_desc_param - read the specified descriptor parameter |
| 3525 | * @hba: Pointer to adapter instance |
| 3526 | * @desc_id: descriptor idn value |
| 3527 | * @desc_index: descriptor index |
| 3528 | * @param_offset: offset of the parameter to read |
| 3529 | * @param_read_buf: pointer to buffer where parameter would be read |
| 3530 | * @param_size: sizeof(param_read_buf) |
| 3531 | * |
| 3532 | * Return 0 in case of success, non-zero otherwise |
| 3533 | */ |
| 3534 | static int ufshcd_read_desc_param(struct ufs_hba *hba, |
| 3535 | enum desc_idn desc_id, |
| 3536 | int desc_index, |
| 3537 | u32 param_offset, |
| 3538 | u8 *param_read_buf, |
| 3539 | u32 param_size) |
| 3540 | { |
| 3541 | int ret; |
| 3542 | u8 *desc_buf; |
| 3543 | u32 buff_len; |
| 3544 | bool is_kmalloc = true; |
| 3545 | |
| 3546 | /* safety checks */ |
| 3547 | if (desc_id >= QUERY_DESC_IDN_MAX) |
| 3548 | return -EINVAL; |
| 3549 | |
| 3550 | buff_len = ufs_query_desc_max_size[desc_id]; |
| 3551 | if ((param_offset + param_size) > buff_len) |
| 3552 | return -EINVAL; |
| 3553 | |
| 3554 | if (!param_offset && (param_size == buff_len)) { |
| 3555 | /* memory space already available to hold full descriptor */ |
| 3556 | desc_buf = param_read_buf; |
| 3557 | is_kmalloc = false; |
| 3558 | } else { |
| 3559 | /* allocate memory to hold full descriptor */ |
| 3560 | desc_buf = kmalloc(buff_len, GFP_KERNEL); |
| 3561 | if (!desc_buf) |
| 3562 | return -ENOMEM; |
| 3563 | } |
| 3564 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3565 | ret = ufshcd_query_descriptor(hba, UPIU_QUERY_OPCODE_READ_DESC, |
| 3566 | desc_id, desc_index, 0, desc_buf, |
| 3567 | &buff_len); |
Subhash Jadavani | da461ce | 2014-09-25 15:32:25 +0300 | [diff] [blame] | 3568 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3569 | if (ret) { |
| 3570 | dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d", |
| 3571 | __func__, desc_id, desc_index, param_offset, ret); |
Subhash Jadavani | da461ce | 2014-09-25 15:32:25 +0300 | [diff] [blame] | 3572 | |
| 3573 | goto out; |
| 3574 | } |
| 3575 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3576 | /* Sanity check */ |
| 3577 | if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) { |
| 3578 | dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header", |
| 3579 | __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]); |
| 3580 | ret = -EINVAL; |
| 3581 | goto out; |
| 3582 | } |
| 3583 | |
| 3584 | /* |
| 3585 | * While reading variable size descriptors (like string descriptor), |
| 3586 | * some UFS devices may report the "LENGTH" (field in "Transaction |
| 3587 | * Specific fields" of Query Response UPIU) same as what was requested |
| 3588 | * in Query Request UPIU instead of reporting the actual size of the |
| 3589 | * variable size descriptor. |
| 3590 | * Although it's safe to ignore the "LENGTH" field for variable size |
| 3591 | * descriptors as we can always derive the length of the descriptor from |
| 3592 | * the descriptor header fields. Hence this change impose the length |
| 3593 | * match check only for fixed size descriptors (for which we always |
| 3594 | * request the correct size as part of Query Request UPIU). |
| 3595 | */ |
| 3596 | if ((desc_id != QUERY_DESC_IDN_STRING) && |
| 3597 | (buff_len != desc_buf[QUERY_DESC_LENGTH_OFFSET])) { |
| 3598 | dev_err(hba->dev, "%s: desc_buf length mismatch: buff_len %d, buff_len(desc_header) %d", |
| 3599 | __func__, buff_len, desc_buf[QUERY_DESC_LENGTH_OFFSET]); |
| 3600 | ret = -EINVAL; |
| 3601 | goto out; |
| 3602 | } |
| 3603 | |
Subhash Jadavani | da461ce | 2014-09-25 15:32:25 +0300 | [diff] [blame] | 3604 | if (is_kmalloc) |
| 3605 | memcpy(param_read_buf, &desc_buf[param_offset], param_size); |
| 3606 | out: |
| 3607 | if (is_kmalloc) |
| 3608 | kfree(desc_buf); |
| 3609 | return ret; |
| 3610 | } |
| 3611 | |
| 3612 | static inline int ufshcd_read_desc(struct ufs_hba *hba, |
| 3613 | enum desc_idn desc_id, |
| 3614 | int desc_index, |
| 3615 | u8 *buf, |
| 3616 | u32 size) |
| 3617 | { |
| 3618 | return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size); |
| 3619 | } |
| 3620 | |
| 3621 | static inline int ufshcd_read_power_desc(struct ufs_hba *hba, |
| 3622 | u8 *buf, |
| 3623 | u32 size) |
| 3624 | { |
| 3625 | return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size); |
| 3626 | } |
| 3627 | |
Yaniv Gardi | b573d48 | 2016-03-10 17:37:09 +0200 | [diff] [blame] | 3628 | int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size) |
| 3629 | { |
| 3630 | return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size); |
| 3631 | } |
Yaniv Gardi | b573d48 | 2016-03-10 17:37:09 +0200 | [diff] [blame] | 3632 | |
| 3633 | /** |
| 3634 | * ufshcd_read_string_desc - read string descriptor |
| 3635 | * @hba: pointer to adapter instance |
| 3636 | * @desc_index: descriptor index |
| 3637 | * @buf: pointer to buffer where descriptor would be read |
| 3638 | * @size: size of buf |
| 3639 | * @ascii: if true convert from unicode to ascii characters |
| 3640 | * |
| 3641 | * Return 0 in case of success, non-zero otherwise |
| 3642 | */ |
| 3643 | int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, u8 *buf, |
| 3644 | u32 size, bool ascii) |
| 3645 | { |
| 3646 | int err = 0; |
| 3647 | |
| 3648 | err = ufshcd_read_desc(hba, |
| 3649 | QUERY_DESC_IDN_STRING, desc_index, buf, size); |
| 3650 | |
| 3651 | if (err) { |
| 3652 | dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n", |
| 3653 | __func__, QUERY_REQ_RETRIES, err); |
| 3654 | goto out; |
| 3655 | } |
| 3656 | |
| 3657 | if (ascii) { |
| 3658 | int desc_len; |
| 3659 | int ascii_len; |
| 3660 | int i; |
| 3661 | char *buff_ascii; |
| 3662 | |
| 3663 | desc_len = buf[0]; |
| 3664 | /* remove header and divide by 2 to move from UTF16 to UTF8 */ |
| 3665 | ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1; |
| 3666 | if (size < ascii_len + QUERY_DESC_HDR_SIZE) { |
| 3667 | dev_err(hba->dev, "%s: buffer allocated size is too small\n", |
| 3668 | __func__); |
| 3669 | err = -ENOMEM; |
| 3670 | goto out; |
| 3671 | } |
| 3672 | |
Subhash Jadavani | be09603 | 2017-03-23 12:55:25 -0700 | [diff] [blame] | 3673 | buff_ascii = kzalloc(ascii_len, GFP_KERNEL); |
Yaniv Gardi | b573d48 | 2016-03-10 17:37:09 +0200 | [diff] [blame] | 3674 | if (!buff_ascii) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3675 | dev_err(hba->dev, "%s: Failed allocating %d bytes\n", |
| 3676 | __func__, ascii_len); |
Yaniv Gardi | b573d48 | 2016-03-10 17:37:09 +0200 | [diff] [blame] | 3677 | err = -ENOMEM; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3678 | goto out_free_buff; |
Yaniv Gardi | b573d48 | 2016-03-10 17:37:09 +0200 | [diff] [blame] | 3679 | } |
| 3680 | |
| 3681 | /* |
| 3682 | * the descriptor contains string in UTF16 format |
| 3683 | * we need to convert to utf-8 so it can be displayed |
| 3684 | */ |
| 3685 | utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE], |
| 3686 | desc_len - QUERY_DESC_HDR_SIZE, |
| 3687 | UTF16_BIG_ENDIAN, buff_ascii, ascii_len); |
| 3688 | |
| 3689 | /* replace non-printable or non-ASCII characters with spaces */ |
| 3690 | for (i = 0; i < ascii_len; i++) |
| 3691 | ufshcd_remove_non_printable(&buff_ascii[i]); |
| 3692 | |
| 3693 | memset(buf + QUERY_DESC_HDR_SIZE, 0, |
| 3694 | size - QUERY_DESC_HDR_SIZE); |
| 3695 | memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len); |
| 3696 | buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3697 | out_free_buff: |
Yaniv Gardi | b573d48 | 2016-03-10 17:37:09 +0200 | [diff] [blame] | 3698 | kfree(buff_ascii); |
| 3699 | } |
| 3700 | out: |
| 3701 | return err; |
| 3702 | } |
Yaniv Gardi | b573d48 | 2016-03-10 17:37:09 +0200 | [diff] [blame] | 3703 | |
Subhash Jadavani | da461ce | 2014-09-25 15:32:25 +0300 | [diff] [blame] | 3704 | /** |
| 3705 | * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter |
| 3706 | * @hba: Pointer to adapter instance |
| 3707 | * @lun: lun id |
| 3708 | * @param_offset: offset of the parameter to read |
| 3709 | * @param_read_buf: pointer to buffer where parameter would be read |
| 3710 | * @param_size: sizeof(param_read_buf) |
| 3711 | * |
| 3712 | * Return 0 in case of success, non-zero otherwise |
| 3713 | */ |
| 3714 | static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba, |
| 3715 | int lun, |
| 3716 | enum unit_desc_param param_offset, |
| 3717 | u8 *param_read_buf, |
| 3718 | u32 param_size) |
| 3719 | { |
| 3720 | /* |
| 3721 | * Unit descriptors are only available for general purpose LUs (LUN id |
| 3722 | * from 0 to 7) and RPMB Well known LU. |
| 3723 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3724 | if (!ufs_is_valid_unit_desc_lun(lun)) |
Subhash Jadavani | da461ce | 2014-09-25 15:32:25 +0300 | [diff] [blame] | 3725 | return -EOPNOTSUPP; |
| 3726 | |
| 3727 | return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun, |
| 3728 | param_offset, param_read_buf, param_size); |
| 3729 | } |
| 3730 | |
| 3731 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3732 | * ufshcd_memory_alloc - allocate memory for host memory space data structures |
| 3733 | * @hba: per adapter instance |
| 3734 | * |
| 3735 | * 1. Allocate DMA memory for Command Descriptor array |
| 3736 | * Each command descriptor consist of Command UPIU, Response UPIU and PRDT |
| 3737 | * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL). |
| 3738 | * 3. Allocate DMA memory for UTP Task Management Request Descriptor List |
| 3739 | * (UTMRDL) |
| 3740 | * 4. Allocate memory for local reference block(lrb). |
| 3741 | * |
| 3742 | * Returns 0 for success, non-zero in case of failure |
| 3743 | */ |
| 3744 | static int ufshcd_memory_alloc(struct ufs_hba *hba) |
| 3745 | { |
| 3746 | size_t utmrdl_size, utrdl_size, ucdl_size; |
| 3747 | |
| 3748 | /* Allocate memory for UTP command descriptors */ |
| 3749 | ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs); |
Seungwon Jeon | 2953f85 | 2013-06-27 13:31:54 +0900 | [diff] [blame] | 3750 | hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev, |
| 3751 | ucdl_size, |
| 3752 | &hba->ucdl_dma_addr, |
| 3753 | GFP_KERNEL); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3754 | |
| 3755 | /* |
| 3756 | * UFSHCI requires UTP command descriptor to be 128 byte aligned. |
| 3757 | * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE |
| 3758 | * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will |
| 3759 | * be aligned to 128 bytes as well |
| 3760 | */ |
| 3761 | if (!hba->ucdl_base_addr || |
| 3762 | WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) { |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 3763 | dev_err(hba->dev, |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3764 | "Command Descriptor Memory allocation failed\n"); |
| 3765 | goto out; |
| 3766 | } |
| 3767 | |
| 3768 | /* |
| 3769 | * Allocate memory for UTP Transfer descriptors |
| 3770 | * UFSHCI requires 1024 byte alignment of UTRD |
| 3771 | */ |
| 3772 | utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs); |
Seungwon Jeon | 2953f85 | 2013-06-27 13:31:54 +0900 | [diff] [blame] | 3773 | hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev, |
| 3774 | utrdl_size, |
| 3775 | &hba->utrdl_dma_addr, |
| 3776 | GFP_KERNEL); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3777 | if (!hba->utrdl_base_addr || |
| 3778 | WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) { |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 3779 | dev_err(hba->dev, |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3780 | "Transfer Descriptor Memory allocation failed\n"); |
| 3781 | goto out; |
| 3782 | } |
| 3783 | |
| 3784 | /* |
| 3785 | * Allocate memory for UTP Task Management descriptors |
| 3786 | * UFSHCI requires 1024 byte alignment of UTMRD |
| 3787 | */ |
| 3788 | utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs; |
Seungwon Jeon | 2953f85 | 2013-06-27 13:31:54 +0900 | [diff] [blame] | 3789 | hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev, |
| 3790 | utmrdl_size, |
| 3791 | &hba->utmrdl_dma_addr, |
| 3792 | GFP_KERNEL); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3793 | if (!hba->utmrdl_base_addr || |
| 3794 | WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) { |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 3795 | dev_err(hba->dev, |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3796 | "Task Management Descriptor Memory allocation failed\n"); |
| 3797 | goto out; |
| 3798 | } |
| 3799 | |
| 3800 | /* Allocate memory for local reference block */ |
Seungwon Jeon | 2953f85 | 2013-06-27 13:31:54 +0900 | [diff] [blame] | 3801 | hba->lrb = devm_kzalloc(hba->dev, |
| 3802 | hba->nutrs * sizeof(struct ufshcd_lrb), |
| 3803 | GFP_KERNEL); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3804 | if (!hba->lrb) { |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 3805 | dev_err(hba->dev, "LRB Memory allocation failed\n"); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3806 | goto out; |
| 3807 | } |
| 3808 | return 0; |
| 3809 | out: |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3810 | return -ENOMEM; |
| 3811 | } |
| 3812 | |
| 3813 | /** |
| 3814 | * ufshcd_host_memory_configure - configure local reference block with |
| 3815 | * memory offsets |
| 3816 | * @hba: per adapter instance |
| 3817 | * |
| 3818 | * Configure Host memory space |
| 3819 | * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA |
| 3820 | * address. |
| 3821 | * 2. Update each UTRD with Response UPIU offset, Response UPIU length |
| 3822 | * and PRDT offset. |
| 3823 | * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT |
| 3824 | * into local reference block. |
| 3825 | */ |
| 3826 | static void ufshcd_host_memory_configure(struct ufs_hba *hba) |
| 3827 | { |
| 3828 | struct utp_transfer_cmd_desc *cmd_descp; |
| 3829 | struct utp_transfer_req_desc *utrdlp; |
| 3830 | dma_addr_t cmd_desc_dma_addr; |
| 3831 | dma_addr_t cmd_desc_element_addr; |
| 3832 | u16 response_offset; |
| 3833 | u16 prdt_offset; |
| 3834 | int cmd_desc_size; |
| 3835 | int i; |
| 3836 | |
| 3837 | utrdlp = hba->utrdl_base_addr; |
| 3838 | cmd_descp = hba->ucdl_base_addr; |
| 3839 | |
| 3840 | response_offset = |
| 3841 | offsetof(struct utp_transfer_cmd_desc, response_upiu); |
| 3842 | prdt_offset = |
| 3843 | offsetof(struct utp_transfer_cmd_desc, prd_table); |
| 3844 | |
| 3845 | cmd_desc_size = sizeof(struct utp_transfer_cmd_desc); |
| 3846 | cmd_desc_dma_addr = hba->ucdl_dma_addr; |
| 3847 | |
| 3848 | for (i = 0; i < hba->nutrs; i++) { |
| 3849 | /* Configure UTRD with command descriptor base address */ |
| 3850 | cmd_desc_element_addr = |
| 3851 | (cmd_desc_dma_addr + (cmd_desc_size * i)); |
| 3852 | utrdlp[i].command_desc_base_addr_lo = |
| 3853 | cpu_to_le32(lower_32_bits(cmd_desc_element_addr)); |
| 3854 | utrdlp[i].command_desc_base_addr_hi = |
| 3855 | cpu_to_le32(upper_32_bits(cmd_desc_element_addr)); |
| 3856 | |
| 3857 | /* Response upiu and prdt offset should be in double words */ |
| 3858 | utrdlp[i].response_upiu_offset = |
| 3859 | cpu_to_le16((response_offset >> 2)); |
| 3860 | utrdlp[i].prd_table_offset = |
| 3861 | cpu_to_le16((prdt_offset >> 2)); |
| 3862 | utrdlp[i].response_upiu_length = |
Sujit Reddy Thumma | 3ca316c | 2013-06-26 22:39:30 +0530 | [diff] [blame] | 3863 | cpu_to_le16(ALIGNED_UPIU_SIZE >> 2); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3864 | |
| 3865 | hba->lrb[i].utr_descriptor_ptr = (utrdlp + i); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3866 | hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr + |
| 3867 | (i * sizeof(struct utp_transfer_req_desc)); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 3868 | hba->lrb[i].ucd_req_ptr = |
| 3869 | (struct utp_upiu_req *)(cmd_descp + i); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3870 | hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3871 | hba->lrb[i].ucd_rsp_ptr = |
| 3872 | (struct utp_upiu_rsp *)cmd_descp[i].response_upiu; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3873 | hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr + |
| 3874 | response_offset; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3875 | hba->lrb[i].ucd_prdt_ptr = |
| 3876 | (struct ufshcd_sg_entry *)cmd_descp[i].prd_table; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3877 | hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr + |
| 3878 | prdt_offset; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3879 | } |
| 3880 | } |
| 3881 | |
| 3882 | /** |
| 3883 | * ufshcd_dme_link_startup - Notify Unipro to perform link startup |
| 3884 | * @hba: per adapter instance |
| 3885 | * |
| 3886 | * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer, |
| 3887 | * in order to initialize the Unipro link startup procedure. |
| 3888 | * Once the Unipro links are up, the device connected to the controller |
| 3889 | * is detected. |
| 3890 | * |
| 3891 | * Returns 0 on success, non-zero value on failure |
| 3892 | */ |
| 3893 | static int ufshcd_dme_link_startup(struct ufs_hba *hba) |
| 3894 | { |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 3895 | struct uic_command uic_cmd = {0}; |
| 3896 | int ret; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3897 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 3898 | uic_cmd.command = UIC_CMD_DME_LINK_STARTUP; |
| 3899 | |
| 3900 | ret = ufshcd_send_uic_cmd(hba, &uic_cmd); |
| 3901 | if (ret) |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3902 | dev_dbg(hba->dev, |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 3903 | "dme-link-startup: error code %d\n", ret); |
| 3904 | return ret; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3905 | } |
| 3906 | |
Yaniv Gardi | cad2e03 | 2015-03-31 17:37:14 +0300 | [diff] [blame] | 3907 | static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba) |
| 3908 | { |
| 3909 | #define MIN_DELAY_BEFORE_DME_CMDS_US 1000 |
| 3910 | unsigned long min_sleep_time_us; |
| 3911 | |
| 3912 | if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS)) |
| 3913 | return; |
| 3914 | |
| 3915 | /* |
| 3916 | * last_dme_cmd_tstamp will be 0 only for 1st call to |
| 3917 | * this function |
| 3918 | */ |
| 3919 | if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) { |
| 3920 | min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US; |
| 3921 | } else { |
| 3922 | unsigned long delta = |
| 3923 | (unsigned long) ktime_to_us( |
| 3924 | ktime_sub(ktime_get(), |
| 3925 | hba->last_dme_cmd_tstamp)); |
| 3926 | |
| 3927 | if (delta < MIN_DELAY_BEFORE_DME_CMDS_US) |
| 3928 | min_sleep_time_us = |
| 3929 | MIN_DELAY_BEFORE_DME_CMDS_US - delta; |
| 3930 | else |
| 3931 | return; /* no more delay required */ |
| 3932 | } |
| 3933 | |
| 3934 | /* allow sleep for extra 50us if needed */ |
| 3935 | usleep_range(min_sleep_time_us, min_sleep_time_us + 50); |
| 3936 | } |
| 3937 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3938 | static inline void ufshcd_save_tstamp_of_last_dme_cmd( |
| 3939 | struct ufs_hba *hba) |
| 3940 | { |
| 3941 | if (hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS) |
| 3942 | hba->last_dme_cmd_tstamp = ktime_get(); |
| 3943 | } |
| 3944 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 3945 | /** |
Seungwon Jeon | 12b4fdb | 2013-08-31 21:40:21 +0530 | [diff] [blame] | 3946 | * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET |
| 3947 | * @hba: per adapter instance |
| 3948 | * @attr_sel: uic command argument1 |
| 3949 | * @attr_set: attribute set type as uic command argument2 |
| 3950 | * @mib_val: setting value as uic command argument3 |
| 3951 | * @peer: indicate whether peer or local |
| 3952 | * |
| 3953 | * Returns 0 on success, non-zero value on failure |
| 3954 | */ |
| 3955 | int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel, |
| 3956 | u8 attr_set, u32 mib_val, u8 peer) |
| 3957 | { |
| 3958 | struct uic_command uic_cmd = {0}; |
| 3959 | static const char *const action[] = { |
| 3960 | "dme-set", |
| 3961 | "dme-peer-set" |
| 3962 | }; |
| 3963 | const char *set = action[!!peer]; |
| 3964 | int ret; |
Yaniv Gardi | 64238fb | 2016-02-01 15:02:43 +0200 | [diff] [blame] | 3965 | int retries = UFS_UIC_COMMAND_RETRIES; |
Seungwon Jeon | 12b4fdb | 2013-08-31 21:40:21 +0530 | [diff] [blame] | 3966 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3967 | ufsdbg_error_inject_dispatcher(hba, |
| 3968 | ERR_INJECT_DME_ATTR, attr_sel, &attr_sel); |
| 3969 | |
Seungwon Jeon | 12b4fdb | 2013-08-31 21:40:21 +0530 | [diff] [blame] | 3970 | uic_cmd.command = peer ? |
| 3971 | UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET; |
| 3972 | uic_cmd.argument1 = attr_sel; |
| 3973 | uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set); |
| 3974 | uic_cmd.argument3 = mib_val; |
| 3975 | |
Yaniv Gardi | 64238fb | 2016-02-01 15:02:43 +0200 | [diff] [blame] | 3976 | do { |
| 3977 | /* for peer attributes we retry upon failure */ |
| 3978 | ret = ufshcd_send_uic_cmd(hba, &uic_cmd); |
| 3979 | if (ret) |
| 3980 | dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n", |
| 3981 | set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret); |
| 3982 | } while (ret && peer && --retries); |
| 3983 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3984 | if (ret) |
Yaniv Gardi | 64238fb | 2016-02-01 15:02:43 +0200 | [diff] [blame] | 3985 | dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n", |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 3986 | set, UIC_GET_ATTR_ID(attr_sel), mib_val, |
| 3987 | UFS_UIC_COMMAND_RETRIES - retries); |
Seungwon Jeon | 12b4fdb | 2013-08-31 21:40:21 +0530 | [diff] [blame] | 3988 | |
| 3989 | return ret; |
| 3990 | } |
| 3991 | EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr); |
| 3992 | |
| 3993 | /** |
| 3994 | * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET |
| 3995 | * @hba: per adapter instance |
| 3996 | * @attr_sel: uic command argument1 |
| 3997 | * @mib_val: the value of the attribute as returned by the UIC command |
| 3998 | * @peer: indicate whether peer or local |
| 3999 | * |
| 4000 | * Returns 0 on success, non-zero value on failure |
| 4001 | */ |
| 4002 | int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel, |
| 4003 | u32 *mib_val, u8 peer) |
| 4004 | { |
| 4005 | struct uic_command uic_cmd = {0}; |
| 4006 | static const char *const action[] = { |
| 4007 | "dme-get", |
| 4008 | "dme-peer-get" |
| 4009 | }; |
| 4010 | const char *get = action[!!peer]; |
| 4011 | int ret; |
Yaniv Gardi | 64238fb | 2016-02-01 15:02:43 +0200 | [diff] [blame] | 4012 | int retries = UFS_UIC_COMMAND_RETRIES; |
Yaniv Gardi | 874237f | 2015-05-17 18:55:03 +0300 | [diff] [blame] | 4013 | struct ufs_pa_layer_attr orig_pwr_info; |
| 4014 | struct ufs_pa_layer_attr temp_pwr_info; |
| 4015 | bool pwr_mode_change = false; |
| 4016 | |
| 4017 | if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) { |
| 4018 | orig_pwr_info = hba->pwr_info; |
| 4019 | temp_pwr_info = orig_pwr_info; |
| 4020 | |
| 4021 | if (orig_pwr_info.pwr_tx == FAST_MODE || |
| 4022 | orig_pwr_info.pwr_rx == FAST_MODE) { |
| 4023 | temp_pwr_info.pwr_tx = FASTAUTO_MODE; |
| 4024 | temp_pwr_info.pwr_rx = FASTAUTO_MODE; |
| 4025 | pwr_mode_change = true; |
| 4026 | } else if (orig_pwr_info.pwr_tx == SLOW_MODE || |
| 4027 | orig_pwr_info.pwr_rx == SLOW_MODE) { |
| 4028 | temp_pwr_info.pwr_tx = SLOWAUTO_MODE; |
| 4029 | temp_pwr_info.pwr_rx = SLOWAUTO_MODE; |
| 4030 | pwr_mode_change = true; |
| 4031 | } |
| 4032 | if (pwr_mode_change) { |
| 4033 | ret = ufshcd_change_power_mode(hba, &temp_pwr_info); |
| 4034 | if (ret) |
| 4035 | goto out; |
| 4036 | } |
| 4037 | } |
Seungwon Jeon | 12b4fdb | 2013-08-31 21:40:21 +0530 | [diff] [blame] | 4038 | |
| 4039 | uic_cmd.command = peer ? |
| 4040 | UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4041 | |
| 4042 | ufsdbg_error_inject_dispatcher(hba, |
| 4043 | ERR_INJECT_DME_ATTR, attr_sel, &attr_sel); |
| 4044 | |
Seungwon Jeon | 12b4fdb | 2013-08-31 21:40:21 +0530 | [diff] [blame] | 4045 | uic_cmd.argument1 = attr_sel; |
| 4046 | |
Yaniv Gardi | 64238fb | 2016-02-01 15:02:43 +0200 | [diff] [blame] | 4047 | do { |
| 4048 | /* for peer attributes we retry upon failure */ |
| 4049 | ret = ufshcd_send_uic_cmd(hba, &uic_cmd); |
| 4050 | if (ret) |
| 4051 | dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n", |
| 4052 | get, UIC_GET_ATTR_ID(attr_sel), ret); |
| 4053 | } while (ret && peer && --retries); |
Seungwon Jeon | 12b4fdb | 2013-08-31 21:40:21 +0530 | [diff] [blame] | 4054 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4055 | if (ret) |
Yaniv Gardi | 64238fb | 2016-02-01 15:02:43 +0200 | [diff] [blame] | 4056 | dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n", |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4057 | get, UIC_GET_ATTR_ID(attr_sel), |
| 4058 | UFS_UIC_COMMAND_RETRIES - retries); |
Yaniv Gardi | 64238fb | 2016-02-01 15:02:43 +0200 | [diff] [blame] | 4059 | |
| 4060 | if (mib_val && !ret) |
Seungwon Jeon | 12b4fdb | 2013-08-31 21:40:21 +0530 | [diff] [blame] | 4061 | *mib_val = uic_cmd.argument3; |
Yaniv Gardi | 874237f | 2015-05-17 18:55:03 +0300 | [diff] [blame] | 4062 | |
| 4063 | if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE) |
| 4064 | && pwr_mode_change) |
| 4065 | ufshcd_change_power_mode(hba, &orig_pwr_info); |
Seungwon Jeon | 12b4fdb | 2013-08-31 21:40:21 +0530 | [diff] [blame] | 4066 | out: |
| 4067 | return ret; |
| 4068 | } |
| 4069 | EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr); |
| 4070 | |
| 4071 | /** |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4072 | * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power |
| 4073 | * state) and waits for it to take effect. |
| 4074 | * |
| 4075 | * @hba: per adapter instance |
| 4076 | * @cmd: UIC command to execute |
| 4077 | * |
| 4078 | * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER & |
| 4079 | * DME_HIBERNATE_EXIT commands take some time to take its effect on both host |
| 4080 | * and device UniPro link and hence it's final completion would be indicated by |
| 4081 | * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in |
| 4082 | * addition to normal UIC command completion Status (UCCS). This function only |
| 4083 | * returns after the relevant status bits indicate the completion. |
| 4084 | * |
| 4085 | * Returns 0 on success, non-zero value on failure |
| 4086 | */ |
| 4087 | static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd) |
| 4088 | { |
| 4089 | struct completion uic_async_done; |
| 4090 | unsigned long flags; |
| 4091 | u8 status; |
| 4092 | int ret; |
Yaniv Gardi | d75f7fe | 2016-02-01 15:02:47 +0200 | [diff] [blame] | 4093 | bool reenable_intr = false; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4094 | |
| 4095 | mutex_lock(&hba->uic_cmd_mutex); |
| 4096 | init_completion(&uic_async_done); |
Yaniv Gardi | cad2e03 | 2015-03-31 17:37:14 +0300 | [diff] [blame] | 4097 | ufshcd_add_delay_before_dme_cmd(hba); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4098 | |
| 4099 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 4100 | hba->uic_async_done = &uic_async_done; |
Yaniv Gardi | d75f7fe | 2016-02-01 15:02:47 +0200 | [diff] [blame] | 4101 | if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) { |
| 4102 | ufshcd_disable_intr(hba, UIC_COMMAND_COMPL); |
| 4103 | /* |
| 4104 | * Make sure UIC command completion interrupt is disabled before |
| 4105 | * issuing UIC command. |
| 4106 | */ |
| 4107 | wmb(); |
| 4108 | reenable_intr = true; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4109 | } |
Yaniv Gardi | d75f7fe | 2016-02-01 15:02:47 +0200 | [diff] [blame] | 4110 | ret = __ufshcd_send_uic_cmd(hba, cmd, false); |
| 4111 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4112 | if (ret) { |
| 4113 | dev_err(hba->dev, |
| 4114 | "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n", |
| 4115 | cmd->command, cmd->argument3, ret); |
| 4116 | goto out; |
| 4117 | } |
| 4118 | |
| 4119 | if (!wait_for_completion_timeout(hba->uic_async_done, |
| 4120 | msecs_to_jiffies(UIC_CMD_TIMEOUT))) { |
| 4121 | dev_err(hba->dev, |
| 4122 | "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n", |
| 4123 | cmd->command, cmd->argument3); |
| 4124 | ret = -ETIMEDOUT; |
| 4125 | goto out; |
| 4126 | } |
| 4127 | |
| 4128 | status = ufshcd_get_upmcrs(hba); |
| 4129 | if (status != PWR_LOCAL) { |
| 4130 | dev_err(hba->dev, |
Kiwoong Kim | 7361542 | 2016-09-08 16:50:02 +0900 | [diff] [blame] | 4131 | "pwr ctrl cmd 0x%0x failed, host upmcrs:0x%x\n", |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4132 | cmd->command, status); |
| 4133 | ret = (status != PWR_OK) ? status : -1; |
| 4134 | } |
| 4135 | out: |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 4136 | if (ret) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4137 | ufsdbg_set_err_state(hba); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 4138 | ufshcd_print_host_state(hba); |
| 4139 | ufshcd_print_pwr_info(hba); |
| 4140 | ufshcd_print_host_regs(hba); |
| 4141 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4142 | |
| 4143 | ufshcd_save_tstamp_of_last_dme_cmd(hba); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4144 | spin_lock_irqsave(hba->host->host_lock, flags); |
Yaniv Gardi | d75f7fe | 2016-02-01 15:02:47 +0200 | [diff] [blame] | 4145 | hba->active_uic_cmd = NULL; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4146 | hba->uic_async_done = NULL; |
Yaniv Gardi | d75f7fe | 2016-02-01 15:02:47 +0200 | [diff] [blame] | 4147 | if (reenable_intr) |
| 4148 | ufshcd_enable_intr(hba, UIC_COMMAND_COMPL); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4149 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 4150 | mutex_unlock(&hba->uic_cmd_mutex); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4151 | return ret; |
| 4152 | } |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 4153 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4154 | int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba, u64 wait_timeout_us) |
| 4155 | { |
| 4156 | unsigned long flags; |
| 4157 | int ret = 0; |
| 4158 | u32 tm_doorbell; |
| 4159 | u32 tr_doorbell; |
| 4160 | bool timeout = false, do_last_check = false; |
| 4161 | ktime_t start; |
| 4162 | |
| 4163 | ufshcd_hold_all(hba); |
| 4164 | spin_lock_irqsave(hba->host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4165 | /* |
| 4166 | * Wait for all the outstanding tasks/transfer requests. |
| 4167 | * Verify by checking the doorbell registers are clear. |
| 4168 | */ |
| 4169 | start = ktime_get(); |
| 4170 | do { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 4171 | if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) { |
| 4172 | ret = -EBUSY; |
| 4173 | goto out; |
| 4174 | } |
| 4175 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4176 | tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL); |
| 4177 | tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL); |
| 4178 | if (!tm_doorbell && !tr_doorbell) { |
| 4179 | timeout = false; |
| 4180 | break; |
| 4181 | } else if (do_last_check) { |
| 4182 | break; |
| 4183 | } |
| 4184 | |
| 4185 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 4186 | schedule(); |
| 4187 | if (ktime_to_us(ktime_sub(ktime_get(), start)) > |
| 4188 | wait_timeout_us) { |
| 4189 | timeout = true; |
| 4190 | /* |
| 4191 | * We might have scheduled out for long time so make |
| 4192 | * sure to check if doorbells are cleared by this time |
| 4193 | * or not. |
| 4194 | */ |
| 4195 | do_last_check = true; |
| 4196 | } |
| 4197 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 4198 | } while (tm_doorbell || tr_doorbell); |
| 4199 | |
| 4200 | if (timeout) { |
| 4201 | dev_err(hba->dev, |
| 4202 | "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n", |
| 4203 | __func__, tm_doorbell, tr_doorbell); |
| 4204 | ret = -EBUSY; |
| 4205 | } |
| 4206 | out: |
| 4207 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 4208 | ufshcd_release_all(hba); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4209 | return ret; |
| 4210 | } |
| 4211 | |
| 4212 | /** |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 4213 | * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage |
| 4214 | * using DME_SET primitives. |
| 4215 | * @hba: per adapter instance |
| 4216 | * @mode: powr mode value |
| 4217 | * |
| 4218 | * Returns 0 on success, non-zero value on failure |
| 4219 | */ |
Sujit Reddy Thumma | bdbe5d2 | 2014-05-26 10:59:11 +0530 | [diff] [blame] | 4220 | static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode) |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 4221 | { |
| 4222 | struct uic_command uic_cmd = {0}; |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 4223 | int ret; |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 4224 | |
Yaniv Gardi | c3a2f9e | 2015-05-17 18:55:01 +0300 | [diff] [blame] | 4225 | if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) { |
| 4226 | ret = ufshcd_dme_set(hba, |
| 4227 | UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1); |
| 4228 | if (ret) { |
| 4229 | dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n", |
| 4230 | __func__, ret); |
| 4231 | goto out; |
| 4232 | } |
| 4233 | } |
| 4234 | |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 4235 | uic_cmd.command = UIC_CMD_DME_SET; |
| 4236 | uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE); |
| 4237 | uic_cmd.argument3 = mode; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4238 | ufshcd_hold_all(hba); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 4239 | ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4240 | ufshcd_release_all(hba); |
Yaniv Gardi | c3a2f9e | 2015-05-17 18:55:01 +0300 | [diff] [blame] | 4241 | out: |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 4242 | return ret; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4243 | } |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 4244 | |
Yaniv Gardi | 53c12d0 | 2016-02-01 15:02:45 +0200 | [diff] [blame] | 4245 | static int ufshcd_link_recovery(struct ufs_hba *hba) |
| 4246 | { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 4247 | int ret = 0; |
Yaniv Gardi | 53c12d0 | 2016-02-01 15:02:45 +0200 | [diff] [blame] | 4248 | unsigned long flags; |
| 4249 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 4250 | /* |
| 4251 | * Check if there is any race with fatal error handling. |
| 4252 | * If so, wait for it to complete. Even though fatal error |
| 4253 | * handling does reset and restore in some cases, don't assume |
| 4254 | * anything out of it. We are just avoiding race here. |
| 4255 | */ |
| 4256 | do { |
| 4257 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 4258 | if (!(work_pending(&hba->eh_work) || |
| 4259 | hba->ufshcd_state == UFSHCD_STATE_RESET)) |
| 4260 | break; |
| 4261 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 4262 | dev_dbg(hba->dev, "%s: reset in progress\n", __func__); |
| 4263 | flush_work(&hba->eh_work); |
| 4264 | } while (1); |
| 4265 | |
| 4266 | |
| 4267 | /* |
| 4268 | * we don't know if previous reset had really reset the host controller |
| 4269 | * or not. So let's force reset here to be sure. |
| 4270 | */ |
| 4271 | hba->ufshcd_state = UFSHCD_STATE_ERROR; |
| 4272 | hba->force_host_reset = true; |
| 4273 | schedule_work(&hba->eh_work); |
| 4274 | |
| 4275 | /* wait for the reset work to finish */ |
| 4276 | do { |
| 4277 | if (!(work_pending(&hba->eh_work) || |
| 4278 | hba->ufshcd_state == UFSHCD_STATE_RESET)) |
| 4279 | break; |
| 4280 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 4281 | dev_dbg(hba->dev, "%s: reset in progress\n", __func__); |
| 4282 | flush_work(&hba->eh_work); |
| 4283 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 4284 | } while (1); |
| 4285 | |
| 4286 | if (!((hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) && |
| 4287 | ufshcd_is_link_active(hba))) |
| 4288 | ret = -ENOLINK; |
Yaniv Gardi | 53c12d0 | 2016-02-01 15:02:45 +0200 | [diff] [blame] | 4289 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 4290 | |
Yaniv Gardi | 53c12d0 | 2016-02-01 15:02:45 +0200 | [diff] [blame] | 4291 | return ret; |
| 4292 | } |
| 4293 | |
Yaniv Gardi | 87d0b4a | 2016-02-01 15:02:44 +0200 | [diff] [blame] | 4294 | static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba) |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4295 | { |
Yaniv Gardi | 87d0b4a | 2016-02-01 15:02:44 +0200 | [diff] [blame] | 4296 | int ret; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4297 | struct uic_command uic_cmd = {0}; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4298 | ktime_t start = ktime_get(); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4299 | |
| 4300 | uic_cmd.command = UIC_CMD_DME_HIBER_ENTER; |
Yaniv Gardi | 87d0b4a | 2016-02-01 15:02:44 +0200 | [diff] [blame] | 4301 | ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4302 | trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter", |
| 4303 | ktime_to_us(ktime_sub(ktime_get(), start)), ret); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4304 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 4305 | /* |
| 4306 | * Do full reinit if enter failed or if LINERESET was detected during |
| 4307 | * Hibern8 operation. After LINERESET, link moves to default PWM-G1 |
| 4308 | * mode hence full reinit is required to move link to HS speeds. |
| 4309 | */ |
| 4310 | if (ret || hba->full_init_linereset) { |
Subhash Jadavani | 68e1171 | 2017-03-24 14:44:01 -0700 | [diff] [blame] | 4311 | int err; |
| 4312 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 4313 | hba->full_init_linereset = false; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4314 | ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_ENTER); |
| 4315 | dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d", |
Yaniv Gardi | 87d0b4a | 2016-02-01 15:02:44 +0200 | [diff] [blame] | 4316 | __func__, ret); |
Yaniv Gardi | 53c12d0 | 2016-02-01 15:02:45 +0200 | [diff] [blame] | 4317 | /* |
Subhash Jadavani | 68e1171 | 2017-03-24 14:44:01 -0700 | [diff] [blame] | 4318 | * If link recovery fails then return error code (-ENOLINK) |
| 4319 | * returned ufshcd_link_recovery(). |
| 4320 | * If link recovery succeeds then return -EAGAIN to attempt |
| 4321 | * hibern8 enter retry again. |
Yaniv Gardi | 53c12d0 | 2016-02-01 15:02:45 +0200 | [diff] [blame] | 4322 | */ |
Subhash Jadavani | 68e1171 | 2017-03-24 14:44:01 -0700 | [diff] [blame] | 4323 | err = ufshcd_link_recovery(hba); |
| 4324 | if (err) { |
| 4325 | dev_err(hba->dev, "%s: link recovery failed", __func__); |
| 4326 | ret = err; |
| 4327 | } else { |
| 4328 | ret = -EAGAIN; |
| 4329 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4330 | } else { |
| 4331 | dev_dbg(hba->dev, "%s: Hibern8 Enter at %lld us", __func__, |
| 4332 | ktime_to_us(ktime_get())); |
Yaniv Gardi | 53c12d0 | 2016-02-01 15:02:45 +0200 | [diff] [blame] | 4333 | } |
| 4334 | |
Yaniv Gardi | 87d0b4a | 2016-02-01 15:02:44 +0200 | [diff] [blame] | 4335 | return ret; |
| 4336 | } |
| 4337 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4338 | int ufshcd_uic_hibern8_enter(struct ufs_hba *hba) |
Yaniv Gardi | 87d0b4a | 2016-02-01 15:02:44 +0200 | [diff] [blame] | 4339 | { |
| 4340 | int ret = 0, retries; |
| 4341 | |
| 4342 | for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) { |
| 4343 | ret = __ufshcd_uic_hibern8_enter(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4344 | if (!ret) |
Yaniv Gardi | 87d0b4a | 2016-02-01 15:02:44 +0200 | [diff] [blame] | 4345 | goto out; |
Subhash Jadavani | 68e1171 | 2017-03-24 14:44:01 -0700 | [diff] [blame] | 4346 | else if (ret != -EAGAIN) |
| 4347 | /* Unable to recover the link, so no point proceeding */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4348 | BUG(); |
Yaniv Gardi | 87d0b4a | 2016-02-01 15:02:44 +0200 | [diff] [blame] | 4349 | } |
| 4350 | out: |
| 4351 | return ret; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4352 | } |
| 4353 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4354 | int ufshcd_uic_hibern8_exit(struct ufs_hba *hba) |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4355 | { |
| 4356 | struct uic_command uic_cmd = {0}; |
| 4357 | int ret; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4358 | ktime_t start = ktime_get(); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4359 | |
| 4360 | uic_cmd.command = UIC_CMD_DME_HIBER_EXIT; |
| 4361 | ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4362 | trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit", |
| 4363 | ktime_to_us(ktime_sub(ktime_get(), start)), ret); |
| 4364 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 4365 | /* Do full reinit if exit failed */ |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 4366 | if (ret) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4367 | ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_EXIT); |
| 4368 | dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d", |
Yaniv Gardi | 53c12d0 | 2016-02-01 15:02:45 +0200 | [diff] [blame] | 4369 | __func__, ret); |
| 4370 | ret = ufshcd_link_recovery(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4371 | /* Unable to recover the link, so no point proceeding */ |
| 4372 | if (ret) |
| 4373 | BUG(); |
| 4374 | } else { |
| 4375 | dev_dbg(hba->dev, "%s: Hibern8 Exit at %lld us", __func__, |
| 4376 | ktime_to_us(ktime_get())); |
| 4377 | hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get(); |
| 4378 | hba->ufs_stats.hibern8_exit_cnt++; |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 4379 | } |
| 4380 | |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 4381 | return ret; |
| 4382 | } |
| 4383 | |
Yaniv Gardi | 5064636 | 2014-10-23 13:25:13 +0300 | [diff] [blame] | 4384 | /** |
| 4385 | * ufshcd_init_pwr_info - setting the POR (power on reset) |
| 4386 | * values in hba power info |
| 4387 | * @hba: per-adapter instance |
| 4388 | */ |
| 4389 | static void ufshcd_init_pwr_info(struct ufs_hba *hba) |
| 4390 | { |
| 4391 | hba->pwr_info.gear_rx = UFS_PWM_G1; |
| 4392 | hba->pwr_info.gear_tx = UFS_PWM_G1; |
| 4393 | hba->pwr_info.lane_rx = 1; |
| 4394 | hba->pwr_info.lane_tx = 1; |
| 4395 | hba->pwr_info.pwr_rx = SLOWAUTO_MODE; |
| 4396 | hba->pwr_info.pwr_tx = SLOWAUTO_MODE; |
| 4397 | hba->pwr_info.hs_rate = 0; |
| 4398 | } |
| 4399 | |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 4400 | /** |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4401 | * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device |
| 4402 | * @hba: per-adapter instance |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4403 | */ |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4404 | static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba) |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4405 | { |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4406 | struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info; |
| 4407 | |
| 4408 | if (hba->max_pwr_info.is_valid) |
| 4409 | return 0; |
| 4410 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4411 | pwr_info->pwr_tx = FAST_MODE; |
| 4412 | pwr_info->pwr_rx = FAST_MODE; |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4413 | pwr_info->hs_rate = PA_HS_MODE_B; |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4414 | |
| 4415 | /* Get the connected lane count */ |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4416 | ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES), |
| 4417 | &pwr_info->lane_rx); |
| 4418 | ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), |
| 4419 | &pwr_info->lane_tx); |
| 4420 | |
| 4421 | if (!pwr_info->lane_rx || !pwr_info->lane_tx) { |
| 4422 | dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n", |
| 4423 | __func__, |
| 4424 | pwr_info->lane_rx, |
| 4425 | pwr_info->lane_tx); |
| 4426 | return -EINVAL; |
| 4427 | } |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4428 | |
| 4429 | /* |
| 4430 | * First, get the maximum gears of HS speed. |
| 4431 | * If a zero value, it means there is no HSGEAR capability. |
| 4432 | * Then, get the maximum gears of PWM speed. |
| 4433 | */ |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4434 | ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx); |
| 4435 | if (!pwr_info->gear_rx) { |
| 4436 | ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR), |
| 4437 | &pwr_info->gear_rx); |
| 4438 | if (!pwr_info->gear_rx) { |
| 4439 | dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n", |
| 4440 | __func__, pwr_info->gear_rx); |
| 4441 | return -EINVAL; |
Subhash Jadavani | 5e45e70 | 2016-08-09 18:43:10 -0700 | [diff] [blame] | 4442 | } else { |
| 4443 | if (hba->limit_rx_pwm_gear > 0 && |
| 4444 | (hba->limit_rx_pwm_gear < pwr_info->gear_rx)) |
| 4445 | pwr_info->gear_rx = hba->limit_rx_pwm_gear; |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4446 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4447 | pwr_info->pwr_rx = SLOW_MODE; |
Subhash Jadavani | 5e45e70 | 2016-08-09 18:43:10 -0700 | [diff] [blame] | 4448 | } else { |
| 4449 | if (hba->limit_rx_hs_gear > 0 && |
| 4450 | (hba->limit_rx_hs_gear < pwr_info->gear_rx)) |
| 4451 | pwr_info->gear_rx = hba->limit_rx_hs_gear; |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4452 | } |
| 4453 | |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4454 | ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), |
| 4455 | &pwr_info->gear_tx); |
| 4456 | if (!pwr_info->gear_tx) { |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4457 | ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR), |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4458 | &pwr_info->gear_tx); |
| 4459 | if (!pwr_info->gear_tx) { |
| 4460 | dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n", |
| 4461 | __func__, pwr_info->gear_tx); |
| 4462 | return -EINVAL; |
Subhash Jadavani | 5e45e70 | 2016-08-09 18:43:10 -0700 | [diff] [blame] | 4463 | } else { |
| 4464 | if (hba->limit_tx_pwm_gear > 0 && |
| 4465 | (hba->limit_tx_pwm_gear < pwr_info->gear_tx)) |
| 4466 | pwr_info->gear_tx = hba->limit_tx_pwm_gear; |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4467 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4468 | pwr_info->pwr_tx = SLOW_MODE; |
Subhash Jadavani | 5e45e70 | 2016-08-09 18:43:10 -0700 | [diff] [blame] | 4469 | } else { |
| 4470 | if (hba->limit_tx_hs_gear > 0 && |
| 4471 | (hba->limit_tx_hs_gear < pwr_info->gear_tx)) |
| 4472 | pwr_info->gear_tx = hba->limit_tx_hs_gear; |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4473 | } |
| 4474 | |
| 4475 | hba->max_pwr_info.is_valid = true; |
| 4476 | return 0; |
| 4477 | } |
| 4478 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4479 | int ufshcd_change_power_mode(struct ufs_hba *hba, |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4480 | struct ufs_pa_layer_attr *pwr_mode) |
| 4481 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4482 | int ret = 0; |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4483 | |
| 4484 | /* if already configured to the requested pwr_mode */ |
| 4485 | if (pwr_mode->gear_rx == hba->pwr_info.gear_rx && |
| 4486 | pwr_mode->gear_tx == hba->pwr_info.gear_tx && |
| 4487 | pwr_mode->lane_rx == hba->pwr_info.lane_rx && |
| 4488 | pwr_mode->lane_tx == hba->pwr_info.lane_tx && |
| 4489 | pwr_mode->pwr_rx == hba->pwr_info.pwr_rx && |
| 4490 | pwr_mode->pwr_tx == hba->pwr_info.pwr_tx && |
| 4491 | pwr_mode->hs_rate == hba->pwr_info.hs_rate) { |
| 4492 | dev_dbg(hba->dev, "%s: power already configured\n", __func__); |
| 4493 | return 0; |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4494 | } |
| 4495 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4496 | ufsdbg_error_inject_dispatcher(hba, ERR_INJECT_PWR_CHANGE, 0, &ret); |
| 4497 | if (ret) |
| 4498 | return ret; |
| 4499 | |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4500 | /* |
| 4501 | * Configure attributes for power mode change with below. |
| 4502 | * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION, |
| 4503 | * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION, |
| 4504 | * - PA_HSSERIES |
| 4505 | */ |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4506 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx); |
| 4507 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES), |
| 4508 | pwr_mode->lane_rx); |
| 4509 | if (pwr_mode->pwr_rx == FASTAUTO_MODE || |
| 4510 | pwr_mode->pwr_rx == FAST_MODE) |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4511 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE); |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4512 | else |
| 4513 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE); |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4514 | |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4515 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx); |
| 4516 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES), |
| 4517 | pwr_mode->lane_tx); |
| 4518 | if (pwr_mode->pwr_tx == FASTAUTO_MODE || |
| 4519 | pwr_mode->pwr_tx == FAST_MODE) |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4520 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE); |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4521 | else |
| 4522 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE); |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4523 | |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4524 | if (pwr_mode->pwr_rx == FASTAUTO_MODE || |
| 4525 | pwr_mode->pwr_tx == FASTAUTO_MODE || |
| 4526 | pwr_mode->pwr_rx == FAST_MODE || |
| 4527 | pwr_mode->pwr_tx == FAST_MODE) |
| 4528 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES), |
| 4529 | pwr_mode->hs_rate); |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4530 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4531 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0), |
| 4532 | DL_FC0ProtectionTimeOutVal_Default); |
| 4533 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1), |
| 4534 | DL_TC0ReplayTimeOutVal_Default); |
| 4535 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2), |
| 4536 | DL_AFC0ReqTimeOutVal_Default); |
| 4537 | |
| 4538 | ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal), |
| 4539 | DL_FC0ProtectionTimeOutVal_Default); |
| 4540 | ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal), |
| 4541 | DL_TC0ReplayTimeOutVal_Default); |
| 4542 | ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal), |
| 4543 | DL_AFC0ReqTimeOutVal_Default); |
| 4544 | |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4545 | ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4 |
| 4546 | | pwr_mode->pwr_tx); |
| 4547 | |
| 4548 | if (ret) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4549 | ufshcd_update_error_stats(hba, UFS_ERR_POWER_MODE_CHANGE); |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4550 | dev_err(hba->dev, |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4551 | "%s: power mode change failed %d\n", __func__, ret); |
| 4552 | } else { |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 4553 | ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL, |
| 4554 | pwr_mode); |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4555 | |
| 4556 | memcpy(&hba->pwr_info, pwr_mode, |
| 4557 | sizeof(struct ufs_pa_layer_attr)); |
| 4558 | } |
| 4559 | |
| 4560 | return ret; |
| 4561 | } |
| 4562 | |
| 4563 | /** |
| 4564 | * ufshcd_config_pwr_mode - configure a new power mode |
| 4565 | * @hba: per-adapter instance |
| 4566 | * @desired_pwr_mode: desired power configuration |
| 4567 | */ |
| 4568 | static int ufshcd_config_pwr_mode(struct ufs_hba *hba, |
| 4569 | struct ufs_pa_layer_attr *desired_pwr_mode) |
| 4570 | { |
| 4571 | struct ufs_pa_layer_attr final_params = { 0 }; |
| 4572 | int ret; |
| 4573 | |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 4574 | ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE, |
| 4575 | desired_pwr_mode, &final_params); |
| 4576 | |
| 4577 | if (ret) |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 4578 | memcpy(&final_params, desired_pwr_mode, sizeof(final_params)); |
| 4579 | |
| 4580 | ret = ufshcd_change_power_mode(hba, &final_params); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4581 | if (!ret) |
| 4582 | ufshcd_print_pwr_info(hba); |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 4583 | |
| 4584 | return ret; |
| 4585 | } |
| 4586 | |
| 4587 | /** |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 4588 | * ufshcd_complete_dev_init() - checks device readiness |
| 4589 | * hba: per-adapter instance |
| 4590 | * |
| 4591 | * Set fDeviceInit flag and poll until device toggles it. |
| 4592 | */ |
| 4593 | static int ufshcd_complete_dev_init(struct ufs_hba *hba) |
| 4594 | { |
Yaniv Gardi | dc3c8d3 | 2016-02-01 15:02:46 +0200 | [diff] [blame] | 4595 | int i; |
| 4596 | int err; |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 4597 | bool flag_res = 1; |
| 4598 | |
Yaniv Gardi | dc3c8d3 | 2016-02-01 15:02:46 +0200 | [diff] [blame] | 4599 | err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG, |
| 4600 | QUERY_FLAG_IDN_FDEVICEINIT, NULL); |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 4601 | if (err) { |
| 4602 | dev_err(hba->dev, |
| 4603 | "%s setting fDeviceInit flag failed with error %d\n", |
| 4604 | __func__, err); |
| 4605 | goto out; |
| 4606 | } |
| 4607 | |
Yaniv Gardi | dc3c8d3 | 2016-02-01 15:02:46 +0200 | [diff] [blame] | 4608 | /* poll for max. 1000 iterations for fDeviceInit flag to clear */ |
| 4609 | for (i = 0; i < 1000 && !err && flag_res; i++) |
| 4610 | err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG, |
| 4611 | QUERY_FLAG_IDN_FDEVICEINIT, &flag_res); |
| 4612 | |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 4613 | if (err) |
| 4614 | dev_err(hba->dev, |
| 4615 | "%s reading fDeviceInit flag failed with error %d\n", |
| 4616 | __func__, err); |
| 4617 | else if (flag_res) |
| 4618 | dev_err(hba->dev, |
| 4619 | "%s fDeviceInit was not cleared by the device\n", |
| 4620 | __func__); |
| 4621 | |
| 4622 | out: |
| 4623 | return err; |
| 4624 | } |
| 4625 | |
| 4626 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4627 | * ufshcd_make_hba_operational - Make UFS controller operational |
| 4628 | * @hba: per adapter instance |
| 4629 | * |
| 4630 | * To bring UFS host controller to operational state, |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 4631 | * 1. Enable required interrupts |
| 4632 | * 2. Configure interrupt aggregation |
Yaniv Gardi | 897efe6 | 2016-02-01 15:02:48 +0200 | [diff] [blame] | 4633 | * 3. Program UTRL and UTMRL base address |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 4634 | * 4. Configure run-stop-registers |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4635 | * |
| 4636 | * Returns 0 on success, non-zero value on failure |
| 4637 | */ |
| 4638 | static int ufshcd_make_hba_operational(struct ufs_hba *hba) |
| 4639 | { |
| 4640 | int err = 0; |
| 4641 | u32 reg; |
| 4642 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 4643 | /* Enable required interrupts */ |
| 4644 | ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS); |
| 4645 | |
| 4646 | /* Configure interrupt aggregation */ |
Yaniv Gardi | b852190 | 2015-05-17 18:54:57 +0300 | [diff] [blame] | 4647 | if (ufshcd_is_intr_aggr_allowed(hba)) |
| 4648 | ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO); |
| 4649 | else |
| 4650 | ufshcd_disable_intr_aggr(hba); |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 4651 | |
| 4652 | /* Configure UTRL and UTMRL base address registers */ |
| 4653 | ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr), |
| 4654 | REG_UTP_TRANSFER_REQ_LIST_BASE_L); |
| 4655 | ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr), |
| 4656 | REG_UTP_TRANSFER_REQ_LIST_BASE_H); |
| 4657 | ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr), |
| 4658 | REG_UTP_TASK_REQ_LIST_BASE_L); |
| 4659 | ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr), |
| 4660 | REG_UTP_TASK_REQ_LIST_BASE_H); |
| 4661 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4662 | /* |
Yaniv Gardi | 897efe6 | 2016-02-01 15:02:48 +0200 | [diff] [blame] | 4663 | * Make sure base address and interrupt setup are updated before |
| 4664 | * enabling the run/stop registers below. |
| 4665 | */ |
| 4666 | wmb(); |
| 4667 | |
| 4668 | /* |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4669 | * UCRDY, UTMRLDY and UTRLRDY bits must be 1 |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4670 | */ |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 4671 | reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4672 | if (!(ufshcd_get_lists_status(reg))) { |
| 4673 | ufshcd_enable_run_stop_reg(hba); |
| 4674 | } else { |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 4675 | dev_err(hba->dev, |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4676 | "Host controller not ready to process requests"); |
| 4677 | err = -EIO; |
| 4678 | goto out; |
| 4679 | } |
| 4680 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4681 | out: |
| 4682 | return err; |
| 4683 | } |
| 4684 | |
| 4685 | /** |
Yaniv Gardi | 596585a | 2016-03-10 17:37:08 +0200 | [diff] [blame] | 4686 | * ufshcd_hba_stop - Send controller to reset state |
| 4687 | * @hba: per adapter instance |
| 4688 | * @can_sleep: perform sleep or just spin |
| 4689 | */ |
| 4690 | static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep) |
| 4691 | { |
| 4692 | int err; |
| 4693 | |
| 4694 | ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE); |
| 4695 | err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE, |
| 4696 | CONTROLLER_ENABLE, CONTROLLER_DISABLE, |
| 4697 | 10, 1, can_sleep); |
| 4698 | if (err) |
| 4699 | dev_err(hba->dev, "%s: Controller disable failed\n", __func__); |
| 4700 | } |
| 4701 | |
| 4702 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4703 | * ufshcd_hba_enable - initialize the controller |
| 4704 | * @hba: per adapter instance |
| 4705 | * |
| 4706 | * The controller resets itself and controller firmware initialization |
| 4707 | * sequence kicks off. When controller is ready it will set |
| 4708 | * the Host Controller Enable bit to 1. |
| 4709 | * |
| 4710 | * Returns 0 on success, non-zero value on failure |
| 4711 | */ |
| 4712 | static int ufshcd_hba_enable(struct ufs_hba *hba) |
| 4713 | { |
| 4714 | int retry; |
| 4715 | |
| 4716 | /* |
| 4717 | * msleep of 1 and 5 used in this function might result in msleep(20), |
| 4718 | * but it was necessary to send the UFS FPGA to reset mode during |
| 4719 | * development and testing of this driver. msleep can be changed to |
| 4720 | * mdelay and retry count can be reduced based on the controller. |
| 4721 | */ |
Yaniv Gardi | 596585a | 2016-03-10 17:37:08 +0200 | [diff] [blame] | 4722 | if (!ufshcd_is_hba_active(hba)) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4723 | /* change controller state to "reset state" */ |
Yaniv Gardi | 596585a | 2016-03-10 17:37:08 +0200 | [diff] [blame] | 4724 | ufshcd_hba_stop(hba, true); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4725 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4726 | /* UniPro link is disabled at this point */ |
| 4727 | ufshcd_set_link_off(hba); |
| 4728 | |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 4729 | ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE); |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 4730 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4731 | /* start controller initialization sequence */ |
| 4732 | ufshcd_hba_start(hba); |
| 4733 | |
| 4734 | /* |
| 4735 | * To initialize a UFS host controller HCE bit must be set to 1. |
| 4736 | * During initialization the HCE bit value changes from 1->0->1. |
| 4737 | * When the host controller completes initialization sequence |
| 4738 | * it sets the value of HCE bit to 1. The same HCE bit is read back |
| 4739 | * to check if the controller has completed initialization sequence. |
| 4740 | * So without this delay the value HCE = 1, set in the previous |
| 4741 | * instruction might be read back. |
| 4742 | * This delay can be changed based on the controller. |
| 4743 | */ |
| 4744 | msleep(1); |
| 4745 | |
| 4746 | /* wait for the host controller to complete initialization */ |
| 4747 | retry = 10; |
| 4748 | while (ufshcd_is_hba_active(hba)) { |
| 4749 | if (retry) { |
| 4750 | retry--; |
| 4751 | } else { |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 4752 | dev_err(hba->dev, |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4753 | "Controller enable failed\n"); |
| 4754 | return -EIO; |
| 4755 | } |
| 4756 | msleep(5); |
| 4757 | } |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 4758 | |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 4759 | /* enable UIC related interrupts */ |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4760 | ufshcd_enable_intr(hba, UFSHCD_UIC_MASK); |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 4761 | |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 4762 | ufshcd_vops_hce_enable_notify(hba, POST_CHANGE); |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 4763 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4764 | return 0; |
| 4765 | } |
| 4766 | |
Yaniv Gardi | 7ca38cf | 2015-05-17 18:54:59 +0300 | [diff] [blame] | 4767 | static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer) |
| 4768 | { |
| 4769 | int tx_lanes, i, err = 0; |
| 4770 | |
| 4771 | if (!peer) |
| 4772 | ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), |
| 4773 | &tx_lanes); |
| 4774 | else |
| 4775 | ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), |
| 4776 | &tx_lanes); |
| 4777 | for (i = 0; i < tx_lanes; i++) { |
| 4778 | if (!peer) |
| 4779 | err = ufshcd_dme_set(hba, |
| 4780 | UIC_ARG_MIB_SEL(TX_LCC_ENABLE, |
| 4781 | UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)), |
| 4782 | 0); |
| 4783 | else |
| 4784 | err = ufshcd_dme_peer_set(hba, |
| 4785 | UIC_ARG_MIB_SEL(TX_LCC_ENABLE, |
| 4786 | UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)), |
| 4787 | 0); |
| 4788 | if (err) { |
| 4789 | dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d", |
| 4790 | __func__, peer, i, err); |
| 4791 | break; |
| 4792 | } |
| 4793 | } |
| 4794 | |
| 4795 | return err; |
| 4796 | } |
| 4797 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4798 | static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba) |
| 4799 | { |
| 4800 | return ufshcd_disable_tx_lcc(hba, false); |
| 4801 | } |
| 4802 | |
Yaniv Gardi | 7ca38cf | 2015-05-17 18:54:59 +0300 | [diff] [blame] | 4803 | static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba) |
| 4804 | { |
| 4805 | return ufshcd_disable_tx_lcc(hba, true); |
| 4806 | } |
| 4807 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4808 | /** |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 4809 | * ufshcd_link_startup - Initialize unipro link startup |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4810 | * @hba: per adapter instance |
| 4811 | * |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 4812 | * Returns 0 for success, non-zero in case of failure |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4813 | */ |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 4814 | static int ufshcd_link_startup(struct ufs_hba *hba) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4815 | { |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 4816 | int ret; |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 4817 | int retries = DME_LINKSTARTUP_RETRIES; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4818 | bool link_startup_again = false; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4819 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4820 | /* |
| 4821 | * If UFS device isn't active then we will have to issue link startup |
| 4822 | * 2 times to make sure the device state move to active. |
| 4823 | */ |
| 4824 | if (!ufshcd_is_ufs_dev_active(hba)) |
| 4825 | link_startup_again = true; |
| 4826 | |
| 4827 | link_startup: |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 4828 | do { |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 4829 | ufshcd_vops_link_startup_notify(hba, PRE_CHANGE); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4830 | |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 4831 | ret = ufshcd_dme_link_startup(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4832 | if (ret) |
| 4833 | ufshcd_update_error_stats(hba, UFS_ERR_LINKSTARTUP); |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 4834 | |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 4835 | /* check if device is detected by inter-connect layer */ |
| 4836 | if (!ret && !ufshcd_is_device_present(hba)) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4837 | ufshcd_update_error_stats(hba, UFS_ERR_LINKSTARTUP); |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 4838 | dev_err(hba->dev, "%s: Device not present\n", __func__); |
| 4839 | ret = -ENXIO; |
| 4840 | goto out; |
| 4841 | } |
| 4842 | |
| 4843 | /* |
| 4844 | * DME link lost indication is only received when link is up, |
| 4845 | * but we can't be sure if the link is up until link startup |
| 4846 | * succeeds. So reset the local Uni-Pro and try again. |
| 4847 | */ |
| 4848 | if (ret && ufshcd_hba_enable(hba)) |
| 4849 | goto out; |
| 4850 | } while (ret && retries--); |
| 4851 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 4852 | if (ret) |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 4853 | /* failed to get the link up... retire */ |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 4854 | goto out; |
| 4855 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4856 | if (link_startup_again) { |
| 4857 | link_startup_again = false; |
| 4858 | retries = DME_LINKSTARTUP_RETRIES; |
| 4859 | goto link_startup; |
| 4860 | } |
| 4861 | |
| 4862 | /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */ |
| 4863 | ufshcd_init_pwr_info(hba); |
| 4864 | ufshcd_print_pwr_info(hba); |
| 4865 | |
Yaniv Gardi | 7ca38cf | 2015-05-17 18:54:59 +0300 | [diff] [blame] | 4866 | if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) { |
| 4867 | ret = ufshcd_disable_device_tx_lcc(hba); |
| 4868 | if (ret) |
| 4869 | goto out; |
| 4870 | } |
| 4871 | |
Subhash Jadavani | 4f0df17b | 2016-12-16 13:19:27 -0800 | [diff] [blame] | 4872 | if (hba->dev_info.quirks & UFS_DEVICE_QUIRK_BROKEN_LCC) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4873 | ret = ufshcd_disable_host_tx_lcc(hba); |
| 4874 | if (ret) |
| 4875 | goto out; |
| 4876 | } |
| 4877 | |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 4878 | /* Include any host controller configuration via UIC commands */ |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 4879 | ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE); |
| 4880 | if (ret) |
| 4881 | goto out; |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 4882 | |
| 4883 | ret = ufshcd_make_hba_operational(hba); |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 4884 | out: |
Subhash Jadavani | 6808e99 | 2017-04-05 15:32:09 -0700 | [diff] [blame] | 4885 | if (ret) |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 4886 | dev_err(hba->dev, "link startup failed %d\n", ret); |
Subhash Jadavani | 6808e99 | 2017-04-05 15:32:09 -0700 | [diff] [blame] | 4887 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 4888 | return ret; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 4889 | } |
| 4890 | |
| 4891 | /** |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 4892 | * ufshcd_verify_dev_init() - Verify device initialization |
| 4893 | * @hba: per-adapter instance |
| 4894 | * |
| 4895 | * Send NOP OUT UPIU and wait for NOP IN response to check whether the |
| 4896 | * device Transport Protocol (UTP) layer is ready after a reset. |
| 4897 | * If the UTP layer at the device side is not initialized, it may |
| 4898 | * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT |
| 4899 | * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations. |
| 4900 | */ |
| 4901 | static int ufshcd_verify_dev_init(struct ufs_hba *hba) |
| 4902 | { |
| 4903 | int err = 0; |
| 4904 | int retries; |
| 4905 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4906 | ufshcd_hold_all(hba); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 4907 | mutex_lock(&hba->dev_cmd.lock); |
| 4908 | for (retries = NOP_OUT_RETRIES; retries > 0; retries--) { |
| 4909 | err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP, |
| 4910 | NOP_OUT_TIMEOUT); |
| 4911 | |
| 4912 | if (!err || err == -ETIMEDOUT) |
| 4913 | break; |
| 4914 | |
| 4915 | dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err); |
| 4916 | } |
| 4917 | mutex_unlock(&hba->dev_cmd.lock); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4918 | ufshcd_release_all(hba); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 4919 | |
| 4920 | if (err) |
| 4921 | dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err); |
| 4922 | return err; |
| 4923 | } |
| 4924 | |
| 4925 | /** |
Subhash Jadavani | 0ce147d | 2014-09-25 15:32:29 +0300 | [diff] [blame] | 4926 | * ufshcd_set_queue_depth - set lun queue depth |
| 4927 | * @sdev: pointer to SCSI device |
| 4928 | * |
| 4929 | * Read bLUQueueDepth value and activate scsi tagged command |
| 4930 | * queueing. For WLUN, queue depth is set to 1. For best-effort |
| 4931 | * cases (bLUQueueDepth = 0) the queue depth is set to a maximum |
| 4932 | * value that host can queue. |
| 4933 | */ |
| 4934 | static void ufshcd_set_queue_depth(struct scsi_device *sdev) |
| 4935 | { |
| 4936 | int ret = 0; |
| 4937 | u8 lun_qdepth; |
| 4938 | struct ufs_hba *hba; |
| 4939 | |
| 4940 | hba = shost_priv(sdev->host); |
| 4941 | |
| 4942 | lun_qdepth = hba->nutrs; |
| 4943 | ret = ufshcd_read_unit_desc_param(hba, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 4944 | ufshcd_scsi_to_upiu_lun(sdev->lun), |
| 4945 | UNIT_DESC_PARAM_LU_Q_DEPTH, |
| 4946 | &lun_qdepth, |
| 4947 | sizeof(lun_qdepth)); |
Subhash Jadavani | 0ce147d | 2014-09-25 15:32:29 +0300 | [diff] [blame] | 4948 | |
| 4949 | /* Some WLUN doesn't support unit descriptor */ |
| 4950 | if (ret == -EOPNOTSUPP) |
| 4951 | lun_qdepth = 1; |
| 4952 | else if (!lun_qdepth) |
| 4953 | /* eventually, we can figure out the real queue depth */ |
| 4954 | lun_qdepth = hba->nutrs; |
| 4955 | else |
| 4956 | lun_qdepth = min_t(int, lun_qdepth, hba->nutrs); |
| 4957 | |
| 4958 | dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n", |
| 4959 | __func__, lun_qdepth); |
Christoph Hellwig | db5ed4d | 2014-11-13 15:08:42 +0100 | [diff] [blame] | 4960 | scsi_change_queue_depth(sdev, lun_qdepth); |
Subhash Jadavani | 0ce147d | 2014-09-25 15:32:29 +0300 | [diff] [blame] | 4961 | } |
| 4962 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 4963 | /* |
| 4964 | * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR |
| 4965 | * @hba: per-adapter instance |
| 4966 | * @lun: UFS device lun id |
| 4967 | * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info |
| 4968 | * |
| 4969 | * Returns 0 in case of success and b_lu_write_protect status would be returned |
| 4970 | * @b_lu_write_protect parameter. |
| 4971 | * Returns -ENOTSUPP if reading b_lu_write_protect is not supported. |
| 4972 | * Returns -EINVAL in case of invalid parameters passed to this function. |
| 4973 | */ |
| 4974 | static int ufshcd_get_lu_wp(struct ufs_hba *hba, |
| 4975 | u8 lun, |
| 4976 | u8 *b_lu_write_protect) |
| 4977 | { |
| 4978 | int ret; |
| 4979 | |
| 4980 | if (!b_lu_write_protect) |
| 4981 | ret = -EINVAL; |
| 4982 | /* |
| 4983 | * According to UFS device spec, RPMB LU can't be write |
| 4984 | * protected so skip reading bLUWriteProtect parameter for |
| 4985 | * it. For other W-LUs, UNIT DESCRIPTOR is not available. |
| 4986 | */ |
| 4987 | else if (lun >= UFS_UPIU_MAX_GENERAL_LUN) |
| 4988 | ret = -ENOTSUPP; |
| 4989 | else |
| 4990 | ret = ufshcd_read_unit_desc_param(hba, |
| 4991 | lun, |
| 4992 | UNIT_DESC_PARAM_LU_WR_PROTECT, |
| 4993 | b_lu_write_protect, |
| 4994 | sizeof(*b_lu_write_protect)); |
| 4995 | return ret; |
| 4996 | } |
| 4997 | |
| 4998 | /** |
| 4999 | * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect |
| 5000 | * status |
| 5001 | * @hba: per-adapter instance |
| 5002 | * @sdev: pointer to SCSI device |
| 5003 | * |
| 5004 | */ |
| 5005 | static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba, |
| 5006 | struct scsi_device *sdev) |
| 5007 | { |
| 5008 | if (hba->dev_info.f_power_on_wp_en && |
| 5009 | !hba->dev_info.is_lu_power_on_wp) { |
| 5010 | u8 b_lu_write_protect; |
| 5011 | |
| 5012 | if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun), |
| 5013 | &b_lu_write_protect) && |
| 5014 | (b_lu_write_protect == UFS_LU_POWER_ON_WP)) |
| 5015 | hba->dev_info.is_lu_power_on_wp = true; |
| 5016 | } |
| 5017 | } |
| 5018 | |
Subhash Jadavani | 0ce147d | 2014-09-25 15:32:29 +0300 | [diff] [blame] | 5019 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5020 | * ufshcd_slave_alloc - handle initial SCSI device configurations |
| 5021 | * @sdev: pointer to SCSI device |
| 5022 | * |
| 5023 | * Returns success |
| 5024 | */ |
| 5025 | static int ufshcd_slave_alloc(struct scsi_device *sdev) |
| 5026 | { |
| 5027 | struct ufs_hba *hba; |
| 5028 | |
| 5029 | hba = shost_priv(sdev->host); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5030 | |
| 5031 | /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */ |
| 5032 | sdev->use_10_for_ms = 1; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5033 | |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5034 | /* allow SCSI layer to restart the device in case of errors */ |
| 5035 | sdev->allow_restart = 1; |
Sujit Reddy Thumma | 4264fd6 | 2014-06-29 09:40:20 +0300 | [diff] [blame] | 5036 | |
Sujit Reddy Thumma | b2a6c52 | 2014-07-01 12:22:38 +0300 | [diff] [blame] | 5037 | /* REPORT SUPPORTED OPERATION CODES is not supported */ |
| 5038 | sdev->no_report_opcodes = 1; |
| 5039 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5040 | /* WRITE_SAME command is not supported*/ |
| 5041 | sdev->no_write_same = 1; |
Sujit Reddy Thumma | 4264fd6 | 2014-06-29 09:40:20 +0300 | [diff] [blame] | 5042 | |
Subhash Jadavani | 0ce147d | 2014-09-25 15:32:29 +0300 | [diff] [blame] | 5043 | ufshcd_set_queue_depth(sdev); |
Sujit Reddy Thumma | 4264fd6 | 2014-06-29 09:40:20 +0300 | [diff] [blame] | 5044 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 5045 | ufshcd_get_lu_power_on_wp_status(hba, sdev); |
| 5046 | |
Sujit Reddy Thumma | 4264fd6 | 2014-06-29 09:40:20 +0300 | [diff] [blame] | 5047 | return 0; |
| 5048 | } |
| 5049 | |
| 5050 | /** |
| 5051 | * ufshcd_change_queue_depth - change queue depth |
| 5052 | * @sdev: pointer to SCSI device |
| 5053 | * @depth: required depth to set |
Sujit Reddy Thumma | 4264fd6 | 2014-06-29 09:40:20 +0300 | [diff] [blame] | 5054 | * |
Christoph Hellwig | db5ed4d | 2014-11-13 15:08:42 +0100 | [diff] [blame] | 5055 | * Change queue depth and make sure the max. limits are not crossed. |
Sujit Reddy Thumma | 4264fd6 | 2014-06-29 09:40:20 +0300 | [diff] [blame] | 5056 | */ |
Christoph Hellwig | db5ed4d | 2014-11-13 15:08:42 +0100 | [diff] [blame] | 5057 | static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth) |
Sujit Reddy Thumma | 4264fd6 | 2014-06-29 09:40:20 +0300 | [diff] [blame] | 5058 | { |
| 5059 | struct ufs_hba *hba = shost_priv(sdev->host); |
| 5060 | |
| 5061 | if (depth > hba->nutrs) |
| 5062 | depth = hba->nutrs; |
Christoph Hellwig | db5ed4d | 2014-11-13 15:08:42 +0100 | [diff] [blame] | 5063 | return scsi_change_queue_depth(sdev, depth); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5064 | } |
| 5065 | |
| 5066 | /** |
Akinobu Mita | eeda474 | 2014-07-01 23:00:32 +0900 | [diff] [blame] | 5067 | * ufshcd_slave_configure - adjust SCSI device configurations |
| 5068 | * @sdev: pointer to SCSI device |
| 5069 | */ |
| 5070 | static int ufshcd_slave_configure(struct scsi_device *sdev) |
| 5071 | { |
| 5072 | struct request_queue *q = sdev->request_queue; |
Subhash Jadavani | 5ea586f | 2016-08-17 19:08:09 -0700 | [diff] [blame] | 5073 | struct ufs_hba *hba = shost_priv(sdev->host); |
Akinobu Mita | eeda474 | 2014-07-01 23:00:32 +0900 | [diff] [blame] | 5074 | |
| 5075 | blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1); |
| 5076 | blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX); |
| 5077 | |
Subhash Jadavani | 5ea586f | 2016-08-17 19:08:09 -0700 | [diff] [blame] | 5078 | if (hba->scsi_cmd_timeout) { |
| 5079 | blk_queue_rq_timeout(q, hba->scsi_cmd_timeout * HZ); |
| 5080 | scsi_set_cmd_timeout_override(sdev, hba->scsi_cmd_timeout * HZ); |
| 5081 | } |
| 5082 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5083 | sdev->autosuspend_delay = UFSHCD_AUTO_SUSPEND_DELAY_MS; |
| 5084 | sdev->use_rpm_auto = 1; |
| 5085 | |
Akinobu Mita | eeda474 | 2014-07-01 23:00:32 +0900 | [diff] [blame] | 5086 | return 0; |
| 5087 | } |
| 5088 | |
| 5089 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5090 | * ufshcd_slave_destroy - remove SCSI device configurations |
| 5091 | * @sdev: pointer to SCSI device |
| 5092 | */ |
| 5093 | static void ufshcd_slave_destroy(struct scsi_device *sdev) |
| 5094 | { |
| 5095 | struct ufs_hba *hba; |
| 5096 | |
| 5097 | hba = shost_priv(sdev->host); |
Subhash Jadavani | 0ce147d | 2014-09-25 15:32:29 +0300 | [diff] [blame] | 5098 | /* Drop the reference as it won't be needed anymore */ |
Akinobu Mita | 7c48bfd | 2014-10-23 13:25:12 +0300 | [diff] [blame] | 5099 | if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) { |
| 5100 | unsigned long flags; |
| 5101 | |
| 5102 | spin_lock_irqsave(hba->host->host_lock, flags); |
Subhash Jadavani | 0ce147d | 2014-09-25 15:32:29 +0300 | [diff] [blame] | 5103 | hba->sdev_ufs_device = NULL; |
Akinobu Mita | 7c48bfd | 2014-10-23 13:25:12 +0300 | [diff] [blame] | 5104 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 5105 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5106 | } |
| 5107 | |
| 5108 | /** |
| 5109 | * ufshcd_task_req_compl - handle task management request completion |
| 5110 | * @hba: per adapter instance |
| 5111 | * @index: index of the completed request |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 5112 | * @resp: task management service response |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5113 | * |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 5114 | * Returns non-zero value on error, zero on success |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5115 | */ |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 5116 | static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index, u8 *resp) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5117 | { |
| 5118 | struct utp_task_req_desc *task_req_descp; |
| 5119 | struct utp_upiu_task_rsp *task_rsp_upiup; |
| 5120 | unsigned long flags; |
| 5121 | int ocs_value; |
| 5122 | int task_result; |
| 5123 | |
| 5124 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 5125 | |
| 5126 | /* Clear completed tasks from outstanding_tasks */ |
| 5127 | __clear_bit(index, &hba->outstanding_tasks); |
| 5128 | |
| 5129 | task_req_descp = hba->utmrdl_base_addr; |
| 5130 | ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]); |
| 5131 | |
| 5132 | if (ocs_value == OCS_SUCCESS) { |
| 5133 | task_rsp_upiup = (struct utp_upiu_task_rsp *) |
| 5134 | task_req_descp[index].task_rsp_upiu; |
Kiwoong Kim | 8794ee0 | 2016-09-09 08:22:22 +0900 | [diff] [blame] | 5135 | task_result = be32_to_cpu(task_rsp_upiup->output_param1); |
| 5136 | task_result = task_result & MASK_TM_SERVICE_RESP; |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 5137 | if (resp) |
| 5138 | *resp = (u8)task_result; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5139 | } else { |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 5140 | dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", |
| 5141 | __func__, ocs_value); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5142 | } |
| 5143 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 5144 | |
| 5145 | return ocs_value; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5146 | } |
| 5147 | |
| 5148 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5149 | * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status |
| 5150 | * @lrb: pointer to local reference block of completed command |
| 5151 | * @scsi_status: SCSI command status |
| 5152 | * |
| 5153 | * Returns value base on SCSI command status |
| 5154 | */ |
| 5155 | static inline int |
| 5156 | ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status) |
| 5157 | { |
| 5158 | int result = 0; |
| 5159 | |
| 5160 | switch (scsi_status) { |
Seungwon Jeon | 1c2623c | 2013-08-31 21:40:19 +0530 | [diff] [blame] | 5161 | case SAM_STAT_CHECK_CONDITION: |
| 5162 | ufshcd_copy_sense_data(lrbp); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5163 | case SAM_STAT_GOOD: |
| 5164 | result |= DID_OK << 16 | |
| 5165 | COMMAND_COMPLETE << 8 | |
Seungwon Jeon | 1c2623c | 2013-08-31 21:40:19 +0530 | [diff] [blame] | 5166 | scsi_status; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5167 | break; |
| 5168 | case SAM_STAT_TASK_SET_FULL: |
Seungwon Jeon | 1c2623c | 2013-08-31 21:40:19 +0530 | [diff] [blame] | 5169 | case SAM_STAT_BUSY: |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5170 | case SAM_STAT_TASK_ABORTED: |
Seungwon Jeon | 1c2623c | 2013-08-31 21:40:19 +0530 | [diff] [blame] | 5171 | ufshcd_copy_sense_data(lrbp); |
| 5172 | result |= scsi_status; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5173 | break; |
| 5174 | default: |
| 5175 | result |= DID_ERROR << 16; |
| 5176 | break; |
| 5177 | } /* end of switch */ |
| 5178 | |
| 5179 | return result; |
| 5180 | } |
| 5181 | |
| 5182 | /** |
| 5183 | * ufshcd_transfer_rsp_status - Get overall status of the response |
| 5184 | * @hba: per adapter instance |
| 5185 | * @lrb: pointer to local reference block of completed command |
| 5186 | * |
| 5187 | * Returns result of the command to notify SCSI midlayer |
| 5188 | */ |
| 5189 | static inline int |
| 5190 | ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp) |
| 5191 | { |
| 5192 | int result = 0; |
| 5193 | int scsi_status; |
| 5194 | int ocs; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5195 | bool print_prdt; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5196 | |
| 5197 | /* overall command status of utrd */ |
| 5198 | ocs = ufshcd_get_tr_ocs(lrbp); |
| 5199 | |
| 5200 | switch (ocs) { |
| 5201 | case OCS_SUCCESS: |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 5202 | result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5203 | hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 5204 | switch (result) { |
| 5205 | case UPIU_TRANSACTION_RESPONSE: |
| 5206 | /* |
| 5207 | * get the response UPIU result to extract |
| 5208 | * the SCSI command status |
| 5209 | */ |
| 5210 | result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr); |
| 5211 | |
| 5212 | /* |
| 5213 | * get the result based on SCSI status response |
| 5214 | * to notify the SCSI midlayer of the command status |
| 5215 | */ |
| 5216 | scsi_status = result & MASK_SCSI_STATUS; |
| 5217 | result = ufshcd_scsi_cmd_status(lrbp, scsi_status); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5218 | |
Yaniv Gardi | f05ac2e | 2016-02-01 15:02:42 +0200 | [diff] [blame] | 5219 | /* |
| 5220 | * Currently we are only supporting BKOPs exception |
| 5221 | * events hence we can ignore BKOPs exception event |
| 5222 | * during power management callbacks. BKOPs exception |
| 5223 | * event is not expected to be raised in runtime suspend |
| 5224 | * callback as it allows the urgent bkops. |
| 5225 | * During system suspend, we are anyway forcefully |
| 5226 | * disabling the bkops and if urgent bkops is needed |
| 5227 | * it will be enabled on system resume. Long term |
| 5228 | * solution could be to abort the system suspend if |
| 5229 | * UFS device needs urgent BKOPs. |
| 5230 | */ |
| 5231 | if (!hba->pm_op_in_progress && |
| 5232 | ufshcd_is_exception_event(lrbp->ucd_rsp_ptr)) |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5233 | schedule_work(&hba->eeh_work); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 5234 | break; |
| 5235 | case UPIU_TRANSACTION_REJECT_UPIU: |
| 5236 | /* TODO: handle Reject UPIU Response */ |
| 5237 | result = DID_ERROR << 16; |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 5238 | dev_err(hba->dev, |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 5239 | "Reject UPIU not fully implemented\n"); |
| 5240 | break; |
| 5241 | default: |
| 5242 | result = DID_ERROR << 16; |
| 5243 | dev_err(hba->dev, |
| 5244 | "Unexpected request response code = %x\n", |
| 5245 | result); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5246 | break; |
| 5247 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5248 | break; |
| 5249 | case OCS_ABORTED: |
| 5250 | result |= DID_ABORT << 16; |
| 5251 | break; |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5252 | case OCS_INVALID_COMMAND_STATUS: |
| 5253 | result |= DID_REQUEUE << 16; |
| 5254 | break; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5255 | case OCS_INVALID_CMD_TABLE_ATTR: |
| 5256 | case OCS_INVALID_PRDT_ATTR: |
| 5257 | case OCS_MISMATCH_DATA_BUF_SIZE: |
| 5258 | case OCS_MISMATCH_RESP_UPIU_SIZE: |
| 5259 | case OCS_PEER_COMM_FAILURE: |
| 5260 | case OCS_FATAL_ERROR: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5261 | case OCS_DEVICE_FATAL_ERROR: |
| 5262 | case OCS_INVALID_CRYPTO_CONFIG: |
| 5263 | case OCS_GENERAL_CRYPTO_ERROR: |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5264 | default: |
| 5265 | result |= DID_ERROR << 16; |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 5266 | dev_err(hba->dev, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5267 | "OCS error from controller = %x for tag %d\n", |
| 5268 | ocs, lrbp->task_tag); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5269 | /* |
| 5270 | * This is called in interrupt context, hence avoid sleep |
| 5271 | * while printing debug registers. Also print only the minimum |
| 5272 | * debug registers needed to debug OCS failure. |
| 5273 | */ |
| 5274 | __ufshcd_print_host_regs(hba, true); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5275 | ufshcd_print_host_state(hba); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5276 | break; |
| 5277 | } /* end of switch */ |
| 5278 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5279 | if ((host_byte(result) != DID_OK) && !hba->silence_err_logs) { |
| 5280 | print_prdt = (ocs == OCS_INVALID_PRDT_ATTR || |
| 5281 | ocs == OCS_MISMATCH_DATA_BUF_SIZE); |
| 5282 | ufshcd_print_trs(hba, 1 << lrbp->task_tag, print_prdt); |
| 5283 | } |
| 5284 | |
| 5285 | if ((host_byte(result) == DID_ERROR) || |
| 5286 | (host_byte(result) == DID_ABORT)) |
| 5287 | ufsdbg_set_err_state(hba); |
| 5288 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5289 | return result; |
| 5290 | } |
| 5291 | |
| 5292 | /** |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 5293 | * ufshcd_uic_cmd_compl - handle completion of uic command |
| 5294 | * @hba: per adapter instance |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 5295 | * @intr_status: interrupt status generated by the controller |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5296 | * |
| 5297 | * Returns |
| 5298 | * IRQ_HANDLED - If interrupt is valid |
| 5299 | * IRQ_NONE - If invalid interrupt |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 5300 | */ |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5301 | static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status) |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 5302 | { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5303 | irqreturn_t retval = IRQ_NONE; |
| 5304 | |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 5305 | if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) { |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 5306 | hba->active_uic_cmd->argument2 |= |
| 5307 | ufshcd_get_uic_cmd_result(hba); |
Seungwon Jeon | 12b4fdb | 2013-08-31 21:40:21 +0530 | [diff] [blame] | 5308 | hba->active_uic_cmd->argument3 = |
| 5309 | ufshcd_get_dme_attr_val(hba); |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 5310 | complete(&hba->active_uic_cmd->done); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5311 | retval = IRQ_HANDLED; |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 5312 | } |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 5313 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5314 | if (intr_status & UFSHCD_UIC_PWR_MASK) { |
| 5315 | if (hba->uic_async_done) { |
| 5316 | complete(hba->uic_async_done); |
| 5317 | retval = IRQ_HANDLED; |
| 5318 | } else if (ufshcd_is_auto_hibern8_supported(hba)) { |
| 5319 | /* |
| 5320 | * If uic_async_done flag is not set then this |
| 5321 | * is an Auto hibern8 err interrupt. |
| 5322 | * Perform a host reset followed by a full |
| 5323 | * link recovery. |
| 5324 | */ |
| 5325 | hba->ufshcd_state = UFSHCD_STATE_ERROR; |
| 5326 | hba->force_host_reset = true; |
| 5327 | dev_err(hba->dev, "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n", |
| 5328 | __func__, (intr_status & UIC_HIBERNATE_ENTER) ? |
| 5329 | "Enter" : "Exit", |
| 5330 | intr_status, ufshcd_get_upmcrs(hba)); |
| 5331 | __ufshcd_print_host_regs(hba, true); |
| 5332 | ufshcd_print_host_state(hba); |
| 5333 | schedule_work(&hba->eh_work); |
| 5334 | retval = IRQ_HANDLED; |
| 5335 | } |
| 5336 | } |
| 5337 | return retval; |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 5338 | } |
| 5339 | |
| 5340 | /** |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5341 | * ufshcd_abort_outstanding_requests - abort all outstanding transfer requests. |
| 5342 | * @hba: per adapter instance |
| 5343 | * @result: error result to inform scsi layer about |
| 5344 | */ |
| 5345 | void ufshcd_abort_outstanding_transfer_requests(struct ufs_hba *hba, int result) |
| 5346 | { |
| 5347 | u8 index; |
| 5348 | struct ufshcd_lrb *lrbp; |
| 5349 | struct scsi_cmnd *cmd; |
| 5350 | |
| 5351 | if (!hba->outstanding_reqs) |
| 5352 | return; |
| 5353 | |
| 5354 | for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) { |
| 5355 | lrbp = &hba->lrb[index]; |
| 5356 | cmd = lrbp->cmd; |
| 5357 | if (cmd) { |
| 5358 | ufshcd_cond_add_cmd_trace(hba, index, "failed"); |
| 5359 | ufshcd_update_error_stats(hba, |
| 5360 | UFS_ERR_INT_FATAL_ERRORS); |
| 5361 | scsi_dma_unmap(cmd); |
| 5362 | cmd->result = result; |
| 5363 | /* Clear pending transfer requests */ |
| 5364 | ufshcd_clear_cmd(hba, index); |
| 5365 | ufshcd_outstanding_req_clear(hba, index); |
| 5366 | clear_bit_unlock(index, &hba->lrb_in_use); |
| 5367 | lrbp->complete_time_stamp = ktime_get(); |
| 5368 | update_req_stats(hba, lrbp); |
| 5369 | /* Mark completed command as NULL in LRB */ |
| 5370 | lrbp->cmd = NULL; |
| 5371 | ufshcd_release_all(hba); |
| 5372 | if (cmd->request) { |
| 5373 | /* |
| 5374 | * As we are accessing the "request" structure, |
| 5375 | * this must be called before calling |
| 5376 | * ->scsi_done() callback. |
| 5377 | */ |
| 5378 | ufshcd_vops_pm_qos_req_end(hba, cmd->request, |
| 5379 | true); |
| 5380 | ufshcd_vops_crypto_engine_cfg_end(hba, |
| 5381 | lrbp, cmd->request); |
| 5382 | } |
| 5383 | /* Do not touch lrbp after scsi done */ |
| 5384 | cmd->scsi_done(cmd); |
| 5385 | } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) { |
| 5386 | if (hba->dev_cmd.complete) { |
| 5387 | ufshcd_cond_add_cmd_trace(hba, index, |
| 5388 | "dev_failed"); |
| 5389 | ufshcd_outstanding_req_clear(hba, index); |
| 5390 | complete(hba->dev_cmd.complete); |
| 5391 | } |
| 5392 | } |
| 5393 | if (ufshcd_is_clkscaling_supported(hba)) |
| 5394 | hba->clk_scaling.active_reqs--; |
| 5395 | } |
| 5396 | } |
| 5397 | |
| 5398 | /** |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5399 | * __ufshcd_transfer_req_compl - handle SCSI and query command completion |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5400 | * @hba: per adapter instance |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5401 | * @completed_reqs: requests to complete |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5402 | */ |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5403 | static void __ufshcd_transfer_req_compl(struct ufs_hba *hba, |
| 5404 | unsigned long completed_reqs) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5405 | { |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 5406 | struct ufshcd_lrb *lrbp; |
| 5407 | struct scsi_cmnd *cmd; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5408 | int result; |
| 5409 | int index; |
Mohan Srinivasan | 0ef170d | 2016-08-25 18:31:01 -0700 | [diff] [blame] | 5410 | struct request *req; |
Dolev Raviv | e9d501b | 2014-07-01 12:22:37 +0300 | [diff] [blame] | 5411 | |
Dolev Raviv | e9d501b | 2014-07-01 12:22:37 +0300 | [diff] [blame] | 5412 | for_each_set_bit(index, &completed_reqs, hba->nutrs) { |
| 5413 | lrbp = &hba->lrb[index]; |
| 5414 | cmd = lrbp->cmd; |
| 5415 | if (cmd) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5416 | ufshcd_cond_add_cmd_trace(hba, index, "complete"); |
| 5417 | ufshcd_update_tag_stats_completion(hba, cmd); |
Dolev Raviv | e9d501b | 2014-07-01 12:22:37 +0300 | [diff] [blame] | 5418 | result = ufshcd_transfer_rsp_status(hba, lrbp); |
| 5419 | scsi_dma_unmap(cmd); |
| 5420 | cmd->result = result; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5421 | clear_bit_unlock(index, &hba->lrb_in_use); |
| 5422 | lrbp->complete_time_stamp = ktime_get(); |
| 5423 | update_req_stats(hba, lrbp); |
Dolev Raviv | e9d501b | 2014-07-01 12:22:37 +0300 | [diff] [blame] | 5424 | /* Mark completed command as NULL in LRB */ |
| 5425 | lrbp->cmd = NULL; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5426 | __ufshcd_release(hba, false); |
| 5427 | __ufshcd_hibern8_release(hba, false); |
| 5428 | if (cmd->request) { |
| 5429 | /* |
| 5430 | * As we are accessing the "request" structure, |
| 5431 | * this must be called before calling |
| 5432 | * ->scsi_done() callback. |
| 5433 | */ |
| 5434 | ufshcd_vops_pm_qos_req_end(hba, cmd->request, |
| 5435 | false); |
| 5436 | ufshcd_vops_crypto_engine_cfg_end(hba, |
| 5437 | lrbp, cmd->request); |
| 5438 | } |
| 5439 | |
Mohan Srinivasan | 0ef170d | 2016-08-25 18:31:01 -0700 | [diff] [blame] | 5440 | req = cmd->request; |
| 5441 | if (req) { |
| 5442 | /* Update IO svc time latency histogram */ |
| 5443 | if (req->lat_hist_enabled) { |
| 5444 | ktime_t completion; |
| 5445 | u_int64_t delta_us; |
| 5446 | |
| 5447 | completion = ktime_get(); |
| 5448 | delta_us = ktime_us_delta(completion, |
| 5449 | req->lat_hist_io_start); |
| 5450 | /* rq_data_dir() => true if WRITE */ |
| 5451 | blk_update_latency_hist(&hba->io_lat_s, |
| 5452 | (rq_data_dir(req) == READ), |
| 5453 | delta_us); |
| 5454 | } |
| 5455 | } |
Dolev Raviv | e9d501b | 2014-07-01 12:22:37 +0300 | [diff] [blame] | 5456 | /* Do not touch lrbp after scsi done */ |
| 5457 | cmd->scsi_done(cmd); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5458 | } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) { |
| 5459 | if (hba->dev_cmd.complete) { |
| 5460 | ufshcd_cond_add_cmd_trace(hba, index, |
| 5461 | "dev_complete"); |
Dolev Raviv | e9d501b | 2014-07-01 12:22:37 +0300 | [diff] [blame] | 5462 | complete(hba->dev_cmd.complete); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5463 | } |
Dolev Raviv | e9d501b | 2014-07-01 12:22:37 +0300 | [diff] [blame] | 5464 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5465 | if (ufshcd_is_clkscaling_supported(hba)) |
| 5466 | hba->clk_scaling.active_reqs--; |
Dolev Raviv | e9d501b | 2014-07-01 12:22:37 +0300 | [diff] [blame] | 5467 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5468 | |
| 5469 | /* clear corresponding bits of completed commands */ |
| 5470 | hba->outstanding_reqs ^= completed_reqs; |
| 5471 | |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 5472 | ufshcd_clk_scaling_update_busy(hba); |
| 5473 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 5474 | /* we might have free'd some tags above */ |
| 5475 | wake_up(&hba->dev_cmd.tag_wq); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5476 | } |
| 5477 | |
| 5478 | /** |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5479 | * ufshcd_transfer_req_compl - handle SCSI and query command completion |
| 5480 | * @hba: per adapter instance |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5481 | * |
| 5482 | * Returns |
| 5483 | * IRQ_HANDLED - If interrupt is valid |
| 5484 | * IRQ_NONE - If invalid interrupt |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5485 | */ |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5486 | static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba) |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5487 | { |
| 5488 | unsigned long completed_reqs; |
| 5489 | u32 tr_doorbell; |
| 5490 | |
| 5491 | /* Resetting interrupt aggregation counters first and reading the |
| 5492 | * DOOR_BELL afterward allows us to handle all the completed requests. |
| 5493 | * In order to prevent other interrupts starvation the DB is read once |
| 5494 | * after reset. The down side of this solution is the possibility of |
| 5495 | * false interrupt if device completes another request after resetting |
| 5496 | * aggregation and before reading the DB. |
| 5497 | */ |
| 5498 | if (ufshcd_is_intr_aggr_allowed(hba)) |
| 5499 | ufshcd_reset_intr_aggr(hba); |
| 5500 | |
| 5501 | tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL); |
| 5502 | completed_reqs = tr_doorbell ^ hba->outstanding_reqs; |
| 5503 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5504 | if (completed_reqs) { |
| 5505 | __ufshcd_transfer_req_compl(hba, completed_reqs); |
| 5506 | return IRQ_HANDLED; |
| 5507 | } else { |
| 5508 | return IRQ_NONE; |
| 5509 | } |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5510 | } |
| 5511 | |
| 5512 | /** |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5513 | * ufshcd_disable_ee - disable exception event |
| 5514 | * @hba: per-adapter instance |
| 5515 | * @mask: exception event to disable |
| 5516 | * |
| 5517 | * Disables exception event in the device so that the EVENT_ALERT |
| 5518 | * bit is not set. |
| 5519 | * |
| 5520 | * Returns zero on success, non-zero error value on failure. |
| 5521 | */ |
| 5522 | static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask) |
| 5523 | { |
| 5524 | int err = 0; |
| 5525 | u32 val; |
| 5526 | |
| 5527 | if (!(hba->ee_ctrl_mask & mask)) |
| 5528 | goto out; |
| 5529 | |
| 5530 | val = hba->ee_ctrl_mask & ~mask; |
| 5531 | val &= 0xFFFF; /* 2 bytes */ |
Yaniv Gardi | 5e86ae4 | 2016-02-01 15:02:50 +0200 | [diff] [blame] | 5532 | err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR, |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5533 | QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val); |
| 5534 | if (!err) |
| 5535 | hba->ee_ctrl_mask &= ~mask; |
| 5536 | out: |
| 5537 | return err; |
| 5538 | } |
| 5539 | |
| 5540 | /** |
| 5541 | * ufshcd_enable_ee - enable exception event |
| 5542 | * @hba: per-adapter instance |
| 5543 | * @mask: exception event to enable |
| 5544 | * |
| 5545 | * Enable corresponding exception event in the device to allow |
| 5546 | * device to alert host in critical scenarios. |
| 5547 | * |
| 5548 | * Returns zero on success, non-zero error value on failure. |
| 5549 | */ |
| 5550 | static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask) |
| 5551 | { |
| 5552 | int err = 0; |
| 5553 | u32 val; |
| 5554 | |
| 5555 | if (hba->ee_ctrl_mask & mask) |
| 5556 | goto out; |
| 5557 | |
| 5558 | val = hba->ee_ctrl_mask | mask; |
| 5559 | val &= 0xFFFF; /* 2 bytes */ |
Yaniv Gardi | 5e86ae4 | 2016-02-01 15:02:50 +0200 | [diff] [blame] | 5560 | err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR, |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5561 | QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val); |
| 5562 | if (!err) |
| 5563 | hba->ee_ctrl_mask |= mask; |
| 5564 | out: |
| 5565 | return err; |
| 5566 | } |
| 5567 | |
| 5568 | /** |
| 5569 | * ufshcd_enable_auto_bkops - Allow device managed BKOPS |
| 5570 | * @hba: per-adapter instance |
| 5571 | * |
| 5572 | * Allow device to manage background operations on its own. Enabling |
| 5573 | * this might lead to inconsistent latencies during normal data transfers |
| 5574 | * as the device is allowed to manage its own way of handling background |
| 5575 | * operations. |
| 5576 | * |
| 5577 | * Returns zero on success, non-zero on failure. |
| 5578 | */ |
| 5579 | static int ufshcd_enable_auto_bkops(struct ufs_hba *hba) |
| 5580 | { |
| 5581 | int err = 0; |
| 5582 | |
| 5583 | if (hba->auto_bkops_enabled) |
| 5584 | goto out; |
| 5585 | |
Yaniv Gardi | dc3c8d3 | 2016-02-01 15:02:46 +0200 | [diff] [blame] | 5586 | err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG, |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5587 | QUERY_FLAG_IDN_BKOPS_EN, NULL); |
| 5588 | if (err) { |
| 5589 | dev_err(hba->dev, "%s: failed to enable bkops %d\n", |
| 5590 | __func__, err); |
| 5591 | goto out; |
| 5592 | } |
| 5593 | |
| 5594 | hba->auto_bkops_enabled = true; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5595 | trace_ufshcd_auto_bkops_state(dev_name(hba->dev), 1); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5596 | |
| 5597 | /* No need of URGENT_BKOPS exception from the device */ |
| 5598 | err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS); |
| 5599 | if (err) |
| 5600 | dev_err(hba->dev, "%s: failed to disable exception event %d\n", |
| 5601 | __func__, err); |
| 5602 | out: |
| 5603 | return err; |
| 5604 | } |
| 5605 | |
| 5606 | /** |
| 5607 | * ufshcd_disable_auto_bkops - block device in doing background operations |
| 5608 | * @hba: per-adapter instance |
| 5609 | * |
| 5610 | * Disabling background operations improves command response latency but |
| 5611 | * has drawback of device moving into critical state where the device is |
| 5612 | * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the |
| 5613 | * host is idle so that BKOPS are managed effectively without any negative |
| 5614 | * impacts. |
| 5615 | * |
| 5616 | * Returns zero on success, non-zero on failure. |
| 5617 | */ |
| 5618 | static int ufshcd_disable_auto_bkops(struct ufs_hba *hba) |
| 5619 | { |
| 5620 | int err = 0; |
| 5621 | |
| 5622 | if (!hba->auto_bkops_enabled) |
| 5623 | goto out; |
| 5624 | |
| 5625 | /* |
| 5626 | * If host assisted BKOPs is to be enabled, make sure |
| 5627 | * urgent bkops exception is allowed. |
| 5628 | */ |
| 5629 | err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS); |
| 5630 | if (err) { |
| 5631 | dev_err(hba->dev, "%s: failed to enable exception event %d\n", |
| 5632 | __func__, err); |
| 5633 | goto out; |
| 5634 | } |
| 5635 | |
Yaniv Gardi | dc3c8d3 | 2016-02-01 15:02:46 +0200 | [diff] [blame] | 5636 | err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG, |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5637 | QUERY_FLAG_IDN_BKOPS_EN, NULL); |
| 5638 | if (err) { |
| 5639 | dev_err(hba->dev, "%s: failed to disable bkops %d\n", |
| 5640 | __func__, err); |
| 5641 | ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS); |
| 5642 | goto out; |
| 5643 | } |
| 5644 | |
| 5645 | hba->auto_bkops_enabled = false; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5646 | trace_ufshcd_auto_bkops_state(dev_name(hba->dev), 0); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5647 | out: |
| 5648 | return err; |
| 5649 | } |
| 5650 | |
| 5651 | /** |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5652 | * ufshcd_force_reset_auto_bkops - force reset auto bkops state |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5653 | * @hba: per adapter instance |
| 5654 | * |
| 5655 | * After a device reset the device may toggle the BKOPS_EN flag |
| 5656 | * to default value. The s/w tracking variables should be updated |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5657 | * as well. This function would change the auto-bkops state based on |
| 5658 | * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND. |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5659 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5660 | static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba) |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5661 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5662 | if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) { |
| 5663 | hba->auto_bkops_enabled = false; |
| 5664 | hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS; |
| 5665 | ufshcd_enable_auto_bkops(hba); |
| 5666 | } else { |
| 5667 | hba->auto_bkops_enabled = true; |
| 5668 | hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS; |
| 5669 | ufshcd_disable_auto_bkops(hba); |
| 5670 | } |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5671 | } |
| 5672 | |
| 5673 | static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status) |
| 5674 | { |
Yaniv Gardi | 5e86ae4 | 2016-02-01 15:02:50 +0200 | [diff] [blame] | 5675 | return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR, |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5676 | QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status); |
| 5677 | } |
| 5678 | |
| 5679 | /** |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 5680 | * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status |
| 5681 | * @hba: per-adapter instance |
| 5682 | * @status: bkops_status value |
| 5683 | * |
| 5684 | * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn |
| 5685 | * flag in the device to permit background operations if the device |
| 5686 | * bkops_status is greater than or equal to "status" argument passed to |
| 5687 | * this function, disable otherwise. |
| 5688 | * |
| 5689 | * Returns 0 for success, non-zero in case of failure. |
| 5690 | * |
| 5691 | * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag |
| 5692 | * to know whether auto bkops is enabled or disabled after this function |
| 5693 | * returns control to it. |
| 5694 | */ |
| 5695 | static int ufshcd_bkops_ctrl(struct ufs_hba *hba, |
| 5696 | enum bkops_status status) |
| 5697 | { |
| 5698 | int err; |
| 5699 | u32 curr_status = 0; |
| 5700 | |
| 5701 | err = ufshcd_get_bkops_status(hba, &curr_status); |
| 5702 | if (err) { |
| 5703 | dev_err(hba->dev, "%s: failed to get BKOPS status %d\n", |
| 5704 | __func__, err); |
| 5705 | goto out; |
| 5706 | } else if (curr_status > BKOPS_STATUS_MAX) { |
| 5707 | dev_err(hba->dev, "%s: invalid BKOPS status %d\n", |
| 5708 | __func__, curr_status); |
| 5709 | err = -EINVAL; |
| 5710 | goto out; |
| 5711 | } |
| 5712 | |
| 5713 | if (curr_status >= status) |
| 5714 | err = ufshcd_enable_auto_bkops(hba); |
| 5715 | else |
| 5716 | err = ufshcd_disable_auto_bkops(hba); |
| 5717 | out: |
| 5718 | return err; |
| 5719 | } |
| 5720 | |
| 5721 | /** |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5722 | * ufshcd_urgent_bkops - handle urgent bkops exception event |
| 5723 | * @hba: per-adapter instance |
| 5724 | * |
| 5725 | * Enable fBackgroundOpsEn flag in the device to permit background |
| 5726 | * operations. |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 5727 | * |
| 5728 | * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled |
| 5729 | * and negative error value for any other failure. |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5730 | */ |
| 5731 | static int ufshcd_urgent_bkops(struct ufs_hba *hba) |
| 5732 | { |
Yaniv Gardi | afdfff5 | 2016-03-10 17:37:15 +0200 | [diff] [blame] | 5733 | return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5734 | } |
| 5735 | |
| 5736 | static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status) |
| 5737 | { |
Yaniv Gardi | 5e86ae4 | 2016-02-01 15:02:50 +0200 | [diff] [blame] | 5738 | return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR, |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5739 | QUERY_ATTR_IDN_EE_STATUS, 0, 0, status); |
| 5740 | } |
| 5741 | |
Yaniv Gardi | afdfff5 | 2016-03-10 17:37:15 +0200 | [diff] [blame] | 5742 | static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba) |
| 5743 | { |
| 5744 | int err; |
| 5745 | u32 curr_status = 0; |
| 5746 | |
| 5747 | if (hba->is_urgent_bkops_lvl_checked) |
| 5748 | goto enable_auto_bkops; |
| 5749 | |
| 5750 | err = ufshcd_get_bkops_status(hba, &curr_status); |
| 5751 | if (err) { |
| 5752 | dev_err(hba->dev, "%s: failed to get BKOPS status %d\n", |
| 5753 | __func__, err); |
| 5754 | goto out; |
| 5755 | } |
| 5756 | |
| 5757 | /* |
| 5758 | * We are seeing that some devices are raising the urgent bkops |
| 5759 | * exception events even when BKOPS status doesn't indicate performace |
| 5760 | * impacted or critical. Handle these device by determining their urgent |
| 5761 | * bkops status at runtime. |
| 5762 | */ |
| 5763 | if (curr_status < BKOPS_STATUS_PERF_IMPACT) { |
| 5764 | dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n", |
| 5765 | __func__, curr_status); |
| 5766 | /* update the current status as the urgent bkops level */ |
| 5767 | hba->urgent_bkops_lvl = curr_status; |
| 5768 | hba->is_urgent_bkops_lvl_checked = true; |
| 5769 | } |
| 5770 | |
| 5771 | enable_auto_bkops: |
| 5772 | err = ufshcd_enable_auto_bkops(hba); |
| 5773 | out: |
| 5774 | if (err < 0) |
| 5775 | dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n", |
| 5776 | __func__, err); |
| 5777 | } |
| 5778 | |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5779 | /** |
| 5780 | * ufshcd_exception_event_handler - handle exceptions raised by device |
| 5781 | * @work: pointer to work data |
| 5782 | * |
| 5783 | * Read bExceptionEventStatus attribute from the device and handle the |
| 5784 | * exception event accordingly. |
| 5785 | */ |
| 5786 | static void ufshcd_exception_event_handler(struct work_struct *work) |
| 5787 | { |
| 5788 | struct ufs_hba *hba; |
| 5789 | int err; |
| 5790 | u32 status = 0; |
| 5791 | hba = container_of(work, struct ufs_hba, eeh_work); |
| 5792 | |
Sujit Reddy Thumma | 6269473 | 2013-07-30 00:36:00 +0530 | [diff] [blame] | 5793 | pm_runtime_get_sync(hba->dev); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5794 | ufshcd_scsi_block_requests(hba); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5795 | err = ufshcd_get_ee_status(hba, &status); |
| 5796 | if (err) { |
| 5797 | dev_err(hba->dev, "%s: failed to get exception status %d\n", |
| 5798 | __func__, err); |
| 5799 | goto out; |
| 5800 | } |
| 5801 | |
| 5802 | status &= hba->ee_ctrl_mask; |
Yaniv Gardi | afdfff5 | 2016-03-10 17:37:15 +0200 | [diff] [blame] | 5803 | |
| 5804 | if (status & MASK_EE_URGENT_BKOPS) |
| 5805 | ufshcd_bkops_exception_event_handler(hba); |
| 5806 | |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5807 | out: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5808 | ufshcd_scsi_unblock_requests(hba); |
Sujit Reddy Thumma | 6269473 | 2013-07-30 00:36:00 +0530 | [diff] [blame] | 5809 | pm_runtime_put_sync(hba->dev); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5810 | return; |
| 5811 | } |
| 5812 | |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5813 | /* Complete requests that have door-bell cleared */ |
| 5814 | static void ufshcd_complete_requests(struct ufs_hba *hba) |
| 5815 | { |
| 5816 | ufshcd_transfer_req_compl(hba); |
| 5817 | ufshcd_tmc_handler(hba); |
| 5818 | } |
| 5819 | |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 5820 | /** |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5821 | * ufshcd_quirk_dl_nac_errors - This function checks if error handling is |
| 5822 | * to recover from the DL NAC errors or not. |
| 5823 | * @hba: per-adapter instance |
| 5824 | * |
| 5825 | * Returns true if error handling is required, false otherwise |
| 5826 | */ |
| 5827 | static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba) |
| 5828 | { |
| 5829 | unsigned long flags; |
| 5830 | bool err_handling = true; |
| 5831 | |
| 5832 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 5833 | /* |
| 5834 | * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the |
| 5835 | * device fatal error and/or DL NAC & REPLAY timeout errors. |
| 5836 | */ |
| 5837 | if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR)) |
| 5838 | goto out; |
| 5839 | |
| 5840 | if ((hba->saved_err & DEVICE_FATAL_ERROR) || |
| 5841 | ((hba->saved_err & UIC_ERROR) && |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5842 | (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR))) { |
| 5843 | /* |
| 5844 | * we have to do error recovery but atleast silence the error |
| 5845 | * logs. |
| 5846 | */ |
| 5847 | hba->silence_err_logs = true; |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5848 | goto out; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5849 | } |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5850 | |
| 5851 | if ((hba->saved_err & UIC_ERROR) && |
| 5852 | (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) { |
| 5853 | int err; |
| 5854 | /* |
| 5855 | * wait for 50ms to see if we can get any other errors or not. |
| 5856 | */ |
| 5857 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 5858 | msleep(50); |
| 5859 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 5860 | |
| 5861 | /* |
| 5862 | * now check if we have got any other severe errors other than |
| 5863 | * DL NAC error? |
| 5864 | */ |
| 5865 | if ((hba->saved_err & INT_FATAL_ERRORS) || |
| 5866 | ((hba->saved_err & UIC_ERROR) && |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5867 | (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR))) { |
| 5868 | if (((hba->saved_err & INT_FATAL_ERRORS) == |
| 5869 | DEVICE_FATAL_ERROR) || (hba->saved_uic_err & |
| 5870 | ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) |
| 5871 | hba->silence_err_logs = true; |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5872 | goto out; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5873 | } |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5874 | |
| 5875 | /* |
| 5876 | * As DL NAC is the only error received so far, send out NOP |
| 5877 | * command to confirm if link is still active or not. |
| 5878 | * - If we don't get any response then do error recovery. |
| 5879 | * - If we get response then clear the DL NAC error bit. |
| 5880 | */ |
| 5881 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5882 | /* silence the error logs from NOP command */ |
| 5883 | hba->silence_err_logs = true; |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5884 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 5885 | err = ufshcd_verify_dev_init(hba); |
| 5886 | spin_lock_irqsave(hba->host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5887 | hba->silence_err_logs = false; |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5888 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5889 | if (err) { |
| 5890 | hba->silence_err_logs = true; |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5891 | goto out; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5892 | } |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5893 | |
| 5894 | /* Link seems to be alive hence ignore the DL NAC errors */ |
| 5895 | if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR) |
| 5896 | hba->saved_err &= ~UIC_ERROR; |
| 5897 | /* clear NAC error */ |
| 5898 | hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR; |
| 5899 | if (!hba->saved_uic_err) { |
| 5900 | err_handling = false; |
| 5901 | goto out; |
| 5902 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5903 | /* |
| 5904 | * there seems to be some errors other than NAC, so do error |
| 5905 | * recovery |
| 5906 | */ |
| 5907 | hba->silence_err_logs = true; |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5908 | } |
| 5909 | out: |
| 5910 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 5911 | return err_handling; |
| 5912 | } |
| 5913 | |
| 5914 | /** |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5915 | * ufshcd_err_handler - handle UFS errors that require s/w attention |
| 5916 | * @work: pointer to work structure |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5917 | */ |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5918 | static void ufshcd_err_handler(struct work_struct *work) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5919 | { |
| 5920 | struct ufs_hba *hba; |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5921 | unsigned long flags; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5922 | bool err_xfer = false, err_tm = false; |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5923 | int err = 0; |
| 5924 | int tag; |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5925 | bool needs_reset = false; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5926 | bool clks_enabled = false; |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5927 | |
| 5928 | hba = container_of(work, struct ufs_hba, eh_work); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 5929 | |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5930 | spin_lock_irqsave(hba->host->host_lock, flags); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5931 | ufsdbg_set_err_state(hba); |
| 5932 | |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5933 | if (hba->ufshcd_state == UFSHCD_STATE_RESET) |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5934 | goto out; |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5935 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5936 | /* |
| 5937 | * Make sure the clocks are ON before we proceed with err |
| 5938 | * handling. For the majority of cases err handler would be |
| 5939 | * run with clocks ON. There is a possibility that the err |
| 5940 | * handler was scheduled due to auto hibern8 error interrupt, |
| 5941 | * in which case the clocks could be gated or be in the |
| 5942 | * process of gating when the err handler runs. |
| 5943 | */ |
| 5944 | if (unlikely((hba->clk_gating.state != CLKS_ON) && |
| 5945 | ufshcd_is_auto_hibern8_supported(hba))) { |
| 5946 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 5947 | ufshcd_hold(hba, false); |
| 5948 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 5949 | clks_enabled = true; |
| 5950 | } |
| 5951 | |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5952 | hba->ufshcd_state = UFSHCD_STATE_RESET; |
| 5953 | ufshcd_set_eh_in_progress(hba); |
| 5954 | |
| 5955 | /* Complete requests that have door-bell cleared by h/w */ |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5956 | ufshcd_complete_requests(hba); |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5957 | |
Subhash Jadavani | 4f0df17b | 2016-12-16 13:19:27 -0800 | [diff] [blame] | 5958 | if (hba->dev_info.quirks & |
| 5959 | UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) { |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 5960 | bool ret; |
| 5961 | |
| 5962 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 5963 | /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */ |
| 5964 | ret = ufshcd_quirk_dl_nac_errors(hba); |
| 5965 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 5966 | if (!ret) |
| 5967 | goto skip_err_handling; |
| 5968 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5969 | |
| 5970 | /* |
| 5971 | * Dump controller state before resetting. Transfer requests state |
| 5972 | * will be dump as part of the request completion. |
| 5973 | */ |
| 5974 | if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) { |
| 5975 | dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x", |
| 5976 | __func__, hba->saved_err, hba->saved_uic_err); |
| 5977 | if (!hba->silence_err_logs) { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5978 | /* release lock as print host regs sleeps */ |
| 5979 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5980 | ufshcd_print_host_regs(hba); |
| 5981 | ufshcd_print_host_state(hba); |
| 5982 | ufshcd_print_pwr_info(hba); |
| 5983 | ufshcd_print_tmrs(hba, hba->outstanding_tasks); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5984 | spin_lock_irqsave(hba->host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 5985 | } |
| 5986 | } |
| 5987 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 5988 | if ((hba->saved_err & INT_FATAL_ERRORS) |
| 5989 | || hba->saved_ce_err || hba->force_host_reset || |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5990 | ((hba->saved_err & UIC_ERROR) && |
| 5991 | (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR | |
| 5992 | UFSHCD_UIC_DL_NAC_RECEIVED_ERROR | |
| 5993 | UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))) |
| 5994 | needs_reset = true; |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 5995 | |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 5996 | /* |
| 5997 | * if host reset is required then skip clearing the pending |
| 5998 | * transfers forcefully because they will automatically get |
| 5999 | * cleared after link startup. |
| 6000 | */ |
| 6001 | if (needs_reset) |
| 6002 | goto skip_pending_xfer_clear; |
| 6003 | |
| 6004 | /* release lock as clear command might sleep */ |
| 6005 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6006 | /* Clear pending transfer requests */ |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6007 | for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) { |
| 6008 | if (ufshcd_clear_cmd(hba, tag)) { |
| 6009 | err_xfer = true; |
| 6010 | goto lock_skip_pending_xfer_clear; |
| 6011 | } |
| 6012 | } |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6013 | |
| 6014 | /* Clear pending task management requests */ |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6015 | for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) { |
| 6016 | if (ufshcd_clear_tm_cmd(hba, tag)) { |
| 6017 | err_tm = true; |
| 6018 | goto lock_skip_pending_xfer_clear; |
| 6019 | } |
| 6020 | } |
| 6021 | |
| 6022 | lock_skip_pending_xfer_clear: |
| 6023 | spin_lock_irqsave(hba->host->host_lock, flags); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6024 | |
| 6025 | /* Complete the requests that are cleared by s/w */ |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6026 | ufshcd_complete_requests(hba); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6027 | |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6028 | if (err_xfer || err_tm) |
| 6029 | needs_reset = true; |
| 6030 | |
| 6031 | skip_pending_xfer_clear: |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6032 | /* Fatal errors need reset */ |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6033 | if (needs_reset) { |
| 6034 | unsigned long max_doorbells = (1UL << hba->nutrs) - 1; |
| 6035 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6036 | if (hba->saved_err & INT_FATAL_ERRORS) |
| 6037 | ufshcd_update_error_stats(hba, |
| 6038 | UFS_ERR_INT_FATAL_ERRORS); |
| 6039 | if (hba->saved_ce_err) |
| 6040 | ufshcd_update_error_stats(hba, UFS_ERR_CRYPTO_ENGINE); |
| 6041 | |
| 6042 | if (hba->saved_err & UIC_ERROR) |
| 6043 | ufshcd_update_error_stats(hba, |
| 6044 | UFS_ERR_INT_UIC_ERROR); |
| 6045 | |
| 6046 | if (err_xfer || err_tm) |
| 6047 | ufshcd_update_error_stats(hba, |
| 6048 | UFS_ERR_CLEAR_PEND_XFER_TM); |
| 6049 | |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6050 | /* |
| 6051 | * ufshcd_reset_and_restore() does the link reinitialization |
| 6052 | * which will need atleast one empty doorbell slot to send the |
| 6053 | * device management commands (NOP and query commands). |
| 6054 | * If there is no slot empty at this moment then free up last |
| 6055 | * slot forcefully. |
| 6056 | */ |
| 6057 | if (hba->outstanding_reqs == max_doorbells) |
| 6058 | __ufshcd_transfer_req_compl(hba, |
| 6059 | (1UL << (hba->nutrs - 1))); |
| 6060 | |
| 6061 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6062 | err = ufshcd_reset_and_restore(hba); |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6063 | spin_lock_irqsave(hba->host->host_lock, flags); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6064 | if (err) { |
| 6065 | dev_err(hba->dev, "%s: reset and restore failed\n", |
| 6066 | __func__); |
| 6067 | hba->ufshcd_state = UFSHCD_STATE_ERROR; |
| 6068 | } |
| 6069 | /* |
| 6070 | * Inform scsi mid-layer that we did reset and allow to handle |
| 6071 | * Unit Attention properly. |
| 6072 | */ |
| 6073 | scsi_report_bus_reset(hba->host, 0); |
| 6074 | hba->saved_err = 0; |
| 6075 | hba->saved_uic_err = 0; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6076 | hba->saved_ce_err = 0; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6077 | hba->force_host_reset = false; |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6078 | } |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6079 | |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 6080 | skip_err_handling: |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6081 | if (!needs_reset) { |
| 6082 | hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL; |
| 6083 | if (hba->saved_err || hba->saved_uic_err) |
| 6084 | dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x", |
| 6085 | __func__, hba->saved_err, hba->saved_uic_err); |
| 6086 | } |
| 6087 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6088 | hba->silence_err_logs = false; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6089 | |
| 6090 | if (clks_enabled) |
| 6091 | __ufshcd_release(hba, false); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6092 | out: |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6093 | ufshcd_clear_eh_in_progress(hba); |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6094 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6095 | } |
| 6096 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6097 | static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist, |
| 6098 | u32 reg) |
| 6099 | { |
| 6100 | reg_hist->reg[reg_hist->pos] = reg; |
| 6101 | reg_hist->tstamp[reg_hist->pos] = ktime_get(); |
| 6102 | reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH; |
| 6103 | } |
| 6104 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6105 | /** |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6106 | * ufshcd_update_uic_error - check and set fatal UIC error flags. |
| 6107 | * @hba: per-adapter instance |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6108 | * |
| 6109 | * Returns |
| 6110 | * IRQ_HANDLED - If interrupt is valid |
| 6111 | * IRQ_NONE - If invalid interrupt |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6112 | */ |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6113 | static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6114 | { |
| 6115 | u32 reg; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6116 | irqreturn_t retval = IRQ_NONE; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6117 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6118 | /* PHY layer lane error */ |
| 6119 | reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6120 | if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) && |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6121 | (reg & UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK)) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6122 | /* |
| 6123 | * To know whether this error is fatal or not, DB timeout |
| 6124 | * must be checked but this error is handled separately. |
| 6125 | */ |
| 6126 | dev_dbg(hba->dev, "%s: UIC Lane error reported, reg 0x%x\n", |
| 6127 | __func__, reg); |
| 6128 | ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6129 | |
| 6130 | /* |
| 6131 | * Don't ignore LINERESET indication during hibern8 |
| 6132 | * enter operation. |
| 6133 | */ |
| 6134 | if (reg & UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR) { |
| 6135 | struct uic_command *cmd = hba->active_uic_cmd; |
| 6136 | |
| 6137 | if (cmd) { |
| 6138 | if (cmd->command == UIC_CMD_DME_HIBER_ENTER) { |
| 6139 | dev_err(hba->dev, "%s: LINERESET during hibern8 enter, reg 0x%x\n", |
| 6140 | __func__, reg); |
| 6141 | hba->full_init_linereset = true; |
| 6142 | } |
| 6143 | } |
| 6144 | } |
| 6145 | retval |= IRQ_HANDLED; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6146 | } |
| 6147 | |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6148 | /* PA_INIT_ERROR is fatal and needs UIC reset */ |
| 6149 | reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6150 | if ((reg & UIC_DATA_LINK_LAYER_ERROR) && |
| 6151 | (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6152 | ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg); |
| 6153 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6154 | if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT) { |
| 6155 | hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR; |
| 6156 | } else if (hba->dev_info.quirks & |
| 6157 | UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) { |
| 6158 | if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED) |
| 6159 | hba->uic_error |= |
| 6160 | UFSHCD_UIC_DL_NAC_RECEIVED_ERROR; |
| 6161 | else if (reg & |
| 6162 | UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT) |
| 6163 | hba->uic_error |= |
| 6164 | UFSHCD_UIC_DL_TCx_REPLAY_ERROR; |
| 6165 | } |
| 6166 | retval |= IRQ_HANDLED; |
Yaniv Gardi | 583fa62 | 2016-03-10 17:37:13 +0200 | [diff] [blame] | 6167 | } |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6168 | |
| 6169 | /* UIC NL/TL/DME errors needs software retry */ |
| 6170 | reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6171 | if ((reg & UIC_NETWORK_LAYER_ERROR) && |
| 6172 | (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6173 | ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6174 | hba->uic_error |= UFSHCD_UIC_NL_ERROR; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6175 | retval |= IRQ_HANDLED; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6176 | } |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6177 | |
| 6178 | reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6179 | if ((reg & UIC_TRANSPORT_LAYER_ERROR) && |
| 6180 | (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6181 | ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6182 | hba->uic_error |= UFSHCD_UIC_TL_ERROR; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6183 | retval |= IRQ_HANDLED; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6184 | } |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6185 | |
| 6186 | reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6187 | if ((reg & UIC_DME_ERROR) && |
| 6188 | (reg & UIC_DME_ERROR_CODE_MASK)) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6189 | ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6190 | hba->uic_error |= UFSHCD_UIC_DME_ERROR; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6191 | retval |= IRQ_HANDLED; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6192 | } |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6193 | |
| 6194 | dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n", |
| 6195 | __func__, hba->uic_error); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6196 | return retval; |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6197 | } |
| 6198 | |
| 6199 | /** |
| 6200 | * ufshcd_check_errors - Check for errors that need s/w attention |
| 6201 | * @hba: per-adapter instance |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6202 | * |
| 6203 | * Returns |
| 6204 | * IRQ_HANDLED - If interrupt is valid |
| 6205 | * IRQ_NONE - If invalid interrupt |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6206 | */ |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6207 | static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba) |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6208 | { |
| 6209 | bool queue_eh_work = false; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6210 | irqreturn_t retval = IRQ_NONE; |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6211 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6212 | if (hba->errors & INT_FATAL_ERRORS || hba->ce_error) |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6213 | queue_eh_work = true; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6214 | |
| 6215 | if (hba->errors & UIC_ERROR) { |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6216 | hba->uic_error = 0; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6217 | retval = ufshcd_update_uic_error(hba); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6218 | if (hba->uic_error) |
| 6219 | queue_eh_work = true; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6220 | } |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6221 | |
| 6222 | if (queue_eh_work) { |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6223 | /* |
| 6224 | * update the transfer error masks to sticky bits, let's do this |
| 6225 | * irrespective of current ufshcd_state. |
| 6226 | */ |
| 6227 | hba->saved_err |= hba->errors; |
| 6228 | hba->saved_uic_err |= hba->uic_error; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6229 | hba->saved_ce_err |= hba->ce_error; |
Yaniv Gardi | 9a47ec7 | 2016-03-10 17:37:12 +0200 | [diff] [blame] | 6230 | |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6231 | /* handle fatal errors only when link is functional */ |
| 6232 | if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6233 | /* |
| 6234 | * Set error handling in progress flag early so that we |
| 6235 | * don't issue new requests any more. |
| 6236 | */ |
| 6237 | ufshcd_set_eh_in_progress(hba); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6238 | |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6239 | hba->ufshcd_state = UFSHCD_STATE_ERROR; |
| 6240 | schedule_work(&hba->eh_work); |
| 6241 | } |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6242 | retval |= IRQ_HANDLED; |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6243 | } |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6244 | /* |
| 6245 | * if (!queue_eh_work) - |
| 6246 | * Other errors are either non-fatal where host recovers |
| 6247 | * itself without s/w intervention or errors that will be |
| 6248 | * handled by the SCSI core layer. |
| 6249 | */ |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6250 | return retval; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6251 | } |
| 6252 | |
| 6253 | /** |
| 6254 | * ufshcd_tmc_handler - handle task management function completion |
| 6255 | * @hba: per adapter instance |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6256 | * |
| 6257 | * Returns |
| 6258 | * IRQ_HANDLED - If interrupt is valid |
| 6259 | * IRQ_NONE - If invalid interrupt |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6260 | */ |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6261 | static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6262 | { |
| 6263 | u32 tm_doorbell; |
| 6264 | |
Seungwon Jeon | b873a275 | 2013-06-26 22:39:26 +0530 | [diff] [blame] | 6265 | tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6266 | hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6267 | if (hba->tm_condition) { |
| 6268 | wake_up(&hba->tm_wq); |
| 6269 | return IRQ_HANDLED; |
| 6270 | } else { |
| 6271 | return IRQ_NONE; |
| 6272 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6273 | } |
| 6274 | |
| 6275 | /** |
| 6276 | * ufshcd_sl_intr - Interrupt service routine |
| 6277 | * @hba: per adapter instance |
| 6278 | * @intr_status: contains interrupts generated by the controller |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6279 | * |
| 6280 | * Returns |
| 6281 | * IRQ_HANDLED - If interrupt is valid |
| 6282 | * IRQ_NONE - If invalid interrupt |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6283 | */ |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6284 | static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6285 | { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6286 | irqreturn_t retval = IRQ_NONE; |
| 6287 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6288 | ufsdbg_error_inject_dispatcher(hba, |
| 6289 | ERR_INJECT_INTR, intr_status, &intr_status); |
| 6290 | |
| 6291 | ufshcd_vops_crypto_engine_get_status(hba, &hba->ce_error); |
| 6292 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6293 | hba->errors = UFSHCD_ERROR_MASK & intr_status; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6294 | if (hba->errors || hba->ce_error) |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6295 | retval |= ufshcd_check_errors(hba); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6296 | |
Seungwon Jeon | 53b3d9c | 2013-08-31 21:40:22 +0530 | [diff] [blame] | 6297 | if (intr_status & UFSHCD_UIC_MASK) |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6298 | retval |= ufshcd_uic_cmd_compl(hba, intr_status); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6299 | |
| 6300 | if (intr_status & UTP_TASK_REQ_COMPL) |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6301 | retval |= ufshcd_tmc_handler(hba); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6302 | |
| 6303 | if (intr_status & UTP_TRANSFER_REQ_COMPL) |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6304 | retval |= ufshcd_transfer_req_compl(hba); |
| 6305 | |
| 6306 | return retval; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6307 | } |
| 6308 | |
| 6309 | /** |
| 6310 | * ufshcd_intr - Main interrupt service routine |
| 6311 | * @irq: irq number |
| 6312 | * @__hba: pointer to adapter instance |
| 6313 | * |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6314 | * Returns |
| 6315 | * IRQ_HANDLED - If interrupt is valid |
| 6316 | * IRQ_NONE - If invalid interrupt |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6317 | */ |
| 6318 | static irqreturn_t ufshcd_intr(int irq, void *__hba) |
| 6319 | { |
Yaniv Gardi | d75f7fe | 2016-02-01 15:02:47 +0200 | [diff] [blame] | 6320 | u32 intr_status, enabled_intr_status; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6321 | irqreturn_t retval = IRQ_NONE; |
| 6322 | struct ufs_hba *hba = __hba; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6323 | int retries = hba->nutrs; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6324 | |
| 6325 | spin_lock(hba->host->host_lock); |
Seungwon Jeon | b873a275 | 2013-06-26 22:39:26 +0530 | [diff] [blame] | 6326 | intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6327 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6328 | /* |
| 6329 | * There could be max of hba->nutrs reqs in flight and in worst case |
| 6330 | * if the reqs get finished 1 by 1 after the interrupt status is |
| 6331 | * read, make sure we handle them by checking the interrupt status |
| 6332 | * again in a loop until we process all of the reqs before returning. |
| 6333 | */ |
| 6334 | do { |
| 6335 | enabled_intr_status = |
| 6336 | intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE); |
| 6337 | if (intr_status) |
| 6338 | ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS); |
| 6339 | if (enabled_intr_status) |
| 6340 | retval |= ufshcd_sl_intr(hba, enabled_intr_status); |
Yaniv Gardi | d75f7fe | 2016-02-01 15:02:47 +0200 | [diff] [blame] | 6341 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6342 | intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS); |
| 6343 | } while (intr_status && --retries); |
| 6344 | |
| 6345 | if (retval == IRQ_NONE) { |
| 6346 | dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n", |
| 6347 | __func__, intr_status); |
| 6348 | ufshcd_hex_dump(hba, "host regs: ", hba->mmio_base, |
| 6349 | UFSHCI_REG_SPACE_SIZE); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6350 | } |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6351 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6352 | spin_unlock(hba->host->host_lock); |
| 6353 | return retval; |
| 6354 | } |
| 6355 | |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6356 | static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag) |
| 6357 | { |
| 6358 | int err = 0; |
| 6359 | u32 mask = 1 << tag; |
| 6360 | unsigned long flags; |
| 6361 | |
| 6362 | if (!test_bit(tag, &hba->outstanding_tasks)) |
| 6363 | goto out; |
| 6364 | |
| 6365 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 6366 | ufshcd_writel(hba, ~(1 << tag), REG_UTP_TASK_REQ_LIST_CLEAR); |
| 6367 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 6368 | |
| 6369 | /* poll for max. 1 sec to clear door bell register by h/w */ |
| 6370 | err = ufshcd_wait_for_register(hba, |
| 6371 | REG_UTP_TASK_REQ_DOOR_BELL, |
Yaniv Gardi | 596585a | 2016-03-10 17:37:08 +0200 | [diff] [blame] | 6372 | mask, 0, 1000, 1000, true); |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6373 | out: |
| 6374 | return err; |
| 6375 | } |
| 6376 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6377 | /** |
| 6378 | * ufshcd_issue_tm_cmd - issues task management commands to controller |
| 6379 | * @hba: per adapter instance |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6380 | * @lun_id: LUN ID to which TM command is sent |
| 6381 | * @task_id: task ID to which the TM command is applicable |
| 6382 | * @tm_function: task management function opcode |
| 6383 | * @tm_response: task management service response return value |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6384 | * |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6385 | * Returns non-zero value on error, zero on success. |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6386 | */ |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6387 | static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id, |
| 6388 | u8 tm_function, u8 *tm_response) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6389 | { |
| 6390 | struct utp_task_req_desc *task_req_descp; |
| 6391 | struct utp_upiu_task_req *task_req_upiup; |
| 6392 | struct Scsi_Host *host; |
| 6393 | unsigned long flags; |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6394 | int free_slot; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6395 | int err; |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6396 | int task_tag; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6397 | |
| 6398 | host = hba->host; |
| 6399 | |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6400 | /* |
| 6401 | * Get free slot, sleep if slots are unavailable. |
| 6402 | * Even though we use wait_event() which sleeps indefinitely, |
| 6403 | * the maximum wait time is bounded by %TM_CMD_TIMEOUT. |
| 6404 | */ |
| 6405 | wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot)); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6406 | ufshcd_hold_all(hba); |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6407 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6408 | spin_lock_irqsave(host->host_lock, flags); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6409 | task_req_descp = hba->utmrdl_base_addr; |
| 6410 | task_req_descp += free_slot; |
| 6411 | |
| 6412 | /* Configure task request descriptor */ |
| 6413 | task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD); |
| 6414 | task_req_descp->header.dword_2 = |
| 6415 | cpu_to_le32(OCS_INVALID_COMMAND_STATUS); |
| 6416 | |
| 6417 | /* Configure task request UPIU */ |
| 6418 | task_req_upiup = |
| 6419 | (struct utp_upiu_task_req *) task_req_descp->task_req_upiu; |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6420 | task_tag = hba->nutrs + free_slot; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6421 | task_req_upiup->header.dword_0 = |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 6422 | UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0, |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6423 | lun_id, task_tag); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6424 | task_req_upiup->header.dword_1 = |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 6425 | UPIU_HEADER_DWORD(0, tm_function, 0, 0); |
Subhash Jadavani | 0ce147d | 2014-09-25 15:32:29 +0300 | [diff] [blame] | 6426 | /* |
| 6427 | * The host shall provide the same value for LUN field in the basic |
| 6428 | * header and for Input Parameter. |
| 6429 | */ |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6430 | task_req_upiup->input_param1 = cpu_to_be32(lun_id); |
| 6431 | task_req_upiup->input_param2 = cpu_to_be32(task_id); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6432 | |
| 6433 | /* send command to the controller */ |
| 6434 | __set_bit(free_slot, &hba->outstanding_tasks); |
Yaniv Gardi | 897efe6 | 2016-02-01 15:02:48 +0200 | [diff] [blame] | 6435 | |
| 6436 | /* Make sure descriptors are ready before ringing the task doorbell */ |
| 6437 | wmb(); |
| 6438 | |
Seungwon Jeon | b873a275 | 2013-06-26 22:39:26 +0530 | [diff] [blame] | 6439 | ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6440 | /* Make sure that doorbell is committed immediately */ |
| 6441 | wmb(); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6442 | |
| 6443 | spin_unlock_irqrestore(host->host_lock, flags); |
| 6444 | |
| 6445 | /* wait until the task management command is completed */ |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6446 | err = wait_event_timeout(hba->tm_wq, |
| 6447 | test_bit(free_slot, &hba->tm_condition), |
| 6448 | msecs_to_jiffies(TM_CMD_TIMEOUT)); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6449 | if (!err) { |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6450 | dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n", |
| 6451 | __func__, tm_function); |
| 6452 | if (ufshcd_clear_tm_cmd(hba, free_slot)) |
| 6453 | dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n", |
| 6454 | __func__, free_slot); |
| 6455 | err = -ETIMEDOUT; |
| 6456 | } else { |
| 6457 | err = ufshcd_task_req_compl(hba, free_slot, tm_response); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6458 | } |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6459 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6460 | clear_bit(free_slot, &hba->tm_condition); |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6461 | ufshcd_put_tm_slot(hba, free_slot); |
| 6462 | wake_up(&hba->tm_tag_wq); |
| 6463 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6464 | ufshcd_release_all(hba); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6465 | return err; |
| 6466 | } |
| 6467 | |
| 6468 | /** |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6469 | * ufshcd_eh_device_reset_handler - device reset handler registered to |
| 6470 | * scsi layer. |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6471 | * @cmd: SCSI command pointer |
| 6472 | * |
| 6473 | * Returns SUCCESS/FAILED |
| 6474 | */ |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6475 | static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6476 | { |
| 6477 | struct Scsi_Host *host; |
| 6478 | struct ufs_hba *hba; |
| 6479 | unsigned int tag; |
| 6480 | u32 pos; |
| 6481 | int err; |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6482 | u8 resp = 0xF; |
| 6483 | struct ufshcd_lrb *lrbp; |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6484 | unsigned long flags; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6485 | |
| 6486 | host = cmd->device->host; |
| 6487 | hba = shost_priv(host); |
| 6488 | tag = cmd->request->tag; |
| 6489 | |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6490 | lrbp = &hba->lrb[tag]; |
| 6491 | err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp); |
| 6492 | if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) { |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6493 | if (!err) |
| 6494 | err = resp; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6495 | goto out; |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6496 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6497 | |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6498 | /* clear the commands that were pending for corresponding LUN */ |
| 6499 | for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) { |
| 6500 | if (hba->lrb[pos].lun == lrbp->lun) { |
| 6501 | err = ufshcd_clear_cmd(hba, pos); |
| 6502 | if (err) |
| 6503 | break; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6504 | } |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6505 | } |
| 6506 | spin_lock_irqsave(host->host_lock, flags); |
| 6507 | ufshcd_transfer_req_compl(hba); |
| 6508 | spin_unlock_irqrestore(host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6509 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6510 | out: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6511 | hba->req_abort_count = 0; |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6512 | if (!err) { |
| 6513 | err = SUCCESS; |
| 6514 | } else { |
| 6515 | dev_err(hba->dev, "%s: failed with err %d\n", __func__, err); |
| 6516 | err = FAILED; |
| 6517 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6518 | return err; |
| 6519 | } |
| 6520 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6521 | static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap) |
| 6522 | { |
| 6523 | struct ufshcd_lrb *lrbp; |
| 6524 | int tag; |
| 6525 | |
| 6526 | for_each_set_bit(tag, &bitmap, hba->nutrs) { |
| 6527 | lrbp = &hba->lrb[tag]; |
| 6528 | lrbp->req_abort_skip = true; |
| 6529 | } |
| 6530 | } |
| 6531 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6532 | /** |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6533 | * ufshcd_abort - abort a specific command |
| 6534 | * @cmd: SCSI command pointer |
| 6535 | * |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6536 | * Abort the pending command in device by sending UFS_ABORT_TASK task management |
| 6537 | * command, and in host controller by clearing the door-bell register. There can |
| 6538 | * be race between controller sending the command to the device while abort is |
| 6539 | * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is |
| 6540 | * really issued and then try to abort it. |
| 6541 | * |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6542 | * Returns SUCCESS/FAILED |
| 6543 | */ |
| 6544 | static int ufshcd_abort(struct scsi_cmnd *cmd) |
| 6545 | { |
| 6546 | struct Scsi_Host *host; |
| 6547 | struct ufs_hba *hba; |
| 6548 | unsigned long flags; |
| 6549 | unsigned int tag; |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6550 | int err = 0; |
| 6551 | int poll_cnt; |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6552 | u8 resp = 0xF; |
| 6553 | struct ufshcd_lrb *lrbp; |
Dolev Raviv | e9d501b | 2014-07-01 12:22:37 +0300 | [diff] [blame] | 6554 | u32 reg; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6555 | |
| 6556 | host = cmd->device->host; |
| 6557 | hba = shost_priv(host); |
| 6558 | tag = cmd->request->tag; |
Yaniv Gardi | 1449732 | 2016-02-01 15:02:39 +0200 | [diff] [blame] | 6559 | if (!ufshcd_valid_tag(hba, tag)) { |
| 6560 | dev_err(hba->dev, |
| 6561 | "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p", |
| 6562 | __func__, tag, cmd, cmd->request); |
| 6563 | BUG(); |
| 6564 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6565 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6566 | lrbp = &hba->lrb[tag]; |
| 6567 | |
| 6568 | ufshcd_update_error_stats(hba, UFS_ERR_TASK_ABORT); |
| 6569 | |
| 6570 | /* |
| 6571 | * Task abort to the device W-LUN is illegal. When this command |
| 6572 | * will fail, due to spec violation, scsi err handling next step |
| 6573 | * will be to send LU reset which, again, is a spec violation. |
| 6574 | * To avoid these unnecessary/illegal step we skip to the last error |
| 6575 | * handling stage: reset and restore. |
| 6576 | */ |
| 6577 | if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN) |
| 6578 | return ufshcd_eh_host_reset_handler(cmd); |
| 6579 | |
| 6580 | ufshcd_hold_all(hba); |
Dolev Raviv | e9d501b | 2014-07-01 12:22:37 +0300 | [diff] [blame] | 6581 | reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL); |
Yaniv Gardi | 1449732 | 2016-02-01 15:02:39 +0200 | [diff] [blame] | 6582 | /* If command is already aborted/completed, return SUCCESS */ |
| 6583 | if (!(test_bit(tag, &hba->outstanding_reqs))) { |
| 6584 | dev_err(hba->dev, |
| 6585 | "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n", |
| 6586 | __func__, tag, hba->outstanding_reqs, reg); |
| 6587 | goto out; |
| 6588 | } |
| 6589 | |
Dolev Raviv | e9d501b | 2014-07-01 12:22:37 +0300 | [diff] [blame] | 6590 | if (!(reg & (1 << tag))) { |
| 6591 | dev_err(hba->dev, |
| 6592 | "%s: cmd was completed, but without a notifying intr, tag = %d", |
| 6593 | __func__, tag); |
| 6594 | } |
| 6595 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6596 | /* Print Transfer Request of aborted task */ |
| 6597 | dev_err(hba->dev, "%s: Device abort task at tag %d", __func__, tag); |
| 6598 | |
| 6599 | /* |
| 6600 | * Print detailed info about aborted request. |
| 6601 | * As more than one request might get aborted at the same time, |
| 6602 | * print full information only for the first aborted request in order |
| 6603 | * to reduce repeated printouts. For other aborted requests only print |
| 6604 | * basic details. |
| 6605 | */ |
| 6606 | scsi_print_command(cmd); |
| 6607 | if (!hba->req_abort_count) { |
| 6608 | ufshcd_print_host_regs(hba); |
| 6609 | ufshcd_print_host_state(hba); |
| 6610 | ufshcd_print_pwr_info(hba); |
| 6611 | ufshcd_print_trs(hba, 1 << tag, true); |
| 6612 | } else { |
| 6613 | ufshcd_print_trs(hba, 1 << tag, false); |
| 6614 | } |
| 6615 | hba->req_abort_count++; |
| 6616 | |
| 6617 | |
| 6618 | /* Skip task abort in case previous aborts failed and report failure */ |
| 6619 | if (lrbp->req_abort_skip) { |
| 6620 | err = -EIO; |
| 6621 | goto out; |
| 6622 | } |
| 6623 | |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6624 | for (poll_cnt = 100; poll_cnt; poll_cnt--) { |
| 6625 | err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag, |
| 6626 | UFS_QUERY_TASK, &resp); |
| 6627 | if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) { |
| 6628 | /* cmd pending in the device */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6629 | dev_err(hba->dev, "%s: cmd pending in the device. tag = %d", |
| 6630 | __func__, tag); |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6631 | break; |
| 6632 | } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) { |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6633 | /* |
| 6634 | * cmd not pending in the device, check if it is |
| 6635 | * in transition. |
| 6636 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6637 | dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.", |
| 6638 | __func__, tag); |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6639 | reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL); |
| 6640 | if (reg & (1 << tag)) { |
| 6641 | /* sleep for max. 200us to stabilize */ |
| 6642 | usleep_range(100, 200); |
| 6643 | continue; |
| 6644 | } |
| 6645 | /* command completed already */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6646 | dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.", |
| 6647 | __func__, tag); |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6648 | goto out; |
| 6649 | } else { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6650 | dev_err(hba->dev, |
| 6651 | "%s: no response from device. tag = %d, err %d", |
| 6652 | __func__, tag, err); |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6653 | if (!err) |
| 6654 | err = resp; /* service response error */ |
| 6655 | goto out; |
| 6656 | } |
| 6657 | } |
| 6658 | |
| 6659 | if (!poll_cnt) { |
| 6660 | err = -EBUSY; |
| 6661 | goto out; |
| 6662 | } |
| 6663 | |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6664 | err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag, |
| 6665 | UFS_ABORT_TASK, &resp); |
| 6666 | if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6667 | if (!err) { |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6668 | err = resp; /* service response error */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6669 | dev_err(hba->dev, "%s: issued. tag = %d, err %d", |
| 6670 | __func__, tag, err); |
| 6671 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6672 | goto out; |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 6673 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6674 | |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6675 | err = ufshcd_clear_cmd(hba, tag); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6676 | if (err) { |
| 6677 | dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d", |
| 6678 | __func__, tag, err); |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6679 | goto out; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6680 | } |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6681 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6682 | scsi_dma_unmap(cmd); |
| 6683 | |
| 6684 | spin_lock_irqsave(host->host_lock, flags); |
Yaniv Gardi | a48353f | 2016-02-01 15:02:40 +0200 | [diff] [blame] | 6685 | ufshcd_outstanding_req_clear(hba, tag); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6686 | hba->lrb[tag].cmd = NULL; |
| 6687 | spin_unlock_irqrestore(host->host_lock, flags); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 6688 | |
| 6689 | clear_bit_unlock(tag, &hba->lrb_in_use); |
| 6690 | wake_up(&hba->dev_cmd.tag_wq); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 6691 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6692 | out: |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6693 | if (!err) { |
| 6694 | err = SUCCESS; |
| 6695 | } else { |
| 6696 | dev_err(hba->dev, "%s: failed with err %d\n", __func__, err); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6697 | ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs); |
Sujit Reddy Thumma | f20810d | 2014-05-26 10:59:13 +0530 | [diff] [blame] | 6698 | err = FAILED; |
| 6699 | } |
| 6700 | |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 6701 | /* |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6702 | * This ufshcd_release_all() corresponds to the original scsi cmd that |
| 6703 | * got aborted here (as we won't get any IRQ for it). |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 6704 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6705 | ufshcd_release_all(hba); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 6706 | return err; |
| 6707 | } |
| 6708 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 6709 | /** |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6710 | * ufshcd_host_reset_and_restore - reset and restore host controller |
| 6711 | * @hba: per-adapter instance |
| 6712 | * |
| 6713 | * Note that host controller reset may issue DME_RESET to |
| 6714 | * local and remote (device) Uni-Pro stack and the attributes |
| 6715 | * are reset to default state. |
| 6716 | * |
| 6717 | * Returns zero on success, non-zero on failure |
| 6718 | */ |
| 6719 | static int ufshcd_host_reset_and_restore(struct ufs_hba *hba) |
| 6720 | { |
| 6721 | int err; |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6722 | unsigned long flags; |
| 6723 | |
| 6724 | /* Reset the host controller */ |
| 6725 | spin_lock_irqsave(hba->host->host_lock, flags); |
Yaniv Gardi | 596585a | 2016-03-10 17:37:08 +0200 | [diff] [blame] | 6726 | ufshcd_hba_stop(hba, false); |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6727 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 6728 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6729 | /* scale up clocks to max frequency before full reinitialization */ |
| 6730 | ufshcd_set_clk_freq(hba, true); |
| 6731 | |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6732 | err = ufshcd_hba_enable(hba); |
| 6733 | if (err) |
| 6734 | goto out; |
| 6735 | |
| 6736 | /* Establish the link again and restore the device */ |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 6737 | err = ufshcd_probe_hba(hba); |
| 6738 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6739 | if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL)) { |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6740 | err = -EIO; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6741 | goto out; |
| 6742 | } |
| 6743 | |
| 6744 | if (!err) { |
| 6745 | err = ufshcd_vops_crypto_engine_reset(hba); |
| 6746 | if (err) { |
| 6747 | dev_err(hba->dev, |
| 6748 | "%s: failed to reset crypto engine %d\n", |
| 6749 | __func__, err); |
| 6750 | goto out; |
| 6751 | } |
| 6752 | } |
| 6753 | |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6754 | out: |
| 6755 | if (err) |
| 6756 | dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err); |
| 6757 | |
| 6758 | return err; |
| 6759 | } |
| 6760 | |
| 6761 | /** |
| 6762 | * ufshcd_reset_and_restore - reset and re-initialize host/device |
| 6763 | * @hba: per-adapter instance |
| 6764 | * |
| 6765 | * Reset and recover device, host and re-establish link. This |
| 6766 | * is helpful to recover the communication in fatal error conditions. |
| 6767 | * |
| 6768 | * Returns zero on success, non-zero on failure |
| 6769 | */ |
| 6770 | static int ufshcd_reset_and_restore(struct ufs_hba *hba) |
| 6771 | { |
| 6772 | int err = 0; |
| 6773 | unsigned long flags; |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 6774 | int retries = MAX_HOST_RESET_RETRIES; |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6775 | |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 6776 | do { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6777 | err = ufshcd_vops_full_reset(hba); |
| 6778 | if (err) |
| 6779 | dev_warn(hba->dev, "%s: full reset returned %d\n", |
| 6780 | __func__, err); |
| 6781 | |
| 6782 | err = ufshcd_reset_device(hba); |
| 6783 | if (err) |
| 6784 | dev_warn(hba->dev, "%s: device reset failed. err %d\n", |
| 6785 | __func__, err); |
| 6786 | |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 6787 | err = ufshcd_host_reset_and_restore(hba); |
| 6788 | } while (err && --retries); |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6789 | |
| 6790 | /* |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 6791 | * There is no point proceeding even after failing |
| 6792 | * to recover after multiple retries. |
| 6793 | */ |
| 6794 | if (err) |
| 6795 | BUG(); |
| 6796 | /* |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6797 | * After reset the door-bell might be cleared, complete |
| 6798 | * outstanding requests in s/w here. |
| 6799 | */ |
| 6800 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 6801 | ufshcd_transfer_req_compl(hba); |
| 6802 | ufshcd_tmc_handler(hba); |
| 6803 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 6804 | |
| 6805 | return err; |
| 6806 | } |
| 6807 | |
| 6808 | /** |
| 6809 | * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer |
| 6810 | * @cmd - SCSI command pointer |
| 6811 | * |
| 6812 | * Returns SUCCESS/FAILED |
| 6813 | */ |
| 6814 | static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd) |
| 6815 | { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6816 | int err = SUCCESS; |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6817 | unsigned long flags; |
| 6818 | struct ufs_hba *hba; |
| 6819 | |
| 6820 | hba = shost_priv(cmd->device->host); |
| 6821 | |
| 6822 | /* |
| 6823 | * Check if there is any race with fatal error handling. |
| 6824 | * If so, wait for it to complete. Even though fatal error |
| 6825 | * handling does reset and restore in some cases, don't assume |
| 6826 | * anything out of it. We are just avoiding race here. |
| 6827 | */ |
| 6828 | do { |
| 6829 | spin_lock_irqsave(hba->host->host_lock, flags); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6830 | if (!(work_pending(&hba->eh_work) || |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6831 | hba->ufshcd_state == UFSHCD_STATE_RESET)) |
| 6832 | break; |
| 6833 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6834 | dev_err(hba->dev, "%s: reset in progress - 1\n", __func__); |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 6835 | flush_work(&hba->eh_work); |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6836 | } while (1); |
| 6837 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6838 | /* |
| 6839 | * we don't know if previous reset had really reset the host controller |
| 6840 | * or not. So let's force reset here to be sure. |
| 6841 | */ |
| 6842 | hba->ufshcd_state = UFSHCD_STATE_ERROR; |
| 6843 | hba->force_host_reset = true; |
| 6844 | schedule_work(&hba->eh_work); |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6845 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6846 | /* wait for the reset work to finish */ |
| 6847 | do { |
| 6848 | if (!(work_pending(&hba->eh_work) || |
| 6849 | hba->ufshcd_state == UFSHCD_STATE_RESET)) |
| 6850 | break; |
| 6851 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 6852 | dev_err(hba->dev, "%s: reset in progress - 2\n", __func__); |
| 6853 | flush_work(&hba->eh_work); |
| 6854 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 6855 | } while (1); |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6856 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6857 | if (!((hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) && |
| 6858 | ufshcd_is_link_active(hba))) { |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6859 | err = FAILED; |
| 6860 | hba->ufshcd_state = UFSHCD_STATE_ERROR; |
| 6861 | } |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 6862 | |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 6863 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 6864 | |
| 6865 | return err; |
| 6866 | } |
| 6867 | |
| 6868 | /** |
Yaniv Gardi | 3a4bf06 | 2014-09-25 15:32:27 +0300 | [diff] [blame] | 6869 | * ufshcd_get_max_icc_level - calculate the ICC level |
| 6870 | * @sup_curr_uA: max. current supported by the regulator |
| 6871 | * @start_scan: row at the desc table to start scan from |
| 6872 | * @buff: power descriptor buffer |
| 6873 | * |
| 6874 | * Returns calculated max ICC level for specific regulator |
| 6875 | */ |
| 6876 | static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff) |
| 6877 | { |
| 6878 | int i; |
| 6879 | int curr_uA; |
| 6880 | u16 data; |
| 6881 | u16 unit; |
| 6882 | |
| 6883 | for (i = start_scan; i >= 0; i--) { |
| 6884 | data = be16_to_cpu(*((u16 *)(buff + 2*i))); |
| 6885 | unit = (data & ATTR_ICC_LVL_UNIT_MASK) >> |
| 6886 | ATTR_ICC_LVL_UNIT_OFFSET; |
| 6887 | curr_uA = data & ATTR_ICC_LVL_VALUE_MASK; |
| 6888 | switch (unit) { |
| 6889 | case UFSHCD_NANO_AMP: |
| 6890 | curr_uA = curr_uA / 1000; |
| 6891 | break; |
| 6892 | case UFSHCD_MILI_AMP: |
| 6893 | curr_uA = curr_uA * 1000; |
| 6894 | break; |
| 6895 | case UFSHCD_AMP: |
| 6896 | curr_uA = curr_uA * 1000 * 1000; |
| 6897 | break; |
| 6898 | case UFSHCD_MICRO_AMP: |
| 6899 | default: |
| 6900 | break; |
| 6901 | } |
| 6902 | if (sup_curr_uA >= curr_uA) |
| 6903 | break; |
| 6904 | } |
| 6905 | if (i < 0) { |
| 6906 | i = 0; |
| 6907 | pr_err("%s: Couldn't find valid icc_level = %d", __func__, i); |
| 6908 | } |
| 6909 | |
| 6910 | return (u32)i; |
| 6911 | } |
| 6912 | |
| 6913 | /** |
Subhash Jadavani | a8d1ba3 | 2016-12-12 18:19:21 -0800 | [diff] [blame] | 6914 | * ufshcd_find_max_sup_active_icc_level - find the max ICC level |
Yaniv Gardi | 3a4bf06 | 2014-09-25 15:32:27 +0300 | [diff] [blame] | 6915 | * In case regulators are not initialized we'll return 0 |
| 6916 | * @hba: per-adapter instance |
| 6917 | * @desc_buf: power descriptor buffer to extract ICC levels from. |
| 6918 | * @len: length of desc_buff |
| 6919 | * |
Subhash Jadavani | a8d1ba3 | 2016-12-12 18:19:21 -0800 | [diff] [blame] | 6920 | * Returns calculated max ICC level |
Yaniv Gardi | 3a4bf06 | 2014-09-25 15:32:27 +0300 | [diff] [blame] | 6921 | */ |
| 6922 | static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba, |
| 6923 | u8 *desc_buf, int len) |
| 6924 | { |
| 6925 | u32 icc_level = 0; |
| 6926 | |
Subhash Jadavani | a8d1ba3 | 2016-12-12 18:19:21 -0800 | [diff] [blame] | 6927 | /* |
| 6928 | * VCCQ rail is optional for removable UFS card and also most of the |
| 6929 | * vendors don't use this rail for embedded UFS devices as well. So |
| 6930 | * it is normal that VCCQ rail may not be provided for given platform. |
| 6931 | */ |
| 6932 | if (!hba->vreg_info.vcc || !hba->vreg_info.vccq2) { |
| 6933 | dev_err(hba->dev, "%s: Regulator capability was not set, bActiveICCLevel=%d\n", |
| 6934 | __func__, icc_level); |
Yaniv Gardi | 3a4bf06 | 2014-09-25 15:32:27 +0300 | [diff] [blame] | 6935 | goto out; |
| 6936 | } |
| 6937 | |
| 6938 | if (hba->vreg_info.vcc) |
| 6939 | icc_level = ufshcd_get_max_icc_level( |
| 6940 | hba->vreg_info.vcc->max_uA, |
| 6941 | POWER_DESC_MAX_ACTV_ICC_LVLS - 1, |
| 6942 | &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]); |
| 6943 | |
| 6944 | if (hba->vreg_info.vccq) |
| 6945 | icc_level = ufshcd_get_max_icc_level( |
| 6946 | hba->vreg_info.vccq->max_uA, |
| 6947 | icc_level, |
| 6948 | &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]); |
| 6949 | |
| 6950 | if (hba->vreg_info.vccq2) |
| 6951 | icc_level = ufshcd_get_max_icc_level( |
| 6952 | hba->vreg_info.vccq2->max_uA, |
| 6953 | icc_level, |
| 6954 | &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]); |
| 6955 | out: |
| 6956 | return icc_level; |
| 6957 | } |
| 6958 | |
Subhash Jadavani | 8a93dbd | 2016-12-12 17:59:44 -0800 | [diff] [blame] | 6959 | static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba) |
Yaniv Gardi | 3a4bf06 | 2014-09-25 15:32:27 +0300 | [diff] [blame] | 6960 | { |
| 6961 | int ret; |
| 6962 | int buff_len = QUERY_DESC_POWER_MAX_SIZE; |
| 6963 | u8 desc_buf[QUERY_DESC_POWER_MAX_SIZE]; |
Subhash Jadavani | 35732e5 | 2016-12-09 16:09:42 -0800 | [diff] [blame] | 6964 | u32 icc_level; |
Yaniv Gardi | 3a4bf06 | 2014-09-25 15:32:27 +0300 | [diff] [blame] | 6965 | |
| 6966 | ret = ufshcd_read_power_desc(hba, desc_buf, buff_len); |
| 6967 | if (ret) { |
| 6968 | dev_err(hba->dev, |
| 6969 | "%s: Failed reading power descriptor.len = %d ret = %d", |
| 6970 | __func__, buff_len, ret); |
| 6971 | return; |
| 6972 | } |
| 6973 | |
Subhash Jadavani | 35732e5 | 2016-12-09 16:09:42 -0800 | [diff] [blame] | 6974 | icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf, |
| 6975 | buff_len); |
| 6976 | dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level); |
Yaniv Gardi | 3a4bf06 | 2014-09-25 15:32:27 +0300 | [diff] [blame] | 6977 | |
Yaniv Gardi | 5e86ae4 | 2016-02-01 15:02:50 +0200 | [diff] [blame] | 6978 | ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR, |
Subhash Jadavani | 35732e5 | 2016-12-09 16:09:42 -0800 | [diff] [blame] | 6979 | QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level); |
Yaniv Gardi | 3a4bf06 | 2014-09-25 15:32:27 +0300 | [diff] [blame] | 6980 | |
| 6981 | if (ret) |
| 6982 | dev_err(hba->dev, |
| 6983 | "%s: Failed configuring bActiveICCLevel = %d ret = %d", |
Subhash Jadavani | 35732e5 | 2016-12-09 16:09:42 -0800 | [diff] [blame] | 6984 | __func__, icc_level, ret); |
Yaniv Gardi | 3a4bf06 | 2014-09-25 15:32:27 +0300 | [diff] [blame] | 6985 | } |
| 6986 | |
| 6987 | /** |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 6988 | * ufshcd_scsi_add_wlus - Adds required W-LUs |
| 6989 | * @hba: per-adapter instance |
| 6990 | * |
Subhash Jadavani | 2df121a | 2016-12-15 18:27:31 -0800 | [diff] [blame] | 6991 | * UFS devices can support upto 4 well known logical units: |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 6992 | * "REPORT_LUNS" (address: 01h) |
| 6993 | * "UFS Device" (address: 50h) |
| 6994 | * "RPMB" (address: 44h) |
| 6995 | * "BOOT" (address: 30h) |
Subhash Jadavani | 2df121a | 2016-12-15 18:27:31 -0800 | [diff] [blame] | 6996 | * |
| 6997 | * "REPORT_LUNS" & "UFS Device" are mandatory for all device classes (see |
| 6998 | * "bDeviceSubClass" parameter of device descriptor) while "BOOT" is supported |
| 6999 | * only for bootable devices. "RPMB" is only supported with embedded devices. |
| 7000 | * |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 7001 | * UFS device's power management needs to be controlled by "POWER CONDITION" |
| 7002 | * field of SSU (START STOP UNIT) command. But this "power condition" field |
| 7003 | * will take effect only when its sent to "UFS device" well known logical unit |
| 7004 | * hence we require the scsi_device instance to represent this logical unit in |
| 7005 | * order for the UFS host driver to send the SSU command for power management. |
| 7006 | |
| 7007 | * We also require the scsi_device instance for "RPMB" (Replay Protected Memory |
| 7008 | * Block) LU so user space process can control this LU. User space may also |
| 7009 | * want to have access to BOOT LU. |
| 7010 | |
Subhash Jadavani | 2df121a | 2016-12-15 18:27:31 -0800 | [diff] [blame] | 7011 | * This function tries to add scsi device instances for each of all well known |
| 7012 | * LUs (except "REPORT LUNS" LU) depending on device class. |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 7013 | * |
| 7014 | * Returns zero on success (all required W-LUs are added successfully), |
| 7015 | * non-zero error value on failure (if failed to add any of the required W-LU). |
| 7016 | */ |
| 7017 | static int ufshcd_scsi_add_wlus(struct ufs_hba *hba) |
| 7018 | { |
| 7019 | int ret = 0; |
Channagoud Kadabi | 075db3b | 2017-03-16 14:26:17 -0700 | [diff] [blame] | 7020 | struct scsi_device *sdev_rpmb = NULL; |
| 7021 | struct scsi_device *sdev_boot = NULL; |
Subhash Jadavani | 2df121a | 2016-12-15 18:27:31 -0800 | [diff] [blame] | 7022 | bool is_bootable_dev = false; |
| 7023 | bool is_embedded_dev = false; |
| 7024 | |
| 7025 | if ((hba->dev_info.b_device_sub_class == UFS_DEV_EMBEDDED_BOOTABLE) || |
| 7026 | (hba->dev_info.b_device_sub_class == UFS_DEV_REMOVABLE_BOOTABLE)) |
| 7027 | is_bootable_dev = true; |
| 7028 | |
| 7029 | if ((hba->dev_info.b_device_sub_class == UFS_DEV_EMBEDDED_BOOTABLE) || |
| 7030 | (hba->dev_info.b_device_sub_class == UFS_DEV_EMBEDDED_NON_BOOTABLE)) |
| 7031 | is_embedded_dev = true; |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 7032 | |
| 7033 | hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0, |
| 7034 | ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL); |
| 7035 | if (IS_ERR(hba->sdev_ufs_device)) { |
| 7036 | ret = PTR_ERR(hba->sdev_ufs_device); |
Subhash Jadavani | 2df121a | 2016-12-15 18:27:31 -0800 | [diff] [blame] | 7037 | dev_err(hba->dev, "%s: failed adding DEVICE_WLUN. ret %d\n", |
| 7038 | __func__, ret); |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 7039 | hba->sdev_ufs_device = NULL; |
| 7040 | goto out; |
| 7041 | } |
Akinobu Mita | 7c48bfd | 2014-10-23 13:25:12 +0300 | [diff] [blame] | 7042 | scsi_device_put(hba->sdev_ufs_device); |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 7043 | |
Subhash Jadavani | 2df121a | 2016-12-15 18:27:31 -0800 | [diff] [blame] | 7044 | if (is_bootable_dev) { |
| 7045 | sdev_boot = __scsi_add_device(hba->host, 0, 0, |
| 7046 | ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), |
| 7047 | NULL); |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 7048 | |
Subhash Jadavani | 2df121a | 2016-12-15 18:27:31 -0800 | [diff] [blame] | 7049 | if (IS_ERR(sdev_boot)) { |
| 7050 | dev_err(hba->dev, "%s: failed adding BOOT_WLUN. ret %d\n", |
| 7051 | __func__, ret); |
| 7052 | ret = PTR_ERR(sdev_boot); |
| 7053 | goto remove_sdev_ufs_device; |
| 7054 | } |
| 7055 | scsi_device_put(sdev_boot); |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 7056 | } |
Subhash Jadavani | 2df121a | 2016-12-15 18:27:31 -0800 | [diff] [blame] | 7057 | |
| 7058 | if (is_embedded_dev) { |
| 7059 | sdev_rpmb = __scsi_add_device(hba->host, 0, 0, |
| 7060 | ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), |
| 7061 | NULL); |
| 7062 | if (IS_ERR(sdev_rpmb)) { |
| 7063 | dev_err(hba->dev, "%s: failed adding RPMB_WLUN. ret %d\n", |
| 7064 | __func__, ret); |
| 7065 | ret = PTR_ERR(sdev_rpmb); |
| 7066 | goto remove_sdev_boot; |
| 7067 | } |
| 7068 | scsi_device_put(sdev_rpmb); |
| 7069 | } |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 7070 | goto out; |
| 7071 | |
| 7072 | remove_sdev_boot: |
Subhash Jadavani | 2df121a | 2016-12-15 18:27:31 -0800 | [diff] [blame] | 7073 | if (is_bootable_dev) |
| 7074 | scsi_remove_device(sdev_boot); |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 7075 | remove_sdev_ufs_device: |
| 7076 | scsi_remove_device(hba->sdev_ufs_device); |
| 7077 | out: |
| 7078 | return ret; |
| 7079 | } |
| 7080 | |
| 7081 | /** |
Yaniv Gardi | 3711310 | 2016-03-10 17:37:16 +0200 | [diff] [blame] | 7082 | * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro |
| 7083 | * @hba: per-adapter instance |
| 7084 | * |
| 7085 | * PA_TActivate parameter can be tuned manually if UniPro version is less than |
| 7086 | * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's |
| 7087 | * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce |
| 7088 | * the hibern8 exit latency. |
| 7089 | * |
| 7090 | * Returns zero on success, non-zero error value on failure. |
| 7091 | */ |
| 7092 | static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba) |
| 7093 | { |
| 7094 | int ret = 0; |
| 7095 | u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate; |
| 7096 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7097 | if (!ufshcd_is_unipro_pa_params_tuning_req(hba)) |
| 7098 | return 0; |
| 7099 | |
Yaniv Gardi | 3711310 | 2016-03-10 17:37:16 +0200 | [diff] [blame] | 7100 | ret = ufshcd_dme_peer_get(hba, |
| 7101 | UIC_ARG_MIB_SEL( |
| 7102 | RX_MIN_ACTIVATETIME_CAPABILITY, |
| 7103 | UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)), |
| 7104 | &peer_rx_min_activatetime); |
| 7105 | if (ret) |
| 7106 | goto out; |
| 7107 | |
| 7108 | /* make sure proper unit conversion is applied */ |
| 7109 | tuned_pa_tactivate = |
| 7110 | ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US) |
| 7111 | / PA_TACTIVATE_TIME_UNIT_US); |
| 7112 | ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), |
| 7113 | tuned_pa_tactivate); |
| 7114 | |
| 7115 | out: |
| 7116 | return ret; |
| 7117 | } |
| 7118 | |
| 7119 | /** |
| 7120 | * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro |
| 7121 | * @hba: per-adapter instance |
| 7122 | * |
| 7123 | * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than |
| 7124 | * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's |
| 7125 | * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY. |
| 7126 | * This optimal value can help reduce the hibern8 exit latency. |
| 7127 | * |
| 7128 | * Returns zero on success, non-zero error value on failure. |
| 7129 | */ |
| 7130 | static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba) |
| 7131 | { |
| 7132 | int ret = 0; |
| 7133 | u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0; |
| 7134 | u32 max_hibern8_time, tuned_pa_hibern8time; |
| 7135 | |
| 7136 | ret = ufshcd_dme_get(hba, |
| 7137 | UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY, |
| 7138 | UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)), |
| 7139 | &local_tx_hibern8_time_cap); |
| 7140 | if (ret) |
| 7141 | goto out; |
| 7142 | |
| 7143 | ret = ufshcd_dme_peer_get(hba, |
| 7144 | UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY, |
| 7145 | UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)), |
| 7146 | &peer_rx_hibern8_time_cap); |
| 7147 | if (ret) |
| 7148 | goto out; |
| 7149 | |
| 7150 | max_hibern8_time = max(local_tx_hibern8_time_cap, |
| 7151 | peer_rx_hibern8_time_cap); |
| 7152 | /* make sure proper unit conversion is applied */ |
| 7153 | tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US) |
| 7154 | / PA_HIBERN8_TIME_UNIT_US); |
| 7155 | ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), |
| 7156 | tuned_pa_hibern8time); |
| 7157 | out: |
| 7158 | return ret; |
| 7159 | } |
| 7160 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7161 | /** |
| 7162 | * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is |
| 7163 | * less than device PA_TACTIVATE time. |
| 7164 | * @hba: per-adapter instance |
| 7165 | * |
| 7166 | * Some UFS devices require host PA_TACTIVATE to be lower than device |
| 7167 | * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk |
| 7168 | * for such devices. |
| 7169 | * |
| 7170 | * Returns zero on success, non-zero error value on failure. |
| 7171 | */ |
| 7172 | static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba) |
| 7173 | { |
| 7174 | int ret = 0; |
| 7175 | u32 granularity, peer_granularity; |
| 7176 | u32 pa_tactivate, peer_pa_tactivate; |
| 7177 | u32 pa_tactivate_us, peer_pa_tactivate_us; |
| 7178 | u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100}; |
| 7179 | |
| 7180 | ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY), |
| 7181 | &granularity); |
| 7182 | if (ret) |
| 7183 | goto out; |
| 7184 | |
| 7185 | ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY), |
| 7186 | &peer_granularity); |
| 7187 | if (ret) |
| 7188 | goto out; |
| 7189 | |
| 7190 | if ((granularity < PA_GRANULARITY_MIN_VAL) || |
| 7191 | (granularity > PA_GRANULARITY_MAX_VAL)) { |
| 7192 | dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d", |
| 7193 | __func__, granularity); |
| 7194 | return -EINVAL; |
| 7195 | } |
| 7196 | |
| 7197 | if ((peer_granularity < PA_GRANULARITY_MIN_VAL) || |
| 7198 | (peer_granularity > PA_GRANULARITY_MAX_VAL)) { |
| 7199 | dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d", |
| 7200 | __func__, peer_granularity); |
| 7201 | return -EINVAL; |
| 7202 | } |
| 7203 | |
| 7204 | ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate); |
| 7205 | if (ret) |
| 7206 | goto out; |
| 7207 | |
| 7208 | ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE), |
| 7209 | &peer_pa_tactivate); |
| 7210 | if (ret) |
| 7211 | goto out; |
| 7212 | |
| 7213 | pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1]; |
| 7214 | peer_pa_tactivate_us = peer_pa_tactivate * |
| 7215 | gran_to_us_table[peer_granularity - 1]; |
| 7216 | |
| 7217 | if (pa_tactivate_us > peer_pa_tactivate_us) { |
| 7218 | u32 new_peer_pa_tactivate; |
| 7219 | |
| 7220 | new_peer_pa_tactivate = pa_tactivate_us / |
| 7221 | gran_to_us_table[peer_granularity - 1]; |
| 7222 | new_peer_pa_tactivate++; |
| 7223 | ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE), |
| 7224 | new_peer_pa_tactivate); |
| 7225 | } |
| 7226 | |
| 7227 | out: |
| 7228 | return ret; |
| 7229 | } |
| 7230 | |
Yaniv Gardi | 3711310 | 2016-03-10 17:37:16 +0200 | [diff] [blame] | 7231 | static void ufshcd_tune_unipro_params(struct ufs_hba *hba) |
| 7232 | { |
| 7233 | if (ufshcd_is_unipro_pa_params_tuning_req(hba)) { |
| 7234 | ufshcd_tune_pa_tactivate(hba); |
| 7235 | ufshcd_tune_pa_hibern8time(hba); |
| 7236 | } |
| 7237 | |
Subhash Jadavani | 4f0df17b | 2016-12-16 13:19:27 -0800 | [diff] [blame] | 7238 | if (hba->dev_info.quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE) |
Yaniv Gardi | 3711310 | 2016-03-10 17:37:16 +0200 | [diff] [blame] | 7239 | /* set 1ms timeout for PA_TACTIVATE */ |
| 7240 | ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7241 | |
Subhash Jadavani | 4f0df17b | 2016-12-16 13:19:27 -0800 | [diff] [blame] | 7242 | if (hba->dev_info.quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE) |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7243 | ufshcd_quirk_tune_host_pa_tactivate(hba); |
| 7244 | |
| 7245 | ufshcd_vops_apply_dev_quirks(hba); |
| 7246 | } |
| 7247 | |
| 7248 | static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba) |
| 7249 | { |
| 7250 | int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist); |
| 7251 | |
| 7252 | hba->ufs_stats.hibern8_exit_cnt = 0; |
| 7253 | hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0); |
| 7254 | |
| 7255 | memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size); |
| 7256 | memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size); |
| 7257 | memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size); |
| 7258 | memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size); |
| 7259 | memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size); |
| 7260 | |
| 7261 | hba->req_abort_count = 0; |
| 7262 | } |
| 7263 | |
| 7264 | static void ufshcd_apply_pm_quirks(struct ufs_hba *hba) |
| 7265 | { |
Subhash Jadavani | 4f0df17b | 2016-12-16 13:19:27 -0800 | [diff] [blame] | 7266 | if (hba->dev_info.quirks & UFS_DEVICE_QUIRK_NO_LINK_OFF) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7267 | if (ufs_get_pm_lvl_to_link_pwr_state(hba->rpm_lvl) == |
| 7268 | UIC_LINK_OFF_STATE) { |
| 7269 | hba->rpm_lvl = |
| 7270 | ufs_get_desired_pm_lvl_for_dev_link_state( |
| 7271 | UFS_SLEEP_PWR_MODE, |
| 7272 | UIC_LINK_HIBERN8_STATE); |
| 7273 | dev_info(hba->dev, "UFS_DEVICE_QUIRK_NO_LINK_OFF enabled, changed rpm_lvl to %d\n", |
| 7274 | hba->rpm_lvl); |
| 7275 | } |
| 7276 | if (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) == |
| 7277 | UIC_LINK_OFF_STATE) { |
| 7278 | hba->spm_lvl = |
| 7279 | ufs_get_desired_pm_lvl_for_dev_link_state( |
| 7280 | UFS_SLEEP_PWR_MODE, |
| 7281 | UIC_LINK_HIBERN8_STATE); |
| 7282 | dev_info(hba->dev, "UFS_DEVICE_QUIRK_NO_LINK_OFF enabled, changed spm_lvl to %d\n", |
| 7283 | hba->spm_lvl); |
| 7284 | } |
| 7285 | } |
Yaniv Gardi | 3711310 | 2016-03-10 17:37:16 +0200 | [diff] [blame] | 7286 | } |
| 7287 | |
| 7288 | /** |
Subhash Jadavani | 88f9999 | 2016-12-13 15:52:21 -0800 | [diff] [blame] | 7289 | * ufshcd_set_dev_ref_clk - set the device bRefClkFreq |
| 7290 | * @hba: per-adapter instance |
| 7291 | * |
| 7292 | * Read the current value of the bRefClkFreq attribute from device and update it |
| 7293 | * if host is supplying different reference clock frequency than one mentioned |
| 7294 | * in bRefClkFreq attribute. |
| 7295 | * |
| 7296 | * Returns zero on success, non-zero error value on failure. |
| 7297 | */ |
| 7298 | static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba) |
| 7299 | { |
| 7300 | int err = 0; |
| 7301 | int ref_clk = -1; |
| 7302 | static const char * const ref_clk_freqs[] = {"19.2 MHz", "26 MHz", |
| 7303 | "38.4 MHz", "52 MHz"}; |
| 7304 | |
| 7305 | err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR, |
| 7306 | QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk); |
| 7307 | |
| 7308 | if (err) { |
| 7309 | dev_err(hba->dev, "%s: failed reading bRefClkFreq. err = %d\n", |
| 7310 | __func__, err); |
| 7311 | goto out; |
| 7312 | } |
| 7313 | |
| 7314 | if ((ref_clk < 0) || (ref_clk > REF_CLK_FREQ_52_MHZ)) { |
| 7315 | dev_err(hba->dev, "%s: invalid ref_clk setting = %d\n", |
| 7316 | __func__, ref_clk); |
| 7317 | err = -EINVAL; |
| 7318 | goto out; |
| 7319 | } |
| 7320 | |
| 7321 | if (ref_clk == hba->dev_ref_clk_freq) |
| 7322 | goto out; /* nothing to update */ |
| 7323 | |
| 7324 | err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR, |
| 7325 | QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, |
| 7326 | &hba->dev_ref_clk_freq); |
| 7327 | |
| 7328 | if (err) |
| 7329 | dev_err(hba->dev, "%s: bRefClkFreq setting to %s failed\n", |
| 7330 | __func__, ref_clk_freqs[hba->dev_ref_clk_freq]); |
| 7331 | else |
| 7332 | /* |
| 7333 | * It is good to print this out here to debug any later failures |
| 7334 | * related to gear switch. |
| 7335 | */ |
| 7336 | dev_info(hba->dev, "%s: bRefClkFreq setting to %s succeeded\n", |
| 7337 | __func__, ref_clk_freqs[hba->dev_ref_clk_freq]); |
| 7338 | |
| 7339 | out: |
| 7340 | return err; |
| 7341 | } |
| 7342 | |
Subhash Jadavani | 344c16c | 2016-12-15 17:09:35 -0800 | [diff] [blame] | 7343 | static int ufs_read_device_desc_data(struct ufs_hba *hba) |
| 7344 | { |
| 7345 | int err; |
| 7346 | u8 desc_buf[QUERY_DESC_DEVICE_MAX_SIZE]; |
| 7347 | |
| 7348 | err = ufshcd_read_device_desc(hba, desc_buf, sizeof(desc_buf)); |
| 7349 | if (err) |
| 7350 | return err; |
| 7351 | |
| 7352 | /* |
| 7353 | * getting vendor (manufacturerID) and Bank Index in big endian |
| 7354 | * format |
| 7355 | */ |
| 7356 | hba->dev_info.w_manufacturer_id = |
| 7357 | desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 | |
| 7358 | desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1]; |
| 7359 | hba->dev_info.b_device_sub_class = |
| 7360 | desc_buf[DEVICE_DESC_PARAM_DEVICE_SUB_CLASS]; |
| 7361 | hba->dev_info.i_product_name = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME]; |
| 7362 | |
| 7363 | return 0; |
| 7364 | } |
| 7365 | |
Subhash Jadavani | 88f9999 | 2016-12-13 15:52:21 -0800 | [diff] [blame] | 7366 | /** |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 7367 | * ufshcd_probe_hba - probe hba to detect device and initialize |
| 7368 | * @hba: per-adapter instance |
| 7369 | * |
| 7370 | * Execute link-startup and verify device initialization |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 7371 | */ |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 7372 | static int ufshcd_probe_hba(struct ufs_hba *hba) |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 7373 | { |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 7374 | int ret; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7375 | ktime_t start = ktime_get(); |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 7376 | |
| 7377 | ret = ufshcd_link_startup(hba); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 7378 | if (ret) |
| 7379 | goto out; |
| 7380 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7381 | /* Debug counters initialization */ |
| 7382 | ufshcd_clear_dbg_ufs_stats(hba); |
Yaniv Gardi | afdfff5 | 2016-03-10 17:37:15 +0200 | [diff] [blame] | 7383 | /* set the default level for urgent bkops */ |
| 7384 | hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT; |
| 7385 | hba->is_urgent_bkops_lvl_checked = false; |
| 7386 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7387 | /* UniPro link is active now */ |
| 7388 | ufshcd_set_link_active(hba); |
Seungwon Jeon | d3e89ba | 2013-08-31 21:40:24 +0530 | [diff] [blame] | 7389 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 7390 | ret = ufshcd_verify_dev_init(hba); |
| 7391 | if (ret) |
| 7392 | goto out; |
| 7393 | |
Dolev Raviv | 68078d5 | 2013-07-30 00:35:58 +0530 | [diff] [blame] | 7394 | ret = ufshcd_complete_dev_init(hba); |
| 7395 | if (ret) |
| 7396 | goto out; |
| 7397 | |
Subhash Jadavani | 2df121a | 2016-12-15 18:27:31 -0800 | [diff] [blame] | 7398 | /* clear any previous UFS device information */ |
| 7399 | memset(&hba->dev_info, 0, sizeof(hba->dev_info)); |
| 7400 | |
Subhash Jadavani | 344c16c | 2016-12-15 17:09:35 -0800 | [diff] [blame] | 7401 | /* cache important parameters from device descriptor for later use */ |
| 7402 | ret = ufs_read_device_desc_data(hba); |
| 7403 | if (ret) |
| 7404 | goto out; |
| 7405 | |
Yaniv Gardi | c58ab7a | 2016-03-10 17:37:10 +0200 | [diff] [blame] | 7406 | ufs_advertise_fixup_device(hba); |
Yaniv Gardi | 3711310 | 2016-03-10 17:37:16 +0200 | [diff] [blame] | 7407 | ufshcd_tune_unipro_params(hba); |
Yaniv Gardi | 60f0187 | 2016-03-10 17:37:11 +0200 | [diff] [blame] | 7408 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7409 | ufshcd_apply_pm_quirks(hba); |
Yaniv Gardi | 60f0187 | 2016-03-10 17:37:11 +0200 | [diff] [blame] | 7410 | ret = ufshcd_set_vccq_rail_unused(hba, |
Subhash Jadavani | 4f0df17b | 2016-12-16 13:19:27 -0800 | [diff] [blame] | 7411 | (hba->dev_info.quirks & UFS_DEVICE_NO_VCCQ) ? true : false); |
Yaniv Gardi | 60f0187 | 2016-03-10 17:37:11 +0200 | [diff] [blame] | 7412 | if (ret) |
| 7413 | goto out; |
| 7414 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7415 | /* UFS device is also active now */ |
| 7416 | ufshcd_set_ufs_dev_active(hba); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 7417 | ufshcd_force_reset_auto_bkops(hba); |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 7418 | |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 7419 | if (ufshcd_get_max_pwr_mode(hba)) { |
| 7420 | dev_err(hba->dev, |
| 7421 | "%s: Failed getting max supported power mode\n", |
| 7422 | __func__); |
| 7423 | } else { |
Subhash Jadavani | 88f9999 | 2016-12-13 15:52:21 -0800 | [diff] [blame] | 7424 | /* |
| 7425 | * Set the right value to bRefClkFreq before attempting to |
| 7426 | * switch to HS gears. |
| 7427 | */ |
| 7428 | ufshcd_set_dev_ref_clk(hba); |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 7429 | ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7430 | if (ret) { |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 7431 | dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n", |
| 7432 | __func__, ret); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7433 | goto out; |
| 7434 | } |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 7435 | } |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7436 | |
Subhash Jadavani | 8a93dbd | 2016-12-12 17:59:44 -0800 | [diff] [blame] | 7437 | /* |
| 7438 | * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec) |
| 7439 | * and for removable UFS card as well, hence always set the parameter. |
| 7440 | * Note: Error handler may issue the device reset hence resetting |
| 7441 | * bActiveICCLevel as well so it is always safe to set this here. |
| 7442 | */ |
| 7443 | ufshcd_set_active_icc_lvl(hba); |
| 7444 | |
Yaniv Gardi | 53c12d0 | 2016-02-01 15:02:45 +0200 | [diff] [blame] | 7445 | /* set the state as operational after switching to desired gear */ |
| 7446 | hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7447 | /* |
| 7448 | * If we are in error handling context or in power management callbacks |
| 7449 | * context, no need to scan the host |
| 7450 | */ |
| 7451 | if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) { |
| 7452 | bool flag; |
| 7453 | |
Yaniv Gardi | dc3c8d3 | 2016-02-01 15:02:46 +0200 | [diff] [blame] | 7454 | if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG, |
| 7455 | QUERY_FLAG_IDN_PWR_ON_WPE, &flag)) |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7456 | hba->dev_info.f_power_on_wp_en = flag; |
| 7457 | |
Subhash Jadavani | 2a8fa60 | 2014-09-25 15:32:28 +0300 | [diff] [blame] | 7458 | /* Add required well known logical units to scsi mid layer */ |
| 7459 | if (ufshcd_scsi_add_wlus(hba)) |
| 7460 | goto out; |
| 7461 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 7462 | /* Initialize devfreq after UFS device is detected */ |
| 7463 | if (ufshcd_is_clkscaling_supported(hba)) { |
| 7464 | memcpy(&hba->clk_scaling.saved_pwr_info.info, |
| 7465 | &hba->pwr_info, sizeof(struct ufs_pa_layer_attr)); |
| 7466 | hba->clk_scaling.saved_pwr_info.is_valid = true; |
| 7467 | hba->clk_scaling.is_scaled_up = true; |
| 7468 | if (!hba->devfreq) { |
| 7469 | hba->devfreq = devfreq_add_device(hba->dev, |
| 7470 | &ufs_devfreq_profile, |
| 7471 | "simple_ondemand", |
| 7472 | gov_data); |
| 7473 | if (IS_ERR(hba->devfreq)) { |
| 7474 | ret = PTR_ERR(hba->devfreq); |
| 7475 | dev_err(hba->dev, "Unable to register with devfreq %d\n", |
| 7476 | ret); |
| 7477 | goto out; |
| 7478 | } |
| 7479 | } |
| 7480 | hba->clk_scaling.is_allowed = true; |
| 7481 | } |
| 7482 | |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 7483 | scsi_scan_host(hba->host); |
| 7484 | pm_runtime_put_sync(hba->dev); |
| 7485 | } |
Yaniv Gardi | 3a4bf06 | 2014-09-25 15:32:27 +0300 | [diff] [blame] | 7486 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 7487 | /* |
| 7488 | * Enable auto hibern8 if supported, after full host and |
| 7489 | * device initialization. |
| 7490 | */ |
| 7491 | if (ufshcd_is_auto_hibern8_supported(hba)) |
| 7492 | ufshcd_set_auto_hibern8_timer(hba, |
| 7493 | hba->hibern8_on_idle.delay_ms); |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 7494 | out: |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 7495 | /* |
| 7496 | * If we failed to initialize the device or the device is not |
| 7497 | * present, turn off the power/clocks etc. |
| 7498 | */ |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7499 | if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) { |
| 7500 | pm_runtime_put_sync(hba->dev); |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 7501 | ufshcd_hba_exit(hba); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7502 | } |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 7503 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7504 | trace_ufshcd_init(dev_name(hba->dev), ret, |
| 7505 | ktime_to_us(ktime_sub(ktime_get(), start)), |
| 7506 | hba->curr_dev_pwr_mode, hba->uic_link_state); |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 7507 | return ret; |
| 7508 | } |
| 7509 | |
| 7510 | /** |
| 7511 | * ufshcd_async_scan - asynchronous execution for probing hba |
| 7512 | * @data: data pointer to pass to this function |
| 7513 | * @cookie: cookie data |
| 7514 | */ |
| 7515 | static void ufshcd_async_scan(void *data, async_cookie_t cookie) |
| 7516 | { |
| 7517 | struct ufs_hba *hba = (struct ufs_hba *)data; |
| 7518 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7519 | /* |
| 7520 | * Don't allow clock gating and hibern8 enter for faster device |
| 7521 | * detection. |
| 7522 | */ |
| 7523 | ufshcd_hold_all(hba); |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 7524 | ufshcd_probe_hba(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7525 | ufshcd_release_all(hba); |
| 7526 | } |
| 7527 | |
| 7528 | /** |
| 7529 | * ufshcd_query_ioctl - perform user read queries |
| 7530 | * @hba: per-adapter instance |
| 7531 | * @lun: used for lun specific queries |
| 7532 | * @buffer: user space buffer for reading and submitting query data and params |
| 7533 | * @return: 0 for success negative error code otherwise |
| 7534 | * |
| 7535 | * Expected/Submitted buffer structure is struct ufs_ioctl_query_data. |
| 7536 | * It will read the opcode, idn and buf_length parameters, and, put the |
| 7537 | * response in the buffer field while updating the used size in buf_length. |
| 7538 | */ |
| 7539 | static int ufshcd_query_ioctl(struct ufs_hba *hba, u8 lun, void __user *buffer) |
| 7540 | { |
| 7541 | struct ufs_ioctl_query_data *ioctl_data; |
| 7542 | int err = 0; |
| 7543 | int length = 0; |
| 7544 | void *data_ptr; |
| 7545 | bool flag; |
| 7546 | u32 att; |
| 7547 | u8 index; |
| 7548 | u8 *desc = NULL; |
| 7549 | |
| 7550 | ioctl_data = kzalloc(sizeof(struct ufs_ioctl_query_data), GFP_KERNEL); |
| 7551 | if (!ioctl_data) { |
| 7552 | dev_err(hba->dev, "%s: Failed allocating %zu bytes\n", __func__, |
| 7553 | sizeof(struct ufs_ioctl_query_data)); |
| 7554 | err = -ENOMEM; |
| 7555 | goto out; |
| 7556 | } |
| 7557 | |
| 7558 | /* extract params from user buffer */ |
| 7559 | err = copy_from_user(ioctl_data, buffer, |
| 7560 | sizeof(struct ufs_ioctl_query_data)); |
| 7561 | if (err) { |
| 7562 | dev_err(hba->dev, |
| 7563 | "%s: Failed copying buffer from user, err %d\n", |
| 7564 | __func__, err); |
| 7565 | goto out_release_mem; |
| 7566 | } |
| 7567 | |
| 7568 | /* verify legal parameters & send query */ |
| 7569 | switch (ioctl_data->opcode) { |
| 7570 | case UPIU_QUERY_OPCODE_READ_DESC: |
| 7571 | switch (ioctl_data->idn) { |
| 7572 | case QUERY_DESC_IDN_DEVICE: |
| 7573 | case QUERY_DESC_IDN_CONFIGURAION: |
| 7574 | case QUERY_DESC_IDN_INTERCONNECT: |
| 7575 | case QUERY_DESC_IDN_GEOMETRY: |
| 7576 | case QUERY_DESC_IDN_POWER: |
| 7577 | index = 0; |
| 7578 | break; |
| 7579 | case QUERY_DESC_IDN_UNIT: |
| 7580 | if (!ufs_is_valid_unit_desc_lun(lun)) { |
| 7581 | dev_err(hba->dev, |
| 7582 | "%s: No unit descriptor for lun 0x%x\n", |
| 7583 | __func__, lun); |
| 7584 | err = -EINVAL; |
| 7585 | goto out_release_mem; |
| 7586 | } |
| 7587 | index = lun; |
| 7588 | break; |
| 7589 | default: |
| 7590 | goto out_einval; |
| 7591 | } |
| 7592 | length = min_t(int, QUERY_DESC_MAX_SIZE, |
| 7593 | ioctl_data->buf_size); |
| 7594 | desc = kzalloc(length, GFP_KERNEL); |
| 7595 | if (!desc) { |
| 7596 | dev_err(hba->dev, "%s: Failed allocating %d bytes\n", |
| 7597 | __func__, length); |
| 7598 | err = -ENOMEM; |
| 7599 | goto out_release_mem; |
| 7600 | } |
| 7601 | err = ufshcd_query_descriptor(hba, ioctl_data->opcode, |
| 7602 | ioctl_data->idn, index, 0, desc, &length); |
| 7603 | break; |
| 7604 | case UPIU_QUERY_OPCODE_READ_ATTR: |
| 7605 | switch (ioctl_data->idn) { |
| 7606 | case QUERY_ATTR_IDN_BOOT_LU_EN: |
| 7607 | case QUERY_ATTR_IDN_POWER_MODE: |
| 7608 | case QUERY_ATTR_IDN_ACTIVE_ICC_LVL: |
| 7609 | case QUERY_ATTR_IDN_OOO_DATA_EN: |
| 7610 | case QUERY_ATTR_IDN_BKOPS_STATUS: |
| 7611 | case QUERY_ATTR_IDN_PURGE_STATUS: |
| 7612 | case QUERY_ATTR_IDN_MAX_DATA_IN: |
| 7613 | case QUERY_ATTR_IDN_MAX_DATA_OUT: |
| 7614 | case QUERY_ATTR_IDN_REF_CLK_FREQ: |
| 7615 | case QUERY_ATTR_IDN_CONF_DESC_LOCK: |
| 7616 | case QUERY_ATTR_IDN_MAX_NUM_OF_RTT: |
| 7617 | case QUERY_ATTR_IDN_EE_CONTROL: |
| 7618 | case QUERY_ATTR_IDN_EE_STATUS: |
| 7619 | case QUERY_ATTR_IDN_SECONDS_PASSED: |
| 7620 | index = 0; |
| 7621 | break; |
| 7622 | case QUERY_ATTR_IDN_DYN_CAP_NEEDED: |
| 7623 | case QUERY_ATTR_IDN_CORR_PRG_BLK_NUM: |
| 7624 | index = lun; |
| 7625 | break; |
| 7626 | default: |
| 7627 | goto out_einval; |
| 7628 | } |
| 7629 | err = ufshcd_query_attr(hba, ioctl_data->opcode, ioctl_data->idn, |
| 7630 | index, 0, &att); |
| 7631 | break; |
| 7632 | |
| 7633 | case UPIU_QUERY_OPCODE_WRITE_ATTR: |
| 7634 | err = copy_from_user(&att, |
| 7635 | buffer + sizeof(struct ufs_ioctl_query_data), |
| 7636 | sizeof(u32)); |
| 7637 | if (err) { |
| 7638 | dev_err(hba->dev, |
| 7639 | "%s: Failed copying buffer from user, err %d\n", |
| 7640 | __func__, err); |
| 7641 | goto out_release_mem; |
| 7642 | } |
| 7643 | |
| 7644 | switch (ioctl_data->idn) { |
| 7645 | case QUERY_ATTR_IDN_BOOT_LU_EN: |
| 7646 | index = 0; |
| 7647 | if (att > QUERY_ATTR_IDN_BOOT_LU_EN_MAX) { |
| 7648 | dev_err(hba->dev, |
| 7649 | "%s: Illegal ufs query ioctl data, opcode 0x%x, idn 0x%x, att 0x%x\n", |
| 7650 | __func__, ioctl_data->opcode, |
| 7651 | (unsigned int)ioctl_data->idn, att); |
| 7652 | err = -EINVAL; |
| 7653 | goto out_release_mem; |
| 7654 | } |
| 7655 | break; |
| 7656 | default: |
| 7657 | goto out_einval; |
| 7658 | } |
| 7659 | err = ufshcd_query_attr(hba, ioctl_data->opcode, |
| 7660 | ioctl_data->idn, index, 0, &att); |
| 7661 | break; |
| 7662 | |
| 7663 | case UPIU_QUERY_OPCODE_READ_FLAG: |
| 7664 | switch (ioctl_data->idn) { |
| 7665 | case QUERY_FLAG_IDN_FDEVICEINIT: |
| 7666 | case QUERY_FLAG_IDN_PERMANENT_WPE: |
| 7667 | case QUERY_FLAG_IDN_PWR_ON_WPE: |
| 7668 | case QUERY_FLAG_IDN_BKOPS_EN: |
| 7669 | case QUERY_FLAG_IDN_PURGE_ENABLE: |
| 7670 | case QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL: |
| 7671 | case QUERY_FLAG_IDN_BUSY_RTC: |
| 7672 | break; |
| 7673 | default: |
| 7674 | goto out_einval; |
| 7675 | } |
| 7676 | err = ufshcd_query_flag_retry(hba, ioctl_data->opcode, |
| 7677 | ioctl_data->idn, &flag); |
| 7678 | break; |
| 7679 | default: |
| 7680 | goto out_einval; |
| 7681 | } |
| 7682 | |
| 7683 | if (err) { |
| 7684 | dev_err(hba->dev, "%s: Query for idn %d failed\n", __func__, |
| 7685 | ioctl_data->idn); |
| 7686 | goto out_release_mem; |
| 7687 | } |
| 7688 | |
| 7689 | /* |
| 7690 | * copy response data |
| 7691 | * As we might end up reading less data then what is specified in |
| 7692 | * "ioctl_data->buf_size". So we are updating "ioctl_data-> |
| 7693 | * buf_size" to what exactly we have read. |
| 7694 | */ |
| 7695 | switch (ioctl_data->opcode) { |
| 7696 | case UPIU_QUERY_OPCODE_READ_DESC: |
| 7697 | ioctl_data->buf_size = min_t(int, ioctl_data->buf_size, length); |
| 7698 | data_ptr = desc; |
| 7699 | break; |
| 7700 | case UPIU_QUERY_OPCODE_READ_ATTR: |
| 7701 | ioctl_data->buf_size = sizeof(u32); |
| 7702 | data_ptr = &att; |
| 7703 | break; |
| 7704 | case UPIU_QUERY_OPCODE_READ_FLAG: |
| 7705 | ioctl_data->buf_size = 1; |
| 7706 | data_ptr = &flag; |
| 7707 | break; |
| 7708 | case UPIU_QUERY_OPCODE_WRITE_ATTR: |
| 7709 | goto out_release_mem; |
| 7710 | default: |
| 7711 | goto out_einval; |
| 7712 | } |
| 7713 | |
| 7714 | /* copy to user */ |
| 7715 | err = copy_to_user(buffer, ioctl_data, |
| 7716 | sizeof(struct ufs_ioctl_query_data)); |
| 7717 | if (err) |
| 7718 | dev_err(hba->dev, "%s: Failed copying back to user.\n", |
| 7719 | __func__); |
| 7720 | err = copy_to_user(buffer + sizeof(struct ufs_ioctl_query_data), |
| 7721 | data_ptr, ioctl_data->buf_size); |
| 7722 | if (err) |
| 7723 | dev_err(hba->dev, "%s: err %d copying back to user.\n", |
| 7724 | __func__, err); |
| 7725 | goto out_release_mem; |
| 7726 | |
| 7727 | out_einval: |
| 7728 | dev_err(hba->dev, |
| 7729 | "%s: illegal ufs query ioctl data, opcode 0x%x, idn 0x%x\n", |
| 7730 | __func__, ioctl_data->opcode, (unsigned int)ioctl_data->idn); |
| 7731 | err = -EINVAL; |
| 7732 | out_release_mem: |
| 7733 | kfree(ioctl_data); |
| 7734 | kfree(desc); |
| 7735 | out: |
| 7736 | return err; |
| 7737 | } |
| 7738 | |
| 7739 | /** |
| 7740 | * ufshcd_ioctl - ufs ioctl callback registered in scsi_host |
| 7741 | * @dev: scsi device required for per LUN queries |
| 7742 | * @cmd: command opcode |
| 7743 | * @buffer: user space buffer for transferring data |
| 7744 | * |
| 7745 | * Supported commands: |
| 7746 | * UFS_IOCTL_QUERY |
| 7747 | */ |
| 7748 | static int ufshcd_ioctl(struct scsi_device *dev, int cmd, void __user *buffer) |
| 7749 | { |
| 7750 | struct ufs_hba *hba = shost_priv(dev->host); |
| 7751 | int err = 0; |
| 7752 | |
| 7753 | BUG_ON(!hba); |
| 7754 | if (!buffer) { |
| 7755 | dev_err(hba->dev, "%s: User buffer is NULL!\n", __func__); |
| 7756 | return -EINVAL; |
| 7757 | } |
| 7758 | |
| 7759 | switch (cmd) { |
| 7760 | case UFS_IOCTL_QUERY: |
| 7761 | pm_runtime_get_sync(hba->dev); |
| 7762 | err = ufshcd_query_ioctl(hba, ufshcd_scsi_to_upiu_lun(dev->lun), |
| 7763 | buffer); |
| 7764 | pm_runtime_put_sync(hba->dev); |
| 7765 | break; |
| 7766 | default: |
| 7767 | err = -ENOIOCTLCMD; |
| 7768 | dev_dbg(hba->dev, "%s: Unsupported ioctl cmd %d\n", __func__, |
| 7769 | cmd); |
| 7770 | break; |
| 7771 | } |
| 7772 | |
| 7773 | return err; |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 7774 | } |
| 7775 | |
Yaniv Gardi | f550c65 | 2016-03-10 17:37:07 +0200 | [diff] [blame] | 7776 | static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd) |
| 7777 | { |
| 7778 | unsigned long flags; |
| 7779 | struct Scsi_Host *host; |
| 7780 | struct ufs_hba *hba; |
| 7781 | int index; |
| 7782 | bool found = false; |
| 7783 | |
| 7784 | if (!scmd || !scmd->device || !scmd->device->host) |
| 7785 | return BLK_EH_NOT_HANDLED; |
| 7786 | |
| 7787 | host = scmd->device->host; |
| 7788 | hba = shost_priv(host); |
| 7789 | if (!hba) |
| 7790 | return BLK_EH_NOT_HANDLED; |
| 7791 | |
| 7792 | spin_lock_irqsave(host->host_lock, flags); |
| 7793 | |
| 7794 | for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) { |
| 7795 | if (hba->lrb[index].cmd == scmd) { |
| 7796 | found = true; |
| 7797 | break; |
| 7798 | } |
| 7799 | } |
| 7800 | |
| 7801 | spin_unlock_irqrestore(host->host_lock, flags); |
| 7802 | |
| 7803 | /* |
| 7804 | * Bypass SCSI error handling and reset the block layer timer if this |
| 7805 | * SCSI command was not actually dispatched to UFS driver, otherwise |
| 7806 | * let SCSI layer handle the error as usual. |
| 7807 | */ |
| 7808 | return found ? BLK_EH_NOT_HANDLED : BLK_EH_RESET_TIMER; |
| 7809 | } |
| 7810 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 7811 | static struct scsi_host_template ufshcd_driver_template = { |
| 7812 | .module = THIS_MODULE, |
| 7813 | .name = UFSHCD, |
| 7814 | .proc_name = UFSHCD, |
| 7815 | .queuecommand = ufshcd_queuecommand, |
| 7816 | .slave_alloc = ufshcd_slave_alloc, |
Akinobu Mita | eeda474 | 2014-07-01 23:00:32 +0900 | [diff] [blame] | 7817 | .slave_configure = ufshcd_slave_configure, |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 7818 | .slave_destroy = ufshcd_slave_destroy, |
Sujit Reddy Thumma | 4264fd6 | 2014-06-29 09:40:20 +0300 | [diff] [blame] | 7819 | .change_queue_depth = ufshcd_change_queue_depth, |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 7820 | .eh_abort_handler = ufshcd_abort, |
Sujit Reddy Thumma | 3441da7 | 2014-05-26 10:59:14 +0530 | [diff] [blame] | 7821 | .eh_device_reset_handler = ufshcd_eh_device_reset_handler, |
| 7822 | .eh_host_reset_handler = ufshcd_eh_host_reset_handler, |
Yaniv Gardi | f550c65 | 2016-03-10 17:37:07 +0200 | [diff] [blame] | 7823 | .eh_timed_out = ufshcd_eh_timed_out, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7824 | .ioctl = ufshcd_ioctl, |
| 7825 | #ifdef CONFIG_COMPAT |
| 7826 | .compat_ioctl = ufshcd_ioctl, |
| 7827 | #endif |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 7828 | .this_id = -1, |
| 7829 | .sg_tablesize = SG_ALL, |
| 7830 | .cmd_per_lun = UFSHCD_CMD_PER_LUN, |
| 7831 | .can_queue = UFSHCD_CAN_QUEUE, |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 7832 | .max_host_blocked = 1, |
Christoph Hellwig | c40ecc1 | 2014-11-13 14:25:11 +0100 | [diff] [blame] | 7833 | .track_queue_depth = 1, |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 7834 | }; |
| 7835 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7836 | static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg, |
| 7837 | int ua) |
| 7838 | { |
Bjorn Andersson | 7b16a07 | 2015-02-11 19:35:28 -0800 | [diff] [blame] | 7839 | int ret; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7840 | |
Bjorn Andersson | 7b16a07 | 2015-02-11 19:35:28 -0800 | [diff] [blame] | 7841 | if (!vreg) |
| 7842 | return 0; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7843 | |
Bjorn Andersson | 7b16a07 | 2015-02-11 19:35:28 -0800 | [diff] [blame] | 7844 | ret = regulator_set_load(vreg->reg, ua); |
| 7845 | if (ret < 0) { |
| 7846 | dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n", |
| 7847 | __func__, vreg->name, ua, ret); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7848 | } |
| 7849 | |
| 7850 | return ret; |
| 7851 | } |
| 7852 | |
| 7853 | static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba, |
| 7854 | struct ufs_vreg *vreg) |
| 7855 | { |
Yaniv Gardi | 60f0187 | 2016-03-10 17:37:11 +0200 | [diff] [blame] | 7856 | if (!vreg) |
| 7857 | return 0; |
| 7858 | else if (vreg->unused) |
| 7859 | return 0; |
| 7860 | else |
| 7861 | return ufshcd_config_vreg_load(hba->dev, vreg, |
| 7862 | UFS_VREG_LPM_LOAD_UA); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7863 | } |
| 7864 | |
| 7865 | static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba, |
| 7866 | struct ufs_vreg *vreg) |
| 7867 | { |
Yaniv Gardi | 60f0187 | 2016-03-10 17:37:11 +0200 | [diff] [blame] | 7868 | if (!vreg) |
| 7869 | return 0; |
| 7870 | else if (vreg->unused) |
| 7871 | return 0; |
| 7872 | else |
| 7873 | return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7874 | } |
| 7875 | |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 7876 | static int ufshcd_config_vreg(struct device *dev, |
| 7877 | struct ufs_vreg *vreg, bool on) |
| 7878 | { |
| 7879 | int ret = 0; |
| 7880 | struct regulator *reg = vreg->reg; |
| 7881 | const char *name = vreg->name; |
| 7882 | int min_uV, uA_load; |
| 7883 | |
| 7884 | BUG_ON(!vreg); |
| 7885 | |
| 7886 | if (regulator_count_voltages(reg) > 0) { |
| 7887 | min_uV = on ? vreg->min_uV : 0; |
| 7888 | ret = regulator_set_voltage(reg, min_uV, vreg->max_uV); |
| 7889 | if (ret) { |
| 7890 | dev_err(dev, "%s: %s set voltage failed, err=%d\n", |
| 7891 | __func__, name, ret); |
| 7892 | goto out; |
| 7893 | } |
| 7894 | |
| 7895 | uA_load = on ? vreg->max_uA : 0; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 7896 | ret = ufshcd_config_vreg_load(dev, vreg, uA_load); |
| 7897 | if (ret) |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 7898 | goto out; |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 7899 | } |
| 7900 | out: |
| 7901 | return ret; |
| 7902 | } |
| 7903 | |
| 7904 | static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg) |
| 7905 | { |
| 7906 | int ret = 0; |
| 7907 | |
Yaniv Gardi | 60f0187 | 2016-03-10 17:37:11 +0200 | [diff] [blame] | 7908 | if (!vreg) |
| 7909 | goto out; |
| 7910 | else if (vreg->enabled || vreg->unused) |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 7911 | goto out; |
| 7912 | |
| 7913 | ret = ufshcd_config_vreg(dev, vreg, true); |
| 7914 | if (!ret) |
| 7915 | ret = regulator_enable(vreg->reg); |
| 7916 | |
| 7917 | if (!ret) |
| 7918 | vreg->enabled = true; |
| 7919 | else |
| 7920 | dev_err(dev, "%s: %s enable failed, err=%d\n", |
| 7921 | __func__, vreg->name, ret); |
| 7922 | out: |
| 7923 | return ret; |
| 7924 | } |
| 7925 | |
| 7926 | static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg) |
| 7927 | { |
| 7928 | int ret = 0; |
| 7929 | |
Yaniv Gardi | 60f0187 | 2016-03-10 17:37:11 +0200 | [diff] [blame] | 7930 | if (!vreg) |
| 7931 | goto out; |
| 7932 | else if (!vreg->enabled || vreg->unused) |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 7933 | goto out; |
| 7934 | |
| 7935 | ret = regulator_disable(vreg->reg); |
| 7936 | |
| 7937 | if (!ret) { |
| 7938 | /* ignore errors on applying disable config */ |
| 7939 | ufshcd_config_vreg(dev, vreg, false); |
| 7940 | vreg->enabled = false; |
| 7941 | } else { |
| 7942 | dev_err(dev, "%s: %s disable failed, err=%d\n", |
| 7943 | __func__, vreg->name, ret); |
| 7944 | } |
| 7945 | out: |
| 7946 | return ret; |
| 7947 | } |
| 7948 | |
| 7949 | static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on) |
| 7950 | { |
| 7951 | int ret = 0; |
| 7952 | struct device *dev = hba->dev; |
| 7953 | struct ufs_vreg_info *info = &hba->vreg_info; |
| 7954 | |
| 7955 | if (!info) |
| 7956 | goto out; |
| 7957 | |
| 7958 | ret = ufshcd_toggle_vreg(dev, info->vcc, on); |
| 7959 | if (ret) |
| 7960 | goto out; |
| 7961 | |
| 7962 | ret = ufshcd_toggle_vreg(dev, info->vccq, on); |
| 7963 | if (ret) |
| 7964 | goto out; |
| 7965 | |
| 7966 | ret = ufshcd_toggle_vreg(dev, info->vccq2, on); |
| 7967 | if (ret) |
| 7968 | goto out; |
| 7969 | |
| 7970 | out: |
| 7971 | if (ret) { |
| 7972 | ufshcd_toggle_vreg(dev, info->vccq2, false); |
| 7973 | ufshcd_toggle_vreg(dev, info->vccq, false); |
| 7974 | ufshcd_toggle_vreg(dev, info->vcc, false); |
| 7975 | } |
| 7976 | return ret; |
| 7977 | } |
| 7978 | |
Raviv Shvili | 6a771a6 | 2014-09-25 15:32:24 +0300 | [diff] [blame] | 7979 | static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on) |
| 7980 | { |
| 7981 | struct ufs_vreg_info *info = &hba->vreg_info; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7982 | int ret = 0; |
Raviv Shvili | 6a771a6 | 2014-09-25 15:32:24 +0300 | [diff] [blame] | 7983 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7984 | if (info->vdd_hba) { |
| 7985 | ret = ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on); |
Raviv Shvili | 6a771a6 | 2014-09-25 15:32:24 +0300 | [diff] [blame] | 7986 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 7987 | if (!ret) |
| 7988 | ufshcd_vops_update_sec_cfg(hba, on); |
| 7989 | } |
| 7990 | |
| 7991 | return ret; |
Raviv Shvili | 6a771a6 | 2014-09-25 15:32:24 +0300 | [diff] [blame] | 7992 | } |
| 7993 | |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 7994 | static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg) |
| 7995 | { |
| 7996 | int ret = 0; |
| 7997 | |
| 7998 | if (!vreg) |
| 7999 | goto out; |
| 8000 | |
| 8001 | vreg->reg = devm_regulator_get(dev, vreg->name); |
| 8002 | if (IS_ERR(vreg->reg)) { |
| 8003 | ret = PTR_ERR(vreg->reg); |
| 8004 | dev_err(dev, "%s: %s get failed, err=%d\n", |
| 8005 | __func__, vreg->name, ret); |
| 8006 | } |
| 8007 | out: |
| 8008 | return ret; |
| 8009 | } |
| 8010 | |
| 8011 | static int ufshcd_init_vreg(struct ufs_hba *hba) |
| 8012 | { |
| 8013 | int ret = 0; |
| 8014 | struct device *dev = hba->dev; |
| 8015 | struct ufs_vreg_info *info = &hba->vreg_info; |
| 8016 | |
| 8017 | if (!info) |
| 8018 | goto out; |
| 8019 | |
| 8020 | ret = ufshcd_get_vreg(dev, info->vcc); |
| 8021 | if (ret) |
| 8022 | goto out; |
| 8023 | |
| 8024 | ret = ufshcd_get_vreg(dev, info->vccq); |
| 8025 | if (ret) |
| 8026 | goto out; |
| 8027 | |
| 8028 | ret = ufshcd_get_vreg(dev, info->vccq2); |
| 8029 | out: |
| 8030 | return ret; |
| 8031 | } |
| 8032 | |
Raviv Shvili | 6a771a6 | 2014-09-25 15:32:24 +0300 | [diff] [blame] | 8033 | static int ufshcd_init_hba_vreg(struct ufs_hba *hba) |
| 8034 | { |
| 8035 | struct ufs_vreg_info *info = &hba->vreg_info; |
| 8036 | |
| 8037 | if (info) |
| 8038 | return ufshcd_get_vreg(hba->dev, info->vdd_hba); |
| 8039 | |
| 8040 | return 0; |
| 8041 | } |
| 8042 | |
Yaniv Gardi | 60f0187 | 2016-03-10 17:37:11 +0200 | [diff] [blame] | 8043 | static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused) |
| 8044 | { |
| 8045 | int ret = 0; |
| 8046 | struct ufs_vreg_info *info = &hba->vreg_info; |
| 8047 | |
| 8048 | if (!info) |
| 8049 | goto out; |
| 8050 | else if (!info->vccq) |
| 8051 | goto out; |
| 8052 | |
| 8053 | if (unused) { |
| 8054 | /* shut off the rail here */ |
| 8055 | ret = ufshcd_toggle_vreg(hba->dev, info->vccq, false); |
| 8056 | /* |
| 8057 | * Mark this rail as no longer used, so it doesn't get enabled |
| 8058 | * later by mistake |
| 8059 | */ |
| 8060 | if (!ret) |
| 8061 | info->vccq->unused = true; |
| 8062 | } else { |
| 8063 | /* |
| 8064 | * rail should have been already enabled hence just make sure |
| 8065 | * that unused flag is cleared. |
| 8066 | */ |
| 8067 | info->vccq->unused = false; |
| 8068 | } |
| 8069 | out: |
| 8070 | return ret; |
| 8071 | } |
| 8072 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8073 | static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on, |
| 8074 | bool skip_ref_clk, bool is_gating_context) |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8075 | { |
| 8076 | int ret = 0; |
| 8077 | struct ufs_clk_info *clki; |
| 8078 | struct list_head *head = &hba->clk_list_head; |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 8079 | unsigned long flags; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8080 | ktime_t start = ktime_get(); |
| 8081 | bool clk_state_changed = false; |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8082 | |
| 8083 | if (!head || list_empty(head)) |
| 8084 | goto out; |
| 8085 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 8086 | /* call vendor specific bus vote before enabling the clocks */ |
| 8087 | if (on) { |
| 8088 | ret = ufshcd_vops_set_bus_vote(hba, on); |
| 8089 | if (ret) |
| 8090 | return ret; |
| 8091 | } |
| 8092 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8093 | /* |
| 8094 | * vendor specific setup_clocks ops may depend on clocks managed by |
| 8095 | * this standard driver hence call the vendor specific setup_clocks |
| 8096 | * before disabling the clocks managed here. |
| 8097 | */ |
| 8098 | if (!on) { |
| 8099 | ret = ufshcd_vops_setup_clocks(hba, on, is_gating_context); |
| 8100 | if (ret) |
| 8101 | return ret; |
| 8102 | } |
| 8103 | |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8104 | list_for_each_entry(clki, head, list) { |
| 8105 | if (!IS_ERR_OR_NULL(clki->clk)) { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8106 | if (skip_ref_clk && !strcmp(clki->name, "ref_clk")) |
| 8107 | continue; |
| 8108 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8109 | clk_state_changed = on ^ clki->enabled; |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8110 | if (on && !clki->enabled) { |
| 8111 | ret = clk_prepare_enable(clki->clk); |
| 8112 | if (ret) { |
| 8113 | dev_err(hba->dev, "%s: %s prepare enable failed, %d\n", |
| 8114 | __func__, clki->name, ret); |
| 8115 | goto out; |
| 8116 | } |
| 8117 | } else if (!on && clki->enabled) { |
| 8118 | clk_disable_unprepare(clki->clk); |
| 8119 | } |
| 8120 | clki->enabled = on; |
| 8121 | dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__, |
| 8122 | clki->name, on ? "en" : "dis"); |
| 8123 | } |
| 8124 | } |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 8125 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8126 | /* |
| 8127 | * vendor specific setup_clocks ops may depend on clocks managed by |
| 8128 | * this standard driver hence call the vendor specific setup_clocks |
| 8129 | * after enabling the clocks managed here. |
| 8130 | */ |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 8131 | if (on) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8132 | ret = ufshcd_vops_setup_clocks(hba, on, is_gating_context); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 8133 | if (ret) |
| 8134 | goto out; |
| 8135 | } |
| 8136 | |
| 8137 | /* |
| 8138 | * call vendor specific bus vote to remove the vote after |
| 8139 | * disabling the clocks. |
| 8140 | */ |
| 8141 | if (!on) |
| 8142 | ret = ufshcd_vops_set_bus_vote(hba, on); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8143 | |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8144 | out: |
| 8145 | if (ret) { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 8146 | if (on) |
| 8147 | /* Can't do much if this fails */ |
| 8148 | (void) ufshcd_vops_set_bus_vote(hba, false); |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8149 | list_for_each_entry(clki, head, list) { |
| 8150 | if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled) |
| 8151 | clk_disable_unprepare(clki->clk); |
| 8152 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8153 | } else if (!ret && on) { |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 8154 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 8155 | hba->clk_gating.state = CLKS_ON; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8156 | trace_ufshcd_clk_gating(dev_name(hba->dev), |
| 8157 | hba->clk_gating.state); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 8158 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8159 | /* restore the secure configuration as clocks are enabled */ |
| 8160 | ufshcd_vops_update_sec_cfg(hba, true); |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8161 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8162 | |
| 8163 | if (clk_state_changed) |
| 8164 | trace_ufshcd_profile_clk_gating(dev_name(hba->dev), |
| 8165 | (on ? "on" : "off"), |
| 8166 | ktime_to_us(ktime_sub(ktime_get(), start)), ret); |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8167 | return ret; |
| 8168 | } |
| 8169 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8170 | static int ufshcd_enable_clocks(struct ufs_hba *hba) |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8171 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8172 | return ufshcd_setup_clocks(hba, true, false, false); |
| 8173 | } |
| 8174 | |
| 8175 | static int ufshcd_disable_clocks(struct ufs_hba *hba, |
| 8176 | bool is_gating_context) |
| 8177 | { |
| 8178 | return ufshcd_setup_clocks(hba, false, false, is_gating_context); |
| 8179 | } |
| 8180 | |
| 8181 | static int ufshcd_disable_clocks_skip_ref_clk(struct ufs_hba *hba, |
| 8182 | bool is_gating_context) |
| 8183 | { |
| 8184 | return ufshcd_setup_clocks(hba, false, true, is_gating_context); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8185 | } |
| 8186 | |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8187 | static int ufshcd_init_clocks(struct ufs_hba *hba) |
| 8188 | { |
| 8189 | int ret = 0; |
| 8190 | struct ufs_clk_info *clki; |
| 8191 | struct device *dev = hba->dev; |
| 8192 | struct list_head *head = &hba->clk_list_head; |
| 8193 | |
| 8194 | if (!head || list_empty(head)) |
| 8195 | goto out; |
| 8196 | |
| 8197 | list_for_each_entry(clki, head, list) { |
| 8198 | if (!clki->name) |
| 8199 | continue; |
| 8200 | |
| 8201 | clki->clk = devm_clk_get(dev, clki->name); |
| 8202 | if (IS_ERR(clki->clk)) { |
| 8203 | ret = PTR_ERR(clki->clk); |
| 8204 | dev_err(dev, "%s: %s clk get failed, %d\n", |
| 8205 | __func__, clki->name, ret); |
| 8206 | goto out; |
| 8207 | } |
| 8208 | |
| 8209 | if (clki->max_freq) { |
| 8210 | ret = clk_set_rate(clki->clk, clki->max_freq); |
| 8211 | if (ret) { |
| 8212 | dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n", |
| 8213 | __func__, clki->name, |
| 8214 | clki->max_freq, ret); |
| 8215 | goto out; |
| 8216 | } |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 8217 | clki->curr_freq = clki->max_freq; |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8218 | } |
| 8219 | dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__, |
| 8220 | clki->name, clk_get_rate(clki->clk)); |
| 8221 | } |
| 8222 | out: |
| 8223 | return ret; |
| 8224 | } |
| 8225 | |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 8226 | static int ufshcd_variant_hba_init(struct ufs_hba *hba) |
| 8227 | { |
| 8228 | int err = 0; |
| 8229 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8230 | if (!hba->var || !hba->var->vops) |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 8231 | goto out; |
| 8232 | |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 8233 | err = ufshcd_vops_init(hba); |
| 8234 | if (err) |
| 8235 | goto out; |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 8236 | |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 8237 | err = ufshcd_vops_setup_regulators(hba, true); |
| 8238 | if (err) |
| 8239 | goto out_exit; |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 8240 | |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 8241 | goto out; |
| 8242 | |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 8243 | out_exit: |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 8244 | ufshcd_vops_exit(hba); |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 8245 | out: |
| 8246 | if (err) |
| 8247 | dev_err(hba->dev, "%s: variant %s init failed err %d\n", |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 8248 | __func__, ufshcd_get_var_name(hba), err); |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 8249 | return err; |
| 8250 | } |
| 8251 | |
| 8252 | static void ufshcd_variant_hba_exit(struct ufs_hba *hba) |
| 8253 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8254 | if (!hba->var || !hba->var->vops) |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 8255 | return; |
| 8256 | |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 8257 | ufshcd_vops_setup_regulators(hba, false); |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 8258 | |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 8259 | ufshcd_vops_exit(hba); |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 8260 | } |
| 8261 | |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 8262 | static int ufshcd_hba_init(struct ufs_hba *hba) |
| 8263 | { |
| 8264 | int err; |
| 8265 | |
Raviv Shvili | 6a771a6 | 2014-09-25 15:32:24 +0300 | [diff] [blame] | 8266 | /* |
| 8267 | * Handle host controller power separately from the UFS device power |
| 8268 | * rails as it will help controlling the UFS host controller power |
| 8269 | * collapse easily which is different than UFS device power collapse. |
| 8270 | * Also, enable the host controller power before we go ahead with rest |
| 8271 | * of the initialization here. |
| 8272 | */ |
| 8273 | err = ufshcd_init_hba_vreg(hba); |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 8274 | if (err) |
| 8275 | goto out; |
| 8276 | |
Raviv Shvili | 6a771a6 | 2014-09-25 15:32:24 +0300 | [diff] [blame] | 8277 | err = ufshcd_setup_hba_vreg(hba, true); |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 8278 | if (err) |
| 8279 | goto out; |
| 8280 | |
Raviv Shvili | 6a771a6 | 2014-09-25 15:32:24 +0300 | [diff] [blame] | 8281 | err = ufshcd_init_clocks(hba); |
| 8282 | if (err) |
| 8283 | goto out_disable_hba_vreg; |
| 8284 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8285 | err = ufshcd_enable_clocks(hba); |
Raviv Shvili | 6a771a6 | 2014-09-25 15:32:24 +0300 | [diff] [blame] | 8286 | if (err) |
| 8287 | goto out_disable_hba_vreg; |
| 8288 | |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8289 | err = ufshcd_init_vreg(hba); |
| 8290 | if (err) |
| 8291 | goto out_disable_clks; |
| 8292 | |
| 8293 | err = ufshcd_setup_vreg(hba, true); |
| 8294 | if (err) |
| 8295 | goto out_disable_clks; |
| 8296 | |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 8297 | err = ufshcd_variant_hba_init(hba); |
| 8298 | if (err) |
| 8299 | goto out_disable_vreg; |
| 8300 | |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 8301 | hba->is_powered = true; |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 8302 | goto out; |
| 8303 | |
| 8304 | out_disable_vreg: |
| 8305 | ufshcd_setup_vreg(hba, false); |
Sujit Reddy Thumma | c6e79da | 2014-09-25 15:32:23 +0300 | [diff] [blame] | 8306 | out_disable_clks: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8307 | ufshcd_disable_clocks(hba, false); |
Raviv Shvili | 6a771a6 | 2014-09-25 15:32:24 +0300 | [diff] [blame] | 8308 | out_disable_hba_vreg: |
| 8309 | ufshcd_setup_hba_vreg(hba, false); |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 8310 | out: |
| 8311 | return err; |
| 8312 | } |
| 8313 | |
| 8314 | static void ufshcd_hba_exit(struct ufs_hba *hba) |
| 8315 | { |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 8316 | if (hba->is_powered) { |
| 8317 | ufshcd_variant_hba_exit(hba); |
| 8318 | ufshcd_setup_vreg(hba, false); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8319 | if (ufshcd_is_clkscaling_supported(hba)) { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 8320 | if (hba->devfreq) |
| 8321 | ufshcd_suspend_clkscaling(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8322 | destroy_workqueue(hba->clk_scaling.workq); |
| 8323 | } |
| 8324 | ufshcd_disable_clocks(hba, false); |
Sujit Reddy Thumma | 1d337ec | 2014-09-25 15:32:26 +0300 | [diff] [blame] | 8325 | ufshcd_setup_hba_vreg(hba, false); |
| 8326 | hba->is_powered = false; |
| 8327 | } |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 8328 | } |
| 8329 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8330 | static int |
| 8331 | ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 8332 | { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8333 | unsigned char cmd[6] = {REQUEST_SENSE, |
| 8334 | 0, |
| 8335 | 0, |
| 8336 | 0, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8337 | UFSHCD_REQ_SENSE_SIZE, |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8338 | 0}; |
| 8339 | char *buffer; |
| 8340 | int ret; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 8341 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8342 | buffer = kzalloc(UFSHCD_REQ_SENSE_SIZE, GFP_KERNEL); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8343 | if (!buffer) { |
| 8344 | ret = -ENOMEM; |
| 8345 | goto out; |
| 8346 | } |
| 8347 | |
| 8348 | ret = scsi_execute_req_flags(sdp, cmd, DMA_FROM_DEVICE, buffer, |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8349 | UFSHCD_REQ_SENSE_SIZE, NULL, |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8350 | msecs_to_jiffies(1000), 3, NULL, REQ_PM); |
| 8351 | if (ret) |
| 8352 | pr_err("%s: failed with err %d\n", __func__, ret); |
| 8353 | |
| 8354 | kfree(buffer); |
| 8355 | out: |
| 8356 | return ret; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 8357 | } |
| 8358 | |
| 8359 | /** |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8360 | * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device |
| 8361 | * power mode |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 8362 | * @hba: per adapter instance |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8363 | * @pwr_mode: device power mode to set |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 8364 | * |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8365 | * Returns 0 if requested power mode is set successfully |
| 8366 | * Returns non-zero if failed to set the requested power mode |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 8367 | */ |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8368 | static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba, |
| 8369 | enum ufs_dev_pwr_mode pwr_mode) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 8370 | { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8371 | unsigned char cmd[6] = { START_STOP }; |
| 8372 | struct scsi_sense_hdr sshdr; |
Akinobu Mita | 7c48bfd | 2014-10-23 13:25:12 +0300 | [diff] [blame] | 8373 | struct scsi_device *sdp; |
| 8374 | unsigned long flags; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8375 | int ret; |
| 8376 | |
Akinobu Mita | 7c48bfd | 2014-10-23 13:25:12 +0300 | [diff] [blame] | 8377 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 8378 | sdp = hba->sdev_ufs_device; |
| 8379 | if (sdp) { |
| 8380 | ret = scsi_device_get(sdp); |
| 8381 | if (!ret && !scsi_device_online(sdp)) { |
| 8382 | ret = -ENODEV; |
| 8383 | scsi_device_put(sdp); |
| 8384 | } |
| 8385 | } else { |
| 8386 | ret = -ENODEV; |
| 8387 | } |
| 8388 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 8389 | |
| 8390 | if (ret) |
| 8391 | return ret; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8392 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 8393 | /* |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8394 | * If scsi commands fail, the scsi mid-layer schedules scsi error- |
| 8395 | * handling, which would wait for host to be resumed. Since we know |
| 8396 | * we are functional while we are here, skip host resume in error |
| 8397 | * handling context. |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 8398 | */ |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8399 | hba->host->eh_noresume = 1; |
Subhash Jadavani | 23df231 | 2016-12-16 12:54:30 -0800 | [diff] [blame] | 8400 | if (!hba->dev_info.is_ufs_dev_wlun_ua_cleared) { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8401 | ret = ufshcd_send_request_sense(hba, sdp); |
| 8402 | if (ret) |
| 8403 | goto out; |
| 8404 | /* Unit attention condition is cleared now */ |
Subhash Jadavani | 23df231 | 2016-12-16 12:54:30 -0800 | [diff] [blame] | 8405 | hba->dev_info.is_ufs_dev_wlun_ua_cleared = 1; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8406 | } |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 8407 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8408 | cmd[4] = pwr_mode << 4; |
| 8409 | |
| 8410 | /* |
| 8411 | * Current function would be generally called from the power management |
| 8412 | * callbacks hence set the REQ_PM flag so that it doesn't resume the |
| 8413 | * already suspended childs. |
| 8414 | */ |
| 8415 | ret = scsi_execute_req_flags(sdp, cmd, DMA_NONE, NULL, 0, &sshdr, |
| 8416 | START_STOP_TIMEOUT, 0, NULL, REQ_PM); |
| 8417 | if (ret) { |
| 8418 | sdev_printk(KERN_WARNING, sdp, |
Hannes Reinecke | ef61329 | 2014-10-24 14:27:00 +0200 | [diff] [blame] | 8419 | "START_STOP failed for power mode: %d, result %x\n", |
| 8420 | pwr_mode, ret); |
Hannes Reinecke | 2104551 | 2015-01-08 07:43:46 +0100 | [diff] [blame] | 8421 | if (driver_byte(ret) & DRIVER_SENSE) |
| 8422 | scsi_print_sense_hdr(sdp, NULL, &sshdr); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8423 | } |
| 8424 | |
| 8425 | if (!ret) |
| 8426 | hba->curr_dev_pwr_mode = pwr_mode; |
| 8427 | out: |
Akinobu Mita | 7c48bfd | 2014-10-23 13:25:12 +0300 | [diff] [blame] | 8428 | scsi_device_put(sdp); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8429 | hba->host->eh_noresume = 0; |
| 8430 | return ret; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 8431 | } |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 8432 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8433 | static int ufshcd_link_state_transition(struct ufs_hba *hba, |
| 8434 | enum uic_link_state req_link_state, |
| 8435 | int check_for_bkops) |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 8436 | { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8437 | int ret = 0; |
| 8438 | |
| 8439 | if (req_link_state == hba->uic_link_state) |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 8440 | return 0; |
| 8441 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8442 | if (req_link_state == UIC_LINK_HIBERN8_STATE) { |
| 8443 | ret = ufshcd_uic_hibern8_enter(hba); |
| 8444 | if (!ret) |
| 8445 | ufshcd_set_link_hibern8(hba); |
| 8446 | else |
| 8447 | goto out; |
| 8448 | } |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 8449 | /* |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8450 | * If autobkops is enabled, link can't be turned off because |
| 8451 | * turning off the link would also turn off the device. |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 8452 | */ |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8453 | else if ((req_link_state == UIC_LINK_OFF_STATE) && |
| 8454 | (!check_for_bkops || (check_for_bkops && |
| 8455 | !hba->auto_bkops_enabled))) { |
| 8456 | /* |
Yaniv Gardi | f3099fb | 2016-03-10 17:37:17 +0200 | [diff] [blame] | 8457 | * Let's make sure that link is in low power mode, we are doing |
| 8458 | * this currently by putting the link in Hibern8. Otherway to |
| 8459 | * put the link in low power mode is to send the DME end point |
| 8460 | * to device and then send the DME reset command to local |
| 8461 | * unipro. But putting the link in hibern8 is much faster. |
| 8462 | */ |
| 8463 | ret = ufshcd_uic_hibern8_enter(hba); |
| 8464 | if (ret) |
| 8465 | goto out; |
| 8466 | /* |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8467 | * Change controller state to "reset state" which |
| 8468 | * should also put the link in off/reset state |
| 8469 | */ |
Yaniv Gardi | 596585a | 2016-03-10 17:37:08 +0200 | [diff] [blame] | 8470 | ufshcd_hba_stop(hba, true); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8471 | /* |
| 8472 | * TODO: Check if we need any delay to make sure that |
| 8473 | * controller is reset |
| 8474 | */ |
| 8475 | ufshcd_set_link_off(hba); |
| 8476 | } |
| 8477 | |
| 8478 | out: |
| 8479 | return ret; |
| 8480 | } |
| 8481 | |
| 8482 | static void ufshcd_vreg_set_lpm(struct ufs_hba *hba) |
| 8483 | { |
| 8484 | /* |
Yaniv Gardi | b799fdf | 2016-03-10 17:37:18 +0200 | [diff] [blame] | 8485 | * It seems some UFS devices may keep drawing more than sleep current |
| 8486 | * (atleast for 500us) from UFS rails (especially from VCCQ rail). |
| 8487 | * To avoid this situation, add 2ms delay before putting these UFS |
| 8488 | * rails in LPM mode. |
| 8489 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8490 | if (!ufshcd_is_link_active(hba)) |
Yaniv Gardi | b799fdf | 2016-03-10 17:37:18 +0200 | [diff] [blame] | 8491 | usleep_range(2000, 2100); |
| 8492 | |
| 8493 | /* |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8494 | * If UFS device is either in UFS_Sleep turn off VCC rail to save some |
| 8495 | * power. |
| 8496 | * |
| 8497 | * If UFS device and link is in OFF state, all power supplies (VCC, |
| 8498 | * VCCQ, VCCQ2) can be turned off if power on write protect is not |
| 8499 | * required. If UFS link is inactive (Hibern8 or OFF state) and device |
| 8500 | * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode. |
| 8501 | * |
| 8502 | * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway |
| 8503 | * in low power state which would save some power. |
| 8504 | */ |
| 8505 | if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) && |
| 8506 | !hba->dev_info.is_lu_power_on_wp) { |
| 8507 | ufshcd_setup_vreg(hba, false); |
| 8508 | } else if (!ufshcd_is_ufs_dev_active(hba)) { |
| 8509 | ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false); |
| 8510 | if (!ufshcd_is_link_active(hba)) { |
| 8511 | ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq); |
| 8512 | ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2); |
| 8513 | } |
| 8514 | } |
| 8515 | } |
| 8516 | |
| 8517 | static int ufshcd_vreg_set_hpm(struct ufs_hba *hba) |
| 8518 | { |
| 8519 | int ret = 0; |
| 8520 | |
| 8521 | if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) && |
| 8522 | !hba->dev_info.is_lu_power_on_wp) { |
| 8523 | ret = ufshcd_setup_vreg(hba, true); |
| 8524 | } else if (!ufshcd_is_ufs_dev_active(hba)) { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8525 | if (!ret && !ufshcd_is_link_active(hba)) { |
| 8526 | ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq); |
| 8527 | if (ret) |
| 8528 | goto vcc_disable; |
| 8529 | ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2); |
| 8530 | if (ret) |
| 8531 | goto vccq_lpm; |
| 8532 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8533 | ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8534 | } |
| 8535 | goto out; |
| 8536 | |
| 8537 | vccq_lpm: |
| 8538 | ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq); |
| 8539 | vcc_disable: |
| 8540 | ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false); |
| 8541 | out: |
| 8542 | return ret; |
| 8543 | } |
| 8544 | |
| 8545 | static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba) |
| 8546 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8547 | if (ufshcd_is_link_off(hba) || |
| 8548 | (ufshcd_is_link_hibern8(hba) |
| 8549 | && ufshcd_is_power_collapse_during_hibern8_allowed(hba))) |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8550 | ufshcd_setup_hba_vreg(hba, false); |
| 8551 | } |
| 8552 | |
| 8553 | static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba) |
| 8554 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8555 | if (ufshcd_is_link_off(hba) || |
| 8556 | (ufshcd_is_link_hibern8(hba) |
| 8557 | && ufshcd_is_power_collapse_during_hibern8_allowed(hba))) |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8558 | ufshcd_setup_hba_vreg(hba, true); |
| 8559 | } |
| 8560 | |
| 8561 | /** |
| 8562 | * ufshcd_suspend - helper function for suspend operations |
| 8563 | * @hba: per adapter instance |
| 8564 | * @pm_op: desired low power operation type |
| 8565 | * |
| 8566 | * This function will try to put the UFS device and link into low power |
| 8567 | * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl" |
| 8568 | * (System PM level). |
| 8569 | * |
| 8570 | * If this function is called during shutdown, it will make sure that |
| 8571 | * both UFS device and UFS link is powered off. |
| 8572 | * |
| 8573 | * NOTE: UFS device & link must be active before we enter in this function. |
| 8574 | * |
| 8575 | * Returns 0 for success and non-zero for failure |
| 8576 | */ |
| 8577 | static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) |
| 8578 | { |
| 8579 | int ret = 0; |
| 8580 | enum ufs_pm_level pm_lvl; |
| 8581 | enum ufs_dev_pwr_mode req_dev_pwr_mode; |
| 8582 | enum uic_link_state req_link_state; |
| 8583 | |
| 8584 | hba->pm_op_in_progress = 1; |
| 8585 | if (!ufshcd_is_shutdown_pm(pm_op)) { |
| 8586 | pm_lvl = ufshcd_is_runtime_pm(pm_op) ? |
| 8587 | hba->rpm_lvl : hba->spm_lvl; |
| 8588 | req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl); |
| 8589 | req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl); |
| 8590 | } else { |
| 8591 | req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE; |
| 8592 | req_link_state = UIC_LINK_OFF_STATE; |
| 8593 | } |
| 8594 | |
| 8595 | /* |
| 8596 | * If we can't transition into any of the low power modes |
| 8597 | * just gate the clocks. |
| 8598 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8599 | WARN_ON(hba->hibern8_on_idle.is_enabled && |
| 8600 | hba->hibern8_on_idle.active_reqs); |
| 8601 | ufshcd_hold_all(hba); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 8602 | hba->clk_gating.is_suspended = true; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8603 | hba->hibern8_on_idle.is_suspended = true; |
| 8604 | |
| 8605 | if (hba->clk_scaling.is_allowed) { |
| 8606 | cancel_work_sync(&hba->clk_scaling.suspend_work); |
| 8607 | cancel_work_sync(&hba->clk_scaling.resume_work); |
| 8608 | ufshcd_suspend_clkscaling(hba); |
| 8609 | } |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 8610 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8611 | if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE && |
| 8612 | req_link_state == UIC_LINK_ACTIVE_STATE) { |
| 8613 | goto disable_clks; |
| 8614 | } |
| 8615 | |
| 8616 | if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) && |
| 8617 | (req_link_state == hba->uic_link_state)) |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8618 | goto enable_gating; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8619 | |
| 8620 | /* UFS device & link must be active before we enter in this function */ |
| 8621 | if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) { |
| 8622 | ret = -EINVAL; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8623 | goto enable_gating; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8624 | } |
| 8625 | |
| 8626 | if (ufshcd_is_runtime_pm(pm_op)) { |
Subhash Jadavani | 374a246 | 2014-09-25 15:32:35 +0300 | [diff] [blame] | 8627 | if (ufshcd_can_autobkops_during_suspend(hba)) { |
| 8628 | /* |
| 8629 | * The device is idle with no requests in the queue, |
| 8630 | * allow background operations if bkops status shows |
| 8631 | * that performance might be impacted. |
| 8632 | */ |
| 8633 | ret = ufshcd_urgent_bkops(hba); |
| 8634 | if (ret) |
| 8635 | goto enable_gating; |
| 8636 | } else { |
| 8637 | /* make sure that auto bkops is disabled */ |
| 8638 | ufshcd_disable_auto_bkops(hba); |
| 8639 | } |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8640 | } |
| 8641 | |
| 8642 | if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) && |
| 8643 | ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) || |
| 8644 | !ufshcd_is_runtime_pm(pm_op))) { |
| 8645 | /* ensure that bkops is disabled */ |
| 8646 | ufshcd_disable_auto_bkops(hba); |
| 8647 | ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode); |
| 8648 | if (ret) |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 8649 | goto enable_gating; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8650 | } |
| 8651 | |
| 8652 | ret = ufshcd_link_state_transition(hba, req_link_state, 1); |
| 8653 | if (ret) |
| 8654 | goto set_dev_active; |
| 8655 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8656 | if (ufshcd_is_link_hibern8(hba) && |
| 8657 | ufshcd_is_hibern8_on_idle_allowed(hba)) |
| 8658 | hba->hibern8_on_idle.state = HIBERN8_ENTERED; |
| 8659 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8660 | ufshcd_vreg_set_lpm(hba); |
| 8661 | |
| 8662 | disable_clks: |
| 8663 | /* |
| 8664 | * Call vendor specific suspend callback. As these callbacks may access |
| 8665 | * vendor specific host controller register space call them before the |
| 8666 | * host clocks are ON. |
| 8667 | */ |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 8668 | ret = ufshcd_vops_suspend(hba, pm_op); |
| 8669 | if (ret) |
| 8670 | goto set_link_active; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8671 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8672 | if (!ufshcd_is_link_active(hba)) |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8673 | ret = ufshcd_disable_clocks(hba, false); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8674 | else |
| 8675 | /* If link is active, device ref_clk can't be switched off */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8676 | ret = ufshcd_disable_clocks_skip_ref_clk(hba, false); |
| 8677 | if (ret) |
| 8678 | goto set_link_active; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8679 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8680 | if (ufshcd_is_clkgating_allowed(hba)) { |
| 8681 | hba->clk_gating.state = CLKS_OFF; |
| 8682 | trace_ufshcd_clk_gating(dev_name(hba->dev), |
| 8683 | hba->clk_gating.state); |
| 8684 | } |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8685 | /* |
| 8686 | * Disable the host irq as host controller as there won't be any |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 8687 | * host controller transaction expected till resume. |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8688 | */ |
| 8689 | ufshcd_disable_irq(hba); |
| 8690 | /* Put the host controller in low power mode if possible */ |
| 8691 | ufshcd_hba_vreg_set_lpm(hba); |
| 8692 | goto out; |
| 8693 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8694 | set_link_active: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8695 | if (hba->clk_scaling.is_allowed) |
| 8696 | ufshcd_resume_clkscaling(hba); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8697 | ufshcd_vreg_set_hpm(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8698 | if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba)) { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8699 | ufshcd_set_link_active(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8700 | } else if (ufshcd_is_link_off(hba)) { |
| 8701 | ufshcd_update_error_stats(hba, UFS_ERR_VOPS_SUSPEND); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8702 | ufshcd_host_reset_and_restore(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8703 | } |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8704 | set_dev_active: |
| 8705 | if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE)) |
| 8706 | ufshcd_disable_auto_bkops(hba); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 8707 | enable_gating: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8708 | if (hba->clk_scaling.is_allowed) |
| 8709 | ufshcd_resume_clkscaling(hba); |
| 8710 | hba->hibern8_on_idle.is_suspended = false; |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 8711 | hba->clk_gating.is_suspended = false; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8712 | ufshcd_release_all(hba); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8713 | out: |
| 8714 | hba->pm_op_in_progress = 0; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8715 | |
| 8716 | if (ret) |
| 8717 | ufshcd_update_error_stats(hba, UFS_ERR_SUSPEND); |
| 8718 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8719 | return ret; |
| 8720 | } |
| 8721 | |
| 8722 | /** |
| 8723 | * ufshcd_resume - helper function for resume operations |
| 8724 | * @hba: per adapter instance |
| 8725 | * @pm_op: runtime PM or system PM |
| 8726 | * |
| 8727 | * This function basically brings the UFS device, UniPro link and controller |
| 8728 | * to active state. |
| 8729 | * |
| 8730 | * Returns 0 for success and non-zero for failure |
| 8731 | */ |
| 8732 | static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) |
| 8733 | { |
| 8734 | int ret; |
| 8735 | enum uic_link_state old_link_state; |
| 8736 | |
| 8737 | hba->pm_op_in_progress = 1; |
| 8738 | old_link_state = hba->uic_link_state; |
| 8739 | |
| 8740 | ufshcd_hba_vreg_set_hpm(hba); |
| 8741 | /* Make sure clocks are enabled before accessing controller */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8742 | ret = ufshcd_enable_clocks(hba); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8743 | if (ret) |
| 8744 | goto out; |
| 8745 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8746 | /* enable the host irq as host controller would be active soon */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8747 | ufshcd_enable_irq(hba); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8748 | |
| 8749 | ret = ufshcd_vreg_set_hpm(hba); |
| 8750 | if (ret) |
| 8751 | goto disable_irq_and_vops_clks; |
| 8752 | |
| 8753 | /* |
| 8754 | * Call vendor specific resume callback. As these callbacks may access |
| 8755 | * vendor specific host controller register space call them when the |
| 8756 | * host clocks are ON. |
| 8757 | */ |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 8758 | ret = ufshcd_vops_resume(hba, pm_op); |
| 8759 | if (ret) |
| 8760 | goto disable_vreg; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8761 | |
| 8762 | if (ufshcd_is_link_hibern8(hba)) { |
| 8763 | ret = ufshcd_uic_hibern8_exit(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8764 | if (!ret) { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8765 | ufshcd_set_link_active(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8766 | if (ufshcd_is_hibern8_on_idle_allowed(hba)) |
| 8767 | hba->hibern8_on_idle.state = HIBERN8_EXITED; |
| 8768 | } else { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8769 | goto vendor_suspend; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8770 | } |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8771 | } else if (ufshcd_is_link_off(hba)) { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8772 | /* |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 8773 | * A full initialization of the host and the device is required |
| 8774 | * since the link was put to off during suspend. |
| 8775 | */ |
| 8776 | ret = ufshcd_reset_and_restore(hba); |
| 8777 | /* |
| 8778 | * ufshcd_reset_and_restore() should have already |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8779 | * set the link state as active |
| 8780 | */ |
| 8781 | if (ret || !ufshcd_is_link_active(hba)) |
| 8782 | goto vendor_suspend; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8783 | /* mark link state as hibern8 exited */ |
| 8784 | if (ufshcd_is_hibern8_on_idle_allowed(hba)) |
| 8785 | hba->hibern8_on_idle.state = HIBERN8_EXITED; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8786 | } |
| 8787 | |
| 8788 | if (!ufshcd_is_ufs_dev_active(hba)) { |
| 8789 | ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE); |
| 8790 | if (ret) |
| 8791 | goto set_old_link_state; |
| 8792 | } |
| 8793 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8794 | if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) |
| 8795 | ufshcd_enable_auto_bkops(hba); |
| 8796 | else |
| 8797 | /* |
| 8798 | * If BKOPs operations are urgently needed at this moment then |
| 8799 | * keep auto-bkops enabled or else disable it. |
| 8800 | */ |
| 8801 | ufshcd_urgent_bkops(hba); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 8802 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8803 | hba->clk_gating.is_suspended = false; |
| 8804 | hba->hibern8_on_idle.is_suspended = false; |
| 8805 | |
| 8806 | if (hba->clk_scaling.is_allowed) |
| 8807 | ufshcd_resume_clkscaling(hba); |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 8808 | |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 8809 | /* Schedule clock gating in case of no access to UFS device yet */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8810 | ufshcd_release_all(hba); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8811 | goto out; |
| 8812 | |
| 8813 | set_old_link_state: |
| 8814 | ufshcd_link_state_transition(hba, old_link_state, 0); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8815 | if (ufshcd_is_link_hibern8(hba) && |
| 8816 | ufshcd_is_hibern8_on_idle_allowed(hba)) |
| 8817 | hba->hibern8_on_idle.state = HIBERN8_ENTERED; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8818 | vendor_suspend: |
Yaniv Gardi | 0263bcd | 2015-10-28 13:15:48 +0200 | [diff] [blame] | 8819 | ufshcd_vops_suspend(hba, pm_op); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8820 | disable_vreg: |
| 8821 | ufshcd_vreg_set_lpm(hba); |
| 8822 | disable_irq_and_vops_clks: |
| 8823 | ufshcd_disable_irq(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8824 | if (hba->clk_scaling.is_allowed) |
| 8825 | ufshcd_suspend_clkscaling(hba); |
| 8826 | ufshcd_disable_clocks(hba, false); |
| 8827 | if (ufshcd_is_clkgating_allowed(hba)) |
| 8828 | hba->clk_gating.state = CLKS_OFF; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8829 | out: |
| 8830 | hba->pm_op_in_progress = 0; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8831 | |
| 8832 | if (ret) |
| 8833 | ufshcd_update_error_stats(hba, UFS_ERR_RESUME); |
| 8834 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8835 | return ret; |
| 8836 | } |
| 8837 | |
| 8838 | /** |
| 8839 | * ufshcd_system_suspend - system suspend routine |
| 8840 | * @hba: per adapter instance |
| 8841 | * @pm_op: runtime PM or system PM |
| 8842 | * |
| 8843 | * Check the description of ufshcd_suspend() function for more details. |
| 8844 | * |
| 8845 | * Returns 0 for success and non-zero for failure |
| 8846 | */ |
| 8847 | int ufshcd_system_suspend(struct ufs_hba *hba) |
| 8848 | { |
| 8849 | int ret = 0; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8850 | ktime_t start = ktime_get(); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8851 | |
| 8852 | if (!hba || !hba->is_powered) |
Dolev Raviv | 233b594 | 2014-10-23 13:25:14 +0300 | [diff] [blame] | 8853 | return 0; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8854 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8855 | if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) == |
| 8856 | hba->curr_dev_pwr_mode) && |
| 8857 | (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) == |
| 8858 | hba->uic_link_state)) |
| 8859 | goto out; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8860 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8861 | if (pm_runtime_suspended(hba->dev)) { |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8862 | /* |
| 8863 | * UFS device and/or UFS link low power states during runtime |
| 8864 | * suspend seems to be different than what is expected during |
| 8865 | * system suspend. Hence runtime resume the devic & link and |
| 8866 | * let the system suspend low power states to take effect. |
| 8867 | * TODO: If resume takes longer time, we might have optimize |
| 8868 | * it in future by not resuming everything if possible. |
| 8869 | */ |
| 8870 | ret = ufshcd_runtime_resume(hba); |
| 8871 | if (ret) |
| 8872 | goto out; |
| 8873 | } |
| 8874 | |
| 8875 | ret = ufshcd_suspend(hba, UFS_SYSTEM_PM); |
| 8876 | out: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8877 | trace_ufshcd_system_suspend(dev_name(hba->dev), ret, |
| 8878 | ktime_to_us(ktime_sub(ktime_get(), start)), |
| 8879 | hba->curr_dev_pwr_mode, hba->uic_link_state); |
Dolev Raviv | e785060 | 2014-09-25 15:32:36 +0300 | [diff] [blame] | 8880 | if (!ret) |
| 8881 | hba->is_sys_suspended = true; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8882 | return ret; |
| 8883 | } |
| 8884 | EXPORT_SYMBOL(ufshcd_system_suspend); |
| 8885 | |
| 8886 | /** |
| 8887 | * ufshcd_system_resume - system resume routine |
| 8888 | * @hba: per adapter instance |
| 8889 | * |
| 8890 | * Returns 0 for success and non-zero for failure |
| 8891 | */ |
| 8892 | |
| 8893 | int ufshcd_system_resume(struct ufs_hba *hba) |
| 8894 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8895 | int ret = 0; |
| 8896 | ktime_t start = ktime_get(); |
| 8897 | |
| 8898 | if (!hba) |
| 8899 | return -EINVAL; |
| 8900 | |
| 8901 | if (!hba->is_powered || pm_runtime_suspended(hba->dev)) |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8902 | /* |
| 8903 | * Let the runtime resume take care of resuming |
| 8904 | * if runtime suspended. |
| 8905 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8906 | goto out; |
| 8907 | else |
| 8908 | ret = ufshcd_resume(hba, UFS_SYSTEM_PM); |
| 8909 | out: |
| 8910 | trace_ufshcd_system_resume(dev_name(hba->dev), ret, |
| 8911 | ktime_to_us(ktime_sub(ktime_get(), start)), |
| 8912 | hba->curr_dev_pwr_mode, hba->uic_link_state); |
| 8913 | return ret; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8914 | } |
| 8915 | EXPORT_SYMBOL(ufshcd_system_resume); |
| 8916 | |
| 8917 | /** |
| 8918 | * ufshcd_runtime_suspend - runtime suspend routine |
| 8919 | * @hba: per adapter instance |
| 8920 | * |
| 8921 | * Check the description of ufshcd_suspend() function for more details. |
| 8922 | * |
| 8923 | * Returns 0 for success and non-zero for failure |
| 8924 | */ |
| 8925 | int ufshcd_runtime_suspend(struct ufs_hba *hba) |
| 8926 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8927 | int ret = 0; |
| 8928 | ktime_t start = ktime_get(); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8929 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8930 | if (!hba) |
| 8931 | return -EINVAL; |
| 8932 | |
| 8933 | if (!hba->is_powered) |
| 8934 | goto out; |
| 8935 | else |
| 8936 | ret = ufshcd_suspend(hba, UFS_RUNTIME_PM); |
| 8937 | out: |
| 8938 | trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret, |
| 8939 | ktime_to_us(ktime_sub(ktime_get(), start)), |
| 8940 | hba->curr_dev_pwr_mode, |
| 8941 | hba->uic_link_state); |
| 8942 | return ret; |
| 8943 | |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 8944 | } |
| 8945 | EXPORT_SYMBOL(ufshcd_runtime_suspend); |
| 8946 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8947 | /** |
| 8948 | * ufshcd_runtime_resume - runtime resume routine |
| 8949 | * @hba: per adapter instance |
| 8950 | * |
| 8951 | * This function basically brings the UFS device, UniPro link and controller |
| 8952 | * to active state. Following operations are done in this function: |
| 8953 | * |
| 8954 | * 1. Turn on all the controller related clocks |
| 8955 | * 2. Bring the UniPro link out of Hibernate state |
| 8956 | * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device |
| 8957 | * to active state. |
| 8958 | * 4. If auto-bkops is enabled on the device, disable it. |
| 8959 | * |
| 8960 | * So following would be the possible power state after this function return |
| 8961 | * successfully: |
| 8962 | * S1: UFS device in Active state with VCC rail ON |
| 8963 | * UniPro link in Active state |
| 8964 | * All the UFS/UniPro controller clocks are ON |
| 8965 | * |
| 8966 | * Returns 0 for success and non-zero for failure |
| 8967 | */ |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 8968 | int ufshcd_runtime_resume(struct ufs_hba *hba) |
| 8969 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8970 | int ret = 0; |
| 8971 | ktime_t start = ktime_get(); |
| 8972 | |
| 8973 | if (!hba) |
| 8974 | return -EINVAL; |
| 8975 | |
| 8976 | if (!hba->is_powered) |
| 8977 | goto out; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 8978 | else |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8979 | ret = ufshcd_resume(hba, UFS_RUNTIME_PM); |
| 8980 | out: |
| 8981 | trace_ufshcd_runtime_resume(dev_name(hba->dev), ret, |
| 8982 | ktime_to_us(ktime_sub(ktime_get(), start)), |
| 8983 | hba->curr_dev_pwr_mode, |
| 8984 | hba->uic_link_state); |
| 8985 | return ret; |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 8986 | } |
| 8987 | EXPORT_SYMBOL(ufshcd_runtime_resume); |
| 8988 | |
| 8989 | int ufshcd_runtime_idle(struct ufs_hba *hba) |
| 8990 | { |
| 8991 | return 0; |
| 8992 | } |
| 8993 | EXPORT_SYMBOL(ufshcd_runtime_idle); |
| 8994 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 8995 | static inline ssize_t ufshcd_pm_lvl_store(struct device *dev, |
| 8996 | struct device_attribute *attr, |
| 8997 | const char *buf, size_t count, |
| 8998 | bool rpm) |
| 8999 | { |
| 9000 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 9001 | unsigned long flags, value; |
| 9002 | |
| 9003 | if (kstrtoul(buf, 0, &value)) |
| 9004 | return -EINVAL; |
| 9005 | |
| 9006 | if (value >= UFS_PM_LVL_MAX) |
| 9007 | return -EINVAL; |
| 9008 | |
| 9009 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 9010 | if (rpm) |
| 9011 | hba->rpm_lvl = value; |
| 9012 | else |
| 9013 | hba->spm_lvl = value; |
| 9014 | ufshcd_apply_pm_quirks(hba); |
| 9015 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 9016 | return count; |
| 9017 | } |
| 9018 | |
| 9019 | static ssize_t ufshcd_rpm_lvl_show(struct device *dev, |
| 9020 | struct device_attribute *attr, char *buf) |
| 9021 | { |
| 9022 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 9023 | int curr_len; |
| 9024 | u8 lvl; |
| 9025 | |
| 9026 | curr_len = snprintf(buf, PAGE_SIZE, |
| 9027 | "\nCurrent Runtime PM level [%d] => dev_state [%s] link_state [%s]\n", |
| 9028 | hba->rpm_lvl, |
| 9029 | ufschd_ufs_dev_pwr_mode_to_string( |
| 9030 | ufs_pm_lvl_states[hba->rpm_lvl].dev_state), |
| 9031 | ufschd_uic_link_state_to_string( |
| 9032 | ufs_pm_lvl_states[hba->rpm_lvl].link_state)); |
| 9033 | |
| 9034 | curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len), |
| 9035 | "\nAll available Runtime PM levels info:\n"); |
| 9036 | for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) |
| 9037 | curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len), |
| 9038 | "\tRuntime PM level [%d] => dev_state [%s] link_state [%s]\n", |
| 9039 | lvl, |
| 9040 | ufschd_ufs_dev_pwr_mode_to_string( |
| 9041 | ufs_pm_lvl_states[lvl].dev_state), |
| 9042 | ufschd_uic_link_state_to_string( |
| 9043 | ufs_pm_lvl_states[lvl].link_state)); |
| 9044 | |
| 9045 | return curr_len; |
| 9046 | } |
| 9047 | |
| 9048 | static ssize_t ufshcd_rpm_lvl_store(struct device *dev, |
| 9049 | struct device_attribute *attr, const char *buf, size_t count) |
| 9050 | { |
| 9051 | return ufshcd_pm_lvl_store(dev, attr, buf, count, true); |
| 9052 | } |
| 9053 | |
| 9054 | static void ufshcd_add_rpm_lvl_sysfs_nodes(struct ufs_hba *hba) |
| 9055 | { |
| 9056 | hba->rpm_lvl_attr.show = ufshcd_rpm_lvl_show; |
| 9057 | hba->rpm_lvl_attr.store = ufshcd_rpm_lvl_store; |
| 9058 | sysfs_attr_init(&hba->rpm_lvl_attr.attr); |
| 9059 | hba->rpm_lvl_attr.attr.name = "rpm_lvl"; |
| 9060 | hba->rpm_lvl_attr.attr.mode = S_IRUGO | S_IWUSR; |
| 9061 | if (device_create_file(hba->dev, &hba->rpm_lvl_attr)) |
| 9062 | dev_err(hba->dev, "Failed to create sysfs for rpm_lvl\n"); |
| 9063 | } |
| 9064 | |
| 9065 | static ssize_t ufshcd_spm_lvl_show(struct device *dev, |
| 9066 | struct device_attribute *attr, char *buf) |
| 9067 | { |
| 9068 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 9069 | int curr_len; |
| 9070 | u8 lvl; |
| 9071 | |
| 9072 | curr_len = snprintf(buf, PAGE_SIZE, |
| 9073 | "\nCurrent System PM level [%d] => dev_state [%s] link_state [%s]\n", |
| 9074 | hba->spm_lvl, |
| 9075 | ufschd_ufs_dev_pwr_mode_to_string( |
| 9076 | ufs_pm_lvl_states[hba->spm_lvl].dev_state), |
| 9077 | ufschd_uic_link_state_to_string( |
| 9078 | ufs_pm_lvl_states[hba->spm_lvl].link_state)); |
| 9079 | |
| 9080 | curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len), |
| 9081 | "\nAll available System PM levels info:\n"); |
| 9082 | for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) |
| 9083 | curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len), |
| 9084 | "\tSystem PM level [%d] => dev_state [%s] link_state [%s]\n", |
| 9085 | lvl, |
| 9086 | ufschd_ufs_dev_pwr_mode_to_string( |
| 9087 | ufs_pm_lvl_states[lvl].dev_state), |
| 9088 | ufschd_uic_link_state_to_string( |
| 9089 | ufs_pm_lvl_states[lvl].link_state)); |
| 9090 | |
| 9091 | return curr_len; |
| 9092 | } |
| 9093 | |
| 9094 | static ssize_t ufshcd_spm_lvl_store(struct device *dev, |
| 9095 | struct device_attribute *attr, const char *buf, size_t count) |
| 9096 | { |
| 9097 | return ufshcd_pm_lvl_store(dev, attr, buf, count, false); |
| 9098 | } |
| 9099 | |
| 9100 | static void ufshcd_add_spm_lvl_sysfs_nodes(struct ufs_hba *hba) |
| 9101 | { |
| 9102 | hba->spm_lvl_attr.show = ufshcd_spm_lvl_show; |
| 9103 | hba->spm_lvl_attr.store = ufshcd_spm_lvl_store; |
| 9104 | sysfs_attr_init(&hba->spm_lvl_attr.attr); |
| 9105 | hba->spm_lvl_attr.attr.name = "spm_lvl"; |
| 9106 | hba->spm_lvl_attr.attr.mode = S_IRUGO | S_IWUSR; |
| 9107 | if (device_create_file(hba->dev, &hba->spm_lvl_attr)) |
| 9108 | dev_err(hba->dev, "Failed to create sysfs for spm_lvl\n"); |
| 9109 | } |
| 9110 | |
| 9111 | static inline void ufshcd_add_sysfs_nodes(struct ufs_hba *hba) |
| 9112 | { |
| 9113 | ufshcd_add_rpm_lvl_sysfs_nodes(hba); |
| 9114 | ufshcd_add_spm_lvl_sysfs_nodes(hba); |
| 9115 | } |
| 9116 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 9117 | static void ufshcd_shutdown_clkscaling(struct ufs_hba *hba) |
| 9118 | { |
| 9119 | bool suspend = false; |
| 9120 | unsigned long flags; |
| 9121 | |
| 9122 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 9123 | if (hba->clk_scaling.is_allowed) { |
| 9124 | hba->clk_scaling.is_allowed = false; |
| 9125 | suspend = true; |
| 9126 | } |
| 9127 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 9128 | |
| 9129 | /** |
| 9130 | * Scaling may be scheduled before, hence make sure it |
| 9131 | * doesn't race with shutdown |
| 9132 | */ |
| 9133 | if (ufshcd_is_clkscaling_supported(hba)) { |
| 9134 | device_remove_file(hba->dev, &hba->clk_scaling.enable_attr); |
| 9135 | cancel_work_sync(&hba->clk_scaling.suspend_work); |
| 9136 | cancel_work_sync(&hba->clk_scaling.resume_work); |
| 9137 | if (suspend) |
| 9138 | ufshcd_suspend_clkscaling(hba); |
| 9139 | } |
| 9140 | |
| 9141 | /* Unregister so that devfreq_monitor can't race with shutdown */ |
| 9142 | if (hba->devfreq) |
| 9143 | devfreq_remove_device(hba->devfreq); |
| 9144 | } |
| 9145 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9146 | /** |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 9147 | * ufshcd_shutdown - shutdown routine |
| 9148 | * @hba: per adapter instance |
| 9149 | * |
| 9150 | * This function would power off both UFS device and UFS link. |
| 9151 | * |
| 9152 | * Returns 0 always to allow force shutdown even in case of errors. |
| 9153 | */ |
| 9154 | int ufshcd_shutdown(struct ufs_hba *hba) |
| 9155 | { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 9156 | int ret = 0; |
| 9157 | |
| 9158 | if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba)) |
| 9159 | goto out; |
| 9160 | |
| 9161 | pm_runtime_get_sync(hba->dev); |
| 9162 | ufshcd_hold_all(hba); |
| 9163 | ufshcd_mark_shutdown_ongoing(hba); |
| 9164 | ufshcd_shutdown_clkscaling(hba); |
| 9165 | /** |
| 9166 | * (1) Acquire the lock to stop any more requests |
| 9167 | * (2) Wait for all issued requests to complete |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9168 | */ |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 9169 | ufshcd_get_write_lock(hba); |
| 9170 | ufshcd_scsi_block_requests(hba); |
| 9171 | ret = ufshcd_wait_for_doorbell_clr(hba, U64_MAX); |
| 9172 | if (ret) |
| 9173 | dev_err(hba->dev, "%s: waiting for DB clear: failed: %d\n", |
| 9174 | __func__, ret); |
| 9175 | /* Requests may have errored out above, let it be handled */ |
| 9176 | flush_work(&hba->eh_work); |
| 9177 | /* reqs issued from contexts other than shutdown will fail from now */ |
| 9178 | ufshcd_scsi_unblock_requests(hba); |
| 9179 | ufshcd_release_all(hba); |
| 9180 | ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM); |
| 9181 | out: |
| 9182 | if (ret) |
| 9183 | dev_err(hba->dev, "%s failed, err %d\n", __func__, ret); |
| 9184 | /* allow force shutdown even in case of errors */ |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 9185 | return 0; |
| 9186 | } |
| 9187 | EXPORT_SYMBOL(ufshcd_shutdown); |
| 9188 | |
Mohan Srinivasan | 0ef170d | 2016-08-25 18:31:01 -0700 | [diff] [blame] | 9189 | /* |
| 9190 | * Values permitted 0, 1, 2. |
| 9191 | * 0 -> Disable IO latency histograms (default) |
| 9192 | * 1 -> Enable IO latency histograms |
| 9193 | * 2 -> Zero out IO latency histograms |
| 9194 | */ |
| 9195 | static ssize_t |
| 9196 | latency_hist_store(struct device *dev, struct device_attribute *attr, |
| 9197 | const char *buf, size_t count) |
| 9198 | { |
| 9199 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 9200 | long value; |
| 9201 | |
| 9202 | if (kstrtol(buf, 0, &value)) |
| 9203 | return -EINVAL; |
| 9204 | if (value == BLK_IO_LAT_HIST_ZERO) |
| 9205 | blk_zero_latency_hist(&hba->io_lat_s); |
| 9206 | else if (value == BLK_IO_LAT_HIST_ENABLE || |
| 9207 | value == BLK_IO_LAT_HIST_DISABLE) |
| 9208 | hba->latency_hist_enabled = value; |
| 9209 | return count; |
| 9210 | } |
| 9211 | |
| 9212 | ssize_t |
| 9213 | latency_hist_show(struct device *dev, struct device_attribute *attr, |
| 9214 | char *buf) |
| 9215 | { |
| 9216 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 9217 | |
| 9218 | return blk_latency_hist_show(&hba->io_lat_s, buf); |
| 9219 | } |
| 9220 | |
| 9221 | static DEVICE_ATTR(latency_hist, S_IRUGO | S_IWUSR, |
| 9222 | latency_hist_show, latency_hist_store); |
| 9223 | |
| 9224 | static void |
| 9225 | ufshcd_init_latency_hist(struct ufs_hba *hba) |
| 9226 | { |
| 9227 | if (device_create_file(hba->dev, &dev_attr_latency_hist)) |
| 9228 | dev_err(hba->dev, "Failed to create latency_hist sysfs entry\n"); |
| 9229 | } |
| 9230 | |
| 9231 | static void |
| 9232 | ufshcd_exit_latency_hist(struct ufs_hba *hba) |
| 9233 | { |
| 9234 | device_create_file(hba->dev, &dev_attr_latency_hist); |
| 9235 | } |
| 9236 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 9237 | /** |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9238 | * ufshcd_remove - de-allocate SCSI host and host memory space |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9239 | * data structure memory |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9240 | * @hba - per adapter instance |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9241 | */ |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9242 | void ufshcd_remove(struct ufs_hba *hba) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9243 | { |
Akinobu Mita | cfdf9c9 | 2013-07-30 00:36:03 +0530 | [diff] [blame] | 9244 | scsi_remove_host(hba->host); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9245 | /* disable interrupts */ |
Seungwon Jeon | 2fbd009 | 2013-06-26 22:39:27 +0530 | [diff] [blame] | 9246 | ufshcd_disable_intr(hba, hba->intr_mask); |
Yaniv Gardi | 596585a | 2016-03-10 17:37:08 +0200 | [diff] [blame] | 9247 | ufshcd_hba_stop(hba, true); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9248 | |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 9249 | ufshcd_exit_clk_gating(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9250 | ufshcd_exit_hibern8_on_idle(hba); |
Mohan Srinivasan | 0ef170d | 2016-08-25 18:31:01 -0700 | [diff] [blame] | 9251 | ufshcd_exit_latency_hist(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9252 | if (ufshcd_is_clkscaling_supported(hba)) { |
| 9253 | device_remove_file(hba->dev, &hba->clk_scaling.enable_attr); |
Kyle Yan | 65be4a5 | 2016-10-31 15:05:00 -0700 | [diff] [blame] | 9254 | if (hba->devfreq) |
| 9255 | devfreq_remove_device(hba->devfreq); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9256 | } |
Channagoud Kadabi | 8810e5f | 2017-02-17 16:01:05 -0800 | [diff] [blame] | 9257 | |
| 9258 | ufshcd_exit_latency_hist(hba); |
| 9259 | |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 9260 | ufshcd_hba_exit(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9261 | ufsdbg_remove_debugfs(hba); |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9262 | } |
| 9263 | EXPORT_SYMBOL_GPL(ufshcd_remove); |
| 9264 | |
| 9265 | /** |
Yaniv Gardi | 47555a5 | 2015-10-28 13:15:49 +0200 | [diff] [blame] | 9266 | * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA) |
| 9267 | * @hba: pointer to Host Bus Adapter (HBA) |
| 9268 | */ |
| 9269 | void ufshcd_dealloc_host(struct ufs_hba *hba) |
| 9270 | { |
| 9271 | scsi_host_put(hba->host); |
| 9272 | } |
| 9273 | EXPORT_SYMBOL_GPL(ufshcd_dealloc_host); |
| 9274 | |
| 9275 | /** |
Akinobu Mita | ca3d7bf | 2014-07-13 21:24:46 +0900 | [diff] [blame] | 9276 | * ufshcd_set_dma_mask - Set dma mask based on the controller |
| 9277 | * addressing capability |
| 9278 | * @hba: per adapter instance |
| 9279 | * |
| 9280 | * Returns 0 for success, non-zero for failure |
| 9281 | */ |
| 9282 | static int ufshcd_set_dma_mask(struct ufs_hba *hba) |
| 9283 | { |
| 9284 | if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) { |
| 9285 | if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64))) |
| 9286 | return 0; |
| 9287 | } |
| 9288 | return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32)); |
| 9289 | } |
| 9290 | |
| 9291 | /** |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 9292 | * ufshcd_alloc_host - allocate Host Bus Adapter (HBA) |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9293 | * @dev: pointer to device handle |
| 9294 | * @hba_handle: driver private handle |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9295 | * Returns 0 on success, non-zero value on failure |
| 9296 | */ |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 9297 | int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle) |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9298 | { |
| 9299 | struct Scsi_Host *host; |
| 9300 | struct ufs_hba *hba; |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 9301 | int err = 0; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9302 | |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9303 | if (!dev) { |
| 9304 | dev_err(dev, |
| 9305 | "Invalid memory reference for dev is NULL\n"); |
| 9306 | err = -ENODEV; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9307 | goto out_error; |
| 9308 | } |
| 9309 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9310 | host = scsi_host_alloc(&ufshcd_driver_template, |
| 9311 | sizeof(struct ufs_hba)); |
| 9312 | if (!host) { |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9313 | dev_err(dev, "scsi_host_alloc failed\n"); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9314 | err = -ENOMEM; |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9315 | goto out_error; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9316 | } |
| 9317 | hba = shost_priv(host); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9318 | hba->host = host; |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9319 | hba->dev = dev; |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 9320 | *hba_handle = hba; |
| 9321 | |
| 9322 | out_error: |
| 9323 | return err; |
| 9324 | } |
| 9325 | EXPORT_SYMBOL(ufshcd_alloc_host); |
| 9326 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9327 | /** |
| 9328 | * ufshcd_is_devfreq_scaling_required - check if scaling is required or not |
| 9329 | * @hba: per adapter instance |
| 9330 | * @scale_up: True if scaling up and false if scaling down |
| 9331 | * |
| 9332 | * Returns true if scaling is required, false otherwise. |
| 9333 | */ |
| 9334 | static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba, |
| 9335 | bool scale_up) |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9336 | { |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9337 | struct ufs_clk_info *clki; |
| 9338 | struct list_head *head = &hba->clk_list_head; |
| 9339 | |
| 9340 | if (!head || list_empty(head)) |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9341 | return false; |
Yaniv Gardi | f06fcc7 | 2015-10-28 13:15:51 +0200 | [diff] [blame] | 9342 | |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9343 | list_for_each_entry(clki, head, list) { |
| 9344 | if (!IS_ERR_OR_NULL(clki->clk)) { |
| 9345 | if (scale_up && clki->max_freq) { |
| 9346 | if (clki->curr_freq == clki->max_freq) |
| 9347 | continue; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9348 | return true; |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9349 | } else if (!scale_up && clki->min_freq) { |
| 9350 | if (clki->curr_freq == clki->min_freq) |
| 9351 | continue; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9352 | return true; |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9353 | } |
| 9354 | } |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9355 | } |
Yaniv Gardi | f06fcc7 | 2015-10-28 13:15:51 +0200 | [diff] [blame] | 9356 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9357 | return false; |
| 9358 | } |
Yaniv Gardi | f06fcc7 | 2015-10-28 13:15:51 +0200 | [diff] [blame] | 9359 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9360 | /** |
| 9361 | * ufshcd_scale_gear - scale up/down UFS gear |
| 9362 | * @hba: per adapter instance |
| 9363 | * @scale_up: True for scaling up gear and false for scaling down |
| 9364 | * |
| 9365 | * Returns 0 for success, |
| 9366 | * Returns -EBUSY if scaling can't happen at this time |
| 9367 | * Returns non-zero for any other errors |
| 9368 | */ |
| 9369 | static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up) |
| 9370 | { |
| 9371 | int ret = 0; |
| 9372 | struct ufs_pa_layer_attr new_pwr_info; |
| 9373 | u32 scale_down_gear = ufshcd_vops_get_scale_down_gear(hba); |
| 9374 | |
| 9375 | BUG_ON(!hba->clk_scaling.saved_pwr_info.is_valid); |
| 9376 | |
| 9377 | if (scale_up) { |
| 9378 | memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info, |
| 9379 | sizeof(struct ufs_pa_layer_attr)); |
Subhash Jadavani | be09603 | 2017-03-23 12:55:25 -0700 | [diff] [blame] | 9380 | /* |
| 9381 | * Some UFS devices may stop responding after switching from |
| 9382 | * HS-G1 to HS-G3. Also, it is found that these devices work |
| 9383 | * fine if we do 2 steps switch: HS-G1 to HS-G2 followed by |
| 9384 | * HS-G2 to HS-G3. If UFS_DEVICE_QUIRK_HS_G1_TO_HS_G3_SWITCH |
| 9385 | * quirk is enabled for such devices, this 2 steps gear switch |
| 9386 | * workaround will be applied. |
| 9387 | */ |
| 9388 | if ((hba->dev_info.quirks & |
| 9389 | UFS_DEVICE_QUIRK_HS_G1_TO_HS_G3_SWITCH) |
| 9390 | && (hba->pwr_info.gear_tx == UFS_HS_G1) |
| 9391 | && (new_pwr_info.gear_tx == UFS_HS_G3)) { |
| 9392 | /* scale up to G2 first */ |
| 9393 | new_pwr_info.gear_tx = UFS_HS_G2; |
| 9394 | new_pwr_info.gear_rx = UFS_HS_G2; |
| 9395 | ret = ufshcd_change_power_mode(hba, &new_pwr_info); |
| 9396 | if (ret) |
| 9397 | goto out; |
| 9398 | |
| 9399 | /* scale up to G3 now */ |
| 9400 | new_pwr_info.gear_tx = UFS_HS_G3; |
| 9401 | new_pwr_info.gear_rx = UFS_HS_G3; |
| 9402 | ret = ufshcd_change_power_mode(hba, &new_pwr_info); |
| 9403 | if (ret) |
| 9404 | goto out; |
| 9405 | } |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9406 | } else { |
| 9407 | memcpy(&new_pwr_info, &hba->pwr_info, |
| 9408 | sizeof(struct ufs_pa_layer_attr)); |
| 9409 | |
| 9410 | if (hba->pwr_info.gear_tx > scale_down_gear |
| 9411 | || hba->pwr_info.gear_rx > scale_down_gear) { |
| 9412 | /* save the current power mode */ |
| 9413 | memcpy(&hba->clk_scaling.saved_pwr_info.info, |
| 9414 | &hba->pwr_info, |
| 9415 | sizeof(struct ufs_pa_layer_attr)); |
| 9416 | |
| 9417 | /* scale down gear */ |
| 9418 | new_pwr_info.gear_tx = scale_down_gear; |
| 9419 | new_pwr_info.gear_rx = scale_down_gear; |
Subhash Jadavani | 4f0df17b | 2016-12-16 13:19:27 -0800 | [diff] [blame] | 9420 | if (!(hba->dev_info.quirks & UFS_DEVICE_NO_FASTAUTO)) { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9421 | new_pwr_info.pwr_tx = FASTAUTO_MODE; |
| 9422 | new_pwr_info.pwr_rx = FASTAUTO_MODE; |
| 9423 | } |
| 9424 | } |
Subhash Jadavani | be09603 | 2017-03-23 12:55:25 -0700 | [diff] [blame] | 9425 | ret = ufshcd_change_power_mode(hba, &new_pwr_info); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9426 | } |
| 9427 | |
Subhash Jadavani | be09603 | 2017-03-23 12:55:25 -0700 | [diff] [blame] | 9428 | out: |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9429 | if (ret) |
| 9430 | dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d), scale_up = %d", |
| 9431 | __func__, ret, |
| 9432 | hba->pwr_info.gear_tx, hba->pwr_info.gear_rx, |
| 9433 | new_pwr_info.gear_tx, new_pwr_info.gear_rx, |
| 9434 | scale_up); |
| 9435 | |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9436 | return ret; |
| 9437 | } |
| 9438 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9439 | static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba) |
| 9440 | { |
| 9441 | #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */ |
| 9442 | int ret = 0; |
| 9443 | /* |
| 9444 | * make sure that there are no outstanding requests when |
| 9445 | * clock scaling is in progress |
| 9446 | */ |
| 9447 | ufshcd_scsi_block_requests(hba); |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 9448 | down_write(&hba->lock); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9449 | if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) { |
| 9450 | ret = -EBUSY; |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 9451 | up_write(&hba->lock); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9452 | ufshcd_scsi_unblock_requests(hba); |
| 9453 | } |
| 9454 | |
| 9455 | return ret; |
| 9456 | } |
| 9457 | |
| 9458 | static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba) |
| 9459 | { |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 9460 | up_write(&hba->lock); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9461 | ufshcd_scsi_unblock_requests(hba); |
| 9462 | } |
| 9463 | |
| 9464 | /** |
| 9465 | * ufshcd_devfreq_scale - scale up/down UFS clocks and gear |
| 9466 | * @hba: per adapter instance |
| 9467 | * @scale_up: True for scaling up and false for scalin down |
| 9468 | * |
| 9469 | * Returns 0 for success, |
| 9470 | * Returns -EBUSY if scaling can't happen at this time |
| 9471 | * Returns non-zero for any other errors |
| 9472 | */ |
| 9473 | static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up) |
| 9474 | { |
| 9475 | int ret = 0; |
| 9476 | |
| 9477 | /* let's not get into low power until clock scaling is completed */ |
| 9478 | ufshcd_hold_all(hba); |
| 9479 | |
| 9480 | ret = ufshcd_clock_scaling_prepare(hba); |
| 9481 | if (ret) |
| 9482 | goto out; |
| 9483 | |
| 9484 | /* scale down the gear before scaling down clocks */ |
| 9485 | if (!scale_up) { |
| 9486 | ret = ufshcd_scale_gear(hba, false); |
| 9487 | if (ret) |
| 9488 | goto clk_scaling_unprepare; |
| 9489 | } |
| 9490 | |
Subhash Jadavani | 67c5330 | 2017-03-22 17:00:54 -0700 | [diff] [blame] | 9491 | /* |
| 9492 | * If auto hibern8 is supported then put the link in |
| 9493 | * hibern8 manually, this is to avoid auto hibern8 |
| 9494 | * racing during clock frequency scaling sequence. |
| 9495 | */ |
| 9496 | if (ufshcd_is_auto_hibern8_supported(hba)) { |
| 9497 | ret = ufshcd_uic_hibern8_enter(hba); |
| 9498 | if (ret) |
| 9499 | /* link will be bad state so no need to scale_up_gear */ |
| 9500 | return ret; |
| 9501 | } |
| 9502 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9503 | ret = ufshcd_scale_clks(hba, scale_up); |
| 9504 | if (ret) |
| 9505 | goto scale_up_gear; |
| 9506 | |
Subhash Jadavani | 67c5330 | 2017-03-22 17:00:54 -0700 | [diff] [blame] | 9507 | if (ufshcd_is_auto_hibern8_supported(hba)) { |
| 9508 | ret = ufshcd_uic_hibern8_exit(hba); |
| 9509 | if (ret) |
| 9510 | /* link will be bad state so no need to scale_up_gear */ |
| 9511 | return ret; |
| 9512 | } |
| 9513 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9514 | /* scale up the gear after scaling up clocks */ |
| 9515 | if (scale_up) { |
| 9516 | ret = ufshcd_scale_gear(hba, true); |
| 9517 | if (ret) { |
| 9518 | ufshcd_scale_clks(hba, false); |
| 9519 | goto clk_scaling_unprepare; |
| 9520 | } |
| 9521 | } |
| 9522 | |
| 9523 | if (!ret) { |
| 9524 | hba->clk_scaling.is_scaled_up = scale_up; |
| 9525 | if (scale_up) |
| 9526 | hba->clk_gating.delay_ms = |
| 9527 | hba->clk_gating.delay_ms_perf; |
| 9528 | else |
| 9529 | hba->clk_gating.delay_ms = |
| 9530 | hba->clk_gating.delay_ms_pwr_save; |
| 9531 | } |
| 9532 | |
| 9533 | goto clk_scaling_unprepare; |
| 9534 | |
| 9535 | scale_up_gear: |
| 9536 | if (!scale_up) |
| 9537 | ufshcd_scale_gear(hba, true); |
| 9538 | clk_scaling_unprepare: |
| 9539 | ufshcd_clock_scaling_unprepare(hba); |
| 9540 | out: |
| 9541 | ufshcd_release_all(hba); |
| 9542 | return ret; |
| 9543 | } |
| 9544 | |
| 9545 | static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba) |
| 9546 | { |
| 9547 | unsigned long flags; |
| 9548 | |
| 9549 | devfreq_suspend_device(hba->devfreq); |
| 9550 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 9551 | hba->clk_scaling.window_start_t = 0; |
| 9552 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 9553 | } |
| 9554 | |
| 9555 | static void ufshcd_suspend_clkscaling(struct ufs_hba *hba) |
| 9556 | { |
| 9557 | unsigned long flags; |
| 9558 | bool suspend = false; |
| 9559 | |
| 9560 | if (!ufshcd_is_clkscaling_supported(hba)) |
| 9561 | return; |
| 9562 | |
| 9563 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 9564 | if (!hba->clk_scaling.is_suspended) { |
| 9565 | suspend = true; |
| 9566 | hba->clk_scaling.is_suspended = true; |
| 9567 | } |
| 9568 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 9569 | |
| 9570 | if (suspend) |
| 9571 | __ufshcd_suspend_clkscaling(hba); |
| 9572 | } |
| 9573 | |
| 9574 | static void ufshcd_resume_clkscaling(struct ufs_hba *hba) |
| 9575 | { |
| 9576 | unsigned long flags; |
| 9577 | bool resume = false; |
| 9578 | |
| 9579 | if (!ufshcd_is_clkscaling_supported(hba)) |
| 9580 | return; |
| 9581 | |
| 9582 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 9583 | if (hba->clk_scaling.is_suspended) { |
| 9584 | resume = true; |
| 9585 | hba->clk_scaling.is_suspended = false; |
| 9586 | } |
| 9587 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 9588 | |
| 9589 | if (resume) |
| 9590 | devfreq_resume_device(hba->devfreq); |
| 9591 | } |
| 9592 | |
| 9593 | static ssize_t ufshcd_clkscale_enable_show(struct device *dev, |
| 9594 | struct device_attribute *attr, char *buf) |
| 9595 | { |
| 9596 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 9597 | |
| 9598 | return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed); |
| 9599 | } |
| 9600 | |
| 9601 | static ssize_t ufshcd_clkscale_enable_store(struct device *dev, |
| 9602 | struct device_attribute *attr, const char *buf, size_t count) |
| 9603 | { |
| 9604 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 9605 | u32 value; |
| 9606 | int err; |
| 9607 | |
| 9608 | if (kstrtou32(buf, 0, &value)) |
| 9609 | return -EINVAL; |
| 9610 | |
| 9611 | value = !!value; |
| 9612 | if (value == hba->clk_scaling.is_allowed) |
| 9613 | goto out; |
| 9614 | |
| 9615 | pm_runtime_get_sync(hba->dev); |
| 9616 | ufshcd_hold(hba, false); |
| 9617 | |
| 9618 | cancel_work_sync(&hba->clk_scaling.suspend_work); |
| 9619 | cancel_work_sync(&hba->clk_scaling.resume_work); |
| 9620 | |
| 9621 | hba->clk_scaling.is_allowed = value; |
| 9622 | |
| 9623 | if (value) { |
| 9624 | ufshcd_resume_clkscaling(hba); |
| 9625 | } else { |
| 9626 | ufshcd_suspend_clkscaling(hba); |
| 9627 | err = ufshcd_devfreq_scale(hba, true); |
| 9628 | if (err) |
| 9629 | dev_err(hba->dev, "%s: failed to scale clocks up %d\n", |
| 9630 | __func__, err); |
| 9631 | } |
| 9632 | |
| 9633 | ufshcd_release(hba, false); |
| 9634 | pm_runtime_put_sync(hba->dev); |
| 9635 | out: |
| 9636 | return count; |
| 9637 | } |
| 9638 | |
| 9639 | static void ufshcd_clk_scaling_suspend_work(struct work_struct *work) |
| 9640 | { |
| 9641 | struct ufs_hba *hba = container_of(work, struct ufs_hba, |
| 9642 | clk_scaling.suspend_work); |
| 9643 | unsigned long irq_flags; |
| 9644 | |
| 9645 | spin_lock_irqsave(hba->host->host_lock, irq_flags); |
| 9646 | if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) { |
| 9647 | spin_unlock_irqrestore(hba->host->host_lock, irq_flags); |
| 9648 | return; |
| 9649 | } |
| 9650 | hba->clk_scaling.is_suspended = true; |
| 9651 | spin_unlock_irqrestore(hba->host->host_lock, irq_flags); |
| 9652 | |
| 9653 | __ufshcd_suspend_clkscaling(hba); |
| 9654 | } |
| 9655 | |
| 9656 | static void ufshcd_clk_scaling_resume_work(struct work_struct *work) |
| 9657 | { |
| 9658 | struct ufs_hba *hba = container_of(work, struct ufs_hba, |
| 9659 | clk_scaling.resume_work); |
| 9660 | unsigned long irq_flags; |
| 9661 | |
| 9662 | spin_lock_irqsave(hba->host->host_lock, irq_flags); |
| 9663 | if (!hba->clk_scaling.is_suspended) { |
| 9664 | spin_unlock_irqrestore(hba->host->host_lock, irq_flags); |
| 9665 | return; |
| 9666 | } |
| 9667 | hba->clk_scaling.is_suspended = false; |
| 9668 | spin_unlock_irqrestore(hba->host->host_lock, irq_flags); |
| 9669 | |
| 9670 | devfreq_resume_device(hba->devfreq); |
| 9671 | } |
| 9672 | |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9673 | static int ufshcd_devfreq_target(struct device *dev, |
| 9674 | unsigned long *freq, u32 flags) |
| 9675 | { |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9676 | int ret = 0; |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9677 | struct ufs_hba *hba = dev_get_drvdata(dev); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9678 | unsigned long irq_flags; |
| 9679 | ktime_t start; |
| 9680 | bool scale_up, sched_clk_scaling_suspend_work = false; |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9681 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9682 | if (!ufshcd_is_clkscaling_supported(hba)) |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9683 | return -EINVAL; |
| 9684 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9685 | if ((*freq > 0) && (*freq < UINT_MAX)) { |
| 9686 | dev_err(hba->dev, "%s: invalid freq = %lu\n", __func__, *freq); |
| 9687 | return -EINVAL; |
| 9688 | } |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9689 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9690 | spin_lock_irqsave(hba->host->host_lock, irq_flags); |
| 9691 | if (ufshcd_eh_in_progress(hba)) { |
| 9692 | spin_unlock_irqrestore(hba->host->host_lock, irq_flags); |
| 9693 | return 0; |
| 9694 | } |
| 9695 | |
| 9696 | if (!hba->clk_scaling.active_reqs) |
| 9697 | sched_clk_scaling_suspend_work = true; |
| 9698 | |
| 9699 | scale_up = (*freq == UINT_MAX) ? true : false; |
| 9700 | if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) { |
| 9701 | spin_unlock_irqrestore(hba->host->host_lock, irq_flags); |
| 9702 | ret = 0; |
| 9703 | goto out; /* no state change required */ |
| 9704 | } |
| 9705 | spin_unlock_irqrestore(hba->host->host_lock, irq_flags); |
| 9706 | |
| 9707 | start = ktime_get(); |
| 9708 | ret = ufshcd_devfreq_scale(hba, scale_up); |
| 9709 | trace_ufshcd_profile_clk_scaling(dev_name(hba->dev), |
| 9710 | (scale_up ? "up" : "down"), |
| 9711 | ktime_to_us(ktime_sub(ktime_get(), start)), ret); |
| 9712 | |
| 9713 | out: |
| 9714 | if (sched_clk_scaling_suspend_work) |
| 9715 | queue_work(hba->clk_scaling.workq, |
| 9716 | &hba->clk_scaling.suspend_work); |
| 9717 | |
| 9718 | return ret; |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9719 | } |
| 9720 | |
| 9721 | static int ufshcd_devfreq_get_dev_status(struct device *dev, |
| 9722 | struct devfreq_dev_status *stat) |
| 9723 | { |
| 9724 | struct ufs_hba *hba = dev_get_drvdata(dev); |
| 9725 | struct ufs_clk_scaling *scaling = &hba->clk_scaling; |
| 9726 | unsigned long flags; |
| 9727 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9728 | if (!ufshcd_is_clkscaling_supported(hba)) |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9729 | return -EINVAL; |
| 9730 | |
| 9731 | memset(stat, 0, sizeof(*stat)); |
| 9732 | |
| 9733 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 9734 | if (!scaling->window_start_t) |
| 9735 | goto start_window; |
| 9736 | |
| 9737 | if (scaling->is_busy_started) |
| 9738 | scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(), |
| 9739 | scaling->busy_start_t)); |
| 9740 | |
| 9741 | stat->total_time = jiffies_to_usecs((long)jiffies - |
| 9742 | (long)scaling->window_start_t); |
| 9743 | stat->busy_time = scaling->tot_busy_t; |
| 9744 | start_window: |
| 9745 | scaling->window_start_t = jiffies; |
| 9746 | scaling->tot_busy_t = 0; |
| 9747 | |
| 9748 | if (hba->outstanding_reqs) { |
| 9749 | scaling->busy_start_t = ktime_get(); |
| 9750 | scaling->is_busy_started = true; |
| 9751 | } else { |
| 9752 | scaling->busy_start_t = ktime_set(0, 0); |
| 9753 | scaling->is_busy_started = false; |
| 9754 | } |
| 9755 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 9756 | return 0; |
| 9757 | } |
| 9758 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9759 | static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba) |
| 9760 | { |
| 9761 | hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show; |
| 9762 | hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store; |
| 9763 | sysfs_attr_init(&hba->clk_scaling.enable_attr.attr); |
| 9764 | hba->clk_scaling.enable_attr.attr.name = "clkscale_enable"; |
| 9765 | hba->clk_scaling.enable_attr.attr.mode = S_IRUGO | S_IWUSR; |
| 9766 | if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr)) |
| 9767 | dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n"); |
| 9768 | } |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9769 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9770 | static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba) |
| 9771 | { |
| 9772 | struct device *dev = hba->dev; |
| 9773 | int ret; |
| 9774 | |
| 9775 | ret = of_property_read_u32(dev->of_node, "lanes-per-direction", |
| 9776 | &hba->lanes_per_direction); |
| 9777 | if (ret) { |
| 9778 | dev_dbg(hba->dev, |
| 9779 | "%s: failed to read lanes-per-direction, ret=%d\n", |
| 9780 | __func__, ret); |
| 9781 | hba->lanes_per_direction = UFSHCD_DEFAULT_LANES_PER_DIRECTION; |
| 9782 | } |
| 9783 | } |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 9784 | /** |
| 9785 | * ufshcd_init - Driver initialization routine |
| 9786 | * @hba: per-adapter instance |
| 9787 | * @mmio_base: base register address |
| 9788 | * @irq: Interrupt line of device |
| 9789 | * Returns 0 on success, non-zero value on failure |
| 9790 | */ |
| 9791 | int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) |
| 9792 | { |
| 9793 | int err; |
| 9794 | struct Scsi_Host *host = hba->host; |
| 9795 | struct device *dev = hba->dev; |
| 9796 | |
| 9797 | if (!mmio_base) { |
| 9798 | dev_err(hba->dev, |
| 9799 | "Invalid memory reference for mmio_base is NULL\n"); |
| 9800 | err = -ENODEV; |
| 9801 | goto out_error; |
| 9802 | } |
| 9803 | |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9804 | hba->mmio_base = mmio_base; |
| 9805 | hba->irq = irq; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9806 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9807 | ufshcd_init_lanes_per_dir(hba); |
| 9808 | |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 9809 | err = ufshcd_hba_init(hba); |
Sujit Reddy Thumma | 5c0c28a | 2014-09-25 15:32:21 +0300 | [diff] [blame] | 9810 | if (err) |
| 9811 | goto out_error; |
| 9812 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9813 | /* Read capabilities registers */ |
| 9814 | ufshcd_hba_capabilities(hba); |
| 9815 | |
| 9816 | /* Get UFS version supported by the controller */ |
| 9817 | hba->ufs_version = ufshcd_get_ufs_version(hba); |
| 9818 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9819 | /* print error message if ufs_version is not valid */ |
| 9820 | if ((hba->ufs_version != UFSHCI_VERSION_10) && |
| 9821 | (hba->ufs_version != UFSHCI_VERSION_11) && |
| 9822 | (hba->ufs_version != UFSHCI_VERSION_20) && |
| 9823 | (hba->ufs_version != UFSHCI_VERSION_21)) |
| 9824 | dev_err(hba->dev, "invalid UFS version 0x%x\n", |
| 9825 | hba->ufs_version); |
| 9826 | |
Seungwon Jeon | 2fbd009 | 2013-06-26 22:39:27 +0530 | [diff] [blame] | 9827 | /* Get Interrupt bit mask per version */ |
| 9828 | hba->intr_mask = ufshcd_get_intr_mask(hba); |
| 9829 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9830 | /* Enable debug prints */ |
| 9831 | hba->ufshcd_dbg_print = DEFAULT_UFSHCD_DBG_PRINT_EN; |
| 9832 | |
Akinobu Mita | ca3d7bf | 2014-07-13 21:24:46 +0900 | [diff] [blame] | 9833 | err = ufshcd_set_dma_mask(hba); |
| 9834 | if (err) { |
| 9835 | dev_err(hba->dev, "set dma mask failed\n"); |
| 9836 | goto out_disable; |
| 9837 | } |
| 9838 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9839 | /* Allocate memory for host memory space */ |
| 9840 | err = ufshcd_memory_alloc(hba); |
| 9841 | if (err) { |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9842 | dev_err(hba->dev, "Memory allocation failed\n"); |
| 9843 | goto out_disable; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9844 | } |
| 9845 | |
| 9846 | /* Configure LRB */ |
| 9847 | ufshcd_host_memory_configure(hba); |
| 9848 | |
| 9849 | host->can_queue = hba->nutrs; |
| 9850 | host->cmd_per_lun = hba->nutrs; |
| 9851 | host->max_id = UFSHCD_MAX_ID; |
Subhash Jadavani | 0ce147d | 2014-09-25 15:32:29 +0300 | [diff] [blame] | 9852 | host->max_lun = UFS_MAX_LUNS; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9853 | host->max_channel = UFSHCD_MAX_CHANNEL; |
| 9854 | host->unique_id = host->host_no; |
| 9855 | host->max_cmd_len = MAX_CDB_SIZE; |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9856 | host->set_dbd_for_caching = 1; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9857 | |
Dolev Raviv | 7eb584d | 2014-09-25 15:32:31 +0300 | [diff] [blame] | 9858 | hba->max_pwr_info.is_valid = false; |
| 9859 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9860 | /* Initailize wait queue for task management */ |
Sujit Reddy Thumma | e293313 | 2014-05-26 10:59:12 +0530 | [diff] [blame] | 9861 | init_waitqueue_head(&hba->tm_wq); |
| 9862 | init_waitqueue_head(&hba->tm_tag_wq); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9863 | |
| 9864 | /* Initialize work queues */ |
Sujit Reddy Thumma | e8e7f27 | 2014-05-26 10:59:15 +0530 | [diff] [blame] | 9865 | INIT_WORK(&hba->eh_work, ufshcd_err_handler); |
Sujit Reddy Thumma | 66ec6d5 | 2013-07-30 00:35:59 +0530 | [diff] [blame] | 9866 | INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9867 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 9868 | /* Initialize UIC command mutex */ |
| 9869 | mutex_init(&hba->uic_cmd_mutex); |
| 9870 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 9871 | /* Initialize mutex for device management commands */ |
| 9872 | mutex_init(&hba->dev_cmd.lock); |
| 9873 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 9874 | init_rwsem(&hba->lock); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9875 | |
Sujit Reddy Thumma | 5a0b0cb | 2013-07-30 00:35:57 +0530 | [diff] [blame] | 9876 | /* Initialize device management tag acquire wait queue */ |
| 9877 | init_waitqueue_head(&hba->dev_cmd.tag_wq); |
| 9878 | |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 9879 | ufshcd_init_clk_gating(hba); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9880 | ufshcd_init_hibern8_on_idle(hba); |
Yaniv Gardi | 199ef13 | 2016-03-10 17:37:06 +0200 | [diff] [blame] | 9881 | |
| 9882 | /* |
| 9883 | * In order to avoid any spurious interrupt immediately after |
| 9884 | * registering UFS controller interrupt handler, clear any pending UFS |
| 9885 | * interrupt status and disable all the UFS interrupts. |
| 9886 | */ |
| 9887 | ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS), |
| 9888 | REG_INTERRUPT_STATUS); |
| 9889 | ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE); |
| 9890 | /* |
| 9891 | * Make sure that UFS interrupts are disabled and any pending interrupt |
| 9892 | * status is cleared before registering UFS interrupt handler. |
| 9893 | */ |
| 9894 | mb(); |
| 9895 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9896 | /* IRQ registration */ |
Seungwon Jeon | 2953f85 | 2013-06-27 13:31:54 +0900 | [diff] [blame] | 9897 | err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9898 | if (err) { |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9899 | dev_err(hba->dev, "request irq failed\n"); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 9900 | goto exit_gating; |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 9901 | } else { |
| 9902 | hba->is_irq_enabled = true; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9903 | } |
| 9904 | |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9905 | err = scsi_add_host(host, hba->dev); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9906 | if (err) { |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9907 | dev_err(hba->dev, "scsi_add_host failed\n"); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 9908 | goto exit_gating; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9909 | } |
| 9910 | |
Subhash Jadavani | 9c80770 | 2017-04-01 00:35:51 -0700 | [diff] [blame] | 9911 | /* Reset controller to power on reset (POR) state */ |
| 9912 | ufshcd_vops_full_reset(hba); |
| 9913 | |
| 9914 | /* reset connected UFS device */ |
| 9915 | err = ufshcd_reset_device(hba); |
| 9916 | if (err) |
| 9917 | dev_warn(hba->dev, "%s: device reset failed. err %d\n", |
| 9918 | __func__, err); |
| 9919 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 9920 | /* Host controller enable */ |
| 9921 | err = ufshcd_hba_enable(hba); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9922 | if (err) { |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 9923 | dev_err(hba->dev, "Host controller enable failed\n"); |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9924 | ufshcd_print_host_regs(hba); |
| 9925 | ufshcd_print_host_state(hba); |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9926 | goto out_remove_scsi_host; |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9927 | } |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 9928 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9929 | if (ufshcd_is_clkscaling_supported(hba)) { |
| 9930 | char wq_name[sizeof("ufs_clkscaling_00")]; |
| 9931 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9932 | INIT_WORK(&hba->clk_scaling.suspend_work, |
| 9933 | ufshcd_clk_scaling_suspend_work); |
| 9934 | INIT_WORK(&hba->clk_scaling.resume_work, |
| 9935 | ufshcd_clk_scaling_resume_work); |
| 9936 | |
| 9937 | snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clkscaling_%d", |
| 9938 | host->host_no); |
| 9939 | hba->clk_scaling.workq = create_singlethread_workqueue(wq_name); |
| 9940 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9941 | ufshcd_clkscaling_init_sysfs(hba); |
Sahitya Tummala | 856b348 | 2014-09-25 15:32:34 +0300 | [diff] [blame] | 9942 | } |
| 9943 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9944 | /* |
| 9945 | * If rpm_lvl and and spm_lvl are not already set to valid levels, |
| 9946 | * set the default power management level for UFS runtime and system |
| 9947 | * suspend. Default power saving mode selected is keeping UFS link in |
| 9948 | * Hibern8 state and UFS device in sleep. |
| 9949 | */ |
| 9950 | if (!ufshcd_is_valid_pm_lvl(hba->rpm_lvl)) |
| 9951 | hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state( |
| 9952 | UFS_SLEEP_PWR_MODE, |
| 9953 | UIC_LINK_HIBERN8_STATE); |
| 9954 | if (!ufshcd_is_valid_pm_lvl(hba->spm_lvl)) |
| 9955 | hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state( |
| 9956 | UFS_SLEEP_PWR_MODE, |
| 9957 | UIC_LINK_HIBERN8_STATE); |
| 9958 | |
Sujit Reddy Thumma | 6269473 | 2013-07-30 00:36:00 +0530 | [diff] [blame] | 9959 | /* Hold auto suspend until async scan completes */ |
| 9960 | pm_runtime_get_sync(dev); |
| 9961 | |
Mohan Srinivasan | 0ef170d | 2016-08-25 18:31:01 -0700 | [diff] [blame] | 9962 | ufshcd_init_latency_hist(hba); |
| 9963 | |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 9964 | /* |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9965 | * We are assuming that device wasn't put in sleep/power-down |
| 9966 | * state exclusively during the boot stage before kernel. |
| 9967 | * This assumption helps avoid doing link startup twice during |
| 9968 | * ufshcd_probe_hba(). |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 9969 | */ |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9970 | ufshcd_set_ufs_dev_active(hba); |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 9971 | |
Seungwon Jeon | 6ccf44fe | 2013-06-26 22:39:29 +0530 | [diff] [blame] | 9972 | async_schedule(ufshcd_async_scan, hba); |
| 9973 | |
Subhash Jadavani | cce6fbc | 2016-08-11 11:35:26 -0700 | [diff] [blame] | 9974 | ufsdbg_add_debugfs(hba); |
| 9975 | |
| 9976 | ufshcd_add_sysfs_nodes(hba); |
| 9977 | |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9978 | return 0; |
| 9979 | |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9980 | out_remove_scsi_host: |
| 9981 | scsi_remove_host(hba->host); |
Sahitya Tummala | 1ab27c9 | 2014-09-25 15:32:32 +0300 | [diff] [blame] | 9982 | exit_gating: |
| 9983 | ufshcd_exit_clk_gating(hba); |
Mohan Srinivasan | 0ef170d | 2016-08-25 18:31:01 -0700 | [diff] [blame] | 9984 | ufshcd_exit_latency_hist(hba); |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9985 | out_disable: |
Subhash Jadavani | 57d104c | 2014-09-25 15:32:30 +0300 | [diff] [blame] | 9986 | hba->is_irq_enabled = false; |
Sujit Reddy Thumma | aa49761 | 2014-09-25 15:32:22 +0300 | [diff] [blame] | 9987 | ufshcd_hba_exit(hba); |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9988 | out_error: |
| 9989 | return err; |
| 9990 | } |
| 9991 | EXPORT_SYMBOL_GPL(ufshcd_init); |
| 9992 | |
Vinayak Holikatti | 3b1d058 | 2013-02-25 21:44:32 +0530 | [diff] [blame] | 9993 | MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>"); |
| 9994 | MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>"); |
Vinayak Holikatti | e0eca63 | 2013-02-25 21:44:33 +0530 | [diff] [blame] | 9995 | MODULE_DESCRIPTION("Generic UFS host controller driver Core"); |
Santosh Yaraganavi | 7a3e97b | 2012-02-29 12:11:50 +0530 | [diff] [blame] | 9996 | MODULE_LICENSE("GPL"); |
| 9997 | MODULE_VERSION(UFSHCD_DRIVER_VERSION); |