blob: 0482235eee9262f79ecd69f907c8c41c2364d914 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/pci/setup-bus.c
3 *
4 * Extruded from code written by
5 * Dave Rusling (david.rusling@reo.mts.dec.com)
6 * David Mosberger (davidm@cs.arizona.edu)
7 * David Miller (davem@redhat.com)
8 *
9 * Support routines for initializing a PCI subsystem.
10 */
11
12/*
13 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
14 * PCI-PCI bridges cleanup, sorted resource allocation.
15 * Feb 2002, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
16 * Converted to allocation in 3 passes, which gives
17 * tighter packing. Prefetchable range support.
18 */
19
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/pci.h>
24#include <linux/errno.h>
25#include <linux/ioport.h>
26#include <linux/cache.h>
27#include <linux/slab.h>
Bjorn Helgaas47087702012-02-23 14:29:23 -070028#include <asm-generic/pci-bridge.h>
Chris Wright6faf17f2009-08-28 13:00:06 -070029#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
Bjorn Helgaas844393f2012-02-23 20:18:59 -070031unsigned int pci_flags;
Bjorn Helgaas47087702012-02-23 14:29:23 -070032
Yinghai Lubdc4abe2012-01-21 02:08:27 -080033struct pci_dev_resource {
34 struct list_head list;
Yinghai Lu2934a0d2012-01-21 02:08:26 -080035 struct resource *res;
36 struct pci_dev *dev;
Yinghai Lu568ddef2010-01-22 01:02:21 -080037 resource_size_t start;
38 resource_size_t end;
Ram Paic8adf9a2011-02-14 17:43:20 -080039 resource_size_t add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070040 resource_size_t min_align;
Yinghai Lu568ddef2010-01-22 01:02:21 -080041 unsigned long flags;
42};
43
Yinghai Lubffc56d2012-01-21 02:08:30 -080044static void free_list(struct list_head *head)
45{
46 struct pci_dev_resource *dev_res, *tmp;
47
48 list_for_each_entry_safe(dev_res, tmp, head, list) {
49 list_del(&dev_res->list);
50 kfree(dev_res);
51 }
52}
Ram Pai094732a2011-02-14 17:43:18 -080053
Ram Paic8adf9a2011-02-14 17:43:20 -080054/**
55 * add_to_list() - add a new resource tracker to the list
56 * @head: Head of the list
57 * @dev: device corresponding to which the resource
58 * belongs
59 * @res: The resource to be tracked
60 * @add_size: additional size to be optionally added
61 * to the resource
62 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -080063static int add_to_list(struct list_head *head,
Ram Paic8adf9a2011-02-14 17:43:20 -080064 struct pci_dev *dev, struct resource *res,
Ram Pai2bbc6942011-07-25 13:08:39 -070065 resource_size_t add_size, resource_size_t min_align)
Yinghai Lu568ddef2010-01-22 01:02:21 -080066{
Yinghai Lu764242a2012-01-21 02:08:28 -080067 struct pci_dev_resource *tmp;
Yinghai Lu568ddef2010-01-22 01:02:21 -080068
Yinghai Lubdc4abe2012-01-21 02:08:27 -080069 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
Yinghai Lu568ddef2010-01-22 01:02:21 -080070 if (!tmp) {
Ryan Desfosses3c78bc62014-04-18 20:13:49 -040071 pr_warn("add_to_list: kmalloc() failed!\n");
Yinghai Luef62dfe2012-01-21 02:08:18 -080072 return -ENOMEM;
Yinghai Lu568ddef2010-01-22 01:02:21 -080073 }
74
Yinghai Lu568ddef2010-01-22 01:02:21 -080075 tmp->res = res;
76 tmp->dev = dev;
77 tmp->start = res->start;
78 tmp->end = res->end;
79 tmp->flags = res->flags;
Ram Paic8adf9a2011-02-14 17:43:20 -080080 tmp->add_size = add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070081 tmp->min_align = min_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -080082
83 list_add(&tmp->list, head);
Yinghai Luef62dfe2012-01-21 02:08:18 -080084
85 return 0;
Yinghai Lu568ddef2010-01-22 01:02:21 -080086}
87
Yinghai Lub9b0bba2012-01-21 02:08:29 -080088static void remove_from_list(struct list_head *head,
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080089 struct resource *res)
90{
Yinghai Lub9b0bba2012-01-21 02:08:29 -080091 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080092
Yinghai Lub9b0bba2012-01-21 02:08:29 -080093 list_for_each_entry_safe(dev_res, tmp, head, list) {
94 if (dev_res->res == res) {
95 list_del(&dev_res->list);
96 kfree(dev_res);
Yinghai Lubdc4abe2012-01-21 02:08:27 -080097 break;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080098 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080099 }
100}
101
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800102static resource_size_t get_res_add_size(struct list_head *head,
Yinghai Lu1c372352012-01-21 02:08:19 -0800103 struct resource *res)
104{
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800105 struct pci_dev_resource *dev_res;
Yinghai Lu1c372352012-01-21 02:08:19 -0800106
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800107 list_for_each_entry(dev_res, head, list) {
108 if (dev_res->res == res) {
Yinghai Lub5924432012-01-21 02:08:31 -0800109 int idx = res - &dev_res->dev->resource[0];
110
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800111 dev_printk(KERN_DEBUG, &dev_res->dev->dev,
Yinghai Lub5924432012-01-21 02:08:31 -0800112 "res[%d]=%pR get_res_add_size add_size %llx\n",
113 idx, dev_res->res,
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800114 (unsigned long long)dev_res->add_size);
Yinghai Lub5924432012-01-21 02:08:31 -0800115
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800116 return dev_res->add_size;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800117 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800118 }
Yinghai Lu1c372352012-01-21 02:08:19 -0800119
120 return 0;
121}
122
Yinghai Lu78c3b322012-01-21 02:08:25 -0800123/* Sort resources by alignment */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800124static void pdev_sort_resources(struct pci_dev *dev, struct list_head *head)
Yinghai Lu78c3b322012-01-21 02:08:25 -0800125{
126 int i;
127
128 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
129 struct resource *r;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800130 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800131 resource_size_t r_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800132 struct list_head *n;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800133
134 r = &dev->resource[i];
135
136 if (r->flags & IORESOURCE_PCI_FIXED)
137 continue;
138
139 if (!(r->flags) || r->parent)
140 continue;
141
142 r_align = pci_resource_alignment(dev, r);
143 if (!r_align) {
144 dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
145 i, r);
146 continue;
147 }
Yinghai Lu78c3b322012-01-21 02:08:25 -0800148
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800149 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
150 if (!tmp)
Ryan Desfosses227f0642014-04-18 20:13:50 -0400151 panic("pdev_sort_resources(): kmalloc() failed!\n");
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800152 tmp->res = r;
153 tmp->dev = dev;
154
155 /* fallback is smallest one or list is empty*/
156 n = head;
157 list_for_each_entry(dev_res, head, list) {
158 resource_size_t align;
159
160 align = pci_resource_alignment(dev_res->dev,
161 dev_res->res);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800162
163 if (r_align > align) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800164 n = &dev_res->list;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800165 break;
166 }
167 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800168 /* Insert it just before n*/
169 list_add_tail(&tmp->list, n);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800170 }
171}
172
Yinghai Lu6841ec62010-01-22 01:02:25 -0800173static void __dev_sort_resources(struct pci_dev *dev,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800174 struct list_head *head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175{
Yinghai Lu6841ec62010-01-22 01:02:25 -0800176 u16 class = dev->class >> 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177
Yinghai Lu6841ec62010-01-22 01:02:25 -0800178 /* Don't touch classless devices or host bridges or ioapics. */
179 if (class == PCI_CLASS_NOT_DEFINED || class == PCI_CLASS_BRIDGE_HOST)
180 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181
Yinghai Lu6841ec62010-01-22 01:02:25 -0800182 /* Don't touch ioapic devices already enabled by firmware */
183 if (class == PCI_CLASS_SYSTEM_PIC) {
184 u16 command;
185 pci_read_config_word(dev, PCI_COMMAND, &command);
186 if (command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
187 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188 }
189
Yinghai Lu6841ec62010-01-22 01:02:25 -0800190 pdev_sort_resources(dev, head);
191}
192
Ram Paifc075e12011-02-14 17:43:19 -0800193static inline void reset_resource(struct resource *res)
194{
195 res->start = 0;
196 res->end = 0;
197 res->flags = 0;
198}
199
Ram Paic8adf9a2011-02-14 17:43:20 -0800200/**
Ram Pai9e8bf932011-07-25 13:08:42 -0700201 * reassign_resources_sorted() - satisfy any additional resource requests
Ram Paic8adf9a2011-02-14 17:43:20 -0800202 *
Ram Pai9e8bf932011-07-25 13:08:42 -0700203 * @realloc_head : head of the list tracking requests requiring additional
Ram Paic8adf9a2011-02-14 17:43:20 -0800204 * resources
205 * @head : head of the list tracking requests with allocated
206 * resources
207 *
Ram Pai9e8bf932011-07-25 13:08:42 -0700208 * Walk through each element of the realloc_head and try to procure
Ram Paic8adf9a2011-02-14 17:43:20 -0800209 * additional resources for the element, provided the element
210 * is in the head list.
211 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800212static void reassign_resources_sorted(struct list_head *realloc_head,
213 struct list_head *head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800214{
215 struct resource *res;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800216 struct pci_dev_resource *add_res, *tmp;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800217 struct pci_dev_resource *dev_res;
Ram Paic8adf9a2011-02-14 17:43:20 -0800218 resource_size_t add_size;
219 int idx;
220
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800221 list_for_each_entry_safe(add_res, tmp, realloc_head, list) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800222 bool found_match = false;
223
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800224 res = add_res->res;
Ram Paic8adf9a2011-02-14 17:43:20 -0800225 /* skip resource that has been reset */
226 if (!res->flags)
227 goto out;
228
229 /* skip this resource if not found in head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800230 list_for_each_entry(dev_res, head, list) {
231 if (dev_res->res == res) {
232 found_match = true;
233 break;
234 }
Ram Paic8adf9a2011-02-14 17:43:20 -0800235 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800236 if (!found_match)/* just skip */
237 continue;
Ram Paic8adf9a2011-02-14 17:43:20 -0800238
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800239 idx = res - &add_res->dev->resource[0];
240 add_size = add_res->add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -0700241 if (!resource_size(res)) {
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800242 res->start = add_res->start;
Ram Pai2bbc6942011-07-25 13:08:39 -0700243 res->end = res->start + add_size - 1;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800244 if (pci_assign_resource(add_res->dev, idx))
Ram Paic8adf9a2011-02-14 17:43:20 -0800245 reset_resource(res);
Ram Pai2bbc6942011-07-25 13:08:39 -0700246 } else {
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800247 resource_size_t align = add_res->min_align;
248 res->flags |= add_res->flags &
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800249 (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800250 if (pci_reassign_resource(add_res->dev, idx,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800251 add_size, align))
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800252 dev_printk(KERN_DEBUG, &add_res->dev->dev,
Yinghai Lub5924432012-01-21 02:08:31 -0800253 "failed to add %llx res[%d]=%pR\n",
254 (unsigned long long)add_size,
255 idx, res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800256 }
257out:
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800258 list_del(&add_res->list);
259 kfree(add_res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800260 }
261}
262
263/**
264 * assign_requested_resources_sorted() - satisfy resource requests
265 *
266 * @head : head of the list tracking requests for resources
Wanpeng Li8356aad2012-06-15 21:15:49 +0800267 * @fail_head : head of the list tracking requests that could
Ram Paic8adf9a2011-02-14 17:43:20 -0800268 * not be allocated
269 *
270 * Satisfy resource requests of each element in the list. Add
271 * requests that could not satisfied to the failed_list.
272 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800273static void assign_requested_resources_sorted(struct list_head *head,
274 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800275{
276 struct resource *res;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800277 struct pci_dev_resource *dev_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -0800278 int idx;
279
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800280 list_for_each_entry(dev_res, head, list) {
281 res = dev_res->res;
282 idx = res - &dev_res->dev->resource[0];
283 if (resource_size(res) &&
284 pci_assign_resource(dev_res->dev, idx)) {
Yinghai Lua3cb9992013-01-21 13:20:43 -0800285 if (fail_head) {
Yinghai Lu9a928662010-02-28 15:49:39 -0800286 /*
287 * if the failed res is for ROM BAR, and it will
288 * be enabled later, don't add it to the list
289 */
290 if (!((idx == PCI_ROM_RESOURCE) &&
291 (!(res->flags & IORESOURCE_ROM_ENABLE))))
Yinghai Lu67cc7e22012-01-21 02:08:32 -0800292 add_to_list(fail_head,
293 dev_res->dev, res,
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700294 0 /* don't care */,
295 0 /* don't care */);
Yinghai Lu9a928662010-02-28 15:49:39 -0800296 }
Ram Paifc075e12011-02-14 17:43:19 -0800297 reset_resource(res);
Rajesh Shah542df5d2005-04-28 00:25:50 -0700298 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299 }
300}
301
Yinghai Luaa914f52013-07-25 06:31:38 -0700302static unsigned long pci_fail_res_type_mask(struct list_head *fail_head)
303{
304 struct pci_dev_resource *fail_res;
305 unsigned long mask = 0;
306
307 /* check failed type */
308 list_for_each_entry(fail_res, fail_head, list)
309 mask |= fail_res->flags;
310
311 /*
312 * one pref failed resource will set IORESOURCE_MEM,
313 * as we can allocate pref in non-pref range.
314 * Will release all assigned non-pref sibling resources
315 * according to that bit.
316 */
317 return mask & (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH);
318}
319
320static bool pci_need_to_release(unsigned long mask, struct resource *res)
321{
322 if (res->flags & IORESOURCE_IO)
323 return !!(mask & IORESOURCE_IO);
324
325 /* check pref at first */
326 if (res->flags & IORESOURCE_PREFETCH) {
327 if (mask & IORESOURCE_PREFETCH)
328 return true;
329 /* count pref if its parent is non-pref */
330 else if ((mask & IORESOURCE_MEM) &&
331 !(res->parent->flags & IORESOURCE_PREFETCH))
332 return true;
333 else
334 return false;
335 }
336
337 if (res->flags & IORESOURCE_MEM)
338 return !!(mask & IORESOURCE_MEM);
339
340 return false; /* should not get here */
341}
342
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800343static void __assign_resources_sorted(struct list_head *head,
344 struct list_head *realloc_head,
345 struct list_head *fail_head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800346{
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800347 /*
348 * Should not assign requested resources at first.
349 * they could be adjacent, so later reassign can not reallocate
350 * them one by one in parent resource window.
Masanari Iida367fa982012-07-23 22:39:51 +0900351 * Try to assign requested + add_size at beginning
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800352 * if could do that, could get out early.
353 * if could not do that, we still try to assign requested at first,
354 * then try to reassign add_size for some resources.
Yinghai Luaa914f52013-07-25 06:31:38 -0700355 *
356 * Separate three resource type checking if we need to release
357 * assigned resource after requested + add_size try.
358 * 1. if there is io port assign fail, will release assigned
359 * io port.
360 * 2. if there is pref mmio assign fail, release assigned
361 * pref mmio.
362 * if assigned pref mmio's parent is non-pref mmio and there
363 * is non-pref mmio assign fail, will release that assigned
364 * pref mmio.
365 * 3. if there is non-pref mmio assign fail or pref mmio
366 * assigned fail, will release assigned non-pref mmio.
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800367 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800368 LIST_HEAD(save_head);
369 LIST_HEAD(local_fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800370 struct pci_dev_resource *save_res;
Yinghai Luaa914f52013-07-25 06:31:38 -0700371 struct pci_dev_resource *dev_res, *tmp_res;
372 unsigned long fail_type;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800373
374 /* Check if optional add_size is there */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800375 if (!realloc_head || list_empty(realloc_head))
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800376 goto requested_and_reassign;
377
378 /* Save original start, end, flags etc at first */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800379 list_for_each_entry(dev_res, head, list) {
380 if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) {
Yinghai Lubffc56d2012-01-21 02:08:30 -0800381 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800382 goto requested_and_reassign;
383 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800384 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800385
386 /* Update res in head list with add_size in realloc_head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800387 list_for_each_entry(dev_res, head, list)
388 dev_res->res->end += get_res_add_size(realloc_head,
389 dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800390
391 /* Try updated head list with add_size added */
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800392 assign_requested_resources_sorted(head, &local_fail_head);
393
394 /* all assigned with add_size ? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800395 if (list_empty(&local_fail_head)) {
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800396 /* Remove head list from realloc_head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800397 list_for_each_entry(dev_res, head, list)
398 remove_from_list(realloc_head, dev_res->res);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800399 free_list(&save_head);
400 free_list(head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800401 return;
402 }
403
Yinghai Luaa914f52013-07-25 06:31:38 -0700404 /* check failed type */
405 fail_type = pci_fail_res_type_mask(&local_fail_head);
406 /* remove not need to be released assigned res from head list etc */
407 list_for_each_entry_safe(dev_res, tmp_res, head, list)
408 if (dev_res->res->parent &&
409 !pci_need_to_release(fail_type, dev_res->res)) {
410 /* remove it from realloc_head list */
411 remove_from_list(realloc_head, dev_res->res);
412 remove_from_list(&save_head, dev_res->res);
413 list_del(&dev_res->list);
414 kfree(dev_res);
415 }
416
Yinghai Lubffc56d2012-01-21 02:08:30 -0800417 free_list(&local_fail_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800418 /* Release assigned resource */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800419 list_for_each_entry(dev_res, head, list)
420 if (dev_res->res->parent)
421 release_resource(dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800422 /* Restore start/end/flags from saved list */
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800423 list_for_each_entry(save_res, &save_head, list) {
424 struct resource *res = save_res->res;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800425
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800426 res->start = save_res->start;
427 res->end = save_res->end;
428 res->flags = save_res->flags;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800429 }
Yinghai Lubffc56d2012-01-21 02:08:30 -0800430 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800431
432requested_and_reassign:
Ram Paic8adf9a2011-02-14 17:43:20 -0800433 /* Satisfy the must-have resource requests */
434 assign_requested_resources_sorted(head, fail_head);
435
Ram Pai0a2daa12011-07-25 13:08:41 -0700436 /* Try to satisfy any additional optional resource
Ram Paic8adf9a2011-02-14 17:43:20 -0800437 requests */
Ram Pai9e8bf932011-07-25 13:08:42 -0700438 if (realloc_head)
439 reassign_resources_sorted(realloc_head, head);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800440 free_list(head);
Ram Paic8adf9a2011-02-14 17:43:20 -0800441}
442
Yinghai Lu6841ec62010-01-22 01:02:25 -0800443static void pdev_assign_resources_sorted(struct pci_dev *dev,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800444 struct list_head *add_head,
445 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800446{
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800447 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800448
Yinghai Lu6841ec62010-01-22 01:02:25 -0800449 __dev_sort_resources(dev, &head);
Yinghai Lu8424d752012-01-21 02:08:21 -0800450 __assign_resources_sorted(&head, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800451
452}
453
454static void pbus_assign_resources_sorted(const struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800455 struct list_head *realloc_head,
456 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800457{
458 struct pci_dev *dev;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800459 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800460
Yinghai Lu6841ec62010-01-22 01:02:25 -0800461 list_for_each_entry(dev, &bus->devices, bus_list)
462 __dev_sort_resources(dev, &head);
463
Ram Pai9e8bf932011-07-25 13:08:42 -0700464 __assign_resources_sorted(&head, realloc_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800465}
466
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700467void pci_setup_cardbus(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468{
469 struct pci_dev *bridge = bus->self;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600470 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700471 struct pci_bus_region region;
472
Yinghai Lub918c622012-05-17 18:51:11 -0700473 dev_info(&bridge->dev, "CardBus bridge to %pR\n",
474 &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600476 res = bus->resource[0];
Yinghai Lufc279852013-12-09 22:54:40 -0800477 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600478 if (res->flags & IORESOURCE_IO) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479 /*
480 * The IO resource is allocated a range twice as large as it
481 * would normally need. This allows us to set both IO regs.
482 */
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600483 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
485 region.start);
486 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
487 region.end);
488 }
489
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600490 res = bus->resource[1];
Yinghai Lufc279852013-12-09 22:54:40 -0800491 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600492 if (res->flags & IORESOURCE_IO) {
493 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
495 region.start);
496 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
497 region.end);
498 }
499
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600500 res = bus->resource[2];
Yinghai Lufc279852013-12-09 22:54:40 -0800501 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600502 if (res->flags & IORESOURCE_MEM) {
503 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700504 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
505 region.start);
506 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
507 region.end);
508 }
509
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600510 res = bus->resource[3];
Yinghai Lufc279852013-12-09 22:54:40 -0800511 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600512 if (res->flags & IORESOURCE_MEM) {
513 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
515 region.start);
516 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
517 region.end);
518 }
519}
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700520EXPORT_SYMBOL(pci_setup_cardbus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521
522/* Initialize bridges with base/limit values we have collected.
523 PCI-to-PCI Bridge Architecture Specification rev. 1.1 (1998)
524 requires that if there is no I/O ports or memory behind the
525 bridge, corresponding range must be turned off by writing base
526 value greater than limit to the bridge's base/limit registers.
527
528 Note: care must be taken when updating I/O base/limit registers
529 of bridges which support 32-bit I/O. This update requires two
530 config space writes, so it's quite possible that an I/O window of
531 the bridge will have some undesirable address (e.g. 0) after the
532 first write. Ditto 64-bit prefetchable MMIO. */
Yinghai Lu7cc59972009-12-22 15:02:21 -0800533static void pci_setup_bridge_io(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700534{
535 struct pci_dev *bridge = bus->self;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600536 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537 struct pci_bus_region region;
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600538 unsigned long io_mask;
539 u8 io_base_lo, io_limit_lo;
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700540 u16 l;
541 u32 io_upper16;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700542
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600543 io_mask = PCI_IO_RANGE_MASK;
544 if (bridge->io_window_1k)
545 io_mask = PCI_IO_1K_RANGE_MASK;
546
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547 /* Set up the top and bottom of the PCI I/O segment for this bus. */
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600548 res = bus->resource[0];
Yinghai Lufc279852013-12-09 22:54:40 -0800549 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600550 if (res->flags & IORESOURCE_IO) {
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700551 pci_read_config_word(bridge, PCI_IO_BASE, &l);
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600552 io_base_lo = (region.start >> 8) & io_mask;
553 io_limit_lo = (region.end >> 8) & io_mask;
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700554 l = ((u16) io_limit_lo << 8) | io_base_lo;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700555 /* Set up upper 16 bits of I/O base/limit. */
556 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600557 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800558 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559 /* Clear upper 16 bits of I/O base/limit. */
560 io_upper16 = 0;
561 l = 0x00f0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562 }
563 /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
564 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
565 /* Update lower 16 bits of I/O base/limit. */
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700566 pci_write_config_word(bridge, PCI_IO_BASE, l);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700567 /* Update upper 16 bits of I/O base/limit. */
568 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800569}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700570
Yinghai Lu7cc59972009-12-22 15:02:21 -0800571static void pci_setup_bridge_mmio(struct pci_bus *bus)
572{
573 struct pci_dev *bridge = bus->self;
574 struct resource *res;
575 struct pci_bus_region region;
576 u32 l;
577
578 /* Set up the top and bottom of the PCI Memory segment for this bus. */
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600579 res = bus->resource[1];
Yinghai Lufc279852013-12-09 22:54:40 -0800580 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600581 if (res->flags & IORESOURCE_MEM) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582 l = (region.start >> 16) & 0xfff0;
583 l |= region.end & 0xfff00000;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600584 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800585 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587 }
588 pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800589}
590
591static void pci_setup_bridge_mmio_pref(struct pci_bus *bus)
592{
593 struct pci_dev *bridge = bus->self;
594 struct resource *res;
595 struct pci_bus_region region;
596 u32 l, bu, lu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700597
598 /* Clear out the upper 32 bits of PREF limit.
599 If PCI_PREF_BASE_UPPER32 was non-zero, this temporarily
600 disables PREF range, which is ok. */
601 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);
602
603 /* Set up PREF base/limit. */
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100604 bu = lu = 0;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600605 res = bus->resource[2];
Yinghai Lufc279852013-12-09 22:54:40 -0800606 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600607 if (res->flags & IORESOURCE_PREFETCH) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700608 l = (region.start >> 16) & 0xfff0;
609 l |= region.end & 0xfff00000;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600610 if (res->flags & IORESOURCE_MEM_64) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700611 bu = upper_32_bits(region.start);
612 lu = upper_32_bits(region.end);
Yinghai Lu1f82de12009-04-23 20:48:32 -0700613 }
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600614 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800615 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700617 }
618 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
619
Alex Williamson59353ea2009-11-30 14:51:44 -0700620 /* Set the upper 32 bits of PREF base & limit. */
621 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
622 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800623}
624
625static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type)
626{
627 struct pci_dev *bridge = bus->self;
628
Yinghai Lub918c622012-05-17 18:51:11 -0700629 dev_info(&bridge->dev, "PCI bridge to %pR\n",
630 &bus->busn_res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800631
632 if (type & IORESOURCE_IO)
633 pci_setup_bridge_io(bus);
634
635 if (type & IORESOURCE_MEM)
636 pci_setup_bridge_mmio(bus);
637
638 if (type & IORESOURCE_PREFETCH)
639 pci_setup_bridge_mmio_pref(bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640
641 pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);
642}
643
Benjamin Herrenschmidte2444272011-09-11 14:08:38 -0300644void pci_setup_bridge(struct pci_bus *bus)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800645{
646 unsigned long type = IORESOURCE_IO | IORESOURCE_MEM |
647 IORESOURCE_PREFETCH;
648
649 __pci_setup_bridge(bus, type);
650}
651
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652/* Check whether the bridge supports optional I/O and
653 prefetchable memory ranges. If not, the respective
654 base/limit registers must be read-only and read as 0. */
Sam Ravnborg96bde062007-03-26 21:53:30 -0800655static void pci_bridge_check_ranges(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700656{
657 u16 io;
658 u32 pmem;
659 struct pci_dev *bridge = bus->self;
660 struct resource *b_res;
661
662 b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
663 b_res[1].flags |= IORESOURCE_MEM;
664
665 pci_read_config_word(bridge, PCI_IO_BASE, &io);
666 if (!io) {
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700667 pci_write_config_word(bridge, PCI_IO_BASE, 0xe0f0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700668 pci_read_config_word(bridge, PCI_IO_BASE, &io);
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700669 pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
670 }
671 if (io)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672 b_res[0].flags |= IORESOURCE_IO;
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700673
Linus Torvalds1da177e2005-04-16 15:20:36 -0700674 /* DECchip 21050 pass 2 errata: the bridge may miss an address
675 disconnect boundary by one PCI data phase.
676 Workaround: do not use prefetching on this device. */
677 if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001)
678 return;
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700679
Linus Torvalds1da177e2005-04-16 15:20:36 -0700680 pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
681 if (!pmem) {
682 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE,
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700683 0xffe0fff0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700684 pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
685 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, 0x0);
686 }
Yinghai Lu1f82de12009-04-23 20:48:32 -0700687 if (pmem) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700688 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
Yinghai Lu99586102010-01-22 01:02:28 -0800689 if ((pmem & PCI_PREF_RANGE_TYPE_MASK) ==
690 PCI_PREF_RANGE_TYPE_64) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700691 b_res[2].flags |= IORESOURCE_MEM_64;
Yinghai Lu99586102010-01-22 01:02:28 -0800692 b_res[2].flags |= PCI_PREF_RANGE_TYPE_64;
693 }
Yinghai Lu1f82de12009-04-23 20:48:32 -0700694 }
695
696 /* double check if bridge does support 64 bit pref */
697 if (b_res[2].flags & IORESOURCE_MEM_64) {
698 u32 mem_base_hi, tmp;
699 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32,
700 &mem_base_hi);
701 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
702 0xffffffff);
703 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp);
704 if (!tmp)
705 b_res[2].flags &= ~IORESOURCE_MEM_64;
706 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
707 mem_base_hi);
708 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700709}
710
711/* Helper function for sizing routines: find first available
712 bus resource of a given type. Note: we intentionally skip
713 the bus resources which have already been assigned (that is,
714 have non-NULL parent resource). */
Yinghai Lu5b285412014-05-19 17:01:55 -0600715static struct resource *find_free_bus_resource(struct pci_bus *bus,
716 unsigned long type_mask, unsigned long type)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700717{
718 int i;
719 struct resource *r;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700720
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -0700721 pci_bus_for_each_resource(bus, r, i) {
Ivan Kokshaysky299de032005-06-15 18:59:27 +0400722 if (r == &ioport_resource || r == &iomem_resource)
723 continue;
Jesse Barnes55a10982009-10-27 09:39:18 -0700724 if (r && (r->flags & type_mask) == type && !r->parent)
725 return r;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700726 }
727 return NULL;
728}
729
Ram Pai13583b12011-02-14 17:43:17 -0800730static resource_size_t calculate_iosize(resource_size_t size,
731 resource_size_t min_size,
732 resource_size_t size1,
733 resource_size_t old_size,
734 resource_size_t align)
735{
736 if (size < min_size)
737 size = min_size;
Ryan Desfosses3c78bc62014-04-18 20:13:49 -0400738 if (old_size == 1)
Ram Pai13583b12011-02-14 17:43:17 -0800739 old_size = 0;
740 /* To be fixed in 2.5: we should have sort of HAVE_ISA
741 flag in the struct pci_bus. */
742#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
743 size = (size & 0xff) + ((size & ~0xffUL) << 2);
744#endif
745 size = ALIGN(size + size1, align);
746 if (size < old_size)
747 size = old_size;
748 return size;
749}
750
751static resource_size_t calculate_memsize(resource_size_t size,
752 resource_size_t min_size,
753 resource_size_t size1,
754 resource_size_t old_size,
755 resource_size_t align)
756{
757 if (size < min_size)
758 size = min_size;
Ryan Desfosses3c78bc62014-04-18 20:13:49 -0400759 if (old_size == 1)
Ram Pai13583b12011-02-14 17:43:17 -0800760 old_size = 0;
761 if (size < old_size)
762 size = old_size;
763 size = ALIGN(size + size1, align);
764 return size;
765}
766
Gavin Shanac5ad932012-09-11 16:59:45 -0600767resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus,
768 unsigned long type)
769{
770 return 1;
771}
772
773#define PCI_P2P_DEFAULT_MEM_ALIGN 0x100000 /* 1MiB */
774#define PCI_P2P_DEFAULT_IO_ALIGN 0x1000 /* 4KiB */
775#define PCI_P2P_DEFAULT_IO_ALIGN_1K 0x400 /* 1KiB */
776
777static resource_size_t window_alignment(struct pci_bus *bus,
778 unsigned long type)
779{
780 resource_size_t align = 1, arch_align;
781
782 if (type & IORESOURCE_MEM)
783 align = PCI_P2P_DEFAULT_MEM_ALIGN;
784 else if (type & IORESOURCE_IO) {
785 /*
786 * Per spec, I/O windows are 4K-aligned, but some
787 * bridges have an extension to support 1K alignment.
788 */
789 if (bus->self->io_window_1k)
790 align = PCI_P2P_DEFAULT_IO_ALIGN_1K;
791 else
792 align = PCI_P2P_DEFAULT_IO_ALIGN;
793 }
794
795 arch_align = pcibios_window_alignment(bus, type);
796 return max(align, arch_align);
797}
798
Ram Paic8adf9a2011-02-14 17:43:20 -0800799/**
800 * pbus_size_io() - size the io window of a given bus
801 *
802 * @bus : the bus
803 * @min_size : the minimum io window that must to be allocated
804 * @add_size : additional optional io window
Ram Pai9e8bf932011-07-25 13:08:42 -0700805 * @realloc_head : track the additional io window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -0800806 *
807 * Sizing the IO windows of the PCI-PCI bridge is trivial,
Yinghai Lufd591342012-07-09 19:55:29 -0600808 * since these windows have 1K or 4K granularity and the IO ranges
Ram Paic8adf9a2011-02-14 17:43:20 -0800809 * of non-bridge PCI devices are limited to 256 bytes.
810 * We must be careful with the ISA aliasing though.
811 */
812static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800813 resource_size_t add_size, struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700814{
815 struct pci_dev *dev;
Yinghai Lu5b285412014-05-19 17:01:55 -0600816 struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO,
817 IORESOURCE_IO);
Wei Yang11251a82013-08-02 17:31:05 +0800818 resource_size_t size = 0, size0 = 0, size1 = 0;
Yinghai Lube768912011-07-25 13:08:38 -0700819 resource_size_t children_add_size = 0;
Bjorn Helgaas2d1d6672013-08-05 16:15:10 -0600820 resource_size_t min_align, align;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700821
822 if (!b_res)
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700823 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700824
Bjorn Helgaas2d1d6672013-08-05 16:15:10 -0600825 min_align = window_alignment(bus, IORESOURCE_IO);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700826 list_for_each_entry(dev, &bus->devices, bus_list) {
827 int i;
828
829 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
830 struct resource *r = &dev->resource[i];
831 unsigned long r_size;
832
833 if (r->parent || !(r->flags & IORESOURCE_IO))
834 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +0800835 r_size = resource_size(r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700836
837 if (r_size < 0x400)
838 /* Might be re-aligned for ISA */
839 size += r_size;
840 else
841 size1 += r_size;
Yinghai Lube768912011-07-25 13:08:38 -0700842
Yinghai Lufd591342012-07-09 19:55:29 -0600843 align = pci_resource_alignment(dev, r);
844 if (align > min_align)
845 min_align = align;
846
Ram Pai9e8bf932011-07-25 13:08:42 -0700847 if (realloc_head)
848 children_add_size += get_res_add_size(realloc_head, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700849 }
850 }
Yinghai Lufd591342012-07-09 19:55:29 -0600851
Ram Paic8adf9a2011-02-14 17:43:20 -0800852 size0 = calculate_iosize(size, min_size, size1,
Yinghai Lufd591342012-07-09 19:55:29 -0600853 resource_size(b_res), min_align);
Yinghai Lube768912011-07-25 13:08:38 -0700854 if (children_add_size > add_size)
855 add_size = children_add_size;
Ram Pai9e8bf932011-07-25 13:08:42 -0700856 size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
Yinghai Lua4ac9fe2012-01-21 02:08:17 -0800857 calculate_iosize(size, min_size, add_size + size1,
Yinghai Lufd591342012-07-09 19:55:29 -0600858 resource_size(b_res), min_align);
Ram Paic8adf9a2011-02-14 17:43:20 -0800859 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700860 if (b_res->start || b_res->end)
Ryan Desfosses227f0642014-04-18 20:13:50 -0400861 dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n",
862 b_res, &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700863 b_res->flags = 0;
864 return;
865 }
Yinghai Lufd591342012-07-09 19:55:29 -0600866
867 b_res->start = min_align;
Ram Paic8adf9a2011-02-14 17:43:20 -0800868 b_res->end = b_res->start + size0 - 1;
Ivan Kokshaysky88452562008-03-30 19:50:14 +0400869 b_res->flags |= IORESOURCE_STARTALIGN;
Yinghai Lub5924432012-01-21 02:08:31 -0800870 if (size1 > size0 && realloc_head) {
Yinghai Lufd591342012-07-09 19:55:29 -0600871 add_to_list(realloc_head, bus->self, b_res, size1-size0,
872 min_align);
Ryan Desfosses227f0642014-04-18 20:13:50 -0400873 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window %pR to %pR add_size %llx\n",
874 b_res, &bus->busn_res,
875 (unsigned long long)size1-size0);
Yinghai Lub5924432012-01-21 02:08:31 -0800876 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700877}
878
Gavin Shanc1215042012-09-11 16:59:46 -0600879static inline resource_size_t calculate_mem_align(resource_size_t *aligns,
880 int max_order)
881{
882 resource_size_t align = 0;
883 resource_size_t min_align = 0;
884 int order;
885
886 for (order = 0; order <= max_order; order++) {
887 resource_size_t align1 = 1;
888
889 align1 <<= (order + 20);
890
891 if (!align)
892 min_align = align1;
893 else if (ALIGN(align + min_align, min_align) < align1)
894 min_align = align1 >> 1;
895 align += aligns[order];
896 }
897
898 return min_align;
899}
900
Ram Paic8adf9a2011-02-14 17:43:20 -0800901/**
902 * pbus_size_mem() - size the memory window of a given bus
903 *
904 * @bus : the bus
Wei Yang496f70c2013-08-02 17:31:04 +0800905 * @mask: mask the resource flag, then compare it with type
906 * @type: the type of free resource from bridge
Yinghai Lu5b285412014-05-19 17:01:55 -0600907 * @type2: second match type
908 * @type3: third match type
Ram Paic8adf9a2011-02-14 17:43:20 -0800909 * @min_size : the minimum memory window that must to be allocated
910 * @add_size : additional optional memory window
Ram Pai9e8bf932011-07-25 13:08:42 -0700911 * @realloc_head : track the additional memory window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -0800912 *
913 * Calculate the size of the bus and minimal alignment which
914 * guarantees that all child resources fit in this size.
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -0600915 *
916 * Returns -ENOSPC if there's no available bus resource of the desired type.
917 * Otherwise, sets the bus resource start/end to indicate the required
918 * size, adds things to realloc_head (if supplied), and returns 0.
Ram Paic8adf9a2011-02-14 17:43:20 -0800919 */
Eric W. Biederman28760482009-09-09 14:09:24 -0700920static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
Yinghai Lu5b285412014-05-19 17:01:55 -0600921 unsigned long type, unsigned long type2,
922 unsigned long type3,
923 resource_size_t min_size, resource_size_t add_size,
924 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700925{
926 struct pci_dev *dev;
Ram Paic8adf9a2011-02-14 17:43:20 -0800927 resource_size_t min_align, align, size, size0, size1;
Yinghai Lu096d4222014-07-03 13:46:17 -0700928 resource_size_t aligns[18]; /* Alignments from 1Mb to 128Gb */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700929 int order, max_order;
Yinghai Lu5b285412014-05-19 17:01:55 -0600930 struct resource *b_res = find_free_bus_resource(bus,
931 mask | IORESOURCE_PREFETCH, type);
Yinghai Lube768912011-07-25 13:08:38 -0700932 resource_size_t children_add_size = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700933
934 if (!b_res)
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -0600935 return -ENOSPC;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700936
937 memset(aligns, 0, sizeof(aligns));
938 max_order = 0;
939 size = 0;
940
941 list_for_each_entry(dev, &bus->devices, bus_list) {
942 int i;
Yinghai Lu1f82de12009-04-23 20:48:32 -0700943
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
945 struct resource *r = &dev->resource[i];
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100946 resource_size_t r_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947
Yinghai Lu5b285412014-05-19 17:01:55 -0600948 if (r->parent || ((r->flags & mask) != type &&
949 (r->flags & mask) != type2 &&
950 (r->flags & mask) != type3))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +0800952 r_size = resource_size(r);
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700953#ifdef CONFIG_PCI_IOV
954 /* put SRIOV requested res to the optional list */
Ram Pai9e8bf932011-07-25 13:08:42 -0700955 if (realloc_head && i >= PCI_IOV_RESOURCES &&
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700956 i <= PCI_IOV_RESOURCE_END) {
957 r->end = r->start - 1;
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700958 add_to_list(realloc_head, dev, r, r_size, 0/* don't care */);
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700959 children_add_size += r_size;
960 continue;
961 }
962#endif
Alan14c85302014-05-19 14:03:14 +0100963 /*
964 * aligns[0] is for 1MB (since bridge memory
965 * windows are always at least 1MB aligned), so
966 * keep "order" from being negative for smaller
967 * resources.
968 */
Chris Wright6faf17f2009-08-28 13:00:06 -0700969 align = pci_resource_alignment(dev, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700970 order = __ffs(align) - 20;
Alan14c85302014-05-19 14:03:14 +0100971 if (order < 0)
972 order = 0;
973 if (order >= ARRAY_SIZE(aligns)) {
Ryan Desfosses227f0642014-04-18 20:13:50 -0400974 dev_warn(&dev->dev, "disabling BAR %d: %pR (bad alignment %#llx)\n",
975 i, r, (unsigned long long) align);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700976 r->flags = 0;
977 continue;
978 }
979 size += r_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700980 /* Exclude ranges with size > align from
981 calculation of the alignment. */
982 if (r_size == align)
983 aligns[order] += align;
984 if (order > max_order)
985 max_order = order;
Yinghai Lube768912011-07-25 13:08:38 -0700986
Ram Pai9e8bf932011-07-25 13:08:42 -0700987 if (realloc_head)
988 children_add_size += get_res_add_size(realloc_head, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700989 }
990 }
Jeremy Fitzhardinge8308c542008-09-11 01:31:50 -0700991
Gavin Shanc1215042012-09-11 16:59:46 -0600992 min_align = calculate_mem_align(aligns, max_order);
Wei Yang3ad94b02013-09-06 09:45:58 +0800993 min_align = max(min_align, window_alignment(bus, b_res->flags));
Linus Torvaldsb42282e2011-04-11 10:53:11 -0700994 size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align);
Yinghai Lube768912011-07-25 13:08:38 -0700995 if (children_add_size > add_size)
996 add_size = children_add_size;
Ram Pai9e8bf932011-07-25 13:08:42 -0700997 size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
Yinghai Lua4ac9fe2012-01-21 02:08:17 -0800998 calculate_memsize(size, min_size, add_size,
Linus Torvaldsb42282e2011-04-11 10:53:11 -0700999 resource_size(b_res), min_align);
Ram Paic8adf9a2011-02-14 17:43:20 -08001000 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -07001001 if (b_res->start || b_res->end)
Ryan Desfosses227f0642014-04-18 20:13:50 -04001002 dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n",
1003 b_res, &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001004 b_res->flags = 0;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001005 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001006 }
1007 b_res->start = min_align;
Ram Paic8adf9a2011-02-14 17:43:20 -08001008 b_res->end = size0 + min_align - 1;
Yinghai Lu5b285412014-05-19 17:01:55 -06001009 b_res->flags |= IORESOURCE_STARTALIGN;
Yinghai Lub5924432012-01-21 02:08:31 -08001010 if (size1 > size0 && realloc_head) {
Ram Pai9e8bf932011-07-25 13:08:42 -07001011 add_to_list(realloc_head, bus->self, b_res, size1-size0, min_align);
Ryan Desfosses227f0642014-04-18 20:13:50 -04001012 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window %pR to %pR add_size %llx\n",
1013 b_res, &bus->busn_res,
1014 (unsigned long long)size1-size0);
Yinghai Lub5924432012-01-21 02:08:31 -08001015 }
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001016 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001017}
1018
Ram Pai0a2daa12011-07-25 13:08:41 -07001019unsigned long pci_cardbus_resource_alignment(struct resource *res)
1020{
1021 if (res->flags & IORESOURCE_IO)
1022 return pci_cardbus_io_size;
1023 if (res->flags & IORESOURCE_MEM)
1024 return pci_cardbus_mem_size;
1025 return 0;
1026}
1027
1028static void pci_bus_size_cardbus(struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001029 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001030{
1031 struct pci_dev *bridge = bus->self;
1032 struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
Yinghai Lu11848932012-02-10 15:33:47 -08001033 resource_size_t b_res_3_size = pci_cardbus_mem_size * 2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001034 u16 ctrl;
1035
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001036 if (b_res[0].parent)
1037 goto handle_b_res_1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001038 /*
1039 * Reserve some resources for CardBus. We reserve
1040 * a fixed amount of bus space for CardBus bridges.
1041 */
Yinghai Lu11848932012-02-10 15:33:47 -08001042 b_res[0].start = pci_cardbus_io_size;
1043 b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1;
1044 b_res[0].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
1045 if (realloc_head) {
1046 b_res[0].end -= pci_cardbus_io_size;
1047 add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,
1048 pci_cardbus_io_size);
1049 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001050
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001051handle_b_res_1:
1052 if (b_res[1].parent)
1053 goto handle_b_res_2;
Yinghai Lu11848932012-02-10 15:33:47 -08001054 b_res[1].start = pci_cardbus_io_size;
1055 b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1;
1056 b_res[1].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
1057 if (realloc_head) {
1058 b_res[1].end -= pci_cardbus_io_size;
1059 add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size,
1060 pci_cardbus_io_size);
1061 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001062
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001063handle_b_res_2:
Yinghai Ludcef0d02012-02-10 15:33:46 -08001064 /* MEM1 must not be pref mmio */
1065 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1066 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {
1067 ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
1068 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
1069 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1070 }
1071
Linus Torvalds1da177e2005-04-16 15:20:36 -07001072 /*
1073 * Check whether prefetchable memory is supported
1074 * by this bridge.
1075 */
1076 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1077 if (!(ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)) {
1078 ctrl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
1079 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
1080 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1081 }
1082
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001083 if (b_res[2].parent)
1084 goto handle_b_res_3;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001085 /*
1086 * If we have prefetchable memory support, allocate
1087 * two regions. Otherwise, allocate one region of
1088 * twice the size.
1089 */
1090 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
Yinghai Lu11848932012-02-10 15:33:47 -08001091 b_res[2].start = pci_cardbus_mem_size;
1092 b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1;
1093 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH |
1094 IORESOURCE_STARTALIGN;
1095 if (realloc_head) {
1096 b_res[2].end -= pci_cardbus_mem_size;
1097 add_to_list(realloc_head, bridge, b_res+2,
1098 pci_cardbus_mem_size, pci_cardbus_mem_size);
1099 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001100
Yinghai Lu11848932012-02-10 15:33:47 -08001101 /* reduce that to half */
1102 b_res_3_size = pci_cardbus_mem_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001103 }
Ram Pai0a2daa12011-07-25 13:08:41 -07001104
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001105handle_b_res_3:
1106 if (b_res[3].parent)
1107 goto handle_done;
Yinghai Lu11848932012-02-10 15:33:47 -08001108 b_res[3].start = pci_cardbus_mem_size;
1109 b_res[3].end = b_res[3].start + b_res_3_size - 1;
1110 b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN;
1111 if (realloc_head) {
1112 b_res[3].end -= b_res_3_size;
1113 add_to_list(realloc_head, bridge, b_res+3, b_res_3_size,
1114 pci_cardbus_mem_size);
1115 }
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001116
1117handle_done:
1118 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001119}
1120
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001121void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001122{
1123 struct pci_dev *dev;
Yinghai Lu5b285412014-05-19 17:01:55 -06001124 unsigned long mask, prefmask, type2 = 0, type3 = 0;
Ram Paic8adf9a2011-02-14 17:43:20 -08001125 resource_size_t additional_mem_size = 0, additional_io_size = 0;
Yinghai Lu5b285412014-05-19 17:01:55 -06001126 struct resource *b_res;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001127 int ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001128
1129 list_for_each_entry(dev, &bus->devices, bus_list) {
1130 struct pci_bus *b = dev->subordinate;
1131 if (!b)
1132 continue;
1133
1134 switch (dev->class >> 8) {
1135 case PCI_CLASS_BRIDGE_CARDBUS:
Ram Pai9e8bf932011-07-25 13:08:42 -07001136 pci_bus_size_cardbus(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001137 break;
1138
1139 case PCI_CLASS_BRIDGE_PCI:
1140 default:
Ram Pai9e8bf932011-07-25 13:08:42 -07001141 __pci_bus_size_bridges(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001142 break;
1143 }
1144 }
1145
1146 /* The root bus? */
Wei Yang2ba29e22013-09-06 09:45:56 +08001147 if (pci_is_root_bus(bus))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001148 return;
1149
1150 switch (bus->self->class >> 8) {
1151 case PCI_CLASS_BRIDGE_CARDBUS:
1152 /* don't size cardbuses yet. */
1153 break;
1154
1155 case PCI_CLASS_BRIDGE_PCI:
1156 pci_bridge_check_ranges(bus);
Eric W. Biederman28760482009-09-09 14:09:24 -07001157 if (bus->self->is_hotplug_bridge) {
Ram Paic8adf9a2011-02-14 17:43:20 -08001158 additional_io_size = pci_hotplug_io_size;
1159 additional_mem_size = pci_hotplug_mem_size;
Eric W. Biederman28760482009-09-09 14:09:24 -07001160 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001161 /* Fall through */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001162 default:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001163 pbus_size_io(bus, realloc_head ? 0 : additional_io_size,
1164 additional_io_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001165
1166 /*
1167 * If there's a 64-bit prefetchable MMIO window, compute
1168 * the size required to put all 64-bit prefetchable
1169 * resources in it.
1170 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001171 b_res = &bus->self->resource[PCI_BRIDGE_RESOURCES];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001172 mask = IORESOURCE_MEM;
1173 prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH;
Yinghai Lu5b285412014-05-19 17:01:55 -06001174 if (b_res[2].flags & IORESOURCE_MEM_64) {
1175 prefmask |= IORESOURCE_MEM_64;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001176 ret = pbus_size_mem(bus, prefmask, prefmask,
Yinghai Lu5b285412014-05-19 17:01:55 -06001177 prefmask, prefmask,
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001178 realloc_head ? 0 : additional_mem_size,
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001179 additional_mem_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001180
1181 /*
1182 * If successful, all non-prefetchable resources
1183 * and any 32-bit prefetchable resources will go in
1184 * the non-prefetchable window.
1185 */
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001186 if (ret == 0) {
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001187 mask = prefmask;
1188 type2 = prefmask & ~IORESOURCE_MEM_64;
1189 type3 = prefmask & ~IORESOURCE_PREFETCH;
Yinghai Lu5b285412014-05-19 17:01:55 -06001190 }
1191 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001192
1193 /*
1194 * If there is no 64-bit prefetchable window, compute the
1195 * size required to put all prefetchable resources in the
1196 * 32-bit prefetchable window (if there is one).
1197 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001198 if (!type2) {
1199 prefmask &= ~IORESOURCE_MEM_64;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001200 ret = pbus_size_mem(bus, prefmask, prefmask,
Yinghai Lu5b285412014-05-19 17:01:55 -06001201 prefmask, prefmask,
1202 realloc_head ? 0 : additional_mem_size,
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001203 additional_mem_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001204
1205 /*
1206 * If successful, only non-prefetchable resources
1207 * will go in the non-prefetchable window.
1208 */
1209 if (ret == 0)
Yinghai Lu5b285412014-05-19 17:01:55 -06001210 mask = prefmask;
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001211 else
Yinghai Lu5b285412014-05-19 17:01:55 -06001212 additional_mem_size += additional_mem_size;
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001213
Yinghai Lu5b285412014-05-19 17:01:55 -06001214 type2 = type3 = IORESOURCE_MEM;
1215 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001216
1217 /*
1218 * Compute the size required to put everything else in the
1219 * non-prefetchable window. This includes:
1220 *
1221 * - all non-prefetchable resources
1222 * - 32-bit prefetchable resources if there's a 64-bit
1223 * prefetchable window or no prefetchable window at all
1224 * - 64-bit prefetchable resources if there's no
1225 * prefetchable window at all
1226 *
1227 * Note that the strategy in __pci_assign_resource() must
1228 * match that used here. Specifically, we cannot put a
1229 * 32-bit prefetchable resource in a 64-bit prefetchable
1230 * window.
1231 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001232 pbus_size_mem(bus, mask, IORESOURCE_MEM, type2, type3,
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001233 realloc_head ? 0 : additional_mem_size,
1234 additional_mem_size, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001235 break;
1236 }
1237}
Ram Paic8adf9a2011-02-14 17:43:20 -08001238
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001239void pci_bus_size_bridges(struct pci_bus *bus)
Ram Paic8adf9a2011-02-14 17:43:20 -08001240{
1241 __pci_bus_size_bridges(bus, NULL);
1242}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001243EXPORT_SYMBOL(pci_bus_size_bridges);
1244
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001245void __pci_bus_assign_resources(const struct pci_bus *bus,
1246 struct list_head *realloc_head,
1247 struct list_head *fail_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001248{
1249 struct pci_bus *b;
1250 struct pci_dev *dev;
1251
Ram Pai9e8bf932011-07-25 13:08:42 -07001252 pbus_assign_resources_sorted(bus, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001253
Linus Torvalds1da177e2005-04-16 15:20:36 -07001254 list_for_each_entry(dev, &bus->devices, bus_list) {
1255 b = dev->subordinate;
1256 if (!b)
1257 continue;
1258
Ram Pai9e8bf932011-07-25 13:08:42 -07001259 __pci_bus_assign_resources(b, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001260
1261 switch (dev->class >> 8) {
1262 case PCI_CLASS_BRIDGE_PCI:
Yinghai Lu6841ec62010-01-22 01:02:25 -08001263 if (!pci_is_enabled(dev))
1264 pci_setup_bridge(b);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001265 break;
1266
1267 case PCI_CLASS_BRIDGE_CARDBUS:
1268 pci_setup_cardbus(b);
1269 break;
1270
1271 default:
Ryan Desfosses227f0642014-04-18 20:13:50 -04001272 dev_info(&dev->dev, "not setting up bridge for bus %04x:%02x\n",
1273 pci_domain_nr(b), b->number);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001274 break;
1275 }
1276 }
1277}
Yinghai Lu568ddef2010-01-22 01:02:21 -08001278
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001279void pci_bus_assign_resources(const struct pci_bus *bus)
Yinghai Lu568ddef2010-01-22 01:02:21 -08001280{
Ram Paic8adf9a2011-02-14 17:43:20 -08001281 __pci_bus_assign_resources(bus, NULL, NULL);
Yinghai Lu568ddef2010-01-22 01:02:21 -08001282}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001283EXPORT_SYMBOL(pci_bus_assign_resources);
1284
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001285static void __pci_bridge_assign_resources(const struct pci_dev *bridge,
1286 struct list_head *add_head,
1287 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -08001288{
1289 struct pci_bus *b;
1290
Yinghai Lu8424d752012-01-21 02:08:21 -08001291 pdev_assign_resources_sorted((struct pci_dev *)bridge,
1292 add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001293
1294 b = bridge->subordinate;
1295 if (!b)
1296 return;
1297
Yinghai Lu8424d752012-01-21 02:08:21 -08001298 __pci_bus_assign_resources(b, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001299
1300 switch (bridge->class >> 8) {
1301 case PCI_CLASS_BRIDGE_PCI:
1302 pci_setup_bridge(b);
1303 break;
1304
1305 case PCI_CLASS_BRIDGE_CARDBUS:
1306 pci_setup_cardbus(b);
1307 break;
1308
1309 default:
Ryan Desfosses227f0642014-04-18 20:13:50 -04001310 dev_info(&bridge->dev, "not setting up bridge for bus %04x:%02x\n",
1311 pci_domain_nr(b), b->number);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001312 break;
1313 }
1314}
Yinghai Lu5009b462010-01-22 01:02:20 -08001315static void pci_bridge_release_resources(struct pci_bus *bus,
1316 unsigned long type)
1317{
Yinghai Lu5b285412014-05-19 17:01:55 -06001318 struct pci_dev *dev = bus->self;
Yinghai Lu5009b462010-01-22 01:02:20 -08001319 struct resource *r;
1320 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
Yinghai Lu5b285412014-05-19 17:01:55 -06001321 IORESOURCE_PREFETCH | IORESOURCE_MEM_64;
1322 unsigned old_flags = 0;
1323 struct resource *b_res;
1324 int idx = 1;
Yinghai Lu5009b462010-01-22 01:02:20 -08001325
Yinghai Lu5b285412014-05-19 17:01:55 -06001326 b_res = &dev->resource[PCI_BRIDGE_RESOURCES];
Yinghai Lu5009b462010-01-22 01:02:20 -08001327
Yinghai Lu5b285412014-05-19 17:01:55 -06001328 /*
1329 * 1. if there is io port assign fail, will release bridge
1330 * io port.
1331 * 2. if there is non pref mmio assign fail, release bridge
1332 * nonpref mmio.
1333 * 3. if there is 64bit pref mmio assign fail, and bridge pref
1334 * is 64bit, release bridge pref mmio.
1335 * 4. if there is pref mmio assign fail, and bridge pref is
1336 * 32bit mmio, release bridge pref mmio
1337 * 5. if there is pref mmio assign fail, and bridge pref is not
1338 * assigned, release bridge nonpref mmio.
1339 */
1340 if (type & IORESOURCE_IO)
1341 idx = 0;
1342 else if (!(type & IORESOURCE_PREFETCH))
1343 idx = 1;
1344 else if ((type & IORESOURCE_MEM_64) &&
1345 (b_res[2].flags & IORESOURCE_MEM_64))
1346 idx = 2;
1347 else if (!(b_res[2].flags & IORESOURCE_MEM_64) &&
1348 (b_res[2].flags & IORESOURCE_PREFETCH))
1349 idx = 2;
1350 else
1351 idx = 1;
1352
1353 r = &b_res[idx];
1354
1355 if (!r->parent)
1356 return;
1357
1358 /*
1359 * if there are children under that, we should release them
1360 * all
1361 */
1362 release_child_resources(r);
1363 if (!release_resource(r)) {
1364 type = old_flags = r->flags & type_mask;
1365 dev_printk(KERN_DEBUG, &dev->dev, "resource %d %pR released\n",
1366 PCI_BRIDGE_RESOURCES + idx, r);
1367 /* keep the old size */
1368 r->end = resource_size(r) - 1;
1369 r->start = 0;
1370 r->flags = 0;
1371
Yinghai Lu5009b462010-01-22 01:02:20 -08001372 /* avoiding touch the one without PREF */
1373 if (type & IORESOURCE_PREFETCH)
1374 type = IORESOURCE_PREFETCH;
1375 __pci_setup_bridge(bus, type);
Yinghai Lu5b285412014-05-19 17:01:55 -06001376 /* for next child res under same bridge */
1377 r->flags = old_flags;
Yinghai Lu5009b462010-01-22 01:02:20 -08001378 }
1379}
1380
1381enum release_type {
1382 leaf_only,
1383 whole_subtree,
1384};
1385/*
1386 * try to release pci bridge resources that is from leaf bridge,
1387 * so we can allocate big new one later
1388 */
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001389static void pci_bus_release_bridge_resources(struct pci_bus *bus,
1390 unsigned long type,
1391 enum release_type rel_type)
Yinghai Lu5009b462010-01-22 01:02:20 -08001392{
1393 struct pci_dev *dev;
1394 bool is_leaf_bridge = true;
1395
1396 list_for_each_entry(dev, &bus->devices, bus_list) {
1397 struct pci_bus *b = dev->subordinate;
1398 if (!b)
1399 continue;
1400
1401 is_leaf_bridge = false;
1402
1403 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1404 continue;
1405
1406 if (rel_type == whole_subtree)
1407 pci_bus_release_bridge_resources(b, type,
1408 whole_subtree);
1409 }
1410
1411 if (pci_is_root_bus(bus))
1412 return;
1413
1414 if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1415 return;
1416
1417 if ((rel_type == whole_subtree) || is_leaf_bridge)
1418 pci_bridge_release_resources(bus, type);
1419}
1420
Yinghai Lu76fbc262008-06-23 20:33:06 +02001421static void pci_bus_dump_res(struct pci_bus *bus)
1422{
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001423 struct resource *res;
1424 int i;
Yinghai Lu76fbc262008-06-23 20:33:06 +02001425
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001426 pci_bus_for_each_resource(bus, res, i) {
Yinghai Lu7c9342b2009-12-22 15:02:24 -08001427 if (!res || !res->end || !res->flags)
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001428 continue;
Yinghai Lu76fbc262008-06-23 20:33:06 +02001429
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -06001430 dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res);
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001431 }
Yinghai Lu76fbc262008-06-23 20:33:06 +02001432}
1433
1434static void pci_bus_dump_resources(struct pci_bus *bus)
1435{
1436 struct pci_bus *b;
1437 struct pci_dev *dev;
1438
1439
1440 pci_bus_dump_res(bus);
1441
1442 list_for_each_entry(dev, &bus->devices, bus_list) {
1443 b = dev->subordinate;
1444 if (!b)
1445 continue;
1446
1447 pci_bus_dump_resources(b);
1448 }
1449}
1450
Yinghai Luff351472013-07-24 15:37:13 -06001451static int pci_bus_get_depth(struct pci_bus *bus)
Yinghai Luda7822e2011-05-12 17:11:37 -07001452{
1453 int depth = 0;
Wei Yangf2a230b2013-08-02 17:31:03 +08001454 struct pci_bus *child_bus;
Yinghai Luda7822e2011-05-12 17:11:37 -07001455
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001456 list_for_each_entry(child_bus, &bus->children, node) {
Yinghai Luda7822e2011-05-12 17:11:37 -07001457 int ret;
Yinghai Luda7822e2011-05-12 17:11:37 -07001458
Wei Yangf2a230b2013-08-02 17:31:03 +08001459 ret = pci_bus_get_depth(child_bus);
Yinghai Luda7822e2011-05-12 17:11:37 -07001460 if (ret + 1 > depth)
1461 depth = ret + 1;
1462 }
1463
1464 return depth;
1465}
Yinghai Luda7822e2011-05-12 17:11:37 -07001466
Yinghai Lub55438f2012-02-23 19:23:30 -08001467/*
1468 * -1: undefined, will auto detect later
1469 * 0: disabled by user
1470 * 1: disabled by auto detect
1471 * 2: enabled by user
1472 * 3: enabled by auto detect
1473 */
1474enum enable_type {
1475 undefined = -1,
1476 user_disabled,
1477 auto_disabled,
1478 user_enabled,
1479 auto_enabled,
1480};
1481
Yinghai Luff351472013-07-24 15:37:13 -06001482static enum enable_type pci_realloc_enable = undefined;
Yinghai Lub55438f2012-02-23 19:23:30 -08001483void __init pci_realloc_get_opt(char *str)
1484{
1485 if (!strncmp(str, "off", 3))
1486 pci_realloc_enable = user_disabled;
1487 else if (!strncmp(str, "on", 2))
1488 pci_realloc_enable = user_enabled;
1489}
Yinghai Luff351472013-07-24 15:37:13 -06001490static bool pci_realloc_enabled(enum enable_type enable)
Yinghai Lub55438f2012-02-23 19:23:30 -08001491{
Yinghai Lu967260c2013-07-22 14:37:15 -07001492 return enable >= user_enabled;
Yinghai Lub55438f2012-02-23 19:23:30 -08001493}
Ram Paif483d392011-07-07 11:19:10 -07001494
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001495#if defined(CONFIG_PCI_IOV) && defined(CONFIG_PCI_REALLOC_ENABLE_AUTO)
Yinghai Luff351472013-07-24 15:37:13 -06001496static int iov_resources_unassigned(struct pci_dev *dev, void *data)
Yinghai Lu223d96f2013-07-22 14:37:13 -07001497{
1498 int i;
1499 bool *unassigned = data;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001500
Yinghai Lu223d96f2013-07-22 14:37:13 -07001501 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) {
1502 struct resource *r = &dev->resource[i];
Yinghai Lufa216bf2013-07-22 14:37:14 -07001503 struct pci_bus_region region;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001504
Yinghai Lu223d96f2013-07-22 14:37:13 -07001505 /* Not assigned or rejected by kernel? */
Yinghai Lufa216bf2013-07-22 14:37:14 -07001506 if (!r->flags)
1507 continue;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001508
Yinghai Lufc279852013-12-09 22:54:40 -08001509 pcibios_resource_to_bus(dev->bus, &region, r);
Yinghai Lufa216bf2013-07-22 14:37:14 -07001510 if (!region.start) {
Yinghai Lu223d96f2013-07-22 14:37:13 -07001511 *unassigned = true;
1512 return 1; /* return early from pci_walk_bus() */
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001513 }
1514 }
Yinghai Lu223d96f2013-07-22 14:37:13 -07001515
1516 return 0;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001517}
1518
Yinghai Luff351472013-07-24 15:37:13 -06001519static enum enable_type pci_realloc_detect(struct pci_bus *bus,
Yinghai Lu967260c2013-07-22 14:37:15 -07001520 enum enable_type enable_local)
Yinghai Lu223d96f2013-07-22 14:37:13 -07001521{
1522 bool unassigned = false;
Yinghai Luda7822e2011-05-12 17:11:37 -07001523
Yinghai Lu967260c2013-07-22 14:37:15 -07001524 if (enable_local != undefined)
1525 return enable_local;
Yinghai Luda7822e2011-05-12 17:11:37 -07001526
Yinghai Lu967260c2013-07-22 14:37:15 -07001527 pci_walk_bus(bus, iov_resources_unassigned, &unassigned);
1528 if (unassigned)
1529 return auto_enabled;
1530
1531 return enable_local;
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001532}
Yinghai Lu223d96f2013-07-22 14:37:13 -07001533#else
Yinghai Luff351472013-07-24 15:37:13 -06001534static enum enable_type pci_realloc_detect(struct pci_bus *bus,
Yinghai Lu967260c2013-07-22 14:37:15 -07001535 enum enable_type enable_local)
1536{
1537 return enable_local;
1538}
Yinghai Lu223d96f2013-07-22 14:37:13 -07001539#endif
Yinghai Luda7822e2011-05-12 17:11:37 -07001540
1541/*
1542 * first try will not touch pci bridge res
Bjorn Helgaasf7625982013-11-14 11:28:18 -07001543 * second and later try will clear small leaf bridge res
1544 * will stop till to the max depth if can not find good one
Linus Torvalds1da177e2005-04-16 15:20:36 -07001545 */
Yinghai Lu39772032013-07-22 14:37:18 -07001546void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001547{
Ram Paic8adf9a2011-02-14 17:43:20 -08001548 LIST_HEAD(realloc_head); /* list of resources that
Yinghai Luda7822e2011-05-12 17:11:37 -07001549 want additional resources */
1550 struct list_head *add_list = NULL;
1551 int tried_times = 0;
1552 enum release_type rel_type = leaf_only;
1553 LIST_HEAD(fail_head);
1554 struct pci_dev_resource *fail_res;
1555 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
Yinghai Lu5b285412014-05-19 17:01:55 -06001556 IORESOURCE_PREFETCH | IORESOURCE_MEM_64;
Yinghai Luda7822e2011-05-12 17:11:37 -07001557 int pci_try_num = 1;
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001558 enum enable_type enable_local;
Yinghai Luda7822e2011-05-12 17:11:37 -07001559
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001560 /* don't realloc if asked to do so */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001561 enable_local = pci_realloc_detect(bus, pci_realloc_enable);
Yinghai Lu967260c2013-07-22 14:37:15 -07001562 if (pci_realloc_enabled(enable_local)) {
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001563 int max_depth = pci_bus_get_depth(bus);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001564
1565 pci_try_num = max_depth + 1;
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001566 dev_printk(KERN_DEBUG, &bus->dev,
1567 "max bus depth: %d pci_try_num: %d\n",
1568 max_depth, pci_try_num);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001569 }
Yinghai Luda7822e2011-05-12 17:11:37 -07001570
1571again:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001572 /*
1573 * last try will use add_list, otherwise will try good to have as
1574 * must have, so can realloc parent bridge resource
1575 */
1576 if (tried_times + 1 == pci_try_num)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001577 add_list = &realloc_head;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001578 /* Depth first, calculate sizes and alignments of all
1579 subordinate buses. */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001580 __pci_bus_size_bridges(bus, add_list);
Ram Paic8adf9a2011-02-14 17:43:20 -08001581
Linus Torvalds1da177e2005-04-16 15:20:36 -07001582 /* Depth last, allocate resources and update the hardware. */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001583 __pci_bus_assign_resources(bus, add_list, &fail_head);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001584 if (add_list)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001585 BUG_ON(!list_empty(add_list));
Yinghai Luda7822e2011-05-12 17:11:37 -07001586 tried_times++;
1587
1588 /* any device complain? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001589 if (list_empty(&fail_head))
Yinghai Lu928bea92013-07-22 14:37:17 -07001590 goto dump;
Ram Paif483d392011-07-07 11:19:10 -07001591
Yinghai Lu0c5be0c2012-02-23 19:23:29 -08001592 if (tried_times >= pci_try_num) {
Yinghai Lu967260c2013-07-22 14:37:15 -07001593 if (enable_local == undefined)
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001594 dev_info(&bus->dev, "Some PCI device resources are unassigned, try booting with pci=realloc\n");
Yinghai Lu967260c2013-07-22 14:37:15 -07001595 else if (enable_local == auto_enabled)
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001596 dev_info(&bus->dev, "Automatically enabled pci realloc, if you have problem, try booting with pci=realloc=off\n");
Yinghai Lueb572e72012-02-23 19:23:31 -08001597
Yinghai Lubffc56d2012-01-21 02:08:30 -08001598 free_list(&fail_head);
Yinghai Lu928bea92013-07-22 14:37:17 -07001599 goto dump;
Yinghai Luda7822e2011-05-12 17:11:37 -07001600 }
1601
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001602 dev_printk(KERN_DEBUG, &bus->dev,
1603 "No. %d try to assign unassigned res\n", tried_times + 1);
Yinghai Luda7822e2011-05-12 17:11:37 -07001604
1605 /* third times and later will not check if it is leaf */
1606 if ((tried_times + 1) > 2)
1607 rel_type = whole_subtree;
1608
1609 /*
1610 * Try to release leaf bridge's resources that doesn't fit resource of
1611 * child device under that bridge
1612 */
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001613 list_for_each_entry(fail_res, &fail_head, list)
1614 pci_bus_release_bridge_resources(fail_res->dev->bus,
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001615 fail_res->flags & type_mask,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001616 rel_type);
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001617
Yinghai Luda7822e2011-05-12 17:11:37 -07001618 /* restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001619 list_for_each_entry(fail_res, &fail_head, list) {
1620 struct resource *res = fail_res->res;
Yinghai Luda7822e2011-05-12 17:11:37 -07001621
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001622 res->start = fail_res->start;
1623 res->end = fail_res->end;
1624 res->flags = fail_res->flags;
1625 if (fail_res->dev->subordinate)
Yinghai Luda7822e2011-05-12 17:11:37 -07001626 res->flags = 0;
Yinghai Luda7822e2011-05-12 17:11:37 -07001627 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08001628 free_list(&fail_head);
Yinghai Luda7822e2011-05-12 17:11:37 -07001629
1630 goto again;
1631
Yinghai Lu928bea92013-07-22 14:37:17 -07001632dump:
Yinghai Lu76fbc262008-06-23 20:33:06 +02001633 /* dump the resource on buses */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001634 pci_bus_dump_resources(bus);
1635}
1636
1637void __init pci_assign_unassigned_resources(void)
1638{
1639 struct pci_bus *root_bus;
1640
1641 list_for_each_entry(root_bus, &pci_root_buses, node)
1642 pci_assign_unassigned_root_bus_resources(root_bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001643}
Yinghai Lu6841ec62010-01-22 01:02:25 -08001644
1645void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
1646{
1647 struct pci_bus *parent = bridge->subordinate;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001648 LIST_HEAD(add_list); /* list of resources that
Yinghai Lu8424d752012-01-21 02:08:21 -08001649 want additional resources */
Yinghai Lu32180e42010-01-22 01:02:27 -08001650 int tried_times = 0;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001651 LIST_HEAD(fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001652 struct pci_dev_resource *fail_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -08001653 int retval;
Yinghai Lu32180e42010-01-22 01:02:27 -08001654 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
Yinghai Lud61b0e82014-08-22 18:15:07 -07001655 IORESOURCE_PREFETCH | IORESOURCE_MEM_64;
Yinghai Lu6841ec62010-01-22 01:02:25 -08001656
Yinghai Lu32180e42010-01-22 01:02:27 -08001657again:
Yinghai Lu8424d752012-01-21 02:08:21 -08001658 __pci_bus_size_bridges(parent, &add_list);
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001659 __pci_bridge_assign_resources(bridge, &add_list, &fail_head);
1660 BUG_ON(!list_empty(&add_list));
Yinghai Lu32180e42010-01-22 01:02:27 -08001661 tried_times++;
1662
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001663 if (list_empty(&fail_head))
Yinghai Lu3f579c32010-05-21 14:35:06 -07001664 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08001665
1666 if (tried_times >= 2) {
1667 /* still fail, don't need to try more */
Yinghai Lubffc56d2012-01-21 02:08:30 -08001668 free_list(&fail_head);
Yinghai Lu3f579c32010-05-21 14:35:06 -07001669 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08001670 }
1671
1672 printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n",
1673 tried_times + 1);
1674
1675 /*
1676 * Try to release leaf bridge's resources that doesn't fit resource of
1677 * child device under that bridge
1678 */
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001679 list_for_each_entry(fail_res, &fail_head, list)
1680 pci_bus_release_bridge_resources(fail_res->dev->bus,
1681 fail_res->flags & type_mask,
Yinghai Lu32180e42010-01-22 01:02:27 -08001682 whole_subtree);
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001683
Yinghai Lu32180e42010-01-22 01:02:27 -08001684 /* restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001685 list_for_each_entry(fail_res, &fail_head, list) {
1686 struct resource *res = fail_res->res;
Yinghai Lu32180e42010-01-22 01:02:27 -08001687
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001688 res->start = fail_res->start;
1689 res->end = fail_res->end;
1690 res->flags = fail_res->flags;
1691 if (fail_res->dev->subordinate)
Yinghai Lu32180e42010-01-22 01:02:27 -08001692 res->flags = 0;
Yinghai Lu32180e42010-01-22 01:02:27 -08001693 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08001694 free_list(&fail_head);
Yinghai Lu32180e42010-01-22 01:02:27 -08001695
1696 goto again;
Yinghai Lu3f579c32010-05-21 14:35:06 -07001697
1698enable_all:
1699 retval = pci_reenable_device(bridge);
Bjorn Helgaas9fc9eea2013-04-12 11:35:40 -06001700 if (retval)
1701 dev_err(&bridge->dev, "Error reenabling bridge (%d)\n", retval);
Yinghai Lu3f579c32010-05-21 14:35:06 -07001702 pci_set_master(bridge);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001703}
1704EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);
Yinghai Lu9b030882012-01-21 02:08:23 -08001705
Yinghai Lu17787942012-10-30 14:31:10 -06001706void pci_assign_unassigned_bus_resources(struct pci_bus *bus)
Yinghai Lu9b030882012-01-21 02:08:23 -08001707{
Yinghai Lu9b030882012-01-21 02:08:23 -08001708 struct pci_dev *dev;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001709 LIST_HEAD(add_list); /* list of resources that
Yinghai Lu9b030882012-01-21 02:08:23 -08001710 want additional resources */
1711
Yinghai Lu9b030882012-01-21 02:08:23 -08001712 down_read(&pci_bus_sem);
1713 list_for_each_entry(dev, &bus->devices, bus_list)
Yijing Wang6788a512014-05-04 12:23:38 +08001714 if (pci_is_bridge(dev) && pci_has_subordinate(dev))
Yinghai Lu9b030882012-01-21 02:08:23 -08001715 __pci_bus_size_bridges(dev->subordinate,
1716 &add_list);
1717 up_read(&pci_bus_sem);
1718 __pci_bus_assign_resources(bus, &add_list, NULL);
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001719 BUG_ON(!list_empty(&add_list));
Yinghai Lu17787942012-10-30 14:31:10 -06001720}