Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1 | /* |
Dhaval Patel | 14d46ce | 2017-01-17 16:28:12 -0800 | [diff] [blame] | 2 | * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 3 | * Copyright (C) 2013 Red Hat |
| 4 | * Author: Rob Clark <robdclark@gmail.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published by |
| 8 | * the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | * more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License along with |
| 16 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 17 | */ |
Lloyd Atkinson | f76121a | 2017-01-30 17:30:55 -0500 | [diff] [blame] | 18 | /* |
| 19 | * Copyright (c) 2016 Intel Corporation |
| 20 | * |
| 21 | * Permission to use, copy, modify, distribute, and sell this software and its |
| 22 | * documentation for any purpose is hereby granted without fee, provided that |
| 23 | * the above copyright notice appear in all copies and that both that copyright |
| 24 | * notice and this permission notice appear in supporting documentation, and |
| 25 | * that the name of the copyright holders not be used in advertising or |
| 26 | * publicity pertaining to distribution of the software without specific, |
| 27 | * written prior permission. The copyright holders make no representations |
| 28 | * about the suitability of this software for any purpose. It is provided "as |
| 29 | * is" without express or implied warranty. |
| 30 | * |
| 31 | * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, |
| 32 | * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO |
| 33 | * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR |
| 34 | * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, |
| 35 | * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 36 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE |
| 37 | * OF THIS SOFTWARE. |
| 38 | */ |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 39 | |
Dhaval Patel | 3949f03 | 2016-06-20 16:24:33 -0700 | [diff] [blame] | 40 | #include <linux/of_address.h> |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 41 | #include <linux/kthread.h> |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 42 | #include "msm_drv.h" |
Rob Clark | edcd60c | 2016-03-16 12:56:12 -0400 | [diff] [blame] | 43 | #include "msm_debugfs.h" |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 44 | #include "msm_fence.h" |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 45 | #include "msm_gpu.h" |
Rob Clark | dd2da6e | 2013-11-30 16:12:10 -0500 | [diff] [blame] | 46 | #include "msm_kms.h" |
Alan Kwong | bb27c09 | 2016-07-20 16:41:25 -0400 | [diff] [blame] | 47 | #include "sde_wb.h" |
Shashank Babu Chinta Venkata | ded9c56 | 2017-03-15 14:43:46 -0700 | [diff] [blame] | 48 | #include "dsi_display.h" |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 49 | |
Rob Clark | a8d854c | 2016-06-01 14:02:02 -0400 | [diff] [blame] | 50 | /* |
| 51 | * MSM driver version: |
| 52 | * - 1.0.0 - initial interface |
| 53 | * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers |
Rob Clark | 7a3bcc0 | 2016-09-16 18:37:44 -0400 | [diff] [blame] | 54 | * - 1.2.0 - adds explicit fence support for submit ioctl |
Rob Clark | a8d854c | 2016-06-01 14:02:02 -0400 | [diff] [blame] | 55 | */ |
| 56 | #define MSM_VERSION_MAJOR 1 |
Rob Clark | 7a3bcc0 | 2016-09-16 18:37:44 -0400 | [diff] [blame] | 57 | #define MSM_VERSION_MINOR 2 |
Rob Clark | a8d854c | 2016-06-01 14:02:02 -0400 | [diff] [blame] | 58 | #define MSM_VERSION_PATCHLEVEL 0 |
| 59 | |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 60 | #define TEARDOWN_DEADLOCK_RETRY_MAX 5 |
| 61 | |
Tatenda Chipeperekwa | 6a2a5ce | 2017-06-01 16:35:59 -0700 | [diff] [blame] | 62 | static void msm_drm_helper_hotplug_event(struct drm_device *dev) |
| 63 | { |
| 64 | struct drm_connector *connector; |
| 65 | char *event_string; |
| 66 | char const *connector_name; |
| 67 | char *envp[2]; |
| 68 | |
| 69 | if (!dev) { |
| 70 | DRM_ERROR("hotplug_event failed, invalid input\n"); |
| 71 | return; |
| 72 | } |
| 73 | |
| 74 | if (!dev->mode_config.poll_enabled) |
| 75 | return; |
| 76 | |
| 77 | event_string = kzalloc(SZ_4K, GFP_KERNEL); |
| 78 | if (!event_string) { |
| 79 | DRM_ERROR("failed to allocate event string\n"); |
| 80 | return; |
| 81 | } |
| 82 | |
| 83 | mutex_lock(&dev->mode_config.mutex); |
| 84 | drm_for_each_connector(connector, dev) { |
| 85 | /* Only handle HPD capable connectors. */ |
| 86 | if (!(connector->polled & DRM_CONNECTOR_POLL_HPD)) |
| 87 | continue; |
| 88 | |
| 89 | connector->status = connector->funcs->detect(connector, false); |
| 90 | |
| 91 | if (connector->name) |
| 92 | connector_name = connector->name; |
| 93 | else |
| 94 | connector_name = "unknown"; |
| 95 | |
| 96 | snprintf(event_string, SZ_4K, "name=%s status=%s\n", |
| 97 | connector_name, |
| 98 | drm_get_connector_status_name(connector->status)); |
| 99 | DRM_DEBUG("generating hotplug event [%s]\n", event_string); |
| 100 | envp[0] = event_string; |
| 101 | envp[1] = NULL; |
| 102 | kobject_uevent_env(&dev->primary->kdev->kobj, KOBJ_CHANGE, |
| 103 | envp); |
| 104 | } |
| 105 | mutex_unlock(&dev->mode_config.mutex); |
| 106 | kfree(event_string); |
| 107 | } |
| 108 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 109 | static void msm_fb_output_poll_changed(struct drm_device *dev) |
| 110 | { |
Tatenda Chipeperekwa | 6a2a5ce | 2017-06-01 16:35:59 -0700 | [diff] [blame] | 111 | struct msm_drm_private *priv = NULL; |
| 112 | |
| 113 | if (!dev) { |
| 114 | DRM_ERROR("output_poll_changed failed, invalid input\n"); |
| 115 | return; |
| 116 | } |
| 117 | |
| 118 | priv = dev->dev_private; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 119 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 120 | if (priv->fbdev) |
| 121 | drm_fb_helper_hotplug_event(priv->fbdev); |
Tatenda Chipeperekwa | 6a2a5ce | 2017-06-01 16:35:59 -0700 | [diff] [blame] | 122 | else |
| 123 | msm_drm_helper_hotplug_event(dev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 124 | } |
| 125 | |
Clarence Ip | a65cba5 | 2017-03-17 15:18:29 -0400 | [diff] [blame] | 126 | int msm_atomic_check(struct drm_device *dev, |
| 127 | struct drm_atomic_state *state) |
| 128 | { |
| 129 | if (msm_is_suspend_blocked(dev)) { |
| 130 | DRM_DEBUG("rejecting commit during suspend\n"); |
| 131 | return -EBUSY; |
| 132 | } |
| 133 | return drm_atomic_helper_check(dev, state); |
| 134 | } |
| 135 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 136 | static const struct drm_mode_config_funcs mode_config_funcs = { |
| 137 | .fb_create = msm_framebuffer_create, |
| 138 | .output_poll_changed = msm_fb_output_poll_changed, |
Clarence Ip | a65cba5 | 2017-03-17 15:18:29 -0400 | [diff] [blame] | 139 | .atomic_check = msm_atomic_check, |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 140 | .atomic_commit = msm_atomic_commit, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 141 | }; |
| 142 | |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 143 | int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 144 | { |
| 145 | struct msm_drm_private *priv = dev->dev_private; |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 146 | int idx = priv->num_mmus++; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 147 | |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 148 | if (WARN_ON(idx >= ARRAY_SIZE(priv->mmus))) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 149 | return -EINVAL; |
| 150 | |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 151 | priv->mmus[idx] = mmu; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 152 | |
| 153 | return idx; |
| 154 | } |
| 155 | |
Lloyd Atkinson | 1e2497e | 2016-09-26 17:55:48 -0400 | [diff] [blame] | 156 | void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu) |
| 157 | { |
| 158 | struct msm_drm_private *priv = dev->dev_private; |
| 159 | int idx; |
| 160 | |
| 161 | if (priv->num_mmus <= 0) { |
| 162 | dev_err(dev->dev, "invalid num mmus %d\n", priv->num_mmus); |
| 163 | return; |
| 164 | } |
| 165 | |
| 166 | idx = priv->num_mmus - 1; |
| 167 | |
| 168 | /* only support reverse-order deallocation */ |
| 169 | if (priv->mmus[idx] != mmu) { |
| 170 | dev_err(dev->dev, "unexpected mmu at idx %d\n", idx); |
| 171 | return; |
| 172 | } |
| 173 | |
| 174 | --priv->num_mmus; |
| 175 | priv->mmus[idx] = 0; |
| 176 | } |
| 177 | |
| 178 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 179 | #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING |
| 180 | static bool reglog = false; |
| 181 | MODULE_PARM_DESC(reglog, "Enable register read/write logging"); |
| 182 | module_param(reglog, bool, 0600); |
| 183 | #else |
| 184 | #define reglog 0 |
| 185 | #endif |
| 186 | |
Archit Taneja | a9ee34b | 2015-07-13 12:12:07 +0530 | [diff] [blame] | 187 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Rob Clark | e90dfec | 2015-01-30 17:05:41 -0500 | [diff] [blame] | 188 | static bool fbdev = true; |
| 189 | MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer"); |
| 190 | module_param(fbdev, bool, 0600); |
| 191 | #endif |
| 192 | |
Rob Clark | 3a10ba8 | 2014-09-08 14:24:57 -0400 | [diff] [blame] | 193 | static char *vram = "16m"; |
Rob Clark | 4313c74 | 2016-02-03 14:02:04 -0500 | [diff] [blame] | 194 | MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)"); |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 195 | module_param(vram, charp, 0); |
| 196 | |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 197 | /* |
| 198 | * Util/helpers: |
| 199 | */ |
| 200 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 201 | void __iomem *msm_ioremap(struct platform_device *pdev, const char *name, |
| 202 | const char *dbgname) |
| 203 | { |
| 204 | struct resource *res; |
| 205 | unsigned long size; |
| 206 | void __iomem *ptr; |
| 207 | |
| 208 | if (name) |
| 209 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name); |
| 210 | else |
| 211 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 212 | |
| 213 | if (!res) { |
| 214 | dev_err(&pdev->dev, "failed to get memory resource: %s\n", name); |
| 215 | return ERR_PTR(-EINVAL); |
| 216 | } |
| 217 | |
| 218 | size = resource_size(res); |
| 219 | |
| 220 | ptr = devm_ioremap_nocache(&pdev->dev, res->start, size); |
| 221 | if (!ptr) { |
| 222 | dev_err(&pdev->dev, "failed to ioremap: %s\n", name); |
| 223 | return ERR_PTR(-ENOMEM); |
| 224 | } |
| 225 | |
| 226 | if (reglog) |
Thierry Reding | fc99f97 | 2015-04-09 16:39:51 +0200 | [diff] [blame] | 227 | printk(KERN_DEBUG "IO:region %s %p %08lx\n", dbgname, ptr, size); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 228 | |
| 229 | return ptr; |
| 230 | } |
| 231 | |
Dhaval Patel | a243084 | 2017-06-15 14:32:36 -0700 | [diff] [blame] | 232 | unsigned long msm_iomap_size(struct platform_device *pdev, const char *name) |
| 233 | { |
| 234 | struct resource *res; |
| 235 | |
| 236 | if (name) |
| 237 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name); |
| 238 | else |
| 239 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 240 | |
| 241 | if (!res) { |
| 242 | dev_err(&pdev->dev, "failed to get memory resource: %s\n", |
| 243 | name); |
| 244 | return 0; |
| 245 | } |
| 246 | |
| 247 | return resource_size(res); |
| 248 | } |
| 249 | |
Lloyd Atkinson | 1a0c917 | 2016-10-04 10:01:24 -0400 | [diff] [blame] | 250 | void msm_iounmap(struct platform_device *pdev, void __iomem *addr) |
| 251 | { |
| 252 | devm_iounmap(&pdev->dev, addr); |
| 253 | } |
| 254 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 255 | void msm_writel(u32 data, void __iomem *addr) |
| 256 | { |
| 257 | if (reglog) |
Thierry Reding | fc99f97 | 2015-04-09 16:39:51 +0200 | [diff] [blame] | 258 | printk(KERN_DEBUG "IO:W %p %08x\n", addr, data); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 259 | writel(data, addr); |
| 260 | } |
| 261 | |
| 262 | u32 msm_readl(const void __iomem *addr) |
| 263 | { |
| 264 | u32 val = readl(addr); |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 265 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 266 | if (reglog) |
Thierry Reding | fc99f97 | 2015-04-09 16:39:51 +0200 | [diff] [blame] | 267 | printk(KERN_ERR "IO:R %p %08x\n", addr, val); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 268 | return val; |
| 269 | } |
| 270 | |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 271 | struct vblank_event { |
| 272 | struct list_head node; |
| 273 | int crtc_id; |
| 274 | bool enable; |
| 275 | }; |
| 276 | |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 277 | static void vblank_ctrl_worker(struct kthread_work *work) |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 278 | { |
| 279 | struct msm_vblank_ctrl *vbl_ctrl = container_of(work, |
| 280 | struct msm_vblank_ctrl, work); |
| 281 | struct msm_drm_private *priv = container_of(vbl_ctrl, |
| 282 | struct msm_drm_private, vblank_ctrl); |
| 283 | struct msm_kms *kms = priv->kms; |
| 284 | struct vblank_event *vbl_ev, *tmp; |
| 285 | unsigned long flags; |
| 286 | |
| 287 | spin_lock_irqsave(&vbl_ctrl->lock, flags); |
| 288 | list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) { |
| 289 | list_del(&vbl_ev->node); |
| 290 | spin_unlock_irqrestore(&vbl_ctrl->lock, flags); |
| 291 | |
| 292 | if (vbl_ev->enable) |
| 293 | kms->funcs->enable_vblank(kms, |
| 294 | priv->crtcs[vbl_ev->crtc_id]); |
| 295 | else |
| 296 | kms->funcs->disable_vblank(kms, |
| 297 | priv->crtcs[vbl_ev->crtc_id]); |
| 298 | |
| 299 | kfree(vbl_ev); |
| 300 | |
| 301 | spin_lock_irqsave(&vbl_ctrl->lock, flags); |
| 302 | } |
| 303 | |
| 304 | spin_unlock_irqrestore(&vbl_ctrl->lock, flags); |
| 305 | } |
| 306 | |
| 307 | static int vblank_ctrl_queue_work(struct msm_drm_private *priv, |
| 308 | int crtc_id, bool enable) |
| 309 | { |
| 310 | struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl; |
| 311 | struct vblank_event *vbl_ev; |
| 312 | unsigned long flags; |
| 313 | |
| 314 | vbl_ev = kzalloc(sizeof(*vbl_ev), GFP_ATOMIC); |
| 315 | if (!vbl_ev) |
| 316 | return -ENOMEM; |
| 317 | |
| 318 | vbl_ev->crtc_id = crtc_id; |
| 319 | vbl_ev->enable = enable; |
| 320 | |
| 321 | spin_lock_irqsave(&vbl_ctrl->lock, flags); |
| 322 | list_add_tail(&vbl_ev->node, &vbl_ctrl->event_list); |
| 323 | spin_unlock_irqrestore(&vbl_ctrl->lock, flags); |
| 324 | |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 325 | kthread_queue_work(&priv->event_thread[crtc_id].worker, |
| 326 | &vbl_ctrl->work); |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 327 | |
| 328 | return 0; |
| 329 | } |
| 330 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 331 | static int msm_drm_uninit(struct device *dev) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 332 | { |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 333 | struct platform_device *pdev = to_platform_device(dev); |
| 334 | struct drm_device *ddev = platform_get_drvdata(pdev); |
| 335 | struct msm_drm_private *priv = ddev->dev_private; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 336 | struct msm_kms *kms = priv->kms; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 337 | struct msm_gpu *gpu = priv->gpu; |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 338 | struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl; |
| 339 | struct vblank_event *vbl_ev, *tmp; |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 340 | int i; |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 341 | |
| 342 | /* We must cancel and cleanup any pending vblank enable/disable |
| 343 | * work before drm_irq_uninstall() to avoid work re-enabling an |
| 344 | * irq after uninstall has disabled it. |
| 345 | */ |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 346 | kthread_flush_work(&vbl_ctrl->work); |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 347 | list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) { |
| 348 | list_del(&vbl_ev->node); |
| 349 | kfree(vbl_ev); |
| 350 | } |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 351 | |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 352 | /* clean up display commit/event worker threads */ |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 353 | for (i = 0; i < priv->num_crtcs; i++) { |
| 354 | if (priv->disp_thread[i].thread) { |
| 355 | kthread_flush_worker(&priv->disp_thread[i].worker); |
| 356 | kthread_stop(priv->disp_thread[i].thread); |
| 357 | priv->disp_thread[i].thread = NULL; |
| 358 | } |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 359 | |
| 360 | if (priv->event_thread[i].thread) { |
| 361 | kthread_flush_worker(&priv->event_thread[i].worker); |
| 362 | kthread_stop(priv->event_thread[i].thread); |
| 363 | priv->event_thread[i].thread = NULL; |
| 364 | } |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 365 | } |
| 366 | |
Rob Clark | 6820939 | 2016-05-17 16:19:32 -0400 | [diff] [blame] | 367 | msm_gem_shrinker_cleanup(ddev); |
| 368 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 369 | drm_kms_helper_poll_fini(ddev); |
Archit Taneja | 1aaa57f | 2016-02-25 11:19:45 +0530 | [diff] [blame] | 370 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 371 | drm_mode_config_cleanup(ddev); |
| 372 | drm_vblank_cleanup(ddev); |
| 373 | |
Lloyd Atkinson | ab3dd30 | 2017-02-13 10:44:55 -0800 | [diff] [blame] | 374 | if (priv->registered) { |
| 375 | drm_dev_unregister(ddev); |
| 376 | priv->registered = false; |
| 377 | } |
Archit Taneja | 8208ed9 | 2016-05-02 11:05:53 +0530 | [diff] [blame] | 378 | |
Archit Taneja | 1aaa57f | 2016-02-25 11:19:45 +0530 | [diff] [blame] | 379 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
| 380 | if (fbdev && priv->fbdev) |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 381 | msm_fbdev_free(ddev); |
Archit Taneja | 1aaa57f | 2016-02-25 11:19:45 +0530 | [diff] [blame] | 382 | #endif |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 383 | drm_mode_config_cleanup(ddev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 384 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 385 | pm_runtime_get_sync(dev); |
| 386 | drm_irq_uninstall(ddev); |
| 387 | pm_runtime_put_sync(dev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 388 | |
| 389 | flush_workqueue(priv->wq); |
| 390 | destroy_workqueue(priv->wq); |
| 391 | |
Archit Taneja | 1697608 | 2016-11-03 17:36:18 +0530 | [diff] [blame] | 392 | if (kms && kms->funcs) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 393 | kms->funcs->destroy(kms); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 394 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 395 | if (gpu) { |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 396 | mutex_lock(&ddev->struct_mutex); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 397 | gpu->funcs->pm_suspend(gpu); |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 398 | mutex_unlock(&ddev->struct_mutex); |
Rob Clark | 774449e | 2015-05-15 09:19:36 -0400 | [diff] [blame] | 399 | gpu->funcs->destroy(gpu); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 400 | } |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 401 | |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 402 | if (priv->vram.paddr) { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 403 | unsigned long attrs = DMA_ATTR_NO_KERNEL_MAPPING; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 404 | |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 405 | drm_mm_takedown(&priv->vram.mm); |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 406 | dma_free_attrs(dev, priv->vram.size, NULL, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 407 | priv->vram.paddr, attrs); |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 408 | } |
| 409 | |
Dhaval Patel | a243084 | 2017-06-15 14:32:36 -0700 | [diff] [blame] | 410 | component_unbind_all(dev, ddev); |
| 411 | |
Lloyd Atkinson | 113aefd | 2016-10-23 13:15:18 -0400 | [diff] [blame] | 412 | sde_dbg_destroy(); |
Dhaval Patel | 6c66662 | 2017-03-21 23:02:59 -0700 | [diff] [blame] | 413 | debugfs_remove_recursive(priv->debug_root); |
Lloyd Atkinson | 5d40d31 | 2016-09-06 08:34:13 -0400 | [diff] [blame] | 414 | |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 415 | sde_power_client_destroy(&priv->phandle, priv->pclient); |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 416 | sde_power_resource_deinit(pdev, &priv->phandle); |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 417 | |
Archit Taneja | 0a6030d | 2016-05-08 21:36:28 +0530 | [diff] [blame] | 418 | msm_mdss_destroy(ddev); |
| 419 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 420 | ddev->dev_private = NULL; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 421 | kfree(priv); |
| 422 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 423 | drm_dev_unref(ddev); |
| 424 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 425 | return 0; |
| 426 | } |
| 427 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 428 | #define KMS_MDP4 4 |
| 429 | #define KMS_MDP5 5 |
| 430 | #define KMS_SDE 3 |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 431 | |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 432 | static int get_mdp_ver(struct platform_device *pdev) |
| 433 | { |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 434 | #ifdef CONFIG_OF |
| 435 | static const struct of_device_id match_types[] = { { |
| 436 | .compatible = "qcom,mdss_mdp", |
| 437 | .data = (void *)KMS_MDP5, |
| 438 | }, |
| 439 | { |
| 440 | .compatible = "qcom,sde-kms", |
| 441 | .data = (void *)KMS_SDE, |
Alan Kwong | 4023ceb | 2017-04-21 06:20:17 -0700 | [diff] [blame] | 442 | }, |
| 443 | {} }; |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 444 | struct device *dev = &pdev->dev; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 445 | const struct of_device_id *match; |
Archit Taneja | e9fbdaf | 2015-11-18 12:15:14 +0530 | [diff] [blame] | 446 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 447 | match = of_match_node(match_types, dev->of_node); |
| 448 | if (match) |
| 449 | return (int)(unsigned long)match->data; |
| 450 | #endif |
| 451 | return KMS_MDP4; |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 452 | } |
| 453 | |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 454 | static int msm_init_vram(struct drm_device *dev) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 455 | { |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 456 | struct msm_drm_private *priv = dev->dev_private; |
Archit Taneja | e9fbdaf | 2015-11-18 12:15:14 +0530 | [diff] [blame] | 457 | struct device_node *node; |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 458 | unsigned long size = 0; |
| 459 | int ret = 0; |
| 460 | |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 461 | /* In the device-tree world, we could have a 'memory-region' |
| 462 | * phandle, which gives us a link to our "vram". Allocating |
| 463 | * is all nicely abstracted behind the dma api, but we need |
| 464 | * to know the entire size to allocate it all in one go. There |
| 465 | * are two cases: |
| 466 | * 1) device with no IOMMU, in which case we need exclusive |
| 467 | * access to a VRAM carveout big enough for all gpu |
| 468 | * buffers |
| 469 | * 2) device with IOMMU, but where the bootloader puts up |
| 470 | * a splash screen. In this case, the VRAM carveout |
| 471 | * need only be large enough for fbdev fb. But we need |
| 472 | * exclusive access to the buffer to avoid the kernel |
| 473 | * using those pages for other purposes (which appears |
| 474 | * as corruption on screen before we have a chance to |
| 475 | * load and do initial modeset) |
| 476 | */ |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 477 | |
| 478 | node = of_parse_phandle(dev->dev->of_node, "memory-region", 0); |
| 479 | if (node) { |
| 480 | struct resource r; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 481 | |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 482 | ret = of_address_to_resource(node, 0, &r); |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 483 | |
Peter Chen | 2ca41c17 | 2016-07-04 16:49:50 +0800 | [diff] [blame] | 484 | of_node_put(node); |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 485 | if (ret) |
| 486 | return ret; |
| 487 | size = r.end - r.start; |
Thierry Reding | fc99f97 | 2015-04-09 16:39:51 +0200 | [diff] [blame] | 488 | DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 489 | |
Archit Taneja | e9fbdaf | 2015-11-18 12:15:14 +0530 | [diff] [blame] | 490 | /* if we have no IOMMU, then we need to use carveout allocator. |
| 491 | * Grab the entire CMA chunk carved out in early startup in |
| 492 | * mach-msm: |
| 493 | */ |
| 494 | } else if (!iommu_present(&platform_bus_type)) { |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 495 | DRM_INFO("using %s VRAM carveout\n", vram); |
| 496 | size = memparse(vram, NULL); |
| 497 | } |
| 498 | |
| 499 | if (size) { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 500 | unsigned long attrs = 0; |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 501 | void *p; |
| 502 | |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 503 | priv->vram.size = size; |
| 504 | |
| 505 | drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1); |
| 506 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 507 | attrs |= DMA_ATTR_NO_KERNEL_MAPPING; |
| 508 | attrs |= DMA_ATTR_WRITE_COMBINE; |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 509 | |
| 510 | /* note that for no-kernel-mapping, the vaddr returned |
| 511 | * is bogus, but non-null if allocation succeeded: |
| 512 | */ |
| 513 | p = dma_alloc_attrs(dev->dev, size, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 514 | &priv->vram.paddr, GFP_KERNEL, attrs); |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 515 | if (!p) { |
| 516 | dev_err(dev->dev, "failed to allocate VRAM\n"); |
| 517 | priv->vram.paddr = 0; |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 518 | return -ENOMEM; |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 519 | } |
| 520 | |
| 521 | dev_info(dev->dev, "VRAM: %08x->%08x\n", |
| 522 | (uint32_t)priv->vram.paddr, |
| 523 | (uint32_t)(priv->vram.paddr + size)); |
| 524 | } |
| 525 | |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 526 | return ret; |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 527 | } |
| 528 | |
Dhaval Patel | 3949f03 | 2016-06-20 16:24:33 -0700 | [diff] [blame] | 529 | #ifdef CONFIG_OF |
| 530 | static int msm_component_bind_all(struct device *dev, |
| 531 | struct drm_device *drm_dev) |
| 532 | { |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 533 | int ret; |
| 534 | |
| 535 | ret = component_bind_all(dev, drm_dev); |
| 536 | if (ret) |
| 537 | DRM_ERROR("component_bind_all failed: %d\n", ret); |
| 538 | |
| 539 | return ret; |
Dhaval Patel | 3949f03 | 2016-06-20 16:24:33 -0700 | [diff] [blame] | 540 | } |
| 541 | #else |
| 542 | static int msm_component_bind_all(struct device *dev, |
| 543 | struct drm_device *drm_dev) |
| 544 | { |
| 545 | return 0; |
| 546 | } |
| 547 | #endif |
| 548 | |
Lloyd Atkinson | 113aefd | 2016-10-23 13:15:18 -0400 | [diff] [blame] | 549 | static int msm_power_enable_wrapper(void *handle, void *client, bool enable) |
| 550 | { |
| 551 | return sde_power_resource_enable(handle, client, enable); |
| 552 | } |
| 553 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 554 | static int msm_drm_init(struct device *dev, struct drm_driver *drv) |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 555 | { |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 556 | struct platform_device *pdev = to_platform_device(dev); |
| 557 | struct drm_device *ddev; |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 558 | struct msm_drm_private *priv; |
| 559 | struct msm_kms *kms; |
Lloyd Atkinson | 113aefd | 2016-10-23 13:15:18 -0400 | [diff] [blame] | 560 | struct sde_dbg_power_ctrl dbg_power_ctrl = { 0 }; |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 561 | int ret, i; |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 562 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 563 | ddev = drm_dev_alloc(drv, dev); |
| 564 | if (!ddev) { |
| 565 | dev_err(dev, "failed to allocate drm_device\n"); |
| 566 | return -ENOMEM; |
| 567 | } |
| 568 | |
| 569 | drm_mode_config_init(ddev); |
| 570 | platform_set_drvdata(pdev, ddev); |
| 571 | ddev->platformdev = pdev; |
| 572 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 573 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
| 574 | if (!priv) { |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 575 | ret = -ENOMEM; |
| 576 | goto priv_alloc_fail; |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 577 | } |
| 578 | |
| 579 | ddev->dev_private = priv; |
Rob Clark | 6820939 | 2016-05-17 16:19:32 -0400 | [diff] [blame] | 580 | priv->dev = ddev; |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 581 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 582 | ret = msm_mdss_init(ddev); |
| 583 | if (ret) |
| 584 | goto mdss_init_fail; |
| 585 | |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 586 | priv->wq = alloc_ordered_workqueue("msm_drm", 0); |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 587 | init_waitqueue_head(&priv->pending_crtcs_event); |
| 588 | |
| 589 | INIT_LIST_HEAD(&priv->client_event_list); |
| 590 | INIT_LIST_HEAD(&priv->inactive_list); |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 591 | INIT_LIST_HEAD(&priv->vblank_ctrl.event_list); |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 592 | kthread_init_work(&priv->vblank_ctrl.work, vblank_ctrl_worker); |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 593 | spin_lock_init(&priv->vblank_ctrl.lock); |
| 594 | |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 595 | ret = sde_power_resource_init(pdev, &priv->phandle); |
| 596 | if (ret) { |
| 597 | pr_err("sde power resource init failed\n"); |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 598 | goto power_init_fail; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 599 | } |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 600 | |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 601 | priv->pclient = sde_power_client_create(&priv->phandle, "sde"); |
| 602 | if (IS_ERR_OR_NULL(priv->pclient)) { |
| 603 | pr_err("sde power client create failed\n"); |
| 604 | ret = -EINVAL; |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 605 | goto power_client_fail; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 606 | } |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 607 | |
Dhaval Patel | a243084 | 2017-06-15 14:32:36 -0700 | [diff] [blame] | 608 | dbg_power_ctrl.handle = &priv->phandle; |
| 609 | dbg_power_ctrl.client = priv->pclient; |
| 610 | dbg_power_ctrl.enable_fn = msm_power_enable_wrapper; |
| 611 | ret = sde_dbg_init(&pdev->dev, &dbg_power_ctrl); |
| 612 | if (ret) { |
| 613 | dev_err(dev, "failed to init sde dbg: %d\n", ret); |
| 614 | goto dbg_init_fail; |
| 615 | } |
| 616 | |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 617 | /* Bind all our sub-components: */ |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 618 | ret = msm_component_bind_all(dev, ddev); |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 619 | if (ret) |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 620 | goto bind_fail; |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 621 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 622 | ret = msm_init_vram(ddev); |
Rob Clark | 13f1556 | 2015-05-07 15:20:13 -0400 | [diff] [blame] | 623 | if (ret) |
| 624 | goto fail; |
| 625 | |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 626 | switch (get_mdp_ver(pdev)) { |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 627 | case KMS_MDP4: |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 628 | kms = mdp4_kms_init(ddev); |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 629 | break; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 630 | case KMS_MDP5: |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 631 | kms = mdp5_kms_init(ddev); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 632 | break; |
| 633 | case KMS_SDE: |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 634 | kms = sde_kms_init(ddev); |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 635 | break; |
| 636 | default: |
| 637 | kms = ERR_PTR(-ENODEV); |
| 638 | break; |
| 639 | } |
| 640 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 641 | if (IS_ERR(kms)) { |
| 642 | /* |
| 643 | * NOTE: once we have GPU support, having no kms should not |
| 644 | * be considered fatal.. ideally we would still support gpu |
| 645 | * and (for example) use dmabuf/prime to share buffers with |
| 646 | * imx drm driver on iMX5 |
| 647 | */ |
Lloyd Atkinson | 1e2497e | 2016-09-26 17:55:48 -0400 | [diff] [blame] | 648 | priv->kms = NULL; |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 649 | dev_err(dev, "failed to load kms\n"); |
Thomas Meyer | e4826a9 | 2013-09-16 23:19:54 +0200 | [diff] [blame] | 650 | ret = PTR_ERR(kms); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 651 | goto fail; |
| 652 | } |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 653 | priv->kms = kms; |
| 654 | pm_runtime_enable(dev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 655 | |
Alan Kwong | 2994628 | 2017-02-01 21:55:56 -0800 | [diff] [blame] | 656 | if (kms) { |
| 657 | ret = kms->funcs->hw_init(kms); |
| 658 | if (ret) { |
| 659 | dev_err(dev, "kms hw init failed: %d\n", ret); |
| 660 | goto fail; |
| 661 | } |
| 662 | } |
| 663 | ddev->mode_config.funcs = &mode_config_funcs; |
| 664 | |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 665 | for (i = 0; i < priv->num_crtcs; i++) { |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 666 | |
| 667 | /* initialize display thread */ |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 668 | priv->disp_thread[i].crtc_id = priv->crtcs[i]->base.id; |
| 669 | kthread_init_worker(&priv->disp_thread[i].worker); |
| 670 | priv->disp_thread[i].dev = ddev; |
| 671 | priv->disp_thread[i].thread = |
| 672 | kthread_run(kthread_worker_fn, |
| 673 | &priv->disp_thread[i].worker, |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 674 | "crtc_commit:%d", priv->disp_thread[i].crtc_id); |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 675 | |
| 676 | if (IS_ERR(priv->disp_thread[i].thread)) { |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 677 | dev_err(dev, "failed to create crtc_commit kthread\n"); |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 678 | priv->disp_thread[i].thread = NULL; |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 679 | } |
| 680 | |
| 681 | /* initialize event thread */ |
| 682 | priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id; |
| 683 | kthread_init_worker(&priv->event_thread[i].worker); |
| 684 | priv->event_thread[i].dev = ddev; |
| 685 | priv->event_thread[i].thread = |
| 686 | kthread_run(kthread_worker_fn, |
| 687 | &priv->event_thread[i].worker, |
| 688 | "crtc_event:%d", priv->event_thread[i].crtc_id); |
| 689 | |
| 690 | if (IS_ERR(priv->event_thread[i].thread)) { |
| 691 | dev_err(dev, "failed to create crtc_event kthread\n"); |
| 692 | priv->event_thread[i].thread = NULL; |
| 693 | } |
| 694 | |
| 695 | if ((!priv->disp_thread[i].thread) || |
| 696 | !priv->event_thread[i].thread) { |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 697 | /* clean up previously created threads if any */ |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 698 | for ( ; i >= 0; i--) { |
| 699 | if (priv->disp_thread[i].thread) { |
| 700 | kthread_stop( |
| 701 | priv->disp_thread[i].thread); |
| 702 | priv->disp_thread[i].thread = NULL; |
| 703 | } |
| 704 | |
| 705 | if (priv->event_thread[i].thread) { |
| 706 | kthread_stop( |
| 707 | priv->event_thread[i].thread); |
| 708 | priv->event_thread[i].thread = NULL; |
| 709 | } |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 710 | } |
| 711 | goto fail; |
| 712 | } |
| 713 | } |
| 714 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 715 | ret = drm_vblank_init(ddev, priv->num_crtcs); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 716 | if (ret < 0) { |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 717 | dev_err(dev, "failed to initialize vblank\n"); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 718 | goto fail; |
| 719 | } |
| 720 | |
Archit Taneja | a2b3a55 | 2016-05-18 15:06:03 +0530 | [diff] [blame] | 721 | if (kms) { |
| 722 | pm_runtime_get_sync(dev); |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 723 | ret = drm_irq_install(ddev, platform_get_irq(pdev, 0)); |
Archit Taneja | a2b3a55 | 2016-05-18 15:06:03 +0530 | [diff] [blame] | 724 | pm_runtime_put_sync(dev); |
| 725 | if (ret < 0) { |
| 726 | dev_err(dev, "failed to install IRQ handler\n"); |
| 727 | goto fail; |
| 728 | } |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 729 | } |
| 730 | |
Lloyd Atkinson | ab3dd30 | 2017-02-13 10:44:55 -0800 | [diff] [blame] | 731 | ret = drm_dev_register(ddev, 0); |
| 732 | if (ret) |
| 733 | goto fail; |
| 734 | priv->registered = true; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 735 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 736 | drm_mode_config_reset(ddev); |
| 737 | |
| 738 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
| 739 | if (fbdev) |
| 740 | priv->fbdev = msm_fbdev_init(ddev); |
| 741 | #endif |
| 742 | |
| 743 | ret = msm_debugfs_late_init(ddev); |
| 744 | if (ret) |
| 745 | goto fail; |
| 746 | |
Dhaval Patel | 6c66662 | 2017-03-21 23:02:59 -0700 | [diff] [blame] | 747 | priv->debug_root = debugfs_create_dir("debug", |
| 748 | ddev->primary->debugfs_root); |
| 749 | if (IS_ERR_OR_NULL(priv->debug_root)) { |
| 750 | pr_err("debugfs_root create_dir fail, error %ld\n", |
| 751 | PTR_ERR(priv->debug_root)); |
| 752 | priv->debug_root = NULL; |
| 753 | goto fail; |
| 754 | } |
| 755 | |
| 756 | ret = sde_dbg_debugfs_register(priv->debug_root); |
Lloyd Atkinson | b020e0f | 2017-03-14 08:05:18 -0700 | [diff] [blame] | 757 | if (ret) { |
| 758 | dev_err(dev, "failed to reg sde dbg debugfs: %d\n", ret); |
| 759 | goto fail; |
| 760 | } |
| 761 | |
Alan Kwong | 5a3ac75 | 2016-10-16 01:02:35 -0400 | [diff] [blame] | 762 | /* perform subdriver post initialization */ |
| 763 | if (kms && kms->funcs && kms->funcs->postinit) { |
| 764 | ret = kms->funcs->postinit(kms); |
| 765 | if (ret) { |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 766 | pr_err("kms post init failed: %d\n", ret); |
Alan Kwong | 5a3ac75 | 2016-10-16 01:02:35 -0400 | [diff] [blame] | 767 | goto fail; |
| 768 | } |
| 769 | } |
| 770 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 771 | drm_kms_helper_poll_init(ddev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 772 | |
| 773 | return 0; |
| 774 | |
| 775 | fail: |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 776 | msm_drm_uninit(dev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 777 | return ret; |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 778 | bind_fail: |
Dhaval Patel | a243084 | 2017-06-15 14:32:36 -0700 | [diff] [blame] | 779 | sde_dbg_destroy(); |
| 780 | dbg_init_fail: |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 781 | sde_power_client_destroy(&priv->phandle, priv->pclient); |
| 782 | power_client_fail: |
| 783 | sde_power_resource_deinit(pdev, &priv->phandle); |
| 784 | power_init_fail: |
| 785 | msm_mdss_destroy(ddev); |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 786 | mdss_init_fail: |
| 787 | kfree(priv); |
| 788 | priv_alloc_fail: |
| 789 | drm_dev_unref(ddev); |
| 790 | return ret; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 791 | } |
| 792 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 793 | /* |
| 794 | * DRM operations: |
| 795 | */ |
| 796 | |
Stephane Viau | 32f13f6 | 2015-04-29 15:57:29 -0400 | [diff] [blame] | 797 | #ifdef CONFIG_QCOM_KGSL |
| 798 | static void load_gpu(struct drm_device *dev) |
| 799 | { |
| 800 | } |
| 801 | #else |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 802 | static void load_gpu(struct drm_device *dev) |
| 803 | { |
Rob Clark | a1ad352 | 2014-07-11 11:59:22 -0400 | [diff] [blame] | 804 | static DEFINE_MUTEX(init_lock); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 805 | struct msm_drm_private *priv = dev->dev_private; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 806 | |
Rob Clark | a1ad352 | 2014-07-11 11:59:22 -0400 | [diff] [blame] | 807 | mutex_lock(&init_lock); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 808 | |
Rob Clark | e2550b7 | 2014-09-05 13:30:27 -0400 | [diff] [blame] | 809 | if (!priv->gpu) |
| 810 | priv->gpu = adreno_load_gpu(dev); |
Rob Clark | a1ad352 | 2014-07-11 11:59:22 -0400 | [diff] [blame] | 811 | |
Rob Clark | a1ad352 | 2014-07-11 11:59:22 -0400 | [diff] [blame] | 812 | mutex_unlock(&init_lock); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 813 | } |
Stephane Viau | 32f13f6 | 2015-04-29 15:57:29 -0400 | [diff] [blame] | 814 | #endif |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 815 | |
| 816 | static int msm_open(struct drm_device *dev, struct drm_file *file) |
| 817 | { |
| 818 | struct msm_file_private *ctx; |
| 819 | |
| 820 | /* For now, load gpu on open.. to avoid the requirement of having |
| 821 | * firmware in the initrd. |
| 822 | */ |
| 823 | load_gpu(dev); |
| 824 | |
| 825 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); |
| 826 | if (!ctx) |
| 827 | return -ENOMEM; |
| 828 | |
| 829 | file->driver_priv = ctx; |
| 830 | |
Clarence Ip | 0e19a5d | 2016-08-10 16:36:50 -0400 | [diff] [blame] | 831 | if (dev && dev->dev_private) { |
| 832 | struct msm_drm_private *priv = dev->dev_private; |
| 833 | struct msm_kms *kms; |
| 834 | |
| 835 | kms = priv->kms; |
| 836 | if (kms && kms->funcs && kms->funcs->postopen) |
| 837 | kms->funcs->postopen(kms, file); |
| 838 | } |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 839 | return 0; |
| 840 | } |
| 841 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 842 | static void msm_preclose(struct drm_device *dev, struct drm_file *file) |
| 843 | { |
| 844 | struct msm_drm_private *priv = dev->dev_private; |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 845 | struct msm_kms *kms = priv->kms; |
| 846 | |
| 847 | if (kms && kms->funcs && kms->funcs->preclose) |
| 848 | kms->funcs->preclose(kms, file); |
| 849 | } |
| 850 | |
| 851 | static void msm_postclose(struct drm_device *dev, struct drm_file *file) |
| 852 | { |
| 853 | struct msm_drm_private *priv = dev->dev_private; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 854 | struct msm_file_private *ctx = file->driver_priv; |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 855 | struct msm_kms *kms = priv->kms; |
| 856 | |
| 857 | if (kms && kms->funcs && kms->funcs->postclose) |
| 858 | kms->funcs->postclose(kms, file); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 859 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 860 | mutex_lock(&dev->struct_mutex); |
| 861 | if (ctx == priv->lastctx) |
| 862 | priv->lastctx = NULL; |
| 863 | mutex_unlock(&dev->struct_mutex); |
| 864 | |
| 865 | kfree(ctx); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 866 | } |
| 867 | |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 868 | static int msm_disable_all_modes_commit( |
| 869 | struct drm_device *dev, |
| 870 | struct drm_atomic_state *state) |
| 871 | { |
| 872 | struct drm_plane *plane; |
| 873 | struct drm_crtc *crtc; |
| 874 | unsigned int plane_mask; |
| 875 | int ret; |
| 876 | |
| 877 | plane_mask = 0; |
| 878 | drm_for_each_plane(plane, dev) { |
| 879 | struct drm_plane_state *plane_state; |
| 880 | |
| 881 | plane_state = drm_atomic_get_plane_state(state, plane); |
| 882 | if (IS_ERR(plane_state)) { |
| 883 | ret = PTR_ERR(plane_state); |
| 884 | goto fail; |
| 885 | } |
| 886 | |
Alan Kwong | 76c9d18 | 2016-12-14 14:39:17 -0800 | [diff] [blame] | 887 | plane_state->rotation = 0; |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 888 | |
| 889 | plane->old_fb = plane->fb; |
| 890 | plane_mask |= 1 << drm_plane_index(plane); |
| 891 | |
| 892 | /* disable non-primary: */ |
| 893 | if (plane->type == DRM_PLANE_TYPE_PRIMARY) |
| 894 | continue; |
| 895 | |
| 896 | DRM_DEBUG("disabling plane %d\n", plane->base.id); |
| 897 | |
| 898 | ret = __drm_atomic_helper_disable_plane(plane, plane_state); |
| 899 | if (ret != 0) |
| 900 | DRM_ERROR("error %d disabling plane %d\n", ret, |
| 901 | plane->base.id); |
| 902 | } |
| 903 | |
| 904 | drm_for_each_crtc(crtc, dev) { |
| 905 | struct drm_mode_set mode_set; |
| 906 | |
| 907 | memset(&mode_set, 0, sizeof(struct drm_mode_set)); |
| 908 | mode_set.crtc = crtc; |
| 909 | |
| 910 | DRM_DEBUG("disabling crtc %d\n", crtc->base.id); |
| 911 | |
| 912 | ret = __drm_atomic_helper_set_config(&mode_set, state); |
| 913 | if (ret != 0) |
| 914 | DRM_ERROR("error %d disabling crtc %d\n", ret, |
| 915 | crtc->base.id); |
| 916 | } |
| 917 | |
| 918 | DRM_DEBUG("committing disables\n"); |
| 919 | ret = drm_atomic_commit(state); |
| 920 | |
| 921 | fail: |
| 922 | drm_atomic_clean_old_fb(dev, plane_mask, ret); |
| 923 | DRM_DEBUG("disables result %d\n", ret); |
| 924 | return ret; |
| 925 | } |
| 926 | |
| 927 | /** |
| 928 | * msm_clear_all_modes - disables all planes and crtcs via an atomic commit |
| 929 | * based on restore_fbdev_mode_atomic in drm_fb_helper.c |
| 930 | * @dev: device pointer |
| 931 | * @Return: 0 on success, otherwise -error |
| 932 | */ |
| 933 | static int msm_disable_all_modes(struct drm_device *dev) |
| 934 | { |
| 935 | struct drm_atomic_state *state; |
| 936 | int ret, i; |
| 937 | |
| 938 | state = drm_atomic_state_alloc(dev); |
| 939 | if (!state) |
| 940 | return -ENOMEM; |
| 941 | |
| 942 | state->acquire_ctx = dev->mode_config.acquire_ctx; |
| 943 | |
| 944 | for (i = 0; i < TEARDOWN_DEADLOCK_RETRY_MAX; i++) { |
| 945 | ret = msm_disable_all_modes_commit(dev, state); |
| 946 | if (ret != -EDEADLK) |
| 947 | break; |
| 948 | drm_atomic_state_clear(state); |
| 949 | drm_atomic_legacy_backoff(state); |
| 950 | } |
| 951 | |
| 952 | /* on successful atomic commit state ownership transfers to framework */ |
| 953 | if (ret != 0) |
| 954 | drm_atomic_state_free(state); |
| 955 | |
| 956 | return ret; |
| 957 | } |
| 958 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 959 | static void msm_lastclose(struct drm_device *dev) |
| 960 | { |
| 961 | struct msm_drm_private *priv = dev->dev_private; |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 962 | struct msm_kms *kms = priv->kms; |
Alan Kwong | 5a3ac75 | 2016-10-16 01:02:35 -0400 | [diff] [blame] | 963 | int i; |
| 964 | |
| 965 | /* |
| 966 | * clean up vblank disable immediately as this is the last close. |
| 967 | */ |
| 968 | for (i = 0; i < dev->num_crtcs; i++) { |
| 969 | struct drm_vblank_crtc *vblank = &dev->vblank[i]; |
| 970 | struct timer_list *disable_timer = &vblank->disable_timer; |
| 971 | |
| 972 | if (del_timer_sync(disable_timer)) |
| 973 | disable_timer->function(disable_timer->data); |
| 974 | } |
| 975 | |
| 976 | /* wait for pending vblank requests to be executed by worker thread */ |
| 977 | flush_workqueue(priv->wq); |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 978 | |
| 979 | if (priv->fbdev) { |
Rob Clark | 5ea1f75 | 2014-05-30 12:29:48 -0400 | [diff] [blame] | 980 | drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev); |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 981 | } else { |
| 982 | drm_modeset_lock_all(dev); |
| 983 | msm_disable_all_modes(dev); |
| 984 | drm_modeset_unlock_all(dev); |
| 985 | if (kms && kms->funcs && kms->funcs->lastclose) |
| 986 | kms->funcs->lastclose(kms); |
| 987 | } |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 988 | } |
| 989 | |
Daniel Vetter | e9f0d76 | 2013-12-11 11:34:42 +0100 | [diff] [blame] | 990 | static irqreturn_t msm_irq(int irq, void *arg) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 991 | { |
| 992 | struct drm_device *dev = arg; |
| 993 | struct msm_drm_private *priv = dev->dev_private; |
| 994 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 995 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 996 | BUG_ON(!kms); |
| 997 | return kms->funcs->irq(kms); |
| 998 | } |
| 999 | |
| 1000 | static void msm_irq_preinstall(struct drm_device *dev) |
| 1001 | { |
| 1002 | struct msm_drm_private *priv = dev->dev_private; |
| 1003 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 1004 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1005 | BUG_ON(!kms); |
| 1006 | kms->funcs->irq_preinstall(kms); |
| 1007 | } |
| 1008 | |
| 1009 | static int msm_irq_postinstall(struct drm_device *dev) |
| 1010 | { |
| 1011 | struct msm_drm_private *priv = dev->dev_private; |
| 1012 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 1013 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1014 | BUG_ON(!kms); |
| 1015 | return kms->funcs->irq_postinstall(kms); |
| 1016 | } |
| 1017 | |
| 1018 | static void msm_irq_uninstall(struct drm_device *dev) |
| 1019 | { |
| 1020 | struct msm_drm_private *priv = dev->dev_private; |
| 1021 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 1022 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1023 | BUG_ON(!kms); |
| 1024 | kms->funcs->irq_uninstall(kms); |
| 1025 | } |
| 1026 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 1027 | static int msm_enable_vblank(struct drm_device *dev, unsigned int pipe) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1028 | { |
| 1029 | struct msm_drm_private *priv = dev->dev_private; |
| 1030 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 1031 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1032 | if (!kms) |
| 1033 | return -ENXIO; |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 1034 | DBG("dev=%p, crtc=%u", dev, pipe); |
| 1035 | return vblank_ctrl_queue_work(priv, pipe, true); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1036 | } |
| 1037 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 1038 | static void msm_disable_vblank(struct drm_device *dev, unsigned int pipe) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1039 | { |
| 1040 | struct msm_drm_private *priv = dev->dev_private; |
| 1041 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 1042 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1043 | if (!kms) |
| 1044 | return; |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 1045 | DBG("dev=%p, crtc=%u", dev, pipe); |
| 1046 | vblank_ctrl_queue_work(priv, pipe, false); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1047 | } |
| 1048 | |
| 1049 | /* |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1050 | * DRM ioctls: |
| 1051 | */ |
| 1052 | |
| 1053 | static int msm_ioctl_get_param(struct drm_device *dev, void *data, |
| 1054 | struct drm_file *file) |
| 1055 | { |
| 1056 | struct msm_drm_private *priv = dev->dev_private; |
| 1057 | struct drm_msm_param *args = data; |
| 1058 | struct msm_gpu *gpu; |
| 1059 | |
| 1060 | /* for now, we just have 3d pipe.. eventually this would need to |
| 1061 | * be more clever to dispatch to appropriate gpu module: |
| 1062 | */ |
| 1063 | if (args->pipe != MSM_PIPE_3D0) |
| 1064 | return -EINVAL; |
| 1065 | |
| 1066 | gpu = priv->gpu; |
| 1067 | |
| 1068 | if (!gpu) |
| 1069 | return -ENXIO; |
| 1070 | |
| 1071 | return gpu->funcs->get_param(gpu, args->param, &args->value); |
| 1072 | } |
| 1073 | |
| 1074 | static int msm_ioctl_gem_new(struct drm_device *dev, void *data, |
| 1075 | struct drm_file *file) |
| 1076 | { |
| 1077 | struct drm_msm_gem_new *args = data; |
Rob Clark | 93ddb0d | 2014-03-03 09:42:33 -0500 | [diff] [blame] | 1078 | |
| 1079 | if (args->flags & ~MSM_BO_FLAGS) { |
| 1080 | DRM_ERROR("invalid flags: %08x\n", args->flags); |
| 1081 | return -EINVAL; |
| 1082 | } |
| 1083 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1084 | return msm_gem_new_handle(dev, file, args->size, |
| 1085 | args->flags, &args->handle); |
| 1086 | } |
| 1087 | |
Rob Clark | 56c2da8 | 2015-05-11 11:50:03 -0400 | [diff] [blame] | 1088 | static inline ktime_t to_ktime(struct drm_msm_timespec timeout) |
| 1089 | { |
| 1090 | return ktime_set(timeout.tv_sec, timeout.tv_nsec); |
| 1091 | } |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1092 | |
| 1093 | static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data, |
| 1094 | struct drm_file *file) |
| 1095 | { |
| 1096 | struct drm_msm_gem_cpu_prep *args = data; |
| 1097 | struct drm_gem_object *obj; |
Rob Clark | 56c2da8 | 2015-05-11 11:50:03 -0400 | [diff] [blame] | 1098 | ktime_t timeout = to_ktime(args->timeout); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1099 | int ret; |
| 1100 | |
Rob Clark | 93ddb0d | 2014-03-03 09:42:33 -0500 | [diff] [blame] | 1101 | if (args->op & ~MSM_PREP_FLAGS) { |
| 1102 | DRM_ERROR("invalid op: %08x\n", args->op); |
| 1103 | return -EINVAL; |
| 1104 | } |
| 1105 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 1106 | obj = drm_gem_object_lookup(file, args->handle); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1107 | if (!obj) |
| 1108 | return -ENOENT; |
| 1109 | |
Rob Clark | 56c2da8 | 2015-05-11 11:50:03 -0400 | [diff] [blame] | 1110 | ret = msm_gem_cpu_prep(obj, args->op, &timeout); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1111 | |
| 1112 | drm_gem_object_unreference_unlocked(obj); |
| 1113 | |
| 1114 | return ret; |
| 1115 | } |
| 1116 | |
| 1117 | static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data, |
| 1118 | struct drm_file *file) |
| 1119 | { |
| 1120 | struct drm_msm_gem_cpu_fini *args = data; |
| 1121 | struct drm_gem_object *obj; |
| 1122 | int ret; |
| 1123 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 1124 | obj = drm_gem_object_lookup(file, args->handle); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1125 | if (!obj) |
| 1126 | return -ENOENT; |
| 1127 | |
| 1128 | ret = msm_gem_cpu_fini(obj); |
| 1129 | |
| 1130 | drm_gem_object_unreference_unlocked(obj); |
| 1131 | |
| 1132 | return ret; |
| 1133 | } |
| 1134 | |
| 1135 | static int msm_ioctl_gem_info(struct drm_device *dev, void *data, |
| 1136 | struct drm_file *file) |
| 1137 | { |
| 1138 | struct drm_msm_gem_info *args = data; |
| 1139 | struct drm_gem_object *obj; |
| 1140 | int ret = 0; |
| 1141 | |
| 1142 | if (args->pad) |
| 1143 | return -EINVAL; |
| 1144 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 1145 | obj = drm_gem_object_lookup(file, args->handle); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1146 | if (!obj) |
| 1147 | return -ENOENT; |
| 1148 | |
| 1149 | args->offset = msm_gem_mmap_offset(obj); |
| 1150 | |
| 1151 | drm_gem_object_unreference_unlocked(obj); |
| 1152 | |
| 1153 | return ret; |
| 1154 | } |
| 1155 | |
| 1156 | static int msm_ioctl_wait_fence(struct drm_device *dev, void *data, |
| 1157 | struct drm_file *file) |
| 1158 | { |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 1159 | struct msm_drm_private *priv = dev->dev_private; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1160 | struct drm_msm_wait_fence *args = data; |
Rob Clark | 56c2da8 | 2015-05-11 11:50:03 -0400 | [diff] [blame] | 1161 | ktime_t timeout = to_ktime(args->timeout); |
Rob Clark | 93ddb0d | 2014-03-03 09:42:33 -0500 | [diff] [blame] | 1162 | |
| 1163 | if (args->pad) { |
| 1164 | DRM_ERROR("invalid pad: %08x\n", args->pad); |
| 1165 | return -EINVAL; |
| 1166 | } |
| 1167 | |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 1168 | if (!priv->gpu) |
| 1169 | return 0; |
| 1170 | |
| 1171 | return msm_wait_fence(priv->gpu->fctx, args->fence, &timeout, true); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1172 | } |
| 1173 | |
Rob Clark | 4cd33c4 | 2016-05-17 15:44:49 -0400 | [diff] [blame] | 1174 | static int msm_ioctl_gem_madvise(struct drm_device *dev, void *data, |
| 1175 | struct drm_file *file) |
| 1176 | { |
| 1177 | struct drm_msm_gem_madvise *args = data; |
| 1178 | struct drm_gem_object *obj; |
| 1179 | int ret; |
| 1180 | |
| 1181 | switch (args->madv) { |
| 1182 | case MSM_MADV_DONTNEED: |
| 1183 | case MSM_MADV_WILLNEED: |
| 1184 | break; |
| 1185 | default: |
| 1186 | return -EINVAL; |
| 1187 | } |
| 1188 | |
| 1189 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1190 | if (ret) |
| 1191 | return ret; |
| 1192 | |
| 1193 | obj = drm_gem_object_lookup(file, args->handle); |
| 1194 | if (!obj) { |
| 1195 | ret = -ENOENT; |
| 1196 | goto unlock; |
| 1197 | } |
| 1198 | |
| 1199 | ret = msm_gem_madvise(obj, args->madv); |
| 1200 | if (ret >= 0) { |
| 1201 | args->retained = ret; |
| 1202 | ret = 0; |
| 1203 | } |
| 1204 | |
| 1205 | drm_gem_object_unreference(obj); |
| 1206 | |
| 1207 | unlock: |
| 1208 | mutex_unlock(&dev->struct_mutex); |
| 1209 | return ret; |
| 1210 | } |
| 1211 | |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1212 | static int msm_drm_object_supports_event(struct drm_device *dev, |
| 1213 | struct drm_msm_event_req *req) |
| 1214 | { |
| 1215 | int ret = -EINVAL; |
| 1216 | struct drm_mode_object *arg_obj; |
| 1217 | |
| 1218 | arg_obj = drm_mode_object_find(dev, req->object_id, req->object_type); |
| 1219 | if (!arg_obj) |
| 1220 | return -ENOENT; |
| 1221 | |
| 1222 | switch (arg_obj->type) { |
| 1223 | case DRM_MODE_OBJECT_CRTC: |
| 1224 | case DRM_MODE_OBJECT_CONNECTOR: |
| 1225 | ret = 0; |
| 1226 | break; |
| 1227 | default: |
| 1228 | ret = -EOPNOTSUPP; |
| 1229 | break; |
| 1230 | } |
| 1231 | |
| 1232 | return ret; |
| 1233 | } |
| 1234 | |
| 1235 | static int msm_register_event(struct drm_device *dev, |
| 1236 | struct drm_msm_event_req *req, struct drm_file *file, bool en) |
| 1237 | { |
| 1238 | int ret = -EINVAL; |
| 1239 | struct msm_drm_private *priv = dev->dev_private; |
| 1240 | struct msm_kms *kms = priv->kms; |
| 1241 | struct drm_mode_object *arg_obj; |
| 1242 | |
| 1243 | arg_obj = drm_mode_object_find(dev, req->object_id, req->object_type); |
| 1244 | if (!arg_obj) |
| 1245 | return -ENOENT; |
| 1246 | |
| 1247 | ret = kms->funcs->register_events(kms, arg_obj, req->event, en); |
| 1248 | return ret; |
| 1249 | } |
| 1250 | |
| 1251 | static int msm_event_client_count(struct drm_device *dev, |
| 1252 | struct drm_msm_event_req *req_event, bool locked) |
| 1253 | { |
| 1254 | struct msm_drm_private *priv = dev->dev_private; |
| 1255 | unsigned long flag = 0; |
| 1256 | struct msm_drm_event *node; |
| 1257 | int count = 0; |
| 1258 | |
| 1259 | if (!locked) |
| 1260 | spin_lock_irqsave(&dev->event_lock, flag); |
| 1261 | list_for_each_entry(node, &priv->client_event_list, base.link) { |
| 1262 | if (node->event.type == req_event->event && |
| 1263 | node->info.object_id == req_event->object_id) |
| 1264 | count++; |
| 1265 | } |
| 1266 | if (!locked) |
| 1267 | spin_unlock_irqrestore(&dev->event_lock, flag); |
| 1268 | |
| 1269 | return count; |
| 1270 | } |
| 1271 | |
| 1272 | static int msm_ioctl_register_event(struct drm_device *dev, void *data, |
| 1273 | struct drm_file *file) |
| 1274 | { |
| 1275 | struct msm_drm_private *priv = dev->dev_private; |
| 1276 | struct drm_msm_event_req *req_event = data; |
| 1277 | struct msm_drm_event *client, *node; |
| 1278 | unsigned long flag = 0; |
| 1279 | bool dup_request = false; |
| 1280 | int ret = 0, count = 0; |
| 1281 | |
| 1282 | ret = msm_drm_object_supports_event(dev, req_event); |
| 1283 | if (ret) { |
| 1284 | DRM_ERROR("unsupported event %x object %x object id %d\n", |
| 1285 | req_event->event, req_event->object_type, |
| 1286 | req_event->object_id); |
| 1287 | return ret; |
| 1288 | } |
| 1289 | |
| 1290 | spin_lock_irqsave(&dev->event_lock, flag); |
| 1291 | list_for_each_entry(node, &priv->client_event_list, base.link) { |
| 1292 | if (node->base.file_priv != file) |
| 1293 | continue; |
| 1294 | if (node->event.type == req_event->event && |
| 1295 | node->info.object_id == req_event->object_id) { |
| 1296 | DRM_DEBUG("duplicate request for event %x obj id %d\n", |
| 1297 | node->event.type, node->info.object_id); |
| 1298 | dup_request = true; |
| 1299 | break; |
| 1300 | } |
| 1301 | } |
| 1302 | spin_unlock_irqrestore(&dev->event_lock, flag); |
| 1303 | |
| 1304 | if (dup_request) |
| 1305 | return -EALREADY; |
| 1306 | |
| 1307 | client = kzalloc(sizeof(*client), GFP_KERNEL); |
| 1308 | if (!client) |
| 1309 | return -ENOMEM; |
| 1310 | |
| 1311 | client->base.file_priv = file; |
| 1312 | client->base.pid = current->pid; |
| 1313 | client->base.event = &client->event; |
| 1314 | client->event.type = req_event->event; |
| 1315 | memcpy(&client->info, req_event, sizeof(client->info)); |
| 1316 | |
| 1317 | /* Get the count of clients that have registered for event. |
| 1318 | * Event should be enabled for first client, for subsequent enable |
| 1319 | * calls add to client list and return. |
| 1320 | */ |
| 1321 | count = msm_event_client_count(dev, req_event, false); |
| 1322 | /* Add current client to list */ |
| 1323 | spin_lock_irqsave(&dev->event_lock, flag); |
| 1324 | list_add_tail(&client->base.link, &priv->client_event_list); |
| 1325 | spin_unlock_irqrestore(&dev->event_lock, flag); |
| 1326 | |
| 1327 | if (count) |
| 1328 | return 0; |
| 1329 | |
| 1330 | ret = msm_register_event(dev, req_event, file, true); |
| 1331 | if (ret) { |
| 1332 | DRM_ERROR("failed to enable event %x object %x object id %d\n", |
| 1333 | req_event->event, req_event->object_type, |
| 1334 | req_event->object_id); |
| 1335 | spin_lock_irqsave(&dev->event_lock, flag); |
| 1336 | list_del(&client->base.link); |
| 1337 | spin_unlock_irqrestore(&dev->event_lock, flag); |
| 1338 | kfree(client); |
| 1339 | } |
| 1340 | return ret; |
| 1341 | } |
| 1342 | |
| 1343 | static int msm_ioctl_deregister_event(struct drm_device *dev, void *data, |
| 1344 | struct drm_file *file) |
| 1345 | { |
| 1346 | struct msm_drm_private *priv = dev->dev_private; |
| 1347 | struct drm_msm_event_req *req_event = data; |
| 1348 | struct msm_drm_event *client = NULL, *node, *temp; |
| 1349 | unsigned long flag = 0; |
| 1350 | int count = 0; |
| 1351 | bool found = false; |
| 1352 | int ret = 0; |
| 1353 | |
| 1354 | ret = msm_drm_object_supports_event(dev, req_event); |
| 1355 | if (ret) { |
| 1356 | DRM_ERROR("unsupported event %x object %x object id %d\n", |
| 1357 | req_event->event, req_event->object_type, |
| 1358 | req_event->object_id); |
| 1359 | return ret; |
| 1360 | } |
| 1361 | |
| 1362 | spin_lock_irqsave(&dev->event_lock, flag); |
| 1363 | list_for_each_entry_safe(node, temp, &priv->client_event_list, |
| 1364 | base.link) { |
| 1365 | if (node->event.type == req_event->event && |
| 1366 | node->info.object_id == req_event->object_id && |
| 1367 | node->base.file_priv == file) { |
| 1368 | client = node; |
| 1369 | list_del(&client->base.link); |
| 1370 | found = true; |
| 1371 | kfree(client); |
| 1372 | break; |
| 1373 | } |
| 1374 | } |
| 1375 | spin_unlock_irqrestore(&dev->event_lock, flag); |
| 1376 | |
| 1377 | if (!found) |
| 1378 | return -ENOENT; |
| 1379 | |
| 1380 | count = msm_event_client_count(dev, req_event, false); |
| 1381 | if (!count) |
| 1382 | ret = msm_register_event(dev, req_event, file, false); |
| 1383 | |
| 1384 | return ret; |
| 1385 | } |
| 1386 | |
Benjamin Chan | 34a92c7 | 2017-06-28 11:01:18 -0400 | [diff] [blame^] | 1387 | void msm_mode_object_event_notify(struct drm_mode_object *obj, |
Gopikrishnaiah Anandan | 84b4f67 | 2017-04-26 10:28:51 -0700 | [diff] [blame] | 1388 | struct drm_device *dev, struct drm_event *event, u8 *payload) |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1389 | { |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1390 | struct msm_drm_private *priv = NULL; |
| 1391 | unsigned long flags; |
| 1392 | struct msm_drm_event *notify, *node; |
| 1393 | int len = 0, ret; |
| 1394 | |
Gopikrishnaiah Anandan | 84b4f67 | 2017-04-26 10:28:51 -0700 | [diff] [blame] | 1395 | if (!obj || !event || !event->length || !payload) { |
| 1396 | DRM_ERROR("err param obj %pK event %pK len %d payload %pK\n", |
| 1397 | obj, event, ((event) ? (event->length) : -1), |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1398 | payload); |
| 1399 | return; |
| 1400 | } |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1401 | priv = (dev) ? dev->dev_private : NULL; |
| 1402 | if (!dev || !priv) { |
| 1403 | DRM_ERROR("invalid dev %pK priv %pK\n", dev, priv); |
| 1404 | return; |
| 1405 | } |
| 1406 | |
| 1407 | spin_lock_irqsave(&dev->event_lock, flags); |
| 1408 | list_for_each_entry(node, &priv->client_event_list, base.link) { |
| 1409 | if (node->event.type != event->type || |
Gopikrishnaiah Anandan | 84b4f67 | 2017-04-26 10:28:51 -0700 | [diff] [blame] | 1410 | obj->id != node->info.object_id) |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1411 | continue; |
| 1412 | len = event->length + sizeof(struct drm_msm_event_resp); |
| 1413 | if (node->base.file_priv->event_space < len) { |
| 1414 | DRM_ERROR("Insufficient space to notify\n"); |
| 1415 | continue; |
| 1416 | } |
| 1417 | notify = kzalloc(len, GFP_ATOMIC); |
| 1418 | if (!notify) |
| 1419 | continue; |
| 1420 | notify->base.file_priv = node->base.file_priv; |
| 1421 | notify->base.event = ¬ify->event; |
| 1422 | notify->base.pid = node->base.pid; |
| 1423 | notify->event.type = node->event.type; |
| 1424 | notify->event.length = len; |
| 1425 | memcpy(¬ify->info, &node->info, sizeof(notify->info)); |
| 1426 | memcpy(notify->data, payload, event->length); |
| 1427 | ret = drm_event_reserve_init_locked(dev, node->base.file_priv, |
| 1428 | ¬ify->base, ¬ify->event); |
| 1429 | if (ret) { |
| 1430 | kfree(notify); |
| 1431 | continue; |
| 1432 | } |
| 1433 | drm_send_event_locked(dev, ¬ify->base); |
| 1434 | } |
| 1435 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 1436 | } |
| 1437 | |
| 1438 | static int msm_release(struct inode *inode, struct file *filp) |
| 1439 | { |
| 1440 | struct drm_file *file_priv = filp->private_data; |
| 1441 | struct drm_minor *minor = file_priv->minor; |
| 1442 | struct drm_device *dev = minor->dev; |
| 1443 | struct msm_drm_private *priv = dev->dev_private; |
| 1444 | struct msm_drm_event *node, *temp; |
| 1445 | u32 count; |
| 1446 | unsigned long flags; |
| 1447 | |
| 1448 | spin_lock_irqsave(&dev->event_lock, flags); |
| 1449 | list_for_each_entry_safe(node, temp, &priv->client_event_list, |
| 1450 | base.link) { |
| 1451 | if (node->base.file_priv != file_priv) |
| 1452 | continue; |
| 1453 | list_del(&node->base.link); |
| 1454 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 1455 | count = msm_event_client_count(dev, &node->info, true); |
| 1456 | if (!count) |
| 1457 | msm_register_event(dev, &node->info, file_priv, false); |
| 1458 | kfree(node); |
| 1459 | spin_lock_irqsave(&dev->event_lock, flags); |
| 1460 | } |
| 1461 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 1462 | |
| 1463 | return drm_release(inode, filp); |
| 1464 | } |
| 1465 | |
Lloyd Atkinson | f76121a | 2017-01-30 17:30:55 -0500 | [diff] [blame] | 1466 | /** |
| 1467 | * msm_drv_framebuffer_remove - remove and unreference a framebuffer object |
| 1468 | * @fb: framebuffer to remove |
| 1469 | */ |
| 1470 | void msm_drv_framebuffer_remove(struct drm_framebuffer *fb) |
| 1471 | { |
| 1472 | struct drm_device *dev; |
| 1473 | |
| 1474 | if (!fb) |
| 1475 | return; |
| 1476 | |
| 1477 | dev = fb->dev; |
| 1478 | |
| 1479 | WARN_ON(!list_empty(&fb->filp_head)); |
| 1480 | |
| 1481 | drm_framebuffer_unreference(fb); |
| 1482 | } |
| 1483 | |
| 1484 | struct msm_drv_rmfb2_work { |
| 1485 | struct work_struct work; |
| 1486 | struct list_head fbs; |
| 1487 | }; |
| 1488 | |
| 1489 | static void msm_drv_rmfb2_work_fn(struct work_struct *w) |
| 1490 | { |
| 1491 | struct msm_drv_rmfb2_work *arg = container_of(w, typeof(*arg), work); |
| 1492 | |
| 1493 | while (!list_empty(&arg->fbs)) { |
| 1494 | struct drm_framebuffer *fb = |
| 1495 | list_first_entry(&arg->fbs, typeof(*fb), filp_head); |
| 1496 | |
| 1497 | list_del_init(&fb->filp_head); |
| 1498 | msm_drv_framebuffer_remove(fb); |
| 1499 | } |
| 1500 | } |
| 1501 | |
| 1502 | /** |
| 1503 | * msm_ioctl_rmfb2 - remove an FB from the configuration |
| 1504 | * @dev: drm device for the ioctl |
| 1505 | * @data: data pointer for the ioctl |
| 1506 | * @file_priv: drm file for the ioctl call |
| 1507 | * |
| 1508 | * Remove the FB specified by the user. |
| 1509 | * |
| 1510 | * Called by the user via ioctl. |
| 1511 | * |
| 1512 | * Returns: |
| 1513 | * Zero on success, negative errno on failure. |
| 1514 | */ |
| 1515 | int msm_ioctl_rmfb2(struct drm_device *dev, void *data, |
| 1516 | struct drm_file *file_priv) |
| 1517 | { |
| 1518 | struct drm_framebuffer *fb = NULL; |
| 1519 | struct drm_framebuffer *fbl = NULL; |
| 1520 | uint32_t *id = data; |
| 1521 | int found = 0; |
| 1522 | |
| 1523 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) |
| 1524 | return -EINVAL; |
| 1525 | |
| 1526 | fb = drm_framebuffer_lookup(dev, *id); |
| 1527 | if (!fb) |
| 1528 | return -ENOENT; |
| 1529 | |
| 1530 | /* drop extra ref from traversing drm_framebuffer_lookup */ |
| 1531 | drm_framebuffer_unreference(fb); |
| 1532 | |
| 1533 | mutex_lock(&file_priv->fbs_lock); |
| 1534 | list_for_each_entry(fbl, &file_priv->fbs, filp_head) |
| 1535 | if (fb == fbl) |
| 1536 | found = 1; |
| 1537 | if (!found) { |
| 1538 | mutex_unlock(&file_priv->fbs_lock); |
| 1539 | return -ENOENT; |
| 1540 | } |
| 1541 | |
| 1542 | list_del_init(&fb->filp_head); |
| 1543 | mutex_unlock(&file_priv->fbs_lock); |
| 1544 | |
| 1545 | /* |
| 1546 | * we now own the reference that was stored in the fbs list |
| 1547 | * |
| 1548 | * drm_framebuffer_remove may fail with -EINTR on pending signals, |
| 1549 | * so run this in a separate stack as there's no way to correctly |
| 1550 | * handle this after the fb is already removed from the lookup table. |
| 1551 | */ |
| 1552 | if (drm_framebuffer_read_refcount(fb) > 1) { |
| 1553 | struct msm_drv_rmfb2_work arg; |
| 1554 | |
| 1555 | INIT_WORK_ONSTACK(&arg.work, msm_drv_rmfb2_work_fn); |
| 1556 | INIT_LIST_HEAD(&arg.fbs); |
| 1557 | list_add_tail(&fb->filp_head, &arg.fbs); |
| 1558 | |
| 1559 | schedule_work(&arg.work); |
| 1560 | flush_work(&arg.work); |
| 1561 | destroy_work_on_stack(&arg.work); |
| 1562 | } else |
| 1563 | drm_framebuffer_unreference(fb); |
| 1564 | |
| 1565 | return 0; |
| 1566 | } |
| 1567 | EXPORT_SYMBOL(msm_ioctl_rmfb2); |
| 1568 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1569 | static const struct drm_ioctl_desc msm_ioctls[] = { |
Daniel Vetter | f8c4714 | 2015-09-08 13:56:30 +0200 | [diff] [blame] | 1570 | DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1571 | DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1572 | DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1573 | DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1574 | DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1575 | DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1576 | DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_AUTH|DRM_RENDER_ALLOW), |
Rob Clark | 4cd33c4 | 2016-05-17 15:44:49 -0400 | [diff] [blame] | 1577 | DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_AUTH|DRM_RENDER_ALLOW), |
Alan Kwong | bb27c09 | 2016-07-20 16:41:25 -0400 | [diff] [blame] | 1578 | DRM_IOCTL_DEF_DRV(SDE_WB_CONFIG, sde_wb_config, DRM_UNLOCKED|DRM_AUTH), |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1579 | DRM_IOCTL_DEF_DRV(MSM_REGISTER_EVENT, msm_ioctl_register_event, |
| 1580 | DRM_UNLOCKED|DRM_CONTROL_ALLOW), |
| 1581 | DRM_IOCTL_DEF_DRV(MSM_DEREGISTER_EVENT, msm_ioctl_deregister_event, |
| 1582 | DRM_UNLOCKED|DRM_CONTROL_ALLOW), |
Lloyd Atkinson | f76121a | 2017-01-30 17:30:55 -0500 | [diff] [blame] | 1583 | DRM_IOCTL_DEF_DRV(MSM_RMFB2, msm_ioctl_rmfb2, |
| 1584 | DRM_CONTROL_ALLOW|DRM_UNLOCKED), |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1585 | }; |
| 1586 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1587 | static const struct vm_operations_struct vm_ops = { |
| 1588 | .fault = msm_gem_fault, |
| 1589 | .open = drm_gem_vm_open, |
| 1590 | .close = drm_gem_vm_close, |
| 1591 | }; |
| 1592 | |
| 1593 | static const struct file_operations fops = { |
| 1594 | .owner = THIS_MODULE, |
| 1595 | .open = drm_open, |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1596 | .release = msm_release, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1597 | .unlocked_ioctl = drm_ioctl, |
| 1598 | #ifdef CONFIG_COMPAT |
| 1599 | .compat_ioctl = drm_compat_ioctl, |
| 1600 | #endif |
| 1601 | .poll = drm_poll, |
| 1602 | .read = drm_read, |
| 1603 | .llseek = no_llseek, |
| 1604 | .mmap = msm_gem_mmap, |
| 1605 | }; |
| 1606 | |
| 1607 | static struct drm_driver msm_driver = { |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 1608 | .driver_features = DRIVER_HAVE_IRQ | |
| 1609 | DRIVER_GEM | |
| 1610 | DRIVER_PRIME | |
Rob Clark | b4b15c8 | 2013-09-28 12:01:25 -0400 | [diff] [blame] | 1611 | DRIVER_RENDER | |
Rob Clark | a5436e1 | 2015-06-04 10:12:22 -0400 | [diff] [blame] | 1612 | DRIVER_ATOMIC | |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 1613 | DRIVER_MODESET, |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1614 | .open = msm_open, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1615 | .preclose = msm_preclose, |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 1616 | .postclose = msm_postclose, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1617 | .lastclose = msm_lastclose, |
| 1618 | .irq_handler = msm_irq, |
| 1619 | .irq_preinstall = msm_irq_preinstall, |
| 1620 | .irq_postinstall = msm_irq_postinstall, |
| 1621 | .irq_uninstall = msm_irq_uninstall, |
Ville Syrjälä | b44f840 | 2015-09-30 16:46:48 +0300 | [diff] [blame] | 1622 | .get_vblank_counter = drm_vblank_no_hw_counter, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1623 | .enable_vblank = msm_enable_vblank, |
| 1624 | .disable_vblank = msm_disable_vblank, |
| 1625 | .gem_free_object = msm_gem_free_object, |
| 1626 | .gem_vm_ops = &vm_ops, |
| 1627 | .dumb_create = msm_gem_dumb_create, |
| 1628 | .dumb_map_offset = msm_gem_dumb_map_offset, |
Rob Clark | 30600a909 | 2013-09-28 10:13:04 -0400 | [diff] [blame] | 1629 | .dumb_destroy = drm_gem_dumb_destroy, |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 1630 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
| 1631 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, |
| 1632 | .gem_prime_export = drm_gem_prime_export, |
| 1633 | .gem_prime_import = drm_gem_prime_import, |
Eric Anholt | b3a42bb | 2017-04-12 12:11:58 -0700 | [diff] [blame] | 1634 | .gem_prime_res_obj = msm_gem_prime_res_obj, |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 1635 | .gem_prime_pin = msm_gem_prime_pin, |
| 1636 | .gem_prime_unpin = msm_gem_prime_unpin, |
| 1637 | .gem_prime_get_sg_table = msm_gem_prime_get_sg_table, |
| 1638 | .gem_prime_import_sg_table = msm_gem_prime_import_sg_table, |
| 1639 | .gem_prime_vmap = msm_gem_prime_vmap, |
| 1640 | .gem_prime_vunmap = msm_gem_prime_vunmap, |
Daniel Thompson | 77a147e | 2014-11-12 11:38:14 +0000 | [diff] [blame] | 1641 | .gem_prime_mmap = msm_gem_prime_mmap, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1642 | #ifdef CONFIG_DEBUG_FS |
| 1643 | .debugfs_init = msm_debugfs_init, |
| 1644 | .debugfs_cleanup = msm_debugfs_cleanup, |
| 1645 | #endif |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1646 | .ioctls = msm_ioctls, |
Jordan Crouse | 1023e9b | 2017-03-07 11:14:04 -0700 | [diff] [blame] | 1647 | .num_ioctls = ARRAY_SIZE(msm_ioctls), |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1648 | .fops = &fops, |
Stephane Viau | aa6ed8b | 2016-07-19 12:59:42 -0400 | [diff] [blame] | 1649 | .name = "msm_drm", |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1650 | .desc = "MSM Snapdragon DRM", |
| 1651 | .date = "20130625", |
Rob Clark | a8d854c | 2016-06-01 14:02:02 -0400 | [diff] [blame] | 1652 | .major = MSM_VERSION_MAJOR, |
| 1653 | .minor = MSM_VERSION_MINOR, |
| 1654 | .patchlevel = MSM_VERSION_PATCHLEVEL, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1655 | }; |
| 1656 | |
| 1657 | #ifdef CONFIG_PM_SLEEP |
| 1658 | static int msm_pm_suspend(struct device *dev) |
| 1659 | { |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1660 | struct drm_device *ddev; |
| 1661 | struct drm_modeset_acquire_ctx ctx; |
| 1662 | struct drm_connector *conn; |
| 1663 | struct drm_atomic_state *state; |
| 1664 | struct drm_crtc_state *crtc_state; |
| 1665 | struct msm_drm_private *priv; |
| 1666 | int ret = 0; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1667 | |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1668 | if (!dev) |
| 1669 | return -EINVAL; |
| 1670 | |
| 1671 | ddev = dev_get_drvdata(dev); |
| 1672 | if (!ddev || !ddev->dev_private) |
| 1673 | return -EINVAL; |
| 1674 | |
| 1675 | priv = ddev->dev_private; |
| 1676 | SDE_EVT32(0); |
| 1677 | |
| 1678 | /* acquire modeset lock(s) */ |
| 1679 | drm_modeset_acquire_init(&ctx, 0); |
| 1680 | |
| 1681 | retry: |
| 1682 | ret = drm_modeset_lock_all_ctx(ddev, &ctx); |
| 1683 | if (ret) |
| 1684 | goto unlock; |
| 1685 | |
| 1686 | /* save current state for resume */ |
| 1687 | if (priv->suspend_state) |
| 1688 | drm_atomic_state_free(priv->suspend_state); |
| 1689 | priv->suspend_state = drm_atomic_helper_duplicate_state(ddev, &ctx); |
| 1690 | if (IS_ERR_OR_NULL(priv->suspend_state)) { |
| 1691 | DRM_ERROR("failed to back up suspend state\n"); |
| 1692 | priv->suspend_state = NULL; |
| 1693 | goto unlock; |
| 1694 | } |
| 1695 | |
| 1696 | /* create atomic state to disable all CRTCs */ |
| 1697 | state = drm_atomic_state_alloc(ddev); |
| 1698 | if (IS_ERR_OR_NULL(state)) { |
| 1699 | DRM_ERROR("failed to allocate crtc disable state\n"); |
| 1700 | goto unlock; |
| 1701 | } |
| 1702 | |
| 1703 | state->acquire_ctx = &ctx; |
| 1704 | drm_for_each_connector(conn, ddev) { |
| 1705 | |
| 1706 | if (!conn->state || !conn->state->crtc || |
| 1707 | conn->dpms != DRM_MODE_DPMS_ON) |
| 1708 | continue; |
| 1709 | |
| 1710 | /* force CRTC to be inactive */ |
| 1711 | crtc_state = drm_atomic_get_crtc_state(state, |
| 1712 | conn->state->crtc); |
| 1713 | if (IS_ERR_OR_NULL(crtc_state)) { |
| 1714 | DRM_ERROR("failed to get crtc %d state\n", |
| 1715 | conn->state->crtc->base.id); |
| 1716 | drm_atomic_state_free(state); |
| 1717 | goto unlock; |
| 1718 | } |
| 1719 | crtc_state->active = false; |
| 1720 | } |
| 1721 | |
| 1722 | /* commit the "disable all" state */ |
| 1723 | ret = drm_atomic_commit(state); |
| 1724 | if (ret < 0) { |
| 1725 | DRM_ERROR("failed to disable crtcs, %d\n", ret); |
| 1726 | drm_atomic_state_free(state); |
Clarence Ip | a65cba5 | 2017-03-17 15:18:29 -0400 | [diff] [blame] | 1727 | } else { |
| 1728 | priv->suspend_block = true; |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1729 | } |
| 1730 | |
| 1731 | unlock: |
| 1732 | if (ret == -EDEADLK) { |
| 1733 | drm_modeset_backoff(&ctx); |
| 1734 | goto retry; |
| 1735 | } |
| 1736 | drm_modeset_drop_locks(&ctx); |
| 1737 | drm_modeset_acquire_fini(&ctx); |
| 1738 | |
| 1739 | /* disable hot-plug polling */ |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1740 | drm_kms_helper_poll_disable(ddev); |
| 1741 | |
| 1742 | return 0; |
| 1743 | } |
| 1744 | |
| 1745 | static int msm_pm_resume(struct device *dev) |
| 1746 | { |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1747 | struct drm_device *ddev; |
| 1748 | struct msm_drm_private *priv; |
| 1749 | int ret; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1750 | |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1751 | if (!dev) |
| 1752 | return -EINVAL; |
| 1753 | |
| 1754 | ddev = dev_get_drvdata(dev); |
| 1755 | if (!ddev || !ddev->dev_private) |
| 1756 | return -EINVAL; |
| 1757 | |
| 1758 | priv = ddev->dev_private; |
| 1759 | |
| 1760 | SDE_EVT32(priv->suspend_state != NULL); |
| 1761 | |
| 1762 | drm_mode_config_reset(ddev); |
| 1763 | |
| 1764 | drm_modeset_lock_all(ddev); |
| 1765 | |
Clarence Ip | a65cba5 | 2017-03-17 15:18:29 -0400 | [diff] [blame] | 1766 | priv->suspend_block = false; |
| 1767 | |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1768 | if (priv->suspend_state) { |
| 1769 | priv->suspend_state->acquire_ctx = |
| 1770 | ddev->mode_config.acquire_ctx; |
| 1771 | ret = drm_atomic_commit(priv->suspend_state); |
| 1772 | if (ret < 0) { |
| 1773 | DRM_ERROR("failed to restore state, %d\n", ret); |
| 1774 | drm_atomic_state_free(priv->suspend_state); |
| 1775 | } |
| 1776 | priv->suspend_state = NULL; |
| 1777 | } |
| 1778 | drm_modeset_unlock_all(ddev); |
| 1779 | |
| 1780 | /* enable hot-plug polling */ |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1781 | drm_kms_helper_poll_enable(ddev); |
| 1782 | |
| 1783 | return 0; |
| 1784 | } |
| 1785 | #endif |
| 1786 | |
| 1787 | static const struct dev_pm_ops msm_pm_ops = { |
| 1788 | SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume) |
| 1789 | }; |
| 1790 | |
| 1791 | /* |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 1792 | * Componentized driver support: |
| 1793 | */ |
| 1794 | |
Archit Taneja | e9fbdaf | 2015-11-18 12:15:14 +0530 | [diff] [blame] | 1795 | /* |
| 1796 | * NOTE: duplication of the same code as exynos or imx (or probably any other). |
| 1797 | * so probably some room for some helpers |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 1798 | */ |
| 1799 | static int compare_of(struct device *dev, void *data) |
| 1800 | { |
| 1801 | return dev->of_node == data; |
| 1802 | } |
Rob Clark | 41e6977 | 2013-12-15 16:23:05 -0500 | [diff] [blame] | 1803 | |
Archit Taneja | 812070e | 2016-05-19 10:38:39 +0530 | [diff] [blame] | 1804 | /* |
| 1805 | * Identify what components need to be added by parsing what remote-endpoints |
| 1806 | * our MDP output ports are connected to. In the case of LVDS on MDP4, there |
| 1807 | * is no external component that we need to add since LVDS is within MDP4 |
| 1808 | * itself. |
| 1809 | */ |
| 1810 | static int add_components_mdp(struct device *mdp_dev, |
| 1811 | struct component_match **matchptr) |
| 1812 | { |
| 1813 | struct device_node *np = mdp_dev->of_node; |
| 1814 | struct device_node *ep_node; |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1815 | struct device *master_dev; |
| 1816 | |
| 1817 | /* |
| 1818 | * on MDP4 based platforms, the MDP platform device is the component |
| 1819 | * master that adds other display interface components to itself. |
| 1820 | * |
| 1821 | * on MDP5 based platforms, the MDSS platform device is the component |
| 1822 | * master that adds MDP5 and other display interface components to |
| 1823 | * itself. |
| 1824 | */ |
| 1825 | if (of_device_is_compatible(np, "qcom,mdp4")) |
| 1826 | master_dev = mdp_dev; |
| 1827 | else |
| 1828 | master_dev = mdp_dev->parent; |
Archit Taneja | 812070e | 2016-05-19 10:38:39 +0530 | [diff] [blame] | 1829 | |
| 1830 | for_each_endpoint_of_node(np, ep_node) { |
| 1831 | struct device_node *intf; |
| 1832 | struct of_endpoint ep; |
| 1833 | int ret; |
| 1834 | |
| 1835 | ret = of_graph_parse_endpoint(ep_node, &ep); |
| 1836 | if (ret) { |
| 1837 | dev_err(mdp_dev, "unable to parse port endpoint\n"); |
| 1838 | of_node_put(ep_node); |
| 1839 | return ret; |
| 1840 | } |
| 1841 | |
| 1842 | /* |
| 1843 | * The LCDC/LVDS port on MDP4 is a speacial case where the |
| 1844 | * remote-endpoint isn't a component that we need to add |
| 1845 | */ |
| 1846 | if (of_device_is_compatible(np, "qcom,mdp4") && |
| 1847 | ep.port == 0) { |
| 1848 | of_node_put(ep_node); |
| 1849 | continue; |
| 1850 | } |
| 1851 | |
| 1852 | /* |
| 1853 | * It's okay if some of the ports don't have a remote endpoint |
| 1854 | * specified. It just means that the port isn't connected to |
| 1855 | * any external interface. |
| 1856 | */ |
| 1857 | intf = of_graph_get_remote_port_parent(ep_node); |
| 1858 | if (!intf) { |
| 1859 | of_node_put(ep_node); |
| 1860 | continue; |
| 1861 | } |
| 1862 | |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1863 | component_match_add(master_dev, matchptr, compare_of, intf); |
Archit Taneja | 812070e | 2016-05-19 10:38:39 +0530 | [diff] [blame] | 1864 | |
| 1865 | of_node_put(intf); |
| 1866 | of_node_put(ep_node); |
| 1867 | } |
| 1868 | |
| 1869 | return 0; |
| 1870 | } |
| 1871 | |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1872 | static int compare_name_mdp(struct device *dev, void *data) |
| 1873 | { |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1874 | return (strnstr(dev_name(dev), "mdp", strlen("mdp")) != NULL); |
| 1875 | } |
| 1876 | |
| 1877 | static int add_display_components(struct device *dev, |
| 1878 | struct component_match **matchptr) |
| 1879 | { |
| 1880 | struct device *mdp_dev = NULL; |
Shashank Babu Chinta Venkata | ded9c56 | 2017-03-15 14:43:46 -0700 | [diff] [blame] | 1881 | struct device_node *node; |
| 1882 | const char *name; |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1883 | int ret; |
| 1884 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1885 | if (of_device_is_compatible(dev->of_node, "qcom,sde-kms")) { |
| 1886 | struct device_node *np = dev->of_node; |
| 1887 | unsigned int i; |
| 1888 | |
Shashank Babu Chinta Venkata | ded9c56 | 2017-03-15 14:43:46 -0700 | [diff] [blame] | 1889 | for (i = 0; i < MAX_DSI_ACTIVE_DISPLAY; i++) { |
| 1890 | node = dsi_display_get_boot_display(i); |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1891 | |
Shashank Babu Chinta Venkata | ded9c56 | 2017-03-15 14:43:46 -0700 | [diff] [blame] | 1892 | if (node != NULL) { |
| 1893 | name = of_get_property(node, "label", NULL); |
| 1894 | component_match_add(dev, matchptr, compare_of, |
| 1895 | node); |
| 1896 | pr_debug("Added component = %s\n", name); |
| 1897 | } |
| 1898 | } |
| 1899 | |
| 1900 | for (i = 0; ; i++) { |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1901 | node = of_parse_phandle(np, "connectors", i); |
| 1902 | if (!node) |
| 1903 | break; |
| 1904 | |
| 1905 | component_match_add(dev, matchptr, compare_of, node); |
| 1906 | } |
| 1907 | return 0; |
| 1908 | } |
| 1909 | |
| 1910 | /* |
| 1911 | * MDP5 based devices don't have a flat hierarchy. There is a top level |
| 1912 | * parent: MDSS, and children: MDP5, DSI, HDMI, eDP etc. Populate the |
| 1913 | * children devices, find the MDP5 node, and then add the interfaces |
| 1914 | * to our components list. |
| 1915 | */ |
| 1916 | if (of_device_is_compatible(dev->of_node, "qcom,mdss")) { |
| 1917 | ret = of_platform_populate(dev->of_node, NULL, NULL, dev); |
| 1918 | if (ret) { |
| 1919 | dev_err(dev, "failed to populate children devices\n"); |
| 1920 | return ret; |
| 1921 | } |
| 1922 | |
| 1923 | mdp_dev = device_find_child(dev, NULL, compare_name_mdp); |
| 1924 | if (!mdp_dev) { |
| 1925 | dev_err(dev, "failed to find MDSS MDP node\n"); |
| 1926 | of_platform_depopulate(dev); |
| 1927 | return -ENODEV; |
| 1928 | } |
| 1929 | |
| 1930 | put_device(mdp_dev); |
| 1931 | |
| 1932 | /* add the MDP component itself */ |
| 1933 | component_match_add(dev, matchptr, compare_of, |
| 1934 | mdp_dev->of_node); |
| 1935 | } else { |
| 1936 | /* MDP4 */ |
| 1937 | mdp_dev = dev; |
| 1938 | } |
| 1939 | |
| 1940 | ret = add_components_mdp(mdp_dev, matchptr); |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1941 | if (ret) |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1942 | of_platform_depopulate(dev); |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1943 | |
| 1944 | return ret; |
Archit Taneja | 7d526fc | 2016-05-19 10:33:57 +0530 | [diff] [blame] | 1945 | } |
| 1946 | |
Archit Taneja | dc3ea26 | 2016-05-19 13:33:52 +0530 | [diff] [blame] | 1947 | /* |
| 1948 | * We don't know what's the best binding to link the gpu with the drm device. |
| 1949 | * Fow now, we just hunt for all the possible gpus that we support, and add them |
| 1950 | * as components. |
| 1951 | */ |
| 1952 | static const struct of_device_id msm_gpu_match[] = { |
| 1953 | { .compatible = "qcom,adreno-3xx" }, |
| 1954 | { .compatible = "qcom,kgsl-3d0" }, |
| 1955 | { }, |
| 1956 | }; |
| 1957 | |
Dhaval Patel | 169bf3a | 2017-04-11 11:00:57 -0700 | [diff] [blame] | 1958 | #ifdef CONFIG_QCOM_KGSL |
| 1959 | static int add_gpu_components(struct device *dev, |
| 1960 | struct component_match **matchptr) |
| 1961 | { |
| 1962 | return 0; |
| 1963 | } |
| 1964 | #else |
Archit Taneja | 7d526fc | 2016-05-19 10:33:57 +0530 | [diff] [blame] | 1965 | static int add_gpu_components(struct device *dev, |
| 1966 | struct component_match **matchptr) |
| 1967 | { |
Archit Taneja | dc3ea26 | 2016-05-19 13:33:52 +0530 | [diff] [blame] | 1968 | struct device_node *np; |
| 1969 | |
| 1970 | np = of_find_matching_node(NULL, msm_gpu_match); |
| 1971 | if (!np) |
| 1972 | return 0; |
| 1973 | |
| 1974 | component_match_add(dev, matchptr, compare_of, np); |
| 1975 | |
| 1976 | of_node_put(np); |
| 1977 | |
| 1978 | return 0; |
Archit Taneja | 7d526fc | 2016-05-19 10:33:57 +0530 | [diff] [blame] | 1979 | } |
Dhaval Patel | 169bf3a | 2017-04-11 11:00:57 -0700 | [diff] [blame] | 1980 | #endif |
Archit Taneja | 7d526fc | 2016-05-19 10:33:57 +0530 | [diff] [blame] | 1981 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1982 | static int msm_drm_bind(struct device *dev) |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 1983 | { |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 1984 | return msm_drm_init(dev, &msm_driver); |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 1985 | } |
| 1986 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1987 | static void msm_drm_unbind(struct device *dev) |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 1988 | { |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 1989 | msm_drm_uninit(dev); |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 1990 | } |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1991 | |
| 1992 | static const struct component_master_ops msm_drm_ops = { |
| 1993 | .bind = msm_drm_bind, |
| 1994 | .unbind = msm_drm_unbind, |
| 1995 | }; |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 1996 | |
| 1997 | /* |
| 1998 | * Platform driver: |
| 1999 | */ |
| 2000 | |
| 2001 | static int msm_pdev_probe(struct platform_device *pdev) |
| 2002 | { |
Dhaval Patel | 3949f03 | 2016-06-20 16:24:33 -0700 | [diff] [blame] | 2003 | int ret; |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 2004 | struct component_match *match = NULL; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 2005 | |
Archit Taneja | 7d526fc | 2016-05-19 10:33:57 +0530 | [diff] [blame] | 2006 | ret = add_display_components(&pdev->dev, &match); |
| 2007 | if (ret) |
| 2008 | return ret; |
| 2009 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 2010 | ret = add_gpu_components(&pdev->dev, &match); |
| 2011 | if (ret) |
| 2012 | return ret; |
Dhaval Patel | 3949f03 | 2016-06-20 16:24:33 -0700 | [diff] [blame] | 2013 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 2014 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); |
| 2015 | return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 2016 | } |
| 2017 | |
| 2018 | static int msm_pdev_remove(struct platform_device *pdev) |
| 2019 | { |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 2020 | component_master_del(&pdev->dev, &msm_drm_ops); |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 2021 | of_platform_depopulate(&pdev->dev); |
| 2022 | |
| 2023 | msm_drm_unbind(&pdev->dev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 2024 | return 0; |
| 2025 | } |
| 2026 | |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 2027 | static const struct of_device_id dt_match[] = { |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 2028 | { .compatible = "qcom,mdp4", .data = (void *)4 }, /* MDP4 */ |
| 2029 | { .compatible = "qcom,mdss", .data = (void *)5 }, /* MDP5 MDSS */ |
| 2030 | { .compatible = "qcom,sde-kms", .data = (void *)3 }, /* sde */ |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 2031 | {} |
| 2032 | }; |
| 2033 | MODULE_DEVICE_TABLE(of, dt_match); |
| 2034 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 2035 | static struct platform_driver msm_platform_driver = { |
| 2036 | .probe = msm_pdev_probe, |
| 2037 | .remove = msm_pdev_remove, |
| 2038 | .driver = { |
Stephane Viau | aa6ed8b | 2016-07-19 12:59:42 -0400 | [diff] [blame] | 2039 | .name = "msm_drm", |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 2040 | .of_match_table = dt_match, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 2041 | .pm = &msm_pm_ops, |
| 2042 | }, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 2043 | }; |
| 2044 | |
Stephane Viau | 32f13f6 | 2015-04-29 15:57:29 -0400 | [diff] [blame] | 2045 | #ifdef CONFIG_QCOM_KGSL |
| 2046 | void __init adreno_register(void) |
| 2047 | { |
| 2048 | } |
| 2049 | |
| 2050 | void __exit adreno_unregister(void) |
| 2051 | { |
| 2052 | } |
| 2053 | #endif |
| 2054 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 2055 | static int __init msm_drm_register(void) |
| 2056 | { |
| 2057 | DBG("init"); |
Hai Li | d5af49c | 2015-03-26 19:25:17 -0400 | [diff] [blame] | 2058 | msm_dsi_register(); |
Hai Li | 0045398 | 2014-12-12 14:41:17 -0500 | [diff] [blame] | 2059 | msm_edp_register(); |
Arnd Bergmann | fcda50c | 2016-02-22 22:08:35 +0100 | [diff] [blame] | 2060 | msm_hdmi_register(); |
Rob Clark | bfd28b1 | 2014-09-05 13:06:37 -0400 | [diff] [blame] | 2061 | adreno_register(); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 2062 | return platform_driver_register(&msm_platform_driver); |
| 2063 | } |
| 2064 | |
| 2065 | static void __exit msm_drm_unregister(void) |
| 2066 | { |
| 2067 | DBG("fini"); |
| 2068 | platform_driver_unregister(&msm_platform_driver); |
Arnd Bergmann | fcda50c | 2016-02-22 22:08:35 +0100 | [diff] [blame] | 2069 | msm_hdmi_unregister(); |
Rob Clark | bfd28b1 | 2014-09-05 13:06:37 -0400 | [diff] [blame] | 2070 | adreno_unregister(); |
Hai Li | 0045398 | 2014-12-12 14:41:17 -0500 | [diff] [blame] | 2071 | msm_edp_unregister(); |
Hai Li | d5af49c | 2015-03-26 19:25:17 -0400 | [diff] [blame] | 2072 | msm_dsi_unregister(); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 2073 | } |
| 2074 | |
| 2075 | module_init(msm_drm_register); |
| 2076 | module_exit(msm_drm_unregister); |
| 2077 | |
| 2078 | MODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); |
| 2079 | MODULE_DESCRIPTION("MSM DRM Driver"); |
| 2080 | MODULE_LICENSE("GPL"); |