blob: c9dba46f52af9c65d2e4896166b6b3e21f145f14 [file] [log] [blame]
Chris Wilson1d8e1c72010-08-07 11:01:28 +01001/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
Joe Perchesa70491c2012-03-18 13:00:11 -070031#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
Carsten Emde7bd90902012-03-15 15:56:25 +010033#include <linux/moduleparam.h>
Chris Wilson1d8e1c72010-08-07 11:01:28 +010034#include "intel_drv.h"
35
Takashi Iwaiba3820a2011-03-10 14:02:12 +010036#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
37
Chris Wilson1d8e1c72010-08-07 11:01:28 +010038void
Ville Syrjälä4c6df4b2013-09-02 21:13:39 +030039intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
Chris Wilson1d8e1c72010-08-07 11:01:28 +010040 struct drm_display_mode *adjusted_mode)
41{
Ville Syrjälä4c6df4b2013-09-02 21:13:39 +030042 drm_mode_copy(adjusted_mode, fixed_mode);
Imre Deaka52690e2013-08-27 12:24:09 +030043
44 drm_mode_set_crtcinfo(adjusted_mode, 0);
Chris Wilson1d8e1c72010-08-07 11:01:28 +010045}
46
47/* adjusted_mode has been preset to be the panel's fixed mode */
48void
Jesse Barnesb074cec2013-04-25 12:55:02 -070049intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
50 struct intel_crtc_config *pipe_config,
51 int fitting_mode)
Chris Wilson1d8e1c72010-08-07 11:01:28 +010052{
Ville Syrjälä37327ab2013-09-04 18:25:28 +030053 struct drm_display_mode *adjusted_mode;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010054 int x, y, width, height;
55
Jesse Barnesb074cec2013-04-25 12:55:02 -070056 adjusted_mode = &pipe_config->adjusted_mode;
57
Chris Wilson1d8e1c72010-08-07 11:01:28 +010058 x = y = width = height = 0;
59
60 /* Native modes don't need fitting */
Ville Syrjälä37327ab2013-09-04 18:25:28 +030061 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
62 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
Chris Wilson1d8e1c72010-08-07 11:01:28 +010063 goto done;
64
65 switch (fitting_mode) {
66 case DRM_MODE_SCALE_CENTER:
Ville Syrjälä37327ab2013-09-04 18:25:28 +030067 width = pipe_config->pipe_src_w;
68 height = pipe_config->pipe_src_h;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010069 x = (adjusted_mode->hdisplay - width + 1)/2;
70 y = (adjusted_mode->vdisplay - height + 1)/2;
71 break;
72
73 case DRM_MODE_SCALE_ASPECT:
74 /* Scale but preserve the aspect ratio */
75 {
Ville Syrjälä37327ab2013-09-04 18:25:28 +030076 u32 scaled_width = adjusted_mode->hdisplay * pipe_config->pipe_src_h;
77 u32 scaled_height = pipe_config->pipe_src_w * adjusted_mode->vdisplay;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010078 if (scaled_width > scaled_height) { /* pillar */
Ville Syrjälä37327ab2013-09-04 18:25:28 +030079 width = scaled_height / pipe_config->pipe_src_h;
Adam Jackson302983e2011-07-13 16:32:32 -040080 if (width & 1)
Akshay Joshi0206e352011-08-16 15:34:10 -040081 width++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010082 x = (adjusted_mode->hdisplay - width + 1) / 2;
83 y = 0;
84 height = adjusted_mode->vdisplay;
85 } else if (scaled_width < scaled_height) { /* letter */
Ville Syrjälä37327ab2013-09-04 18:25:28 +030086 height = scaled_width / pipe_config->pipe_src_w;
Adam Jackson302983e2011-07-13 16:32:32 -040087 if (height & 1)
88 height++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010089 y = (adjusted_mode->vdisplay - height + 1) / 2;
90 x = 0;
91 width = adjusted_mode->hdisplay;
92 } else {
93 x = y = 0;
94 width = adjusted_mode->hdisplay;
95 height = adjusted_mode->vdisplay;
96 }
97 }
98 break;
99
Chris Wilson1d8e1c72010-08-07 11:01:28 +0100100 case DRM_MODE_SCALE_FULLSCREEN:
101 x = y = 0;
102 width = adjusted_mode->hdisplay;
103 height = adjusted_mode->vdisplay;
104 break;
Jesse Barnesab3e67f2013-04-25 12:55:03 -0700105
106 default:
107 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
108 return;
Chris Wilson1d8e1c72010-08-07 11:01:28 +0100109 }
110
111done:
Jesse Barnesb074cec2013-04-25 12:55:02 -0700112 pipe_config->pch_pfit.pos = (x << 16) | y;
113 pipe_config->pch_pfit.size = (width << 16) | height;
Chris Wilson1d8e1c72010-08-07 11:01:28 +0100114}
Chris Wilsona9573552010-08-22 13:18:16 +0100115
Jesse Barnes2dd24552013-04-25 12:55:01 -0700116static void
117centre_horizontally(struct drm_display_mode *mode,
118 int width)
119{
120 u32 border, sync_pos, blank_width, sync_width;
121
122 /* keep the hsync and hblank widths constant */
123 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
124 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
125 sync_pos = (blank_width - sync_width + 1) / 2;
126
127 border = (mode->hdisplay - width + 1) / 2;
128 border += border & 1; /* make the border even */
129
130 mode->crtc_hdisplay = width;
131 mode->crtc_hblank_start = width + border;
132 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
133
134 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
135 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
136}
137
138static void
139centre_vertically(struct drm_display_mode *mode,
140 int height)
141{
142 u32 border, sync_pos, blank_width, sync_width;
143
144 /* keep the vsync and vblank widths constant */
145 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
146 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
147 sync_pos = (blank_width - sync_width + 1) / 2;
148
149 border = (mode->vdisplay - height + 1) / 2;
150
151 mode->crtc_vdisplay = height;
152 mode->crtc_vblank_start = height + border;
153 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
154
155 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
156 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
157}
158
159static inline u32 panel_fitter_scaling(u32 source, u32 target)
160{
161 /*
162 * Floating point operation is not supported. So the FACTOR
163 * is defined, which can avoid the floating point computation
164 * when calculating the panel ratio.
165 */
166#define ACCURACY 12
167#define FACTOR (1 << ACCURACY)
168 u32 ratio = source * FACTOR / target;
169 return (FACTOR * ratio + FACTOR/2) / FACTOR;
170}
171
172void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
173 struct intel_crtc_config *pipe_config,
174 int fitting_mode)
175{
176 struct drm_device *dev = intel_crtc->base.dev;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700177 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300178 struct drm_display_mode *adjusted_mode;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700179
Jesse Barnes2dd24552013-04-25 12:55:01 -0700180 adjusted_mode = &pipe_config->adjusted_mode;
181
182 /* Native modes don't need fitting */
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300183 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
184 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
Jesse Barnes2dd24552013-04-25 12:55:01 -0700185 goto out;
186
187 switch (fitting_mode) {
188 case DRM_MODE_SCALE_CENTER:
189 /*
190 * For centered modes, we have to calculate border widths &
191 * heights and modify the values programmed into the CRTC.
192 */
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300193 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
194 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
Jesse Barnes2dd24552013-04-25 12:55:01 -0700195 border = LVDS_BORDER_ENABLE;
196 break;
197 case DRM_MODE_SCALE_ASPECT:
198 /* Scale but preserve the aspect ratio */
199 if (INTEL_INFO(dev)->gen >= 4) {
200 u32 scaled_width = adjusted_mode->hdisplay *
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300201 pipe_config->pipe_src_h;
202 u32 scaled_height = pipe_config->pipe_src_w *
Jesse Barnes2dd24552013-04-25 12:55:01 -0700203 adjusted_mode->vdisplay;
204
205 /* 965+ is easy, it does everything in hw */
206 if (scaled_width > scaled_height)
207 pfit_control |= PFIT_ENABLE |
208 PFIT_SCALING_PILLAR;
209 else if (scaled_width < scaled_height)
210 pfit_control |= PFIT_ENABLE |
211 PFIT_SCALING_LETTER;
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300212 else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
Jesse Barnes2dd24552013-04-25 12:55:01 -0700213 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
214 } else {
215 u32 scaled_width = adjusted_mode->hdisplay *
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300216 pipe_config->pipe_src_h;
217 u32 scaled_height = pipe_config->pipe_src_w *
Jesse Barnes2dd24552013-04-25 12:55:01 -0700218 adjusted_mode->vdisplay;
219 /*
220 * For earlier chips we have to calculate the scaling
221 * ratio by hand and program it into the
222 * PFIT_PGM_RATIO register
223 */
224 if (scaled_width > scaled_height) { /* pillar */
225 centre_horizontally(adjusted_mode,
226 scaled_height /
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300227 pipe_config->pipe_src_h);
Jesse Barnes2dd24552013-04-25 12:55:01 -0700228
229 border = LVDS_BORDER_ENABLE;
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300230 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
231 u32 bits = panel_fitter_scaling(pipe_config->pipe_src_h, adjusted_mode->vdisplay);
Jesse Barnes2dd24552013-04-25 12:55:01 -0700232 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
233 bits << PFIT_VERT_SCALE_SHIFT);
234 pfit_control |= (PFIT_ENABLE |
235 VERT_INTERP_BILINEAR |
236 HORIZ_INTERP_BILINEAR);
237 }
238 } else if (scaled_width < scaled_height) { /* letter */
239 centre_vertically(adjusted_mode,
240 scaled_width /
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300241 pipe_config->pipe_src_w);
Jesse Barnes2dd24552013-04-25 12:55:01 -0700242
243 border = LVDS_BORDER_ENABLE;
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300244 if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
245 u32 bits = panel_fitter_scaling(pipe_config->pipe_src_w, adjusted_mode->hdisplay);
Jesse Barnes2dd24552013-04-25 12:55:01 -0700246 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
247 bits << PFIT_VERT_SCALE_SHIFT);
248 pfit_control |= (PFIT_ENABLE |
249 VERT_INTERP_BILINEAR |
250 HORIZ_INTERP_BILINEAR);
251 }
252 } else {
253 /* Aspects match, Let hw scale both directions */
254 pfit_control |= (PFIT_ENABLE |
255 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
256 VERT_INTERP_BILINEAR |
257 HORIZ_INTERP_BILINEAR);
258 }
259 }
260 break;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700261 case DRM_MODE_SCALE_FULLSCREEN:
262 /*
263 * Full scaling, even if it changes the aspect ratio.
264 * Fortunately this is all done for us in hw.
265 */
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300266 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
267 pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
Jesse Barnes2dd24552013-04-25 12:55:01 -0700268 pfit_control |= PFIT_ENABLE;
269 if (INTEL_INFO(dev)->gen >= 4)
270 pfit_control |= PFIT_SCALING_AUTO;
271 else
272 pfit_control |= (VERT_AUTO_SCALE |
273 VERT_INTERP_BILINEAR |
274 HORIZ_AUTO_SCALE |
275 HORIZ_INTERP_BILINEAR);
276 }
277 break;
Jesse Barnesab3e67f2013-04-25 12:55:03 -0700278 default:
279 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
280 return;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700281 }
282
283 /* 965+ wants fuzzy fitting */
284 /* FIXME: handle multiple panels by failing gracefully */
285 if (INTEL_INFO(dev)->gen >= 4)
286 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
287 PFIT_FILTER_FUZZY);
288
289out:
290 if ((pfit_control & PFIT_ENABLE) == 0) {
291 pfit_control = 0;
292 pfit_pgm_ratios = 0;
293 }
294
295 /* Make sure pre-965 set dither correctly for 18bpp panels. */
296 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
297 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
298
Daniel Vetter2deefda2013-04-25 22:52:17 +0200299 pipe_config->gmch_pfit.control = pfit_control;
300 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
Daniel Vetter68fc8742013-04-25 22:52:16 +0200301 pipe_config->gmch_pfit.lvds_border_bits = border;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700302}
303
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100304static int is_backlight_combination_mode(struct drm_device *dev)
305{
306 struct drm_i915_private *dev_priv = dev->dev_private;
307
308 if (INTEL_INFO(dev)->gen >= 4)
309 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
310
311 if (IS_GEN2(dev))
312 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
313
314 return 0;
315}
316
Jani Nikulad6540632013-04-12 15:18:36 +0300317/* XXX: query mode clock or hardware clock and program max PWM appropriately
318 * when it's 0.
319 */
Jani Nikulabfd75902012-12-04 16:36:28 +0200320static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
Chris Wilson0b0b0532010-11-23 09:45:50 +0000321{
Jani Nikulabfd75902012-12-04 16:36:28 +0200322 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson0b0b0532010-11-23 09:45:50 +0000323 u32 val;
324
Ville Syrjälädf0a6792013-05-22 11:36:40 +0300325 WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight.lock));
Jani Nikula8ba2d182013-04-12 15:18:37 +0300326
Chris Wilson0b0b0532010-11-23 09:45:50 +0000327 /* Restore the CTL value if it lost, e.g. GPU reset */
328
329 if (HAS_PCH_SPLIT(dev_priv->dev)) {
330 val = I915_READ(BLC_PWM_PCH_CTL2);
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100331 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
332 dev_priv->regfile.saveBLC_PWM_CTL2 = val;
Chris Wilson0b0b0532010-11-23 09:45:50 +0000333 } else if (val == 0) {
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100334 val = dev_priv->regfile.saveBLC_PWM_CTL2;
Jani Nikulabfd75902012-12-04 16:36:28 +0200335 I915_WRITE(BLC_PWM_PCH_CTL2, val);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000336 }
337 } else {
338 val = I915_READ(BLC_PWM_CTL);
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100339 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
340 dev_priv->regfile.saveBLC_PWM_CTL = val;
Jani Nikulabfd75902012-12-04 16:36:28 +0200341 if (INTEL_INFO(dev)->gen >= 4)
342 dev_priv->regfile.saveBLC_PWM_CTL2 =
343 I915_READ(BLC_PWM_CTL2);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000344 } else if (val == 0) {
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100345 val = dev_priv->regfile.saveBLC_PWM_CTL;
Jani Nikulabfd75902012-12-04 16:36:28 +0200346 I915_WRITE(BLC_PWM_CTL, val);
347 if (INTEL_INFO(dev)->gen >= 4)
348 I915_WRITE(BLC_PWM_CTL2,
349 dev_priv->regfile.saveBLC_PWM_CTL2);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000350 }
351 }
352
353 return val;
354}
355
Jani Nikulad6540632013-04-12 15:18:36 +0300356static u32 intel_panel_get_max_backlight(struct drm_device *dev)
Chris Wilsona9573552010-08-22 13:18:16 +0100357{
Chris Wilsona9573552010-08-22 13:18:16 +0100358 u32 max;
359
Jani Nikulabfd75902012-12-04 16:36:28 +0200360 max = i915_read_blc_pwm_ctl(dev);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000361
Chris Wilsona9573552010-08-22 13:18:16 +0100362 if (HAS_PCH_SPLIT(dev)) {
Chris Wilson0b0b0532010-11-23 09:45:50 +0000363 max >>= 16;
Chris Wilsona9573552010-08-22 13:18:16 +0100364 } else {
Keith Packardca884792011-11-18 11:09:24 -0800365 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100366 max >>= 17;
Keith Packardca884792011-11-18 11:09:24 -0800367 else
Chris Wilsona9573552010-08-22 13:18:16 +0100368 max >>= 16;
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100369
370 if (is_backlight_combination_mode(dev))
371 max *= 0xff;
Chris Wilsona9573552010-08-22 13:18:16 +0100372 }
373
Chris Wilsona9573552010-08-22 13:18:16 +0100374 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
Jani Nikulad6540632013-04-12 15:18:36 +0300375
Chris Wilsona9573552010-08-22 13:18:16 +0100376 return max;
377}
378
Carsten Emde4dca20e2012-03-15 15:56:26 +0100379static int i915_panel_invert_brightness;
380MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
381 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
Carsten Emde7bd90902012-03-15 15:56:25 +0100382 "report PCI device ID, subsystem vendor and subsystem device ID "
383 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
384 "It will then be included in an upcoming module version.");
Carsten Emde4dca20e2012-03-15 15:56:26 +0100385module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
Carsten Emde7bd90902012-03-15 15:56:25 +0100386static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
387{
Carsten Emde4dca20e2012-03-15 15:56:26 +0100388 struct drm_i915_private *dev_priv = dev->dev_private;
389
390 if (i915_panel_invert_brightness < 0)
391 return val;
392
393 if (i915_panel_invert_brightness > 0 ||
Jani Nikulad6540632013-04-12 15:18:36 +0300394 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
395 u32 max = intel_panel_get_max_backlight(dev);
396 if (max)
397 return max - val;
398 }
Carsten Emde7bd90902012-03-15 15:56:25 +0100399
400 return val;
401}
402
Stéphane Marchesinfaea35d2012-07-30 13:51:38 -0700403static u32 intel_panel_get_backlight(struct drm_device *dev)
Chris Wilsona9573552010-08-22 13:18:16 +0100404{
405 struct drm_i915_private *dev_priv = dev->dev_private;
406 u32 val;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300407 unsigned long flags;
408
409 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Chris Wilsona9573552010-08-22 13:18:16 +0100410
411 if (HAS_PCH_SPLIT(dev)) {
412 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
413 } else {
414 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
Keith Packardca884792011-11-18 11:09:24 -0800415 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100416 val >>= 1;
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100417
Akshay Joshi0206e352011-08-16 15:34:10 -0400418 if (is_backlight_combination_mode(dev)) {
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100419 u8 lbpc;
420
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100421 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
422 val *= lbpc;
423 }
Chris Wilsona9573552010-08-22 13:18:16 +0100424 }
425
Carsten Emde7bd90902012-03-15 15:56:25 +0100426 val = intel_panel_compute_brightness(dev, val);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300427
428 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
429
Chris Wilsona9573552010-08-22 13:18:16 +0100430 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
431 return val;
432}
433
434static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
435{
436 struct drm_i915_private *dev_priv = dev->dev_private;
437 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
438 I915_WRITE(BLC_PWM_CPU_CTL, val | level);
439}
440
Takashi Iwaif52c6192011-10-14 11:45:40 +0200441static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
Chris Wilsona9573552010-08-22 13:18:16 +0100442{
443 struct drm_i915_private *dev_priv = dev->dev_private;
444 u32 tmp;
445
446 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
Carsten Emde7bd90902012-03-15 15:56:25 +0100447 level = intel_panel_compute_brightness(dev, level);
Chris Wilsona9573552010-08-22 13:18:16 +0100448
449 if (HAS_PCH_SPLIT(dev))
450 return intel_pch_panel_set_backlight(dev, level);
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100451
Akshay Joshi0206e352011-08-16 15:34:10 -0400452 if (is_backlight_combination_mode(dev)) {
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100453 u32 max = intel_panel_get_max_backlight(dev);
454 u8 lbpc;
455
Jani Nikulad6540632013-04-12 15:18:36 +0300456 /* we're screwed, but keep behaviour backwards compatible */
457 if (!max)
458 max = 1;
459
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100460 lbpc = level * 0xfe / max + 1;
461 level /= lbpc;
462 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
463 }
464
Chris Wilsona9573552010-08-22 13:18:16 +0100465 tmp = I915_READ(BLC_PWM_CTL);
Daniel Vettera7269152012-11-20 14:50:08 +0100466 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100467 level <<= 1;
Keith Packardca884792011-11-18 11:09:24 -0800468 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
Chris Wilsona9573552010-08-22 13:18:16 +0100469 I915_WRITE(BLC_PWM_CTL, tmp | level);
470}
Chris Wilson47356eb2011-01-11 17:06:04 +0000471
Jani Nikulad6540632013-04-12 15:18:36 +0300472/* set backlight brightness to level in range [0..max] */
473void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max)
Takashi Iwaif52c6192011-10-14 11:45:40 +0200474{
475 struct drm_i915_private *dev_priv = dev->dev_private;
Jani Nikulad6540632013-04-12 15:18:36 +0300476 u32 freq;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300477 unsigned long flags;
478
479 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Jani Nikulad6540632013-04-12 15:18:36 +0300480
481 freq = intel_panel_get_max_backlight(dev);
482 if (!freq) {
483 /* we are screwed, bail out */
Jani Nikula8ba2d182013-04-12 15:18:37 +0300484 goto out;
Jani Nikulad6540632013-04-12 15:18:36 +0300485 }
486
Aaron Lu22505b82013-08-02 09:16:03 +0800487 /* scale to hardware, but be careful to not overflow */
488 if (freq < max)
489 level = level * freq / max;
490 else
491 level = freq / max * level;
Takashi Iwaif52c6192011-10-14 11:45:40 +0200492
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300493 dev_priv->backlight.level = level;
494 if (dev_priv->backlight.device)
495 dev_priv->backlight.device->props.brightness = level;
Jani Nikulab6b3ba52013-03-12 11:44:15 +0200496
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300497 if (dev_priv->backlight.enabled)
Takashi Iwaif52c6192011-10-14 11:45:40 +0200498 intel_panel_actually_set_backlight(dev, level);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300499out:
500 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
Takashi Iwaif52c6192011-10-14 11:45:40 +0200501}
502
Chris Wilson47356eb2011-01-11 17:06:04 +0000503void intel_panel_disable_backlight(struct drm_device *dev)
504{
505 struct drm_i915_private *dev_priv = dev->dev_private;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300506 unsigned long flags;
507
Jani Nikula3f577572013-07-25 14:31:30 +0300508 /*
509 * Do not disable backlight on the vgaswitcheroo path. When switching
510 * away from i915, the other client may depend on i915 to handle the
511 * backlight. This will leave the backlight on unnecessarily when
512 * another client is not activated.
513 */
514 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
515 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
516 return;
517 }
518
Jani Nikula8ba2d182013-04-12 15:18:37 +0300519 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000520
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300521 dev_priv->backlight.enabled = false;
Takashi Iwaif52c6192011-10-14 11:45:40 +0200522 intel_panel_actually_set_backlight(dev, 0);
Daniel Vetter24ded202012-06-05 12:14:54 +0200523
524 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300525 uint32_t reg, tmp;
Daniel Vetter24ded202012-06-05 12:14:54 +0200526
527 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
528
529 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300530
531 if (HAS_PCH_SPLIT(dev)) {
532 tmp = I915_READ(BLC_PWM_PCH_CTL1);
533 tmp &= ~BLM_PCH_PWM_ENABLE;
534 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
535 }
Daniel Vetter24ded202012-06-05 12:14:54 +0200536 }
Jani Nikula8ba2d182013-04-12 15:18:37 +0300537
538 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000539}
540
Daniel Vetter24ded202012-06-05 12:14:54 +0200541void intel_panel_enable_backlight(struct drm_device *dev,
542 enum pipe pipe)
Chris Wilson47356eb2011-01-11 17:06:04 +0000543{
544 struct drm_i915_private *dev_priv = dev->dev_private;
Jani Nikula35ffda42013-04-25 16:49:25 +0300545 enum transcoder cpu_transcoder =
546 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300547 unsigned long flags;
548
549 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000550
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300551 if (dev_priv->backlight.level == 0) {
552 dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
553 if (dev_priv->backlight.device)
554 dev_priv->backlight.device->props.brightness =
555 dev_priv->backlight.level;
Jani Nikulab6b3ba52013-03-12 11:44:15 +0200556 }
Chris Wilson47356eb2011-01-11 17:06:04 +0000557
Daniel Vetter24ded202012-06-05 12:14:54 +0200558 if (INTEL_INFO(dev)->gen >= 4) {
559 uint32_t reg, tmp;
560
561 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
562
563
564 tmp = I915_READ(reg);
565
566 /* Note that this can also get called through dpms changes. And
567 * we don't track the backlight dpms state, hence check whether
568 * we have to do anything first. */
569 if (tmp & BLM_PWM_ENABLE)
Takashi Iwai770c1232012-08-11 08:56:42 +0200570 goto set_level;
Daniel Vetter24ded202012-06-05 12:14:54 +0200571
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700572 if (INTEL_INFO(dev)->num_pipes == 3)
Daniel Vetter24ded202012-06-05 12:14:54 +0200573 tmp &= ~BLM_PIPE_SELECT_IVB;
574 else
575 tmp &= ~BLM_PIPE_SELECT;
576
Jani Nikula35ffda42013-04-25 16:49:25 +0300577 if (cpu_transcoder == TRANSCODER_EDP)
578 tmp |= BLM_TRANSCODER_EDP;
579 else
580 tmp |= BLM_PIPE(cpu_transcoder);
Daniel Vetter24ded202012-06-05 12:14:54 +0200581 tmp &= ~BLM_PWM_ENABLE;
582
583 I915_WRITE(reg, tmp);
584 POSTING_READ(reg);
585 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300586
Kamal Mostafae85843b2013-07-19 15:02:01 -0700587 if (HAS_PCH_SPLIT(dev) &&
588 !(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300589 tmp = I915_READ(BLC_PWM_PCH_CTL1);
590 tmp |= BLM_PCH_PWM_ENABLE;
591 tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
592 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
593 }
Daniel Vetter24ded202012-06-05 12:14:54 +0200594 }
Takashi Iwai770c1232012-08-11 08:56:42 +0200595
596set_level:
Daniel Vetterb1289372013-03-22 15:44:46 +0100597 /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
598 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
599 * registers are set.
Takashi Iwai770c1232012-08-11 08:56:42 +0200600 */
Daniel Vetterecb135a2013-04-03 11:25:32 +0200601 dev_priv->backlight.enabled = true;
602 intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300603
604 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000605}
606
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200607static void intel_panel_init_backlight(struct drm_device *dev)
Chris Wilson47356eb2011-01-11 17:06:04 +0000608{
609 struct drm_i915_private *dev_priv = dev->dev_private;
610
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300611 dev_priv->backlight.level = intel_panel_get_backlight(dev);
612 dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
Chris Wilson47356eb2011-01-11 17:06:04 +0000613}
Chris Wilsonfe16d942011-02-12 10:29:38 +0000614
615enum drm_connector_status
616intel_panel_detect(struct drm_device *dev)
617{
618 struct drm_i915_private *dev_priv = dev->dev_private;
619
620 /* Assume that the BIOS does not lie through the OpRegion... */
Daniel Vettera7269152012-11-20 14:50:08 +0100621 if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
Chris Wilsonfe16d942011-02-12 10:29:38 +0000622 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
623 connector_status_connected :
624 connector_status_disconnected;
Daniel Vettera7269152012-11-20 14:50:08 +0100625 }
Chris Wilsonfe16d942011-02-12 10:29:38 +0000626
Daniel Vettera7269152012-11-20 14:50:08 +0100627 switch (i915_panel_ignore_lid) {
628 case -2:
629 return connector_status_connected;
630 case -1:
631 return connector_status_disconnected;
632 default:
633 return connector_status_unknown;
634 }
Chris Wilsonfe16d942011-02-12 10:29:38 +0000635}
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200636
637#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
638static int intel_panel_update_status(struct backlight_device *bd)
639{
640 struct drm_device *dev = bl_get_data(bd);
Jani Nikulad6540632013-04-12 15:18:36 +0300641 intel_panel_set_backlight(dev, bd->props.brightness,
642 bd->props.max_brightness);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200643 return 0;
644}
645
646static int intel_panel_get_brightness(struct backlight_device *bd)
647{
648 struct drm_device *dev = bl_get_data(bd);
Jani Nikula7c233962013-03-12 11:44:16 +0200649 return intel_panel_get_backlight(dev);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200650}
651
652static const struct backlight_ops intel_panel_bl_ops = {
653 .update_status = intel_panel_update_status,
654 .get_brightness = intel_panel_get_brightness,
655};
656
Jani Nikula0657b6b2012-10-19 14:51:46 +0300657int intel_panel_setup_backlight(struct drm_connector *connector)
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200658{
Jani Nikula0657b6b2012-10-19 14:51:46 +0300659 struct drm_device *dev = connector->dev;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200660 struct drm_i915_private *dev_priv = dev->dev_private;
661 struct backlight_properties props;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300662 unsigned long flags;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200663
664 intel_panel_init_backlight(dev);
665
Jani Nikuladc652f92013-04-12 15:18:38 +0300666 if (WARN_ON(dev_priv->backlight.device))
667 return -ENODEV;
668
Corentin Charyaf437cf2012-05-22 10:29:46 +0100669 memset(&props, 0, sizeof(props));
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200670 props.type = BACKLIGHT_RAW;
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300671 props.brightness = dev_priv->backlight.level;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300672
673 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Jani Nikulad6540632013-04-12 15:18:36 +0300674 props.max_brightness = intel_panel_get_max_backlight(dev);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300675 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
676
Jani Nikula28dcc2d2012-09-03 16:25:12 +0300677 if (props.max_brightness == 0) {
Jani Nikulae86b6182012-10-25 10:57:38 +0300678 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
Jani Nikula28dcc2d2012-09-03 16:25:12 +0300679 return -ENODEV;
680 }
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300681 dev_priv->backlight.device =
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200682 backlight_device_register("intel_backlight",
683 &connector->kdev, dev,
684 &intel_panel_bl_ops, &props);
685
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300686 if (IS_ERR(dev_priv->backlight.device)) {
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200687 DRM_ERROR("Failed to register backlight: %ld\n",
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300688 PTR_ERR(dev_priv->backlight.device));
689 dev_priv->backlight.device = NULL;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200690 return -ENODEV;
691 }
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200692 return 0;
693}
694
695void intel_panel_destroy_backlight(struct drm_device *dev)
696{
697 struct drm_i915_private *dev_priv = dev->dev_private;
Jani Nikuladc652f92013-04-12 15:18:38 +0300698 if (dev_priv->backlight.device) {
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300699 backlight_device_unregister(dev_priv->backlight.device);
Jani Nikuladc652f92013-04-12 15:18:38 +0300700 dev_priv->backlight.device = NULL;
701 }
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200702}
703#else
Jani Nikula0657b6b2012-10-19 14:51:46 +0300704int intel_panel_setup_backlight(struct drm_connector *connector)
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200705{
Jani Nikula0657b6b2012-10-19 14:51:46 +0300706 intel_panel_init_backlight(connector->dev);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200707 return 0;
708}
709
710void intel_panel_destroy_backlight(struct drm_device *dev)
711{
712 return;
713}
714#endif
Jani Nikula1d508702012-10-19 14:51:49 +0300715
Jani Nikuladd06f902012-10-19 14:51:50 +0300716int intel_panel_init(struct intel_panel *panel,
717 struct drm_display_mode *fixed_mode)
Jani Nikula1d508702012-10-19 14:51:49 +0300718{
Jani Nikuladd06f902012-10-19 14:51:50 +0300719 panel->fixed_mode = fixed_mode;
720
Jani Nikula1d508702012-10-19 14:51:49 +0300721 return 0;
722}
723
724void intel_panel_fini(struct intel_panel *panel)
725{
Jani Nikuladd06f902012-10-19 14:51:50 +0300726 struct intel_connector *intel_connector =
727 container_of(panel, struct intel_connector, panel);
728
729 if (panel->fixed_mode)
730 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
Jani Nikula1d508702012-10-19 14:51:49 +0300731}