blob: e9acc61dace24377b2f405d939b0baffaf598e19 [file] [log] [blame]
Auke Kok9d5c8242008-01-24 02:22:38 -08001/*******************************************************************************
2
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#include <linux/module.h>
29#include <linux/types.h>
30#include <linux/init.h>
31#include <linux/vmalloc.h>
32#include <linux/pagemap.h>
33#include <linux/netdevice.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080034#include <linux/ipv6.h>
35#include <net/checksum.h>
36#include <net/ip6_checksum.h>
37#include <linux/mii.h>
38#include <linux/ethtool.h>
39#include <linux/if_vlan.h>
40#include <linux/pci.h>
41#include <linux/delay.h>
42#include <linux/interrupt.h>
43#include <linux/if_ether.h>
44
45#include "igb.h"
46
47#define DRV_VERSION "1.0.8-k2"
48char igb_driver_name[] = "igb";
49char igb_driver_version[] = DRV_VERSION;
50static const char igb_driver_string[] =
51 "Intel(R) Gigabit Ethernet Network Driver";
52static const char igb_copyright[] = "Copyright (c) 2007 Intel Corporation.";
53
54
55static const struct e1000_info *igb_info_tbl[] = {
56 [board_82575] = &e1000_82575_info,
57};
58
59static struct pci_device_id igb_pci_tbl[] = {
60 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
61 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
62 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
63 /* required last entry */
64 {0, }
65};
66
67MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
68
69void igb_reset(struct igb_adapter *);
70static int igb_setup_all_tx_resources(struct igb_adapter *);
71static int igb_setup_all_rx_resources(struct igb_adapter *);
72static void igb_free_all_tx_resources(struct igb_adapter *);
73static void igb_free_all_rx_resources(struct igb_adapter *);
Mitch Williams3b644cf2008-06-27 10:59:48 -070074static void igb_free_tx_resources(struct igb_ring *);
75static void igb_free_rx_resources(struct igb_ring *);
Auke Kok9d5c8242008-01-24 02:22:38 -080076void igb_update_stats(struct igb_adapter *);
77static int igb_probe(struct pci_dev *, const struct pci_device_id *);
78static void __devexit igb_remove(struct pci_dev *pdev);
79static int igb_sw_init(struct igb_adapter *);
80static int igb_open(struct net_device *);
81static int igb_close(struct net_device *);
82static void igb_configure_tx(struct igb_adapter *);
83static void igb_configure_rx(struct igb_adapter *);
84static void igb_setup_rctl(struct igb_adapter *);
85static void igb_clean_all_tx_rings(struct igb_adapter *);
86static void igb_clean_all_rx_rings(struct igb_adapter *);
Mitch Williams3b644cf2008-06-27 10:59:48 -070087static void igb_clean_tx_ring(struct igb_ring *);
88static void igb_clean_rx_ring(struct igb_ring *);
Auke Kok9d5c8242008-01-24 02:22:38 -080089static void igb_set_multi(struct net_device *);
90static void igb_update_phy_info(unsigned long);
91static void igb_watchdog(unsigned long);
92static void igb_watchdog_task(struct work_struct *);
93static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
94 struct igb_ring *);
95static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
96static struct net_device_stats *igb_get_stats(struct net_device *);
97static int igb_change_mtu(struct net_device *, int);
98static int igb_set_mac(struct net_device *, void *);
99static irqreturn_t igb_intr(int irq, void *);
100static irqreturn_t igb_intr_msi(int irq, void *);
101static irqreturn_t igb_msix_other(int irq, void *);
102static irqreturn_t igb_msix_rx(int irq, void *);
103static irqreturn_t igb_msix_tx(int irq, void *);
104static int igb_clean_rx_ring_msix(struct napi_struct *, int);
Mitch Williams3b644cf2008-06-27 10:59:48 -0700105static bool igb_clean_tx_irq(struct igb_ring *);
Auke Kok9d5c8242008-01-24 02:22:38 -0800106static int igb_clean(struct napi_struct *, int);
Mitch Williams3b644cf2008-06-27 10:59:48 -0700107static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
108static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
Auke Kok9d5c8242008-01-24 02:22:38 -0800109static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
110static void igb_tx_timeout(struct net_device *);
111static void igb_reset_task(struct work_struct *);
112static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
113static void igb_vlan_rx_add_vid(struct net_device *, u16);
114static void igb_vlan_rx_kill_vid(struct net_device *, u16);
115static void igb_restore_vlan(struct igb_adapter *);
116
117static int igb_suspend(struct pci_dev *, pm_message_t);
118#ifdef CONFIG_PM
119static int igb_resume(struct pci_dev *);
120#endif
121static void igb_shutdown(struct pci_dev *);
122
123#ifdef CONFIG_NET_POLL_CONTROLLER
124/* for netdump / net console */
125static void igb_netpoll(struct net_device *);
126#endif
127
128static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
129 pci_channel_state_t);
130static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
131static void igb_io_resume(struct pci_dev *);
132
133static struct pci_error_handlers igb_err_handler = {
134 .error_detected = igb_io_error_detected,
135 .slot_reset = igb_io_slot_reset,
136 .resume = igb_io_resume,
137};
138
139
140static struct pci_driver igb_driver = {
141 .name = igb_driver_name,
142 .id_table = igb_pci_tbl,
143 .probe = igb_probe,
144 .remove = __devexit_p(igb_remove),
145#ifdef CONFIG_PM
146 /* Power Managment Hooks */
147 .suspend = igb_suspend,
148 .resume = igb_resume,
149#endif
150 .shutdown = igb_shutdown,
151 .err_handler = &igb_err_handler
152};
153
154MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
155MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
156MODULE_LICENSE("GPL");
157MODULE_VERSION(DRV_VERSION);
158
159#ifdef DEBUG
160/**
161 * igb_get_hw_dev_name - return device name string
162 * used by hardware layer to print debugging information
163 **/
164char *igb_get_hw_dev_name(struct e1000_hw *hw)
165{
166 struct igb_adapter *adapter = hw->back;
167 return adapter->netdev->name;
168}
169#endif
170
171/**
172 * igb_init_module - Driver Registration Routine
173 *
174 * igb_init_module is the first routine called when the driver is
175 * loaded. All it does is register with the PCI subsystem.
176 **/
177static int __init igb_init_module(void)
178{
179 int ret;
180 printk(KERN_INFO "%s - version %s\n",
181 igb_driver_string, igb_driver_version);
182
183 printk(KERN_INFO "%s\n", igb_copyright);
184
185 ret = pci_register_driver(&igb_driver);
186 return ret;
187}
188
189module_init(igb_init_module);
190
191/**
192 * igb_exit_module - Driver Exit Cleanup Routine
193 *
194 * igb_exit_module is called just before the driver is removed
195 * from memory.
196 **/
197static void __exit igb_exit_module(void)
198{
199 pci_unregister_driver(&igb_driver);
200}
201
202module_exit(igb_exit_module);
203
204/**
205 * igb_alloc_queues - Allocate memory for all rings
206 * @adapter: board private structure to initialize
207 *
208 * We allocate one ring per queue at run-time since we don't know the
209 * number of queues at compile-time.
210 **/
211static int igb_alloc_queues(struct igb_adapter *adapter)
212{
213 int i;
214
215 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
216 sizeof(struct igb_ring), GFP_KERNEL);
217 if (!adapter->tx_ring)
218 return -ENOMEM;
219
220 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
221 sizeof(struct igb_ring), GFP_KERNEL);
222 if (!adapter->rx_ring) {
223 kfree(adapter->tx_ring);
224 return -ENOMEM;
225 }
226
227 for (i = 0; i < adapter->num_rx_queues; i++) {
228 struct igb_ring *ring = &(adapter->rx_ring[i]);
229 ring->adapter = adapter;
230 ring->itr_register = E1000_ITR;
231
232 if (!ring->napi.poll)
233 netif_napi_add(adapter->netdev, &ring->napi, igb_clean,
234 adapter->napi.weight /
235 adapter->num_rx_queues);
236 }
237 return 0;
238}
239
240#define IGB_N0_QUEUE -1
241static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
242 int tx_queue, int msix_vector)
243{
244 u32 msixbm = 0;
245 struct e1000_hw *hw = &adapter->hw;
246 /* The 82575 assigns vectors using a bitmask, which matches the
247 bitmask for the EICR/EIMS/EIMC registers. To assign one
248 or more queues to a vector, we write the appropriate bits
249 into the MSIXBM register for that vector. */
250 if (rx_queue > IGB_N0_QUEUE) {
251 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
252 adapter->rx_ring[rx_queue].eims_value = msixbm;
253 }
254 if (tx_queue > IGB_N0_QUEUE) {
255 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
256 adapter->tx_ring[tx_queue].eims_value =
257 E1000_EICR_TX_QUEUE0 << tx_queue;
258 }
259 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
260}
261
262/**
263 * igb_configure_msix - Configure MSI-X hardware
264 *
265 * igb_configure_msix sets up the hardware to properly
266 * generate MSI-X interrupts.
267 **/
268static void igb_configure_msix(struct igb_adapter *adapter)
269{
270 u32 tmp;
271 int i, vector = 0;
272 struct e1000_hw *hw = &adapter->hw;
273
274 adapter->eims_enable_mask = 0;
275
276 for (i = 0; i < adapter->num_tx_queues; i++) {
277 struct igb_ring *tx_ring = &adapter->tx_ring[i];
278 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
279 adapter->eims_enable_mask |= tx_ring->eims_value;
280 if (tx_ring->itr_val)
281 writel(1000000000 / (tx_ring->itr_val * 256),
282 hw->hw_addr + tx_ring->itr_register);
283 else
284 writel(1, hw->hw_addr + tx_ring->itr_register);
285 }
286
287 for (i = 0; i < adapter->num_rx_queues; i++) {
288 struct igb_ring *rx_ring = &adapter->rx_ring[i];
289 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
290 adapter->eims_enable_mask |= rx_ring->eims_value;
291 if (rx_ring->itr_val)
292 writel(1000000000 / (rx_ring->itr_val * 256),
293 hw->hw_addr + rx_ring->itr_register);
294 else
295 writel(1, hw->hw_addr + rx_ring->itr_register);
296 }
297
298
299 /* set vector for other causes, i.e. link changes */
300 array_wr32(E1000_MSIXBM(0), vector++,
301 E1000_EIMS_OTHER);
302
303 /* disable IAM for ICR interrupt bits */
304 wr32(E1000_IAM, 0);
305
306 tmp = rd32(E1000_CTRL_EXT);
307 /* enable MSI-X PBA support*/
308 tmp |= E1000_CTRL_EXT_PBA_CLR;
309
310 /* Auto-Mask interrupts upon ICR read. */
311 tmp |= E1000_CTRL_EXT_EIAME;
312 tmp |= E1000_CTRL_EXT_IRCA;
313
314 wr32(E1000_CTRL_EXT, tmp);
315 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
316
317 wrfl();
318}
319
320/**
321 * igb_request_msix - Initialize MSI-X interrupts
322 *
323 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
324 * kernel.
325 **/
326static int igb_request_msix(struct igb_adapter *adapter)
327{
328 struct net_device *netdev = adapter->netdev;
329 int i, err = 0, vector = 0;
330
331 vector = 0;
332
333 for (i = 0; i < adapter->num_tx_queues; i++) {
334 struct igb_ring *ring = &(adapter->tx_ring[i]);
335 sprintf(ring->name, "%s-tx%d", netdev->name, i);
336 err = request_irq(adapter->msix_entries[vector].vector,
337 &igb_msix_tx, 0, ring->name,
338 &(adapter->tx_ring[i]));
339 if (err)
340 goto out;
341 ring->itr_register = E1000_EITR(0) + (vector << 2);
342 ring->itr_val = adapter->itr;
343 vector++;
344 }
345 for (i = 0; i < adapter->num_rx_queues; i++) {
346 struct igb_ring *ring = &(adapter->rx_ring[i]);
347 if (strlen(netdev->name) < (IFNAMSIZ - 5))
348 sprintf(ring->name, "%s-rx%d", netdev->name, i);
349 else
350 memcpy(ring->name, netdev->name, IFNAMSIZ);
351 err = request_irq(adapter->msix_entries[vector].vector,
352 &igb_msix_rx, 0, ring->name,
353 &(adapter->rx_ring[i]));
354 if (err)
355 goto out;
356 ring->itr_register = E1000_EITR(0) + (vector << 2);
357 ring->itr_val = adapter->itr;
358 vector++;
359 }
360
361 err = request_irq(adapter->msix_entries[vector].vector,
362 &igb_msix_other, 0, netdev->name, netdev);
363 if (err)
364 goto out;
365
366 adapter->napi.poll = igb_clean_rx_ring_msix;
367 for (i = 0; i < adapter->num_rx_queues; i++)
368 adapter->rx_ring[i].napi.poll = adapter->napi.poll;
369 igb_configure_msix(adapter);
370 return 0;
371out:
372 return err;
373}
374
375static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
376{
377 if (adapter->msix_entries) {
378 pci_disable_msix(adapter->pdev);
379 kfree(adapter->msix_entries);
380 adapter->msix_entries = NULL;
381 } else if (adapter->msi_enabled)
382 pci_disable_msi(adapter->pdev);
383 return;
384}
385
386
387/**
388 * igb_set_interrupt_capability - set MSI or MSI-X if supported
389 *
390 * Attempt to configure interrupts using the best available
391 * capabilities of the hardware and kernel.
392 **/
393static void igb_set_interrupt_capability(struct igb_adapter *adapter)
394{
395 int err;
396 int numvecs, i;
397
398 numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
399 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
400 GFP_KERNEL);
401 if (!adapter->msix_entries)
402 goto msi_only;
403
404 for (i = 0; i < numvecs; i++)
405 adapter->msix_entries[i].entry = i;
406
407 err = pci_enable_msix(adapter->pdev,
408 adapter->msix_entries,
409 numvecs);
410 if (err == 0)
411 return;
412
413 igb_reset_interrupt_capability(adapter);
414
415 /* If we can't do MSI-X, try MSI */
416msi_only:
417 adapter->num_rx_queues = 1;
418 if (!pci_enable_msi(adapter->pdev))
419 adapter->msi_enabled = 1;
420 return;
421}
422
423/**
424 * igb_request_irq - initialize interrupts
425 *
426 * Attempts to configure interrupts using the best available
427 * capabilities of the hardware and kernel.
428 **/
429static int igb_request_irq(struct igb_adapter *adapter)
430{
431 struct net_device *netdev = adapter->netdev;
432 struct e1000_hw *hw = &adapter->hw;
433 int err = 0;
434
435 if (adapter->msix_entries) {
436 err = igb_request_msix(adapter);
437 if (!err) {
Auke Kok9d5c8242008-01-24 02:22:38 -0800438 /* enable IAM, auto-mask,
Andy Gospodarek6cb5e572008-02-15 14:05:25 -0800439 * DO NOT USE EIAM or IAM in legacy mode */
Auke Kok9d5c8242008-01-24 02:22:38 -0800440 wr32(E1000_IAM, IMS_ENABLE_MASK);
441 goto request_done;
442 }
443 /* fall back to MSI */
444 igb_reset_interrupt_capability(adapter);
445 if (!pci_enable_msi(adapter->pdev))
446 adapter->msi_enabled = 1;
447 igb_free_all_tx_resources(adapter);
448 igb_free_all_rx_resources(adapter);
449 adapter->num_rx_queues = 1;
450 igb_alloc_queues(adapter);
451 }
452 if (adapter->msi_enabled) {
453 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
454 netdev->name, netdev);
455 if (!err)
456 goto request_done;
457 /* fall back to legacy interrupts */
458 igb_reset_interrupt_capability(adapter);
459 adapter->msi_enabled = 0;
460 }
461
462 err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
463 netdev->name, netdev);
464
Andy Gospodarek6cb5e572008-02-15 14:05:25 -0800465 if (err)
Auke Kok9d5c8242008-01-24 02:22:38 -0800466 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
467 err);
Auke Kok9d5c8242008-01-24 02:22:38 -0800468
469request_done:
470 return err;
471}
472
473static void igb_free_irq(struct igb_adapter *adapter)
474{
475 struct net_device *netdev = adapter->netdev;
476
477 if (adapter->msix_entries) {
478 int vector = 0, i;
479
480 for (i = 0; i < adapter->num_tx_queues; i++)
481 free_irq(adapter->msix_entries[vector++].vector,
482 &(adapter->tx_ring[i]));
483 for (i = 0; i < adapter->num_rx_queues; i++)
484 free_irq(adapter->msix_entries[vector++].vector,
485 &(adapter->rx_ring[i]));
486
487 free_irq(adapter->msix_entries[vector++].vector, netdev);
488 return;
489 }
490
491 free_irq(adapter->pdev->irq, netdev);
492}
493
494/**
495 * igb_irq_disable - Mask off interrupt generation on the NIC
496 * @adapter: board private structure
497 **/
498static void igb_irq_disable(struct igb_adapter *adapter)
499{
500 struct e1000_hw *hw = &adapter->hw;
501
502 if (adapter->msix_entries) {
503 wr32(E1000_EIMC, ~0);
504 wr32(E1000_EIAC, 0);
505 }
506 wr32(E1000_IMC, ~0);
507 wrfl();
508 synchronize_irq(adapter->pdev->irq);
509}
510
511/**
512 * igb_irq_enable - Enable default interrupt generation settings
513 * @adapter: board private structure
514 **/
515static void igb_irq_enable(struct igb_adapter *adapter)
516{
517 struct e1000_hw *hw = &adapter->hw;
518
519 if (adapter->msix_entries) {
520 wr32(E1000_EIMS,
521 adapter->eims_enable_mask);
522 wr32(E1000_EIAC,
523 adapter->eims_enable_mask);
524 wr32(E1000_IMS, E1000_IMS_LSC);
525 } else
526 wr32(E1000_IMS, IMS_ENABLE_MASK);
527}
528
529static void igb_update_mng_vlan(struct igb_adapter *adapter)
530{
531 struct net_device *netdev = adapter->netdev;
532 u16 vid = adapter->hw.mng_cookie.vlan_id;
533 u16 old_vid = adapter->mng_vlan_id;
534 if (adapter->vlgrp) {
535 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
536 if (adapter->hw.mng_cookie.status &
537 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
538 igb_vlan_rx_add_vid(netdev, vid);
539 adapter->mng_vlan_id = vid;
540 } else
541 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
542
543 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
544 (vid != old_vid) &&
545 !vlan_group_get_device(adapter->vlgrp, old_vid))
546 igb_vlan_rx_kill_vid(netdev, old_vid);
547 } else
548 adapter->mng_vlan_id = vid;
549 }
550}
551
552/**
553 * igb_release_hw_control - release control of the h/w to f/w
554 * @adapter: address of board private structure
555 *
556 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
557 * For ASF and Pass Through versions of f/w this means that the
558 * driver is no longer loaded.
559 *
560 **/
561static void igb_release_hw_control(struct igb_adapter *adapter)
562{
563 struct e1000_hw *hw = &adapter->hw;
564 u32 ctrl_ext;
565
566 /* Let firmware take over control of h/w */
567 ctrl_ext = rd32(E1000_CTRL_EXT);
568 wr32(E1000_CTRL_EXT,
569 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
570}
571
572
573/**
574 * igb_get_hw_control - get control of the h/w from f/w
575 * @adapter: address of board private structure
576 *
577 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
578 * For ASF and Pass Through versions of f/w this means that
579 * the driver is loaded.
580 *
581 **/
582static void igb_get_hw_control(struct igb_adapter *adapter)
583{
584 struct e1000_hw *hw = &adapter->hw;
585 u32 ctrl_ext;
586
587 /* Let firmware know the driver has taken over */
588 ctrl_ext = rd32(E1000_CTRL_EXT);
589 wr32(E1000_CTRL_EXT,
590 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
591}
592
593static void igb_init_manageability(struct igb_adapter *adapter)
594{
595 struct e1000_hw *hw = &adapter->hw;
596
597 if (adapter->en_mng_pt) {
598 u32 manc2h = rd32(E1000_MANC2H);
599 u32 manc = rd32(E1000_MANC);
600
Auke Kok9d5c8242008-01-24 02:22:38 -0800601 /* enable receiving management packets to the host */
602 /* this will probably generate destination unreachable messages
603 * from the host OS, but the packets will be handled on SMBUS */
604 manc |= E1000_MANC_EN_MNG2HOST;
605#define E1000_MNG2HOST_PORT_623 (1 << 5)
606#define E1000_MNG2HOST_PORT_664 (1 << 6)
607 manc2h |= E1000_MNG2HOST_PORT_623;
608 manc2h |= E1000_MNG2HOST_PORT_664;
609 wr32(E1000_MANC2H, manc2h);
610
611 wr32(E1000_MANC, manc);
612 }
613}
614
Auke Kok9d5c8242008-01-24 02:22:38 -0800615/**
616 * igb_configure - configure the hardware for RX and TX
617 * @adapter: private board structure
618 **/
619static void igb_configure(struct igb_adapter *adapter)
620{
621 struct net_device *netdev = adapter->netdev;
622 int i;
623
624 igb_get_hw_control(adapter);
625 igb_set_multi(netdev);
626
627 igb_restore_vlan(adapter);
628 igb_init_manageability(adapter);
629
630 igb_configure_tx(adapter);
631 igb_setup_rctl(adapter);
632 igb_configure_rx(adapter);
633 /* call IGB_DESC_UNUSED which always leaves
634 * at least 1 descriptor unused to make sure
635 * next_to_use != next_to_clean */
636 for (i = 0; i < adapter->num_rx_queues; i++) {
637 struct igb_ring *ring = &adapter->rx_ring[i];
Mitch Williams3b644cf2008-06-27 10:59:48 -0700638 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
Auke Kok9d5c8242008-01-24 02:22:38 -0800639 }
640
641
642 adapter->tx_queue_len = netdev->tx_queue_len;
643}
644
645
646/**
647 * igb_up - Open the interface and prepare it to handle traffic
648 * @adapter: board private structure
649 **/
650
651int igb_up(struct igb_adapter *adapter)
652{
653 struct e1000_hw *hw = &adapter->hw;
654 int i;
655
656 /* hardware has been reset, we need to reload some things */
657 igb_configure(adapter);
658
659 clear_bit(__IGB_DOWN, &adapter->state);
660
661 napi_enable(&adapter->napi);
662
663 if (adapter->msix_entries) {
664 for (i = 0; i < adapter->num_rx_queues; i++)
665 napi_enable(&adapter->rx_ring[i].napi);
666 igb_configure_msix(adapter);
667 }
668
669 /* Clear any pending interrupts. */
670 rd32(E1000_ICR);
671 igb_irq_enable(adapter);
672
673 /* Fire a link change interrupt to start the watchdog. */
674 wr32(E1000_ICS, E1000_ICS_LSC);
675 return 0;
676}
677
678void igb_down(struct igb_adapter *adapter)
679{
680 struct e1000_hw *hw = &adapter->hw;
681 struct net_device *netdev = adapter->netdev;
682 u32 tctl, rctl;
683 int i;
684
685 /* signal that we're down so the interrupt handler does not
686 * reschedule our watchdog timer */
687 set_bit(__IGB_DOWN, &adapter->state);
688
689 /* disable receives in the hardware */
690 rctl = rd32(E1000_RCTL);
691 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
692 /* flush and sleep below */
693
694 netif_stop_queue(netdev);
695
696 /* disable transmits in the hardware */
697 tctl = rd32(E1000_TCTL);
698 tctl &= ~E1000_TCTL_EN;
699 wr32(E1000_TCTL, tctl);
700 /* flush both disables and wait for them to finish */
701 wrfl();
702 msleep(10);
703
704 napi_disable(&adapter->napi);
705
706 if (adapter->msix_entries)
707 for (i = 0; i < adapter->num_rx_queues; i++)
708 napi_disable(&adapter->rx_ring[i].napi);
709 igb_irq_disable(adapter);
710
711 del_timer_sync(&adapter->watchdog_timer);
712 del_timer_sync(&adapter->phy_info_timer);
713
714 netdev->tx_queue_len = adapter->tx_queue_len;
715 netif_carrier_off(netdev);
716 adapter->link_speed = 0;
717 adapter->link_duplex = 0;
718
Jeff Kirsher30236822008-06-24 17:01:15 -0700719 if (!pci_channel_offline(adapter->pdev))
720 igb_reset(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800721 igb_clean_all_tx_rings(adapter);
722 igb_clean_all_rx_rings(adapter);
723}
724
725void igb_reinit_locked(struct igb_adapter *adapter)
726{
727 WARN_ON(in_interrupt());
728 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
729 msleep(1);
730 igb_down(adapter);
731 igb_up(adapter);
732 clear_bit(__IGB_RESETTING, &adapter->state);
733}
734
735void igb_reset(struct igb_adapter *adapter)
736{
737 struct e1000_hw *hw = &adapter->hw;
738 struct e1000_fc_info *fc = &adapter->hw.fc;
739 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
740 u16 hwm;
741
742 /* Repartition Pba for greater than 9k mtu
743 * To take effect CTRL.RST is required.
744 */
745 pba = E1000_PBA_34K;
746
747 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
748 /* adjust PBA for jumbo frames */
749 wr32(E1000_PBA, pba);
750
751 /* To maintain wire speed transmits, the Tx FIFO should be
752 * large enough to accommodate two full transmit packets,
753 * rounded up to the next 1KB and expressed in KB. Likewise,
754 * the Rx FIFO should be large enough to accommodate at least
755 * one full receive packet and is similarly rounded up and
756 * expressed in KB. */
757 pba = rd32(E1000_PBA);
758 /* upper 16 bits has Tx packet buffer allocation size in KB */
759 tx_space = pba >> 16;
760 /* lower 16 bits has Rx packet buffer allocation size in KB */
761 pba &= 0xffff;
762 /* the tx fifo also stores 16 bytes of information about the tx
763 * but don't include ethernet FCS because hardware appends it */
764 min_tx_space = (adapter->max_frame_size +
765 sizeof(struct e1000_tx_desc) -
766 ETH_FCS_LEN) * 2;
767 min_tx_space = ALIGN(min_tx_space, 1024);
768 min_tx_space >>= 10;
769 /* software strips receive CRC, so leave room for it */
770 min_rx_space = adapter->max_frame_size;
771 min_rx_space = ALIGN(min_rx_space, 1024);
772 min_rx_space >>= 10;
773
774 /* If current Tx allocation is less than the min Tx FIFO size,
775 * and the min Tx FIFO size is less than the current Rx FIFO
776 * allocation, take space away from current Rx allocation */
777 if (tx_space < min_tx_space &&
778 ((min_tx_space - tx_space) < pba)) {
779 pba = pba - (min_tx_space - tx_space);
780
781 /* if short on rx space, rx wins and must trump tx
782 * adjustment */
783 if (pba < min_rx_space)
784 pba = min_rx_space;
785 }
786 }
787 wr32(E1000_PBA, pba);
788
789 /* flow control settings */
790 /* The high water mark must be low enough to fit one full frame
791 * (or the size used for early receive) above it in the Rx FIFO.
792 * Set it to the lower of:
793 * - 90% of the Rx FIFO size, or
794 * - the full Rx FIFO size minus one full frame */
795 hwm = min(((pba << 10) * 9 / 10),
796 ((pba << 10) - adapter->max_frame_size));
797
798 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
799 fc->low_water = fc->high_water - 8;
800 fc->pause_time = 0xFFFF;
801 fc->send_xon = 1;
802 fc->type = fc->original_type;
803
804 /* Allow time for pending master requests to run */
805 adapter->hw.mac.ops.reset_hw(&adapter->hw);
806 wr32(E1000_WUC, 0);
807
808 if (adapter->hw.mac.ops.init_hw(&adapter->hw))
809 dev_err(&adapter->pdev->dev, "Hardware Error\n");
810
811 igb_update_mng_vlan(adapter);
812
813 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
814 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
815
816 igb_reset_adaptive(&adapter->hw);
Bill Hayes68707ac2008-02-19 10:24:41 -0800817 if (adapter->hw.phy.ops.get_phy_info)
818 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
Auke Kok9d5c8242008-01-24 02:22:38 -0800819}
820
821/**
Taku Izumi42bfd33a2008-06-20 12:10:30 +0900822 * igb_is_need_ioport - determine if an adapter needs ioport resources or not
823 * @pdev: PCI device information struct
824 *
825 * Returns true if an adapter needs ioport resources
826 **/
827static int igb_is_need_ioport(struct pci_dev *pdev)
828{
829 switch (pdev->device) {
830 /* Currently there are no adapters that need ioport resources */
831 default:
832 return false;
833 }
834}
835
836/**
Auke Kok9d5c8242008-01-24 02:22:38 -0800837 * igb_probe - Device Initialization Routine
838 * @pdev: PCI device information struct
839 * @ent: entry in igb_pci_tbl
840 *
841 * Returns 0 on success, negative on failure
842 *
843 * igb_probe initializes an adapter identified by a pci_dev structure.
844 * The OS initialization, configuring of the adapter private structure,
845 * and a hardware reset occur.
846 **/
847static int __devinit igb_probe(struct pci_dev *pdev,
848 const struct pci_device_id *ent)
849{
850 struct net_device *netdev;
851 struct igb_adapter *adapter;
852 struct e1000_hw *hw;
853 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
854 unsigned long mmio_start, mmio_len;
855 static int cards_found;
856 int i, err, pci_using_dac;
857 u16 eeprom_data = 0;
858 u16 eeprom_apme_mask = IGB_EEPROM_APME;
859 u32 part_num;
Taku Izumi42bfd33a2008-06-20 12:10:30 +0900860 int bars, need_ioport;
Auke Kok9d5c8242008-01-24 02:22:38 -0800861
Taku Izumi42bfd33a2008-06-20 12:10:30 +0900862 /* do not allocate ioport bars when not needed */
863 need_ioport = igb_is_need_ioport(pdev);
864 if (need_ioport) {
865 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
866 err = pci_enable_device(pdev);
867 } else {
868 bars = pci_select_bars(pdev, IORESOURCE_MEM);
869 err = pci_enable_device_mem(pdev);
870 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800871 if (err)
872 return err;
873
874 pci_using_dac = 0;
875 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
876 if (!err) {
877 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
878 if (!err)
879 pci_using_dac = 1;
880 } else {
881 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
882 if (err) {
883 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
884 if (err) {
885 dev_err(&pdev->dev, "No usable DMA "
886 "configuration, aborting\n");
887 goto err_dma;
888 }
889 }
890 }
891
Taku Izumi42bfd33a2008-06-20 12:10:30 +0900892 err = pci_request_selected_regions(pdev, bars, igb_driver_name);
Auke Kok9d5c8242008-01-24 02:22:38 -0800893 if (err)
894 goto err_pci_reg;
895
896 pci_set_master(pdev);
Auke Kokc682fc22008-04-23 11:09:34 -0700897 pci_save_state(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -0800898
899 err = -ENOMEM;
900 netdev = alloc_etherdev(sizeof(struct igb_adapter));
901 if (!netdev)
902 goto err_alloc_etherdev;
903
904 SET_NETDEV_DEV(netdev, &pdev->dev);
905
906 pci_set_drvdata(pdev, netdev);
907 adapter = netdev_priv(netdev);
908 adapter->netdev = netdev;
909 adapter->pdev = pdev;
910 hw = &adapter->hw;
911 hw->back = adapter;
912 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
Taku Izumi42bfd33a2008-06-20 12:10:30 +0900913 adapter->bars = bars;
914 adapter->need_ioport = need_ioport;
Auke Kok9d5c8242008-01-24 02:22:38 -0800915
916 mmio_start = pci_resource_start(pdev, 0);
917 mmio_len = pci_resource_len(pdev, 0);
918
919 err = -EIO;
920 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
921 if (!adapter->hw.hw_addr)
922 goto err_ioremap;
923
924 netdev->open = &igb_open;
925 netdev->stop = &igb_close;
926 netdev->get_stats = &igb_get_stats;
927 netdev->set_multicast_list = &igb_set_multi;
928 netdev->set_mac_address = &igb_set_mac;
929 netdev->change_mtu = &igb_change_mtu;
930 netdev->do_ioctl = &igb_ioctl;
931 igb_set_ethtool_ops(netdev);
932 netdev->tx_timeout = &igb_tx_timeout;
933 netdev->watchdog_timeo = 5 * HZ;
934 netif_napi_add(netdev, &adapter->napi, igb_clean, 64);
935 netdev->vlan_rx_register = igb_vlan_rx_register;
936 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
937 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
938#ifdef CONFIG_NET_POLL_CONTROLLER
939 netdev->poll_controller = igb_netpoll;
940#endif
941 netdev->hard_start_xmit = &igb_xmit_frame_adv;
942
943 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
944
945 netdev->mem_start = mmio_start;
946 netdev->mem_end = mmio_start + mmio_len;
947
948 adapter->bd_number = cards_found;
949
950 /* PCI config space info */
951 hw->vendor_id = pdev->vendor;
952 hw->device_id = pdev->device;
953 hw->revision_id = pdev->revision;
954 hw->subsystem_vendor_id = pdev->subsystem_vendor;
955 hw->subsystem_device_id = pdev->subsystem_device;
956
957 /* setup the private structure */
958 hw->back = adapter;
959 /* Copy the default MAC, PHY and NVM function pointers */
960 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
961 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
962 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
963 /* Initialize skew-specific constants */
964 err = ei->get_invariants(hw);
965 if (err)
966 goto err_hw_init;
967
968 err = igb_sw_init(adapter);
969 if (err)
970 goto err_sw_init;
971
972 igb_get_bus_info_pcie(hw);
973
974 hw->phy.autoneg_wait_to_complete = false;
975 hw->mac.adaptive_ifs = true;
976
977 /* Copper options */
978 if (hw->phy.media_type == e1000_media_type_copper) {
979 hw->phy.mdix = AUTO_ALL_MODES;
980 hw->phy.disable_polarity_correction = false;
981 hw->phy.ms_type = e1000_ms_hw_default;
982 }
983
984 if (igb_check_reset_block(hw))
985 dev_info(&pdev->dev,
986 "PHY reset is blocked due to SOL/IDER session.\n");
987
988 netdev->features = NETIF_F_SG |
989 NETIF_F_HW_CSUM |
990 NETIF_F_HW_VLAN_TX |
991 NETIF_F_HW_VLAN_RX |
992 NETIF_F_HW_VLAN_FILTER;
993
994 netdev->features |= NETIF_F_TSO;
Auke Kok9d5c8242008-01-24 02:22:38 -0800995 netdev->features |= NETIF_F_TSO6;
Jeff Kirsher48f29ff2008-06-05 04:06:27 -0700996
997 netdev->vlan_features |= NETIF_F_TSO;
998 netdev->vlan_features |= NETIF_F_TSO6;
999 netdev->vlan_features |= NETIF_F_HW_CSUM;
1000 netdev->vlan_features |= NETIF_F_SG;
1001
Auke Kok9d5c8242008-01-24 02:22:38 -08001002 if (pci_using_dac)
1003 netdev->features |= NETIF_F_HIGHDMA;
1004
1005 netdev->features |= NETIF_F_LLTX;
1006 adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1007
1008 /* before reading the NVM, reset the controller to put the device in a
1009 * known good starting state */
1010 hw->mac.ops.reset_hw(hw);
1011
1012 /* make sure the NVM is good */
1013 if (igb_validate_nvm_checksum(hw) < 0) {
1014 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1015 err = -EIO;
1016 goto err_eeprom;
1017 }
1018
1019 /* copy the MAC address out of the NVM */
1020 if (hw->mac.ops.read_mac_addr(hw))
1021 dev_err(&pdev->dev, "NVM Read Error\n");
1022
1023 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1024 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1025
1026 if (!is_valid_ether_addr(netdev->perm_addr)) {
1027 dev_err(&pdev->dev, "Invalid MAC Address\n");
1028 err = -EIO;
1029 goto err_eeprom;
1030 }
1031
1032 init_timer(&adapter->watchdog_timer);
1033 adapter->watchdog_timer.function = &igb_watchdog;
1034 adapter->watchdog_timer.data = (unsigned long) adapter;
1035
1036 init_timer(&adapter->phy_info_timer);
1037 adapter->phy_info_timer.function = &igb_update_phy_info;
1038 adapter->phy_info_timer.data = (unsigned long) adapter;
1039
1040 INIT_WORK(&adapter->reset_task, igb_reset_task);
1041 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1042
1043 /* Initialize link & ring properties that are user-changeable */
1044 adapter->tx_ring->count = 256;
1045 for (i = 0; i < adapter->num_tx_queues; i++)
1046 adapter->tx_ring[i].count = adapter->tx_ring->count;
1047 adapter->rx_ring->count = 256;
1048 for (i = 0; i < adapter->num_rx_queues; i++)
1049 adapter->rx_ring[i].count = adapter->rx_ring->count;
1050
1051 adapter->fc_autoneg = true;
1052 hw->mac.autoneg = true;
1053 hw->phy.autoneg_advertised = 0x2f;
1054
1055 hw->fc.original_type = e1000_fc_default;
1056 hw->fc.type = e1000_fc_default;
1057
1058 adapter->itr_setting = 3;
1059 adapter->itr = IGB_START_ITR;
1060
1061 igb_validate_mdi_setting(hw);
1062
1063 adapter->rx_csum = 1;
1064
1065 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1066 * enable the ACPI Magic Packet filter
1067 */
1068
1069 if (hw->bus.func == 0 ||
1070 hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1071 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1072 &eeprom_data);
1073
1074 if (eeprom_data & eeprom_apme_mask)
1075 adapter->eeprom_wol |= E1000_WUFC_MAG;
1076
1077 /* now that we have the eeprom settings, apply the special cases where
1078 * the eeprom may be wrong or the board simply won't support wake on
1079 * lan on a particular port */
1080 switch (pdev->device) {
1081 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1082 adapter->eeprom_wol = 0;
1083 break;
1084 case E1000_DEV_ID_82575EB_FIBER_SERDES:
1085 /* Wake events only supported on port A for dual fiber
1086 * regardless of eeprom setting */
1087 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1088 adapter->eeprom_wol = 0;
1089 break;
1090 }
1091
1092 /* initialize the wol settings based on the eeprom settings */
1093 adapter->wol = adapter->eeprom_wol;
1094
1095 /* reset the hardware with the new settings */
1096 igb_reset(adapter);
1097
1098 /* let the f/w know that the h/w is now under the control of the
1099 * driver. */
1100 igb_get_hw_control(adapter);
1101
1102 /* tell the stack to leave us alone until igb_open() is called */
1103 netif_carrier_off(netdev);
1104 netif_stop_queue(netdev);
1105
1106 strcpy(netdev->name, "eth%d");
1107 err = register_netdev(netdev);
1108 if (err)
1109 goto err_register;
1110
1111 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1112 /* print bus type/speed/width info */
1113 dev_info(&pdev->dev,
1114 "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1115 netdev->name,
1116 ((hw->bus.speed == e1000_bus_speed_2500)
1117 ? "2.5Gb/s" : "unknown"),
1118 ((hw->bus.width == e1000_bus_width_pcie_x4)
1119 ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1120 ? "Width x1" : "unknown"),
1121 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1122 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1123
1124 igb_read_part_num(hw, &part_num);
1125 dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1126 (part_num >> 8), (part_num & 0xff));
1127
1128 dev_info(&pdev->dev,
1129 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1130 adapter->msix_entries ? "MSI-X" :
1131 adapter->msi_enabled ? "MSI" : "legacy",
1132 adapter->num_rx_queues, adapter->num_tx_queues);
1133
1134 cards_found++;
1135 return 0;
1136
1137err_register:
1138 igb_release_hw_control(adapter);
1139err_eeprom:
1140 if (!igb_check_reset_block(hw))
1141 hw->phy.ops.reset_phy(hw);
1142
1143 if (hw->flash_address)
1144 iounmap(hw->flash_address);
1145
1146 igb_remove_device(hw);
1147 kfree(adapter->tx_ring);
1148 kfree(adapter->rx_ring);
1149err_sw_init:
1150err_hw_init:
1151 iounmap(hw->hw_addr);
1152err_ioremap:
1153 free_netdev(netdev);
1154err_alloc_etherdev:
Taku Izumi42bfd33a2008-06-20 12:10:30 +09001155 pci_release_selected_regions(pdev, bars);
Auke Kok9d5c8242008-01-24 02:22:38 -08001156err_pci_reg:
1157err_dma:
1158 pci_disable_device(pdev);
1159 return err;
1160}
1161
1162/**
1163 * igb_remove - Device Removal Routine
1164 * @pdev: PCI device information struct
1165 *
1166 * igb_remove is called by the PCI subsystem to alert the driver
1167 * that it should release a PCI device. The could be caused by a
1168 * Hot-Plug event, or because the driver is going to be removed from
1169 * memory.
1170 **/
1171static void __devexit igb_remove(struct pci_dev *pdev)
1172{
1173 struct net_device *netdev = pci_get_drvdata(pdev);
1174 struct igb_adapter *adapter = netdev_priv(netdev);
1175
1176 /* flush_scheduled work may reschedule our watchdog task, so
1177 * explicitly disable watchdog tasks from being rescheduled */
1178 set_bit(__IGB_DOWN, &adapter->state);
1179 del_timer_sync(&adapter->watchdog_timer);
1180 del_timer_sync(&adapter->phy_info_timer);
1181
1182 flush_scheduled_work();
1183
Auke Kok9d5c8242008-01-24 02:22:38 -08001184 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1185 * would have already happened in close and is redundant. */
1186 igb_release_hw_control(adapter);
1187
1188 unregister_netdev(netdev);
1189
1190 if (!igb_check_reset_block(&adapter->hw))
1191 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1192
1193 igb_remove_device(&adapter->hw);
1194 igb_reset_interrupt_capability(adapter);
1195
1196 kfree(adapter->tx_ring);
1197 kfree(adapter->rx_ring);
1198
1199 iounmap(adapter->hw.hw_addr);
1200 if (adapter->hw.flash_address)
1201 iounmap(adapter->hw.flash_address);
Taku Izumi42bfd33a2008-06-20 12:10:30 +09001202 pci_release_selected_regions(pdev, adapter->bars);
Auke Kok9d5c8242008-01-24 02:22:38 -08001203
1204 free_netdev(netdev);
1205
1206 pci_disable_device(pdev);
1207}
1208
1209/**
1210 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1211 * @adapter: board private structure to initialize
1212 *
1213 * igb_sw_init initializes the Adapter private data structure.
1214 * Fields are initialized based on PCI device information and
1215 * OS network device settings (MTU size).
1216 **/
1217static int __devinit igb_sw_init(struct igb_adapter *adapter)
1218{
1219 struct e1000_hw *hw = &adapter->hw;
1220 struct net_device *netdev = adapter->netdev;
1221 struct pci_dev *pdev = adapter->pdev;
1222
1223 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1224
1225 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1226 adapter->rx_ps_hdr_size = 0; /* disable packet split */
1227 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1228 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1229
1230 /* Number of supported queues. */
1231 /* Having more queues than CPUs doesn't make sense. */
1232 adapter->num_tx_queues = 1;
1233 adapter->num_rx_queues = min(IGB_MAX_RX_QUEUES, num_online_cpus());
1234
1235 igb_set_interrupt_capability(adapter);
1236
1237 if (igb_alloc_queues(adapter)) {
1238 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1239 return -ENOMEM;
1240 }
1241
1242 /* Explicitly disable IRQ since the NIC can be in any state. */
1243 igb_irq_disable(adapter);
1244
1245 set_bit(__IGB_DOWN, &adapter->state);
1246 return 0;
1247}
1248
1249/**
1250 * igb_open - Called when a network interface is made active
1251 * @netdev: network interface device structure
1252 *
1253 * Returns 0 on success, negative value on failure
1254 *
1255 * The open entry point is called when a network interface is made
1256 * active by the system (IFF_UP). At this point all resources needed
1257 * for transmit and receive operations are allocated, the interrupt
1258 * handler is registered with the OS, the watchdog timer is started,
1259 * and the stack is notified that the interface is ready.
1260 **/
1261static int igb_open(struct net_device *netdev)
1262{
1263 struct igb_adapter *adapter = netdev_priv(netdev);
1264 struct e1000_hw *hw = &adapter->hw;
1265 int err;
1266 int i;
1267
1268 /* disallow open during test */
1269 if (test_bit(__IGB_TESTING, &adapter->state))
1270 return -EBUSY;
1271
1272 /* allocate transmit descriptors */
1273 err = igb_setup_all_tx_resources(adapter);
1274 if (err)
1275 goto err_setup_tx;
1276
1277 /* allocate receive descriptors */
1278 err = igb_setup_all_rx_resources(adapter);
1279 if (err)
1280 goto err_setup_rx;
1281
1282 /* e1000_power_up_phy(adapter); */
1283
1284 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1285 if ((adapter->hw.mng_cookie.status &
1286 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1287 igb_update_mng_vlan(adapter);
1288
1289 /* before we allocate an interrupt, we must be ready to handle it.
1290 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1291 * as soon as we call pci_request_irq, so we have to setup our
1292 * clean_rx handler before we do so. */
1293 igb_configure(adapter);
1294
1295 err = igb_request_irq(adapter);
1296 if (err)
1297 goto err_req_irq;
1298
1299 /* From here on the code is the same as igb_up() */
1300 clear_bit(__IGB_DOWN, &adapter->state);
1301
1302 napi_enable(&adapter->napi);
1303 if (adapter->msix_entries)
1304 for (i = 0; i < adapter->num_rx_queues; i++)
1305 napi_enable(&adapter->rx_ring[i].napi);
1306
1307 igb_irq_enable(adapter);
1308
1309 /* Clear any pending interrupts. */
1310 rd32(E1000_ICR);
1311 /* Fire a link status change interrupt to start the watchdog. */
1312 wr32(E1000_ICS, E1000_ICS_LSC);
1313
1314 return 0;
1315
1316err_req_irq:
1317 igb_release_hw_control(adapter);
1318 /* e1000_power_down_phy(adapter); */
1319 igb_free_all_rx_resources(adapter);
1320err_setup_rx:
1321 igb_free_all_tx_resources(adapter);
1322err_setup_tx:
1323 igb_reset(adapter);
1324
1325 return err;
1326}
1327
1328/**
1329 * igb_close - Disables a network interface
1330 * @netdev: network interface device structure
1331 *
1332 * Returns 0, this is not allowed to fail
1333 *
1334 * The close entry point is called when an interface is de-activated
1335 * by the OS. The hardware is still under the driver's control, but
1336 * needs to be disabled. A global MAC reset is issued to stop the
1337 * hardware, and all transmit and receive resources are freed.
1338 **/
1339static int igb_close(struct net_device *netdev)
1340{
1341 struct igb_adapter *adapter = netdev_priv(netdev);
1342
1343 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1344 igb_down(adapter);
1345
1346 igb_free_irq(adapter);
1347
1348 igb_free_all_tx_resources(adapter);
1349 igb_free_all_rx_resources(adapter);
1350
1351 /* kill manageability vlan ID if supported, but not if a vlan with
1352 * the same ID is registered on the host OS (let 8021q kill it) */
1353 if ((adapter->hw.mng_cookie.status &
1354 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1355 !(adapter->vlgrp &&
1356 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1357 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1358
1359 return 0;
1360}
1361
1362/**
1363 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1364 * @adapter: board private structure
1365 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1366 *
1367 * Return 0 on success, negative on failure
1368 **/
1369
1370int igb_setup_tx_resources(struct igb_adapter *adapter,
1371 struct igb_ring *tx_ring)
1372{
1373 struct pci_dev *pdev = adapter->pdev;
1374 int size;
1375
1376 size = sizeof(struct igb_buffer) * tx_ring->count;
1377 tx_ring->buffer_info = vmalloc(size);
1378 if (!tx_ring->buffer_info)
1379 goto err;
1380 memset(tx_ring->buffer_info, 0, size);
1381
1382 /* round up to nearest 4K */
1383 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1384 + sizeof(u32);
1385 tx_ring->size = ALIGN(tx_ring->size, 4096);
1386
1387 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1388 &tx_ring->dma);
1389
1390 if (!tx_ring->desc)
1391 goto err;
1392
1393 tx_ring->adapter = adapter;
1394 tx_ring->next_to_use = 0;
1395 tx_ring->next_to_clean = 0;
1396 spin_lock_init(&tx_ring->tx_clean_lock);
1397 spin_lock_init(&tx_ring->tx_lock);
1398 return 0;
1399
1400err:
1401 vfree(tx_ring->buffer_info);
1402 dev_err(&adapter->pdev->dev,
1403 "Unable to allocate memory for the transmit descriptor ring\n");
1404 return -ENOMEM;
1405}
1406
1407/**
1408 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1409 * (Descriptors) for all queues
1410 * @adapter: board private structure
1411 *
1412 * Return 0 on success, negative on failure
1413 **/
1414static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1415{
1416 int i, err = 0;
1417
1418 for (i = 0; i < adapter->num_tx_queues; i++) {
1419 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1420 if (err) {
1421 dev_err(&adapter->pdev->dev,
1422 "Allocation for Tx Queue %u failed\n", i);
1423 for (i--; i >= 0; i--)
Mitch Williams3b644cf2008-06-27 10:59:48 -07001424 igb_free_tx_resources(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08001425 break;
1426 }
1427 }
1428
1429 return err;
1430}
1431
1432/**
1433 * igb_configure_tx - Configure transmit Unit after Reset
1434 * @adapter: board private structure
1435 *
1436 * Configure the Tx unit of the MAC after a reset.
1437 **/
1438static void igb_configure_tx(struct igb_adapter *adapter)
1439{
1440 u64 tdba, tdwba;
1441 struct e1000_hw *hw = &adapter->hw;
1442 u32 tctl;
1443 u32 txdctl, txctrl;
1444 int i;
1445
1446 for (i = 0; i < adapter->num_tx_queues; i++) {
1447 struct igb_ring *ring = &(adapter->tx_ring[i]);
1448
1449 wr32(E1000_TDLEN(i),
1450 ring->count * sizeof(struct e1000_tx_desc));
1451 tdba = ring->dma;
1452 wr32(E1000_TDBAL(i),
1453 tdba & 0x00000000ffffffffULL);
1454 wr32(E1000_TDBAH(i), tdba >> 32);
1455
1456 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1457 tdwba |= 1; /* enable head wb */
1458 wr32(E1000_TDWBAL(i),
1459 tdwba & 0x00000000ffffffffULL);
1460 wr32(E1000_TDWBAH(i), tdwba >> 32);
1461
1462 ring->head = E1000_TDH(i);
1463 ring->tail = E1000_TDT(i);
1464 writel(0, hw->hw_addr + ring->tail);
1465 writel(0, hw->hw_addr + ring->head);
1466 txdctl = rd32(E1000_TXDCTL(i));
1467 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1468 wr32(E1000_TXDCTL(i), txdctl);
1469
1470 /* Turn off Relaxed Ordering on head write-backs. The
1471 * writebacks MUST be delivered in order or it will
1472 * completely screw up our bookeeping.
1473 */
1474 txctrl = rd32(E1000_DCA_TXCTRL(i));
1475 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1476 wr32(E1000_DCA_TXCTRL(i), txctrl);
1477 }
1478
1479
1480
1481 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1482
1483 /* Program the Transmit Control Register */
1484
1485 tctl = rd32(E1000_TCTL);
1486 tctl &= ~E1000_TCTL_CT;
1487 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1488 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1489
1490 igb_config_collision_dist(hw);
1491
1492 /* Setup Transmit Descriptor Settings for eop descriptor */
1493 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1494
1495 /* Enable transmits */
1496 tctl |= E1000_TCTL_EN;
1497
1498 wr32(E1000_TCTL, tctl);
1499}
1500
1501/**
1502 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1503 * @adapter: board private structure
1504 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1505 *
1506 * Returns 0 on success, negative on failure
1507 **/
1508
1509int igb_setup_rx_resources(struct igb_adapter *adapter,
1510 struct igb_ring *rx_ring)
1511{
1512 struct pci_dev *pdev = adapter->pdev;
1513 int size, desc_len;
1514
1515 size = sizeof(struct igb_buffer) * rx_ring->count;
1516 rx_ring->buffer_info = vmalloc(size);
1517 if (!rx_ring->buffer_info)
1518 goto err;
1519 memset(rx_ring->buffer_info, 0, size);
1520
1521 desc_len = sizeof(union e1000_adv_rx_desc);
1522
1523 /* Round up to nearest 4K */
1524 rx_ring->size = rx_ring->count * desc_len;
1525 rx_ring->size = ALIGN(rx_ring->size, 4096);
1526
1527 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1528 &rx_ring->dma);
1529
1530 if (!rx_ring->desc)
1531 goto err;
1532
1533 rx_ring->next_to_clean = 0;
1534 rx_ring->next_to_use = 0;
1535 rx_ring->pending_skb = NULL;
1536
1537 rx_ring->adapter = adapter;
1538 /* FIXME: do we want to setup ring->napi->poll here? */
1539 rx_ring->napi.poll = adapter->napi.poll;
1540
1541 return 0;
1542
1543err:
1544 vfree(rx_ring->buffer_info);
1545 dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1546 "the receive descriptor ring\n");
1547 return -ENOMEM;
1548}
1549
1550/**
1551 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1552 * (Descriptors) for all queues
1553 * @adapter: board private structure
1554 *
1555 * Return 0 on success, negative on failure
1556 **/
1557static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1558{
1559 int i, err = 0;
1560
1561 for (i = 0; i < adapter->num_rx_queues; i++) {
1562 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1563 if (err) {
1564 dev_err(&adapter->pdev->dev,
1565 "Allocation for Rx Queue %u failed\n", i);
1566 for (i--; i >= 0; i--)
Mitch Williams3b644cf2008-06-27 10:59:48 -07001567 igb_free_rx_resources(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08001568 break;
1569 }
1570 }
1571
1572 return err;
1573}
1574
1575/**
1576 * igb_setup_rctl - configure the receive control registers
1577 * @adapter: Board private structure
1578 **/
1579static void igb_setup_rctl(struct igb_adapter *adapter)
1580{
1581 struct e1000_hw *hw = &adapter->hw;
1582 u32 rctl;
1583 u32 srrctl = 0;
1584 int i;
1585
1586 rctl = rd32(E1000_RCTL);
1587
1588 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1589
1590 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1591 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1592 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1593
1594 /* disable the stripping of CRC because it breaks
1595 * BMC firmware connected over SMBUS
1596 rctl |= E1000_RCTL_SECRC;
1597 */
1598
1599 rctl &= ~E1000_RCTL_SBP;
1600
1601 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1602 rctl &= ~E1000_RCTL_LPE;
1603 else
1604 rctl |= E1000_RCTL_LPE;
1605 if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1606 /* Setup buffer sizes */
1607 rctl &= ~E1000_RCTL_SZ_4096;
1608 rctl |= E1000_RCTL_BSEX;
1609 switch (adapter->rx_buffer_len) {
1610 case IGB_RXBUFFER_256:
1611 rctl |= E1000_RCTL_SZ_256;
1612 rctl &= ~E1000_RCTL_BSEX;
1613 break;
1614 case IGB_RXBUFFER_512:
1615 rctl |= E1000_RCTL_SZ_512;
1616 rctl &= ~E1000_RCTL_BSEX;
1617 break;
1618 case IGB_RXBUFFER_1024:
1619 rctl |= E1000_RCTL_SZ_1024;
1620 rctl &= ~E1000_RCTL_BSEX;
1621 break;
1622 case IGB_RXBUFFER_2048:
1623 default:
1624 rctl |= E1000_RCTL_SZ_2048;
1625 rctl &= ~E1000_RCTL_BSEX;
1626 break;
1627 case IGB_RXBUFFER_4096:
1628 rctl |= E1000_RCTL_SZ_4096;
1629 break;
1630 case IGB_RXBUFFER_8192:
1631 rctl |= E1000_RCTL_SZ_8192;
1632 break;
1633 case IGB_RXBUFFER_16384:
1634 rctl |= E1000_RCTL_SZ_16384;
1635 break;
1636 }
1637 } else {
1638 rctl &= ~E1000_RCTL_BSEX;
1639 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1640 }
1641
1642 /* 82575 and greater support packet-split where the protocol
1643 * header is placed in skb->data and the packet data is
1644 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1645 * In the case of a non-split, skb->data is linearly filled,
1646 * followed by the page buffers. Therefore, skb->data is
1647 * sized to hold the largest protocol header.
1648 */
1649 /* allocations using alloc_page take too long for regular MTU
1650 * so only enable packet split for jumbo frames */
1651 if (rctl & E1000_RCTL_LPE) {
1652 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1653 srrctl = adapter->rx_ps_hdr_size <<
1654 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1655 /* buffer size is ALWAYS one page */
1656 srrctl |= PAGE_SIZE >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1657 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1658 } else {
1659 adapter->rx_ps_hdr_size = 0;
1660 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1661 }
1662
1663 for (i = 0; i < adapter->num_rx_queues; i++)
1664 wr32(E1000_SRRCTL(i), srrctl);
1665
1666 wr32(E1000_RCTL, rctl);
1667}
1668
1669/**
1670 * igb_configure_rx - Configure receive Unit after Reset
1671 * @adapter: board private structure
1672 *
1673 * Configure the Rx unit of the MAC after a reset.
1674 **/
1675static void igb_configure_rx(struct igb_adapter *adapter)
1676{
1677 u64 rdba;
1678 struct e1000_hw *hw = &adapter->hw;
1679 u32 rctl, rxcsum;
1680 u32 rxdctl;
1681 int i;
1682
1683 /* disable receives while setting up the descriptors */
1684 rctl = rd32(E1000_RCTL);
1685 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1686 wrfl();
1687 mdelay(10);
1688
1689 if (adapter->itr_setting > 3)
1690 wr32(E1000_ITR,
1691 1000000000 / (adapter->itr * 256));
1692
1693 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1694 * the Base and Length of the Rx Descriptor Ring */
1695 for (i = 0; i < adapter->num_rx_queues; i++) {
1696 struct igb_ring *ring = &(adapter->rx_ring[i]);
1697 rdba = ring->dma;
1698 wr32(E1000_RDBAL(i),
1699 rdba & 0x00000000ffffffffULL);
1700 wr32(E1000_RDBAH(i), rdba >> 32);
1701 wr32(E1000_RDLEN(i),
1702 ring->count * sizeof(union e1000_adv_rx_desc));
1703
1704 ring->head = E1000_RDH(i);
1705 ring->tail = E1000_RDT(i);
1706 writel(0, hw->hw_addr + ring->tail);
1707 writel(0, hw->hw_addr + ring->head);
1708
1709 rxdctl = rd32(E1000_RXDCTL(i));
1710 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1711 rxdctl &= 0xFFF00000;
1712 rxdctl |= IGB_RX_PTHRESH;
1713 rxdctl |= IGB_RX_HTHRESH << 8;
1714 rxdctl |= IGB_RX_WTHRESH << 16;
1715 wr32(E1000_RXDCTL(i), rxdctl);
1716 }
1717
1718 if (adapter->num_rx_queues > 1) {
1719 u32 random[10];
1720 u32 mrqc;
1721 u32 j, shift;
1722 union e1000_reta {
1723 u32 dword;
1724 u8 bytes[4];
1725 } reta;
1726
1727 get_random_bytes(&random[0], 40);
1728
1729 shift = 6;
1730 for (j = 0; j < (32 * 4); j++) {
1731 reta.bytes[j & 3] =
1732 (j % adapter->num_rx_queues) << shift;
1733 if ((j & 3) == 3)
1734 writel(reta.dword,
1735 hw->hw_addr + E1000_RETA(0) + (j & ~3));
1736 }
1737 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1738
1739 /* Fill out hash function seeds */
1740 for (j = 0; j < 10; j++)
1741 array_wr32(E1000_RSSRK(0), j, random[j]);
1742
1743 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1744 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1745 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1746 E1000_MRQC_RSS_FIELD_IPV6_TCP);
1747 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1748 E1000_MRQC_RSS_FIELD_IPV6_UDP);
1749 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1750 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1751
1752
1753 wr32(E1000_MRQC, mrqc);
1754
1755 /* Multiqueue and raw packet checksumming are mutually
1756 * exclusive. Note that this not the same as TCP/IP
1757 * checksumming, which works fine. */
1758 rxcsum = rd32(E1000_RXCSUM);
1759 rxcsum |= E1000_RXCSUM_PCSD;
1760 wr32(E1000_RXCSUM, rxcsum);
1761 } else {
1762 /* Enable Receive Checksum Offload for TCP and UDP */
1763 rxcsum = rd32(E1000_RXCSUM);
1764 if (adapter->rx_csum) {
1765 rxcsum |= E1000_RXCSUM_TUOFL;
1766
1767 /* Enable IPv4 payload checksum for UDP fragments
1768 * Must be used in conjunction with packet-split. */
1769 if (adapter->rx_ps_hdr_size)
1770 rxcsum |= E1000_RXCSUM_IPPCSE;
1771 } else {
1772 rxcsum &= ~E1000_RXCSUM_TUOFL;
1773 /* don't need to clear IPPCSE as it defaults to 0 */
1774 }
1775 wr32(E1000_RXCSUM, rxcsum);
1776 }
1777
1778 if (adapter->vlgrp)
1779 wr32(E1000_RLPML,
1780 adapter->max_frame_size + VLAN_TAG_SIZE);
1781 else
1782 wr32(E1000_RLPML, adapter->max_frame_size);
1783
1784 /* Enable Receives */
1785 wr32(E1000_RCTL, rctl);
1786}
1787
1788/**
1789 * igb_free_tx_resources - Free Tx Resources per Queue
1790 * @adapter: board private structure
1791 * @tx_ring: Tx descriptor ring for a specific queue
1792 *
1793 * Free all transmit software resources
1794 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07001795static void igb_free_tx_resources(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08001796{
Mitch Williams3b644cf2008-06-27 10:59:48 -07001797 struct pci_dev *pdev = tx_ring->adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08001798
Mitch Williams3b644cf2008-06-27 10:59:48 -07001799 igb_clean_tx_ring(tx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08001800
1801 vfree(tx_ring->buffer_info);
1802 tx_ring->buffer_info = NULL;
1803
1804 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1805
1806 tx_ring->desc = NULL;
1807}
1808
1809/**
1810 * igb_free_all_tx_resources - Free Tx Resources for All Queues
1811 * @adapter: board private structure
1812 *
1813 * Free all transmit software resources
1814 **/
1815static void igb_free_all_tx_resources(struct igb_adapter *adapter)
1816{
1817 int i;
1818
1819 for (i = 0; i < adapter->num_tx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07001820 igb_free_tx_resources(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08001821}
1822
1823static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
1824 struct igb_buffer *buffer_info)
1825{
1826 if (buffer_info->dma) {
1827 pci_unmap_page(adapter->pdev,
1828 buffer_info->dma,
1829 buffer_info->length,
1830 PCI_DMA_TODEVICE);
1831 buffer_info->dma = 0;
1832 }
1833 if (buffer_info->skb) {
1834 dev_kfree_skb_any(buffer_info->skb);
1835 buffer_info->skb = NULL;
1836 }
1837 buffer_info->time_stamp = 0;
1838 /* buffer_info must be completely set up in the transmit path */
1839}
1840
1841/**
1842 * igb_clean_tx_ring - Free Tx Buffers
1843 * @adapter: board private structure
1844 * @tx_ring: ring to be cleaned
1845 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07001846static void igb_clean_tx_ring(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08001847{
Mitch Williams3b644cf2008-06-27 10:59:48 -07001848 struct igb_adapter *adapter = tx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08001849 struct igb_buffer *buffer_info;
1850 unsigned long size;
1851 unsigned int i;
1852
1853 if (!tx_ring->buffer_info)
1854 return;
1855 /* Free all the Tx ring sk_buffs */
1856
1857 for (i = 0; i < tx_ring->count; i++) {
1858 buffer_info = &tx_ring->buffer_info[i];
1859 igb_unmap_and_free_tx_resource(adapter, buffer_info);
1860 }
1861
1862 size = sizeof(struct igb_buffer) * tx_ring->count;
1863 memset(tx_ring->buffer_info, 0, size);
1864
1865 /* Zero out the descriptor ring */
1866
1867 memset(tx_ring->desc, 0, tx_ring->size);
1868
1869 tx_ring->next_to_use = 0;
1870 tx_ring->next_to_clean = 0;
1871
1872 writel(0, adapter->hw.hw_addr + tx_ring->head);
1873 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1874}
1875
1876/**
1877 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
1878 * @adapter: board private structure
1879 **/
1880static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
1881{
1882 int i;
1883
1884 for (i = 0; i < adapter->num_tx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07001885 igb_clean_tx_ring(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08001886}
1887
1888/**
1889 * igb_free_rx_resources - Free Rx Resources
1890 * @adapter: board private structure
1891 * @rx_ring: ring to clean the resources from
1892 *
1893 * Free all receive software resources
1894 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07001895static void igb_free_rx_resources(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08001896{
Mitch Williams3b644cf2008-06-27 10:59:48 -07001897 struct pci_dev *pdev = rx_ring->adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08001898
Mitch Williams3b644cf2008-06-27 10:59:48 -07001899 igb_clean_rx_ring(rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08001900
1901 vfree(rx_ring->buffer_info);
1902 rx_ring->buffer_info = NULL;
1903
1904 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1905
1906 rx_ring->desc = NULL;
1907}
1908
1909/**
1910 * igb_free_all_rx_resources - Free Rx Resources for All Queues
1911 * @adapter: board private structure
1912 *
1913 * Free all receive software resources
1914 **/
1915static void igb_free_all_rx_resources(struct igb_adapter *adapter)
1916{
1917 int i;
1918
1919 for (i = 0; i < adapter->num_rx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07001920 igb_free_rx_resources(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08001921}
1922
1923/**
1924 * igb_clean_rx_ring - Free Rx Buffers per Queue
1925 * @adapter: board private structure
1926 * @rx_ring: ring to free buffers from
1927 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07001928static void igb_clean_rx_ring(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08001929{
Mitch Williams3b644cf2008-06-27 10:59:48 -07001930 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08001931 struct igb_buffer *buffer_info;
1932 struct pci_dev *pdev = adapter->pdev;
1933 unsigned long size;
1934 unsigned int i;
1935
1936 if (!rx_ring->buffer_info)
1937 return;
1938 /* Free all the Rx ring sk_buffs */
1939 for (i = 0; i < rx_ring->count; i++) {
1940 buffer_info = &rx_ring->buffer_info[i];
1941 if (buffer_info->dma) {
1942 if (adapter->rx_ps_hdr_size)
1943 pci_unmap_single(pdev, buffer_info->dma,
1944 adapter->rx_ps_hdr_size,
1945 PCI_DMA_FROMDEVICE);
1946 else
1947 pci_unmap_single(pdev, buffer_info->dma,
1948 adapter->rx_buffer_len,
1949 PCI_DMA_FROMDEVICE);
1950 buffer_info->dma = 0;
1951 }
1952
1953 if (buffer_info->skb) {
1954 dev_kfree_skb(buffer_info->skb);
1955 buffer_info->skb = NULL;
1956 }
1957 if (buffer_info->page) {
1958 pci_unmap_page(pdev, buffer_info->page_dma,
1959 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1960 put_page(buffer_info->page);
1961 buffer_info->page = NULL;
1962 buffer_info->page_dma = 0;
1963 }
1964 }
1965
1966 /* there also may be some cached data from a chained receive */
1967 if (rx_ring->pending_skb) {
1968 dev_kfree_skb(rx_ring->pending_skb);
1969 rx_ring->pending_skb = NULL;
1970 }
1971
1972 size = sizeof(struct igb_buffer) * rx_ring->count;
1973 memset(rx_ring->buffer_info, 0, size);
1974
1975 /* Zero out the descriptor ring */
1976 memset(rx_ring->desc, 0, rx_ring->size);
1977
1978 rx_ring->next_to_clean = 0;
1979 rx_ring->next_to_use = 0;
1980
1981 writel(0, adapter->hw.hw_addr + rx_ring->head);
1982 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1983}
1984
1985/**
1986 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
1987 * @adapter: board private structure
1988 **/
1989static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
1990{
1991 int i;
1992
1993 for (i = 0; i < adapter->num_rx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07001994 igb_clean_rx_ring(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08001995}
1996
1997/**
1998 * igb_set_mac - Change the Ethernet Address of the NIC
1999 * @netdev: network interface device structure
2000 * @p: pointer to an address structure
2001 *
2002 * Returns 0 on success, negative on failure
2003 **/
2004static int igb_set_mac(struct net_device *netdev, void *p)
2005{
2006 struct igb_adapter *adapter = netdev_priv(netdev);
2007 struct sockaddr *addr = p;
2008
2009 if (!is_valid_ether_addr(addr->sa_data))
2010 return -EADDRNOTAVAIL;
2011
2012 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2013 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2014
2015 adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2016
2017 return 0;
2018}
2019
2020/**
2021 * igb_set_multi - Multicast and Promiscuous mode set
2022 * @netdev: network interface device structure
2023 *
2024 * The set_multi entry point is called whenever the multicast address
2025 * list or the network interface flags are updated. This routine is
2026 * responsible for configuring the hardware for proper multicast,
2027 * promiscuous mode, and all-multi behavior.
2028 **/
2029static void igb_set_multi(struct net_device *netdev)
2030{
2031 struct igb_adapter *adapter = netdev_priv(netdev);
2032 struct e1000_hw *hw = &adapter->hw;
2033 struct e1000_mac_info *mac = &hw->mac;
2034 struct dev_mc_list *mc_ptr;
2035 u8 *mta_list;
2036 u32 rctl;
2037 int i;
2038
2039 /* Check for Promiscuous and All Multicast modes */
2040
2041 rctl = rd32(E1000_RCTL);
2042
2043 if (netdev->flags & IFF_PROMISC)
2044 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2045 else if (netdev->flags & IFF_ALLMULTI) {
2046 rctl |= E1000_RCTL_MPE;
2047 rctl &= ~E1000_RCTL_UPE;
2048 } else
2049 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2050
2051 wr32(E1000_RCTL, rctl);
2052
2053 if (!netdev->mc_count) {
2054 /* nothing to program, so clear mc list */
2055 igb_update_mc_addr_list(hw, NULL, 0, 1,
2056 mac->rar_entry_count);
2057 return;
2058 }
2059
2060 mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2061 if (!mta_list)
2062 return;
2063
2064 /* The shared function expects a packed array of only addresses. */
2065 mc_ptr = netdev->mc_list;
2066
2067 for (i = 0; i < netdev->mc_count; i++) {
2068 if (!mc_ptr)
2069 break;
2070 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2071 mc_ptr = mc_ptr->next;
2072 }
2073 igb_update_mc_addr_list(hw, mta_list, i, 1, mac->rar_entry_count);
2074 kfree(mta_list);
2075}
2076
2077/* Need to wait a few seconds after link up to get diagnostic information from
2078 * the phy */
2079static void igb_update_phy_info(unsigned long data)
2080{
2081 struct igb_adapter *adapter = (struct igb_adapter *) data;
Bill Hayes68707ac2008-02-19 10:24:41 -08002082 if (adapter->hw.phy.ops.get_phy_info)
2083 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08002084}
2085
2086/**
2087 * igb_watchdog - Timer Call-back
2088 * @data: pointer to adapter cast into an unsigned long
2089 **/
2090static void igb_watchdog(unsigned long data)
2091{
2092 struct igb_adapter *adapter = (struct igb_adapter *)data;
2093 /* Do the rest outside of interrupt context */
2094 schedule_work(&adapter->watchdog_task);
2095}
2096
2097static void igb_watchdog_task(struct work_struct *work)
2098{
2099 struct igb_adapter *adapter = container_of(work,
2100 struct igb_adapter, watchdog_task);
2101 struct e1000_hw *hw = &adapter->hw;
2102
2103 struct net_device *netdev = adapter->netdev;
2104 struct igb_ring *tx_ring = adapter->tx_ring;
2105 struct e1000_mac_info *mac = &adapter->hw.mac;
2106 u32 link;
2107 s32 ret_val;
2108
2109 if ((netif_carrier_ok(netdev)) &&
2110 (rd32(E1000_STATUS) & E1000_STATUS_LU))
2111 goto link_up;
2112
2113 ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2114 if ((ret_val == E1000_ERR_PHY) &&
2115 (hw->phy.type == e1000_phy_igp_3) &&
2116 (rd32(E1000_CTRL) &
2117 E1000_PHY_CTRL_GBE_DISABLE))
2118 dev_info(&adapter->pdev->dev,
2119 "Gigabit has been disabled, downgrading speed\n");
2120
2121 if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2122 !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2123 link = mac->serdes_has_link;
2124 else
2125 link = rd32(E1000_STATUS) &
2126 E1000_STATUS_LU;
2127
2128 if (link) {
2129 if (!netif_carrier_ok(netdev)) {
2130 u32 ctrl;
2131 hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2132 &adapter->link_speed,
2133 &adapter->link_duplex);
2134
2135 ctrl = rd32(E1000_CTRL);
2136 dev_info(&adapter->pdev->dev,
2137 "NIC Link is Up %d Mbps %s, "
2138 "Flow Control: %s\n",
2139 adapter->link_speed,
2140 adapter->link_duplex == FULL_DUPLEX ?
2141 "Full Duplex" : "Half Duplex",
2142 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2143 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2144 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2145 E1000_CTRL_TFCE) ? "TX" : "None")));
2146
2147 /* tweak tx_queue_len according to speed/duplex and
2148 * adjust the timeout factor */
2149 netdev->tx_queue_len = adapter->tx_queue_len;
2150 adapter->tx_timeout_factor = 1;
2151 switch (adapter->link_speed) {
2152 case SPEED_10:
2153 netdev->tx_queue_len = 10;
2154 adapter->tx_timeout_factor = 14;
2155 break;
2156 case SPEED_100:
2157 netdev->tx_queue_len = 100;
2158 /* maybe add some timeout factor ? */
2159 break;
2160 }
2161
2162 netif_carrier_on(netdev);
2163 netif_wake_queue(netdev);
2164
2165 if (!test_bit(__IGB_DOWN, &adapter->state))
2166 mod_timer(&adapter->phy_info_timer,
2167 round_jiffies(jiffies + 2 * HZ));
2168 }
2169 } else {
2170 if (netif_carrier_ok(netdev)) {
2171 adapter->link_speed = 0;
2172 adapter->link_duplex = 0;
2173 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2174 netif_carrier_off(netdev);
2175 netif_stop_queue(netdev);
2176 if (!test_bit(__IGB_DOWN, &adapter->state))
2177 mod_timer(&adapter->phy_info_timer,
2178 round_jiffies(jiffies + 2 * HZ));
2179 }
2180 }
2181
2182link_up:
2183 igb_update_stats(adapter);
2184
2185 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2186 adapter->tpt_old = adapter->stats.tpt;
2187 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2188 adapter->colc_old = adapter->stats.colc;
2189
2190 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2191 adapter->gorc_old = adapter->stats.gorc;
2192 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2193 adapter->gotc_old = adapter->stats.gotc;
2194
2195 igb_update_adaptive(&adapter->hw);
2196
2197 if (!netif_carrier_ok(netdev)) {
2198 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2199 /* We've lost link, so the controller stops DMA,
2200 * but we've got queued Tx work that's never going
2201 * to get done, so reset controller to flush Tx.
2202 * (Do the reset outside of interrupt context). */
2203 adapter->tx_timeout_count++;
2204 schedule_work(&adapter->reset_task);
2205 }
2206 }
2207
2208 /* Cause software interrupt to ensure rx ring is cleaned */
2209 wr32(E1000_ICS, E1000_ICS_RXDMT0);
2210
2211 /* Force detection of hung controller every watchdog period */
2212 tx_ring->detect_tx_hung = true;
2213
2214 /* Reset the timer */
2215 if (!test_bit(__IGB_DOWN, &adapter->state))
2216 mod_timer(&adapter->watchdog_timer,
2217 round_jiffies(jiffies + 2 * HZ));
2218}
2219
2220enum latency_range {
2221 lowest_latency = 0,
2222 low_latency = 1,
2223 bulk_latency = 2,
2224 latency_invalid = 255
2225};
2226
2227
2228static void igb_lower_rx_eitr(struct igb_adapter *adapter,
2229 struct igb_ring *rx_ring)
2230{
2231 struct e1000_hw *hw = &adapter->hw;
2232 int new_val;
2233
2234 new_val = rx_ring->itr_val / 2;
2235 if (new_val < IGB_MIN_DYN_ITR)
2236 new_val = IGB_MIN_DYN_ITR;
2237
2238 if (new_val != rx_ring->itr_val) {
2239 rx_ring->itr_val = new_val;
2240 wr32(rx_ring->itr_register,
2241 1000000000 / (new_val * 256));
2242 }
2243}
2244
2245static void igb_raise_rx_eitr(struct igb_adapter *adapter,
2246 struct igb_ring *rx_ring)
2247{
2248 struct e1000_hw *hw = &adapter->hw;
2249 int new_val;
2250
2251 new_val = rx_ring->itr_val * 2;
2252 if (new_val > IGB_MAX_DYN_ITR)
2253 new_val = IGB_MAX_DYN_ITR;
2254
2255 if (new_val != rx_ring->itr_val) {
2256 rx_ring->itr_val = new_val;
2257 wr32(rx_ring->itr_register,
2258 1000000000 / (new_val * 256));
2259 }
2260}
2261
2262/**
2263 * igb_update_itr - update the dynamic ITR value based on statistics
2264 * Stores a new ITR value based on packets and byte
2265 * counts during the last interrupt. The advantage of per interrupt
2266 * computation is faster updates and more accurate ITR for the current
2267 * traffic pattern. Constants in this function were computed
2268 * based on theoretical maximum wire speed and thresholds were set based
2269 * on testing data as well as attempting to minimize response time
2270 * while increasing bulk throughput.
2271 * this functionality is controlled by the InterruptThrottleRate module
2272 * parameter (see igb_param.c)
2273 * NOTE: These calculations are only valid when operating in a single-
2274 * queue environment.
2275 * @adapter: pointer to adapter
2276 * @itr_setting: current adapter->itr
2277 * @packets: the number of packets during this measurement interval
2278 * @bytes: the number of bytes during this measurement interval
2279 **/
2280static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2281 int packets, int bytes)
2282{
2283 unsigned int retval = itr_setting;
2284
2285 if (packets == 0)
2286 goto update_itr_done;
2287
2288 switch (itr_setting) {
2289 case lowest_latency:
2290 /* handle TSO and jumbo frames */
2291 if (bytes/packets > 8000)
2292 retval = bulk_latency;
2293 else if ((packets < 5) && (bytes > 512))
2294 retval = low_latency;
2295 break;
2296 case low_latency: /* 50 usec aka 20000 ints/s */
2297 if (bytes > 10000) {
2298 /* this if handles the TSO accounting */
2299 if (bytes/packets > 8000) {
2300 retval = bulk_latency;
2301 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2302 retval = bulk_latency;
2303 } else if ((packets > 35)) {
2304 retval = lowest_latency;
2305 }
2306 } else if (bytes/packets > 2000) {
2307 retval = bulk_latency;
2308 } else if (packets <= 2 && bytes < 512) {
2309 retval = lowest_latency;
2310 }
2311 break;
2312 case bulk_latency: /* 250 usec aka 4000 ints/s */
2313 if (bytes > 25000) {
2314 if (packets > 35)
2315 retval = low_latency;
2316 } else if (bytes < 6000) {
2317 retval = low_latency;
2318 }
2319 break;
2320 }
2321
2322update_itr_done:
2323 return retval;
2324}
2325
2326static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register,
2327 int rx_only)
2328{
2329 u16 current_itr;
2330 u32 new_itr = adapter->itr;
2331
2332 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2333 if (adapter->link_speed != SPEED_1000) {
2334 current_itr = 0;
2335 new_itr = 4000;
2336 goto set_itr_now;
2337 }
2338
2339 adapter->rx_itr = igb_update_itr(adapter,
2340 adapter->rx_itr,
2341 adapter->rx_ring->total_packets,
2342 adapter->rx_ring->total_bytes);
2343 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2344 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2345 adapter->rx_itr = low_latency;
2346
2347 if (!rx_only) {
2348 adapter->tx_itr = igb_update_itr(adapter,
2349 adapter->tx_itr,
2350 adapter->tx_ring->total_packets,
2351 adapter->tx_ring->total_bytes);
2352 /* conservative mode (itr 3) eliminates the
2353 * lowest_latency setting */
2354 if (adapter->itr_setting == 3 &&
2355 adapter->tx_itr == lowest_latency)
2356 adapter->tx_itr = low_latency;
2357
2358 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2359 } else {
2360 current_itr = adapter->rx_itr;
2361 }
2362
2363 switch (current_itr) {
2364 /* counts and packets in update_itr are dependent on these numbers */
2365 case lowest_latency:
2366 new_itr = 70000;
2367 break;
2368 case low_latency:
2369 new_itr = 20000; /* aka hwitr = ~200 */
2370 break;
2371 case bulk_latency:
2372 new_itr = 4000;
2373 break;
2374 default:
2375 break;
2376 }
2377
2378set_itr_now:
2379 if (new_itr != adapter->itr) {
2380 /* this attempts to bias the interrupt rate towards Bulk
2381 * by adding intermediate steps when interrupt rate is
2382 * increasing */
2383 new_itr = new_itr > adapter->itr ?
2384 min(adapter->itr + (new_itr >> 2), new_itr) :
2385 new_itr;
2386 /* Don't write the value here; it resets the adapter's
2387 * internal timer, and causes us to delay far longer than
2388 * we should between interrupts. Instead, we write the ITR
2389 * value at the beginning of the next interrupt so the timing
2390 * ends up being correct.
2391 */
2392 adapter->itr = new_itr;
2393 adapter->set_itr = 1;
2394 }
2395
2396 return;
2397}
2398
2399
2400#define IGB_TX_FLAGS_CSUM 0x00000001
2401#define IGB_TX_FLAGS_VLAN 0x00000002
2402#define IGB_TX_FLAGS_TSO 0x00000004
2403#define IGB_TX_FLAGS_IPV4 0x00000008
2404#define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2405#define IGB_TX_FLAGS_VLAN_SHIFT 16
2406
2407static inline int igb_tso_adv(struct igb_adapter *adapter,
2408 struct igb_ring *tx_ring,
2409 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2410{
2411 struct e1000_adv_tx_context_desc *context_desc;
2412 unsigned int i;
2413 int err;
2414 struct igb_buffer *buffer_info;
2415 u32 info = 0, tu_cmd = 0;
2416 u32 mss_l4len_idx, l4len;
2417 *hdr_len = 0;
2418
2419 if (skb_header_cloned(skb)) {
2420 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2421 if (err)
2422 return err;
2423 }
2424
2425 l4len = tcp_hdrlen(skb);
2426 *hdr_len += l4len;
2427
2428 if (skb->protocol == htons(ETH_P_IP)) {
2429 struct iphdr *iph = ip_hdr(skb);
2430 iph->tot_len = 0;
2431 iph->check = 0;
2432 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2433 iph->daddr, 0,
2434 IPPROTO_TCP,
2435 0);
2436 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2437 ipv6_hdr(skb)->payload_len = 0;
2438 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2439 &ipv6_hdr(skb)->daddr,
2440 0, IPPROTO_TCP, 0);
2441 }
2442
2443 i = tx_ring->next_to_use;
2444
2445 buffer_info = &tx_ring->buffer_info[i];
2446 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2447 /* VLAN MACLEN IPLEN */
2448 if (tx_flags & IGB_TX_FLAGS_VLAN)
2449 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2450 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2451 *hdr_len += skb_network_offset(skb);
2452 info |= skb_network_header_len(skb);
2453 *hdr_len += skb_network_header_len(skb);
2454 context_desc->vlan_macip_lens = cpu_to_le32(info);
2455
2456 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2457 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2458
2459 if (skb->protocol == htons(ETH_P_IP))
2460 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2461 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2462
2463 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2464
2465 /* MSS L4LEN IDX */
2466 mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2467 mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2468
2469 /* Context index must be unique per ring. Luckily, so is the interrupt
2470 * mask value. */
2471 mss_l4len_idx |= tx_ring->eims_value >> 4;
2472
2473 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2474 context_desc->seqnum_seed = 0;
2475
2476 buffer_info->time_stamp = jiffies;
2477 buffer_info->dma = 0;
2478 i++;
2479 if (i == tx_ring->count)
2480 i = 0;
2481
2482 tx_ring->next_to_use = i;
2483
2484 return true;
2485}
2486
2487static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2488 struct igb_ring *tx_ring,
2489 struct sk_buff *skb, u32 tx_flags)
2490{
2491 struct e1000_adv_tx_context_desc *context_desc;
2492 unsigned int i;
2493 struct igb_buffer *buffer_info;
2494 u32 info = 0, tu_cmd = 0;
2495
2496 if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2497 (tx_flags & IGB_TX_FLAGS_VLAN)) {
2498 i = tx_ring->next_to_use;
2499 buffer_info = &tx_ring->buffer_info[i];
2500 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2501
2502 if (tx_flags & IGB_TX_FLAGS_VLAN)
2503 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2504 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2505 if (skb->ip_summed == CHECKSUM_PARTIAL)
2506 info |= skb_network_header_len(skb);
2507
2508 context_desc->vlan_macip_lens = cpu_to_le32(info);
2509
2510 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2511
2512 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Mitch Williams44b0cda2008-03-07 10:32:13 -08002513 switch (skb->protocol) {
2514 case __constant_htons(ETH_P_IP):
Auke Kok9d5c8242008-01-24 02:22:38 -08002515 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
Mitch Williams44b0cda2008-03-07 10:32:13 -08002516 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2517 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2518 break;
2519 case __constant_htons(ETH_P_IPV6):
2520 /* XXX what about other V6 headers?? */
2521 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2522 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2523 break;
2524 default:
2525 if (unlikely(net_ratelimit()))
2526 dev_warn(&adapter->pdev->dev,
2527 "partial checksum but proto=%x!\n",
2528 skb->protocol);
2529 break;
2530 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002531 }
2532
2533 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2534 context_desc->seqnum_seed = 0;
2535 context_desc->mss_l4len_idx =
2536 cpu_to_le32(tx_ring->eims_value >> 4);
2537
2538 buffer_info->time_stamp = jiffies;
2539 buffer_info->dma = 0;
2540
2541 i++;
2542 if (i == tx_ring->count)
2543 i = 0;
2544 tx_ring->next_to_use = i;
2545
2546 return true;
2547 }
2548
2549
2550 return false;
2551}
2552
2553#define IGB_MAX_TXD_PWR 16
2554#define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2555
2556static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2557 struct igb_ring *tx_ring,
2558 struct sk_buff *skb)
2559{
2560 struct igb_buffer *buffer_info;
2561 unsigned int len = skb_headlen(skb);
2562 unsigned int count = 0, i;
2563 unsigned int f;
2564
2565 i = tx_ring->next_to_use;
2566
2567 buffer_info = &tx_ring->buffer_info[i];
2568 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2569 buffer_info->length = len;
2570 /* set time_stamp *before* dma to help avoid a possible race */
2571 buffer_info->time_stamp = jiffies;
2572 buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2573 PCI_DMA_TODEVICE);
2574 count++;
2575 i++;
2576 if (i == tx_ring->count)
2577 i = 0;
2578
2579 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2580 struct skb_frag_struct *frag;
2581
2582 frag = &skb_shinfo(skb)->frags[f];
2583 len = frag->size;
2584
2585 buffer_info = &tx_ring->buffer_info[i];
2586 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2587 buffer_info->length = len;
2588 buffer_info->time_stamp = jiffies;
2589 buffer_info->dma = pci_map_page(adapter->pdev,
2590 frag->page,
2591 frag->page_offset,
2592 len,
2593 PCI_DMA_TODEVICE);
2594
2595 count++;
2596 i++;
2597 if (i == tx_ring->count)
2598 i = 0;
2599 }
2600
2601 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2602 tx_ring->buffer_info[i].skb = skb;
2603
2604 return count;
2605}
2606
2607static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2608 struct igb_ring *tx_ring,
2609 int tx_flags, int count, u32 paylen,
2610 u8 hdr_len)
2611{
2612 union e1000_adv_tx_desc *tx_desc = NULL;
2613 struct igb_buffer *buffer_info;
2614 u32 olinfo_status = 0, cmd_type_len;
2615 unsigned int i;
2616
2617 cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2618 E1000_ADVTXD_DCMD_DEXT);
2619
2620 if (tx_flags & IGB_TX_FLAGS_VLAN)
2621 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2622
2623 if (tx_flags & IGB_TX_FLAGS_TSO) {
2624 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2625
2626 /* insert tcp checksum */
2627 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2628
2629 /* insert ip checksum */
2630 if (tx_flags & IGB_TX_FLAGS_IPV4)
2631 olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2632
2633 } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2634 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2635 }
2636
2637 if (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2638 IGB_TX_FLAGS_VLAN))
2639 olinfo_status |= tx_ring->eims_value >> 4;
2640
2641 olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2642
2643 i = tx_ring->next_to_use;
2644 while (count--) {
2645 buffer_info = &tx_ring->buffer_info[i];
2646 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2647 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2648 tx_desc->read.cmd_type_len =
2649 cpu_to_le32(cmd_type_len | buffer_info->length);
2650 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2651 i++;
2652 if (i == tx_ring->count)
2653 i = 0;
2654 }
2655
2656 tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2657 /* Force memory writes to complete before letting h/w
2658 * know there are new descriptors to fetch. (Only
2659 * applicable for weak-ordered memory model archs,
2660 * such as IA-64). */
2661 wmb();
2662
2663 tx_ring->next_to_use = i;
2664 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2665 /* we need this if more than one processor can write to our tail
2666 * at a time, it syncronizes IO on IA64/Altix systems */
2667 mmiowb();
2668}
2669
2670static int __igb_maybe_stop_tx(struct net_device *netdev,
2671 struct igb_ring *tx_ring, int size)
2672{
2673 struct igb_adapter *adapter = netdev_priv(netdev);
2674
2675 netif_stop_queue(netdev);
2676 /* Herbert's original patch had:
2677 * smp_mb__after_netif_stop_queue();
2678 * but since that doesn't exist yet, just open code it. */
2679 smp_mb();
2680
2681 /* We need to check again in a case another CPU has just
2682 * made room available. */
2683 if (IGB_DESC_UNUSED(tx_ring) < size)
2684 return -EBUSY;
2685
2686 /* A reprieve! */
2687 netif_start_queue(netdev);
2688 ++adapter->restart_queue;
2689 return 0;
2690}
2691
2692static int igb_maybe_stop_tx(struct net_device *netdev,
2693 struct igb_ring *tx_ring, int size)
2694{
2695 if (IGB_DESC_UNUSED(tx_ring) >= size)
2696 return 0;
2697 return __igb_maybe_stop_tx(netdev, tx_ring, size);
2698}
2699
2700#define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2701
2702static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2703 struct net_device *netdev,
2704 struct igb_ring *tx_ring)
2705{
2706 struct igb_adapter *adapter = netdev_priv(netdev);
2707 unsigned int tx_flags = 0;
2708 unsigned int len;
2709 unsigned long irq_flags;
2710 u8 hdr_len = 0;
2711 int tso = 0;
2712
2713 len = skb_headlen(skb);
2714
2715 if (test_bit(__IGB_DOWN, &adapter->state)) {
2716 dev_kfree_skb_any(skb);
2717 return NETDEV_TX_OK;
2718 }
2719
2720 if (skb->len <= 0) {
2721 dev_kfree_skb_any(skb);
2722 return NETDEV_TX_OK;
2723 }
2724
2725 if (!spin_trylock_irqsave(&tx_ring->tx_lock, irq_flags))
2726 /* Collision - tell upper layer to requeue */
2727 return NETDEV_TX_LOCKED;
2728
2729 /* need: 1 descriptor per page,
2730 * + 2 desc gap to keep tail from touching head,
2731 * + 1 desc for skb->data,
2732 * + 1 desc for context descriptor,
2733 * otherwise try next time */
2734 if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2735 /* this is a hard error */
2736 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2737 return NETDEV_TX_BUSY;
2738 }
2739
2740 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2741 tx_flags |= IGB_TX_FLAGS_VLAN;
2742 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2743 }
2744
2745 tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2746 &hdr_len) : 0;
2747
2748 if (tso < 0) {
2749 dev_kfree_skb_any(skb);
2750 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2751 return NETDEV_TX_OK;
2752 }
2753
2754 if (tso)
2755 tx_flags |= IGB_TX_FLAGS_TSO;
2756 else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2757 if (skb->ip_summed == CHECKSUM_PARTIAL)
2758 tx_flags |= IGB_TX_FLAGS_CSUM;
2759
2760 if (skb->protocol == htons(ETH_P_IP))
2761 tx_flags |= IGB_TX_FLAGS_IPV4;
2762
2763 igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2764 igb_tx_map_adv(adapter, tx_ring, skb),
2765 skb->len, hdr_len);
2766
2767 netdev->trans_start = jiffies;
2768
2769 /* Make sure there is space in the ring for the next send. */
2770 igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
2771
2772 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2773 return NETDEV_TX_OK;
2774}
2775
2776static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
2777{
2778 struct igb_adapter *adapter = netdev_priv(netdev);
2779 struct igb_ring *tx_ring = &adapter->tx_ring[0];
2780
2781 /* This goes back to the question of how to logically map a tx queue
2782 * to a flow. Right now, performance is impacted slightly negatively
2783 * if using multiple tx queues. If the stack breaks away from a
2784 * single qdisc implementation, we can look at this again. */
2785 return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
2786}
2787
2788/**
2789 * igb_tx_timeout - Respond to a Tx Hang
2790 * @netdev: network interface device structure
2791 **/
2792static void igb_tx_timeout(struct net_device *netdev)
2793{
2794 struct igb_adapter *adapter = netdev_priv(netdev);
2795 struct e1000_hw *hw = &adapter->hw;
2796
2797 /* Do the reset outside of interrupt context */
2798 adapter->tx_timeout_count++;
2799 schedule_work(&adapter->reset_task);
2800 wr32(E1000_EICS, adapter->eims_enable_mask &
2801 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
2802}
2803
2804static void igb_reset_task(struct work_struct *work)
2805{
2806 struct igb_adapter *adapter;
2807 adapter = container_of(work, struct igb_adapter, reset_task);
2808
2809 igb_reinit_locked(adapter);
2810}
2811
2812/**
2813 * igb_get_stats - Get System Network Statistics
2814 * @netdev: network interface device structure
2815 *
2816 * Returns the address of the device statistics structure.
2817 * The statistics are actually updated from the timer callback.
2818 **/
2819static struct net_device_stats *
2820igb_get_stats(struct net_device *netdev)
2821{
2822 struct igb_adapter *adapter = netdev_priv(netdev);
2823
2824 /* only return the current stats */
2825 return &adapter->net_stats;
2826}
2827
2828/**
2829 * igb_change_mtu - Change the Maximum Transfer Unit
2830 * @netdev: network interface device structure
2831 * @new_mtu: new value for maximum frame size
2832 *
2833 * Returns 0 on success, negative on failure
2834 **/
2835static int igb_change_mtu(struct net_device *netdev, int new_mtu)
2836{
2837 struct igb_adapter *adapter = netdev_priv(netdev);
2838 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2839
2840 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2841 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2842 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
2843 return -EINVAL;
2844 }
2845
2846#define MAX_STD_JUMBO_FRAME_SIZE 9234
2847 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2848 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
2849 return -EINVAL;
2850 }
2851
2852 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2853 msleep(1);
2854 /* igb_down has a dependency on max_frame_size */
2855 adapter->max_frame_size = max_frame;
2856 if (netif_running(netdev))
2857 igb_down(adapter);
2858
2859 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
2860 * means we reserve 2 more, this pushes us to allocate from the next
2861 * larger slab size.
2862 * i.e. RXBUFFER_2048 --> size-4096 slab
2863 */
2864
2865 if (max_frame <= IGB_RXBUFFER_256)
2866 adapter->rx_buffer_len = IGB_RXBUFFER_256;
2867 else if (max_frame <= IGB_RXBUFFER_512)
2868 adapter->rx_buffer_len = IGB_RXBUFFER_512;
2869 else if (max_frame <= IGB_RXBUFFER_1024)
2870 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
2871 else if (max_frame <= IGB_RXBUFFER_2048)
2872 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
2873 else
2874 adapter->rx_buffer_len = IGB_RXBUFFER_4096;
2875 /* adjust allocation if LPE protects us, and we aren't using SBP */
2876 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
2877 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
2878 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
2879
2880 dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
2881 netdev->mtu, new_mtu);
2882 netdev->mtu = new_mtu;
2883
2884 if (netif_running(netdev))
2885 igb_up(adapter);
2886 else
2887 igb_reset(adapter);
2888
2889 clear_bit(__IGB_RESETTING, &adapter->state);
2890
2891 return 0;
2892}
2893
2894/**
2895 * igb_update_stats - Update the board statistics counters
2896 * @adapter: board private structure
2897 **/
2898
2899void igb_update_stats(struct igb_adapter *adapter)
2900{
2901 struct e1000_hw *hw = &adapter->hw;
2902 struct pci_dev *pdev = adapter->pdev;
2903 u16 phy_tmp;
2904
2905#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2906
2907 /*
2908 * Prevent stats update while adapter is being reset, or if the pci
2909 * connection is down.
2910 */
2911 if (adapter->link_speed == 0)
2912 return;
2913 if (pci_channel_offline(pdev))
2914 return;
2915
2916 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
2917 adapter->stats.gprc += rd32(E1000_GPRC);
2918 adapter->stats.gorc += rd32(E1000_GORCL);
2919 rd32(E1000_GORCH); /* clear GORCL */
2920 adapter->stats.bprc += rd32(E1000_BPRC);
2921 adapter->stats.mprc += rd32(E1000_MPRC);
2922 adapter->stats.roc += rd32(E1000_ROC);
2923
2924 adapter->stats.prc64 += rd32(E1000_PRC64);
2925 adapter->stats.prc127 += rd32(E1000_PRC127);
2926 adapter->stats.prc255 += rd32(E1000_PRC255);
2927 adapter->stats.prc511 += rd32(E1000_PRC511);
2928 adapter->stats.prc1023 += rd32(E1000_PRC1023);
2929 adapter->stats.prc1522 += rd32(E1000_PRC1522);
2930 adapter->stats.symerrs += rd32(E1000_SYMERRS);
2931 adapter->stats.sec += rd32(E1000_SEC);
2932
2933 adapter->stats.mpc += rd32(E1000_MPC);
2934 adapter->stats.scc += rd32(E1000_SCC);
2935 adapter->stats.ecol += rd32(E1000_ECOL);
2936 adapter->stats.mcc += rd32(E1000_MCC);
2937 adapter->stats.latecol += rd32(E1000_LATECOL);
2938 adapter->stats.dc += rd32(E1000_DC);
2939 adapter->stats.rlec += rd32(E1000_RLEC);
2940 adapter->stats.xonrxc += rd32(E1000_XONRXC);
2941 adapter->stats.xontxc += rd32(E1000_XONTXC);
2942 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
2943 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
2944 adapter->stats.fcruc += rd32(E1000_FCRUC);
2945 adapter->stats.gptc += rd32(E1000_GPTC);
2946 adapter->stats.gotc += rd32(E1000_GOTCL);
2947 rd32(E1000_GOTCH); /* clear GOTCL */
2948 adapter->stats.rnbc += rd32(E1000_RNBC);
2949 adapter->stats.ruc += rd32(E1000_RUC);
2950 adapter->stats.rfc += rd32(E1000_RFC);
2951 adapter->stats.rjc += rd32(E1000_RJC);
2952 adapter->stats.tor += rd32(E1000_TORH);
2953 adapter->stats.tot += rd32(E1000_TOTH);
2954 adapter->stats.tpr += rd32(E1000_TPR);
2955
2956 adapter->stats.ptc64 += rd32(E1000_PTC64);
2957 adapter->stats.ptc127 += rd32(E1000_PTC127);
2958 adapter->stats.ptc255 += rd32(E1000_PTC255);
2959 adapter->stats.ptc511 += rd32(E1000_PTC511);
2960 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
2961 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
2962
2963 adapter->stats.mptc += rd32(E1000_MPTC);
2964 adapter->stats.bptc += rd32(E1000_BPTC);
2965
2966 /* used for adaptive IFS */
2967
2968 hw->mac.tx_packet_delta = rd32(E1000_TPT);
2969 adapter->stats.tpt += hw->mac.tx_packet_delta;
2970 hw->mac.collision_delta = rd32(E1000_COLC);
2971 adapter->stats.colc += hw->mac.collision_delta;
2972
2973 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
2974 adapter->stats.rxerrc += rd32(E1000_RXERRC);
2975 adapter->stats.tncrs += rd32(E1000_TNCRS);
2976 adapter->stats.tsctc += rd32(E1000_TSCTC);
2977 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
2978
2979 adapter->stats.iac += rd32(E1000_IAC);
2980 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
2981 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
2982 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
2983 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
2984 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
2985 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
2986 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
2987 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
2988
2989 /* Fill out the OS statistics structure */
2990 adapter->net_stats.multicast = adapter->stats.mprc;
2991 adapter->net_stats.collisions = adapter->stats.colc;
2992
2993 /* Rx Errors */
2994
2995 /* RLEC on some newer hardware can be incorrect so build
2996 * our own version based on RUC and ROC */
2997 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
2998 adapter->stats.crcerrs + adapter->stats.algnerrc +
2999 adapter->stats.ruc + adapter->stats.roc +
3000 adapter->stats.cexterr;
3001 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3002 adapter->stats.roc;
3003 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3004 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3005 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3006
3007 /* Tx Errors */
3008 adapter->net_stats.tx_errors = adapter->stats.ecol +
3009 adapter->stats.latecol;
3010 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3011 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3012 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3013
3014 /* Tx Dropped needs to be maintained elsewhere */
3015
3016 /* Phy Stats */
3017 if (hw->phy.media_type == e1000_media_type_copper) {
3018 if ((adapter->link_speed == SPEED_1000) &&
3019 (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3020 &phy_tmp))) {
3021 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3022 adapter->phy_stats.idle_errors += phy_tmp;
3023 }
3024 }
3025
3026 /* Management Stats */
3027 adapter->stats.mgptc += rd32(E1000_MGTPTC);
3028 adapter->stats.mgprc += rd32(E1000_MGTPRC);
3029 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3030}
3031
3032
3033static irqreturn_t igb_msix_other(int irq, void *data)
3034{
3035 struct net_device *netdev = data;
3036 struct igb_adapter *adapter = netdev_priv(netdev);
3037 struct e1000_hw *hw = &adapter->hw;
3038 u32 eicr;
3039 /* disable interrupts from the "other" bit, avoid re-entry */
3040 wr32(E1000_EIMC, E1000_EIMS_OTHER);
3041
3042 eicr = rd32(E1000_EICR);
3043
3044 if (eicr & E1000_EIMS_OTHER) {
3045 u32 icr = rd32(E1000_ICR);
3046 /* reading ICR causes bit 31 of EICR to be cleared */
3047 if (!(icr & E1000_ICR_LSC))
3048 goto no_link_interrupt;
3049 hw->mac.get_link_status = 1;
3050 /* guard against interrupt when we're going down */
3051 if (!test_bit(__IGB_DOWN, &adapter->state))
3052 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3053 }
3054
3055no_link_interrupt:
3056 wr32(E1000_IMS, E1000_IMS_LSC);
3057 wr32(E1000_EIMS, E1000_EIMS_OTHER);
3058
3059 return IRQ_HANDLED;
3060}
3061
3062static irqreturn_t igb_msix_tx(int irq, void *data)
3063{
3064 struct igb_ring *tx_ring = data;
3065 struct igb_adapter *adapter = tx_ring->adapter;
3066 struct e1000_hw *hw = &adapter->hw;
3067
3068 if (!tx_ring->itr_val)
3069 wr32(E1000_EIMC, tx_ring->eims_value);
3070
3071 tx_ring->total_bytes = 0;
3072 tx_ring->total_packets = 0;
Mitch Williams3b644cf2008-06-27 10:59:48 -07003073 if (!igb_clean_tx_irq(tx_ring))
Auke Kok9d5c8242008-01-24 02:22:38 -08003074 /* Ring was not completely cleaned, so fire another interrupt */
3075 wr32(E1000_EICS, tx_ring->eims_value);
3076
3077 if (!tx_ring->itr_val)
3078 wr32(E1000_EIMS, tx_ring->eims_value);
3079 return IRQ_HANDLED;
3080}
3081
3082static irqreturn_t igb_msix_rx(int irq, void *data)
3083{
3084 struct igb_ring *rx_ring = data;
3085 struct igb_adapter *adapter = rx_ring->adapter;
3086 struct e1000_hw *hw = &adapter->hw;
3087
3088 if (!rx_ring->itr_val)
3089 wr32(E1000_EIMC, rx_ring->eims_value);
3090
3091 if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi)) {
3092 rx_ring->total_bytes = 0;
3093 rx_ring->total_packets = 0;
3094 rx_ring->no_itr_adjust = 0;
3095 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3096 } else {
3097 if (!rx_ring->no_itr_adjust) {
3098 igb_lower_rx_eitr(adapter, rx_ring);
3099 rx_ring->no_itr_adjust = 1;
3100 }
3101 }
3102
3103 return IRQ_HANDLED;
3104}
3105
3106
3107/**
3108 * igb_intr_msi - Interrupt Handler
3109 * @irq: interrupt number
3110 * @data: pointer to a network interface device structure
3111 **/
3112static irqreturn_t igb_intr_msi(int irq, void *data)
3113{
3114 struct net_device *netdev = data;
3115 struct igb_adapter *adapter = netdev_priv(netdev);
3116 struct napi_struct *napi = &adapter->napi;
3117 struct e1000_hw *hw = &adapter->hw;
3118 /* read ICR disables interrupts using IAM */
3119 u32 icr = rd32(E1000_ICR);
3120
3121 /* Write the ITR value calculated at the end of the
3122 * previous interrupt.
3123 */
3124 if (adapter->set_itr) {
3125 wr32(E1000_ITR,
3126 1000000000 / (adapter->itr * 256));
3127 adapter->set_itr = 0;
3128 }
3129
3130 /* read ICR disables interrupts using IAM */
3131 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3132 hw->mac.get_link_status = 1;
3133 if (!test_bit(__IGB_DOWN, &adapter->state))
3134 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3135 }
3136
3137 if (netif_rx_schedule_prep(netdev, napi)) {
3138 adapter->tx_ring->total_bytes = 0;
3139 adapter->tx_ring->total_packets = 0;
3140 adapter->rx_ring->total_bytes = 0;
3141 adapter->rx_ring->total_packets = 0;
3142 __netif_rx_schedule(netdev, napi);
3143 }
3144
3145 return IRQ_HANDLED;
3146}
3147
3148/**
3149 * igb_intr - Interrupt Handler
3150 * @irq: interrupt number
3151 * @data: pointer to a network interface device structure
3152 **/
3153static irqreturn_t igb_intr(int irq, void *data)
3154{
3155 struct net_device *netdev = data;
3156 struct igb_adapter *adapter = netdev_priv(netdev);
3157 struct napi_struct *napi = &adapter->napi;
3158 struct e1000_hw *hw = &adapter->hw;
3159 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3160 * need for the IMC write */
3161 u32 icr = rd32(E1000_ICR);
3162 u32 eicr = 0;
3163 if (!icr)
3164 return IRQ_NONE; /* Not our interrupt */
3165
3166 /* Write the ITR value calculated at the end of the
3167 * previous interrupt.
3168 */
3169 if (adapter->set_itr) {
3170 wr32(E1000_ITR,
3171 1000000000 / (adapter->itr * 256));
3172 adapter->set_itr = 0;
3173 }
3174
3175 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3176 * not set, then the adapter didn't send an interrupt */
3177 if (!(icr & E1000_ICR_INT_ASSERTED))
3178 return IRQ_NONE;
3179
3180 eicr = rd32(E1000_EICR);
3181
3182 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3183 hw->mac.get_link_status = 1;
3184 /* guard against interrupt when we're going down */
3185 if (!test_bit(__IGB_DOWN, &adapter->state))
3186 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3187 }
3188
3189 if (netif_rx_schedule_prep(netdev, napi)) {
3190 adapter->tx_ring->total_bytes = 0;
3191 adapter->rx_ring->total_bytes = 0;
3192 adapter->tx_ring->total_packets = 0;
3193 adapter->rx_ring->total_packets = 0;
3194 __netif_rx_schedule(netdev, napi);
3195 }
3196
3197 return IRQ_HANDLED;
3198}
3199
3200/**
3201 * igb_clean - NAPI Rx polling callback
3202 * @adapter: board private structure
3203 **/
3204static int igb_clean(struct napi_struct *napi, int budget)
3205{
3206 struct igb_adapter *adapter = container_of(napi, struct igb_adapter,
3207 napi);
3208 struct net_device *netdev = adapter->netdev;
3209 int tx_clean_complete = 1, work_done = 0;
3210 int i;
3211
3212 /* Must NOT use netdev_priv macro here. */
3213 adapter = netdev->priv;
3214
3215 /* Keep link state information with original netdev */
3216 if (!netif_carrier_ok(netdev))
3217 goto quit_polling;
3218
3219 /* igb_clean is called per-cpu. This lock protects tx_ring[i] from
3220 * being cleaned by multiple cpus simultaneously. A failure obtaining
3221 * the lock means tx_ring[i] is currently being cleaned anyway. */
3222 for (i = 0; i < adapter->num_tx_queues; i++) {
3223 if (spin_trylock(&adapter->tx_ring[i].tx_clean_lock)) {
Mitch Williams3b644cf2008-06-27 10:59:48 -07003224 tx_clean_complete &= igb_clean_tx_irq(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08003225 spin_unlock(&adapter->tx_ring[i].tx_clean_lock);
3226 }
3227 }
3228
3229 for (i = 0; i < adapter->num_rx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07003230 igb_clean_rx_irq_adv(&adapter->rx_ring[i], &work_done,
Auke Kok9d5c8242008-01-24 02:22:38 -08003231 adapter->rx_ring[i].napi.weight);
3232
3233 /* If no Tx and not enough Rx work done, exit the polling mode */
3234 if ((tx_clean_complete && (work_done < budget)) ||
3235 !netif_running(netdev)) {
3236quit_polling:
3237 if (adapter->itr_setting & 3)
3238 igb_set_itr(adapter, E1000_ITR, false);
3239 netif_rx_complete(netdev, napi);
3240 if (!test_bit(__IGB_DOWN, &adapter->state))
3241 igb_irq_enable(adapter);
3242 return 0;
3243 }
3244
3245 return 1;
3246}
3247
3248static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3249{
3250 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3251 struct igb_adapter *adapter = rx_ring->adapter;
3252 struct e1000_hw *hw = &adapter->hw;
3253 struct net_device *netdev = adapter->netdev;
3254 int work_done = 0;
3255
3256 /* Keep link state information with original netdev */
3257 if (!netif_carrier_ok(netdev))
3258 goto quit_polling;
3259
Mitch Williams3b644cf2008-06-27 10:59:48 -07003260 igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
Auke Kok9d5c8242008-01-24 02:22:38 -08003261
3262
3263 /* If not enough Rx work done, exit the polling mode */
3264 if ((work_done == 0) || !netif_running(netdev)) {
3265quit_polling:
3266 netif_rx_complete(netdev, napi);
3267
3268 wr32(E1000_EIMS, rx_ring->eims_value);
3269 if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust &&
3270 (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) {
3271 int mean_size = rx_ring->total_bytes /
3272 rx_ring->total_packets;
3273 if (mean_size < IGB_DYN_ITR_LENGTH_LOW)
3274 igb_raise_rx_eitr(adapter, rx_ring);
3275 else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH)
3276 igb_lower_rx_eitr(adapter, rx_ring);
3277 }
3278 return 0;
3279 }
3280
3281 return 1;
3282}
Al Viro6d8126f2008-03-16 22:23:24 +00003283
3284static inline u32 get_head(struct igb_ring *tx_ring)
3285{
3286 void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3287 return le32_to_cpu(*(volatile __le32 *)end);
3288}
3289
Auke Kok9d5c8242008-01-24 02:22:38 -08003290/**
3291 * igb_clean_tx_irq - Reclaim resources after transmit completes
3292 * @adapter: board private structure
3293 * returns true if ring is completely cleaned
3294 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07003295static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08003296{
Mitch Williams3b644cf2008-06-27 10:59:48 -07003297 struct igb_adapter *adapter = tx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08003298 struct e1000_hw *hw = &adapter->hw;
Mitch Williams3b644cf2008-06-27 10:59:48 -07003299 struct net_device *netdev = adapter->netdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08003300 struct e1000_tx_desc *tx_desc;
3301 struct igb_buffer *buffer_info;
3302 struct sk_buff *skb;
3303 unsigned int i;
3304 u32 head, oldhead;
3305 unsigned int count = 0;
3306 bool cleaned = false;
3307 bool retval = true;
3308 unsigned int total_bytes = 0, total_packets = 0;
3309
3310 rmb();
Al Viro6d8126f2008-03-16 22:23:24 +00003311 head = get_head(tx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003312 i = tx_ring->next_to_clean;
3313 while (1) {
3314 while (i != head) {
3315 cleaned = true;
3316 tx_desc = E1000_TX_DESC(*tx_ring, i);
3317 buffer_info = &tx_ring->buffer_info[i];
3318 skb = buffer_info->skb;
3319
3320 if (skb) {
3321 unsigned int segs, bytecount;
3322 /* gso_segs is currently only valid for tcp */
3323 segs = skb_shinfo(skb)->gso_segs ?: 1;
3324 /* multiply data chunks by size of headers */
3325 bytecount = ((segs - 1) * skb_headlen(skb)) +
3326 skb->len;
3327 total_packets += segs;
3328 total_bytes += bytecount;
3329 }
3330
3331 igb_unmap_and_free_tx_resource(adapter, buffer_info);
3332 tx_desc->upper.data = 0;
3333
3334 i++;
3335 if (i == tx_ring->count)
3336 i = 0;
3337
3338 count++;
3339 if (count == IGB_MAX_TX_CLEAN) {
3340 retval = false;
3341 goto done_cleaning;
3342 }
3343 }
3344 oldhead = head;
3345 rmb();
Al Viro6d8126f2008-03-16 22:23:24 +00003346 head = get_head(tx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003347 if (head == oldhead)
3348 goto done_cleaning;
3349 } /* while (1) */
3350
3351done_cleaning:
3352 tx_ring->next_to_clean = i;
3353
3354 if (unlikely(cleaned &&
3355 netif_carrier_ok(netdev) &&
3356 IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3357 /* Make sure that anybody stopping the queue after this
3358 * sees the new next_to_clean.
3359 */
3360 smp_mb();
3361 if (netif_queue_stopped(netdev) &&
3362 !(test_bit(__IGB_DOWN, &adapter->state))) {
3363 netif_wake_queue(netdev);
3364 ++adapter->restart_queue;
3365 }
3366 }
3367
3368 if (tx_ring->detect_tx_hung) {
3369 /* Detect a transmit hang in hardware, this serializes the
3370 * check with the clearing of time_stamp and movement of i */
3371 tx_ring->detect_tx_hung = false;
3372 if (tx_ring->buffer_info[i].time_stamp &&
3373 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3374 (adapter->tx_timeout_factor * HZ))
3375 && !(rd32(E1000_STATUS) &
3376 E1000_STATUS_TXOFF)) {
3377
3378 tx_desc = E1000_TX_DESC(*tx_ring, i);
3379 /* detected Tx unit hang */
3380 dev_err(&adapter->pdev->dev,
3381 "Detected Tx Unit Hang\n"
3382 " Tx Queue <%lu>\n"
3383 " TDH <%x>\n"
3384 " TDT <%x>\n"
3385 " next_to_use <%x>\n"
3386 " next_to_clean <%x>\n"
3387 " head (WB) <%x>\n"
3388 "buffer_info[next_to_clean]\n"
3389 " time_stamp <%lx>\n"
3390 " jiffies <%lx>\n"
3391 " desc.status <%x>\n",
3392 (unsigned long)((tx_ring - adapter->tx_ring) /
3393 sizeof(struct igb_ring)),
3394 readl(adapter->hw.hw_addr + tx_ring->head),
3395 readl(adapter->hw.hw_addr + tx_ring->tail),
3396 tx_ring->next_to_use,
3397 tx_ring->next_to_clean,
3398 head,
3399 tx_ring->buffer_info[i].time_stamp,
3400 jiffies,
3401 tx_desc->upper.fields.status);
3402 netif_stop_queue(netdev);
3403 }
3404 }
3405 tx_ring->total_bytes += total_bytes;
3406 tx_ring->total_packets += total_packets;
3407 adapter->net_stats.tx_bytes += total_bytes;
3408 adapter->net_stats.tx_packets += total_packets;
3409 return retval;
3410}
3411
3412
3413/**
3414 * igb_receive_skb - helper function to handle rx indications
3415 * @adapter: board private structure
3416 * @status: descriptor status field as written by hardware
3417 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3418 * @skb: pointer to sk_buff to be indicated to stack
3419 **/
Al Viro6d8126f2008-03-16 22:23:24 +00003420static void igb_receive_skb(struct igb_adapter *adapter, u8 status, __le16 vlan,
Auke Kok9d5c8242008-01-24 02:22:38 -08003421 struct sk_buff *skb)
3422{
3423 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
3424 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3425 le16_to_cpu(vlan) &
3426 E1000_RXD_SPC_VLAN_MASK);
3427 else
3428 netif_receive_skb(skb);
3429}
3430
3431
3432static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3433 u32 status_err, struct sk_buff *skb)
3434{
3435 skb->ip_summed = CHECKSUM_NONE;
3436
3437 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3438 if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3439 return;
3440 /* TCP/UDP checksum error bit is set */
3441 if (status_err &
3442 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3443 /* let the stack verify checksum errors */
3444 adapter->hw_csum_err++;
3445 return;
3446 }
3447 /* It must be a TCP or UDP packet with a valid checksum */
3448 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3449 skb->ip_summed = CHECKSUM_UNNECESSARY;
3450
3451 adapter->hw_csum_good++;
3452}
3453
Mitch Williams3b644cf2008-06-27 10:59:48 -07003454static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3455 int *work_done, int budget)
Auke Kok9d5c8242008-01-24 02:22:38 -08003456{
Mitch Williams3b644cf2008-06-27 10:59:48 -07003457 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08003458 struct net_device *netdev = adapter->netdev;
3459 struct pci_dev *pdev = adapter->pdev;
3460 union e1000_adv_rx_desc *rx_desc , *next_rxd;
3461 struct igb_buffer *buffer_info , *next_buffer;
3462 struct sk_buff *skb;
3463 unsigned int i, j;
3464 u32 length, hlen, staterr;
3465 bool cleaned = false;
3466 int cleaned_count = 0;
3467 unsigned int total_bytes = 0, total_packets = 0;
3468
3469 i = rx_ring->next_to_clean;
3470 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3471 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3472
3473 while (staterr & E1000_RXD_STAT_DD) {
3474 if (*work_done >= budget)
3475 break;
3476 (*work_done)++;
3477 buffer_info = &rx_ring->buffer_info[i];
3478
3479 /* HW will not DMA in data larger than the given buffer, even
3480 * if it parses the (NFS, of course) header to be larger. In
3481 * that case, it fills the header buffer and spills the rest
3482 * into the page.
3483 */
Al Viro7deb07b2008-03-16 22:43:06 +00003484 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3485 E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
Auke Kok9d5c8242008-01-24 02:22:38 -08003486 if (hlen > adapter->rx_ps_hdr_size)
3487 hlen = adapter->rx_ps_hdr_size;
3488
3489 length = le16_to_cpu(rx_desc->wb.upper.length);
3490 cleaned = true;
3491 cleaned_count++;
3492
3493 if (rx_ring->pending_skb != NULL) {
3494 skb = rx_ring->pending_skb;
3495 rx_ring->pending_skb = NULL;
3496 j = rx_ring->pending_skb_page;
3497 } else {
3498 skb = buffer_info->skb;
3499 prefetch(skb->data - NET_IP_ALIGN);
3500 buffer_info->skb = NULL;
3501 if (hlen) {
3502 pci_unmap_single(pdev, buffer_info->dma,
3503 adapter->rx_ps_hdr_size +
3504 NET_IP_ALIGN,
3505 PCI_DMA_FROMDEVICE);
3506 skb_put(skb, hlen);
3507 } else {
3508 pci_unmap_single(pdev, buffer_info->dma,
3509 adapter->rx_buffer_len +
3510 NET_IP_ALIGN,
3511 PCI_DMA_FROMDEVICE);
3512 skb_put(skb, length);
3513 goto send_up;
3514 }
3515 j = 0;
3516 }
3517
3518 while (length) {
3519 pci_unmap_page(pdev, buffer_info->page_dma,
3520 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3521 buffer_info->page_dma = 0;
3522 skb_fill_page_desc(skb, j, buffer_info->page,
3523 0, length);
3524 buffer_info->page = NULL;
3525
3526 skb->len += length;
3527 skb->data_len += length;
3528 skb->truesize += length;
3529 rx_desc->wb.upper.status_error = 0;
3530 if (staterr & E1000_RXD_STAT_EOP)
3531 break;
3532
3533 j++;
3534 cleaned_count++;
3535 i++;
3536 if (i == rx_ring->count)
3537 i = 0;
3538
3539 buffer_info = &rx_ring->buffer_info[i];
3540 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3541 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3542 length = le16_to_cpu(rx_desc->wb.upper.length);
3543 if (!(staterr & E1000_RXD_STAT_DD)) {
3544 rx_ring->pending_skb = skb;
3545 rx_ring->pending_skb_page = j;
3546 goto out;
3547 }
3548 }
3549send_up:
3550 pskb_trim(skb, skb->len - 4);
3551 i++;
3552 if (i == rx_ring->count)
3553 i = 0;
3554 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3555 prefetch(next_rxd);
3556 next_buffer = &rx_ring->buffer_info[i];
3557
3558 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3559 dev_kfree_skb_irq(skb);
3560 goto next_desc;
3561 }
3562 rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT);
3563
3564 total_bytes += skb->len;
3565 total_packets++;
3566
3567 igb_rx_checksum_adv(adapter, staterr, skb);
3568
3569 skb->protocol = eth_type_trans(skb, netdev);
3570
3571 igb_receive_skb(adapter, staterr, rx_desc->wb.upper.vlan, skb);
3572
3573 netdev->last_rx = jiffies;
3574
3575next_desc:
3576 rx_desc->wb.upper.status_error = 0;
3577
3578 /* return some buffers to hardware, one at a time is too slow */
3579 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
Mitch Williams3b644cf2008-06-27 10:59:48 -07003580 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08003581 cleaned_count = 0;
3582 }
3583
3584 /* use prefetched values */
3585 rx_desc = next_rxd;
3586 buffer_info = next_buffer;
3587
3588 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3589 }
3590out:
3591 rx_ring->next_to_clean = i;
3592 cleaned_count = IGB_DESC_UNUSED(rx_ring);
3593
3594 if (cleaned_count)
Mitch Williams3b644cf2008-06-27 10:59:48 -07003595 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08003596
3597 rx_ring->total_packets += total_packets;
3598 rx_ring->total_bytes += total_bytes;
3599 rx_ring->rx_stats.packets += total_packets;
3600 rx_ring->rx_stats.bytes += total_bytes;
3601 adapter->net_stats.rx_bytes += total_bytes;
3602 adapter->net_stats.rx_packets += total_packets;
3603 return cleaned;
3604}
3605
3606
3607/**
3608 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3609 * @adapter: address of board private structure
3610 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07003611static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
Auke Kok9d5c8242008-01-24 02:22:38 -08003612 int cleaned_count)
3613{
Mitch Williams3b644cf2008-06-27 10:59:48 -07003614 struct igb_adapter *adapter = rx_ring->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08003615 struct net_device *netdev = adapter->netdev;
3616 struct pci_dev *pdev = adapter->pdev;
3617 union e1000_adv_rx_desc *rx_desc;
3618 struct igb_buffer *buffer_info;
3619 struct sk_buff *skb;
3620 unsigned int i;
3621
3622 i = rx_ring->next_to_use;
3623 buffer_info = &rx_ring->buffer_info[i];
3624
3625 while (cleaned_count--) {
3626 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3627
3628 if (adapter->rx_ps_hdr_size && !buffer_info->page) {
3629 buffer_info->page = alloc_page(GFP_ATOMIC);
3630 if (!buffer_info->page) {
3631 adapter->alloc_rx_buff_failed++;
3632 goto no_buffers;
3633 }
3634 buffer_info->page_dma =
3635 pci_map_page(pdev,
3636 buffer_info->page,
3637 0, PAGE_SIZE,
3638 PCI_DMA_FROMDEVICE);
3639 }
3640
3641 if (!buffer_info->skb) {
3642 int bufsz;
3643
3644 if (adapter->rx_ps_hdr_size)
3645 bufsz = adapter->rx_ps_hdr_size;
3646 else
3647 bufsz = adapter->rx_buffer_len;
3648 bufsz += NET_IP_ALIGN;
3649 skb = netdev_alloc_skb(netdev, bufsz);
3650
3651 if (!skb) {
3652 adapter->alloc_rx_buff_failed++;
3653 goto no_buffers;
3654 }
3655
3656 /* Make buffer alignment 2 beyond a 16 byte boundary
3657 * this will result in a 16 byte aligned IP header after
3658 * the 14 byte MAC header is removed
3659 */
3660 skb_reserve(skb, NET_IP_ALIGN);
3661
3662 buffer_info->skb = skb;
3663 buffer_info->dma = pci_map_single(pdev, skb->data,
3664 bufsz,
3665 PCI_DMA_FROMDEVICE);
3666
3667 }
3668 /* Refresh the desc even if buffer_addrs didn't change because
3669 * each write-back erases this info. */
3670 if (adapter->rx_ps_hdr_size) {
3671 rx_desc->read.pkt_addr =
3672 cpu_to_le64(buffer_info->page_dma);
3673 rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
3674 } else {
3675 rx_desc->read.pkt_addr =
3676 cpu_to_le64(buffer_info->dma);
3677 rx_desc->read.hdr_addr = 0;
3678 }
3679
3680 i++;
3681 if (i == rx_ring->count)
3682 i = 0;
3683 buffer_info = &rx_ring->buffer_info[i];
3684 }
3685
3686no_buffers:
3687 if (rx_ring->next_to_use != i) {
3688 rx_ring->next_to_use = i;
3689 if (i == 0)
3690 i = (rx_ring->count - 1);
3691 else
3692 i--;
3693
3694 /* Force memory writes to complete before letting h/w
3695 * know there are new descriptors to fetch. (Only
3696 * applicable for weak-ordered memory model archs,
3697 * such as IA-64). */
3698 wmb();
3699 writel(i, adapter->hw.hw_addr + rx_ring->tail);
3700 }
3701}
3702
3703/**
3704 * igb_mii_ioctl -
3705 * @netdev:
3706 * @ifreq:
3707 * @cmd:
3708 **/
3709static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3710{
3711 struct igb_adapter *adapter = netdev_priv(netdev);
3712 struct mii_ioctl_data *data = if_mii(ifr);
3713
3714 if (adapter->hw.phy.media_type != e1000_media_type_copper)
3715 return -EOPNOTSUPP;
3716
3717 switch (cmd) {
3718 case SIOCGMIIPHY:
3719 data->phy_id = adapter->hw.phy.addr;
3720 break;
3721 case SIOCGMIIREG:
3722 if (!capable(CAP_NET_ADMIN))
3723 return -EPERM;
3724 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
3725 data->reg_num
3726 & 0x1F, &data->val_out))
3727 return -EIO;
3728 break;
3729 case SIOCSMIIREG:
3730 default:
3731 return -EOPNOTSUPP;
3732 }
3733 return 0;
3734}
3735
3736/**
3737 * igb_ioctl -
3738 * @netdev:
3739 * @ifreq:
3740 * @cmd:
3741 **/
3742static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3743{
3744 switch (cmd) {
3745 case SIOCGMIIPHY:
3746 case SIOCGMIIREG:
3747 case SIOCSMIIREG:
3748 return igb_mii_ioctl(netdev, ifr, cmd);
3749 default:
3750 return -EOPNOTSUPP;
3751 }
3752}
3753
3754static void igb_vlan_rx_register(struct net_device *netdev,
3755 struct vlan_group *grp)
3756{
3757 struct igb_adapter *adapter = netdev_priv(netdev);
3758 struct e1000_hw *hw = &adapter->hw;
3759 u32 ctrl, rctl;
3760
3761 igb_irq_disable(adapter);
3762 adapter->vlgrp = grp;
3763
3764 if (grp) {
3765 /* enable VLAN tag insert/strip */
3766 ctrl = rd32(E1000_CTRL);
3767 ctrl |= E1000_CTRL_VME;
3768 wr32(E1000_CTRL, ctrl);
3769
3770 /* enable VLAN receive filtering */
3771 rctl = rd32(E1000_RCTL);
3772 rctl |= E1000_RCTL_VFE;
3773 rctl &= ~E1000_RCTL_CFIEN;
3774 wr32(E1000_RCTL, rctl);
3775 igb_update_mng_vlan(adapter);
3776 wr32(E1000_RLPML,
3777 adapter->max_frame_size + VLAN_TAG_SIZE);
3778 } else {
3779 /* disable VLAN tag insert/strip */
3780 ctrl = rd32(E1000_CTRL);
3781 ctrl &= ~E1000_CTRL_VME;
3782 wr32(E1000_CTRL, ctrl);
3783
3784 /* disable VLAN filtering */
3785 rctl = rd32(E1000_RCTL);
3786 rctl &= ~E1000_RCTL_VFE;
3787 wr32(E1000_RCTL, rctl);
3788 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
3789 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3790 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
3791 }
3792 wr32(E1000_RLPML,
3793 adapter->max_frame_size);
3794 }
3795
3796 if (!test_bit(__IGB_DOWN, &adapter->state))
3797 igb_irq_enable(adapter);
3798}
3799
3800static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3801{
3802 struct igb_adapter *adapter = netdev_priv(netdev);
3803 struct e1000_hw *hw = &adapter->hw;
3804 u32 vfta, index;
3805
3806 if ((adapter->hw.mng_cookie.status &
3807 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3808 (vid == adapter->mng_vlan_id))
3809 return;
3810 /* add VID to filter table */
3811 index = (vid >> 5) & 0x7F;
3812 vfta = array_rd32(E1000_VFTA, index);
3813 vfta |= (1 << (vid & 0x1F));
3814 igb_write_vfta(&adapter->hw, index, vfta);
3815}
3816
3817static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3818{
3819 struct igb_adapter *adapter = netdev_priv(netdev);
3820 struct e1000_hw *hw = &adapter->hw;
3821 u32 vfta, index;
3822
3823 igb_irq_disable(adapter);
3824 vlan_group_set_device(adapter->vlgrp, vid, NULL);
3825
3826 if (!test_bit(__IGB_DOWN, &adapter->state))
3827 igb_irq_enable(adapter);
3828
3829 if ((adapter->hw.mng_cookie.status &
3830 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3831 (vid == adapter->mng_vlan_id)) {
3832 /* release control to f/w */
3833 igb_release_hw_control(adapter);
3834 return;
3835 }
3836
3837 /* remove VID from filter table */
3838 index = (vid >> 5) & 0x7F;
3839 vfta = array_rd32(E1000_VFTA, index);
3840 vfta &= ~(1 << (vid & 0x1F));
3841 igb_write_vfta(&adapter->hw, index, vfta);
3842}
3843
3844static void igb_restore_vlan(struct igb_adapter *adapter)
3845{
3846 igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
3847
3848 if (adapter->vlgrp) {
3849 u16 vid;
3850 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
3851 if (!vlan_group_get_device(adapter->vlgrp, vid))
3852 continue;
3853 igb_vlan_rx_add_vid(adapter->netdev, vid);
3854 }
3855 }
3856}
3857
3858int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
3859{
3860 struct e1000_mac_info *mac = &adapter->hw.mac;
3861
3862 mac->autoneg = 0;
3863
3864 /* Fiber NICs only allow 1000 gbps Full duplex */
3865 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
3866 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
3867 dev_err(&adapter->pdev->dev,
3868 "Unsupported Speed/Duplex configuration\n");
3869 return -EINVAL;
3870 }
3871
3872 switch (spddplx) {
3873 case SPEED_10 + DUPLEX_HALF:
3874 mac->forced_speed_duplex = ADVERTISE_10_HALF;
3875 break;
3876 case SPEED_10 + DUPLEX_FULL:
3877 mac->forced_speed_duplex = ADVERTISE_10_FULL;
3878 break;
3879 case SPEED_100 + DUPLEX_HALF:
3880 mac->forced_speed_duplex = ADVERTISE_100_HALF;
3881 break;
3882 case SPEED_100 + DUPLEX_FULL:
3883 mac->forced_speed_duplex = ADVERTISE_100_FULL;
3884 break;
3885 case SPEED_1000 + DUPLEX_FULL:
3886 mac->autoneg = 1;
3887 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
3888 break;
3889 case SPEED_1000 + DUPLEX_HALF: /* not supported */
3890 default:
3891 dev_err(&adapter->pdev->dev,
3892 "Unsupported Speed/Duplex configuration\n");
3893 return -EINVAL;
3894 }
3895 return 0;
3896}
3897
3898
3899static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
3900{
3901 struct net_device *netdev = pci_get_drvdata(pdev);
3902 struct igb_adapter *adapter = netdev_priv(netdev);
3903 struct e1000_hw *hw = &adapter->hw;
3904 u32 ctrl, ctrl_ext, rctl, status;
3905 u32 wufc = adapter->wol;
3906#ifdef CONFIG_PM
3907 int retval = 0;
3908#endif
3909
3910 netif_device_detach(netdev);
3911
3912 if (netif_running(netdev)) {
3913 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3914 igb_down(adapter);
3915 igb_free_irq(adapter);
3916 }
3917
3918#ifdef CONFIG_PM
3919 retval = pci_save_state(pdev);
3920 if (retval)
3921 return retval;
3922#endif
3923
3924 status = rd32(E1000_STATUS);
3925 if (status & E1000_STATUS_LU)
3926 wufc &= ~E1000_WUFC_LNKC;
3927
3928 if (wufc) {
3929 igb_setup_rctl(adapter);
3930 igb_set_multi(netdev);
3931
3932 /* turn on all-multi mode if wake on multicast is enabled */
3933 if (wufc & E1000_WUFC_MC) {
3934 rctl = rd32(E1000_RCTL);
3935 rctl |= E1000_RCTL_MPE;
3936 wr32(E1000_RCTL, rctl);
3937 }
3938
3939 ctrl = rd32(E1000_CTRL);
3940 /* advertise wake from D3Cold */
3941 #define E1000_CTRL_ADVD3WUC 0x00100000
3942 /* phy power management enable */
3943 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
3944 ctrl |= E1000_CTRL_ADVD3WUC;
3945 wr32(E1000_CTRL, ctrl);
3946
3947 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
3948 adapter->hw.phy.media_type ==
3949 e1000_media_type_internal_serdes) {
3950 /* keep the laser running in D3 */
3951 ctrl_ext = rd32(E1000_CTRL_EXT);
3952 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
3953 wr32(E1000_CTRL_EXT, ctrl_ext);
3954 }
3955
3956 /* Allow time for pending master requests to run */
3957 igb_disable_pcie_master(&adapter->hw);
3958
3959 wr32(E1000_WUC, E1000_WUC_PME_EN);
3960 wr32(E1000_WUFC, wufc);
3961 pci_enable_wake(pdev, PCI_D3hot, 1);
3962 pci_enable_wake(pdev, PCI_D3cold, 1);
3963 } else {
3964 wr32(E1000_WUC, 0);
3965 wr32(E1000_WUFC, 0);
3966 pci_enable_wake(pdev, PCI_D3hot, 0);
3967 pci_enable_wake(pdev, PCI_D3cold, 0);
3968 }
3969
Auke Kok9d5c8242008-01-24 02:22:38 -08003970 /* make sure adapter isn't asleep if manageability is enabled */
3971 if (adapter->en_mng_pt) {
3972 pci_enable_wake(pdev, PCI_D3hot, 1);
3973 pci_enable_wake(pdev, PCI_D3cold, 1);
3974 }
3975
3976 /* Release control of h/w to f/w. If f/w is AMT enabled, this
3977 * would have already happened in close and is redundant. */
3978 igb_release_hw_control(adapter);
3979
3980 pci_disable_device(pdev);
3981
3982 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3983
3984 return 0;
3985}
3986
3987#ifdef CONFIG_PM
3988static int igb_resume(struct pci_dev *pdev)
3989{
3990 struct net_device *netdev = pci_get_drvdata(pdev);
3991 struct igb_adapter *adapter = netdev_priv(netdev);
3992 struct e1000_hw *hw = &adapter->hw;
3993 u32 err;
3994
3995 pci_set_power_state(pdev, PCI_D0);
3996 pci_restore_state(pdev);
Taku Izumi42bfd33a2008-06-20 12:10:30 +09003997
3998 if (adapter->need_ioport)
3999 err = pci_enable_device(pdev);
4000 else
4001 err = pci_enable_device_mem(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08004002 if (err) {
4003 dev_err(&pdev->dev,
4004 "igb: Cannot enable PCI device from suspend\n");
4005 return err;
4006 }
4007 pci_set_master(pdev);
4008
4009 pci_enable_wake(pdev, PCI_D3hot, 0);
4010 pci_enable_wake(pdev, PCI_D3cold, 0);
4011
4012 if (netif_running(netdev)) {
4013 err = igb_request_irq(adapter);
4014 if (err)
4015 return err;
4016 }
4017
4018 /* e1000_power_up_phy(adapter); */
4019
4020 igb_reset(adapter);
4021 wr32(E1000_WUS, ~0);
4022
4023 igb_init_manageability(adapter);
4024
4025 if (netif_running(netdev))
4026 igb_up(adapter);
4027
4028 netif_device_attach(netdev);
4029
4030 /* let the f/w know that the h/w is now under the control of the
4031 * driver. */
4032 igb_get_hw_control(adapter);
4033
4034 return 0;
4035}
4036#endif
4037
4038static void igb_shutdown(struct pci_dev *pdev)
4039{
4040 igb_suspend(pdev, PMSG_SUSPEND);
4041}
4042
4043#ifdef CONFIG_NET_POLL_CONTROLLER
4044/*
4045 * Polling 'interrupt' - used by things like netconsole to send skbs
4046 * without having to re-enable interrupts. It's not called while
4047 * the interrupt routine is executing.
4048 */
4049static void igb_netpoll(struct net_device *netdev)
4050{
4051 struct igb_adapter *adapter = netdev_priv(netdev);
4052 int i;
4053 int work_done = 0;
4054
4055 igb_irq_disable(adapter);
4056 for (i = 0; i < adapter->num_tx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07004057 igb_clean_tx_irq(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08004058
4059 for (i = 0; i < adapter->num_rx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07004060 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
Auke Kok9d5c8242008-01-24 02:22:38 -08004061 &work_done,
4062 adapter->rx_ring[i].napi.weight);
4063
4064 igb_irq_enable(adapter);
4065}
4066#endif /* CONFIG_NET_POLL_CONTROLLER */
4067
4068/**
4069 * igb_io_error_detected - called when PCI error is detected
4070 * @pdev: Pointer to PCI device
4071 * @state: The current pci connection state
4072 *
4073 * This function is called after a PCI bus error affecting
4074 * this device has been detected.
4075 */
4076static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4077 pci_channel_state_t state)
4078{
4079 struct net_device *netdev = pci_get_drvdata(pdev);
4080 struct igb_adapter *adapter = netdev_priv(netdev);
4081
4082 netif_device_detach(netdev);
4083
4084 if (netif_running(netdev))
4085 igb_down(adapter);
4086 pci_disable_device(pdev);
4087
4088 /* Request a slot slot reset. */
4089 return PCI_ERS_RESULT_NEED_RESET;
4090}
4091
4092/**
4093 * igb_io_slot_reset - called after the pci bus has been reset.
4094 * @pdev: Pointer to PCI device
4095 *
4096 * Restart the card from scratch, as if from a cold-boot. Implementation
4097 * resembles the first-half of the igb_resume routine.
4098 */
4099static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4100{
4101 struct net_device *netdev = pci_get_drvdata(pdev);
4102 struct igb_adapter *adapter = netdev_priv(netdev);
4103 struct e1000_hw *hw = &adapter->hw;
Taku Izumi42bfd33a2008-06-20 12:10:30 +09004104 int err;
Auke Kok9d5c8242008-01-24 02:22:38 -08004105
Taku Izumi42bfd33a2008-06-20 12:10:30 +09004106 if (adapter->need_ioport)
4107 err = pci_enable_device(pdev);
4108 else
4109 err = pci_enable_device_mem(pdev);
4110 if (err) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004111 dev_err(&pdev->dev,
4112 "Cannot re-enable PCI device after reset.\n");
4113 return PCI_ERS_RESULT_DISCONNECT;
4114 }
4115 pci_set_master(pdev);
Auke Kokc682fc22008-04-23 11:09:34 -07004116 pci_restore_state(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08004117
4118 pci_enable_wake(pdev, PCI_D3hot, 0);
4119 pci_enable_wake(pdev, PCI_D3cold, 0);
4120
4121 igb_reset(adapter);
4122 wr32(E1000_WUS, ~0);
4123
4124 return PCI_ERS_RESULT_RECOVERED;
4125}
4126
4127/**
4128 * igb_io_resume - called when traffic can start flowing again.
4129 * @pdev: Pointer to PCI device
4130 *
4131 * This callback is called when the error recovery driver tells us that
4132 * its OK to resume normal operation. Implementation resembles the
4133 * second-half of the igb_resume routine.
4134 */
4135static void igb_io_resume(struct pci_dev *pdev)
4136{
4137 struct net_device *netdev = pci_get_drvdata(pdev);
4138 struct igb_adapter *adapter = netdev_priv(netdev);
4139
4140 igb_init_manageability(adapter);
4141
4142 if (netif_running(netdev)) {
4143 if (igb_up(adapter)) {
4144 dev_err(&pdev->dev, "igb_up failed after reset\n");
4145 return;
4146 }
4147 }
4148
4149 netif_device_attach(netdev);
4150
4151 /* let the f/w know that the h/w is now under the control of the
4152 * driver. */
4153 igb_get_hw_control(adapter);
4154
4155}
4156
4157/* igb_main.c */