blob: cee18c89d7f23ef77ad7a8a2265ca8efa887f9dd [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
20
21#include "core.h"
22#include "mac.h"
23#include "htc.h"
24#include "hif.h"
25#include "wmi.h"
26#include "bmi.h"
27#include "debug.h"
28#include "htt.h"
Kalle Valo43d2a302014-09-10 18:23:30 +030029#include "testmode.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030030
31unsigned int ath10k_debug_mask;
32static bool uart_print;
33static unsigned int ath10k_p2p;
34module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
35module_param(uart_print, bool, 0644);
36module_param_named(p2p, ath10k_p2p, uint, 0644);
37MODULE_PARM_DESC(debug_mask, "Debugging mask");
38MODULE_PARM_DESC(uart_print, "Uart target debugging");
39MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
40
41static const struct ath10k_hw_params ath10k_hw_params_list[] = {
42 {
Kalle Valo5e3dd152013-06-12 20:52:10 +030043 .id = QCA988X_HW_2_0_VERSION,
44 .name = "qca988x hw2.0",
45 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
46 .fw = {
47 .dir = QCA988X_HW_2_0_FW_DIR,
48 .fw = QCA988X_HW_2_0_FW_FILE,
49 .otp = QCA988X_HW_2_0_OTP_FILE,
50 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
51 },
52 },
53};
54
55static void ath10k_send_suspend_complete(struct ath10k *ar)
56{
Michal Kazior7aa7a722014-08-25 12:09:38 +020057 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030058
Marek Puzyniak9042e172014-02-10 17:14:23 +010059 complete(&ar->target_suspend);
Kalle Valo5e3dd152013-06-12 20:52:10 +030060}
61
Kalle Valo5e3dd152013-06-12 20:52:10 +030062static int ath10k_init_configure_target(struct ath10k *ar)
63{
64 u32 param_host;
65 int ret;
66
67 /* tell target which HTC version it is used*/
68 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
69 HTC_PROTOCOL_VERSION);
70 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020071 ath10k_err(ar, "settings HTC version failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030072 return ret;
73 }
74
75 /* set the firmware mode to STA/IBSS/AP */
76 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
77 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020078 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030079 return ret;
80 }
81
82 /* TODO following parameters need to be re-visited. */
83 /* num_device */
84 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
85 /* Firmware mode */
86 /* FIXME: Why FW_MODE_AP ??.*/
87 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
88 /* mac_addr_method */
89 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
90 /* firmware_bridge */
91 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
92 /* fwsubmode */
93 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
94
95 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
96 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020097 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030098 return ret;
99 }
100
101 /* We do all byte-swapping on the host */
102 ret = ath10k_bmi_write32(ar, hi_be, 0);
103 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200104 ath10k_err(ar, "setting host CPU BE mode failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300105 return ret;
106 }
107
108 /* FW descriptor/Data swap flags */
109 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
110
111 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200112 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300113 return ret;
114 }
115
116 return 0;
117}
118
119static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
120 const char *dir,
121 const char *file)
122{
123 char filename[100];
124 const struct firmware *fw;
125 int ret;
126
127 if (file == NULL)
128 return ERR_PTR(-ENOENT);
129
130 if (dir == NULL)
131 dir = ".";
132
133 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
134 ret = request_firmware(&fw, filename, ar->dev);
135 if (ret)
136 return ERR_PTR(ret);
137
138 return fw;
139}
140
Kalle Valo958df3a2013-09-27 19:55:01 +0300141static int ath10k_push_board_ext_data(struct ath10k *ar)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300142{
143 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
144 u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
145 u32 board_ext_data_addr;
146 int ret;
147
148 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
149 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200150 ath10k_err(ar, "could not read board ext data addr (%d)\n",
151 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300152 return ret;
153 }
154
Michal Kazior7aa7a722014-08-25 12:09:38 +0200155 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valoeffea962013-09-08 17:55:44 +0300156 "boot push board extended data addr 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300157 board_ext_data_addr);
158
159 if (board_ext_data_addr == 0)
160 return 0;
161
Kalle Valo958df3a2013-09-27 19:55:01 +0300162 if (ar->board_len != (board_data_size + board_ext_data_size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200163 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
Kalle Valo958df3a2013-09-27 19:55:01 +0300164 ar->board_len, board_data_size, board_ext_data_size);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300165 return -EINVAL;
166 }
167
168 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
Kalle Valo958df3a2013-09-27 19:55:01 +0300169 ar->board_data + board_data_size,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300170 board_ext_data_size);
171 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200172 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300173 return ret;
174 }
175
176 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
177 (board_ext_data_size << 16) | 1);
178 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200179 ath10k_err(ar, "could not write board ext data bit (%d)\n",
180 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300181 return ret;
182 }
183
184 return 0;
185}
186
187static int ath10k_download_board_data(struct ath10k *ar)
188{
189 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
190 u32 address;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300191 int ret;
192
Kalle Valo958df3a2013-09-27 19:55:01 +0300193 ret = ath10k_push_board_ext_data(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300194 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200195 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300196 goto exit;
197 }
198
199 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
200 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200201 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300202 goto exit;
203 }
204
Kalle Valo958df3a2013-09-27 19:55:01 +0300205 ret = ath10k_bmi_write_memory(ar, address, ar->board_data,
206 min_t(u32, board_data_size,
207 ar->board_len));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300208 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200209 ath10k_err(ar, "could not write board data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300210 goto exit;
211 }
212
213 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
214 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200215 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300216 goto exit;
217 }
218
219exit:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300220 return ret;
221}
222
223static int ath10k_download_and_run_otp(struct ath10k *ar)
224{
Kalle Valod6d4a582014-03-11 17:33:19 +0200225 u32 result, address = ar->hw_params.patch_load_addr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300226 int ret;
227
228 /* OTP is optional */
229
Kalle Valo7f06ea12014-03-11 17:33:28 +0200230 if (!ar->otp_data || !ar->otp_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200231 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
Ben Greear36a8f412014-03-24 12:20:42 -0700232 ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300233 return 0;
Kalle Valo7f06ea12014-03-11 17:33:28 +0200234 }
235
Michal Kazior7aa7a722014-08-25 12:09:38 +0200236 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
Kalle Valo7f06ea12014-03-11 17:33:28 +0200237 address, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300238
Kalle Valo958df3a2013-09-27 19:55:01 +0300239 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300240 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200241 ath10k_err(ar, "could not write otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200242 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300243 }
244
Kalle Valod6d4a582014-03-11 17:33:19 +0200245 ret = ath10k_bmi_execute(ar, address, 0, &result);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300246 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200247 ath10k_err(ar, "could not execute otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200248 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300249 }
250
Michal Kazior7aa7a722014-08-25 12:09:38 +0200251 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200252
253 if (result != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200254 ath10k_err(ar, "otp calibration failed: %d", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200255 return -EINVAL;
256 }
257
258 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300259}
260
Kalle Valo43d2a302014-09-10 18:23:30 +0300261static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300262{
Kalle Valo43d2a302014-09-10 18:23:30 +0300263 u32 address, data_len;
264 const char *mode_name;
265 const void *data;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300266 int ret;
267
Kalle Valo5e3dd152013-06-12 20:52:10 +0300268 address = ar->hw_params.patch_load_addr;
269
Kalle Valo43d2a302014-09-10 18:23:30 +0300270 switch (mode) {
271 case ATH10K_FIRMWARE_MODE_NORMAL:
272 data = ar->firmware_data;
273 data_len = ar->firmware_len;
274 mode_name = "normal";
275 break;
276 case ATH10K_FIRMWARE_MODE_UTF:
277 data = ar->testmode.utf->data;
278 data_len = ar->testmode.utf->size;
279 mode_name = "utf";
280 break;
281 default:
282 ath10k_err(ar, "unknown firmware mode: %d\n", mode);
283 return -EINVAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300284 }
285
Kalle Valo43d2a302014-09-10 18:23:30 +0300286 ath10k_dbg(ar, ATH10K_DBG_BOOT,
287 "boot uploading firmware image %p len %d mode %s\n",
288 data, data_len, mode_name);
289
290 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
291 if (ret) {
292 ath10k_err(ar, "failed to download %s firmware: %d\n",
293 mode_name, ret);
294 return ret;
295 }
296
Michal Kazior29385052013-07-16 09:38:58 +0200297 return ret;
298}
299
300static void ath10k_core_free_firmware_files(struct ath10k *ar)
301{
Kalle Valo36527912013-09-27 19:54:55 +0300302 if (ar->board && !IS_ERR(ar->board))
303 release_firmware(ar->board);
Michal Kazior29385052013-07-16 09:38:58 +0200304
305 if (ar->otp && !IS_ERR(ar->otp))
306 release_firmware(ar->otp);
307
308 if (ar->firmware && !IS_ERR(ar->firmware))
309 release_firmware(ar->firmware);
310
Kalle Valo36527912013-09-27 19:54:55 +0300311 ar->board = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300312 ar->board_data = NULL;
313 ar->board_len = 0;
314
Michal Kazior29385052013-07-16 09:38:58 +0200315 ar->otp = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300316 ar->otp_data = NULL;
317 ar->otp_len = 0;
318
Michal Kazior29385052013-07-16 09:38:58 +0200319 ar->firmware = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300320 ar->firmware_data = NULL;
321 ar->firmware_len = 0;
Michal Kazior29385052013-07-16 09:38:58 +0200322}
323
Kalle Valo1a222432013-09-27 19:55:07 +0300324static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
Michal Kazior29385052013-07-16 09:38:58 +0200325{
326 int ret = 0;
327
328 if (ar->hw_params.fw.fw == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200329 ath10k_err(ar, "firmware file not defined\n");
Michal Kazior29385052013-07-16 09:38:58 +0200330 return -EINVAL;
331 }
332
333 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200334 ath10k_err(ar, "board data file not defined");
Michal Kazior29385052013-07-16 09:38:58 +0200335 return -EINVAL;
336 }
337
Kalle Valo36527912013-09-27 19:54:55 +0300338 ar->board = ath10k_fetch_fw_file(ar,
339 ar->hw_params.fw.dir,
340 ar->hw_params.fw.board);
341 if (IS_ERR(ar->board)) {
342 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200343 ath10k_err(ar, "could not fetch board data (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200344 goto err;
345 }
346
Kalle Valo958df3a2013-09-27 19:55:01 +0300347 ar->board_data = ar->board->data;
348 ar->board_len = ar->board->size;
349
Michal Kazior29385052013-07-16 09:38:58 +0200350 ar->firmware = ath10k_fetch_fw_file(ar,
351 ar->hw_params.fw.dir,
352 ar->hw_params.fw.fw);
353 if (IS_ERR(ar->firmware)) {
354 ret = PTR_ERR(ar->firmware);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200355 ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200356 goto err;
357 }
358
Kalle Valo958df3a2013-09-27 19:55:01 +0300359 ar->firmware_data = ar->firmware->data;
360 ar->firmware_len = ar->firmware->size;
361
Michal Kazior29385052013-07-16 09:38:58 +0200362 /* OTP may be undefined. If so, don't fetch it at all */
363 if (ar->hw_params.fw.otp == NULL)
364 return 0;
365
366 ar->otp = ath10k_fetch_fw_file(ar,
367 ar->hw_params.fw.dir,
368 ar->hw_params.fw.otp);
369 if (IS_ERR(ar->otp)) {
370 ret = PTR_ERR(ar->otp);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200371 ath10k_err(ar, "could not fetch otp (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200372 goto err;
373 }
374
Kalle Valo958df3a2013-09-27 19:55:01 +0300375 ar->otp_data = ar->otp->data;
376 ar->otp_len = ar->otp->size;
377
Michal Kazior29385052013-07-16 09:38:58 +0200378 return 0;
379
380err:
381 ath10k_core_free_firmware_files(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300382 return ret;
383}
384
Kalle Valo1a222432013-09-27 19:55:07 +0300385static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
386{
387 size_t magic_len, len, ie_len;
388 int ie_id, i, index, bit, ret;
389 struct ath10k_fw_ie *hdr;
390 const u8 *data;
391 __le32 *timestamp;
392
393 /* first fetch the firmware file (firmware-*.bin) */
394 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
395 if (IS_ERR(ar->firmware)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200396 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
Ben Greear53c02282014-03-24 12:20:41 -0700397 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
Kalle Valo1a222432013-09-27 19:55:07 +0300398 return PTR_ERR(ar->firmware);
399 }
400
401 data = ar->firmware->data;
402 len = ar->firmware->size;
403
404 /* magic also includes the null byte, check that as well */
405 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
406
407 if (len < magic_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200408 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
Ben Greear53c02282014-03-24 12:20:41 -0700409 ar->hw_params.fw.dir, name, len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200410 ret = -EINVAL;
411 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300412 }
413
414 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200415 ath10k_err(ar, "invalid firmware magic\n");
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200416 ret = -EINVAL;
417 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300418 }
419
420 /* jump over the padding */
421 magic_len = ALIGN(magic_len, 4);
422
423 len -= magic_len;
424 data += magic_len;
425
426 /* loop elements */
427 while (len > sizeof(struct ath10k_fw_ie)) {
428 hdr = (struct ath10k_fw_ie *)data;
429
430 ie_id = le32_to_cpu(hdr->id);
431 ie_len = le32_to_cpu(hdr->len);
432
433 len -= sizeof(*hdr);
434 data += sizeof(*hdr);
435
436 if (len < ie_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200437 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300438 ie_id, len, ie_len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200439 ret = -EINVAL;
440 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300441 }
442
443 switch (ie_id) {
444 case ATH10K_FW_IE_FW_VERSION:
445 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
446 break;
447
448 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
449 ar->hw->wiphy->fw_version[ie_len] = '\0';
450
Michal Kazior7aa7a722014-08-25 12:09:38 +0200451 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300452 "found fw version %s\n",
453 ar->hw->wiphy->fw_version);
454 break;
455 case ATH10K_FW_IE_TIMESTAMP:
456 if (ie_len != sizeof(u32))
457 break;
458
459 timestamp = (__le32 *)data;
460
Michal Kazior7aa7a722014-08-25 12:09:38 +0200461 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300462 le32_to_cpup(timestamp));
463 break;
464 case ATH10K_FW_IE_FEATURES:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200465 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300466 "found firmware features ie (%zd B)\n",
467 ie_len);
468
469 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
470 index = i / 8;
471 bit = i % 8;
472
473 if (index == ie_len)
474 break;
475
Ben Greearf591a1a2014-02-04 19:51:38 +0200476 if (data[index] & (1 << bit)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200477 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Ben Greearf591a1a2014-02-04 19:51:38 +0200478 "Enabling feature bit: %i\n",
479 i);
Kalle Valo1a222432013-09-27 19:55:07 +0300480 __set_bit(i, ar->fw_features);
Ben Greearf591a1a2014-02-04 19:51:38 +0200481 }
Kalle Valo1a222432013-09-27 19:55:07 +0300482 }
483
Michal Kazior7aa7a722014-08-25 12:09:38 +0200484 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
Kalle Valo1a222432013-09-27 19:55:07 +0300485 ar->fw_features,
486 sizeof(ar->fw_features));
487 break;
488 case ATH10K_FW_IE_FW_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200489 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300490 "found fw image ie (%zd B)\n",
491 ie_len);
492
493 ar->firmware_data = data;
494 ar->firmware_len = ie_len;
495
496 break;
497 case ATH10K_FW_IE_OTP_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200498 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300499 "found otp image ie (%zd B)\n",
500 ie_len);
501
502 ar->otp_data = data;
503 ar->otp_len = ie_len;
504
505 break;
506 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200507 ath10k_warn(ar, "Unknown FW IE: %u\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300508 le32_to_cpu(hdr->id));
509 break;
510 }
511
512 /* jump over the padding */
513 ie_len = ALIGN(ie_len, 4);
514
515 len -= ie_len;
516 data += ie_len;
Fengguang Wue05634e2013-10-08 21:48:15 +0300517 }
Kalle Valo1a222432013-09-27 19:55:07 +0300518
519 if (!ar->firmware_data || !ar->firmware_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200520 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
Ben Greear53c02282014-03-24 12:20:41 -0700521 ar->hw_params.fw.dir, name);
Kalle Valo1a222432013-09-27 19:55:07 +0300522 ret = -ENOMEDIUM;
523 goto err;
524 }
525
Michal Kazior24c88f72014-07-25 13:32:17 +0200526 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
527 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200528 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
Michal Kazior24c88f72014-07-25 13:32:17 +0200529 ret = -EINVAL;
530 goto err;
531 }
532
Kalle Valo1a222432013-09-27 19:55:07 +0300533 /* now fetch the board file */
534 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200535 ath10k_err(ar, "board data file not defined");
Kalle Valo1a222432013-09-27 19:55:07 +0300536 ret = -EINVAL;
537 goto err;
538 }
539
540 ar->board = ath10k_fetch_fw_file(ar,
541 ar->hw_params.fw.dir,
542 ar->hw_params.fw.board);
543 if (IS_ERR(ar->board)) {
544 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200545 ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
Ben Greear53c02282014-03-24 12:20:41 -0700546 ar->hw_params.fw.dir, ar->hw_params.fw.board,
547 ret);
Kalle Valo1a222432013-09-27 19:55:07 +0300548 goto err;
549 }
550
551 ar->board_data = ar->board->data;
552 ar->board_len = ar->board->size;
553
554 return 0;
555
556err:
557 ath10k_core_free_firmware_files(ar);
558 return ret;
559}
560
561static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
562{
563 int ret;
564
Michal Kazior24c88f72014-07-25 13:32:17 +0200565 ar->fw_api = 3;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200566 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Michal Kazior24c88f72014-07-25 13:32:17 +0200567
568 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
569 if (ret == 0)
570 goto success;
571
Ben Greear53c02282014-03-24 12:20:41 -0700572 ar->fw_api = 2;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200573 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Ben Greear53c02282014-03-24 12:20:41 -0700574
Kalle Valo1a222432013-09-27 19:55:07 +0300575 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
Ben Greear53c02282014-03-24 12:20:41 -0700576 if (ret == 0)
577 goto success;
578
579 ar->fw_api = 1;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200580 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300581
582 ret = ath10k_core_fetch_firmware_api_1(ar);
583 if (ret)
584 return ret;
585
Ben Greear53c02282014-03-24 12:20:41 -0700586success:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200587 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300588
589 return 0;
590}
591
Kalle Valo43d2a302014-09-10 18:23:30 +0300592static int ath10k_init_download_firmware(struct ath10k *ar,
593 enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300594{
595 int ret;
596
597 ret = ath10k_download_board_data(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700598 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200599 ath10k_err(ar, "failed to download board data: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300600 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700601 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300602
603 ret = ath10k_download_and_run_otp(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700604 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200605 ath10k_err(ar, "failed to run otp: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300606 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700607 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300608
Kalle Valo43d2a302014-09-10 18:23:30 +0300609 ret = ath10k_download_fw(ar, mode);
Ben Greear36a8f412014-03-24 12:20:42 -0700610 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200611 ath10k_err(ar, "failed to download firmware: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300612 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700613 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300614
615 return ret;
616}
617
618static int ath10k_init_uart(struct ath10k *ar)
619{
620 int ret;
621
622 /*
623 * Explicitly setting UART prints to zero as target turns it on
624 * based on scratch registers.
625 */
626 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
627 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200628 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300629 return ret;
630 }
631
Kalle Valoc8c39af2013-11-20 10:00:41 +0200632 if (!uart_print)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300633 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300634
635 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
636 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200637 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300638 return ret;
639 }
640
641 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
642 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200643 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300644 return ret;
645 }
646
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200647 /* Set the UART baud rate to 19200. */
648 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
649 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200650 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200651 return ret;
652 }
653
Michal Kazior7aa7a722014-08-25 12:09:38 +0200654 ath10k_info(ar, "UART prints enabled\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300655 return 0;
656}
657
658static int ath10k_init_hw_params(struct ath10k *ar)
659{
660 const struct ath10k_hw_params *uninitialized_var(hw_params);
661 int i;
662
663 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
664 hw_params = &ath10k_hw_params_list[i];
665
666 if (hw_params->id == ar->target_version)
667 break;
668 }
669
670 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200671 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300672 ar->target_version);
673 return -EINVAL;
674 }
675
676 ar->hw_params = *hw_params;
677
Michal Kazior7aa7a722014-08-25 12:09:38 +0200678 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200679 ar->hw_params.name, ar->target_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300680
681 return 0;
682}
683
Michal Kazioraffd3212013-07-16 09:54:35 +0200684static void ath10k_core_restart(struct work_struct *work)
685{
686 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
687
688 mutex_lock(&ar->conf_mutex);
689
690 switch (ar->state) {
691 case ATH10K_STATE_ON:
Michal Kazioraffd3212013-07-16 09:54:35 +0200692 ar->state = ATH10K_STATE_RESTARTING;
Michal Kazior61e9aab2014-08-22 14:33:18 +0200693 ath10k_hif_stop(ar);
Michal Kazior5c81c7f2014-08-05 14:54:44 +0200694 ath10k_scan_finish(ar);
Michal Kazioraffd3212013-07-16 09:54:35 +0200695 ieee80211_restart_hw(ar->hw);
696 break;
697 case ATH10K_STATE_OFF:
Michal Kazior5e90de82013-10-16 16:46:05 +0300698 /* this can happen if driver is being unloaded
699 * or if the crash happens during FW probing */
Michal Kazior7aa7a722014-08-25 12:09:38 +0200700 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200701 break;
702 case ATH10K_STATE_RESTARTING:
Michal Kaziorc5058f52014-05-26 12:46:03 +0300703 /* hw restart might be requested from multiple places */
704 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200705 case ATH10K_STATE_RESTARTED:
706 ar->state = ATH10K_STATE_WEDGED;
707 /* fall through */
708 case ATH10K_STATE_WEDGED:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200709 ath10k_warn(ar, "device is wedged, will not restart\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200710 break;
Kalle Valo43d2a302014-09-10 18:23:30 +0300711 case ATH10K_STATE_UTF:
712 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
713 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200714 }
715
716 mutex_unlock(&ar->conf_mutex);
717}
718
Kalle Valo43d2a302014-09-10 18:23:30 +0300719int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300720{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300721 int status;
722
Kalle Valo60631c52013-10-08 21:45:25 +0300723 lockdep_assert_held(&ar->conf_mutex);
724
Michal Kazior64d151d2013-07-16 09:38:53 +0200725 ath10k_bmi_start(ar);
726
Kalle Valo5e3dd152013-06-12 20:52:10 +0300727 if (ath10k_init_configure_target(ar)) {
728 status = -EINVAL;
729 goto err;
730 }
731
Kalle Valo43d2a302014-09-10 18:23:30 +0300732 status = ath10k_init_download_firmware(ar, mode);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300733 if (status)
734 goto err;
735
736 status = ath10k_init_uart(ar);
737 if (status)
738 goto err;
739
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300740 ar->htc.htc_ops.target_send_suspend_complete =
741 ath10k_send_suspend_complete;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300742
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300743 status = ath10k_htc_init(ar);
744 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200745 ath10k_err(ar, "could not init HTC (%d)\n", status);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300746 goto err;
747 }
748
749 status = ath10k_bmi_done(ar);
750 if (status)
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300751 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300752
753 status = ath10k_wmi_attach(ar);
754 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200755 ath10k_err(ar, "WMI attach failed: %d\n", status);
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300756 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300757 }
758
Michal Kazior95bf21f2014-05-16 17:15:39 +0300759 status = ath10k_htt_init(ar);
760 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200761 ath10k_err(ar, "failed to init htt: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300762 goto err_wmi_detach;
763 }
764
765 status = ath10k_htt_tx_alloc(&ar->htt);
766 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200767 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300768 goto err_wmi_detach;
769 }
770
771 status = ath10k_htt_rx_alloc(&ar->htt);
772 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200773 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300774 goto err_htt_tx_detach;
775 }
776
Michal Kazior67e3c632013-11-08 08:05:18 +0100777 status = ath10k_hif_start(ar);
778 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200779 ath10k_err(ar, "could not start HIF: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300780 goto err_htt_rx_detach;
Michal Kazior67e3c632013-11-08 08:05:18 +0100781 }
782
783 status = ath10k_htc_wait_target(&ar->htc);
784 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200785 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
Michal Kazior67e3c632013-11-08 08:05:18 +0100786 goto err_hif_stop;
787 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300788
Kalle Valo43d2a302014-09-10 18:23:30 +0300789 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
790 status = ath10k_htt_connect(&ar->htt);
791 if (status) {
792 ath10k_err(ar, "failed to connect htt (%d)\n", status);
793 goto err_hif_stop;
794 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300795 }
796
Michal Kazior95bf21f2014-05-16 17:15:39 +0300797 status = ath10k_wmi_connect(ar);
798 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200799 ath10k_err(ar, "could not connect wmi: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300800 goto err_hif_stop;
801 }
802
803 status = ath10k_htc_start(&ar->htc);
804 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200805 ath10k_err(ar, "failed to start htc: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300806 goto err_hif_stop;
807 }
808
Kalle Valo43d2a302014-09-10 18:23:30 +0300809 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
810 status = ath10k_wmi_wait_for_service_ready(ar);
811 if (status <= 0) {
812 ath10k_warn(ar, "wmi service ready event not received");
813 status = -ETIMEDOUT;
814 goto err_hif_stop;
815 }
Michal Kazior95bf21f2014-05-16 17:15:39 +0300816 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300817
Michal Kazior7aa7a722014-08-25 12:09:38 +0200818 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200819 ar->hw->wiphy->fw_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300820
Kalle Valo5e3dd152013-06-12 20:52:10 +0300821 status = ath10k_wmi_cmd_init(ar);
822 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200823 ath10k_err(ar, "could not send WMI init command (%d)\n",
824 status);
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200825 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300826 }
827
828 status = ath10k_wmi_wait_for_unified_ready(ar);
829 if (status <= 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200830 ath10k_err(ar, "wmi unified ready event not received\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300831 status = -ETIMEDOUT;
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200832 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300833 }
834
Kalle Valo43d2a302014-09-10 18:23:30 +0300835 /* we don't care about HTT in UTF mode */
836 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
837 status = ath10k_htt_setup(&ar->htt);
838 if (status) {
839 ath10k_err(ar, "failed to setup htt: %d\n", status);
840 goto err_hif_stop;
841 }
Michal Kazior95bf21f2014-05-16 17:15:39 +0300842 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300843
Kalle Valodb66ea02013-09-03 11:44:03 +0300844 status = ath10k_debug_start(ar);
845 if (status)
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200846 goto err_hif_stop;
Kalle Valodb66ea02013-09-03 11:44:03 +0300847
Bartosz Markowskidfa413d2014-06-02 21:19:45 +0300848 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
849 ar->free_vdev_map = (1 << TARGET_10X_NUM_VDEVS) - 1;
850 else
851 ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
852
Michal Kazior05791192013-10-16 15:44:45 +0300853 INIT_LIST_HEAD(&ar->arvifs);
Michal Kazior1a1b8a82013-07-16 09:38:55 +0200854
Michal Kaziordd30a362013-07-16 09:38:51 +0200855 return 0;
856
Michal Kazior67e3c632013-11-08 08:05:18 +0100857err_hif_stop:
858 ath10k_hif_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300859err_htt_rx_detach:
860 ath10k_htt_rx_free(&ar->htt);
861err_htt_tx_detach:
862 ath10k_htt_tx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200863err_wmi_detach:
864 ath10k_wmi_detach(ar);
865err:
866 return status;
867}
Michal Kazior818bdd12013-07-16 09:38:57 +0200868EXPORT_SYMBOL(ath10k_core_start);
Michal Kaziordd30a362013-07-16 09:38:51 +0200869
Marek Puzyniak00f54822014-02-10 17:14:24 +0100870int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
871{
872 int ret;
873
874 reinit_completion(&ar->target_suspend);
875
876 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
877 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200878 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
Marek Puzyniak00f54822014-02-10 17:14:24 +0100879 return ret;
880 }
881
882 ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
883
884 if (ret == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200885 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
Marek Puzyniak00f54822014-02-10 17:14:24 +0100886 return -ETIMEDOUT;
887 }
888
889 return 0;
890}
891
Michal Kaziordd30a362013-07-16 09:38:51 +0200892void ath10k_core_stop(struct ath10k *ar)
893{
Kalle Valo60631c52013-10-08 21:45:25 +0300894 lockdep_assert_held(&ar->conf_mutex);
895
Marek Puzyniak00f54822014-02-10 17:14:24 +0100896 /* try to suspend target */
Kalle Valo43d2a302014-09-10 18:23:30 +0300897 if (ar->state != ATH10K_STATE_RESTARTING &&
898 ar->state != ATH10K_STATE_UTF)
Michal Kazior216a1832014-04-23 19:30:04 +0300899 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
900
Kalle Valodb66ea02013-09-03 11:44:03 +0300901 ath10k_debug_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300902 ath10k_hif_stop(ar);
903 ath10k_htt_tx_free(&ar->htt);
904 ath10k_htt_rx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200905 ath10k_wmi_detach(ar);
906}
Michal Kazior818bdd12013-07-16 09:38:57 +0200907EXPORT_SYMBOL(ath10k_core_stop);
908
909/* mac80211 manages fw/hw initialization through start/stop hooks. However in
910 * order to know what hw capabilities should be advertised to mac80211 it is
911 * necessary to load the firmware (and tear it down immediately since start
912 * hook will try to init it again) before registering */
913static int ath10k_core_probe_fw(struct ath10k *ar)
914{
Michal Kazior29385052013-07-16 09:38:58 +0200915 struct bmi_target_info target_info;
916 int ret = 0;
Michal Kazior818bdd12013-07-16 09:38:57 +0200917
918 ret = ath10k_hif_power_up(ar);
919 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200920 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
Michal Kazior818bdd12013-07-16 09:38:57 +0200921 return ret;
922 }
923
Michal Kazior29385052013-07-16 09:38:58 +0200924 memset(&target_info, 0, sizeof(target_info));
925 ret = ath10k_bmi_get_target_info(ar, &target_info);
926 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200927 ath10k_err(ar, "could not get target info (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200928 ath10k_hif_power_down(ar);
929 return ret;
930 }
931
932 ar->target_version = target_info.version;
933 ar->hw->wiphy->hw_version = target_info.version;
934
935 ret = ath10k_init_hw_params(ar);
936 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200937 ath10k_err(ar, "could not get hw params (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200938 ath10k_hif_power_down(ar);
939 return ret;
940 }
941
942 ret = ath10k_core_fetch_firmware_files(ar);
943 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200944 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200945 ath10k_hif_power_down(ar);
946 return ret;
947 }
948
Kalle Valo60631c52013-10-08 21:45:25 +0300949 mutex_lock(&ar->conf_mutex);
950
Kalle Valo43d2a302014-09-10 18:23:30 +0300951 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
Michal Kazior818bdd12013-07-16 09:38:57 +0200952 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200953 ath10k_err(ar, "could not init core (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200954 ath10k_core_free_firmware_files(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +0200955 ath10k_hif_power_down(ar);
Kalle Valo60631c52013-10-08 21:45:25 +0300956 mutex_unlock(&ar->conf_mutex);
Michal Kazior818bdd12013-07-16 09:38:57 +0200957 return ret;
958 }
959
Michal Kazior8079de02014-08-22 14:23:29 +0200960 ath10k_print_driver_info(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +0200961 ath10k_core_stop(ar);
Kalle Valo60631c52013-10-08 21:45:25 +0300962
963 mutex_unlock(&ar->conf_mutex);
964
Michal Kazior818bdd12013-07-16 09:38:57 +0200965 ath10k_hif_power_down(ar);
966 return 0;
967}
Michal Kaziordd30a362013-07-16 09:38:51 +0200968
Kalle Valoe01ae682013-09-01 11:22:14 +0300969static int ath10k_core_check_chip_id(struct ath10k *ar)
970{
971 u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
972
Michal Kazior7aa7a722014-08-25 12:09:38 +0200973 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
Kalle Valoeffea962013-09-08 17:55:44 +0300974 ar->chip_id, hw_revision);
975
Kalle Valoe01ae682013-09-01 11:22:14 +0300976 /* Check that we are not using hw1.0 (some of them have same pci id
977 * as hw2.0) before doing anything else as ath10k crashes horribly
978 * due to missing hw1.0 workarounds. */
979 switch (hw_revision) {
980 case QCA988X_HW_1_0_CHIP_ID_REV:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200981 ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n");
Kalle Valoe01ae682013-09-01 11:22:14 +0300982 return -EOPNOTSUPP;
983
984 case QCA988X_HW_2_0_CHIP_ID_REV:
985 /* known hardware revision, continue normally */
986 return 0;
987
988 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200989 ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n",
Kalle Valoe01ae682013-09-01 11:22:14 +0300990 ar->chip_id);
991 return 0;
992 }
993
994 return 0;
995}
996
Michal Kazior6782cb62014-05-23 12:28:47 +0200997static void ath10k_core_register_work(struct work_struct *work)
Michal Kaziordd30a362013-07-16 09:38:51 +0200998{
Michal Kazior6782cb62014-05-23 12:28:47 +0200999 struct ath10k *ar = container_of(work, struct ath10k, register_work);
Michal Kaziordd30a362013-07-16 09:38:51 +02001000 int status;
1001
Michal Kazior818bdd12013-07-16 09:38:57 +02001002 status = ath10k_core_probe_fw(ar);
1003 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001004 ath10k_err(ar, "could not probe fw (%d)\n", status);
Michal Kazior6782cb62014-05-23 12:28:47 +02001005 goto err;
Michal Kazior818bdd12013-07-16 09:38:57 +02001006 }
Michal Kaziordd30a362013-07-16 09:38:51 +02001007
Kalle Valo5e3dd152013-06-12 20:52:10 +03001008 status = ath10k_mac_register(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001009 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001010 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
Michal Kazior29385052013-07-16 09:38:58 +02001011 goto err_release_fw;
Michal Kazior818bdd12013-07-16 09:38:57 +02001012 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001013
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001014 status = ath10k_debug_register(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001015 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001016 ath10k_err(ar, "unable to initialize debugfs\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001017 goto err_unregister_mac;
1018 }
1019
Simon Wunderlich855aed12014-08-02 09:12:54 +03001020 status = ath10k_spectral_create(ar);
1021 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001022 ath10k_err(ar, "failed to initialize spectral\n");
Simon Wunderlich855aed12014-08-02 09:12:54 +03001023 goto err_debug_destroy;
1024 }
1025
Michal Kazior6782cb62014-05-23 12:28:47 +02001026 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1027 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001028
Simon Wunderlich855aed12014-08-02 09:12:54 +03001029err_debug_destroy:
1030 ath10k_debug_destroy(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001031err_unregister_mac:
1032 ath10k_mac_unregister(ar);
Michal Kazior29385052013-07-16 09:38:58 +02001033err_release_fw:
1034 ath10k_core_free_firmware_files(ar);
Michal Kazior6782cb62014-05-23 12:28:47 +02001035err:
Michal Kaziora491a922014-07-14 16:07:29 +03001036 /* TODO: It's probably a good idea to release device from the driver
1037 * but calling device_release_driver() here will cause a deadlock.
1038 */
Michal Kazior6782cb62014-05-23 12:28:47 +02001039 return;
1040}
1041
1042int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1043{
1044 int status;
1045
1046 ar->chip_id = chip_id;
1047
1048 status = ath10k_core_check_chip_id(ar);
1049 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001050 ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id);
Michal Kazior6782cb62014-05-23 12:28:47 +02001051 return status;
1052 }
1053
1054 queue_work(ar->workqueue, &ar->register_work);
1055
1056 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001057}
1058EXPORT_SYMBOL(ath10k_core_register);
1059
1060void ath10k_core_unregister(struct ath10k *ar)
1061{
Michal Kazior6782cb62014-05-23 12:28:47 +02001062 cancel_work_sync(&ar->register_work);
1063
1064 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1065 return;
1066
Simon Wunderlich804eef1472014-08-12 17:12:17 +02001067 /* Stop spectral before unregistering from mac80211 to remove the
1068 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1069 * would be already be free'd recursively, leading to a double free.
1070 */
1071 ath10k_spectral_destroy(ar);
1072
Kalle Valo5e3dd152013-06-12 20:52:10 +03001073 /* We must unregister from mac80211 before we stop HTC and HIF.
1074 * Otherwise we will fail to submit commands to FW and mac80211 will be
1075 * unhappy about callback failures. */
1076 ath10k_mac_unregister(ar);
Kalle Valodb66ea02013-09-03 11:44:03 +03001077
Kalle Valo43d2a302014-09-10 18:23:30 +03001078 ath10k_testmode_destroy(ar);
1079
Michal Kazior29385052013-07-16 09:38:58 +02001080 ath10k_core_free_firmware_files(ar);
Ben Greear6f1f56e2013-11-04 09:18:16 -08001081
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001082 ath10k_debug_unregister(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001083}
1084EXPORT_SYMBOL(ath10k_core_unregister);
1085
Michal Kaziore7b54192014-08-07 11:03:27 +02001086struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
Michal Kazior0d0a6932014-05-23 12:28:45 +02001087 const struct ath10k_hif_ops *hif_ops)
1088{
1089 struct ath10k *ar;
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001090 int ret;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001091
Michal Kaziore7b54192014-08-07 11:03:27 +02001092 ar = ath10k_mac_create(priv_size);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001093 if (!ar)
1094 return NULL;
1095
1096 ar->ath_common.priv = ar;
1097 ar->ath_common.hw = ar->hw;
1098
1099 ar->p2p = !!ath10k_p2p;
1100 ar->dev = dev;
1101
Michal Kazior0d0a6932014-05-23 12:28:45 +02001102 ar->hif.ops = hif_ops;
1103
1104 init_completion(&ar->scan.started);
1105 init_completion(&ar->scan.completed);
1106 init_completion(&ar->scan.on_channel);
1107 init_completion(&ar->target_suspend);
1108
1109 init_completion(&ar->install_key_done);
1110 init_completion(&ar->vdev_setup_done);
1111
Michal Kazior5c81c7f2014-08-05 14:54:44 +02001112 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001113
1114 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1115 if (!ar->workqueue)
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001116 goto err_free_mac;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001117
1118 mutex_init(&ar->conf_mutex);
1119 spin_lock_init(&ar->data_lock);
1120
1121 INIT_LIST_HEAD(&ar->peers);
1122 init_waitqueue_head(&ar->peer_mapping_wq);
1123
1124 init_completion(&ar->offchan_tx_completed);
1125 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1126 skb_queue_head_init(&ar->offchan_tx_queue);
1127
1128 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1129 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1130
Michal Kazior6782cb62014-05-23 12:28:47 +02001131 INIT_WORK(&ar->register_work, ath10k_core_register_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001132 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1133
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001134 ret = ath10k_debug_create(ar);
1135 if (ret)
1136 goto err_free_wq;
1137
Michal Kazior0d0a6932014-05-23 12:28:45 +02001138 return ar;
1139
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001140err_free_wq:
1141 destroy_workqueue(ar->workqueue);
1142
1143err_free_mac:
Michal Kazior0d0a6932014-05-23 12:28:45 +02001144 ath10k_mac_destroy(ar);
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001145
Michal Kazior0d0a6932014-05-23 12:28:45 +02001146 return NULL;
1147}
1148EXPORT_SYMBOL(ath10k_core_create);
1149
1150void ath10k_core_destroy(struct ath10k *ar)
1151{
1152 flush_workqueue(ar->workqueue);
1153 destroy_workqueue(ar->workqueue);
1154
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001155 ath10k_debug_destroy(ar);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001156 ath10k_mac_destroy(ar);
1157}
1158EXPORT_SYMBOL(ath10k_core_destroy);
1159
Kalle Valo5e3dd152013-06-12 20:52:10 +03001160MODULE_AUTHOR("Qualcomm Atheros");
1161MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1162MODULE_LICENSE("Dual BSD/GPL");