blob: e3e17f3c0f0f2929da94d7411c0740a391dc56c6 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/pci/setup-bus.c
3 *
4 * Extruded from code written by
5 * Dave Rusling (david.rusling@reo.mts.dec.com)
6 * David Mosberger (davidm@cs.arizona.edu)
7 * David Miller (davem@redhat.com)
8 *
9 * Support routines for initializing a PCI subsystem.
10 */
11
12/*
13 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
14 * PCI-PCI bridges cleanup, sorted resource allocation.
15 * Feb 2002, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
16 * Converted to allocation in 3 passes, which gives
17 * tighter packing. Prefetchable range support.
18 */
19
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/pci.h>
24#include <linux/errno.h>
25#include <linux/ioport.h>
26#include <linux/cache.h>
27#include <linux/slab.h>
Bjorn Helgaas47087702012-02-23 14:29:23 -070028#include <asm-generic/pci-bridge.h>
Chris Wright6faf17f2009-08-28 13:00:06 -070029#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
Bjorn Helgaas844393f2012-02-23 20:18:59 -070031unsigned int pci_flags;
Bjorn Helgaas47087702012-02-23 14:29:23 -070032
Yinghai Lubdc4abe2012-01-21 02:08:27 -080033struct pci_dev_resource {
34 struct list_head list;
Yinghai Lu2934a0d2012-01-21 02:08:26 -080035 struct resource *res;
36 struct pci_dev *dev;
Yinghai Lu568ddef2010-01-22 01:02:21 -080037 resource_size_t start;
38 resource_size_t end;
Ram Paic8adf9a2011-02-14 17:43:20 -080039 resource_size_t add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070040 resource_size_t min_align;
Yinghai Lu568ddef2010-01-22 01:02:21 -080041 unsigned long flags;
42};
43
Yinghai Lubffc56d2012-01-21 02:08:30 -080044static void free_list(struct list_head *head)
45{
46 struct pci_dev_resource *dev_res, *tmp;
47
48 list_for_each_entry_safe(dev_res, tmp, head, list) {
49 list_del(&dev_res->list);
50 kfree(dev_res);
51 }
52}
Ram Pai094732a2011-02-14 17:43:18 -080053
Ram Paic8adf9a2011-02-14 17:43:20 -080054/**
55 * add_to_list() - add a new resource tracker to the list
56 * @head: Head of the list
57 * @dev: device corresponding to which the resource
58 * belongs
59 * @res: The resource to be tracked
60 * @add_size: additional size to be optionally added
61 * to the resource
62 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -080063static int add_to_list(struct list_head *head,
Ram Paic8adf9a2011-02-14 17:43:20 -080064 struct pci_dev *dev, struct resource *res,
Ram Pai2bbc6942011-07-25 13:08:39 -070065 resource_size_t add_size, resource_size_t min_align)
Yinghai Lu568ddef2010-01-22 01:02:21 -080066{
Yinghai Lu764242a2012-01-21 02:08:28 -080067 struct pci_dev_resource *tmp;
Yinghai Lu568ddef2010-01-22 01:02:21 -080068
Yinghai Lubdc4abe2012-01-21 02:08:27 -080069 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
Yinghai Lu568ddef2010-01-22 01:02:21 -080070 if (!tmp) {
Ryan Desfosses3c78bc62014-04-18 20:13:49 -040071 pr_warn("add_to_list: kmalloc() failed!\n");
Yinghai Luef62dfe2012-01-21 02:08:18 -080072 return -ENOMEM;
Yinghai Lu568ddef2010-01-22 01:02:21 -080073 }
74
Yinghai Lu568ddef2010-01-22 01:02:21 -080075 tmp->res = res;
76 tmp->dev = dev;
77 tmp->start = res->start;
78 tmp->end = res->end;
79 tmp->flags = res->flags;
Ram Paic8adf9a2011-02-14 17:43:20 -080080 tmp->add_size = add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070081 tmp->min_align = min_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -080082
83 list_add(&tmp->list, head);
Yinghai Luef62dfe2012-01-21 02:08:18 -080084
85 return 0;
Yinghai Lu568ddef2010-01-22 01:02:21 -080086}
87
Yinghai Lub9b0bba2012-01-21 02:08:29 -080088static void remove_from_list(struct list_head *head,
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080089 struct resource *res)
90{
Yinghai Lub9b0bba2012-01-21 02:08:29 -080091 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080092
Yinghai Lub9b0bba2012-01-21 02:08:29 -080093 list_for_each_entry_safe(dev_res, tmp, head, list) {
94 if (dev_res->res == res) {
95 list_del(&dev_res->list);
96 kfree(dev_res);
Yinghai Lubdc4abe2012-01-21 02:08:27 -080097 break;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080098 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080099 }
100}
101
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800102static resource_size_t get_res_add_size(struct list_head *head,
Yinghai Lu1c372352012-01-21 02:08:19 -0800103 struct resource *res)
104{
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800105 struct pci_dev_resource *dev_res;
Yinghai Lu1c372352012-01-21 02:08:19 -0800106
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800107 list_for_each_entry(dev_res, head, list) {
108 if (dev_res->res == res) {
Yinghai Lub5924432012-01-21 02:08:31 -0800109 int idx = res - &dev_res->dev->resource[0];
110
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800111 dev_printk(KERN_DEBUG, &dev_res->dev->dev,
Yinghai Lub5924432012-01-21 02:08:31 -0800112 "res[%d]=%pR get_res_add_size add_size %llx\n",
113 idx, dev_res->res,
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800114 (unsigned long long)dev_res->add_size);
Yinghai Lub5924432012-01-21 02:08:31 -0800115
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800116 return dev_res->add_size;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800117 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800118 }
Yinghai Lu1c372352012-01-21 02:08:19 -0800119
120 return 0;
121}
122
Yinghai Lu78c3b322012-01-21 02:08:25 -0800123/* Sort resources by alignment */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800124static void pdev_sort_resources(struct pci_dev *dev, struct list_head *head)
Yinghai Lu78c3b322012-01-21 02:08:25 -0800125{
126 int i;
127
128 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
129 struct resource *r;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800130 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800131 resource_size_t r_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800132 struct list_head *n;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800133
134 r = &dev->resource[i];
135
136 if (r->flags & IORESOURCE_PCI_FIXED)
137 continue;
138
139 if (!(r->flags) || r->parent)
140 continue;
141
142 r_align = pci_resource_alignment(dev, r);
143 if (!r_align) {
144 dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
145 i, r);
146 continue;
147 }
Yinghai Lu78c3b322012-01-21 02:08:25 -0800148
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800149 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
150 if (!tmp)
Ryan Desfosses227f0642014-04-18 20:13:50 -0400151 panic("pdev_sort_resources(): kmalloc() failed!\n");
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800152 tmp->res = r;
153 tmp->dev = dev;
154
155 /* fallback is smallest one or list is empty*/
156 n = head;
157 list_for_each_entry(dev_res, head, list) {
158 resource_size_t align;
159
160 align = pci_resource_alignment(dev_res->dev,
161 dev_res->res);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800162
163 if (r_align > align) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800164 n = &dev_res->list;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800165 break;
166 }
167 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800168 /* Insert it just before n*/
169 list_add_tail(&tmp->list, n);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800170 }
171}
172
Yinghai Lu6841ec62010-01-22 01:02:25 -0800173static void __dev_sort_resources(struct pci_dev *dev,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800174 struct list_head *head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175{
Yinghai Lu6841ec62010-01-22 01:02:25 -0800176 u16 class = dev->class >> 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177
Yinghai Lu6841ec62010-01-22 01:02:25 -0800178 /* Don't touch classless devices or host bridges or ioapics. */
179 if (class == PCI_CLASS_NOT_DEFINED || class == PCI_CLASS_BRIDGE_HOST)
180 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181
Yinghai Lu6841ec62010-01-22 01:02:25 -0800182 /* Don't touch ioapic devices already enabled by firmware */
183 if (class == PCI_CLASS_SYSTEM_PIC) {
184 u16 command;
185 pci_read_config_word(dev, PCI_COMMAND, &command);
186 if (command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
187 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188 }
189
Yinghai Lu6841ec62010-01-22 01:02:25 -0800190 pdev_sort_resources(dev, head);
191}
192
Ram Paifc075e12011-02-14 17:43:19 -0800193static inline void reset_resource(struct resource *res)
194{
195 res->start = 0;
196 res->end = 0;
197 res->flags = 0;
198}
199
Ram Paic8adf9a2011-02-14 17:43:20 -0800200/**
Ram Pai9e8bf932011-07-25 13:08:42 -0700201 * reassign_resources_sorted() - satisfy any additional resource requests
Ram Paic8adf9a2011-02-14 17:43:20 -0800202 *
Ram Pai9e8bf932011-07-25 13:08:42 -0700203 * @realloc_head : head of the list tracking requests requiring additional
Ram Paic8adf9a2011-02-14 17:43:20 -0800204 * resources
205 * @head : head of the list tracking requests with allocated
206 * resources
207 *
Ram Pai9e8bf932011-07-25 13:08:42 -0700208 * Walk through each element of the realloc_head and try to procure
Ram Paic8adf9a2011-02-14 17:43:20 -0800209 * additional resources for the element, provided the element
210 * is in the head list.
211 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800212static void reassign_resources_sorted(struct list_head *realloc_head,
213 struct list_head *head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800214{
215 struct resource *res;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800216 struct pci_dev_resource *add_res, *tmp;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800217 struct pci_dev_resource *dev_res;
Ram Paic8adf9a2011-02-14 17:43:20 -0800218 resource_size_t add_size;
219 int idx;
220
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800221 list_for_each_entry_safe(add_res, tmp, realloc_head, list) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800222 bool found_match = false;
223
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800224 res = add_res->res;
Ram Paic8adf9a2011-02-14 17:43:20 -0800225 /* skip resource that has been reset */
226 if (!res->flags)
227 goto out;
228
229 /* skip this resource if not found in head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800230 list_for_each_entry(dev_res, head, list) {
231 if (dev_res->res == res) {
232 found_match = true;
233 break;
234 }
Ram Paic8adf9a2011-02-14 17:43:20 -0800235 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800236 if (!found_match)/* just skip */
237 continue;
Ram Paic8adf9a2011-02-14 17:43:20 -0800238
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800239 idx = res - &add_res->dev->resource[0];
240 add_size = add_res->add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -0700241 if (!resource_size(res)) {
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800242 res->start = add_res->start;
Ram Pai2bbc6942011-07-25 13:08:39 -0700243 res->end = res->start + add_size - 1;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800244 if (pci_assign_resource(add_res->dev, idx))
Ram Paic8adf9a2011-02-14 17:43:20 -0800245 reset_resource(res);
Ram Pai2bbc6942011-07-25 13:08:39 -0700246 } else {
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800247 resource_size_t align = add_res->min_align;
248 res->flags |= add_res->flags &
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800249 (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800250 if (pci_reassign_resource(add_res->dev, idx,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800251 add_size, align))
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800252 dev_printk(KERN_DEBUG, &add_res->dev->dev,
Yinghai Lub5924432012-01-21 02:08:31 -0800253 "failed to add %llx res[%d]=%pR\n",
254 (unsigned long long)add_size,
255 idx, res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800256 }
257out:
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800258 list_del(&add_res->list);
259 kfree(add_res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800260 }
261}
262
263/**
264 * assign_requested_resources_sorted() - satisfy resource requests
265 *
266 * @head : head of the list tracking requests for resources
Wanpeng Li8356aad2012-06-15 21:15:49 +0800267 * @fail_head : head of the list tracking requests that could
Ram Paic8adf9a2011-02-14 17:43:20 -0800268 * not be allocated
269 *
270 * Satisfy resource requests of each element in the list. Add
271 * requests that could not satisfied to the failed_list.
272 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800273static void assign_requested_resources_sorted(struct list_head *head,
274 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800275{
276 struct resource *res;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800277 struct pci_dev_resource *dev_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -0800278 int idx;
279
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800280 list_for_each_entry(dev_res, head, list) {
281 res = dev_res->res;
282 idx = res - &dev_res->dev->resource[0];
283 if (resource_size(res) &&
284 pci_assign_resource(dev_res->dev, idx)) {
Yinghai Lua3cb9992013-01-21 13:20:43 -0800285 if (fail_head) {
Yinghai Lu9a928662010-02-28 15:49:39 -0800286 /*
287 * if the failed res is for ROM BAR, and it will
288 * be enabled later, don't add it to the list
289 */
290 if (!((idx == PCI_ROM_RESOURCE) &&
291 (!(res->flags & IORESOURCE_ROM_ENABLE))))
Yinghai Lu67cc7e22012-01-21 02:08:32 -0800292 add_to_list(fail_head,
293 dev_res->dev, res,
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700294 0 /* don't care */,
295 0 /* don't care */);
Yinghai Lu9a928662010-02-28 15:49:39 -0800296 }
Ram Paifc075e12011-02-14 17:43:19 -0800297 reset_resource(res);
Rajesh Shah542df5d2005-04-28 00:25:50 -0700298 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299 }
300}
301
Yinghai Luaa914f52013-07-25 06:31:38 -0700302static unsigned long pci_fail_res_type_mask(struct list_head *fail_head)
303{
304 struct pci_dev_resource *fail_res;
305 unsigned long mask = 0;
306
307 /* check failed type */
308 list_for_each_entry(fail_res, fail_head, list)
309 mask |= fail_res->flags;
310
311 /*
312 * one pref failed resource will set IORESOURCE_MEM,
313 * as we can allocate pref in non-pref range.
314 * Will release all assigned non-pref sibling resources
315 * according to that bit.
316 */
317 return mask & (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH);
318}
319
320static bool pci_need_to_release(unsigned long mask, struct resource *res)
321{
322 if (res->flags & IORESOURCE_IO)
323 return !!(mask & IORESOURCE_IO);
324
325 /* check pref at first */
326 if (res->flags & IORESOURCE_PREFETCH) {
327 if (mask & IORESOURCE_PREFETCH)
328 return true;
329 /* count pref if its parent is non-pref */
330 else if ((mask & IORESOURCE_MEM) &&
331 !(res->parent->flags & IORESOURCE_PREFETCH))
332 return true;
333 else
334 return false;
335 }
336
337 if (res->flags & IORESOURCE_MEM)
338 return !!(mask & IORESOURCE_MEM);
339
340 return false; /* should not get here */
341}
342
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800343static void __assign_resources_sorted(struct list_head *head,
344 struct list_head *realloc_head,
345 struct list_head *fail_head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800346{
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800347 /*
348 * Should not assign requested resources at first.
349 * they could be adjacent, so later reassign can not reallocate
350 * them one by one in parent resource window.
Masanari Iida367fa982012-07-23 22:39:51 +0900351 * Try to assign requested + add_size at beginning
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800352 * if could do that, could get out early.
353 * if could not do that, we still try to assign requested at first,
354 * then try to reassign add_size for some resources.
Yinghai Luaa914f52013-07-25 06:31:38 -0700355 *
356 * Separate three resource type checking if we need to release
357 * assigned resource after requested + add_size try.
358 * 1. if there is io port assign fail, will release assigned
359 * io port.
360 * 2. if there is pref mmio assign fail, release assigned
361 * pref mmio.
362 * if assigned pref mmio's parent is non-pref mmio and there
363 * is non-pref mmio assign fail, will release that assigned
364 * pref mmio.
365 * 3. if there is non-pref mmio assign fail or pref mmio
366 * assigned fail, will release assigned non-pref mmio.
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800367 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800368 LIST_HEAD(save_head);
369 LIST_HEAD(local_fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800370 struct pci_dev_resource *save_res;
Yinghai Luaa914f52013-07-25 06:31:38 -0700371 struct pci_dev_resource *dev_res, *tmp_res;
372 unsigned long fail_type;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800373
374 /* Check if optional add_size is there */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800375 if (!realloc_head || list_empty(realloc_head))
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800376 goto requested_and_reassign;
377
378 /* Save original start, end, flags etc at first */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800379 list_for_each_entry(dev_res, head, list) {
380 if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) {
Yinghai Lubffc56d2012-01-21 02:08:30 -0800381 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800382 goto requested_and_reassign;
383 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800384 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800385
386 /* Update res in head list with add_size in realloc_head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800387 list_for_each_entry(dev_res, head, list)
388 dev_res->res->end += get_res_add_size(realloc_head,
389 dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800390
391 /* Try updated head list with add_size added */
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800392 assign_requested_resources_sorted(head, &local_fail_head);
393
394 /* all assigned with add_size ? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800395 if (list_empty(&local_fail_head)) {
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800396 /* Remove head list from realloc_head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800397 list_for_each_entry(dev_res, head, list)
398 remove_from_list(realloc_head, dev_res->res);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800399 free_list(&save_head);
400 free_list(head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800401 return;
402 }
403
Yinghai Luaa914f52013-07-25 06:31:38 -0700404 /* check failed type */
405 fail_type = pci_fail_res_type_mask(&local_fail_head);
406 /* remove not need to be released assigned res from head list etc */
407 list_for_each_entry_safe(dev_res, tmp_res, head, list)
408 if (dev_res->res->parent &&
409 !pci_need_to_release(fail_type, dev_res->res)) {
410 /* remove it from realloc_head list */
411 remove_from_list(realloc_head, dev_res->res);
412 remove_from_list(&save_head, dev_res->res);
413 list_del(&dev_res->list);
414 kfree(dev_res);
415 }
416
Yinghai Lubffc56d2012-01-21 02:08:30 -0800417 free_list(&local_fail_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800418 /* Release assigned resource */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800419 list_for_each_entry(dev_res, head, list)
420 if (dev_res->res->parent)
421 release_resource(dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800422 /* Restore start/end/flags from saved list */
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800423 list_for_each_entry(save_res, &save_head, list) {
424 struct resource *res = save_res->res;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800425
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800426 res->start = save_res->start;
427 res->end = save_res->end;
428 res->flags = save_res->flags;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800429 }
Yinghai Lubffc56d2012-01-21 02:08:30 -0800430 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800431
432requested_and_reassign:
Ram Paic8adf9a2011-02-14 17:43:20 -0800433 /* Satisfy the must-have resource requests */
434 assign_requested_resources_sorted(head, fail_head);
435
Ram Pai0a2daa12011-07-25 13:08:41 -0700436 /* Try to satisfy any additional optional resource
Ram Paic8adf9a2011-02-14 17:43:20 -0800437 requests */
Ram Pai9e8bf932011-07-25 13:08:42 -0700438 if (realloc_head)
439 reassign_resources_sorted(realloc_head, head);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800440 free_list(head);
Ram Paic8adf9a2011-02-14 17:43:20 -0800441}
442
Yinghai Lu6841ec62010-01-22 01:02:25 -0800443static void pdev_assign_resources_sorted(struct pci_dev *dev,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800444 struct list_head *add_head,
445 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800446{
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800447 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800448
Yinghai Lu6841ec62010-01-22 01:02:25 -0800449 __dev_sort_resources(dev, &head);
Yinghai Lu8424d752012-01-21 02:08:21 -0800450 __assign_resources_sorted(&head, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800451
452}
453
454static void pbus_assign_resources_sorted(const struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800455 struct list_head *realloc_head,
456 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800457{
458 struct pci_dev *dev;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800459 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800460
Yinghai Lu6841ec62010-01-22 01:02:25 -0800461 list_for_each_entry(dev, &bus->devices, bus_list)
462 __dev_sort_resources(dev, &head);
463
Ram Pai9e8bf932011-07-25 13:08:42 -0700464 __assign_resources_sorted(&head, realloc_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800465}
466
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700467void pci_setup_cardbus(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468{
469 struct pci_dev *bridge = bus->self;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600470 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700471 struct pci_bus_region region;
472
Yinghai Lub918c622012-05-17 18:51:11 -0700473 dev_info(&bridge->dev, "CardBus bridge to %pR\n",
474 &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600476 res = bus->resource[0];
Yinghai Lufc279852013-12-09 22:54:40 -0800477 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600478 if (res->flags & IORESOURCE_IO) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479 /*
480 * The IO resource is allocated a range twice as large as it
481 * would normally need. This allows us to set both IO regs.
482 */
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600483 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
485 region.start);
486 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
487 region.end);
488 }
489
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600490 res = bus->resource[1];
Yinghai Lufc279852013-12-09 22:54:40 -0800491 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600492 if (res->flags & IORESOURCE_IO) {
493 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
495 region.start);
496 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
497 region.end);
498 }
499
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600500 res = bus->resource[2];
Yinghai Lufc279852013-12-09 22:54:40 -0800501 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600502 if (res->flags & IORESOURCE_MEM) {
503 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700504 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
505 region.start);
506 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
507 region.end);
508 }
509
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600510 res = bus->resource[3];
Yinghai Lufc279852013-12-09 22:54:40 -0800511 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600512 if (res->flags & IORESOURCE_MEM) {
513 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
515 region.start);
516 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
517 region.end);
518 }
519}
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700520EXPORT_SYMBOL(pci_setup_cardbus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521
522/* Initialize bridges with base/limit values we have collected.
523 PCI-to-PCI Bridge Architecture Specification rev. 1.1 (1998)
524 requires that if there is no I/O ports or memory behind the
525 bridge, corresponding range must be turned off by writing base
526 value greater than limit to the bridge's base/limit registers.
527
528 Note: care must be taken when updating I/O base/limit registers
529 of bridges which support 32-bit I/O. This update requires two
530 config space writes, so it's quite possible that an I/O window of
531 the bridge will have some undesirable address (e.g. 0) after the
532 first write. Ditto 64-bit prefetchable MMIO. */
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600533static void pci_setup_bridge_io(struct pci_dev *bridge)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700534{
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600535 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700536 struct pci_bus_region region;
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600537 unsigned long io_mask;
538 u8 io_base_lo, io_limit_lo;
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700539 u16 l;
540 u32 io_upper16;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600542 io_mask = PCI_IO_RANGE_MASK;
543 if (bridge->io_window_1k)
544 io_mask = PCI_IO_1K_RANGE_MASK;
545
Linus Torvalds1da177e2005-04-16 15:20:36 -0700546 /* Set up the top and bottom of the PCI I/O segment for this bus. */
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600547 res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];
Yinghai Lufc279852013-12-09 22:54:40 -0800548 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600549 if (res->flags & IORESOURCE_IO) {
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700550 pci_read_config_word(bridge, PCI_IO_BASE, &l);
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600551 io_base_lo = (region.start >> 8) & io_mask;
552 io_limit_lo = (region.end >> 8) & io_mask;
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700553 l = ((u16) io_limit_lo << 8) | io_base_lo;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700554 /* Set up upper 16 bits of I/O base/limit. */
555 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600556 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800557 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558 /* Clear upper 16 bits of I/O base/limit. */
559 io_upper16 = 0;
560 l = 0x00f0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561 }
562 /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
563 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
564 /* Update lower 16 bits of I/O base/limit. */
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700565 pci_write_config_word(bridge, PCI_IO_BASE, l);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566 /* Update upper 16 bits of I/O base/limit. */
567 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800568}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600570static void pci_setup_bridge_mmio(struct pci_dev *bridge)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800571{
Yinghai Lu7cc59972009-12-22 15:02:21 -0800572 struct resource *res;
573 struct pci_bus_region region;
574 u32 l;
575
576 /* Set up the top and bottom of the PCI Memory segment for this bus. */
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600577 res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];
Yinghai Lufc279852013-12-09 22:54:40 -0800578 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600579 if (res->flags & IORESOURCE_MEM) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700580 l = (region.start >> 16) & 0xfff0;
581 l |= region.end & 0xfff00000;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600582 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800583 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700584 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700585 }
586 pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800587}
588
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600589static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800590{
Yinghai Lu7cc59972009-12-22 15:02:21 -0800591 struct resource *res;
592 struct pci_bus_region region;
593 u32 l, bu, lu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700594
595 /* Clear out the upper 32 bits of PREF limit.
596 If PCI_PREF_BASE_UPPER32 was non-zero, this temporarily
597 disables PREF range, which is ok. */
598 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);
599
600 /* Set up PREF base/limit. */
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100601 bu = lu = 0;
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600602 res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];
Yinghai Lufc279852013-12-09 22:54:40 -0800603 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600604 if (res->flags & IORESOURCE_PREFETCH) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605 l = (region.start >> 16) & 0xfff0;
606 l |= region.end & 0xfff00000;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600607 if (res->flags & IORESOURCE_MEM_64) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700608 bu = upper_32_bits(region.start);
609 lu = upper_32_bits(region.end);
Yinghai Lu1f82de12009-04-23 20:48:32 -0700610 }
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600611 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800612 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700613 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614 }
615 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
616
Alex Williamson59353ea2009-11-30 14:51:44 -0700617 /* Set the upper 32 bits of PREF base & limit. */
618 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
619 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800620}
621
622static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type)
623{
624 struct pci_dev *bridge = bus->self;
625
Yinghai Lub918c622012-05-17 18:51:11 -0700626 dev_info(&bridge->dev, "PCI bridge to %pR\n",
627 &bus->busn_res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800628
629 if (type & IORESOURCE_IO)
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600630 pci_setup_bridge_io(bridge);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800631
632 if (type & IORESOURCE_MEM)
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600633 pci_setup_bridge_mmio(bridge);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800634
635 if (type & IORESOURCE_PREFETCH)
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600636 pci_setup_bridge_mmio_pref(bridge);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637
638 pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);
639}
640
Benjamin Herrenschmidte2444272011-09-11 14:08:38 -0300641void pci_setup_bridge(struct pci_bus *bus)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800642{
643 unsigned long type = IORESOURCE_IO | IORESOURCE_MEM |
644 IORESOURCE_PREFETCH;
645
646 __pci_setup_bridge(bus, type);
647}
648
Yinghai Lu8505e722015-01-15 16:21:49 -0600649
650int pci_claim_bridge_resource(struct pci_dev *bridge, int i)
651{
652 if (i < PCI_BRIDGE_RESOURCES || i > PCI_BRIDGE_RESOURCE_END)
653 return 0;
654
655 if (pci_claim_resource(bridge, i) == 0)
656 return 0; /* claimed the window */
657
658 if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI)
659 return 0;
660
661 if (!pci_bus_clip_resource(bridge, i))
662 return -EINVAL; /* clipping didn't change anything */
663
664 switch (i - PCI_BRIDGE_RESOURCES) {
665 case 0:
666 pci_setup_bridge_io(bridge);
667 break;
668 case 1:
669 pci_setup_bridge_mmio(bridge);
670 break;
671 case 2:
672 pci_setup_bridge_mmio_pref(bridge);
673 break;
674 default:
675 return -EINVAL;
676 }
677
678 if (pci_claim_resource(bridge, i) == 0)
679 return 0; /* claimed a smaller window */
680
681 return -EINVAL;
682}
683
Linus Torvalds1da177e2005-04-16 15:20:36 -0700684/* Check whether the bridge supports optional I/O and
685 prefetchable memory ranges. If not, the respective
686 base/limit registers must be read-only and read as 0. */
Sam Ravnborg96bde062007-03-26 21:53:30 -0800687static void pci_bridge_check_ranges(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700688{
689 u16 io;
690 u32 pmem;
691 struct pci_dev *bridge = bus->self;
692 struct resource *b_res;
693
694 b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
695 b_res[1].flags |= IORESOURCE_MEM;
696
697 pci_read_config_word(bridge, PCI_IO_BASE, &io);
698 if (!io) {
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700699 pci_write_config_word(bridge, PCI_IO_BASE, 0xe0f0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700 pci_read_config_word(bridge, PCI_IO_BASE, &io);
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700701 pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
702 }
703 if (io)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704 b_res[0].flags |= IORESOURCE_IO;
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700705
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706 /* DECchip 21050 pass 2 errata: the bridge may miss an address
707 disconnect boundary by one PCI data phase.
708 Workaround: do not use prefetching on this device. */
709 if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001)
710 return;
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700711
Linus Torvalds1da177e2005-04-16 15:20:36 -0700712 pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
713 if (!pmem) {
714 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE,
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700715 0xffe0fff0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700716 pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
717 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, 0x0);
718 }
Yinghai Lu1f82de12009-04-23 20:48:32 -0700719 if (pmem) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700720 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
Yinghai Lu99586102010-01-22 01:02:28 -0800721 if ((pmem & PCI_PREF_RANGE_TYPE_MASK) ==
722 PCI_PREF_RANGE_TYPE_64) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700723 b_res[2].flags |= IORESOURCE_MEM_64;
Yinghai Lu99586102010-01-22 01:02:28 -0800724 b_res[2].flags |= PCI_PREF_RANGE_TYPE_64;
725 }
Yinghai Lu1f82de12009-04-23 20:48:32 -0700726 }
727
728 /* double check if bridge does support 64 bit pref */
729 if (b_res[2].flags & IORESOURCE_MEM_64) {
730 u32 mem_base_hi, tmp;
731 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32,
732 &mem_base_hi);
733 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
734 0xffffffff);
735 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp);
736 if (!tmp)
737 b_res[2].flags &= ~IORESOURCE_MEM_64;
738 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
739 mem_base_hi);
740 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700741}
742
743/* Helper function for sizing routines: find first available
744 bus resource of a given type. Note: we intentionally skip
745 the bus resources which have already been assigned (that is,
746 have non-NULL parent resource). */
Yinghai Lu5b285412014-05-19 17:01:55 -0600747static struct resource *find_free_bus_resource(struct pci_bus *bus,
748 unsigned long type_mask, unsigned long type)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700749{
750 int i;
751 struct resource *r;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700752
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -0700753 pci_bus_for_each_resource(bus, r, i) {
Ivan Kokshaysky299de032005-06-15 18:59:27 +0400754 if (r == &ioport_resource || r == &iomem_resource)
755 continue;
Jesse Barnes55a10982009-10-27 09:39:18 -0700756 if (r && (r->flags & type_mask) == type && !r->parent)
757 return r;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700758 }
759 return NULL;
760}
761
Ram Pai13583b12011-02-14 17:43:17 -0800762static resource_size_t calculate_iosize(resource_size_t size,
763 resource_size_t min_size,
764 resource_size_t size1,
765 resource_size_t old_size,
766 resource_size_t align)
767{
768 if (size < min_size)
769 size = min_size;
Ryan Desfosses3c78bc62014-04-18 20:13:49 -0400770 if (old_size == 1)
Ram Pai13583b12011-02-14 17:43:17 -0800771 old_size = 0;
772 /* To be fixed in 2.5: we should have sort of HAVE_ISA
773 flag in the struct pci_bus. */
774#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
775 size = (size & 0xff) + ((size & ~0xffUL) << 2);
776#endif
777 size = ALIGN(size + size1, align);
778 if (size < old_size)
779 size = old_size;
780 return size;
781}
782
783static resource_size_t calculate_memsize(resource_size_t size,
784 resource_size_t min_size,
785 resource_size_t size1,
786 resource_size_t old_size,
787 resource_size_t align)
788{
789 if (size < min_size)
790 size = min_size;
Ryan Desfosses3c78bc62014-04-18 20:13:49 -0400791 if (old_size == 1)
Ram Pai13583b12011-02-14 17:43:17 -0800792 old_size = 0;
793 if (size < old_size)
794 size = old_size;
795 size = ALIGN(size + size1, align);
796 return size;
797}
798
Gavin Shanac5ad932012-09-11 16:59:45 -0600799resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus,
800 unsigned long type)
801{
802 return 1;
803}
804
805#define PCI_P2P_DEFAULT_MEM_ALIGN 0x100000 /* 1MiB */
806#define PCI_P2P_DEFAULT_IO_ALIGN 0x1000 /* 4KiB */
807#define PCI_P2P_DEFAULT_IO_ALIGN_1K 0x400 /* 1KiB */
808
809static resource_size_t window_alignment(struct pci_bus *bus,
810 unsigned long type)
811{
812 resource_size_t align = 1, arch_align;
813
814 if (type & IORESOURCE_MEM)
815 align = PCI_P2P_DEFAULT_MEM_ALIGN;
816 else if (type & IORESOURCE_IO) {
817 /*
818 * Per spec, I/O windows are 4K-aligned, but some
819 * bridges have an extension to support 1K alignment.
820 */
821 if (bus->self->io_window_1k)
822 align = PCI_P2P_DEFAULT_IO_ALIGN_1K;
823 else
824 align = PCI_P2P_DEFAULT_IO_ALIGN;
825 }
826
827 arch_align = pcibios_window_alignment(bus, type);
828 return max(align, arch_align);
829}
830
Ram Paic8adf9a2011-02-14 17:43:20 -0800831/**
832 * pbus_size_io() - size the io window of a given bus
833 *
834 * @bus : the bus
835 * @min_size : the minimum io window that must to be allocated
836 * @add_size : additional optional io window
Ram Pai9e8bf932011-07-25 13:08:42 -0700837 * @realloc_head : track the additional io window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -0800838 *
839 * Sizing the IO windows of the PCI-PCI bridge is trivial,
Yinghai Lufd591342012-07-09 19:55:29 -0600840 * since these windows have 1K or 4K granularity and the IO ranges
Ram Paic8adf9a2011-02-14 17:43:20 -0800841 * of non-bridge PCI devices are limited to 256 bytes.
842 * We must be careful with the ISA aliasing though.
843 */
844static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800845 resource_size_t add_size, struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700846{
847 struct pci_dev *dev;
Yinghai Lu5b285412014-05-19 17:01:55 -0600848 struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO,
849 IORESOURCE_IO);
Wei Yang11251a82013-08-02 17:31:05 +0800850 resource_size_t size = 0, size0 = 0, size1 = 0;
Yinghai Lube768912011-07-25 13:08:38 -0700851 resource_size_t children_add_size = 0;
Bjorn Helgaas2d1d6672013-08-05 16:15:10 -0600852 resource_size_t min_align, align;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700853
854 if (!b_res)
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700855 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700856
Bjorn Helgaas2d1d6672013-08-05 16:15:10 -0600857 min_align = window_alignment(bus, IORESOURCE_IO);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700858 list_for_each_entry(dev, &bus->devices, bus_list) {
859 int i;
860
861 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
862 struct resource *r = &dev->resource[i];
863 unsigned long r_size;
864
865 if (r->parent || !(r->flags & IORESOURCE_IO))
866 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +0800867 r_size = resource_size(r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868
869 if (r_size < 0x400)
870 /* Might be re-aligned for ISA */
871 size += r_size;
872 else
873 size1 += r_size;
Yinghai Lube768912011-07-25 13:08:38 -0700874
Yinghai Lufd591342012-07-09 19:55:29 -0600875 align = pci_resource_alignment(dev, r);
876 if (align > min_align)
877 min_align = align;
878
Ram Pai9e8bf932011-07-25 13:08:42 -0700879 if (realloc_head)
880 children_add_size += get_res_add_size(realloc_head, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881 }
882 }
Yinghai Lufd591342012-07-09 19:55:29 -0600883
Ram Paic8adf9a2011-02-14 17:43:20 -0800884 size0 = calculate_iosize(size, min_size, size1,
Yinghai Lufd591342012-07-09 19:55:29 -0600885 resource_size(b_res), min_align);
Yinghai Lube768912011-07-25 13:08:38 -0700886 if (children_add_size > add_size)
887 add_size = children_add_size;
Ram Pai9e8bf932011-07-25 13:08:42 -0700888 size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
Yinghai Lua4ac9fe2012-01-21 02:08:17 -0800889 calculate_iosize(size, min_size, add_size + size1,
Yinghai Lufd591342012-07-09 19:55:29 -0600890 resource_size(b_res), min_align);
Ram Paic8adf9a2011-02-14 17:43:20 -0800891 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700892 if (b_res->start || b_res->end)
Ryan Desfosses227f0642014-04-18 20:13:50 -0400893 dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n",
894 b_res, &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700895 b_res->flags = 0;
896 return;
897 }
Yinghai Lufd591342012-07-09 19:55:29 -0600898
899 b_res->start = min_align;
Ram Paic8adf9a2011-02-14 17:43:20 -0800900 b_res->end = b_res->start + size0 - 1;
Ivan Kokshaysky88452562008-03-30 19:50:14 +0400901 b_res->flags |= IORESOURCE_STARTALIGN;
Yinghai Lub5924432012-01-21 02:08:31 -0800902 if (size1 > size0 && realloc_head) {
Yinghai Lufd591342012-07-09 19:55:29 -0600903 add_to_list(realloc_head, bus->self, b_res, size1-size0,
904 min_align);
Ryan Desfosses227f0642014-04-18 20:13:50 -0400905 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window %pR to %pR add_size %llx\n",
906 b_res, &bus->busn_res,
907 (unsigned long long)size1-size0);
Yinghai Lub5924432012-01-21 02:08:31 -0800908 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700909}
910
Gavin Shanc1215042012-09-11 16:59:46 -0600911static inline resource_size_t calculate_mem_align(resource_size_t *aligns,
912 int max_order)
913{
914 resource_size_t align = 0;
915 resource_size_t min_align = 0;
916 int order;
917
918 for (order = 0; order <= max_order; order++) {
919 resource_size_t align1 = 1;
920
921 align1 <<= (order + 20);
922
923 if (!align)
924 min_align = align1;
925 else if (ALIGN(align + min_align, min_align) < align1)
926 min_align = align1 >> 1;
927 align += aligns[order];
928 }
929
930 return min_align;
931}
932
Ram Paic8adf9a2011-02-14 17:43:20 -0800933/**
934 * pbus_size_mem() - size the memory window of a given bus
935 *
936 * @bus : the bus
Wei Yang496f70c2013-08-02 17:31:04 +0800937 * @mask: mask the resource flag, then compare it with type
938 * @type: the type of free resource from bridge
Yinghai Lu5b285412014-05-19 17:01:55 -0600939 * @type2: second match type
940 * @type3: third match type
Ram Paic8adf9a2011-02-14 17:43:20 -0800941 * @min_size : the minimum memory window that must to be allocated
942 * @add_size : additional optional memory window
Ram Pai9e8bf932011-07-25 13:08:42 -0700943 * @realloc_head : track the additional memory window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -0800944 *
945 * Calculate the size of the bus and minimal alignment which
946 * guarantees that all child resources fit in this size.
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -0600947 *
948 * Returns -ENOSPC if there's no available bus resource of the desired type.
949 * Otherwise, sets the bus resource start/end to indicate the required
950 * size, adds things to realloc_head (if supplied), and returns 0.
Ram Paic8adf9a2011-02-14 17:43:20 -0800951 */
Eric W. Biederman28760482009-09-09 14:09:24 -0700952static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
Yinghai Lu5b285412014-05-19 17:01:55 -0600953 unsigned long type, unsigned long type2,
954 unsigned long type3,
955 resource_size_t min_size, resource_size_t add_size,
956 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700957{
958 struct pci_dev *dev;
Ram Paic8adf9a2011-02-14 17:43:20 -0800959 resource_size_t min_align, align, size, size0, size1;
Yinghai Lu096d4222014-07-03 13:46:17 -0700960 resource_size_t aligns[18]; /* Alignments from 1Mb to 128Gb */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700961 int order, max_order;
Yinghai Lu5b285412014-05-19 17:01:55 -0600962 struct resource *b_res = find_free_bus_resource(bus,
963 mask | IORESOURCE_PREFETCH, type);
Yinghai Lube768912011-07-25 13:08:38 -0700964 resource_size_t children_add_size = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700965
966 if (!b_res)
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -0600967 return -ENOSPC;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700968
969 memset(aligns, 0, sizeof(aligns));
970 max_order = 0;
971 size = 0;
972
973 list_for_each_entry(dev, &bus->devices, bus_list) {
974 int i;
Yinghai Lu1f82de12009-04-23 20:48:32 -0700975
Linus Torvalds1da177e2005-04-16 15:20:36 -0700976 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
977 struct resource *r = &dev->resource[i];
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100978 resource_size_t r_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700979
Yinghai Lu5b285412014-05-19 17:01:55 -0600980 if (r->parent || ((r->flags & mask) != type &&
981 (r->flags & mask) != type2 &&
982 (r->flags & mask) != type3))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700983 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +0800984 r_size = resource_size(r);
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700985#ifdef CONFIG_PCI_IOV
986 /* put SRIOV requested res to the optional list */
Ram Pai9e8bf932011-07-25 13:08:42 -0700987 if (realloc_head && i >= PCI_IOV_RESOURCES &&
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700988 i <= PCI_IOV_RESOURCE_END) {
989 r->end = r->start - 1;
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700990 add_to_list(realloc_head, dev, r, r_size, 0/* don't care */);
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700991 children_add_size += r_size;
992 continue;
993 }
994#endif
Alan14c85302014-05-19 14:03:14 +0100995 /*
996 * aligns[0] is for 1MB (since bridge memory
997 * windows are always at least 1MB aligned), so
998 * keep "order" from being negative for smaller
999 * resources.
1000 */
Chris Wright6faf17f2009-08-28 13:00:06 -07001001 align = pci_resource_alignment(dev, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001002 order = __ffs(align) - 20;
Alan14c85302014-05-19 14:03:14 +01001003 if (order < 0)
1004 order = 0;
1005 if (order >= ARRAY_SIZE(aligns)) {
Ryan Desfosses227f0642014-04-18 20:13:50 -04001006 dev_warn(&dev->dev, "disabling BAR %d: %pR (bad alignment %#llx)\n",
1007 i, r, (unsigned long long) align);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001008 r->flags = 0;
1009 continue;
1010 }
1011 size += r_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001012 /* Exclude ranges with size > align from
1013 calculation of the alignment. */
1014 if (r_size == align)
1015 aligns[order] += align;
1016 if (order > max_order)
1017 max_order = order;
Yinghai Lube768912011-07-25 13:08:38 -07001018
Ram Pai9e8bf932011-07-25 13:08:42 -07001019 if (realloc_head)
1020 children_add_size += get_res_add_size(realloc_head, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001021 }
1022 }
Jeremy Fitzhardinge8308c542008-09-11 01:31:50 -07001023
Gavin Shanc1215042012-09-11 16:59:46 -06001024 min_align = calculate_mem_align(aligns, max_order);
Wei Yang3ad94b02013-09-06 09:45:58 +08001025 min_align = max(min_align, window_alignment(bus, b_res->flags));
Linus Torvaldsb42282e2011-04-11 10:53:11 -07001026 size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align);
Yinghai Lube768912011-07-25 13:08:38 -07001027 if (children_add_size > add_size)
1028 add_size = children_add_size;
Ram Pai9e8bf932011-07-25 13:08:42 -07001029 size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
Yinghai Lua4ac9fe2012-01-21 02:08:17 -08001030 calculate_memsize(size, min_size, add_size,
Linus Torvaldsb42282e2011-04-11 10:53:11 -07001031 resource_size(b_res), min_align);
Ram Paic8adf9a2011-02-14 17:43:20 -08001032 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -07001033 if (b_res->start || b_res->end)
Ryan Desfosses227f0642014-04-18 20:13:50 -04001034 dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n",
1035 b_res, &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001036 b_res->flags = 0;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001037 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001038 }
1039 b_res->start = min_align;
Ram Paic8adf9a2011-02-14 17:43:20 -08001040 b_res->end = size0 + min_align - 1;
Yinghai Lu5b285412014-05-19 17:01:55 -06001041 b_res->flags |= IORESOURCE_STARTALIGN;
Yinghai Lub5924432012-01-21 02:08:31 -08001042 if (size1 > size0 && realloc_head) {
Ram Pai9e8bf932011-07-25 13:08:42 -07001043 add_to_list(realloc_head, bus->self, b_res, size1-size0, min_align);
Ryan Desfosses227f0642014-04-18 20:13:50 -04001044 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window %pR to %pR add_size %llx\n",
1045 b_res, &bus->busn_res,
1046 (unsigned long long)size1-size0);
Yinghai Lub5924432012-01-21 02:08:31 -08001047 }
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001048 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001049}
1050
Ram Pai0a2daa12011-07-25 13:08:41 -07001051unsigned long pci_cardbus_resource_alignment(struct resource *res)
1052{
1053 if (res->flags & IORESOURCE_IO)
1054 return pci_cardbus_io_size;
1055 if (res->flags & IORESOURCE_MEM)
1056 return pci_cardbus_mem_size;
1057 return 0;
1058}
1059
1060static void pci_bus_size_cardbus(struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001061 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001062{
1063 struct pci_dev *bridge = bus->self;
1064 struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
Yinghai Lu11848932012-02-10 15:33:47 -08001065 resource_size_t b_res_3_size = pci_cardbus_mem_size * 2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001066 u16 ctrl;
1067
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001068 if (b_res[0].parent)
1069 goto handle_b_res_1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001070 /*
1071 * Reserve some resources for CardBus. We reserve
1072 * a fixed amount of bus space for CardBus bridges.
1073 */
Yinghai Lu11848932012-02-10 15:33:47 -08001074 b_res[0].start = pci_cardbus_io_size;
1075 b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1;
1076 b_res[0].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
1077 if (realloc_head) {
1078 b_res[0].end -= pci_cardbus_io_size;
1079 add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,
1080 pci_cardbus_io_size);
1081 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001082
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001083handle_b_res_1:
1084 if (b_res[1].parent)
1085 goto handle_b_res_2;
Yinghai Lu11848932012-02-10 15:33:47 -08001086 b_res[1].start = pci_cardbus_io_size;
1087 b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1;
1088 b_res[1].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
1089 if (realloc_head) {
1090 b_res[1].end -= pci_cardbus_io_size;
1091 add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size,
1092 pci_cardbus_io_size);
1093 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001094
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001095handle_b_res_2:
Yinghai Ludcef0d02012-02-10 15:33:46 -08001096 /* MEM1 must not be pref mmio */
1097 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1098 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {
1099 ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
1100 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
1101 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1102 }
1103
Linus Torvalds1da177e2005-04-16 15:20:36 -07001104 /*
1105 * Check whether prefetchable memory is supported
1106 * by this bridge.
1107 */
1108 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1109 if (!(ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)) {
1110 ctrl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
1111 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
1112 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1113 }
1114
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001115 if (b_res[2].parent)
1116 goto handle_b_res_3;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001117 /*
1118 * If we have prefetchable memory support, allocate
1119 * two regions. Otherwise, allocate one region of
1120 * twice the size.
1121 */
1122 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
Yinghai Lu11848932012-02-10 15:33:47 -08001123 b_res[2].start = pci_cardbus_mem_size;
1124 b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1;
1125 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH |
1126 IORESOURCE_STARTALIGN;
1127 if (realloc_head) {
1128 b_res[2].end -= pci_cardbus_mem_size;
1129 add_to_list(realloc_head, bridge, b_res+2,
1130 pci_cardbus_mem_size, pci_cardbus_mem_size);
1131 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001132
Yinghai Lu11848932012-02-10 15:33:47 -08001133 /* reduce that to half */
1134 b_res_3_size = pci_cardbus_mem_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001135 }
Ram Pai0a2daa12011-07-25 13:08:41 -07001136
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001137handle_b_res_3:
1138 if (b_res[3].parent)
1139 goto handle_done;
Yinghai Lu11848932012-02-10 15:33:47 -08001140 b_res[3].start = pci_cardbus_mem_size;
1141 b_res[3].end = b_res[3].start + b_res_3_size - 1;
1142 b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN;
1143 if (realloc_head) {
1144 b_res[3].end -= b_res_3_size;
1145 add_to_list(realloc_head, bridge, b_res+3, b_res_3_size,
1146 pci_cardbus_mem_size);
1147 }
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001148
1149handle_done:
1150 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001151}
1152
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001153void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001154{
1155 struct pci_dev *dev;
Yinghai Lu5b285412014-05-19 17:01:55 -06001156 unsigned long mask, prefmask, type2 = 0, type3 = 0;
Ram Paic8adf9a2011-02-14 17:43:20 -08001157 resource_size_t additional_mem_size = 0, additional_io_size = 0;
Yinghai Lu5b285412014-05-19 17:01:55 -06001158 struct resource *b_res;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001159 int ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001160
1161 list_for_each_entry(dev, &bus->devices, bus_list) {
1162 struct pci_bus *b = dev->subordinate;
1163 if (!b)
1164 continue;
1165
1166 switch (dev->class >> 8) {
1167 case PCI_CLASS_BRIDGE_CARDBUS:
Ram Pai9e8bf932011-07-25 13:08:42 -07001168 pci_bus_size_cardbus(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001169 break;
1170
1171 case PCI_CLASS_BRIDGE_PCI:
1172 default:
Ram Pai9e8bf932011-07-25 13:08:42 -07001173 __pci_bus_size_bridges(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001174 break;
1175 }
1176 }
1177
1178 /* The root bus? */
Wei Yang2ba29e22013-09-06 09:45:56 +08001179 if (pci_is_root_bus(bus))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001180 return;
1181
1182 switch (bus->self->class >> 8) {
1183 case PCI_CLASS_BRIDGE_CARDBUS:
1184 /* don't size cardbuses yet. */
1185 break;
1186
1187 case PCI_CLASS_BRIDGE_PCI:
1188 pci_bridge_check_ranges(bus);
Eric W. Biederman28760482009-09-09 14:09:24 -07001189 if (bus->self->is_hotplug_bridge) {
Ram Paic8adf9a2011-02-14 17:43:20 -08001190 additional_io_size = pci_hotplug_io_size;
1191 additional_mem_size = pci_hotplug_mem_size;
Eric W. Biederman28760482009-09-09 14:09:24 -07001192 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001193 /* Fall through */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001194 default:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001195 pbus_size_io(bus, realloc_head ? 0 : additional_io_size,
1196 additional_io_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001197
1198 /*
1199 * If there's a 64-bit prefetchable MMIO window, compute
1200 * the size required to put all 64-bit prefetchable
1201 * resources in it.
1202 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001203 b_res = &bus->self->resource[PCI_BRIDGE_RESOURCES];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001204 mask = IORESOURCE_MEM;
1205 prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH;
Yinghai Lu5b285412014-05-19 17:01:55 -06001206 if (b_res[2].flags & IORESOURCE_MEM_64) {
1207 prefmask |= IORESOURCE_MEM_64;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001208 ret = pbus_size_mem(bus, prefmask, prefmask,
Yinghai Lu5b285412014-05-19 17:01:55 -06001209 prefmask, prefmask,
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001210 realloc_head ? 0 : additional_mem_size,
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001211 additional_mem_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001212
1213 /*
1214 * If successful, all non-prefetchable resources
1215 * and any 32-bit prefetchable resources will go in
1216 * the non-prefetchable window.
1217 */
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001218 if (ret == 0) {
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001219 mask = prefmask;
1220 type2 = prefmask & ~IORESOURCE_MEM_64;
1221 type3 = prefmask & ~IORESOURCE_PREFETCH;
Yinghai Lu5b285412014-05-19 17:01:55 -06001222 }
1223 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001224
1225 /*
1226 * If there is no 64-bit prefetchable window, compute the
1227 * size required to put all prefetchable resources in the
1228 * 32-bit prefetchable window (if there is one).
1229 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001230 if (!type2) {
1231 prefmask &= ~IORESOURCE_MEM_64;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001232 ret = pbus_size_mem(bus, prefmask, prefmask,
Yinghai Lu5b285412014-05-19 17:01:55 -06001233 prefmask, prefmask,
1234 realloc_head ? 0 : additional_mem_size,
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001235 additional_mem_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001236
1237 /*
1238 * If successful, only non-prefetchable resources
1239 * will go in the non-prefetchable window.
1240 */
1241 if (ret == 0)
Yinghai Lu5b285412014-05-19 17:01:55 -06001242 mask = prefmask;
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001243 else
Yinghai Lu5b285412014-05-19 17:01:55 -06001244 additional_mem_size += additional_mem_size;
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001245
Yinghai Lu5b285412014-05-19 17:01:55 -06001246 type2 = type3 = IORESOURCE_MEM;
1247 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001248
1249 /*
1250 * Compute the size required to put everything else in the
1251 * non-prefetchable window. This includes:
1252 *
1253 * - all non-prefetchable resources
1254 * - 32-bit prefetchable resources if there's a 64-bit
1255 * prefetchable window or no prefetchable window at all
1256 * - 64-bit prefetchable resources if there's no
1257 * prefetchable window at all
1258 *
1259 * Note that the strategy in __pci_assign_resource() must
1260 * match that used here. Specifically, we cannot put a
1261 * 32-bit prefetchable resource in a 64-bit prefetchable
1262 * window.
1263 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001264 pbus_size_mem(bus, mask, IORESOURCE_MEM, type2, type3,
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001265 realloc_head ? 0 : additional_mem_size,
1266 additional_mem_size, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001267 break;
1268 }
1269}
Ram Paic8adf9a2011-02-14 17:43:20 -08001270
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001271void pci_bus_size_bridges(struct pci_bus *bus)
Ram Paic8adf9a2011-02-14 17:43:20 -08001272{
1273 __pci_bus_size_bridges(bus, NULL);
1274}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001275EXPORT_SYMBOL(pci_bus_size_bridges);
1276
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001277void __pci_bus_assign_resources(const struct pci_bus *bus,
1278 struct list_head *realloc_head,
1279 struct list_head *fail_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001280{
1281 struct pci_bus *b;
1282 struct pci_dev *dev;
1283
Ram Pai9e8bf932011-07-25 13:08:42 -07001284 pbus_assign_resources_sorted(bus, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001285
Linus Torvalds1da177e2005-04-16 15:20:36 -07001286 list_for_each_entry(dev, &bus->devices, bus_list) {
1287 b = dev->subordinate;
1288 if (!b)
1289 continue;
1290
Ram Pai9e8bf932011-07-25 13:08:42 -07001291 __pci_bus_assign_resources(b, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001292
1293 switch (dev->class >> 8) {
1294 case PCI_CLASS_BRIDGE_PCI:
Yinghai Lu6841ec62010-01-22 01:02:25 -08001295 if (!pci_is_enabled(dev))
1296 pci_setup_bridge(b);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001297 break;
1298
1299 case PCI_CLASS_BRIDGE_CARDBUS:
1300 pci_setup_cardbus(b);
1301 break;
1302
1303 default:
Ryan Desfosses227f0642014-04-18 20:13:50 -04001304 dev_info(&dev->dev, "not setting up bridge for bus %04x:%02x\n",
1305 pci_domain_nr(b), b->number);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001306 break;
1307 }
1308 }
1309}
Yinghai Lu568ddef2010-01-22 01:02:21 -08001310
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001311void pci_bus_assign_resources(const struct pci_bus *bus)
Yinghai Lu568ddef2010-01-22 01:02:21 -08001312{
Ram Paic8adf9a2011-02-14 17:43:20 -08001313 __pci_bus_assign_resources(bus, NULL, NULL);
Yinghai Lu568ddef2010-01-22 01:02:21 -08001314}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001315EXPORT_SYMBOL(pci_bus_assign_resources);
1316
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001317static void __pci_bridge_assign_resources(const struct pci_dev *bridge,
1318 struct list_head *add_head,
1319 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -08001320{
1321 struct pci_bus *b;
1322
Yinghai Lu8424d752012-01-21 02:08:21 -08001323 pdev_assign_resources_sorted((struct pci_dev *)bridge,
1324 add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001325
1326 b = bridge->subordinate;
1327 if (!b)
1328 return;
1329
Yinghai Lu8424d752012-01-21 02:08:21 -08001330 __pci_bus_assign_resources(b, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001331
1332 switch (bridge->class >> 8) {
1333 case PCI_CLASS_BRIDGE_PCI:
1334 pci_setup_bridge(b);
1335 break;
1336
1337 case PCI_CLASS_BRIDGE_CARDBUS:
1338 pci_setup_cardbus(b);
1339 break;
1340
1341 default:
Ryan Desfosses227f0642014-04-18 20:13:50 -04001342 dev_info(&bridge->dev, "not setting up bridge for bus %04x:%02x\n",
1343 pci_domain_nr(b), b->number);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001344 break;
1345 }
1346}
Yinghai Lu5009b462010-01-22 01:02:20 -08001347static void pci_bridge_release_resources(struct pci_bus *bus,
1348 unsigned long type)
1349{
Yinghai Lu5b285412014-05-19 17:01:55 -06001350 struct pci_dev *dev = bus->self;
Yinghai Lu5009b462010-01-22 01:02:20 -08001351 struct resource *r;
1352 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
Yinghai Lu5b285412014-05-19 17:01:55 -06001353 IORESOURCE_PREFETCH | IORESOURCE_MEM_64;
1354 unsigned old_flags = 0;
1355 struct resource *b_res;
1356 int idx = 1;
Yinghai Lu5009b462010-01-22 01:02:20 -08001357
Yinghai Lu5b285412014-05-19 17:01:55 -06001358 b_res = &dev->resource[PCI_BRIDGE_RESOURCES];
Yinghai Lu5009b462010-01-22 01:02:20 -08001359
Yinghai Lu5b285412014-05-19 17:01:55 -06001360 /*
1361 * 1. if there is io port assign fail, will release bridge
1362 * io port.
1363 * 2. if there is non pref mmio assign fail, release bridge
1364 * nonpref mmio.
1365 * 3. if there is 64bit pref mmio assign fail, and bridge pref
1366 * is 64bit, release bridge pref mmio.
1367 * 4. if there is pref mmio assign fail, and bridge pref is
1368 * 32bit mmio, release bridge pref mmio
1369 * 5. if there is pref mmio assign fail, and bridge pref is not
1370 * assigned, release bridge nonpref mmio.
1371 */
1372 if (type & IORESOURCE_IO)
1373 idx = 0;
1374 else if (!(type & IORESOURCE_PREFETCH))
1375 idx = 1;
1376 else if ((type & IORESOURCE_MEM_64) &&
1377 (b_res[2].flags & IORESOURCE_MEM_64))
1378 idx = 2;
1379 else if (!(b_res[2].flags & IORESOURCE_MEM_64) &&
1380 (b_res[2].flags & IORESOURCE_PREFETCH))
1381 idx = 2;
1382 else
1383 idx = 1;
1384
1385 r = &b_res[idx];
1386
1387 if (!r->parent)
1388 return;
1389
1390 /*
1391 * if there are children under that, we should release them
1392 * all
1393 */
1394 release_child_resources(r);
1395 if (!release_resource(r)) {
1396 type = old_flags = r->flags & type_mask;
1397 dev_printk(KERN_DEBUG, &dev->dev, "resource %d %pR released\n",
1398 PCI_BRIDGE_RESOURCES + idx, r);
1399 /* keep the old size */
1400 r->end = resource_size(r) - 1;
1401 r->start = 0;
1402 r->flags = 0;
1403
Yinghai Lu5009b462010-01-22 01:02:20 -08001404 /* avoiding touch the one without PREF */
1405 if (type & IORESOURCE_PREFETCH)
1406 type = IORESOURCE_PREFETCH;
1407 __pci_setup_bridge(bus, type);
Yinghai Lu5b285412014-05-19 17:01:55 -06001408 /* for next child res under same bridge */
1409 r->flags = old_flags;
Yinghai Lu5009b462010-01-22 01:02:20 -08001410 }
1411}
1412
1413enum release_type {
1414 leaf_only,
1415 whole_subtree,
1416};
1417/*
1418 * try to release pci bridge resources that is from leaf bridge,
1419 * so we can allocate big new one later
1420 */
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001421static void pci_bus_release_bridge_resources(struct pci_bus *bus,
1422 unsigned long type,
1423 enum release_type rel_type)
Yinghai Lu5009b462010-01-22 01:02:20 -08001424{
1425 struct pci_dev *dev;
1426 bool is_leaf_bridge = true;
1427
1428 list_for_each_entry(dev, &bus->devices, bus_list) {
1429 struct pci_bus *b = dev->subordinate;
1430 if (!b)
1431 continue;
1432
1433 is_leaf_bridge = false;
1434
1435 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1436 continue;
1437
1438 if (rel_type == whole_subtree)
1439 pci_bus_release_bridge_resources(b, type,
1440 whole_subtree);
1441 }
1442
1443 if (pci_is_root_bus(bus))
1444 return;
1445
1446 if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1447 return;
1448
1449 if ((rel_type == whole_subtree) || is_leaf_bridge)
1450 pci_bridge_release_resources(bus, type);
1451}
1452
Yinghai Lu76fbc262008-06-23 20:33:06 +02001453static void pci_bus_dump_res(struct pci_bus *bus)
1454{
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001455 struct resource *res;
1456 int i;
Yinghai Lu76fbc262008-06-23 20:33:06 +02001457
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001458 pci_bus_for_each_resource(bus, res, i) {
Yinghai Lu7c9342b2009-12-22 15:02:24 -08001459 if (!res || !res->end || !res->flags)
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001460 continue;
Yinghai Lu76fbc262008-06-23 20:33:06 +02001461
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -06001462 dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res);
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001463 }
Yinghai Lu76fbc262008-06-23 20:33:06 +02001464}
1465
1466static void pci_bus_dump_resources(struct pci_bus *bus)
1467{
1468 struct pci_bus *b;
1469 struct pci_dev *dev;
1470
1471
1472 pci_bus_dump_res(bus);
1473
1474 list_for_each_entry(dev, &bus->devices, bus_list) {
1475 b = dev->subordinate;
1476 if (!b)
1477 continue;
1478
1479 pci_bus_dump_resources(b);
1480 }
1481}
1482
Yinghai Luff351472013-07-24 15:37:13 -06001483static int pci_bus_get_depth(struct pci_bus *bus)
Yinghai Luda7822e2011-05-12 17:11:37 -07001484{
1485 int depth = 0;
Wei Yangf2a230b2013-08-02 17:31:03 +08001486 struct pci_bus *child_bus;
Yinghai Luda7822e2011-05-12 17:11:37 -07001487
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001488 list_for_each_entry(child_bus, &bus->children, node) {
Yinghai Luda7822e2011-05-12 17:11:37 -07001489 int ret;
Yinghai Luda7822e2011-05-12 17:11:37 -07001490
Wei Yangf2a230b2013-08-02 17:31:03 +08001491 ret = pci_bus_get_depth(child_bus);
Yinghai Luda7822e2011-05-12 17:11:37 -07001492 if (ret + 1 > depth)
1493 depth = ret + 1;
1494 }
1495
1496 return depth;
1497}
Yinghai Luda7822e2011-05-12 17:11:37 -07001498
Yinghai Lub55438f2012-02-23 19:23:30 -08001499/*
1500 * -1: undefined, will auto detect later
1501 * 0: disabled by user
1502 * 1: disabled by auto detect
1503 * 2: enabled by user
1504 * 3: enabled by auto detect
1505 */
1506enum enable_type {
1507 undefined = -1,
1508 user_disabled,
1509 auto_disabled,
1510 user_enabled,
1511 auto_enabled,
1512};
1513
Yinghai Luff351472013-07-24 15:37:13 -06001514static enum enable_type pci_realloc_enable = undefined;
Yinghai Lub55438f2012-02-23 19:23:30 -08001515void __init pci_realloc_get_opt(char *str)
1516{
1517 if (!strncmp(str, "off", 3))
1518 pci_realloc_enable = user_disabled;
1519 else if (!strncmp(str, "on", 2))
1520 pci_realloc_enable = user_enabled;
1521}
Yinghai Luff351472013-07-24 15:37:13 -06001522static bool pci_realloc_enabled(enum enable_type enable)
Yinghai Lub55438f2012-02-23 19:23:30 -08001523{
Yinghai Lu967260c2013-07-22 14:37:15 -07001524 return enable >= user_enabled;
Yinghai Lub55438f2012-02-23 19:23:30 -08001525}
Ram Paif483d392011-07-07 11:19:10 -07001526
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001527#if defined(CONFIG_PCI_IOV) && defined(CONFIG_PCI_REALLOC_ENABLE_AUTO)
Yinghai Luff351472013-07-24 15:37:13 -06001528static int iov_resources_unassigned(struct pci_dev *dev, void *data)
Yinghai Lu223d96f2013-07-22 14:37:13 -07001529{
1530 int i;
1531 bool *unassigned = data;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001532
Yinghai Lu223d96f2013-07-22 14:37:13 -07001533 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) {
1534 struct resource *r = &dev->resource[i];
Yinghai Lufa216bf2013-07-22 14:37:14 -07001535 struct pci_bus_region region;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001536
Yinghai Lu223d96f2013-07-22 14:37:13 -07001537 /* Not assigned or rejected by kernel? */
Yinghai Lufa216bf2013-07-22 14:37:14 -07001538 if (!r->flags)
1539 continue;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001540
Yinghai Lufc279852013-12-09 22:54:40 -08001541 pcibios_resource_to_bus(dev->bus, &region, r);
Yinghai Lufa216bf2013-07-22 14:37:14 -07001542 if (!region.start) {
Yinghai Lu223d96f2013-07-22 14:37:13 -07001543 *unassigned = true;
1544 return 1; /* return early from pci_walk_bus() */
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001545 }
1546 }
Yinghai Lu223d96f2013-07-22 14:37:13 -07001547
1548 return 0;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001549}
1550
Yinghai Luff351472013-07-24 15:37:13 -06001551static enum enable_type pci_realloc_detect(struct pci_bus *bus,
Yinghai Lu967260c2013-07-22 14:37:15 -07001552 enum enable_type enable_local)
Yinghai Lu223d96f2013-07-22 14:37:13 -07001553{
1554 bool unassigned = false;
Yinghai Luda7822e2011-05-12 17:11:37 -07001555
Yinghai Lu967260c2013-07-22 14:37:15 -07001556 if (enable_local != undefined)
1557 return enable_local;
Yinghai Luda7822e2011-05-12 17:11:37 -07001558
Yinghai Lu967260c2013-07-22 14:37:15 -07001559 pci_walk_bus(bus, iov_resources_unassigned, &unassigned);
1560 if (unassigned)
1561 return auto_enabled;
1562
1563 return enable_local;
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001564}
Yinghai Lu223d96f2013-07-22 14:37:13 -07001565#else
Yinghai Luff351472013-07-24 15:37:13 -06001566static enum enable_type pci_realloc_detect(struct pci_bus *bus,
Yinghai Lu967260c2013-07-22 14:37:15 -07001567 enum enable_type enable_local)
1568{
1569 return enable_local;
1570}
Yinghai Lu223d96f2013-07-22 14:37:13 -07001571#endif
Yinghai Luda7822e2011-05-12 17:11:37 -07001572
1573/*
1574 * first try will not touch pci bridge res
Bjorn Helgaasf7625982013-11-14 11:28:18 -07001575 * second and later try will clear small leaf bridge res
1576 * will stop till to the max depth if can not find good one
Linus Torvalds1da177e2005-04-16 15:20:36 -07001577 */
Yinghai Lu39772032013-07-22 14:37:18 -07001578void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001579{
Ram Paic8adf9a2011-02-14 17:43:20 -08001580 LIST_HEAD(realloc_head); /* list of resources that
Yinghai Luda7822e2011-05-12 17:11:37 -07001581 want additional resources */
1582 struct list_head *add_list = NULL;
1583 int tried_times = 0;
1584 enum release_type rel_type = leaf_only;
1585 LIST_HEAD(fail_head);
1586 struct pci_dev_resource *fail_res;
1587 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
Yinghai Lu5b285412014-05-19 17:01:55 -06001588 IORESOURCE_PREFETCH | IORESOURCE_MEM_64;
Yinghai Luda7822e2011-05-12 17:11:37 -07001589 int pci_try_num = 1;
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001590 enum enable_type enable_local;
Yinghai Luda7822e2011-05-12 17:11:37 -07001591
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001592 /* don't realloc if asked to do so */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001593 enable_local = pci_realloc_detect(bus, pci_realloc_enable);
Yinghai Lu967260c2013-07-22 14:37:15 -07001594 if (pci_realloc_enabled(enable_local)) {
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001595 int max_depth = pci_bus_get_depth(bus);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001596
1597 pci_try_num = max_depth + 1;
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001598 dev_printk(KERN_DEBUG, &bus->dev,
1599 "max bus depth: %d pci_try_num: %d\n",
1600 max_depth, pci_try_num);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001601 }
Yinghai Luda7822e2011-05-12 17:11:37 -07001602
1603again:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001604 /*
1605 * last try will use add_list, otherwise will try good to have as
1606 * must have, so can realloc parent bridge resource
1607 */
1608 if (tried_times + 1 == pci_try_num)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001609 add_list = &realloc_head;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001610 /* Depth first, calculate sizes and alignments of all
1611 subordinate buses. */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001612 __pci_bus_size_bridges(bus, add_list);
Ram Paic8adf9a2011-02-14 17:43:20 -08001613
Linus Torvalds1da177e2005-04-16 15:20:36 -07001614 /* Depth last, allocate resources and update the hardware. */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001615 __pci_bus_assign_resources(bus, add_list, &fail_head);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001616 if (add_list)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001617 BUG_ON(!list_empty(add_list));
Yinghai Luda7822e2011-05-12 17:11:37 -07001618 tried_times++;
1619
1620 /* any device complain? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001621 if (list_empty(&fail_head))
Yinghai Lu928bea92013-07-22 14:37:17 -07001622 goto dump;
Ram Paif483d392011-07-07 11:19:10 -07001623
Yinghai Lu0c5be0c2012-02-23 19:23:29 -08001624 if (tried_times >= pci_try_num) {
Yinghai Lu967260c2013-07-22 14:37:15 -07001625 if (enable_local == undefined)
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001626 dev_info(&bus->dev, "Some PCI device resources are unassigned, try booting with pci=realloc\n");
Yinghai Lu967260c2013-07-22 14:37:15 -07001627 else if (enable_local == auto_enabled)
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001628 dev_info(&bus->dev, "Automatically enabled pci realloc, if you have problem, try booting with pci=realloc=off\n");
Yinghai Lueb572e72012-02-23 19:23:31 -08001629
Yinghai Lubffc56d2012-01-21 02:08:30 -08001630 free_list(&fail_head);
Yinghai Lu928bea92013-07-22 14:37:17 -07001631 goto dump;
Yinghai Luda7822e2011-05-12 17:11:37 -07001632 }
1633
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001634 dev_printk(KERN_DEBUG, &bus->dev,
1635 "No. %d try to assign unassigned res\n", tried_times + 1);
Yinghai Luda7822e2011-05-12 17:11:37 -07001636
1637 /* third times and later will not check if it is leaf */
1638 if ((tried_times + 1) > 2)
1639 rel_type = whole_subtree;
1640
1641 /*
1642 * Try to release leaf bridge's resources that doesn't fit resource of
1643 * child device under that bridge
1644 */
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001645 list_for_each_entry(fail_res, &fail_head, list)
1646 pci_bus_release_bridge_resources(fail_res->dev->bus,
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001647 fail_res->flags & type_mask,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001648 rel_type);
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001649
Yinghai Luda7822e2011-05-12 17:11:37 -07001650 /* restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001651 list_for_each_entry(fail_res, &fail_head, list) {
1652 struct resource *res = fail_res->res;
Yinghai Luda7822e2011-05-12 17:11:37 -07001653
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001654 res->start = fail_res->start;
1655 res->end = fail_res->end;
1656 res->flags = fail_res->flags;
1657 if (fail_res->dev->subordinate)
Yinghai Luda7822e2011-05-12 17:11:37 -07001658 res->flags = 0;
Yinghai Luda7822e2011-05-12 17:11:37 -07001659 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08001660 free_list(&fail_head);
Yinghai Luda7822e2011-05-12 17:11:37 -07001661
1662 goto again;
1663
Yinghai Lu928bea92013-07-22 14:37:17 -07001664dump:
Yinghai Lu76fbc262008-06-23 20:33:06 +02001665 /* dump the resource on buses */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001666 pci_bus_dump_resources(bus);
1667}
1668
1669void __init pci_assign_unassigned_resources(void)
1670{
1671 struct pci_bus *root_bus;
1672
1673 list_for_each_entry(root_bus, &pci_root_buses, node)
1674 pci_assign_unassigned_root_bus_resources(root_bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001675}
Yinghai Lu6841ec62010-01-22 01:02:25 -08001676
1677void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
1678{
1679 struct pci_bus *parent = bridge->subordinate;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001680 LIST_HEAD(add_list); /* list of resources that
Yinghai Lu8424d752012-01-21 02:08:21 -08001681 want additional resources */
Yinghai Lu32180e42010-01-22 01:02:27 -08001682 int tried_times = 0;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001683 LIST_HEAD(fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001684 struct pci_dev_resource *fail_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -08001685 int retval;
Yinghai Lu32180e42010-01-22 01:02:27 -08001686 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
Yinghai Lud61b0e82014-08-22 18:15:07 -07001687 IORESOURCE_PREFETCH | IORESOURCE_MEM_64;
Yinghai Lu6841ec62010-01-22 01:02:25 -08001688
Yinghai Lu32180e42010-01-22 01:02:27 -08001689again:
Yinghai Lu8424d752012-01-21 02:08:21 -08001690 __pci_bus_size_bridges(parent, &add_list);
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001691 __pci_bridge_assign_resources(bridge, &add_list, &fail_head);
1692 BUG_ON(!list_empty(&add_list));
Yinghai Lu32180e42010-01-22 01:02:27 -08001693 tried_times++;
1694
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001695 if (list_empty(&fail_head))
Yinghai Lu3f579c32010-05-21 14:35:06 -07001696 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08001697
1698 if (tried_times >= 2) {
1699 /* still fail, don't need to try more */
Yinghai Lubffc56d2012-01-21 02:08:30 -08001700 free_list(&fail_head);
Yinghai Lu3f579c32010-05-21 14:35:06 -07001701 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08001702 }
1703
1704 printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n",
1705 tried_times + 1);
1706
1707 /*
1708 * Try to release leaf bridge's resources that doesn't fit resource of
1709 * child device under that bridge
1710 */
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001711 list_for_each_entry(fail_res, &fail_head, list)
1712 pci_bus_release_bridge_resources(fail_res->dev->bus,
1713 fail_res->flags & type_mask,
Yinghai Lu32180e42010-01-22 01:02:27 -08001714 whole_subtree);
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001715
Yinghai Lu32180e42010-01-22 01:02:27 -08001716 /* restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001717 list_for_each_entry(fail_res, &fail_head, list) {
1718 struct resource *res = fail_res->res;
Yinghai Lu32180e42010-01-22 01:02:27 -08001719
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001720 res->start = fail_res->start;
1721 res->end = fail_res->end;
1722 res->flags = fail_res->flags;
1723 if (fail_res->dev->subordinate)
Yinghai Lu32180e42010-01-22 01:02:27 -08001724 res->flags = 0;
Yinghai Lu32180e42010-01-22 01:02:27 -08001725 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08001726 free_list(&fail_head);
Yinghai Lu32180e42010-01-22 01:02:27 -08001727
1728 goto again;
Yinghai Lu3f579c32010-05-21 14:35:06 -07001729
1730enable_all:
1731 retval = pci_reenable_device(bridge);
Bjorn Helgaas9fc9eea2013-04-12 11:35:40 -06001732 if (retval)
1733 dev_err(&bridge->dev, "Error reenabling bridge (%d)\n", retval);
Yinghai Lu3f579c32010-05-21 14:35:06 -07001734 pci_set_master(bridge);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001735}
1736EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);
Yinghai Lu9b030882012-01-21 02:08:23 -08001737
Yinghai Lu17787942012-10-30 14:31:10 -06001738void pci_assign_unassigned_bus_resources(struct pci_bus *bus)
Yinghai Lu9b030882012-01-21 02:08:23 -08001739{
Yinghai Lu9b030882012-01-21 02:08:23 -08001740 struct pci_dev *dev;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001741 LIST_HEAD(add_list); /* list of resources that
Yinghai Lu9b030882012-01-21 02:08:23 -08001742 want additional resources */
1743
Yinghai Lu9b030882012-01-21 02:08:23 -08001744 down_read(&pci_bus_sem);
1745 list_for_each_entry(dev, &bus->devices, bus_list)
Yijing Wang6788a512014-05-04 12:23:38 +08001746 if (pci_is_bridge(dev) && pci_has_subordinate(dev))
Yinghai Lu9b030882012-01-21 02:08:23 -08001747 __pci_bus_size_bridges(dev->subordinate,
1748 &add_list);
1749 up_read(&pci_bus_sem);
1750 __pci_bus_assign_resources(bus, &add_list, NULL);
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001751 BUG_ON(!list_empty(&add_list));
Yinghai Lu17787942012-10-30 14:31:10 -06001752}