David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 1 | # |
| 2 | # SPI driver configuration |
| 3 | # |
| 4 | # NOTE: the reason this doesn't show SPI slave support is mostly that |
| 5 | # nobody's needed a slave side API yet. The master-role API is not |
| 6 | # fully appropriate there, so it'd need some thought to do well. |
| 7 | # |
Alessandro Guido | 79d8c7a | 2008-04-28 02:14:16 -0700 | [diff] [blame] | 8 | menuconfig SPI |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 9 | bool "SPI support" |
Alessandro Guido | 79d8c7a | 2008-04-28 02:14:16 -0700 | [diff] [blame] | 10 | depends on HAS_IOMEM |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 11 | help |
| 12 | The "Serial Peripheral Interface" is a low level synchronous |
| 13 | protocol. Chips that support SPI can have data transfer rates |
| 14 | up to several tens of Mbit/sec. Chips are addressed with a |
| 15 | controller and a chipselect. Most SPI slaves don't support |
| 16 | dynamic device discovery; some are even write-only or read-only. |
| 17 | |
Matt LaPlante | 3cb2fcc | 2006-11-30 05:22:59 +0100 | [diff] [blame] | 18 | SPI is widely used by microcontrollers to talk with sensors, |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 19 | eeprom and flash memory, codecs and various other controller |
| 20 | chips, analog to digital (and d-to-a) converters, and more. |
| 21 | MMC and SD cards can be accessed using SPI protocol; and for |
| 22 | DataFlash cards used in MMC sockets, SPI must always be used. |
| 23 | |
| 24 | SPI is one of a family of similar protocols using a four wire |
| 25 | interface (select, clock, data in, data out) including Microwire |
| 26 | (half duplex), SSP, SSI, and PSP. This driver framework should |
| 27 | work with most such devices and controllers. |
| 28 | |
Alessandro Guido | 79d8c7a | 2008-04-28 02:14:16 -0700 | [diff] [blame] | 29 | if SPI |
| 30 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 31 | config SPI_DEBUG |
| 32 | boolean "Debug support for SPI drivers" |
Alessandro Guido | 79d8c7a | 2008-04-28 02:14:16 -0700 | [diff] [blame] | 33 | depends on DEBUG_KERNEL |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 34 | help |
| 35 | Say "yes" to enable debug messaging (like dev_dbg and pr_debug), |
| 36 | sysfs, and debugfs support in SPI controller and protocol drivers. |
| 37 | |
| 38 | # |
| 39 | # MASTER side ... talking to discrete SPI slave chips including microcontrollers |
| 40 | # |
| 41 | |
| 42 | config SPI_MASTER |
| 43 | # boolean "SPI Master Support" |
| 44 | boolean |
| 45 | default SPI |
| 46 | help |
| 47 | If your system has an master-capable SPI controller (which |
| 48 | provides the clock and chipselect), you can enable that |
| 49 | controller and the protocol drivers for the SPI slave chips |
| 50 | that are connected. |
| 51 | |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 52 | if SPI_MASTER |
| 53 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 54 | comment "SPI Master Controller Drivers" |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 55 | |
Thomas Chou | 0b78253 | 2011-02-14 10:10:43 +0800 | [diff] [blame] | 56 | config SPI_ALTERA |
| 57 | tristate "Altera SPI Controller" |
| 58 | select SPI_BITBANG |
| 59 | help |
| 60 | This is the driver for the Altera SPI Controller. |
| 61 | |
Gabor Juhos | 8efaef4 | 2011-01-04 21:28:22 +0100 | [diff] [blame] | 62 | config SPI_ATH79 |
| 63 | tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" |
Alexandre Courbot | 76ec9d1 | 2013-03-28 04:34:56 -0700 | [diff] [blame] | 64 | depends on ATH79 && GPIOLIB |
Gabor Juhos | 8efaef4 | 2011-01-04 21:28:22 +0100 | [diff] [blame] | 65 | select SPI_BITBANG |
| 66 | help |
| 67 | This enables support for the SPI controller present on the |
| 68 | Atheros AR71XX/AR724X/AR913X SoCs. |
| 69 | |
Haavard Skinnemoen | 754ce4f | 2007-02-14 00:33:09 -0800 | [diff] [blame] | 70 | config SPI_ATMEL |
| 71 | tristate "Atmel SPI Controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 72 | depends on (ARCH_AT91 || AVR32 || COMPILE_TEST) |
Haavard Skinnemoen | 754ce4f | 2007-02-14 00:33:09 -0800 | [diff] [blame] | 73 | help |
| 74 | This selects a driver for the Atmel SPI Controller, present on |
| 75 | many AT32 (AVR32) and AT91 (ARM) chips. |
| 76 | |
Chris Boot | f804387 | 2013-03-11 21:38:24 -0600 | [diff] [blame] | 77 | config SPI_BCM2835 |
| 78 | tristate "BCM2835 SPI controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 79 | depends on ARCH_BCM2835 || COMPILE_TEST |
Chris Boot | f804387 | 2013-03-11 21:38:24 -0600 | [diff] [blame] | 80 | help |
| 81 | This selects a driver for the Broadcom BCM2835 SPI master. |
| 82 | |
| 83 | The BCM2835 contains two types of SPI master controller; the |
| 84 | "universal SPI master", and the regular SPI controller. This driver |
| 85 | is for the regular SPI controller. Slave mode operation is not also |
| 86 | not supported. |
| 87 | |
Scott Jiang | 22ac3e8 | 2012-04-23 18:18:08 -0400 | [diff] [blame] | 88 | config SPI_BFIN5XX |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 89 | tristate "SPI controller driver for ADI Blackfin5xx" |
Scott Jiang | fa4bd4f | 2013-06-26 18:07:40 -0400 | [diff] [blame] | 90 | depends on BLACKFIN && !BF60x |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 91 | help |
| 92 | This is the SPI controller master driver for Blackfin 5xx processor. |
| 93 | |
Scott Jiang | fa4bd4f | 2013-06-26 18:07:40 -0400 | [diff] [blame] | 94 | config SPI_BFIN_V3 |
| 95 | tristate "SPI controller v3 for Blackfin" |
| 96 | depends on BF60x |
| 97 | help |
| 98 | This is the SPI controller v3 master driver |
| 99 | found on Blackfin 60x processor. |
| 100 | |
Cliff Cai | 9c3e737 | 2011-03-28 04:57:11 -0400 | [diff] [blame] | 101 | config SPI_BFIN_SPORT |
| 102 | tristate "SPI bus via Blackfin SPORT" |
| 103 | depends on BLACKFIN |
| 104 | help |
| 105 | Enable support for a SPI bus via the Blackfin SPORT peripheral. |
| 106 | |
Jan Nikitenko | 63bd235 | 2007-05-08 00:32:25 -0700 | [diff] [blame] | 107 | config SPI_AU1550 |
Manuel Lauss | 809f36c | 2011-11-01 20:03:30 +0100 | [diff] [blame] | 108 | tristate "Au1550/Au1200/Au1300 SPI Controller" |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 109 | depends on MIPS_ALCHEMY |
Jan Nikitenko | 63bd235 | 2007-05-08 00:32:25 -0700 | [diff] [blame] | 110 | select SPI_BITBANG |
| 111 | help |
| 112 | If you say yes to this option, support will be included for the |
Manuel Lauss | 809f36c | 2011-11-01 20:03:30 +0100 | [diff] [blame] | 113 | PSC SPI controller found on Au1550, Au1200 and Au1300 series. |
Jan Nikitenko | 63bd235 | 2007-05-08 00:32:25 -0700 | [diff] [blame] | 114 | |
Florian Fainelli | b42dfed | 2012-02-01 11:14:09 +0100 | [diff] [blame] | 115 | config SPI_BCM63XX |
| 116 | tristate "Broadcom BCM63xx SPI controller" |
| 117 | depends on BCM63XX |
| 118 | help |
| 119 | Enable support for the SPI controller on the Broadcom BCM63xx SoCs. |
| 120 | |
Jonas Gorski | 142168e | 2013-11-30 12:42:06 +0100 | [diff] [blame] | 121 | config SPI_BCM63XX_HSSPI |
| 122 | tristate "Broadcom BCM63XX HS SPI controller driver" |
| 123 | depends on BCM63XX || COMPILE_TEST |
| 124 | help |
| 125 | This enables support for the High Speed SPI controller present on |
| 126 | newer Broadcom BCM63XX SoCs. |
| 127 | |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 128 | config SPI_BITBANG |
David Brownell | d29389d | 2009-01-06 14:41:41 -0800 | [diff] [blame] | 129 | tristate "Utilities for Bitbanging SPI masters" |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 130 | help |
| 131 | With a few GPIO pins, your system can bitbang the SPI protocol. |
| 132 | Select this to get SPI support through I/O pins (GPIO, parallel |
| 133 | port, etc). Or, some systems' SPI master controller drivers use |
| 134 | this code to manage the per-word or per-transfer accesses to the |
| 135 | hardware shift registers. |
| 136 | |
| 137 | This is library code, and is automatically selected by drivers that |
| 138 | need it. You only need to select this explicitly to support driver |
| 139 | modules that aren't part of this kernel tree. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 140 | |
David Brownell | 7111763 | 2006-01-08 13:34:29 -0800 | [diff] [blame] | 141 | config SPI_BUTTERFLY |
| 142 | tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 143 | depends on PARPORT |
David Brownell | 7111763 | 2006-01-08 13:34:29 -0800 | [diff] [blame] | 144 | select SPI_BITBANG |
| 145 | help |
| 146 | This uses a custom parallel port cable to connect to an AVR |
| 147 | Butterfly <http://www.atmel.com/products/avr/butterfly>, an |
| 148 | inexpensive battery powered microcontroller evaluation board. |
| 149 | This same cable can be used to flash new firmware. |
| 150 | |
Alexander Shiyan | 161b96c | 2012-11-07 21:30:29 +0400 | [diff] [blame] | 151 | config SPI_CLPS711X |
| 152 | tristate "CLPS711X host SPI controller" |
Axel Lin | 5634dd8 | 2014-03-26 16:53:18 +0800 | [diff] [blame] | 153 | depends on ARCH_CLPS711X || COMPILE_TEST |
Alexander Shiyan | 161b96c | 2012-11-07 21:30:29 +0400 | [diff] [blame] | 154 | help |
| 155 | This enables dedicated general purpose SPI/Microwire1-compatible |
| 156 | master mode interface (SSI1) for CLPS711X-based CPUs. |
| 157 | |
Steven King | 34b8c66 | 2010-01-20 13:49:44 -0700 | [diff] [blame] | 158 | config SPI_COLDFIRE_QSPI |
| 159 | tristate "Freescale Coldfire QSPI controller" |
Steven King | bce4d12 | 2012-06-05 09:24:59 -0700 | [diff] [blame] | 160 | depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x) |
Steven King | 34b8c66 | 2010-01-20 13:49:44 -0700 | [diff] [blame] | 161 | help |
| 162 | This enables support for the Coldfire QSPI controller in master |
| 163 | mode. |
| 164 | |
Sandeep Paulraj | 358934a | 2009-12-16 22:02:18 +0000 | [diff] [blame] | 165 | config SPI_DAVINCI |
Sekhar Nori | 23ce17a | 2010-10-12 11:58:02 +0530 | [diff] [blame] | 166 | tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" |
Santosh Shilimkar | 7884891 | 2013-07-24 20:31:37 -0400 | [diff] [blame] | 167 | depends on ARCH_DAVINCI || ARCH_KEYSTONE |
Sandeep Paulraj | 358934a | 2009-12-16 22:02:18 +0000 | [diff] [blame] | 168 | select SPI_BITBANG |
| 169 | help |
Sekhar Nori | 23ce17a | 2010-10-12 11:58:02 +0530 | [diff] [blame] | 170 | SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. |
| 171 | |
Uwe Kleine-König | 86f8973 | 2013-08-08 16:09:50 +0200 | [diff] [blame] | 172 | config SPI_EFM32 |
| 173 | tristate "EFM32 SPI controller" |
| 174 | depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) |
| 175 | select SPI_BITBANG |
| 176 | help |
| 177 | Driver for the spi controller found on Energy Micro's EFM32 SoCs. |
| 178 | |
Mika Westerberg | 011f23a | 2010-05-06 04:47:04 +0000 | [diff] [blame] | 179 | config SPI_EP93XX |
| 180 | tristate "Cirrus Logic EP93xx SPI controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 181 | depends on ARCH_EP93XX || COMPILE_TEST |
Mika Westerberg | 011f23a | 2010-05-06 04:47:04 +0000 | [diff] [blame] | 182 | help |
| 183 | This enables using the Cirrus EP93xx SPI controller in master |
| 184 | mode. |
| 185 | |
Thomas Langer | 6cd3c7e | 2012-05-20 15:46:19 +0200 | [diff] [blame] | 186 | config SPI_FALCON |
| 187 | tristate "Falcon SPI controller support" |
| 188 | depends on SOC_FALCON |
| 189 | help |
| 190 | The external bus unit (EBU) found on the FALC-ON SoC has SPI |
| 191 | emulation that is designed for serial flash access. This driver |
| 192 | has only been tested with m25p80 type chips. The hardware has no |
| 193 | support for other types of SPI peripherals. |
| 194 | |
David Brownell | d29389d | 2009-01-06 14:41:41 -0800 | [diff] [blame] | 195 | config SPI_GPIO |
| 196 | tristate "GPIO-based bitbanging SPI Master" |
Alexandre Courbot | 76ec9d1 | 2013-03-28 04:34:56 -0700 | [diff] [blame] | 197 | depends on GPIOLIB |
David Brownell | d29389d | 2009-01-06 14:41:41 -0800 | [diff] [blame] | 198 | select SPI_BITBANG |
| 199 | help |
| 200 | This simple GPIO bitbanging SPI master uses the arch-neutral GPIO |
| 201 | interface to manage MOSI, MISO, SCK, and chipselect signals. SPI |
| 202 | slaves connected to a bus using this driver are configured as usual, |
| 203 | except that the spi_board_info.controller_data holds the GPIO number |
| 204 | for the chipselect used by this controller driver. |
| 205 | |
| 206 | Note that this driver often won't achieve even 1 Mbit/sec speeds, |
| 207 | making it unusually slow for SPI. If your platform can inline |
| 208 | GPIO operations, you should be able to leverage that for better |
| 209 | speed with a custom version of this driver; see the source code. |
| 210 | |
Sascha Hauer | b5f3294 | 2009-09-22 16:46:02 -0700 | [diff] [blame] | 211 | config SPI_IMX |
| 212 | tristate "Freescale i.MX SPI controllers" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 213 | depends on ARCH_MXC || COMPILE_TEST |
Sascha Hauer | b5f3294 | 2009-09-22 16:46:02 -0700 | [diff] [blame] | 214 | select SPI_BITBANG |
| 215 | help |
| 216 | This enables using the Freescale i.MX SPI controllers in master |
| 217 | mode. |
| 218 | |
Kaiwan N Billimoria | 78961a5 | 2007-07-17 04:04:05 -0700 | [diff] [blame] | 219 | config SPI_LM70_LLP |
| 220 | tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 221 | depends on PARPORT |
Kaiwan N Billimoria | 78961a5 | 2007-07-17 04:04:05 -0700 | [diff] [blame] | 222 | select SPI_BITBANG |
| 223 | help |
| 224 | This driver supports the NS LM70 LLP Evaluation Board, |
| 225 | which interfaces to an LM70 temperature sensor using |
| 226 | a parallel port. |
| 227 | |
Grant Likely | 42bbb70 | 2009-11-04 15:34:18 -0700 | [diff] [blame] | 228 | config SPI_MPC52xx |
| 229 | tristate "Freescale MPC52xx SPI (non-PSC) controller support" |
Paul Bolle | 7433f2b | 2011-11-13 22:52:40 +0100 | [diff] [blame] | 230 | depends on PPC_MPC52xx |
Grant Likely | 42bbb70 | 2009-11-04 15:34:18 -0700 | [diff] [blame] | 231 | help |
| 232 | This drivers supports the MPC52xx SPI controller in master SPI |
| 233 | mode. |
| 234 | |
Dragos Carp | 00b8fd2 | 2007-05-10 22:22:52 -0700 | [diff] [blame] | 235 | config SPI_MPC52xx_PSC |
| 236 | tristate "Freescale MPC52xx PSC SPI controller" |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 237 | depends on PPC_MPC52xx |
Dragos Carp | 00b8fd2 | 2007-05-10 22:22:52 -0700 | [diff] [blame] | 238 | help |
| 239 | This enables using the Freescale MPC52xx Programmable Serial |
| 240 | Controller in master SPI mode. |
| 241 | |
Anatolij Gustschin | 6e27388f1b | 2010-04-30 13:21:27 +0000 | [diff] [blame] | 242 | config SPI_MPC512x_PSC |
| 243 | tristate "Freescale MPC512x PSC SPI controller" |
Uwe Kleine-König | 5e8afa3 | 2012-02-23 10:37:55 +0100 | [diff] [blame] | 244 | depends on PPC_MPC512x |
Anatolij Gustschin | 6e27388f1b | 2010-04-30 13:21:27 +0000 | [diff] [blame] | 245 | help |
| 246 | This enables using the Freescale MPC5121 Programmable Serial |
| 247 | Controller in SPI master mode. |
| 248 | |
Mingkai Hu | b36ece8 | 2010-10-12 18:18:31 +0800 | [diff] [blame] | 249 | config SPI_FSL_LIB |
| 250 | tristate |
Andreas Larsson | e8beacb | 2013-02-15 16:52:21 +0100 | [diff] [blame] | 251 | depends on OF |
| 252 | |
| 253 | config SPI_FSL_CPM |
| 254 | tristate |
Mingkai Hu | b36ece8 | 2010-10-12 18:18:31 +0800 | [diff] [blame] | 255 | depends on FSL_SOC |
| 256 | |
Mingkai Hu | 3272029 | 2010-10-12 18:18:30 +0800 | [diff] [blame] | 257 | config SPI_FSL_SPI |
Andreas Larsson | 447b0c7 | 2013-02-15 16:52:26 +0100 | [diff] [blame] | 258 | bool "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller" |
Andreas Larsson | e8beacb | 2013-02-15 16:52:21 +0100 | [diff] [blame] | 259 | depends on OF |
Mingkai Hu | b36ece8 | 2010-10-12 18:18:31 +0800 | [diff] [blame] | 260 | select SPI_FSL_LIB |
Andreas Larsson | e8beacb | 2013-02-15 16:52:21 +0100 | [diff] [blame] | 261 | select SPI_FSL_CPM if FSL_SOC |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 262 | help |
Mingkai Hu | 3272029 | 2010-10-12 18:18:30 +0800 | [diff] [blame] | 263 | This enables using the Freescale SPI controllers in master mode. |
| 264 | MPC83xx platform uses the controller in cpu mode or CPM/QE mode. |
| 265 | MPC8569 uses the controller in QE mode, MPC8610 in cpu mode. |
Andreas Larsson | 447b0c7 | 2013-02-15 16:52:26 +0100 | [diff] [blame] | 266 | This also enables using the Aeroflex Gaisler GRLIB SPI controller in |
| 267 | master mode. |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 268 | |
Chao Fu | 349ad66 | 2013-08-16 11:08:55 +0800 | [diff] [blame] | 269 | config SPI_FSL_DSPI |
| 270 | tristate "Freescale DSPI controller" |
| 271 | select SPI_BITBANG |
Chao Fu | 1acbdeb | 2014-02-12 15:29:05 +0800 | [diff] [blame] | 272 | select REGMAP_MMIO |
Uwe Kleine-König | b444d1d | 2013-09-10 10:46:33 +0200 | [diff] [blame] | 273 | depends on SOC_VF610 || COMPILE_TEST |
Chao Fu | 349ad66 | 2013-08-16 11:08:55 +0800 | [diff] [blame] | 274 | help |
| 275 | This enables support for the Freescale DSPI controller in master |
| 276 | mode. VF610 platform uses the controller. |
| 277 | |
Mingkai Hu | 8b60d6c | 2010-10-12 18:18:32 +0800 | [diff] [blame] | 278 | config SPI_FSL_ESPI |
Jiri Slaby | d9ddcec | 2011-12-07 21:18:16 +0100 | [diff] [blame] | 279 | bool "Freescale eSPI controller" |
Mingkai Hu | 8b60d6c | 2010-10-12 18:18:32 +0800 | [diff] [blame] | 280 | depends on FSL_SOC |
| 281 | select SPI_FSL_LIB |
| 282 | help |
| 283 | This enables using the Freescale eSPI controllers in master mode. |
| 284 | From MPC8536, 85xx platform uses the controller, and all P10xx, |
| 285 | P20xx, P30xx,P40xx, P50xx uses this controller. |
| 286 | |
Thomas Chou | ce79258 | 2011-02-14 10:20:39 +0800 | [diff] [blame] | 287 | config SPI_OC_TINY |
| 288 | tristate "OpenCores tiny SPI" |
Alexandre Courbot | 76ec9d1 | 2013-03-28 04:34:56 -0700 | [diff] [blame] | 289 | depends on GPIOLIB |
Thomas Chou | ce79258 | 2011-02-14 10:20:39 +0800 | [diff] [blame] | 290 | select SPI_BITBANG |
| 291 | help |
| 292 | This is the driver for OpenCores tiny SPI master controller. |
| 293 | |
David Daney | 6b52c00 | 2012-08-22 12:25:07 -0700 | [diff] [blame] | 294 | config SPI_OCTEON |
| 295 | tristate "Cavium OCTEON SPI controller" |
David Daney | 9ddebc4 | 2013-05-22 15:10:46 +0000 | [diff] [blame] | 296 | depends on CAVIUM_OCTEON_SOC |
David Daney | 6b52c00 | 2012-08-22 12:25:07 -0700 | [diff] [blame] | 297 | help |
| 298 | SPI host driver for the hardware found on some Cavium OCTEON |
| 299 | SOCs. |
| 300 | |
David Brownell | fdb3c18 | 2007-02-12 00:52:37 -0800 | [diff] [blame] | 301 | config SPI_OMAP_UWIRE |
| 302 | tristate "OMAP1 MicroWire" |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 303 | depends on ARCH_OMAP1 |
David Brownell | fdb3c18 | 2007-02-12 00:52:37 -0800 | [diff] [blame] | 304 | select SPI_BITBANG |
| 305 | help |
| 306 | This hooks up to the MicroWire controller on OMAP1 chips. |
| 307 | |
Samuel Ortiz | ccdc7bf | 2007-07-17 04:04:13 -0700 | [diff] [blame] | 308 | config SPI_OMAP24XX |
Syed Rafiuddin | 8ebeb54 | 2010-05-14 12:05:25 -0700 | [diff] [blame] | 309 | tristate "McSPI driver for OMAP" |
Paul Bolle | f6ab395 | 2014-02-08 22:01:21 +0100 | [diff] [blame] | 310 | depends on ARM || ARM64 || AVR32 || HEXAGON || MIPS || SUPERH |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 311 | depends on ARCH_OMAP2PLUS || COMPILE_TEST |
Samuel Ortiz | ccdc7bf | 2007-07-17 04:04:13 -0700 | [diff] [blame] | 312 | help |
Syed Rafiuddin | 8ebeb54 | 2010-05-14 12:05:25 -0700 | [diff] [blame] | 313 | SPI master controller for OMAP24XX and later Multichannel SPI |
Samuel Ortiz | ccdc7bf | 2007-07-17 04:04:13 -0700 | [diff] [blame] | 314 | (McSPI) modules. |
Andrea Paterniani | 69c202a | 2007-02-12 00:52:39 -0800 | [diff] [blame] | 315 | |
Sourav Poddar | 505a149 | 2013-08-20 18:55:48 +0530 | [diff] [blame] | 316 | config SPI_TI_QSPI |
| 317 | tristate "DRA7xxx QSPI controller support" |
| 318 | depends on ARCH_OMAP2PLUS || COMPILE_TEST |
| 319 | help |
| 320 | QSPI master controller for DRA7xxx used for flash devices. |
| 321 | This device supports single, dual and quad read support, while |
| 322 | it only supports single write mode. |
| 323 | |
Cory Maccarrone | 35c9049 | 2009-12-13 01:02:11 -0700 | [diff] [blame] | 324 | config SPI_OMAP_100K |
| 325 | tristate "OMAP SPI 100K" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 326 | depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST |
Cory Maccarrone | 35c9049 | 2009-12-13 01:02:11 -0700 | [diff] [blame] | 327 | help |
| 328 | OMAP SPI 100K master controller for omap7xx boards. |
| 329 | |
Shadi Ammouri | 60cadec | 2008-08-05 13:01:09 -0700 | [diff] [blame] | 330 | config SPI_ORION |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 331 | tristate "Orion SPI master" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 332 | depends on PLAT_ORION || COMPILE_TEST |
Shadi Ammouri | 60cadec | 2008-08-05 13:01:09 -0700 | [diff] [blame] | 333 | help |
| 334 | This enables using the SPI master controller on the Orion chips. |
| 335 | |
Linus Walleij | b43d65f | 2009-06-09 08:11:42 +0100 | [diff] [blame] | 336 | config SPI_PL022 |
Linus Walleij | 7f9a4b9 | 2011-05-19 14:13:19 +0200 | [diff] [blame] | 337 | tristate "ARM AMBA PL022 SSP controller" |
| 338 | depends on ARM_AMBA |
Linus Walleij | b43d65f | 2009-06-09 08:11:42 +0100 | [diff] [blame] | 339 | default y if MACH_U300 |
linus.walleij@stericsson.com | f33b29e | 2009-09-22 16:46:01 -0700 | [diff] [blame] | 340 | default y if ARCH_REALVIEW |
| 341 | default y if INTEGRATOR_IMPD1 |
| 342 | default y if ARCH_VERSATILE |
Linus Walleij | b43d65f | 2009-06-09 08:11:42 +0100 | [diff] [blame] | 343 | help |
| 344 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP |
| 345 | controller. If you have an embedded system with an AMBA(R) |
| 346 | bus and a PL022 controller, say Y or M here. |
| 347 | |
Steven A. Falco | 44dab88 | 2009-09-22 16:45:58 -0700 | [diff] [blame] | 348 | config SPI_PPC4xx |
| 349 | tristate "PPC4xx SPI Controller" |
Uwe Kleine-König | 5e8afa3 | 2012-02-23 10:37:55 +0100 | [diff] [blame] | 350 | depends on PPC32 && 4xx |
Steven A. Falco | 44dab88 | 2009-09-22 16:45:58 -0700 | [diff] [blame] | 351 | select SPI_BITBANG |
| 352 | help |
| 353 | This selects a driver for the PPC4xx SPI Controller. |
| 354 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 355 | config SPI_PXA2XX_PXADMA |
| 356 | bool "PXA2xx SSP legacy PXA DMA API support" |
| 357 | depends on SPI_PXA2XX && ARCH_PXA |
| 358 | help |
Mika Westerberg | 5928808 | 2013-01-22 12:26:29 +0200 | [diff] [blame] | 359 | Enable PXA private legacy DMA API support. Note that this is |
| 360 | deprecated in favor of generic DMA engine API. |
| 361 | |
| 362 | config SPI_PXA2XX_DMA |
| 363 | def_bool y |
| 364 | depends on SPI_PXA2XX && !SPI_PXA2XX_PXADMA |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 365 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 366 | config SPI_PXA2XX |
| 367 | tristate "PXA2xx SSP SPI master" |
Martin Schwidefsky | 0244ad0 | 2013-08-30 09:39:53 +0200 | [diff] [blame] | 368 | depends on (ARCH_PXA || PCI || ACPI) |
Sebastian Andrzej Siewior | d6ea3df | 2010-11-24 10:17:14 +0100 | [diff] [blame] | 369 | select PXA_SSP if ARCH_PXA |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 370 | help |
Sebastian Andrzej Siewior | d6ea3df | 2010-11-24 10:17:14 +0100 | [diff] [blame] | 371 | This enables using a PXA2xx or Sodaville SSP port as a SPI master |
| 372 | controller. The driver can be configured to use any SSP port and |
| 373 | additional documentation can be found a Documentation/spi/pxa2xx. |
| 374 | |
| 375 | config SPI_PXA2XX_PCI |
Mika Westerberg | 2b49ebd | 2013-01-22 12:26:24 +0200 | [diff] [blame] | 376 | def_tristate SPI_PXA2XX && PCI |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 377 | |
Shimoda, Yoshihiro | 0b2182d | 2012-03-07 14:46:25 +0900 | [diff] [blame] | 378 | config SPI_RSPI |
Geert Uytterhoeven | e290c34 | 2014-01-21 16:10:09 +0100 | [diff] [blame] | 379 | tristate "Renesas RSPI/QSPI controller" |
Geert Uytterhoeven | e2e5ed7 | 2014-01-12 11:32:44 +0100 | [diff] [blame] | 380 | depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE |
Shimoda, Yoshihiro | 0b2182d | 2012-03-07 14:46:25 +0900 | [diff] [blame] | 381 | help |
Geert Uytterhoeven | e290c34 | 2014-01-21 16:10:09 +0100 | [diff] [blame] | 382 | SPI driver for Renesas RSPI and QSPI blocks. |
Shimoda, Yoshihiro | 0b2182d | 2012-03-07 14:46:25 +0900 | [diff] [blame] | 383 | |
Ivan T. Ivanov | 64ff247 | 2014-02-13 18:21:38 +0200 | [diff] [blame] | 384 | config SPI_QUP |
| 385 | tristate "Qualcomm SPI controller with QUP interface" |
Axel Lin | 80faf90 | 2014-02-24 12:07:51 +0800 | [diff] [blame] | 386 | depends on ARCH_MSM_DT || (ARM && COMPILE_TEST) |
Ivan T. Ivanov | 64ff247 | 2014-02-13 18:21:38 +0200 | [diff] [blame] | 387 | help |
| 388 | Qualcomm Universal Peripheral (QUP) core is an AHB slave that |
| 389 | provides a common data path (an output FIFO and an input FIFO) |
| 390 | for serial peripheral interface (SPI) mini-core. SPI in master |
| 391 | mode supports up to 50MHz, up to four chip selects, programmable |
| 392 | data path from 4 bits to 32 bits and numerous protocol variants. |
| 393 | |
| 394 | This driver can also be built as a module. If so, the module |
| 395 | will be called spi_qup. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 396 | |
David Brownell | 85abfaa | 2007-02-12 00:52:36 -0800 | [diff] [blame] | 397 | config SPI_S3C24XX |
| 398 | tristate "Samsung S3C24XX series SPI" |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 399 | depends on ARCH_S3C24XX |
David Brownell | da0abc2 | 2007-07-17 04:04:09 -0700 | [diff] [blame] | 400 | select SPI_BITBANG |
David Brownell | 85abfaa | 2007-02-12 00:52:36 -0800 | [diff] [blame] | 401 | help |
| 402 | SPI driver for Samsung S3C24XX series ARM SoCs |
| 403 | |
Ben Dooks | bec0806 | 2009-12-14 22:20:24 -0800 | [diff] [blame] | 404 | config SPI_S3C24XX_FIQ |
| 405 | bool "S3C24XX driver with FIQ pseudo-DMA" |
| 406 | depends on SPI_S3C24XX |
| 407 | select FIQ |
| 408 | help |
| 409 | Enable FIQ support for the S3C24XX SPI driver to provide pseudo |
| 410 | DMA by using the fast-interrupt request framework, This allows |
| 411 | the driver to get DMA-like performance when there are either |
| 412 | no free DMA channels, or when doing transfers that required both |
| 413 | TX and RX data paths. |
| 414 | |
Jassi Brar | 230d42d | 2009-11-30 07:39:42 +0000 | [diff] [blame] | 415 | config SPI_S3C64XX |
| 416 | tristate "Samsung S3C64XX series type SPI" |
Mateusz Krawczuk | 7d5f880 | 2013-09-24 18:07:46 +0200 | [diff] [blame] | 417 | depends on PLAT_SAMSUNG |
Tomasz Figa | 3faecea | 2013-10-16 21:10:58 +0200 | [diff] [blame] | 418 | select S3C64XX_PL080 if ARCH_S3C64XX |
Jassi Brar | 230d42d | 2009-11-30 07:39:42 +0000 | [diff] [blame] | 419 | help |
| 420 | SPI driver for Samsung S3C64XX and newer SoCs. |
| 421 | |
Guenter Roeck | 3ce8859 | 2012-08-18 09:06:27 -0700 | [diff] [blame] | 422 | config SPI_SC18IS602 |
| 423 | tristate "NXP SC18IS602/602B/603 I2C to SPI bridge" |
| 424 | depends on I2C |
| 425 | help |
| 426 | SPI driver for NXP SC18IS602/602B/603 I2C to SPI bridge. |
| 427 | |
Magnus Damm | 8051eff | 2009-11-26 11:10:05 +0000 | [diff] [blame] | 428 | config SPI_SH_MSIOF |
| 429 | tristate "SuperH MSIOF SPI controller" |
Laurent Pinchart | 7ad3544 | 2013-11-27 02:18:36 +0100 | [diff] [blame] | 430 | depends on HAVE_CLK |
| 431 | depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST |
Magnus Damm | 8051eff | 2009-11-26 11:10:05 +0000 | [diff] [blame] | 432 | help |
Bastian Hecht | 746aeff | 2012-11-07 12:40:05 +0100 | [diff] [blame] | 433 | SPI driver for SuperH and SH Mobile MSIOF blocks. |
Magnus Damm | 8051eff | 2009-11-26 11:10:05 +0000 | [diff] [blame] | 434 | |
Yoshihiro Shimoda | 5c05dd0 | 2011-02-15 10:30:32 +0900 | [diff] [blame] | 435 | config SPI_SH |
| 436 | tristate "SuperH SPI controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 437 | depends on SUPERH || COMPILE_TEST |
Yoshihiro Shimoda | 5c05dd0 | 2011-02-15 10:30:32 +0900 | [diff] [blame] | 438 | help |
| 439 | SPI driver for SuperH SPI blocks. |
| 440 | |
Magnus Damm | 37e4664 | 2008-02-06 01:38:15 -0800 | [diff] [blame] | 441 | config SPI_SH_SCI |
| 442 | tristate "SuperH SCI SPI controller" |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 443 | depends on SUPERH |
Magnus Damm | 37e4664 | 2008-02-06 01:38:15 -0800 | [diff] [blame] | 444 | select SPI_BITBANG |
| 445 | help |
| 446 | SPI driver for SuperH SCI blocks. |
| 447 | |
Kuninori Morimoto | d1c8bbd | 2012-03-01 17:10:17 -0800 | [diff] [blame] | 448 | config SPI_SH_HSPI |
| 449 | tristate "SuperH HSPI controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 450 | depends on ARCH_SHMOBILE || COMPILE_TEST |
Kuninori Morimoto | d1c8bbd | 2012-03-01 17:10:17 -0800 | [diff] [blame] | 451 | help |
| 452 | SPI driver for SuperH HSPI blocks. |
| 453 | |
Zhiwu Song | 1cc2df9 | 2012-02-13 17:45:38 +0800 | [diff] [blame] | 454 | config SPI_SIRF |
| 455 | tristate "CSR SiRFprimaII SPI controller" |
Mark Brown | 7668c29 | 2013-08-06 11:37:32 +0100 | [diff] [blame] | 456 | depends on SIRF_DMA |
Zhiwu Song | 1cc2df9 | 2012-02-13 17:45:38 +0800 | [diff] [blame] | 457 | select SPI_BITBANG |
| 458 | help |
| 459 | SPI driver for CSR SiRFprimaII SoCs |
| 460 | |
Maxime Ripard | b5f6517 | 2014-02-22 22:35:53 +0100 | [diff] [blame] | 461 | config SPI_SUN4I |
| 462 | tristate "Allwinner A10 SoCs SPI controller" |
| 463 | depends on ARCH_SUNXI || COMPILE_TEST |
| 464 | help |
| 465 | SPI driver for Allwinner sun4i, sun5i and sun7i SoCs |
| 466 | |
Maxime Ripard | 3558fe9 | 2014-02-05 14:05:05 +0100 | [diff] [blame] | 467 | config SPI_SUN6I |
| 468 | tristate "Allwinner A31 SPI controller" |
| 469 | depends on ARCH_SUNXI || COMPILE_TEST |
Mark Brown | 7961656 | 2014-02-06 10:53:51 +0000 | [diff] [blame] | 470 | depends on RESET_CONTROLLER |
Maxime Ripard | 3558fe9 | 2014-02-05 14:05:05 +0100 | [diff] [blame] | 471 | help |
| 472 | This enables using the SPI controller on the Allwinner A31 SoCs. |
| 473 | |
Marek Vasut | 646781d | 2012-08-03 17:26:11 +0200 | [diff] [blame] | 474 | config SPI_MXS |
| 475 | tristate "Freescale MXS SPI controller" |
| 476 | depends on ARCH_MXS |
| 477 | select STMP_DEVICE |
| 478 | help |
| 479 | SPI driver for Freescale MXS devices. |
| 480 | |
Laxman Dewangan | f333a33 | 2013-02-22 18:07:39 +0530 | [diff] [blame] | 481 | config SPI_TEGRA114 |
| 482 | tristate "NVIDIA Tegra114 SPI Controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 483 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
Stephen Warren | ff2251e | 2013-11-06 16:31:24 -0700 | [diff] [blame] | 484 | depends on RESET_CONTROLLER |
Laxman Dewangan | f333a33 | 2013-02-22 18:07:39 +0530 | [diff] [blame] | 485 | help |
| 486 | SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller |
| 487 | is different than the older SoCs SPI controller and also register interface |
| 488 | get changed with this controller. |
| 489 | |
Laxman Dewangan | 8528547 | 2012-11-14 05:54:47 +0530 | [diff] [blame] | 490 | config SPI_TEGRA20_SFLASH |
| 491 | tristate "Nvidia Tegra20 Serial flash Controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 492 | depends on ARCH_TEGRA || COMPILE_TEST |
Stephen Warren | ff2251e | 2013-11-06 16:31:24 -0700 | [diff] [blame] | 493 | depends on RESET_CONTROLLER |
Laxman Dewangan | 8528547 | 2012-11-14 05:54:47 +0530 | [diff] [blame] | 494 | help |
| 495 | SPI driver for Nvidia Tegra20 Serial flash Controller interface. |
| 496 | The main usecase of this controller is to use spi flash as boot |
| 497 | device. |
| 498 | |
Laxman Dewangan | dc4dc36 | 2012-10-30 12:34:05 +0530 | [diff] [blame] | 499 | config SPI_TEGRA20_SLINK |
| 500 | tristate "Nvidia Tegra20/Tegra30 SLINK Controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 501 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
Stephen Warren | ff2251e | 2013-11-06 16:31:24 -0700 | [diff] [blame] | 502 | depends on RESET_CONTROLLER |
Laxman Dewangan | dc4dc36 | 2012-10-30 12:34:05 +0530 | [diff] [blame] | 503 | help |
| 504 | SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface. |
| 505 | |
Masayuki Ohtake | e8b17b5 | 2010-10-08 12:44:49 -0600 | [diff] [blame] | 506 | config SPI_TOPCLIFF_PCH |
Tomoya MORINAGA | 92b3a5c | 2011-10-28 09:35:21 +0900 | [diff] [blame] | 507 | tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI" |
Masayuki Ohtake | e8b17b5 | 2010-10-08 12:44:49 -0600 | [diff] [blame] | 508 | depends on PCI |
| 509 | help |
Grant Likely | cdbc8f0 | 2010-10-08 12:56:13 -0600 | [diff] [blame] | 510 | SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus |
| 511 | used in some x86 embedded processors. |
Masayuki Ohtake | e8b17b5 | 2010-10-08 12:44:49 -0600 | [diff] [blame] | 512 | |
Tomoya MORINAGA | 92b3a5c | 2011-10-28 09:35:21 +0900 | [diff] [blame] | 513 | This driver also supports the ML7213/ML7223/ML7831, a companion chip |
| 514 | for the Atom E6xx series and compatible with the Intel EG20T PCH. |
Tomoya MORINAGA | f016aeb | 2011-06-07 14:50:10 +0900 | [diff] [blame] | 515 | |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 516 | config SPI_TXX9 |
| 517 | tristate "Toshiba TXx9 SPI controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 518 | depends on GPIOLIB && (CPU_TX49XX || COMPILE_TEST) |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 519 | help |
| 520 | SPI driver for Toshiba TXx9 MIPS SoCs |
| 521 | |
Lars-Peter Clausen | b316590 | 2012-07-19 18:44:07 +0200 | [diff] [blame] | 522 | config SPI_XCOMM |
| 523 | tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver" |
| 524 | depends on I2C |
| 525 | help |
| 526 | Support for the SPI-I2C bridge found on the Analog Devices |
| 527 | AD-FMCOMMS1-EBZ board. |
| 528 | |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 529 | config SPI_XILINX |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 530 | tristate "Xilinx SPI controller common module" |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 531 | depends on HAS_IOMEM |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 532 | select SPI_BITBANG |
| 533 | help |
| 534 | This exposes the SPI controller IP from the Xilinx EDK. |
| 535 | |
| 536 | See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" |
| 537 | Product Specification document (DS464) for hardware details. |
| 538 | |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 539 | Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" |
| 540 | |
Max Filippov | 6840cc2 | 2014-03-12 21:55:24 +0400 | [diff] [blame] | 541 | config SPI_XTENSA_XTFPGA |
| 542 | tristate "Xtensa SPI controller for xtfpga" |
Axel Lin | be8dde46 | 2014-03-20 18:08:04 +0800 | [diff] [blame] | 543 | depends on (XTENSA && XTENSA_PLATFORM_XTFPGA) || COMPILE_TEST |
Max Filippov | 6840cc2 | 2014-03-12 21:55:24 +0400 | [diff] [blame] | 544 | select SPI_BITBANG |
| 545 | help |
| 546 | SPI driver for xtfpga SPI master controller. |
| 547 | |
| 548 | This simple SPI master controller is built into xtfpga bitstreams |
| 549 | and is used to control daughterboard audio codec. It always transfers |
| 550 | 16 bit words in SPI mode 0, automatically asserting CS on transfer |
| 551 | start and deasserting on end. |
| 552 | |
| 553 | |
Wan ZongShun | 30eaed0 | 2009-12-01 14:29:20 +0000 | [diff] [blame] | 554 | config SPI_NUC900 |
| 555 | tristate "Nuvoton NUC900 series SPI" |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 556 | depends on ARCH_W90X900 |
Wan ZongShun | 30eaed0 | 2009-12-01 14:29:20 +0000 | [diff] [blame] | 557 | select SPI_BITBANG |
| 558 | help |
| 559 | SPI driver for Nuvoton NUC900 series ARM SoCs |
| 560 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 561 | # |
| 562 | # Add new SPI master controllers in alphabetical order above this line |
| 563 | # |
| 564 | |
Feng Tang | e24c745 | 2009-12-14 14:20:22 -0800 | [diff] [blame] | 565 | config SPI_DESIGNWARE |
Jean-Hugues Deschenes | 8ca8d15 | 2010-01-21 09:55:54 -0700 | [diff] [blame] | 566 | tristate "DesignWare SPI controller core support" |
Feng Tang | e24c745 | 2009-12-14 14:20:22 -0800 | [diff] [blame] | 567 | help |
| 568 | general driver for SPI controller core from DesignWare |
| 569 | |
| 570 | config SPI_DW_PCI |
| 571 | tristate "PCI interface driver for DW SPI core" |
| 572 | depends on SPI_DESIGNWARE && PCI |
| 573 | |
Feng Tang | 7063c0d | 2010-12-24 13:59:11 +0800 | [diff] [blame] | 574 | config SPI_DW_MID_DMA |
| 575 | bool "DMA support for DW SPI controller on Intel Moorestown platform" |
| 576 | depends on SPI_DW_PCI && INTEL_MID_DMAC |
| 577 | |
Jean-Hugues Deschenes | f7b6fd6 | 2010-01-21 07:46:42 -0700 | [diff] [blame] | 578 | config SPI_DW_MMIO |
| 579 | tristate "Memory-mapped io interface driver for DW SPI core" |
Baruch Siach | 794f61a | 2014-01-31 12:07:48 +0200 | [diff] [blame] | 580 | depends on SPI_DESIGNWARE |
Jean-Hugues Deschenes | f7b6fd6 | 2010-01-21 07:46:42 -0700 | [diff] [blame] | 581 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 582 | # |
| 583 | # There are lots of SPI device types, with sensors and memory |
| 584 | # being probably the most widely used ones. |
| 585 | # |
| 586 | comment "SPI Protocol Masters" |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 587 | |
Andrea Paterniani | 814a8d5 | 2007-05-08 00:32:15 -0700 | [diff] [blame] | 588 | config SPI_SPIDEV |
| 589 | tristate "User mode SPI device driver support" |
Andrea Paterniani | 814a8d5 | 2007-05-08 00:32:15 -0700 | [diff] [blame] | 590 | help |
| 591 | This supports user mode SPI protocol drivers. |
| 592 | |
| 593 | Note that this application programming interface is EXPERIMENTAL |
| 594 | and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes. |
| 595 | |
Ben Dooks | 447aef1 | 2007-07-17 04:04:10 -0700 | [diff] [blame] | 596 | config SPI_TLE62X0 |
| 597 | tristate "Infineon TLE62X0 (for power switching)" |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 598 | depends on SYSFS |
Ben Dooks | 447aef1 | 2007-07-17 04:04:10 -0700 | [diff] [blame] | 599 | help |
| 600 | SPI driver for Infineon TLE62X0 series line driver chips, |
| 601 | such as the TLE6220, TLE6230 and TLE6240. This provides a |
| 602 | sysfs interface, with each line presented as a kind of GPIO |
| 603 | exposing both switch control and diagnostic feedback. |
| 604 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 605 | # |
| 606 | # Add new SPI protocol masters in alphabetical order above this line |
| 607 | # |
| 608 | |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 609 | endif # SPI_MASTER |
| 610 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 611 | # (slave support would go here) |
| 612 | |
Alessandro Guido | 79d8c7a | 2008-04-28 02:14:16 -0700 | [diff] [blame] | 613 | endif # SPI |