blob: 1fbd8a29fdc8f0648f1d9e9f443a31ec8fd490b6 [file] [log] [blame]
Banajit Goswamib016de92017-02-15 21:02:30 -08001/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
Kyle Yan679cbee2016-07-27 16:55:20 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&soc {
Channagoud Kadabieb7f0112017-04-03 20:39:27 -070014 tlmm: pinctrl@03400000 {
Kyle Yan6a20fae2017-02-14 13:34:41 -080015 compatible = "qcom,sdm845-pinctrl";
Channagoud Kadabieb7f0112017-04-03 20:39:27 -070016 reg = <0x03400000 0xc00000>;
Kyle Yan679cbee2016-07-27 16:55:20 -070017 interrupts = <0 208 0>;
18 gpio-controller;
19 #gpio-cells = <2>;
20 interrupt-controller;
21 #interrupt-cells = <2>;
Archana Sathyakumar00a36ab2017-03-03 14:38:26 -070022 interrupt-parent = <&pdc>;
Banajit Goswamib016de92017-02-15 21:02:30 -080023
Subhash Jadavaniafe2a792017-03-31 21:08:29 -070024 ufs_dev_reset_assert: ufs_dev_reset_assert {
25 config {
26 pins = "ufs_reset";
27 bias-pull-down; /* default: pull down */
28 /*
29 * UFS_RESET driver strengths are having
30 * different values/steps compared to typical
31 * GPIO drive strengths.
32 *
33 * Following table clarifies:
34 *
35 * HDRV value | UFS_RESET | Typical GPIO
36 * (dec) | (mA) | (mA)
37 * 0 | 0.8 | 2
38 * 1 | 1.55 | 4
39 * 2 | 2.35 | 6
40 * 3 | 3.1 | 8
41 * 4 | 3.9 | 10
42 * 5 | 4.65 | 12
43 * 6 | 5.4 | 14
44 * 7 | 6.15 | 16
45 *
46 * POR value for UFS_RESET HDRV is 3 which means
47 * 3.1mA and we want to use that. Hence just
48 * specify 8mA to "drive-strength" binding and
49 * that should result into writing 3 to HDRV
50 * field.
51 */
52 drive-strength = <8>; /* default: 3.1 mA */
53 output-low; /* active low reset */
54 };
55 };
56
57 ufs_dev_reset_deassert: ufs_dev_reset_deassert {
58 config {
59 pins = "ufs_reset";
60 bias-pull-down; /* default: pull down */
61 /*
62 * default: 3.1 mA
63 * check comments under ufs_dev_reset_assert
64 */
65 drive-strength = <8>;
66 output-high; /* active low reset */
67 };
68 };
69
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070070 flash_led3_front {
71 flash_led3_front_en: flash_led3_front_en {
72 mux {
73 pins = "gpio21";
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070074 function = "gpio";
75 };
76
77 config {
78 pins = "gpio21";
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070079 drive_strength = <2>;
80 output-high;
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070081 bias-disable;
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070082 };
83 };
84
85 flash_led3_front_dis: flash_led3_front_dis {
86 mux {
87 pins = "gpio21";
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070088 function = "gpio";
89 };
90
91 config {
92 pins = "gpio21";
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070093 drive_strength = <2>;
94 output-low;
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070095 bias-disable;
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070096 };
97 };
98 };
Subhash Jadavaniafe2a792017-03-31 21:08:29 -070099
Banajit Goswamib016de92017-02-15 21:02:30 -0800100 wcd9xxx_intr {
101 wcd_intr_default: wcd_intr_default{
102 mux {
103 pins = "gpio54";
104 function = "gpio";
105 };
106
107 config {
108 pins = "gpio54";
109 drive-strength = <2>; /* 2 mA */
110 bias-pull-down; /* pull down */
111 input-enable;
112 };
113 };
114 };
115
Subhash Jadavanidd416c42017-05-15 11:54:10 -0700116 storage_cd: storage_cd {
117 mux {
118 pins = "gpio126";
119 function = "gpio";
120 };
121
122 config {
123 pins = "gpio126";
124 bias-pull-up; /* pull up */
125 drive-strength = <2>; /* 2 MA */
126 };
127 };
128
Xiaonian Wang898e0902017-04-08 06:46:29 +0800129 sdc2_clk_on: sdc2_clk_on {
130 config {
131 pins = "sdc2_clk";
132 bias-disable; /* NO pull */
133 drive-strength = <16>; /* 16 MA */
134 };
135 };
136
137 sdc2_clk_off: sdc2_clk_off {
138 config {
139 pins = "sdc2_clk";
140 bias-disable; /* NO pull */
141 drive-strength = <2>; /* 2 MA */
142 };
143 };
144
145 sdc2_cmd_on: sdc2_cmd_on {
146 config {
147 pins = "sdc2_cmd";
148 bias-pull-up; /* pull up */
149 drive-strength = <10>; /* 10 MA */
150 };
151 };
152
153 sdc2_cmd_off: sdc2_cmd_off {
154 config {
155 pins = "sdc2_cmd";
156 bias-pull-up; /* pull up */
157 drive-strength = <2>; /* 2 MA */
158 };
159 };
160
161 sdc2_data_on: sdc2_data_on {
162 config {
163 pins = "sdc2_data";
164 bias-pull-up; /* pull up */
165 drive-strength = <10>; /* 10 MA */
166 };
167 };
168
169 sdc2_data_off: sdc2_data_off {
170 config {
171 pins = "sdc2_data";
172 bias-pull-up; /* pull up */
173 drive-strength = <2>; /* 2 MA */
174 };
175 };
176
Tony Truongc0e0a5f02017-03-15 11:57:40 -0700177 pcie0 {
178 pcie0_clkreq_default: pcie0_clkreq_default {
179 mux {
180 pins = "gpio36";
181 function = "pci_e0";
182 };
183
184 config {
185 pins = "gpio36";
186 drive-strength = <2>;
187 bias-pull-up;
188 };
189 };
190
191 pcie0_perst_default: pcie0_perst_default {
192 mux {
193 pins = "gpio35";
194 function = "gpio";
195 };
196
197 config {
198 pins = "gpio35";
199 drive-strength = <2>;
200 bias-pull-down;
201 };
202 };
203
204 pcie0_wake_default: pcie0_wake_default {
205 mux {
206 pins = "gpio37";
207 function = "gpio";
208 };
209
210 config {
211 pins = "gpio37";
212 drive-strength = <2>;
213 bias-pull-down;
214 };
215 };
216 };
217
Banajit Goswamib016de92017-02-15 21:02:30 -0800218 cdc_reset_ctrl {
219 cdc_reset_sleep: cdc_reset_sleep {
220 mux {
221 pins = "gpio64";
222 function = "gpio";
223 };
224 config {
225 pins = "gpio64";
226 drive-strength = <2>;
227 bias-disable;
228 output-low;
229 };
230 };
231
232 cdc_reset_active:cdc_reset_active {
233 mux {
234 pins = "gpio64";
235 function = "gpio";
236 };
237 config {
238 pins = "gpio64";
239 drive-strength = <8>;
240 bias-pull-down;
241 output-high;
242 };
243 };
244 };
245
246 spkr_i2s_clk_pin {
247 spkr_i2s_clk_sleep: spkr_i2s_clk_sleep {
248 mux {
249 pins = "gpio69";
250 function = "spkr_i2s";
251 };
252
253 config {
254 pins = "gpio69";
255 drive-strength = <2>; /* 2 mA */
256 bias-pull-down; /* PULL DOWN */
257 };
258 };
259
260 spkr_i2s_clk_active: spkr_i2s_clk_active {
261 mux {
262 pins = "gpio69";
263 function = "spkr_i2s";
264 };
265
266 config {
267 pins = "gpio69";
268 drive-strength = <8>; /* 8 mA */
269 bias-disable; /* NO PULL */
270 };
271 };
272 };
273
274 wcd_gnd_mic_swap {
275 wcd_gnd_mic_swap_idle: wcd_gnd_mic_swap_idle {
276 mux {
277 pins = "gpio51";
278 function = "gpio";
279 };
280 config {
281 pins = "gpio51";
282 drive-strength = <2>;
283 bias-pull-down;
284 output-low;
285 };
286 };
287
288 wcd_gnd_mic_swap_active: wcd_gnd_mic_swap_active {
289 mux {
290 pins = "gpio51";
291 function = "gpio";
292 };
293 config {
294 pins = "gpio51";
295 drive-strength = <2>;
296 bias-disable;
297 output-high;
298 };
299 };
300 };
301
302 pri_aux_pcm_clk {
303 pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep {
304 mux {
305 pins = "gpio65";
306 function = "gpio";
307 };
308
309 config {
310 pins = "gpio65";
311 drive-strength = <2>; /* 2 mA */
312 bias-pull-down; /* PULL DOWN */
313 input-enable;
314 };
315 };
316
317 pri_aux_pcm_clk_active: pri_aux_pcm_clk_active {
318 mux {
319 pins = "gpio65";
320 function = "pri_mi2s";
321 };
322
323 config {
324 pins = "gpio65";
325 drive-strength = <8>; /* 8 mA */
326 bias-disable; /* NO PULL */
327 output-high;
328 };
329 };
330 };
331
332 pri_aux_pcm_sync {
333 pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep {
334 mux {
335 pins = "gpio66";
336 function = "gpio";
337 };
338
339 config {
340 pins = "gpio66";
341 drive-strength = <2>; /* 2 mA */
342 bias-pull-down; /* PULL DOWN */
343 input-enable;
344 };
345 };
346
347 pri_aux_pcm_sync_active: pri_aux_pcm_sync_active {
348 mux {
349 pins = "gpio66";
350 function = "pri_mi2s_ws";
351 };
352
353 config {
354 pins = "gpio66";
355 drive-strength = <8>; /* 8 mA */
356 bias-disable; /* NO PULL */
357 output-high;
358 };
359 };
360 };
361
362 pri_aux_pcm_din {
363 pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep {
364 mux {
365 pins = "gpio67";
366 function = "gpio";
367 };
368
369 config {
370 pins = "gpio67";
371 drive-strength = <2>; /* 2 mA */
372 bias-pull-down; /* PULL DOWN */
373 input-enable;
374 };
375 };
376
377 pri_aux_pcm_din_active: pri_aux_pcm_din_active {
378 mux {
379 pins = "gpio67";
380 function = "pri_mi2s";
381 };
382
383 config {
384 pins = "gpio67";
385 drive-strength = <8>; /* 8 mA */
386 bias-disable; /* NO PULL */
387 };
388 };
389 };
390
391 pri_aux_pcm_dout {
392 pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep {
393 mux {
394 pins = "gpio68";
395 function = "gpio";
396 };
397
398 config {
399 pins = "gpio68";
400 drive-strength = <2>; /* 2 mA */
401 bias-pull-down; /* PULL DOWN */
402 input-enable;
403 };
404 };
405
406 pri_aux_pcm_dout_active: pri_aux_pcm_dout_active {
407 mux {
408 pins = "gpio68";
409 function = "pri_mi2s";
410 };
411
412 config {
413 pins = "gpio68";
414 drive-strength = <8>; /* 8 mA */
415 bias-disable; /* NO PULL */
416 };
417 };
418 };
419
Shashank Babu Chinta Venkata2f40bc72017-03-21 15:31:38 -0700420 pmx_sde: pmx_sde {
421 sde_dsi_active: sde_dsi_active {
422 mux {
423 pins = "gpio6", "gpio52";
424 function = "gpio";
425 };
426
427 config {
428 pins = "gpio6", "gpio52";
429 drive-strength = <8>; /* 8 mA */
430 bias-disable = <0>; /* no pull */
431 };
432 };
433 sde_dsi_suspend: sde_dsi_suspend {
434 mux {
435 pins = "gpio6", "gpio52";
436 function = "gpio";
437 };
438
439 config {
440 pins = "gpio6", "gpio52";
441 drive-strength = <2>; /* 2 mA */
442 bias-pull-down; /* PULL DOWN */
443 };
444 };
445 };
446
447 pmx_sde_te {
448 sde_te_active: sde_te_active {
449 mux {
450 pins = "gpio10";
451 function = "mdp_vsync";
452 };
453
454 config {
455 pins = "gpio10";
456 drive-strength = <2>; /* 2 mA */
457 bias-pull-down; /* PULL DOWN */
458 };
459 };
460
461 sde_te_suspend: sde_te_suspend {
462 mux {
463 pins = "gpio10";
464 function = "mdp_vsync";
465 };
466
467 config {
468 pins = "gpio10";
469 drive-strength = <2>; /* 2 mA */
470 bias-pull-down; /* PULL DOWN */
471 };
472 };
473 };
474
Padmanabhan Komanduru887085e2017-05-02 14:57:12 -0700475 sde_dp_aux_active: sde_dp_aux_active {
476 mux {
477 pins = "gpio43", "gpio51";
478 function = "gpio";
479 };
480
481 config {
482 pins = "gpio43", "gpio51";
483 bias-disable = <0>; /* no pull */
484 drive-strength = <8>;
485 };
486 };
487
488 sde_dp_aux_suspend: sde_dp_aux_suspend {
489 mux {
490 pins = "gpio43", "gpio51";
491 function = "gpio";
492 };
493
494 config {
495 pins = "gpio43", "gpio51";
496 bias-pull-down;
497 drive-strength = <2>;
498 };
499 };
500
501 sde_dp_usbplug_cc_active: sde_dp_usbplug_cc_active {
502 mux {
503 pins = "gpio38";
504 function = "gpio";
505 };
506
507 config {
508 pins = "gpio38";
509 bias-disable;
510 drive-strength = <16>;
511 };
512 };
513
514 sde_dp_usbplug_cc_suspend: sde_dp_usbplug_cc_suspend {
515 mux {
516 pins = "gpio38";
517 function = "gpio";
518 };
519
520 config {
521 pins = "gpio38";
522 bias-pull-down;
523 drive-strength = <2>;
524 };
525 };
526
Banajit Goswamib016de92017-02-15 21:02:30 -0800527 sec_aux_pcm {
528 sec_aux_pcm_sleep: sec_aux_pcm_sleep {
529 mux {
530 pins = "gpio80", "gpio81";
531 function = "gpio";
532 };
533
534 config {
535 pins = "gpio80", "gpio81";
536 drive-strength = <2>; /* 2 mA */
537 bias-pull-down; /* PULL DOWN */
538 input-enable;
539 };
540 };
541
542 sec_aux_pcm_active: sec_aux_pcm_active {
543 mux {
544 pins = "gpio80", "gpio81";
545 function = "sec_mi2s";
546 };
547
548 config {
549 pins = "gpio80", "gpio81";
550 drive-strength = <8>; /* 8 mA */
551 bias-disable; /* NO PULL */
552 };
553 };
554 };
555
556 sec_aux_pcm_din {
557 sec_aux_pcm_din_sleep: sec_aux_pcm_din_sleep {
558 mux {
559 pins = "gpio82";
560 function = "gpio";
561 };
562
563 config {
564 pins = "gpio82";
565 drive-strength = <2>; /* 2 mA */
566 bias-pull-down; /* PULL DOWN */
567 input-enable;
568 };
569 };
570
571 sec_aux_pcm_din_active: sec_aux_pcm_din_active {
572 mux {
573 pins = "gpio82";
574 function = "sec_mi2s";
575 };
576
577 config {
578 pins = "gpio82";
579 drive-strength = <8>; /* 8 mA */
580 bias-disable; /* NO PULL */
581 };
582 };
583 };
584
585 sec_aux_pcm_dout {
586 sec_aux_pcm_dout_sleep: sec_aux_pcm_dout_sleep {
587 mux {
588 pins = "gpio83";
589 function = "gpio";
590 };
591
592 config {
593 pins = "gpio83";
594 drive-strength = <2>; /* 2 mA */
595 bias-pull-down; /* PULL DOWN */
596 input-enable;
597 };
598 };
599
600 sec_aux_pcm_dout_active: sec_aux_pcm_dout_active {
601 mux {
602 pins = "gpio83";
603 function = "sec_mi2s";
604 };
605
606 config {
607 pins = "gpio83";
608 drive-strength = <8>; /* 8 mA */
609 bias-disable; /* NO PULL */
610 };
611 };
612 };
613
614 tert_aux_pcm {
615 tert_aux_pcm_sleep: tert_aux_pcm_sleep {
616 mux {
617 pins = "gpio75", "gpio76";
618 function = "gpio";
619 };
620
621 config {
622 pins = "gpio75", "gpio76";
623 drive-strength = <2>; /* 2 mA */
624 bias-pull-down; /* PULL DOWN */
625 input-enable;
626 };
627 };
628
629 tert_aux_pcm_active: tert_aux_pcm_active {
630 mux {
631 pins = "gpio75", "gpio76";
632 function = "ter_mi2s";
633 };
634
635 config {
636 pins = "gpio75", "gpio76";
637 drive-strength = <8>; /* 8 mA */
638 bias-disable; /* NO PULL */
639 output-high;
640 };
641 };
642 };
643
644 tert_aux_pcm_din {
645 tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep {
646 mux {
647 pins = "gpio77";
648 function = "gpio";
649 };
650
651 config {
652 pins = "gpio77";
653 drive-strength = <2>; /* 2 mA */
654 bias-pull-down; /* PULL DOWN */
655 input-enable;
656 };
657 };
658
659 tert_aux_pcm_din_active: tert_aux_pcm_din_active {
660 mux {
661 pins = "gpio77";
662 function = "ter_mi2s";
663 };
664
665 config {
666 pins = "gpio77";
667 drive-strength = <8>; /* 8 mA */
668 bias-disable; /* NO PULL */
669 };
670 };
671 };
672
673 tert_aux_pcm_dout {
674 tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep {
675 mux {
676 pins = "gpio78";
677 function = "gpio";
678 };
679
680 config {
681 pins = "gpio78";
682 drive-strength = <2>; /* 2 mA */
683 bias-pull-down; /* PULL DOWN */
684 input-enable;
685 };
686 };
687
688 tert_aux_pcm_dout_active: tert_aux_pcm_dout_active {
689 mux {
690 pins = "gpio78";
691 function = "ter_mi2s";
692 };
693
694 config {
695 pins = "gpio78";
696 drive-strength = <8>; /* 8 mA */
697 bias-disable; /* NO PULL */
698 };
699 };
700 };
701
702 quat_aux_pcm {
703 quat_aux_pcm_sleep: quat_aux_pcm_sleep {
704 mux {
705 pins = "gpio58", "gpio59";
706 function = "gpio";
707 };
708
709 config {
710 pins = "gpio58", "gpio59";
711 drive-strength = <2>; /* 2 mA */
712 bias-pull-down; /* PULL DOWN */
713 input-enable;
714 };
715 };
716
717 quat_aux_pcm_active: quat_aux_pcm_active {
718 mux {
719 pins = "gpio58", "gpio59";
720 function = "qua_mi2s";
721 };
722
723 config {
724 pins = "gpio58", "gpio59";
725 drive-strength = <8>; /* 8 mA */
726 bias-disable; /* NO PULL */
727 output-high;
728 };
729 };
730 };
731
732 quat_aux_pcm_din {
733 quat_aux_pcm_din_sleep: quat_aux_pcm_din_sleep {
734 mux {
735 pins = "gpio60";
736 function = "gpio";
737 };
738
739 config {
740 pins = "gpio60";
741 drive-strength = <2>; /* 2 mA */
742 bias-pull-down; /* PULL DOWN */
743 input-enable;
744 };
745 };
746
747 quat_aux_pcm_din_active: quat_aux_pcm_din_active {
748 mux {
749 pins = "gpio60";
750 function = "qua_mi2s";
751 };
752
753 config {
754 pins = "gpio60";
755 drive-strength = <8>; /* 8 mA */
756 bias-disable; /* NO PULL */
757 };
758 };
759 };
760
761 quat_aux_pcm_dout {
762 quat_aux_pcm_dout_sleep: quat_aux_pcm_dout_sleep {
763 mux {
764 pins = "gpio61";
765 function = "gpio";
766 };
767
768 config {
769 pins = "gpio61";
770 drive-strength = <2>; /* 2 mA */
771 bias-pull-down; /* PULL DOWN */
772 input-enable;
773 };
774 };
775
776 quat_aux_pcm_dout_active: quat_aux_pcm_dout_active {
777 mux {
778 pins = "gpio61";
779 function = "qua_mi2s";
780 };
781
782 config {
783 pins = "gpio61";
784 drive-strength = <8>; /* 8 mA */
785 bias-disable; /* NO PULL */
786 };
787 };
788 };
789
790 pri_mi2s_mclk {
791 pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep {
792 mux {
793 pins = "gpio64";
794 function = "gpio";
795 };
796
797 config {
798 pins = "gpio64";
799 drive-strength = <2>; /* 2 mA */
800 bias-pull-down; /* PULL DOWN */
801 input-enable;
802 };
803 };
804
805 pri_mi2s_mclk_active: pri_mi2s_mclk_active {
806 mux {
807 pins = "gpio64";
808 function = "pri_mi2s";
809 };
810
811 config {
812 pins = "gpio64";
813 drive-strength = <8>; /* 8 mA */
814 bias-disable; /* NO PULL */
815 output-high;
816 };
817 };
818 };
819
820 pri_mi2s_sck {
821 pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {
822 mux {
823 pins = "gpio65";
824 function = "gpio";
825 };
826
827 config {
828 pins = "gpio65";
829 drive-strength = <2>; /* 2 mA */
830 bias-pull-down; /* PULL DOWN */
831 input-enable;
832 };
833 };
834
835 pri_mi2s_sck_active: pri_mi2s_sck_active {
836 mux {
837 pins = "gpio65";
838 function = "pri_mi2s";
839 };
840
841 config {
842 pins = "gpio65";
843 drive-strength = <8>; /* 8 mA */
844 bias-disable; /* NO PULL */
845 output-high;
846 };
847 };
848 };
849
850 pri_mi2s_ws {
851 pri_mi2s_ws_sleep: pri_mi2s_ws_sleep {
852 mux {
853 pins = "gpio66";
854 function = "gpio";
855 };
856
857 config {
858 pins = "gpio66";
859 drive-strength = <2>; /* 2 mA */
860 bias-pull-down; /* PULL DOWN */
861 input-enable;
862 };
863 };
864
865 pri_mi2s_ws_active: pri_mi2s_ws_active {
866 mux {
867 pins = "gpio66";
868 function = "pri_mi2s_ws";
869 };
870
871 config {
872 pins = "gpio66";
873 drive-strength = <8>; /* 8 mA */
874 bias-disable; /* NO PULL */
875 output-high;
876 };
877 };
878 };
879
880 pri_mi2s_sd0 {
881 pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {
882 mux {
883 pins = "gpio67";
884 function = "gpio";
885 };
886
887 config {
888 pins = "gpio67";
889 drive-strength = <2>; /* 2 mA */
890 bias-pull-down; /* PULL DOWN */
891 input-enable;
892 };
893 };
894
895 pri_mi2s_sd0_active: pri_mi2s_sd0_active {
896 mux {
897 pins = "gpio67";
898 function = "pri_mi2s";
899 };
900
901 config {
902 pins = "gpio67";
903 drive-strength = <8>; /* 8 mA */
904 bias-disable; /* NO PULL */
905 };
906 };
907 };
908
909 pri_mi2s_sd1 {
910 pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep {
911 mux {
912 pins = "gpio68";
913 function = "gpio";
914 };
915
916 config {
917 pins = "gpio68";
918 drive-strength = <2>; /* 2 mA */
919 bias-pull-down; /* PULL DOWN */
920 input-enable;
921 };
922 };
923
924 pri_mi2s_sd1_active: pri_mi2s_sd1_active {
925 mux {
926 pins = "gpio68";
927 function = "pri_mi2s";
928 };
929
930 config {
931 pins = "gpio68";
932 drive-strength = <8>; /* 8 mA */
933 bias-disable; /* NO PULL */
934 };
935 };
936 };
937
938 sec_mi2s_mclk {
939 sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep {
940 mux {
941 pins = "gpio79";
942 function = "gpio";
943 };
944
945 config {
946 pins = "gpio79";
947 drive-strength = <2>; /* 2 mA */
948 bias-pull-down; /* PULL DOWN */
949 input-enable;
950 };
951 };
952
953 sec_mi2s_mclk_active: sec_mi2s_mclk_active {
954 mux {
955 pins = "gpio79";
956 function = "sec_mi2s";
957 };
958
959 config {
960 pins = "gpio79";
961 drive-strength = <8>; /* 8 mA */
962 bias-disable; /* NO PULL */
963 };
964 };
965 };
966
967 sec_mi2s {
968 sec_mi2s_sleep: sec_mi2s_sleep {
969 mux {
970 pins = "gpio80", "gpio81";
971 function = "gpio";
972 };
973
974 config {
975 pins = "gpio80", "gpio81";
976 drive-strength = <2>; /* 2 mA */
977 bias-disable; /* NO PULL */
978 input-enable;
979 };
980 };
981
982 sec_mi2s_active: sec_mi2s_active {
983 mux {
984 pins = "gpio80", "gpio81";
985 function = "sec_mi2s";
986 };
987
988 config {
989 pins = "gpio80", "gpio81";
990 drive-strength = <8>; /* 8 mA */
991 bias-disable; /* NO PULL */
992 };
993 };
994 };
995
996 sec_mi2s_sd0 {
997 sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep {
998 mux {
999 pins = "gpio82";
1000 function = "gpio";
1001 };
1002
1003 config {
1004 pins = "gpio82";
1005 drive-strength = <2>; /* 2 mA */
1006 bias-pull-down; /* PULL DOWN */
1007 input-enable;
1008 };
1009 };
1010
1011 sec_mi2s_sd0_active: sec_mi2s_sd0_active {
1012 mux {
1013 pins = "gpio82";
1014 function = "sec_mi2s";
1015 };
1016
1017 config {
1018 pins = "gpio82";
1019 drive-strength = <8>; /* 8 mA */
1020 bias-disable; /* NO PULL */
1021 };
1022 };
1023 };
1024
1025 sec_mi2s_sd1 {
1026 sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep {
1027 mux {
1028 pins = "gpio83";
1029 function = "gpio";
1030 };
1031
1032 config {
1033 pins = "gpio83";
1034 drive-strength = <2>; /* 2 mA */
1035 bias-pull-down; /* PULL DOWN */
1036 input-enable;
1037 };
1038 };
1039
1040 sec_mi2s_sd1_active: sec_mi2s_sd1_active {
1041 mux {
1042 pins = "gpio83";
1043 function = "sec_mi2s";
1044 };
1045
1046 config {
1047 pins = "gpio83";
1048 drive-strength = <8>; /* 8 mA */
1049 bias-disable; /* NO PULL */
1050 };
1051 };
1052 };
1053
1054 tert_mi2s_mclk {
1055 tert_mi2s_mclk_sleep: tert_mi2s_mclk_sleep {
1056 mux {
1057 pins = "gpio74";
1058 function = "gpio";
1059 };
1060
1061 config {
1062 pins = "gpio74";
1063 drive-strength = <2>; /* 2 mA */
1064 bias-pull-down; /* PULL DOWN */
1065 input-enable;
1066 };
1067 };
1068
1069 tert_mi2s_mclk_active: tert_mi2s_mclk_active {
1070 mux {
1071 pins = "gpio74";
1072 function = "ter_mi2s";
1073 };
1074
1075 config {
1076 pins = "gpio74";
1077 drive-strength = <8>; /* 8 mA */
1078 bias-disable; /* NO PULL */
1079 };
1080 };
1081 };
1082
1083 tert_mi2s {
1084 tert_mi2s_sleep: tert_mi2s_sleep {
1085 mux {
1086 pins = "gpio75", "gpio76";
1087 function = "gpio";
1088 };
1089
1090 config {
1091 pins = "gpio75", "gpio76";
1092 drive-strength = <2>; /* 2 mA */
1093 bias-pull-down; /* PULL DOWN */
1094 input-enable;
1095 };
1096 };
1097
1098 tert_mi2s_active: tert_mi2s_active {
1099 mux {
1100 pins = "gpio75", "gpio76";
1101 function = "ter_mi2s";
1102 };
1103
1104 config {
1105 pins = "gpio75", "gpio76";
1106 drive-strength = <8>; /* 8 mA */
1107 bias-disable; /* NO PULL */
1108 output-high;
1109 };
1110 };
1111 };
1112
1113 tert_mi2s_sd0 {
1114 tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep {
1115 mux {
1116 pins = "gpio77";
1117 function = "gpio";
1118 };
1119
1120 config {
1121 pins = "gpio77";
1122 drive-strength = <2>; /* 2 mA */
1123 bias-pull-down; /* PULL DOWN */
1124 input-enable;
1125 };
1126 };
1127
1128 tert_mi2s_sd0_active: tert_mi2s_sd0_active {
1129 mux {
1130 pins = "gpio77";
1131 function = "ter_mi2s";
1132 };
1133
1134 config {
1135 pins = "gpio77";
1136 drive-strength = <8>; /* 8 mA */
1137 bias-disable; /* NO PULL */
1138 };
1139 };
1140 };
1141
1142 tert_mi2s_sd1 {
1143 tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep {
1144 mux {
1145 pins = "gpio78";
1146 function = "gpio";
1147 };
1148
1149 config {
1150 pins = "gpio78";
1151 drive-strength = <2>; /* 2 mA */
1152 bias-pull-down; /* PULL DOWN */
1153 input-enable;
1154 };
1155 };
1156
1157 tert_mi2s_sd1_active: tert_mi2s_sd1_active {
1158 mux {
1159 pins = "gpio78";
1160 function = "ter_mi2s";
1161 };
1162
1163 config {
1164 pins = "gpio78";
1165 drive-strength = <8>; /* 8 mA */
1166 bias-disable; /* NO PULL */
1167 };
1168 };
1169 };
1170
1171 quat_mi2s_mclk {
1172 quat_mi2s_mclk_sleep: quat_mi2s_mclk_sleep {
1173 mux {
1174 pins = "gpio57";
1175 function = "gpio";
1176 };
1177
1178 config {
1179 pins = "gpio57";
1180 drive-strength = <2>; /* 2 mA */
1181 bias-pull-down; /* PULL DOWN */
1182 input-enable;
1183 };
1184 };
1185
1186 quat_mi2s_mclk_active: quat_mi2s_mclk_active {
1187 mux {
1188 pins = "gpio57";
1189 function = "qua_mi2s";
1190 };
1191
1192 config {
1193 pins = "gpio57";
1194 drive-strength = <8>; /* 8 mA */
1195 bias-disable; /* NO PULL */
1196 };
1197 };
1198 };
1199
1200 quat_mi2s {
1201 quat_mi2s_sleep: quat_mi2s_sleep {
1202 mux {
1203 pins = "gpio58", "gpio59";
1204 function = "gpio";
1205 };
1206
1207 config {
1208 pins = "gpio58", "gpio59";
1209 drive-strength = <2>; /* 2 mA */
1210 bias-pull-down; /* PULL DOWN */
1211 input-enable;
1212 };
1213 };
1214
1215 quat_mi2s_active: quat_mi2s_active {
1216 mux {
1217 pins = "gpio58", "gpio59";
1218 function = "qua_mi2s";
1219 };
1220
1221 config {
1222 pins = "gpio58", "gpio59";
1223 drive-strength = <8>; /* 8 mA */
1224 bias-disable; /* NO PULL */
1225 output-high;
1226 };
1227 };
1228 };
1229
1230 quat_mi2s_sd0 {
1231 quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep {
1232 mux {
1233 pins = "gpio60";
1234 function = "gpio";
1235 };
1236
1237 config {
1238 pins = "gpio60";
1239 drive-strength = <2>; /* 2 mA */
1240 bias-pull-down; /* PULL DOWN */
1241 input-enable;
1242 };
1243 };
1244
1245 quat_mi2s_sd0_active: quat_mi2s_sd0_active {
1246 mux {
1247 pins = "gpio60";
1248 function = "qua_mi2s";
1249 };
1250
1251 config {
1252 pins = "gpio60";
1253 drive-strength = <8>; /* 8 mA */
1254 bias-disable; /* NO PULL */
1255 };
1256 };
1257 };
1258
1259 quat_mi2s_sd1 {
1260 quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep {
1261 mux {
1262 pins = "gpio61";
1263 function = "gpio";
1264 };
1265
1266 config {
1267 pins = "gpio61";
1268 drive-strength = <2>; /* 2 mA */
1269 bias-pull-down; /* PULL DOWN */
1270 input-enable;
1271 };
1272 };
1273
1274 quat_mi2s_sd1_active: quat_mi2s_sd1_active {
1275 mux {
1276 pins = "gpio61";
1277 function = "qua_mi2s";
1278 };
1279
1280 config {
1281 pins = "gpio61";
1282 drive-strength = <8>; /* 8 mA */
1283 bias-disable; /* NO PULL */
1284 };
1285 };
1286 };
1287
1288 quat_mi2s_sd2 {
1289 quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep {
1290 mux {
1291 pins = "gpio62";
1292 function = "gpio";
1293 };
1294
1295 config {
1296 pins = "gpio62";
1297 drive-strength = <2>; /* 2 mA */
1298 bias-pull-down; /* PULL DOWN */
1299 input-enable;
1300 };
1301 };
1302
1303 quat_mi2s_sd2_active: quat_mi2s_sd2_active {
1304 mux {
1305 pins = "gpio62";
1306 function = "qua_mi2s";
1307 };
1308
1309 config {
1310 pins = "gpio62";
1311 drive-strength = <8>; /* 8 mA */
1312 bias-disable; /* NO PULL */
1313 };
1314 };
1315 };
1316
1317 quat_mi2s_sd3 {
1318 quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep {
1319 mux {
1320 pins = "gpio63";
1321 function = "gpio";
1322 };
1323
1324 config {
1325 pins = "gpio63";
1326 drive-strength = <2>; /* 2 mA */
1327 bias-pull-down; /* PULL DOWN */
1328 input-enable;
1329 };
1330 };
1331
1332 quat_mi2s_sd3_active: quat_mi2s_sd3_active {
1333 mux {
1334 pins = "gpio63";
1335 function = "qua_mi2s";
1336 };
1337
1338 config {
1339 pins = "gpio63";
1340 drive-strength = <8>; /* 8 mA */
1341 bias-disable; /* NO PULL */
1342 };
1343 };
1344 };
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06001345
1346 /* QUPv3 South SE mappings */
1347 /* SE 0 pin mappings */
1348 qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
1349 qupv3_se0_i2c_active: qupv3_se0_i2c_active {
1350 mux {
1351 pins = "gpio0", "gpio1";
1352 function = "qup0";
1353 };
1354
1355 config {
1356 pins = "gpio0", "gpio1";
1357 drive-strength = <2>;
1358 bias-disable;
1359 };
1360 };
1361
1362 qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
1363 mux {
1364 pins = "gpio0", "gpio1";
1365 function = "gpio";
1366 };
1367
1368 config {
1369 pins = "gpio0", "gpio1";
1370 drive-strength = <2>;
1371 bias-pull-up;
1372 };
1373 };
1374 };
1375
1376 qupv3_se0_spi_pins: qupv3_se0_spi_pins {
1377 qupv3_se0_spi_active: qupv3_se0_spi_active {
1378 mux {
1379 pins = "gpio0", "gpio1", "gpio2",
1380 "gpio3";
1381 function = "qup0";
1382 };
1383
1384 config {
1385 pins = "gpio0", "gpio1", "gpio2",
1386 "gpio3";
1387 drive-strength = <6>;
1388 bias-disable;
1389 };
1390 };
1391
1392 qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
1393 mux {
1394 pins = "gpio0", "gpio1", "gpio2",
1395 "gpio3";
1396 function = "gpio";
1397 };
1398
1399 config {
1400 pins = "gpio0", "gpio1", "gpio2",
1401 "gpio3";
1402 drive-strength = <6>;
1403 bias-disable;
1404 };
1405 };
1406 };
1407
1408 /* SE 1 pin mappings */
1409 qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
1410 qupv3_se1_i2c_active: qupv3_se1_i2c_active {
1411 mux {
1412 pins = "gpio17", "gpio18";
1413 function = "qup1";
1414 };
1415
1416 config {
1417 pins = "gpio17", "gpio18";
1418 drive-strength = <2>;
1419 bias-disable;
1420 };
1421 };
1422
1423 qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
1424 mux {
1425 pins = "gpio17", "gpio18";
1426 function = "gpio";
1427 };
1428
1429 config {
1430 pins = "gpio17", "gpio18";
1431 drive-strength = <2>;
1432 bias-pull-up;
1433 };
1434 };
1435 };
1436
1437 qupv3_se1_spi_pins: qupv3_se1_spi_pins {
1438 qupv3_se1_spi_active: qupv3_se1_spi_active {
1439 mux {
1440 pins = "gpio17", "gpio18", "gpio19",
1441 "gpio20";
1442 function = "qup1";
1443 };
1444
1445 config {
1446 pins = "gpio17", "gpio18", "gpio19",
1447 "gpio20";
1448 drive-strength = <6>;
1449 bias-disable;
1450 };
1451 };
1452
1453 qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
1454 mux {
1455 pins = "gpio17", "gpio18", "gpio19",
1456 "gpio20";
1457 function = "gpio";
1458 };
1459
1460 config {
1461 pins = "gpio17", "gpio18", "gpio19",
1462 "gpio20";
1463 drive-strength = <6>;
1464 bias-disable;
1465 };
1466 };
1467 };
1468
1469 /* SE 2 pin mappings */
1470 qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
1471 qupv3_se2_i2c_active: qupv3_se2_i2c_active {
1472 mux {
1473 pins = "gpio27", "gpio28";
1474 function = "qup2";
1475 };
1476
1477 config {
1478 pins = "gpio27", "gpio28";
1479 drive-strength = <2>;
1480 bias-disable;
1481 };
1482 };
1483
1484 qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
1485 mux {
1486 pins = "gpio27", "gpio28";
1487 function = "gpio";
1488 };
1489
1490 config {
1491 pins = "gpio27", "gpio28";
1492 drive-strength = <2>;
1493 bias-pull-up;
1494 };
1495 };
1496 };
1497
1498 qupv3_se2_spi_pins: qupv3_se2_spi_pins {
1499 qupv3_se2_spi_active: qupv3_se2_spi_active {
1500 mux {
1501 pins = "gpio27", "gpio28", "gpio29",
1502 "gpio30";
1503 function = "qup2";
1504 };
1505
1506 config {
1507 pins = "gpio27", "gpio28", "gpio29",
1508 "gpio30";
1509 drive-strength = <6>;
1510 bias-disable;
1511 };
1512 };
1513
1514 qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
1515 mux {
1516 pins = "gpio27", "gpio28", "gpio29",
1517 "gpio30";
1518 function = "gpio";
1519 };
1520
1521 config {
1522 pins = "gpio27", "gpio28", "gpio29",
1523 "gpio30";
1524 drive-strength = <6>;
1525 bias-disable;
1526 };
1527 };
1528 };
1529
1530 /* SE 3 pin mappings */
1531 qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
1532 qupv3_se3_i2c_active: qupv3_se3_i2c_active {
1533 mux {
1534 pins = "gpio41", "gpio42";
1535 function = "qup3";
1536 };
1537
1538 config {
1539 pins = "gpio41", "gpio42";
1540 drive-strength = <2>;
1541 bias-disable;
1542 };
1543 };
1544
1545 qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
1546 mux {
1547 pins = "gpio41", "gpio42";
1548 function = "gpio";
1549 };
1550
1551 config {
1552 pins = "gpio41", "gpio42";
1553 drive-strength = <2>;
1554 bias-pull-up;
1555 };
1556 };
1557 };
1558
Gaurav Singhalf6d253d2017-05-11 08:24:40 +05301559 nfc {
1560 nfc_int_active: nfc_int_active {
1561 /* active state */
1562 mux {
1563 /* GPIO 63 NFC Read Interrupt */
1564 pins = "gpio63";
1565 function = "gpio";
1566 };
1567
1568 config {
1569 pins = "gpio63";
1570 drive-strength = <2>; /* 2 MA */
1571 bias-pull-up;
1572 };
1573 };
1574
1575 nfc_int_suspend: nfc_int_suspend {
1576 /* sleep state */
1577 mux {
1578 /* GPIO 63 NFC Read Interrupt */
1579 pins = "gpio63";
1580 function = "gpio";
1581 };
1582
1583 config {
1584 pins = "gpio63";
1585 drive-strength = <2>; /* 2 MA */
1586 bias-pull-up;
1587 };
1588 };
1589
1590 nfc_enable_active: nfc_enable_active {
1591 /* active state */
1592 mux {
1593 /* 12: NFC ENABLE 116:ESE Enable */
1594 pins = "gpio12", "gpio62", "gpio116";
1595 function = "gpio";
1596 };
1597
1598 config {
1599 pins = "gpio12", "gpio62", "gpio116";
1600 drive-strength = <2>; /* 2 MA */
1601 bias-pull-up;
1602 };
1603 };
1604
1605 nfc_enable_suspend: nfc_enable_suspend {
1606 /* sleep state */
1607 mux {
1608 /* 12: NFC ENABLE 116:ESE Enable */
1609 pins = "gpio12", "gpio62", "gpio116";
1610 function = "gpio";
1611 };
1612
1613 config {
1614 pins = "gpio12", "gpio62", "gpio116";
1615 drive-strength = <2>; /* 2 MA */
1616 bias-disable;
1617 };
1618 };
1619 };
1620
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06001621 qupv3_se3_spi_pins: qupv3_se3_spi_pins {
1622 qupv3_se3_spi_active: qupv3_se3_spi_active {
1623 mux {
1624 pins = "gpio41", "gpio42", "gpio43",
1625 "gpio44";
1626 function = "qup3";
1627 };
1628
1629 config {
1630 pins = "gpio41", "gpio42", "gpio43",
1631 "gpio44";
1632 drive-strength = <6>;
1633 bias-disable;
1634 };
1635 };
1636
1637 qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
1638 mux {
1639 pins = "gpio41", "gpio42", "gpio43",
1640 "gpio44";
1641 function = "gpio";
1642 };
1643
1644 config {
1645 pins = "gpio41", "gpio42", "gpio43",
1646 "gpio44";
1647 drive-strength = <6>;
1648 bias-disable;
1649 };
1650 };
1651 };
1652
1653 /* SE 4 pin mappings */
1654 qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
1655 qupv3_se4_i2c_active: qupv3_se4_i2c_active {
1656 mux {
1657 pins = "gpio89", "gpio90";
1658 function = "qup4";
1659 };
1660
1661 config {
1662 pins = "gpio89", "gpio90";
1663 drive-strength = <2>;
1664 bias-disable;
1665 };
1666 };
1667
1668 qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
1669 mux {
1670 pins = "gpio89", "gpio90";
1671 function = "gpio";
1672 };
1673
1674 config {
1675 pins = "gpio89", "gpio90";
1676 drive-strength = <2>;
1677 bias-pull-up;
1678 };
1679 };
1680 };
1681
1682 qupv3_se4_spi_pins: qupv3_se4_spi_pins {
1683 qupv3_se4_spi_active: qupv3_se4_spi_active {
1684 mux {
1685 pins = "gpio89", "gpio90", "gpio91",
1686 "gpio92";
1687 function = "qup4";
1688 };
1689
1690 config {
1691 pins = "gpio89", "gpio90", "gpio91",
1692 "gpio92";
1693 drive-strength = <6>;
1694 bias-disable;
1695 };
1696 };
1697
1698 qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
1699 mux {
1700 pins = "gpio89", "gpio90", "gpio91",
1701 "gpio92";
1702 function = "gpio";
1703 };
1704
1705 config {
1706 pins = "gpio89", "gpio90", "gpio91",
1707 "gpio92";
1708 drive-strength = <6>;
1709 bias-disable;
1710 };
1711 };
1712 };
1713
1714 /* SE 5 pin mappings */
1715 qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
1716 qupv3_se5_i2c_active: qupv3_se5_i2c_active {
1717 mux {
1718 pins = "gpio85", "gpio86";
1719 function = "qup5";
1720 };
1721
1722 config {
1723 pins = "gpio85", "gpio86";
1724 drive-strength = <2>;
1725 bias-disable;
1726 };
1727 };
1728
1729 qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
1730 mux {
1731 pins = "gpio85", "gpio86";
1732 function = "gpio";
1733 };
1734
1735 config {
1736 pins = "gpio85", "gpio86";
1737 drive-strength = <2>;
1738 bias-pull-up;
1739 };
1740 };
1741 };
1742
1743 qupv3_se5_spi_pins: qupv3_se5_spi_pins {
1744 qupv3_se5_spi_active: qupv3_se5_spi_active {
1745 mux {
1746 pins = "gpio85", "gpio86", "gpio87",
1747 "gpio88";
1748 function = "qup5";
1749 };
1750
1751 config {
1752 pins = "gpio85", "gpio86", "gpio87",
1753 "gpio88";
1754 drive-strength = <6>;
1755 bias-disable;
1756 };
1757 };
1758
1759 qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
1760 mux {
1761 pins = "gpio85", "gpio86", "gpio87",
1762 "gpio88";
1763 function = "gpio";
1764 };
1765
1766 config {
1767 pins = "gpio85", "gpio86", "gpio87",
1768 "gpio88";
1769 drive-strength = <6>;
1770 bias-disable;
1771 };
1772 };
1773 };
1774
1775 /* SE 6 pin mappings */
1776 qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
1777 qupv3_se6_i2c_active: qupv3_se6_i2c_active {
1778 mux {
1779 pins = "gpio45", "gpio46";
1780 function = "qup6";
1781 };
1782
1783 config {
1784 pins = "gpio45", "gpio46";
1785 drive-strength = <2>;
1786 bias-disable;
1787 };
1788 };
1789
1790 qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
1791 mux {
1792 pins = "gpio45", "gpio46";
1793 function = "gpio";
1794 };
1795
1796 config {
1797 pins = "gpio45", "gpio46";
1798 drive-strength = <2>;
1799 bias-pull-up;
1800 };
1801 };
1802 };
1803
1804 qupv3_se6_4uart_pins: qupv3_se6_4uart_pins {
1805 qupv3_se6_4uart_active: qupv3_se6_4uart_active {
1806 mux {
1807 pins = "gpio45", "gpio46", "gpio47",
1808 "gpio48";
1809 function = "qup6";
1810 };
1811
1812 config {
1813 pins = "gpio45", "gpio46", "gpio47",
1814 "gpio48";
1815 drive-strength = <2>;
1816 bias-disable;
1817 };
1818 };
1819
1820 qupv3_se6_4uart_sleep: qupv3_se6_4uart_sleep {
1821 mux {
1822 pins = "gpio45", "gpio46", "gpio47",
1823 "gpio48";
1824 function = "gpio";
1825 };
1826
1827 config {
1828 pins = "gpio45", "gpio46", "gpio47",
1829 "gpio48";
1830 drive-strength = <2>;
1831 bias-disable;
1832 };
1833 };
1834 };
1835
1836 qupv3_se6_spi_pins: qupv3_se6_spi_pins {
1837 qupv3_se6_spi_active: qupv3_se6_spi_active {
1838 mux {
1839 pins = "gpio45", "gpio46", "gpio47",
1840 "gpio48";
1841 function = "qup6";
1842 };
1843
1844 config {
1845 pins = "gpio45", "gpio46", "gpio47",
1846 "gpio48";
1847 drive-strength = <6>;
1848 bias-disable;
1849 };
1850 };
1851
1852 qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
1853 mux {
1854 pins = "gpio45", "gpio46", "gpio47",
1855 "gpio48";
1856 function = "gpio";
1857 };
1858
1859 config {
1860 pins = "gpio45", "gpio46", "gpio47",
1861 "gpio48";
1862 drive-strength = <6>;
1863 bias-disable;
1864 };
1865 };
1866 };
1867
1868 /* SE 7 pin mappings */
1869 qupv3_se7_i2c_pins: qupv3_se7_i2c_pins {
1870 qupv3_se7_i2c_active: qupv3_se7_i2c_active {
1871 mux {
1872 pins = "gpio93", "gpio94";
1873 function = "qup7";
1874 };
1875
1876 config {
1877 pins = "gpio93", "gpio94";
1878 drive-strength = <2>;
1879 bias-disable;
1880 };
1881 };
1882
1883 qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep {
1884 mux {
1885 pins = "gpio93", "gpio94";
1886 function = "gpio";
1887 };
1888
1889 config {
1890 pins = "gpio93", "gpio94";
1891 drive-strength = <2>;
1892 bias-pull-up;
1893 };
1894 };
1895 };
1896
1897 qupv3_se7_4uart_pins: qupv3_se7_4uart_pins {
1898 qupv3_se7_4uart_active: qupv3_se7_4uart_active {
1899 mux {
1900 pins = "gpio93", "gpio94", "gpio95",
1901 "gpio96";
1902 function = "qup7";
1903 };
1904
1905 config {
1906 pins = "gpio93", "gpio94", "gpio95",
1907 "gpio96";
1908 drive-strength = <2>;
1909 bias-disable;
1910 };
1911 };
1912
1913 qupv3_se7_4uart_sleep: qupv3_se7_4uart_sleep {
1914 mux {
1915 pins = "gpio93", "gpio94", "gpio95",
1916 "gpio96";
1917 function = "gpio";
1918 };
1919
1920 config {
1921 pins = "gpio93", "gpio94", "gpio95",
1922 "gpio96";
1923 drive-strength = <2>;
1924 bias-disable;
1925 };
1926 };
1927 };
1928
1929 qupv3_se7_spi_pins: qupv3_se7_spi_pins {
1930 qupv3_se7_spi_active: qupv3_se7_spi_active {
1931 mux {
1932 pins = "gpio93", "gpio94", "gpio95",
1933 "gpio96";
1934 function = "qup7";
1935 };
1936
1937 config {
1938 pins = "gpio93", "gpio94", "gpio95",
1939 "gpio96";
1940 drive-strength = <6>;
1941 bias-disable;
1942 };
1943 };
1944
1945 qupv3_se7_spi_sleep: qupv3_se7_spi_sleep {
1946 mux {
1947 pins = "gpio93", "gpio94", "gpio95",
1948 "gpio96";
1949 function = "gpio";
1950 };
1951
1952 config {
1953 pins = "gpio93", "gpio94", "gpio95",
1954 "gpio96";
1955 drive-strength = <6>;
1956 bias-disable;
1957 };
1958 };
1959 };
1960
1961 /* QUPv3 North instances */
1962 /* SE 8 pin mappings */
1963 qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
1964 qupv3_se8_i2c_active: qupv3_se8_i2c_active {
1965 mux {
1966 pins = "gpio65", "gpio66";
1967 function = "qup8";
1968 };
1969
1970 config {
1971 pins = "gpio65", "gpio66";
1972 drive-strength = <2>;
1973 bias-disable;
1974 };
1975 };
1976
1977 qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
1978 mux {
1979 pins = "gpio65", "gpio66";
1980 function = "gpio";
1981 };
1982
1983 config {
1984 pins = "gpio65", "gpio66";
1985 drive-strength = <2>;
1986 bias-pull-up;
1987 };
1988 };
1989 };
1990
1991 qupv3_se8_spi_pins: qupv3_se8_spi_pins {
1992 qupv3_se8_spi_active: qupv3_se8_spi_active {
1993 mux {
1994 pins = "gpio65", "gpio66", "gpio67",
1995 "gpio68";
1996 function = "qup8";
1997 };
1998
1999 config {
2000 pins = "gpio65", "gpio66", "gpio67",
2001 "gpio68";
2002 drive-strength = <6>;
2003 bias-disable;
2004 };
2005 };
2006
2007 qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
2008 mux {
2009 pins = "gpio65", "gpio66", "gpio67",
2010 "gpio68";
2011 function = "gpio";
2012 };
2013
2014 config {
2015 pins = "gpio65", "gpio66", "gpio67",
2016 "gpio68";
2017 drive-strength = <6>;
2018 bias-disable;
2019 };
2020 };
2021 };
2022
2023 /* SE 9 pin mappings */
2024 qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
2025 qupv3_se9_i2c_active: qupv3_se9_i2c_active {
2026 mux {
2027 pins = "gpio6", "gpio7";
2028 function = "qup9";
2029 };
2030
2031 config {
2032 pins = "gpio6", "gpio7";
2033 drive-strength = <2>;
2034 bias-disable;
2035 };
2036 };
2037
2038 qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
2039 mux {
2040 pins = "gpio6", "gpio7";
2041 function = "gpio";
2042 };
2043
2044 config {
2045 pins = "gpio6", "gpio7";
2046 drive-strength = <2>;
2047 bias-pull-up;
2048 };
2049 };
2050 };
2051
2052 qupv3_se9_2uart_pins: qupv3_se9_2uart_pins {
2053 qupv3_se9_2uart_active: qupv3_se9_2uart_active {
2054 mux {
2055 pins = "gpio4", "gpio5";
2056 function = "qup9";
2057 };
2058
2059 config {
2060 pins = "gpio4", "gpio5";
2061 drive-strength = <2>;
2062 bias-disable;
2063 };
2064 };
2065
2066 qupv3_se9_2uart_sleep: qupv3_se9_2uart_sleep {
2067 mux {
2068 pins = "gpio4", "gpio5";
2069 function = "gpio";
2070 };
2071
2072 config {
2073 pins = "gpio4", "gpio5";
2074 drive-strength = <2>;
2075 bias-disable;
2076 };
2077 };
2078 };
2079
2080 qupv3_se9_spi_pins: qupv3_se9_spi_pins {
2081 qupv3_se9_spi_active: qupv3_se9_spi_active {
2082 mux {
2083 pins = "gpio4", "gpio5", "gpio6",
2084 "gpio7";
2085 function = "qup9";
2086 };
2087
2088 config {
2089 pins = "gpio4", "gpio5", "gpio6",
2090 "gpio7";
2091 drive-strength = <6>;
2092 bias-disable;
2093 };
2094 };
2095
2096 qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
2097 mux {
2098 pins = "gpio4", "gpio5", "gpio6",
2099 "gpio7";
2100 function = "gpio";
2101 };
2102
2103 config {
2104 pins = "gpio4", "gpio5", "gpio6",
2105 "gpio7";
2106 drive-strength = <6>;
2107 bias-disable;
2108 };
2109 };
2110 };
2111
2112 /* SE 10 pin mappings */
2113 qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
2114 qupv3_se10_i2c_active: qupv3_se10_i2c_active {
2115 mux {
2116 pins = "gpio55", "gpio56";
2117 function = "qup10";
2118 };
2119
2120 config {
2121 pins = "gpio55", "gpio56";
2122 drive-strength = <2>;
2123 bias-disable;
2124 };
2125 };
2126
2127 qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
2128 mux {
2129 pins = "gpio55", "gpio56";
2130 function = "gpio";
2131 };
2132
2133 config {
2134 pins = "gpio55", "gpio56";
2135 drive-strength = <2>;
2136 bias-pull-up;
2137 };
2138 };
2139 };
2140
2141 qupv3_se10_2uart_pins: qupv3_se10_2uart_pins {
2142 qupv3_se10_2uart_active: qupv3_se10_2uart_active {
2143 mux {
2144 pins = "gpio53", "gpio54";
2145 function = "qup10";
2146 };
2147
2148 config {
2149 pins = "gpio53", "gpio54";
2150 drive-strength = <2>;
2151 bias-disable;
2152 };
2153 };
2154
2155 qupv3_se10_2uart_sleep: qupv3_se10_2uart_sleep {
2156 mux {
2157 pins = "gpio53", "gpio54";
2158 function = "gpio";
2159 };
2160
2161 config {
2162 pins = "gpio53", "gpio54";
2163 drive-strength = <2>;
2164 bias-disable;
2165 };
2166 };
2167 };
2168
2169 qupv3_se10_spi_pins: qupv3_se10_spi_pins {
2170 qupv3_se10_spi_active: qupv3_se10_spi_active {
2171 mux {
2172 pins = "gpio53", "gpio54", "gpio55",
2173 "gpio56";
2174 function = "qup10";
2175 };
2176
2177 config {
2178 pins = "gpio53", "gpio54", "gpio55",
2179 "gpio56";
2180 drive-strength = <6>;
2181 bias-disable;
2182 };
2183 };
2184
2185 qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
2186 mux {
2187 pins = "gpio53", "gpio54", "gpio55",
2188 "gpio56";
2189 function = "gpio";
2190 };
2191
2192 config {
2193 pins = "gpio53", "gpio54", "gpio55",
2194 "gpio56";
2195 drive-strength = <6>;
2196 bias-disable;
2197 };
2198 };
2199 };
2200
2201 /* SE 11 pin mappings */
2202 qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
2203 qupv3_se11_i2c_active: qupv3_se11_i2c_active {
2204 mux {
2205 pins = "gpio31", "gpio32";
2206 function = "qup11";
2207 };
2208
2209 config {
2210 pins = "gpio31", "gpio32";
2211 drive-strength = <2>;
2212 bias-disable;
2213 };
2214 };
2215
2216 qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
2217 mux {
2218 pins = "gpio31", "gpio32";
2219 function = "gpio";
2220 };
2221
2222 config {
2223 pins = "gpio31", "gpio32";
2224 drive-strength = <2>;
2225 bias-pull-up;
2226 };
2227 };
2228 };
2229
2230 qupv3_se11_spi_pins: qupv3_se11_spi_pins {
2231 qupv3_se11_spi_active: qupv3_se11_spi_active {
2232 mux {
2233 pins = "gpio31", "gpio32", "gpio33",
2234 "gpio34";
2235 function = "qup11";
2236 };
2237
2238 config {
2239 pins = "gpio31", "gpio32", "gpio33",
2240 "gpio34";
2241 drive-strength = <6>;
2242 bias-disable;
2243 };
2244 };
2245
2246 qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
2247 mux {
2248 pins = "gpio31", "gpio32", "gpio33",
2249 "gpio34";
2250 function = "gpio";
2251 };
2252
2253 config {
2254 pins = "gpio31", "gpio32", "gpio33",
2255 "gpio34";
2256 drive-strength = <6>;
2257 bias-disable;
2258 };
2259 };
2260 };
2261
2262 /* SE 12 pin mappings */
2263 qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
2264 qupv3_se12_i2c_active: qupv3_se12_i2c_active {
2265 mux {
2266 pins = "gpio49", "gpio50";
2267 function = "qup12";
2268 };
2269
2270 config {
2271 pins = "gpio49", "gpio50";
2272 drive-strength = <2>;
2273 bias-disable;
2274 };
2275 };
2276
2277 qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
2278 mux {
2279 pins = "gpio49", "gpio50";
2280 function = "gpio";
2281 };
2282
2283 config {
2284 pins = "gpio49", "gpio50";
2285 drive-strength = <2>;
2286 bias-pull-up;
2287 };
2288 };
2289 };
2290
2291 qupv3_se12_spi_pins: qupv3_se12_spi_pins {
2292 qupv3_se12_spi_active: qupv3_se12_spi_active {
2293 mux {
2294 pins = "gpio49", "gpio50", "gpio51",
2295 "gpio52";
2296 function = "qup12";
2297 };
2298
2299 config {
2300 pins = "gpio49", "gpio50", "gpio51",
2301 "gpio52";
2302 drive-strength = <6>;
2303 bias-disable;
2304 };
2305 };
2306
2307 qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
2308 mux {
2309 pins = "gpio49", "gpio50", "gpio51",
2310 "gpio52";
2311 function = "gpio";
2312 };
2313
2314 config {
2315 pins = "gpio49", "gpio50", "gpio51",
2316 "gpio52";
2317 drive-strength = <6>;
2318 bias-disable;
2319 };
2320 };
2321 };
2322
2323 /* SE 13 pin mappings */
2324 qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
2325 qupv3_se13_i2c_active: qupv3_se13_i2c_active {
2326 mux {
2327 pins = "gpio105", "gpio106";
2328 function = "qup13";
2329 };
2330
2331 config {
2332 pins = "gpio105", "gpio106";
2333 drive-strength = <2>;
2334 bias-disable;
2335 };
2336 };
2337
2338 qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
2339 mux {
2340 pins = "gpio105", "gpio106";
2341 function = "gpio";
2342 };
2343
2344 config {
2345 pins = "gpio105", "gpio106";
2346 drive-strength = <2>;
2347 bias-pull-up;
2348 };
2349 };
2350 };
2351
2352 qupv3_se13_spi_pins: qupv3_se13_spi_pins {
2353 qupv3_se13_spi_active: qupv3_se13_spi_active {
2354 mux {
2355 pins = "gpio105", "gpio106", "gpio107",
2356 "gpio108";
2357 function = "qup13";
2358 };
2359
2360 config {
2361 pins = "gpio105", "gpio106", "gpio107",
2362 "gpio108";
2363 drive-strength = <6>;
2364 bias-disable;
2365 };
2366 };
2367
2368 qupv3_se13_spi_sleep: qupv3_se13_spi_sleep {
2369 mux {
2370 pins = "gpio105", "gpio106", "gpio107",
2371 "gpio108";
2372 function = "gpio";
2373 };
2374
2375 config {
2376 pins = "gpio105", "gpio106", "gpio107",
2377 "gpio108";
2378 drive-strength = <6>;
2379 bias-disable;
2380 };
2381 };
2382 };
2383
2384 /* SE 14 pin mappings */
2385 qupv3_se14_i2c_pins: qupv3_se14_i2c_pins {
2386 qupv3_se14_i2c_active: qupv3_se14_i2c_active {
2387 mux {
2388 pins = "gpio33", "gpio34";
2389 function = "qup14";
2390 };
2391
2392 config {
2393 pins = "gpio33", "gpio34";
2394 drive-strength = <2>;
2395 bias-disable;
2396 };
2397 };
2398
2399 qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep {
2400 mux {
2401 pins = "gpio33", "gpio34";
2402 function = "gpio";
2403 };
2404
2405 config {
2406 pins = "gpio33", "gpio34";
2407 drive-strength = <2>;
2408 bias-pull-up;
2409 };
2410 };
2411 };
2412
2413 qupv3_se14_spi_pins: qupv3_se14_spi_pins {
2414 qupv3_se14_spi_active: qupv3_se14_spi_active {
2415 mux {
2416 pins = "gpio31", "gpio32", "gpio33",
2417 "gpio34";
2418 function = "qup14";
2419 };
2420
2421 config {
2422 pins = "gpio31", "gpio32", "gpio33",
2423 "gpio34";
2424 drive-strength = <6>;
2425 bias-disable;
2426 };
2427 };
2428
2429 qupv3_se14_spi_sleep: qupv3_se14_spi_sleep {
2430 mux {
2431 pins = "gpio31", "gpio32", "gpio33",
2432 "gpio34";
2433 function = "gpio";
2434 };
2435
2436 config {
2437 pins = "gpio31", "gpio32", "gpio33",
2438 "gpio34";
2439 drive-strength = <6>;
2440 bias-disable;
2441 };
2442 };
2443 };
2444
2445 /* SE 15 pin mappings */
2446 qupv3_se15_i2c_pins: qupv3_se15_i2c_pins {
2447 qupv3_se15_i2c_active: qupv3_se15_i2c_active {
2448 mux {
2449 pins = "gpio81", "gpio82";
2450 function = "qup15";
2451 };
2452
2453 config {
2454 pins = "gpio81", "gpio82";
2455 drive-strength = <2>;
2456 bias-disable;
2457 };
2458 };
2459
2460 qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep {
2461 mux {
2462 pins = "gpio81", "gpio82";
2463 function = "gpio";
2464 };
2465
2466 config {
2467 pins = "gpio81", "gpio82";
2468 drive-strength = <2>;
2469 bias-pull-up;
2470 };
2471 };
2472 };
2473
2474 qupv3_se15_spi_pins: qupv3_se15_spi_pins {
2475 qupv3_se15_spi_active: qupv3_se15_spi_active {
2476 mux {
2477 pins = "gpio81", "gpio82", "gpio83",
2478 "gpio84";
2479 function = "qup15";
2480 };
2481
2482 config {
2483 pins = "gpio81", "gpio82", "gpio83",
2484 "gpio84";
2485 drive-strength = <6>;
2486 bias-disable;
2487 };
2488 };
2489
2490 qupv3_se15_spi_sleep: qupv3_se15_spi_sleep {
2491 mux {
2492 pins = "gpio81", "gpio82", "gpio83",
2493 "gpio84";
2494 function = "gpio";
2495 };
2496
2497 config {
2498 pins = "gpio81", "gpio82", "gpio83",
2499 "gpio84";
2500 drive-strength = <6>;
2501 bias-disable;
2502 };
2503 };
2504 };
Jigarkumar Zala861231152017-02-28 14:05:11 -08002505
2506 cci0_active: cci0_active {
2507 mux {
2508 /* CLK, DATA */
2509 pins = "gpio17","gpio18"; // Only 2
2510 function = "cci_i2c";
2511 };
2512
2513 config {
2514 pins = "gpio17","gpio18";
2515 bias-pull-up; /* PULL UP*/
2516 drive-strength = <2>; /* 2 MA */
2517 };
2518 };
2519
2520 cci0_suspend: cci0_suspend {
2521 mux {
2522 /* CLK, DATA */
2523 pins = "gpio17","gpio18";
2524 function = "cci_i2c";
2525 };
2526
2527 config {
2528 pins = "gpio17","gpio18";
2529 bias-pull-down; /* PULL DOWN */
2530 drive-strength = <2>; /* 2 MA */
2531 };
2532 };
2533
2534 cci1_active: cci1_active {
2535 mux {
2536 /* CLK, DATA */
2537 pins = "gpio19","gpio20";
2538 function = "cci_i2c";
2539 };
2540
2541 config {
2542 pins = "gpio19","gpio20";
2543 bias-pull-up; /* PULL UP*/
2544 drive-strength = <2>; /* 2 MA */
2545 };
2546 };
2547
2548 cci1_suspend: cci1_suspend {
2549 mux {
2550 /* CLK, DATA */
2551 pins = "gpio19","gpio20";
2552 function = "cci_i2c";
2553 };
2554
2555 config {
2556 pins = "gpio19","gpio20";
2557 bias-pull-down; /* PULL DOWN */
2558 drive-strength = <2>; /* 2 MA */
2559 };
2560 };
2561
2562 cam_sensor_mclk0_active: cam_sensor_mclk0_active {
2563 /* MCLK0 */
2564 mux {
2565 pins = "gpio13";
2566 function = "cam_mclk";
2567 };
2568
2569 config {
2570 pins = "gpio13";
2571 bias-disable; /* No PULL */
2572 drive-strength = <2>; /* 2 MA */
2573 };
2574 };
2575
2576 cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend {
2577 /* MCLK0 */
2578 mux {
2579 pins = "gpio13";
2580 function = "cam_mclk";
2581 };
2582
2583 config {
2584 pins = "gpio13";
2585 bias-pull-down; /* PULL DOWN */
2586 drive-strength = <2>; /* 2 MA */
2587 };
2588 };
2589
2590 cam_sensor_rear_active: cam_sensor_rear_active {
2591 /* RESET, AVDD LDO */
2592 mux {
2593 pins = "gpio80","gpio79";
2594 function = "gpio";
2595 };
2596
2597 config {
2598 pins = "gpio80","gpio79";
2599 bias-disable; /* No PULL */
2600 drive-strength = <2>; /* 2 MA */
2601 };
2602 };
2603
2604 cam_sensor_rear_suspend: cam_sensor_rear_suspend {
2605 /* RESET, AVDD LDO */
2606 mux {
2607 pins = "gpio80","gpio79";
2608 function = "gpio";
2609 };
2610
2611 config {
2612 pins = "gpio80","gpio79";
2613 bias-disable; /* No PULL */
2614 drive-strength = <2>; /* 2 MA */
2615 };
2616 };
2617
2618 cam_sensor_mclk1_active: cam_sensor_mclk1_active {
2619 /* MCLK1 */
2620 mux {
2621 pins = "gpio14";
2622 function = "cam_mclk";
2623 };
2624
2625 config {
2626 pins = "gpio14";
2627 bias-disable; /* No PULL */
2628 drive-strength = <2>; /* 2 MA */
2629 };
2630 };
2631
2632 cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend {
2633 /* MCLK1 */
2634 mux {
2635 pins = "gpio14";
2636 function = "cam_mclk";
2637 };
2638
2639 config {
2640 pins = "gpio14";
2641 bias-pull-down; /* PULL DOWN */
2642 drive-strength = <2>; /* 2 MA */
2643 };
2644 };
2645
2646 cam_sensor_front_active: cam_sensor_front_active {
2647 /* RESET AVDD_LDO*/
2648 mux {
2649 pins = "gpio28", "gpio8";
2650 function = "gpio";
2651 };
2652
2653 config {
2654 pins = "gpio28", "gpio8";
2655 bias-disable; /* No PULL */
2656 drive-strength = <2>; /* 2 MA */
2657 };
2658 };
2659
2660 cam_sensor_front_suspend: cam_sensor_front_suspend {
2661 /* RESET */
2662 mux {
2663 pins = "gpio28";
2664 function = "gpio";
2665 };
2666
2667 config {
2668 pins = "gpio28";
2669 bias-disable; /* No PULL */
2670 drive-strength = <2>; /* 2 MA */
2671 };
2672 };
2673
2674 cam_sensor_mclk2_active: cam_sensor_mclk2_active {
2675 /* MCLK1 */
2676 mux {
2677 /* CLK, DATA */
2678 pins = "gpio15";
2679 function = "cam_mclk";
2680 };
2681
2682 config {
2683 pins = "gpio15";
2684 bias-disable; /* No PULL */
2685 drive-strength = <2>; /* 2 MA */
2686 };
2687 };
2688
2689 cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend {
2690 /* MCLK1 */
2691 mux {
2692 /* CLK, DATA */
2693 pins = "gpio15";
2694 function = "cam_mclk";
2695 };
2696
2697 config {
2698 pins = "gpio15";
2699 bias-pull-down; /* PULL DOWN */
2700 drive-strength = <2>; /* 2 MA */
2701 };
2702 };
2703
2704 cam_sensor_rear2_active: cam_sensor_rear2_active {
2705 /* RESET, STANDBY */
2706 mux {
2707 pins = "gpio9","gpio8";
2708 function = "gpio";
2709 };
2710
2711 config {
2712 pins = "gpio9","gpio8";
2713 bias-disable; /* No PULL */
2714 drive-strength = <2>; /* 2 MA */
2715 };
2716 };
2717
2718 cam_sensor_rear2_suspend: cam_sensor_rear2_suspend {
2719 /* RESET, STANDBY */
2720 mux {
2721 pins = "gpio9","gpio8";
2722 function = "gpio";
2723 };
2724 config {
2725 pins = "gpio9","gpio8";
2726 bias-disable; /* No PULL */
2727 drive-strength = <2>; /* 2 MA */
2728 };
2729 };
Satyajit Desaie4508132017-04-05 17:15:22 -07002730
2731 trigout_a: trigout_a {
2732 mux {
Satyajit Desai602a6712017-05-09 14:45:16 -07002733 pins = "gpio90";
Satyajit Desaie4508132017-04-05 17:15:22 -07002734 function = "qdss_cti";
2735 };
2736 config {
Satyajit Desai602a6712017-05-09 14:45:16 -07002737 pins = "gpio90";
Satyajit Desaie4508132017-04-05 17:15:22 -07002738 drive-strength = <2>;
2739 bias-disable;
2740 };
2741 };
Kyle Yan679cbee2016-07-27 16:55:20 -07002742 };
2743};
David Collinsc6686252017-03-31 14:23:09 -07002744
2745&pm8998_gpios {
Gaurav Singhalf6d253d2017-05-11 08:24:40 +05302746 gpio@d400 {
2747 qcom,mode = <0>;
2748 qcom,vin-sel = <1>;
2749 qcom,src-sel = <0>;
2750 qcom,master-en = <1>;
2751 status = "okay";
2752 };
2753
David Collinsc6686252017-03-31 14:23:09 -07002754 key_home {
2755 key_home_default: key_home_default {
2756 pins = "gpio5";
2757 function = "normal";
2758 input-enable;
2759 bias-pull-up;
2760 power-source = <0>;
2761 };
2762 };
2763
2764 key_vol_up {
2765 key_vol_up_default: key_vol_up_default {
2766 pins = "gpio6";
2767 function = "normal";
2768 input-enable;
2769 bias-pull-up;
2770 power-source = <0>;
2771 };
2772 };
2773
2774 key_cam_snapshot {
2775 key_cam_snapshot_default: key_cam_snapshot_default {
2776 pins = "gpio7";
2777 function = "normal";
2778 input-enable;
2779 bias-pull-up;
2780 power-source = <0>;
2781 };
2782 };
2783
2784 key_cam_focus {
2785 key_cam_focus_default: key_cam_focus_default {
2786 pins = "gpio8";
2787 function = "normal";
2788 input-enable;
2789 bias-pull-up;
2790 power-source = <0>;
2791 };
2792 };
Jigarkumar Zala861231152017-02-28 14:05:11 -08002793
2794 camera_dvdd_en {
2795 camera_dvdd_en_default: camera_dvdd_en_default {
2796 pins = "gpio9";
2797 function = "normal";
2798 power-source = <0>;
2799 output-low;
2800 };
2801 };
2802
2803 camera_rear_dvdd_en {
2804 camera_rear_dvdd_en_default: camera_rear_dvdd_en_default {
2805 pins = "gpio12";
2806 function = "normal";
2807 power-source = <0>;
2808 output-low;
2809 };
2810 };
David Collinsc6686252017-03-31 14:23:09 -07002811};
Jack Phamc2160c842017-04-05 09:48:59 -07002812
2813&pmi8998_gpios {
2814 usb2_vbus_boost {
2815 usb2_vbus_boost_default: usb2_vbus_boost_default {
2816 pins = "gpio2";
2817 function = "normal";
2818 output-low;
2819 power-source = <0>;
2820 };
2821 };
2822
2823 usb2_vbus_det {
2824 usb2_vbus_det_default: usb2_vbus_det_default {
2825 pins = "gpio8";
2826 function = "normal";
2827 input-enable;
2828 bias-pull-down;
2829 power-source = <1>; /* VPH input supply */
2830 };
2831 };
2832
2833 usb2_id_det {
2834 usb2_id_det_default: usb2_id_det_default {
2835 pins = "gpio9";
2836 function = "normal";
2837 input-enable;
2838 bias-pull-up;
2839 power-source = <0>;
2840 };
2841 };
Harry Yang4c05d3e42017-05-09 16:18:17 -07002842
2843 usb2_ext_5v_boost {
2844 usb2_ext_5v_boost_default: usb2_ext_5v_boost_default {
2845 pins = "gpio10";
2846 function = "normal";
2847 output-low;
2848 power-source = <0>;
2849 };
2850 };
Jack Phamc2160c842017-04-05 09:48:59 -07002851};