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Tony Lindgren1dbae812005-11-10 14:26:51 +00001/*
2 * linux/arch/arm/mach-omap2/id.c
3 *
4 * OMAP2 CPU identification code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
8 *
Nishant Kamate49c4d22011-02-17 09:55:03 -08009 * Copyright (C) 2009-11 Texas Instruments
Santosh Shilimkar44169072009-05-28 14:16:04 -070010 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
Tony Lindgren1dbae812005-11-10 14:26:51 +000012 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
Tony Lindgren1dbae812005-11-10 14:26:51 +000017#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/init.h>
Russell Kingfced80c2008-09-06 12:10:45 +010020#include <linux/io.h>
Tony Lindgren1dbae812005-11-10 14:26:51 +000021
Russell King0ba8b9b2008-08-10 18:08:10 +010022#include <asm/cputype.h>
Tony Lindgren1dbae812005-11-10 14:26:51 +000023
Tony Lindgren4e653312011-11-10 22:45:17 +010024#include "common.h"
Syed Mohammed Khasim72d0f1c2006-12-06 17:14:05 -080025
Tony Lindgren4952af42012-09-19 10:33:40 -070026#include "id.h"
Kan-Ru Chen2e130fc2010-08-02 14:21:41 +030027
Tony Lindgrendbc04162012-08-31 10:59:07 -070028#include "soc.h"
Paul Walmsley4814ced2010-10-08 11:40:20 -060029#include "control.h"
30
Ivan Khoronzhuk42a1cc92012-11-14 12:10:37 -080031#define OMAP4_SILICON_TYPE_STANDARD 0x01
32#define OMAP4_SILICON_TYPE_PERFORMANCE 0x02
33
Lauri Leukkunen84a34342008-12-10 17:36:31 -080034static unsigned int omap_revision;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +053035static const char *cpu_rev;
Aneesh Vcc0170b2011-07-02 08:00:22 +053036u32 omap_features;
Lauri Leukkunen84a34342008-12-10 17:36:31 -080037
38unsigned int omap_rev(void)
39{
40 return omap_revision;
41}
42EXPORT_SYMBOL(omap_rev);
Paul Walmsley097c5842008-07-03 12:24:45 +030043
Kevin Hilman8e25ad92009-06-23 13:30:23 +030044int omap_type(void)
45{
46 u32 val = 0;
47
Felipe Balbiedeae652009-11-22 10:11:24 -080048 if (cpu_is_omap24xx()) {
Kevin Hilman8e25ad92009-06-23 13:30:23 +030049 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
Vaibhav Hiremath971b8a92012-07-05 08:05:15 -070050 } else if (soc_is_am33xx()) {
Afzal Mohammedfb3cfb12012-03-05 16:11:01 -080051 val = omap_ctrl_readl(AM33XX_CONTROL_STATUS);
Felipe Balbiedeae652009-11-22 10:11:24 -080052 } else if (cpu_is_omap34xx()) {
Kevin Hilman8e25ad92009-06-23 13:30:23 +030053 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
Santosh Shilimkar737daa02010-02-18 08:59:10 +000054 } else if (cpu_is_omap44xx()) {
Santosh Shilimkardcf5ef32010-09-27 14:02:58 -060055 val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
R Sricharanb13e80a2012-04-19 17:42:19 +053056 } else if (soc_is_omap54xx()) {
57 val = omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS);
58 val &= OMAP5_DEVICETYPE_MASK;
59 val >>= 6;
60 goto out;
Felipe Balbiedeae652009-11-22 10:11:24 -080061 } else {
Kevin Hilman8e25ad92009-06-23 13:30:23 +030062 pr_err("Cannot detect omap type!\n");
63 goto out;
64 }
65
66 val &= OMAP2_DEVICETYPE_MASK;
67 val >>= 8;
68
69out:
70 return val;
71}
72EXPORT_SYMBOL(omap_type);
73
74
Tony Lindgrena8823142008-12-10 17:36:30 -080075/*----------------------------------------------------------------------------*/
Paul Walmsley097c5842008-07-03 12:24:45 +030076
Tony Lindgrena8823142008-12-10 17:36:30 -080077#define OMAP_TAP_IDCODE 0x0204
78#define OMAP_TAP_DIE_ID_0 0x0218
79#define OMAP_TAP_DIE_ID_1 0x021C
80#define OMAP_TAP_DIE_ID_2 0x0220
81#define OMAP_TAP_DIE_ID_3 0x0224
Paul Walmsley097c5842008-07-03 12:24:45 +030082
Andy Greenb235e002011-03-12 22:50:54 +000083#define OMAP_TAP_DIE_ID_44XX_0 0x0200
84#define OMAP_TAP_DIE_ID_44XX_1 0x0208
85#define OMAP_TAP_DIE_ID_44XX_2 0x020c
86#define OMAP_TAP_DIE_ID_44XX_3 0x0210
87
Tony Lindgrena8823142008-12-10 17:36:30 -080088#define read_tap_reg(reg) __raw_readl(tap_base + (reg))
Tony Lindgren0e564842008-10-06 15:49:16 +030089
Tony Lindgrena8823142008-12-10 17:36:30 -080090struct omap_id {
91 u16 hawkeye; /* Silicon type (Hawkeye id) */
92 u8 dev; /* Device type from production_id reg */
Lauri Leukkunen84a34342008-12-10 17:36:31 -080093 u32 type; /* Combined type id copied to omap_revision */
Tony Lindgrena8823142008-12-10 17:36:30 -080094};
Tony Lindgren0e564842008-10-06 15:49:16 +030095
Tony Lindgrena8823142008-12-10 17:36:30 -080096/* Register values to detect the OMAP version */
97static struct omap_id omap_ids[] __initdata = {
98 { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
99 { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
100 { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
101 { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
102 { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
103 { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
104};
Paul Walmsley097c5842008-07-03 12:24:45 +0300105
Tony Lindgrena8823142008-12-10 17:36:30 -0800106static void __iomem *tap_base;
107static u16 tap_prod_id;
Tony Lindgren1dbae812005-11-10 14:26:51 +0000108
Kan-Ru Chen2e130fc2010-08-02 14:21:41 +0300109void omap_get_die_id(struct omap_die_id *odi)
110{
R Sricharanb13e80a2012-04-19 17:42:19 +0530111 if (cpu_is_omap44xx() || soc_is_omap54xx()) {
Andy Greenb235e002011-03-12 22:50:54 +0000112 odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0);
113 odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1);
114 odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2);
115 odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_3);
116
117 return;
118 }
Kan-Ru Chen2e130fc2010-08-02 14:21:41 +0300119 odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0);
120 odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1);
121 odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2);
122 odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
123}
124
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530125void __init omap2xxx_check_revision(void)
Tony Lindgren1dbae812005-11-10 14:26:51 +0000126{
127 int i, j;
Tony Lindgrena8823142008-12-10 17:36:30 -0800128 u32 idcode, prod_id;
Tony Lindgren1dbae812005-11-10 14:26:51 +0000129 u16 hawkeye;
Tony Lindgrena8823142008-12-10 17:36:30 -0800130 u8 dev_type, rev;
Kan-Ru Chenc46732b2010-08-02 14:21:41 +0300131 struct omap_die_id odi;
Tony Lindgren1dbae812005-11-10 14:26:51 +0000132
133 idcode = read_tap_reg(OMAP_TAP_IDCODE);
Tony Lindgren0e564842008-10-06 15:49:16 +0300134 prod_id = read_tap_reg(tap_prod_id);
Tony Lindgren1dbae812005-11-10 14:26:51 +0000135 hawkeye = (idcode >> 12) & 0xffff;
136 rev = (idcode >> 28) & 0x0f;
137 dev_type = (prod_id >> 16) & 0x0f;
Kan-Ru Chenc46732b2010-08-02 14:21:41 +0300138 omap_get_die_id(&odi);
Tony Lindgren1dbae812005-11-10 14:26:51 +0000139
Paul Walmsley097c5842008-07-03 12:24:45 +0300140 pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
141 idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
Kan-Ru Chenc46732b2010-08-02 14:21:41 +0300142 pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", odi.id_0);
Paul Walmsley097c5842008-07-03 12:24:45 +0300143 pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
Kan-Ru Chenc46732b2010-08-02 14:21:41 +0300144 odi.id_1, (odi.id_1 >> 28) & 0xf);
145 pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", odi.id_2);
146 pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", odi.id_3);
Paul Walmsley097c5842008-07-03 12:24:45 +0300147 pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
148 prod_id, dev_type);
149
Tony Lindgren1dbae812005-11-10 14:26:51 +0000150 /* Check hawkeye ids */
151 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
152 if (hawkeye == omap_ids[i].hawkeye)
153 break;
154 }
155
156 if (i == ARRAY_SIZE(omap_ids)) {
157 printk(KERN_ERR "Unknown OMAP CPU id\n");
158 return;
159 }
160
161 for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
162 if (dev_type == omap_ids[j].dev)
163 break;
164 }
165
166 if (j == ARRAY_SIZE(omap_ids)) {
Paul Walmsley7852ec02012-07-26 00:54:26 -0600167 pr_err("Unknown OMAP device type. Handling it as OMAP%04x\n",
168 omap_ids[i].type >> 16);
Tony Lindgren1dbae812005-11-10 14:26:51 +0000169 j = i;
170 }
Tony Lindgren1dbae812005-11-10 14:26:51 +0000171
Lauri Leukkunen84a34342008-12-10 17:36:31 -0800172 pr_info("OMAP%04x", omap_rev() >> 16);
173 if ((omap_rev() >> 8) & 0x0f)
174 pr_info("ES%x", (omap_rev() >> 12) & 0xf);
Paul Walmsley097c5842008-07-03 12:24:45 +0300175 pr_info("\n");
Tony Lindgren1dbae812005-11-10 14:26:51 +0000176}
177
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530178#define OMAP3_SHOW_FEATURE(feat) \
179 if (omap3_has_ ##feat()) \
180 printk(#feat" ");
181
182static void __init omap3_cpuinfo(void)
183{
184 const char *cpu_name;
185
186 /*
187 * OMAP3430 and OMAP3530 are assumed to be same.
188 *
189 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
190 * on available features. Upon detection, update the CPU id
191 * and CPU class bits.
192 */
193 if (cpu_is_omap3630()) {
194 cpu_name = "OMAP3630";
Kevin Hilman68a88b92012-04-30 16:37:10 -0700195 } else if (soc_is_am35xx()) {
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530196 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
197 } else if (cpu_is_ti816x()) {
198 cpu_name = "TI816X";
Vaibhav Hiremath971b8a92012-07-05 08:05:15 -0700199 } else if (soc_is_am335x()) {
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530200 cpu_name = "AM335X";
201 } else if (cpu_is_ti814x()) {
202 cpu_name = "TI814X";
203 } else if (omap3_has_iva() && omap3_has_sgx()) {
204 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
205 cpu_name = "OMAP3430/3530";
206 } else if (omap3_has_iva()) {
207 cpu_name = "OMAP3525";
208 } else if (omap3_has_sgx()) {
209 cpu_name = "OMAP3515";
210 } else {
211 cpu_name = "OMAP3503";
212 }
213
214 /* Print verbose information */
215 pr_info("%s ES%s (", cpu_name, cpu_rev);
216
217 OMAP3_SHOW_FEATURE(l2cache);
218 OMAP3_SHOW_FEATURE(iva);
219 OMAP3_SHOW_FEATURE(sgx);
220 OMAP3_SHOW_FEATURE(neon);
221 OMAP3_SHOW_FEATURE(isp);
222 OMAP3_SHOW_FEATURE(192mhz_clk);
223
224 printk(")\n");
225}
226
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800227#define OMAP3_CHECK_FEATURE(status,feat) \
228 if (((status & OMAP3_ ##feat## _MASK) \
229 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \
Aneesh Vcc0170b2011-07-02 08:00:22 +0530230 omap_features |= OMAP3_HAS_ ##feat; \
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800231 }
232
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530233void __init omap3xxx_check_features(void)
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800234{
235 u32 status;
236
Aneesh Vcc0170b2011-07-02 08:00:22 +0530237 omap_features = 0;
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800238
239 status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS);
240
241 OMAP3_CHECK_FEATURE(status, L2CACHE);
242 OMAP3_CHECK_FEATURE(status, IVA);
243 OMAP3_CHECK_FEATURE(status, SGX);
244 OMAP3_CHECK_FEATURE(status, NEON);
245 OMAP3_CHECK_FEATURE(status, ISP);
Vishwanath BS7356f0b2010-02-22 22:09:10 -0700246 if (cpu_is_omap3630())
Aneesh Vcc0170b2011-07-02 08:00:22 +0530247 omap_features |= OMAP3_HAS_192MHZ_CLK;
Paul Walmsleyb02b9172011-10-06 17:18:45 -0600248 if (cpu_is_omap3430() || cpu_is_omap3630())
Aneesh Vcc0170b2011-07-02 08:00:22 +0530249 omap_features |= OMAP3_HAS_IO_WAKEUP;
Paul Walmsleyb02b9172011-10-06 17:18:45 -0600250 if (cpu_is_omap3630() || omap_rev() == OMAP3430_REV_ES3_1 ||
251 omap_rev() == OMAP3430_REV_ES3_1_2)
252 omap_features |= OMAP3_HAS_IO_CHAIN_CTRL;
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800253
Aneesh Vcc0170b2011-07-02 08:00:22 +0530254 omap_features |= OMAP3_HAS_SDRC;
Hemant Pedanekar01001712011-02-16 08:31:39 -0800255
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800256 /*
Mark A. Greer1ce02992012-04-30 16:57:09 -0700257 * am35x fixups:
258 * - The am35x Chip ID register has bits 12, 7:5, and 3:2 marked as
259 * reserved and therefore return 0 when read. Unfortunately,
260 * OMAP3_CHECK_FEATURE() will interpret some of those zeroes to
261 * mean that a feature is present even though it isn't so clear
262 * the incorrectly set feature bits.
263 */
264 if (soc_is_am35xx())
265 omap_features &= ~(OMAP3_HAS_IVA | OMAP3_HAS_ISP);
266
267 /*
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800268 * TODO: Get additional info (where applicable)
269 * e.g. Size of L2 cache.
270 */
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530271
272 omap3_cpuinfo();
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800273}
274
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530275void __init omap4xxx_check_features(void)
Aneesh Vcc0170b2011-07-02 08:00:22 +0530276{
277 u32 si_type;
278
Ivan Khoronzhuk42a1cc92012-11-14 12:10:37 -0800279 si_type =
280 (read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1) >> 16) & 0x03;
Aneesh Vcc0170b2011-07-02 08:00:22 +0530281
Ivan Khoronzhuk42a1cc92012-11-14 12:10:37 -0800282 if (si_type == OMAP4_SILICON_TYPE_PERFORMANCE)
283 omap_features = OMAP4_HAS_PERF_SILICON;
Aneesh Vcc0170b2011-07-02 08:00:22 +0530284}
285
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530286void __init ti81xx_check_features(void)
Hemant Pedanekar01001712011-02-16 08:31:39 -0800287{
Aneesh Vcc0170b2011-07-02 08:00:22 +0530288 omap_features = OMAP3_HAS_NEON;
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530289 omap3_cpuinfo();
Hemant Pedanekar01001712011-02-16 08:31:39 -0800290}
291
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530292void __init omap3xxx_check_revision(void)
Tony Lindgrena8823142008-12-10 17:36:30 -0800293{
294 u32 cpuid, idcode;
295 u16 hawkeye;
296 u8 rev;
Tony Lindgrena8823142008-12-10 17:36:30 -0800297
298 /*
299 * We cannot access revision registers on ES1.0.
300 * If the processor type is Cortex-A8 and the revision is 0x0
301 * it means its Cortex r0p0 which is 3430 ES1.0.
302 */
303 cpuid = read_cpuid(CPUID_ID);
304 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
Lauri Leukkunen84a34342008-12-10 17:36:31 -0800305 omap_revision = OMAP3430_REV_ES1_0;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530306 cpu_rev = "1.0";
Sanjeev Premi048f4bd2009-11-22 10:10:54 -0800307 return;
Tony Lindgrena8823142008-12-10 17:36:30 -0800308 }
309
310 /*
311 * Detection for 34xx ES2.0 and above can be done with just
312 * hawkeye and rev. See TRM 1.5.2 Device Identification.
313 * Note that rev does not map directly to our defined processor
314 * revision numbers as ES1.0 uses value 0.
315 */
316 idcode = read_tap_reg(OMAP_TAP_IDCODE);
317 hawkeye = (idcode >> 12) & 0xffff;
318 rev = (idcode >> 28) & 0xff;
319
Nishanth Menon2456a102009-11-22 10:10:56 -0800320 switch (hawkeye) {
321 case 0xb7ae:
322 /* Handle 34xx/35xx devices */
Tony Lindgrena8823142008-12-10 17:36:30 -0800323 switch (rev) {
Sanjeev Premi048f4bd2009-11-22 10:10:54 -0800324 case 0: /* Take care of early samples */
325 case 1:
Lauri Leukkunen84a34342008-12-10 17:36:31 -0800326 omap_revision = OMAP3430_REV_ES2_0;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530327 cpu_rev = "2.0";
Tony Lindgrena8823142008-12-10 17:36:30 -0800328 break;
329 case 2:
Lauri Leukkunen84a34342008-12-10 17:36:31 -0800330 omap_revision = OMAP3430_REV_ES2_1;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530331 cpu_rev = "2.1";
Tony Lindgrena8823142008-12-10 17:36:30 -0800332 break;
333 case 3:
Lauri Leukkunen84a34342008-12-10 17:36:31 -0800334 omap_revision = OMAP3430_REV_ES3_0;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530335 cpu_rev = "3.0";
Tony Lindgrena8823142008-12-10 17:36:30 -0800336 break;
Tony Lindgren187e6882009-01-29 08:57:16 -0800337 case 4:
Tony Lindgrene9acb9b2010-01-19 15:40:26 -0800338 omap_revision = OMAP3430_REV_ES3_1;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530339 cpu_rev = "3.1";
Tony Lindgrene9acb9b2010-01-19 15:40:26 -0800340 break;
341 case 7:
Felipe Balbiedeae652009-11-22 10:11:24 -0800342 /* FALLTHROUGH */
Tony Lindgrena8823142008-12-10 17:36:30 -0800343 default:
344 /* Use the latest known revision as default */
Tony Lindgrene9acb9b2010-01-19 15:40:26 -0800345 omap_revision = OMAP3430_REV_ES3_1_2;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530346 cpu_rev = "3.1.2";
Tony Lindgrena8823142008-12-10 17:36:30 -0800347 }
Nishanth Menon2456a102009-11-22 10:10:56 -0800348 break;
Sanjeev Premi4cac6012009-11-22 10:10:58 -0800349 case 0xb868:
Paul Walmsley1f1b0352011-09-13 19:52:13 -0600350 /*
351 * Handle OMAP/AM 3505/3517 devices
Sanjeev Premi4cac6012009-11-22 10:10:58 -0800352 *
Paul Walmsley1f1b0352011-09-13 19:52:13 -0600353 * Set the device to be OMAP3517 here. Actual device
Sanjeev Premi4cac6012009-11-22 10:10:58 -0800354 * is identified later based on the features.
355 */
Paul Walmsley9ed2ba72011-09-13 19:52:14 -0600356 switch (rev) {
357 case 0:
Kevin Hilman68a88b92012-04-30 16:37:10 -0700358 omap_revision = AM35XX_REV_ES1_0;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530359 cpu_rev = "1.0";
Paul Walmsley9ed2ba72011-09-13 19:52:14 -0600360 break;
361 case 1:
362 /* FALLTHROUGH */
363 default:
Kevin Hilman68a88b92012-04-30 16:37:10 -0700364 omap_revision = AM35XX_REV_ES1_1;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530365 cpu_rev = "1.1";
Paul Walmsley9ed2ba72011-09-13 19:52:14 -0600366 }
Sanjeev Premi4cac6012009-11-22 10:10:58 -0800367 break;
Felipe Balbiedeae652009-11-22 10:11:24 -0800368 case 0xb891:
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000369 /* Handle 36xx devices */
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000370
371 switch(rev) {
372 case 0: /* Take care of early samples */
373 omap_revision = OMAP3630_REV_ES1_0;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530374 cpu_rev = "1.0";
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000375 break;
376 case 1:
377 omap_revision = OMAP3630_REV_ES1_1;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530378 cpu_rev = "1.1";
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000379 break;
380 case 2:
Paul Walmsley51ec8112011-09-13 19:52:15 -0600381 /* FALLTHROUGH */
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000382 default:
Paul Walmsley51ec8112011-09-13 19:52:15 -0600383 omap_revision = OMAP3630_REV_ES1_2;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530384 cpu_rev = "1.2";
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000385 }
Nishanth Menon77c08702010-08-16 09:21:19 +0300386 break;
Hemant Pedanekar01001712011-02-16 08:31:39 -0800387 case 0xb81e:
Hemant Pedanekar01001712011-02-16 08:31:39 -0800388 switch (rev) {
389 case 0:
390 omap_revision = TI8168_REV_ES1_0;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530391 cpu_rev = "1.0";
Hemant Pedanekar01001712011-02-16 08:31:39 -0800392 break;
393 case 1:
Paul Walmsley51ec8112011-09-13 19:52:15 -0600394 /* FALLTHROUGH */
Hemant Pedanekar01001712011-02-16 08:31:39 -0800395 default:
Paul Walmsley51ec8112011-09-13 19:52:15 -0600396 omap_revision = TI8168_REV_ES1_1;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530397 cpu_rev = "1.1";
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600398 break;
Hemant Pedanekar01001712011-02-16 08:31:39 -0800399 }
400 break;
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800401 case 0xb944:
AnilKumar Ch5af044f2013-02-01 15:58:22 +0530402 switch (rev) {
403 case 0:
404 omap_revision = AM335X_REV_ES1_0;
405 cpu_rev = "1.0";
406 break;
407 case 1:
408 /* FALLTHROUGH */
409 default:
410 omap_revision = AM335X_REV_ES2_0;
411 cpu_rev = "2.0";
412 break;
413 }
Vaibhav Hiremathc2d13552012-01-23 13:26:47 +0530414 break;
Hemant Pedanekar4390f5b2011-12-13 10:46:45 -0800415 case 0xb8f2:
416 switch (rev) {
417 case 0:
418 /* FALLTHROUGH */
419 case 1:
420 omap_revision = TI8148_REV_ES1_0;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530421 cpu_rev = "1.0";
Hemant Pedanekar4390f5b2011-12-13 10:46:45 -0800422 break;
423 case 2:
424 omap_revision = TI8148_REV_ES2_0;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530425 cpu_rev = "2.0";
Hemant Pedanekar4390f5b2011-12-13 10:46:45 -0800426 break;
427 case 3:
428 /* FALLTHROUGH */
429 default:
430 omap_revision = TI8148_REV_ES2_1;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530431 cpu_rev = "2.1";
Hemant Pedanekar4390f5b2011-12-13 10:46:45 -0800432 break;
433 }
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800434 break;
Nishanth Menon2456a102009-11-22 10:10:56 -0800435 default:
Paul Walmsley51ec8112011-09-13 19:52:15 -0600436 /* Unknown default to latest silicon rev as default */
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600437 omap_revision = OMAP3630_REV_ES1_2;
Vaibhav Hiremath50a01e62011-12-19 15:50:14 +0530438 cpu_rev = "1.2";
Paul Walmsley51ec8112011-09-13 19:52:15 -0600439 pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
Tony Lindgrena8823142008-12-10 17:36:30 -0800440 }
Tony Lindgrena8823142008-12-10 17:36:30 -0800441}
442
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530443void __init omap4xxx_check_revision(void)
Santosh Shilimkarb570e0e2009-12-11 16:16:34 -0800444{
445 u32 idcode;
446 u16 hawkeye;
447 u8 rev;
Santosh Shilimkarb570e0e2009-12-11 16:16:34 -0800448
449 /*
450 * The IC rev detection is done with hawkeye and rev.
451 * Note that rev does not map directly to defined processor
452 * revision numbers as ES1.0 uses value 0.
453 */
454 idcode = read_tap_reg(OMAP_TAP_IDCODE);
455 hawkeye = (idcode >> 12) & 0xffff;
Nishant Kamate49c4d22011-02-17 09:55:03 -0800456 rev = (idcode >> 28) & 0xf;
Santosh Shilimkarb570e0e2009-12-11 16:16:34 -0800457
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530458 /*
Aneesh Vfa54dcc2011-07-02 08:00:21 +0530459 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530460 * Use ARM register to detect the correct ES version
461 */
Leonid Iziumtsevec023e42011-12-13 10:46:44 -0800462 if (!rev && (hawkeye != 0xb94e) && (hawkeye != 0xb975)) {
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530463 idcode = read_cpuid(CPUID_ID);
464 rev = (idcode & 0xf) - 1;
Santosh Shilimkarb570e0e2009-12-11 16:16:34 -0800465 }
466
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530467 switch (hawkeye) {
468 case 0xb852:
469 switch (rev) {
470 case 0:
471 omap_revision = OMAP4430_REV_ES1_0;
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530472 break;
473 case 1:
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530474 default:
475 omap_revision = OMAP4430_REV_ES2_0;
Nishant Kamate49c4d22011-02-17 09:55:03 -0800476 }
477 break;
478 case 0xb95c:
479 switch (rev) {
480 case 3:
481 omap_revision = OMAP4430_REV_ES2_1;
Nishant Kamate49c4d22011-02-17 09:55:03 -0800482 break;
483 case 4:
Nishant Kamate49c4d22011-02-17 09:55:03 -0800484 omap_revision = OMAP4430_REV_ES2_2;
David Anders55035c12011-12-13 10:46:44 -0800485 break;
486 case 6:
487 default:
488 omap_revision = OMAP4430_REV_ES2_3;
Nishant Kamate49c4d22011-02-17 09:55:03 -0800489 }
490 break;
Aneesh Vfa54dcc2011-07-02 08:00:21 +0530491 case 0xb94e:
492 switch (rev) {
493 case 0:
Aneesh Vfa54dcc2011-07-02 08:00:21 +0530494 omap_revision = OMAP4460_REV_ES1_0;
Aneesh Vfa54dcc2011-07-02 08:00:21 +0530495 break;
Chris Lalancette33ee0db2012-05-09 09:45:02 -0700496 case 2:
497 default:
498 omap_revision = OMAP4460_REV_ES1_1;
499 break;
Aneesh Vfa54dcc2011-07-02 08:00:21 +0530500 }
501 break;
Leonid Iziumtsevec023e42011-12-13 10:46:44 -0800502 case 0xb975:
503 switch (rev) {
504 case 0:
505 default:
506 omap_revision = OMAP4470_REV_ES1_0;
507 break;
508 }
509 break;
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530510 default:
Nishant Kamate49c4d22011-02-17 09:55:03 -0800511 /* Unknown default to latest silicon rev as default */
David Anders55035c12011-12-13 10:46:44 -0800512 omap_revision = OMAP4430_REV_ES2_3;
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530513 }
514
Nishant Kamate49c4d22011-02-17 09:55:03 -0800515 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
516 ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf));
Santosh Shilimkarb570e0e2009-12-11 16:16:34 -0800517}
518
R Sricharanb13e80a2012-04-19 17:42:19 +0530519void __init omap5xxx_check_revision(void)
520{
521 u32 idcode;
522 u16 hawkeye;
523 u8 rev;
524
525 idcode = read_tap_reg(OMAP_TAP_IDCODE);
526 hawkeye = (idcode >> 12) & 0xffff;
527 rev = (idcode >> 28) & 0xff;
528 switch (hawkeye) {
529 case 0xb942:
530 switch (rev) {
531 case 0:
532 default:
533 omap_revision = OMAP5430_REV_ES1_0;
534 }
535 break;
536
537 case 0xb998:
538 switch (rev) {
539 case 0:
540 default:
541 omap_revision = OMAP5432_REV_ES1_0;
542 }
543 break;
544
545 default:
546 /* Unknown default to latest silicon rev as default*/
547 omap_revision = OMAP5430_REV_ES1_0;
548 }
549
550 pr_info("OMAP%04x ES%d.0\n",
551 omap_rev() >> 16, ((omap_rev() >> 12) & 0xf));
552}
553
Tony Lindgrena8823142008-12-10 17:36:30 -0800554/*
555 * Set up things for map_io and processor detection later on. Gets called
556 * pretty much first thing from board init. For multi-omap, this gets
557 * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
558 * detect the exact revision later on in omap2_detect_revision() once map_io
559 * is done.
560 */
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600561void __init omap2_set_globals_tap(u32 class, void __iomem *tap)
Tony Lindgren0e564842008-10-06 15:49:16 +0300562{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600563 omap_revision = class;
564 tap_base = tap;
Tony Lindgren0e564842008-10-06 15:49:16 +0300565
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600566 /* XXX What is this intended to do? */
Tony Lindgrena8823142008-12-10 17:36:30 -0800567 if (cpu_is_omap34xx())
Tony Lindgren0e564842008-10-06 15:49:16 +0300568 tap_prod_id = 0x0210;
569 else
570 tap_prod_id = 0x0208;
571}