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Banajit Goswamib016de92017-02-15 21:02:30 -08001/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
Kyle Yan679cbee2016-07-27 16:55:20 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&soc {
Channagoud Kadabieb7f0112017-04-03 20:39:27 -070014 tlmm: pinctrl@03400000 {
Kyle Yan6a20fae2017-02-14 13:34:41 -080015 compatible = "qcom,sdm845-pinctrl";
Channagoud Kadabieb7f0112017-04-03 20:39:27 -070016 reg = <0x03400000 0xc00000>;
Kyle Yan679cbee2016-07-27 16:55:20 -070017 interrupts = <0 208 0>;
18 gpio-controller;
19 #gpio-cells = <2>;
20 interrupt-controller;
21 #interrupt-cells = <2>;
Banajit Goswamib016de92017-02-15 21:02:30 -080022
Subhash Jadavaniafe2a792017-03-31 21:08:29 -070023 ufs_dev_reset_assert: ufs_dev_reset_assert {
24 config {
25 pins = "ufs_reset";
26 bias-pull-down; /* default: pull down */
27 /*
28 * UFS_RESET driver strengths are having
29 * different values/steps compared to typical
30 * GPIO drive strengths.
31 *
32 * Following table clarifies:
33 *
34 * HDRV value | UFS_RESET | Typical GPIO
35 * (dec) | (mA) | (mA)
36 * 0 | 0.8 | 2
37 * 1 | 1.55 | 4
38 * 2 | 2.35 | 6
39 * 3 | 3.1 | 8
40 * 4 | 3.9 | 10
41 * 5 | 4.65 | 12
42 * 6 | 5.4 | 14
43 * 7 | 6.15 | 16
44 *
45 * POR value for UFS_RESET HDRV is 3 which means
46 * 3.1mA and we want to use that. Hence just
47 * specify 8mA to "drive-strength" binding and
48 * that should result into writing 3 to HDRV
49 * field.
50 */
51 drive-strength = <8>; /* default: 3.1 mA */
52 output-low; /* active low reset */
53 };
54 };
55
56 ufs_dev_reset_deassert: ufs_dev_reset_deassert {
57 config {
58 pins = "ufs_reset";
59 bias-pull-down; /* default: pull down */
60 /*
61 * default: 3.1 mA
62 * check comments under ufs_dev_reset_assert
63 */
64 drive-strength = <8>;
65 output-high; /* active low reset */
66 };
67 };
68
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070069 flash_led3_front {
70 flash_led3_front_en: flash_led3_front_en {
71 mux {
72 pins = "gpio21";
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070073 function = "gpio";
74 };
75
76 config {
77 pins = "gpio21";
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070078 drive_strength = <2>;
79 output-high;
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070080 bias-disable;
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070081 };
82 };
83
84 flash_led3_front_dis: flash_led3_front_dis {
85 mux {
86 pins = "gpio21";
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070087 function = "gpio";
88 };
89
90 config {
91 pins = "gpio21";
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070092 drive_strength = <2>;
93 output-low;
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070094 bias-disable;
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070095 };
96 };
97 };
Subhash Jadavaniafe2a792017-03-31 21:08:29 -070098
Banajit Goswamib016de92017-02-15 21:02:30 -080099 wcd9xxx_intr {
100 wcd_intr_default: wcd_intr_default{
101 mux {
102 pins = "gpio54";
103 function = "gpio";
104 };
105
106 config {
107 pins = "gpio54";
108 drive-strength = <2>; /* 2 mA */
109 bias-pull-down; /* pull down */
110 input-enable;
111 };
112 };
113 };
114
Subhash Jadavanidd416c42017-05-15 11:54:10 -0700115 storage_cd: storage_cd {
116 mux {
117 pins = "gpio126";
118 function = "gpio";
119 };
120
121 config {
122 pins = "gpio126";
123 bias-pull-up; /* pull up */
124 drive-strength = <2>; /* 2 MA */
125 };
126 };
127
Xiaonian Wang898e0902017-04-08 06:46:29 +0800128 sdc2_clk_on: sdc2_clk_on {
129 config {
130 pins = "sdc2_clk";
131 bias-disable; /* NO pull */
132 drive-strength = <16>; /* 16 MA */
133 };
134 };
135
136 sdc2_clk_off: sdc2_clk_off {
137 config {
138 pins = "sdc2_clk";
139 bias-disable; /* NO pull */
140 drive-strength = <2>; /* 2 MA */
141 };
142 };
143
144 sdc2_cmd_on: sdc2_cmd_on {
145 config {
146 pins = "sdc2_cmd";
147 bias-pull-up; /* pull up */
148 drive-strength = <10>; /* 10 MA */
149 };
150 };
151
152 sdc2_cmd_off: sdc2_cmd_off {
153 config {
154 pins = "sdc2_cmd";
155 bias-pull-up; /* pull up */
156 drive-strength = <2>; /* 2 MA */
157 };
158 };
159
160 sdc2_data_on: sdc2_data_on {
161 config {
162 pins = "sdc2_data";
163 bias-pull-up; /* pull up */
164 drive-strength = <10>; /* 10 MA */
165 };
166 };
167
168 sdc2_data_off: sdc2_data_off {
169 config {
170 pins = "sdc2_data";
171 bias-pull-up; /* pull up */
172 drive-strength = <2>; /* 2 MA */
173 };
174 };
175
Tony Truongc0e0a5f02017-03-15 11:57:40 -0700176 pcie0 {
177 pcie0_clkreq_default: pcie0_clkreq_default {
178 mux {
179 pins = "gpio36";
180 function = "pci_e0";
181 };
182
183 config {
184 pins = "gpio36";
185 drive-strength = <2>;
186 bias-pull-up;
187 };
188 };
189
190 pcie0_perst_default: pcie0_perst_default {
191 mux {
192 pins = "gpio35";
193 function = "gpio";
194 };
195
196 config {
197 pins = "gpio35";
198 drive-strength = <2>;
199 bias-pull-down;
200 };
201 };
202
203 pcie0_wake_default: pcie0_wake_default {
204 mux {
205 pins = "gpio37";
206 function = "gpio";
207 };
208
209 config {
210 pins = "gpio37";
211 drive-strength = <2>;
212 bias-pull-down;
213 };
214 };
215 };
216
Banajit Goswamib016de92017-02-15 21:02:30 -0800217 cdc_reset_ctrl {
218 cdc_reset_sleep: cdc_reset_sleep {
219 mux {
220 pins = "gpio64";
221 function = "gpio";
222 };
223 config {
224 pins = "gpio64";
225 drive-strength = <2>;
226 bias-disable;
227 output-low;
228 };
229 };
230
231 cdc_reset_active:cdc_reset_active {
232 mux {
233 pins = "gpio64";
234 function = "gpio";
235 };
236 config {
237 pins = "gpio64";
238 drive-strength = <8>;
239 bias-pull-down;
240 output-high;
241 };
242 };
243 };
244
245 spkr_i2s_clk_pin {
246 spkr_i2s_clk_sleep: spkr_i2s_clk_sleep {
247 mux {
248 pins = "gpio69";
249 function = "spkr_i2s";
250 };
251
252 config {
253 pins = "gpio69";
254 drive-strength = <2>; /* 2 mA */
255 bias-pull-down; /* PULL DOWN */
256 };
257 };
258
259 spkr_i2s_clk_active: spkr_i2s_clk_active {
260 mux {
261 pins = "gpio69";
262 function = "spkr_i2s";
263 };
264
265 config {
266 pins = "gpio69";
267 drive-strength = <8>; /* 8 mA */
268 bias-disable; /* NO PULL */
269 };
270 };
271 };
272
273 wcd_gnd_mic_swap {
274 wcd_gnd_mic_swap_idle: wcd_gnd_mic_swap_idle {
275 mux {
276 pins = "gpio51";
277 function = "gpio";
278 };
279 config {
280 pins = "gpio51";
281 drive-strength = <2>;
282 bias-pull-down;
283 output-low;
284 };
285 };
286
287 wcd_gnd_mic_swap_active: wcd_gnd_mic_swap_active {
288 mux {
289 pins = "gpio51";
290 function = "gpio";
291 };
292 config {
293 pins = "gpio51";
294 drive-strength = <2>;
295 bias-disable;
296 output-high;
297 };
298 };
299 };
300
Karthikeyan Mani5bce47c2017-05-26 15:19:04 -0700301 /* USB C analog configuration */
302 wcd_usbc_analog_en1 {
303 wcd_usbc_analog_en1_idle: wcd_usbc_ana_en1_idle {
304 mux {
305 pins = "gpio49";
306 function = "gpio";
307 };
308 config {
309 pins = "gpio49";
310 drive-strength = <2>;
311 bias-pull-down;
312 output-low;
313 };
314 };
315
316 wcd_usbc_analog_en1_active: wcd_usbc_ana_en1_active {
317 mux {
318 pins = "gpio49";
319 function = "gpio";
320 };
321 config {
322 pins = "gpio49";
323 drive-strength = <2>;
324 bias-disable;
325 output-high;
326 };
327 };
328 };
329
330 wcd_usbc_analog_en2 {
331 wcd_usbc_analog_en2_idle: wcd_usbc_ana_en2_idle {
332 mux {
333 pins = "gpio51";
334 function = "gpio";
335 };
336 config {
337 pins = "gpio51";
338 drive-strength = <2>;
339 bias-pull-down;
340 output-low;
341 };
342 };
343
344 wcd_usbc_analog_en2_active: wcd_usbc_ana_en2_active {
345 mux {
346 pins = "gpio51";
347 function = "gpio";
348 };
349 config {
350 pins = "gpio51";
351 drive-strength = <2>;
352 bias-disable;
353 output-high;
354 };
355 };
356 };
357
Banajit Goswamib016de92017-02-15 21:02:30 -0800358 pri_aux_pcm_clk {
359 pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep {
360 mux {
361 pins = "gpio65";
362 function = "gpio";
363 };
364
365 config {
366 pins = "gpio65";
367 drive-strength = <2>; /* 2 mA */
368 bias-pull-down; /* PULL DOWN */
369 input-enable;
370 };
371 };
372
373 pri_aux_pcm_clk_active: pri_aux_pcm_clk_active {
374 mux {
375 pins = "gpio65";
376 function = "pri_mi2s";
377 };
378
379 config {
380 pins = "gpio65";
381 drive-strength = <8>; /* 8 mA */
382 bias-disable; /* NO PULL */
383 output-high;
384 };
385 };
386 };
387
388 pri_aux_pcm_sync {
389 pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep {
390 mux {
391 pins = "gpio66";
392 function = "gpio";
393 };
394
395 config {
396 pins = "gpio66";
397 drive-strength = <2>; /* 2 mA */
398 bias-pull-down; /* PULL DOWN */
399 input-enable;
400 };
401 };
402
403 pri_aux_pcm_sync_active: pri_aux_pcm_sync_active {
404 mux {
405 pins = "gpio66";
406 function = "pri_mi2s_ws";
407 };
408
409 config {
410 pins = "gpio66";
411 drive-strength = <8>; /* 8 mA */
412 bias-disable; /* NO PULL */
413 output-high;
414 };
415 };
416 };
417
418 pri_aux_pcm_din {
419 pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep {
420 mux {
421 pins = "gpio67";
422 function = "gpio";
423 };
424
425 config {
426 pins = "gpio67";
427 drive-strength = <2>; /* 2 mA */
428 bias-pull-down; /* PULL DOWN */
429 input-enable;
430 };
431 };
432
433 pri_aux_pcm_din_active: pri_aux_pcm_din_active {
434 mux {
435 pins = "gpio67";
436 function = "pri_mi2s";
437 };
438
439 config {
440 pins = "gpio67";
441 drive-strength = <8>; /* 8 mA */
442 bias-disable; /* NO PULL */
443 };
444 };
445 };
446
447 pri_aux_pcm_dout {
448 pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep {
449 mux {
450 pins = "gpio68";
451 function = "gpio";
452 };
453
454 config {
455 pins = "gpio68";
456 drive-strength = <2>; /* 2 mA */
457 bias-pull-down; /* PULL DOWN */
458 input-enable;
459 };
460 };
461
462 pri_aux_pcm_dout_active: pri_aux_pcm_dout_active {
463 mux {
464 pins = "gpio68";
465 function = "pri_mi2s";
466 };
467
468 config {
469 pins = "gpio68";
470 drive-strength = <8>; /* 8 mA */
471 bias-disable; /* NO PULL */
472 };
473 };
474 };
475
Shashank Babu Chinta Venkata2f40bc72017-03-21 15:31:38 -0700476 pmx_sde: pmx_sde {
477 sde_dsi_active: sde_dsi_active {
478 mux {
479 pins = "gpio6", "gpio52";
480 function = "gpio";
481 };
482
483 config {
484 pins = "gpio6", "gpio52";
485 drive-strength = <8>; /* 8 mA */
486 bias-disable = <0>; /* no pull */
487 };
488 };
489 sde_dsi_suspend: sde_dsi_suspend {
490 mux {
491 pins = "gpio6", "gpio52";
492 function = "gpio";
493 };
494
495 config {
496 pins = "gpio6", "gpio52";
497 drive-strength = <2>; /* 2 mA */
498 bias-pull-down; /* PULL DOWN */
499 };
500 };
501 };
502
503 pmx_sde_te {
504 sde_te_active: sde_te_active {
505 mux {
506 pins = "gpio10";
507 function = "mdp_vsync";
508 };
509
510 config {
511 pins = "gpio10";
512 drive-strength = <2>; /* 2 mA */
513 bias-pull-down; /* PULL DOWN */
514 };
515 };
516
517 sde_te_suspend: sde_te_suspend {
518 mux {
519 pins = "gpio10";
520 function = "mdp_vsync";
521 };
522
523 config {
524 pins = "gpio10";
525 drive-strength = <2>; /* 2 mA */
526 bias-pull-down; /* PULL DOWN */
527 };
528 };
529 };
530
Padmanabhan Komanduru887085e2017-05-02 14:57:12 -0700531 sde_dp_aux_active: sde_dp_aux_active {
532 mux {
533 pins = "gpio43", "gpio51";
534 function = "gpio";
535 };
536
537 config {
538 pins = "gpio43", "gpio51";
539 bias-disable = <0>; /* no pull */
540 drive-strength = <8>;
541 };
542 };
543
544 sde_dp_aux_suspend: sde_dp_aux_suspend {
545 mux {
546 pins = "gpio43", "gpio51";
547 function = "gpio";
548 };
549
550 config {
551 pins = "gpio43", "gpio51";
552 bias-pull-down;
553 drive-strength = <2>;
554 };
555 };
556
557 sde_dp_usbplug_cc_active: sde_dp_usbplug_cc_active {
558 mux {
559 pins = "gpio38";
560 function = "gpio";
561 };
562
563 config {
564 pins = "gpio38";
565 bias-disable;
566 drive-strength = <16>;
567 };
568 };
569
570 sde_dp_usbplug_cc_suspend: sde_dp_usbplug_cc_suspend {
571 mux {
572 pins = "gpio38";
573 function = "gpio";
574 };
575
576 config {
577 pins = "gpio38";
578 bias-pull-down;
579 drive-strength = <2>;
580 };
581 };
582
Banajit Goswamib016de92017-02-15 21:02:30 -0800583 sec_aux_pcm {
584 sec_aux_pcm_sleep: sec_aux_pcm_sleep {
585 mux {
586 pins = "gpio80", "gpio81";
587 function = "gpio";
588 };
589
590 config {
591 pins = "gpio80", "gpio81";
592 drive-strength = <2>; /* 2 mA */
593 bias-pull-down; /* PULL DOWN */
594 input-enable;
595 };
596 };
597
598 sec_aux_pcm_active: sec_aux_pcm_active {
599 mux {
600 pins = "gpio80", "gpio81";
601 function = "sec_mi2s";
602 };
603
604 config {
605 pins = "gpio80", "gpio81";
606 drive-strength = <8>; /* 8 mA */
607 bias-disable; /* NO PULL */
608 };
609 };
610 };
611
612 sec_aux_pcm_din {
613 sec_aux_pcm_din_sleep: sec_aux_pcm_din_sleep {
614 mux {
615 pins = "gpio82";
616 function = "gpio";
617 };
618
619 config {
620 pins = "gpio82";
621 drive-strength = <2>; /* 2 mA */
622 bias-pull-down; /* PULL DOWN */
623 input-enable;
624 };
625 };
626
627 sec_aux_pcm_din_active: sec_aux_pcm_din_active {
628 mux {
629 pins = "gpio82";
630 function = "sec_mi2s";
631 };
632
633 config {
634 pins = "gpio82";
635 drive-strength = <8>; /* 8 mA */
636 bias-disable; /* NO PULL */
637 };
638 };
639 };
640
641 sec_aux_pcm_dout {
642 sec_aux_pcm_dout_sleep: sec_aux_pcm_dout_sleep {
643 mux {
644 pins = "gpio83";
645 function = "gpio";
646 };
647
648 config {
649 pins = "gpio83";
650 drive-strength = <2>; /* 2 mA */
651 bias-pull-down; /* PULL DOWN */
652 input-enable;
653 };
654 };
655
656 sec_aux_pcm_dout_active: sec_aux_pcm_dout_active {
657 mux {
658 pins = "gpio83";
659 function = "sec_mi2s";
660 };
661
662 config {
663 pins = "gpio83";
664 drive-strength = <8>; /* 8 mA */
665 bias-disable; /* NO PULL */
666 };
667 };
668 };
669
670 tert_aux_pcm {
671 tert_aux_pcm_sleep: tert_aux_pcm_sleep {
672 mux {
673 pins = "gpio75", "gpio76";
674 function = "gpio";
675 };
676
677 config {
678 pins = "gpio75", "gpio76";
679 drive-strength = <2>; /* 2 mA */
680 bias-pull-down; /* PULL DOWN */
681 input-enable;
682 };
683 };
684
685 tert_aux_pcm_active: tert_aux_pcm_active {
686 mux {
687 pins = "gpio75", "gpio76";
688 function = "ter_mi2s";
689 };
690
691 config {
692 pins = "gpio75", "gpio76";
693 drive-strength = <8>; /* 8 mA */
694 bias-disable; /* NO PULL */
695 output-high;
696 };
697 };
698 };
699
700 tert_aux_pcm_din {
701 tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep {
702 mux {
703 pins = "gpio77";
704 function = "gpio";
705 };
706
707 config {
708 pins = "gpio77";
709 drive-strength = <2>; /* 2 mA */
710 bias-pull-down; /* PULL DOWN */
711 input-enable;
712 };
713 };
714
715 tert_aux_pcm_din_active: tert_aux_pcm_din_active {
716 mux {
717 pins = "gpio77";
718 function = "ter_mi2s";
719 };
720
721 config {
722 pins = "gpio77";
723 drive-strength = <8>; /* 8 mA */
724 bias-disable; /* NO PULL */
725 };
726 };
727 };
728
729 tert_aux_pcm_dout {
730 tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep {
731 mux {
732 pins = "gpio78";
733 function = "gpio";
734 };
735
736 config {
737 pins = "gpio78";
738 drive-strength = <2>; /* 2 mA */
739 bias-pull-down; /* PULL DOWN */
740 input-enable;
741 };
742 };
743
744 tert_aux_pcm_dout_active: tert_aux_pcm_dout_active {
745 mux {
746 pins = "gpio78";
747 function = "ter_mi2s";
748 };
749
750 config {
751 pins = "gpio78";
752 drive-strength = <8>; /* 8 mA */
753 bias-disable; /* NO PULL */
754 };
755 };
756 };
757
758 quat_aux_pcm {
759 quat_aux_pcm_sleep: quat_aux_pcm_sleep {
760 mux {
761 pins = "gpio58", "gpio59";
762 function = "gpio";
763 };
764
765 config {
766 pins = "gpio58", "gpio59";
767 drive-strength = <2>; /* 2 mA */
768 bias-pull-down; /* PULL DOWN */
769 input-enable;
770 };
771 };
772
773 quat_aux_pcm_active: quat_aux_pcm_active {
774 mux {
775 pins = "gpio58", "gpio59";
776 function = "qua_mi2s";
777 };
778
779 config {
780 pins = "gpio58", "gpio59";
781 drive-strength = <8>; /* 8 mA */
782 bias-disable; /* NO PULL */
783 output-high;
784 };
785 };
786 };
787
788 quat_aux_pcm_din {
789 quat_aux_pcm_din_sleep: quat_aux_pcm_din_sleep {
790 mux {
791 pins = "gpio60";
792 function = "gpio";
793 };
794
795 config {
796 pins = "gpio60";
797 drive-strength = <2>; /* 2 mA */
798 bias-pull-down; /* PULL DOWN */
799 input-enable;
800 };
801 };
802
803 quat_aux_pcm_din_active: quat_aux_pcm_din_active {
804 mux {
805 pins = "gpio60";
806 function = "qua_mi2s";
807 };
808
809 config {
810 pins = "gpio60";
811 drive-strength = <8>; /* 8 mA */
812 bias-disable; /* NO PULL */
813 };
814 };
815 };
816
817 quat_aux_pcm_dout {
818 quat_aux_pcm_dout_sleep: quat_aux_pcm_dout_sleep {
819 mux {
820 pins = "gpio61";
821 function = "gpio";
822 };
823
824 config {
825 pins = "gpio61";
826 drive-strength = <2>; /* 2 mA */
827 bias-pull-down; /* PULL DOWN */
828 input-enable;
829 };
830 };
831
832 quat_aux_pcm_dout_active: quat_aux_pcm_dout_active {
833 mux {
834 pins = "gpio61";
835 function = "qua_mi2s";
836 };
837
838 config {
839 pins = "gpio61";
840 drive-strength = <8>; /* 8 mA */
841 bias-disable; /* NO PULL */
842 };
843 };
844 };
845
846 pri_mi2s_mclk {
847 pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep {
848 mux {
849 pins = "gpio64";
850 function = "gpio";
851 };
852
853 config {
854 pins = "gpio64";
855 drive-strength = <2>; /* 2 mA */
856 bias-pull-down; /* PULL DOWN */
857 input-enable;
858 };
859 };
860
861 pri_mi2s_mclk_active: pri_mi2s_mclk_active {
862 mux {
863 pins = "gpio64";
864 function = "pri_mi2s";
865 };
866
867 config {
868 pins = "gpio64";
869 drive-strength = <8>; /* 8 mA */
870 bias-disable; /* NO PULL */
871 output-high;
872 };
873 };
874 };
875
876 pri_mi2s_sck {
877 pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {
878 mux {
879 pins = "gpio65";
880 function = "gpio";
881 };
882
883 config {
884 pins = "gpio65";
885 drive-strength = <2>; /* 2 mA */
886 bias-pull-down; /* PULL DOWN */
887 input-enable;
888 };
889 };
890
891 pri_mi2s_sck_active: pri_mi2s_sck_active {
892 mux {
893 pins = "gpio65";
894 function = "pri_mi2s";
895 };
896
897 config {
898 pins = "gpio65";
899 drive-strength = <8>; /* 8 mA */
900 bias-disable; /* NO PULL */
901 output-high;
902 };
903 };
904 };
905
906 pri_mi2s_ws {
907 pri_mi2s_ws_sleep: pri_mi2s_ws_sleep {
908 mux {
909 pins = "gpio66";
910 function = "gpio";
911 };
912
913 config {
914 pins = "gpio66";
915 drive-strength = <2>; /* 2 mA */
916 bias-pull-down; /* PULL DOWN */
917 input-enable;
918 };
919 };
920
921 pri_mi2s_ws_active: pri_mi2s_ws_active {
922 mux {
923 pins = "gpio66";
924 function = "pri_mi2s_ws";
925 };
926
927 config {
928 pins = "gpio66";
929 drive-strength = <8>; /* 8 mA */
930 bias-disable; /* NO PULL */
931 output-high;
932 };
933 };
934 };
935
936 pri_mi2s_sd0 {
937 pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {
938 mux {
939 pins = "gpio67";
940 function = "gpio";
941 };
942
943 config {
944 pins = "gpio67";
945 drive-strength = <2>; /* 2 mA */
946 bias-pull-down; /* PULL DOWN */
947 input-enable;
948 };
949 };
950
951 pri_mi2s_sd0_active: pri_mi2s_sd0_active {
952 mux {
953 pins = "gpio67";
954 function = "pri_mi2s";
955 };
956
957 config {
958 pins = "gpio67";
959 drive-strength = <8>; /* 8 mA */
960 bias-disable; /* NO PULL */
961 };
962 };
963 };
964
965 pri_mi2s_sd1 {
966 pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep {
967 mux {
968 pins = "gpio68";
969 function = "gpio";
970 };
971
972 config {
973 pins = "gpio68";
974 drive-strength = <2>; /* 2 mA */
975 bias-pull-down; /* PULL DOWN */
976 input-enable;
977 };
978 };
979
980 pri_mi2s_sd1_active: pri_mi2s_sd1_active {
981 mux {
982 pins = "gpio68";
983 function = "pri_mi2s";
984 };
985
986 config {
987 pins = "gpio68";
988 drive-strength = <8>; /* 8 mA */
989 bias-disable; /* NO PULL */
990 };
991 };
992 };
993
994 sec_mi2s_mclk {
995 sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep {
996 mux {
997 pins = "gpio79";
998 function = "gpio";
999 };
1000
1001 config {
1002 pins = "gpio79";
1003 drive-strength = <2>; /* 2 mA */
1004 bias-pull-down; /* PULL DOWN */
1005 input-enable;
1006 };
1007 };
1008
1009 sec_mi2s_mclk_active: sec_mi2s_mclk_active {
1010 mux {
1011 pins = "gpio79";
1012 function = "sec_mi2s";
1013 };
1014
1015 config {
1016 pins = "gpio79";
1017 drive-strength = <8>; /* 8 mA */
1018 bias-disable; /* NO PULL */
1019 };
1020 };
1021 };
1022
1023 sec_mi2s {
1024 sec_mi2s_sleep: sec_mi2s_sleep {
1025 mux {
1026 pins = "gpio80", "gpio81";
1027 function = "gpio";
1028 };
1029
1030 config {
1031 pins = "gpio80", "gpio81";
1032 drive-strength = <2>; /* 2 mA */
1033 bias-disable; /* NO PULL */
1034 input-enable;
1035 };
1036 };
1037
1038 sec_mi2s_active: sec_mi2s_active {
1039 mux {
1040 pins = "gpio80", "gpio81";
1041 function = "sec_mi2s";
1042 };
1043
1044 config {
1045 pins = "gpio80", "gpio81";
1046 drive-strength = <8>; /* 8 mA */
1047 bias-disable; /* NO PULL */
1048 };
1049 };
1050 };
1051
1052 sec_mi2s_sd0 {
1053 sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep {
1054 mux {
1055 pins = "gpio82";
1056 function = "gpio";
1057 };
1058
1059 config {
1060 pins = "gpio82";
1061 drive-strength = <2>; /* 2 mA */
1062 bias-pull-down; /* PULL DOWN */
1063 input-enable;
1064 };
1065 };
1066
1067 sec_mi2s_sd0_active: sec_mi2s_sd0_active {
1068 mux {
1069 pins = "gpio82";
1070 function = "sec_mi2s";
1071 };
1072
1073 config {
1074 pins = "gpio82";
1075 drive-strength = <8>; /* 8 mA */
1076 bias-disable; /* NO PULL */
1077 };
1078 };
1079 };
1080
1081 sec_mi2s_sd1 {
1082 sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep {
1083 mux {
1084 pins = "gpio83";
1085 function = "gpio";
1086 };
1087
1088 config {
1089 pins = "gpio83";
1090 drive-strength = <2>; /* 2 mA */
1091 bias-pull-down; /* PULL DOWN */
1092 input-enable;
1093 };
1094 };
1095
1096 sec_mi2s_sd1_active: sec_mi2s_sd1_active {
1097 mux {
1098 pins = "gpio83";
1099 function = "sec_mi2s";
1100 };
1101
1102 config {
1103 pins = "gpio83";
1104 drive-strength = <8>; /* 8 mA */
1105 bias-disable; /* NO PULL */
1106 };
1107 };
1108 };
1109
1110 tert_mi2s_mclk {
1111 tert_mi2s_mclk_sleep: tert_mi2s_mclk_sleep {
1112 mux {
1113 pins = "gpio74";
1114 function = "gpio";
1115 };
1116
1117 config {
1118 pins = "gpio74";
1119 drive-strength = <2>; /* 2 mA */
1120 bias-pull-down; /* PULL DOWN */
1121 input-enable;
1122 };
1123 };
1124
1125 tert_mi2s_mclk_active: tert_mi2s_mclk_active {
1126 mux {
1127 pins = "gpio74";
1128 function = "ter_mi2s";
1129 };
1130
1131 config {
1132 pins = "gpio74";
1133 drive-strength = <8>; /* 8 mA */
1134 bias-disable; /* NO PULL */
1135 };
1136 };
1137 };
1138
1139 tert_mi2s {
1140 tert_mi2s_sleep: tert_mi2s_sleep {
1141 mux {
1142 pins = "gpio75", "gpio76";
1143 function = "gpio";
1144 };
1145
1146 config {
1147 pins = "gpio75", "gpio76";
1148 drive-strength = <2>; /* 2 mA */
1149 bias-pull-down; /* PULL DOWN */
1150 input-enable;
1151 };
1152 };
1153
1154 tert_mi2s_active: tert_mi2s_active {
1155 mux {
1156 pins = "gpio75", "gpio76";
1157 function = "ter_mi2s";
1158 };
1159
1160 config {
1161 pins = "gpio75", "gpio76";
1162 drive-strength = <8>; /* 8 mA */
1163 bias-disable; /* NO PULL */
1164 output-high;
1165 };
1166 };
1167 };
1168
1169 tert_mi2s_sd0 {
1170 tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep {
1171 mux {
1172 pins = "gpio77";
1173 function = "gpio";
1174 };
1175
1176 config {
1177 pins = "gpio77";
1178 drive-strength = <2>; /* 2 mA */
1179 bias-pull-down; /* PULL DOWN */
1180 input-enable;
1181 };
1182 };
1183
1184 tert_mi2s_sd0_active: tert_mi2s_sd0_active {
1185 mux {
1186 pins = "gpio77";
1187 function = "ter_mi2s";
1188 };
1189
1190 config {
1191 pins = "gpio77";
1192 drive-strength = <8>; /* 8 mA */
1193 bias-disable; /* NO PULL */
1194 };
1195 };
1196 };
1197
1198 tert_mi2s_sd1 {
1199 tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep {
1200 mux {
1201 pins = "gpio78";
1202 function = "gpio";
1203 };
1204
1205 config {
1206 pins = "gpio78";
1207 drive-strength = <2>; /* 2 mA */
1208 bias-pull-down; /* PULL DOWN */
1209 input-enable;
1210 };
1211 };
1212
1213 tert_mi2s_sd1_active: tert_mi2s_sd1_active {
1214 mux {
1215 pins = "gpio78";
1216 function = "ter_mi2s";
1217 };
1218
1219 config {
1220 pins = "gpio78";
1221 drive-strength = <8>; /* 8 mA */
1222 bias-disable; /* NO PULL */
1223 };
1224 };
1225 };
1226
1227 quat_mi2s_mclk {
1228 quat_mi2s_mclk_sleep: quat_mi2s_mclk_sleep {
1229 mux {
1230 pins = "gpio57";
1231 function = "gpio";
1232 };
1233
1234 config {
1235 pins = "gpio57";
1236 drive-strength = <2>; /* 2 mA */
1237 bias-pull-down; /* PULL DOWN */
1238 input-enable;
1239 };
1240 };
1241
1242 quat_mi2s_mclk_active: quat_mi2s_mclk_active {
1243 mux {
1244 pins = "gpio57";
1245 function = "qua_mi2s";
1246 };
1247
1248 config {
1249 pins = "gpio57";
1250 drive-strength = <8>; /* 8 mA */
1251 bias-disable; /* NO PULL */
1252 };
1253 };
1254 };
1255
1256 quat_mi2s {
1257 quat_mi2s_sleep: quat_mi2s_sleep {
1258 mux {
1259 pins = "gpio58", "gpio59";
1260 function = "gpio";
1261 };
1262
1263 config {
1264 pins = "gpio58", "gpio59";
1265 drive-strength = <2>; /* 2 mA */
1266 bias-pull-down; /* PULL DOWN */
1267 input-enable;
1268 };
1269 };
1270
1271 quat_mi2s_active: quat_mi2s_active {
1272 mux {
1273 pins = "gpio58", "gpio59";
1274 function = "qua_mi2s";
1275 };
1276
1277 config {
1278 pins = "gpio58", "gpio59";
1279 drive-strength = <8>; /* 8 mA */
1280 bias-disable; /* NO PULL */
1281 output-high;
1282 };
1283 };
1284 };
1285
1286 quat_mi2s_sd0 {
1287 quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep {
1288 mux {
1289 pins = "gpio60";
1290 function = "gpio";
1291 };
1292
1293 config {
1294 pins = "gpio60";
1295 drive-strength = <2>; /* 2 mA */
1296 bias-pull-down; /* PULL DOWN */
1297 input-enable;
1298 };
1299 };
1300
1301 quat_mi2s_sd0_active: quat_mi2s_sd0_active {
1302 mux {
1303 pins = "gpio60";
1304 function = "qua_mi2s";
1305 };
1306
1307 config {
1308 pins = "gpio60";
1309 drive-strength = <8>; /* 8 mA */
1310 bias-disable; /* NO PULL */
1311 };
1312 };
1313 };
1314
1315 quat_mi2s_sd1 {
1316 quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep {
1317 mux {
1318 pins = "gpio61";
1319 function = "gpio";
1320 };
1321
1322 config {
1323 pins = "gpio61";
1324 drive-strength = <2>; /* 2 mA */
1325 bias-pull-down; /* PULL DOWN */
1326 input-enable;
1327 };
1328 };
1329
1330 quat_mi2s_sd1_active: quat_mi2s_sd1_active {
1331 mux {
1332 pins = "gpio61";
1333 function = "qua_mi2s";
1334 };
1335
1336 config {
1337 pins = "gpio61";
1338 drive-strength = <8>; /* 8 mA */
1339 bias-disable; /* NO PULL */
1340 };
1341 };
1342 };
1343
1344 quat_mi2s_sd2 {
1345 quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep {
1346 mux {
1347 pins = "gpio62";
1348 function = "gpio";
1349 };
1350
1351 config {
1352 pins = "gpio62";
1353 drive-strength = <2>; /* 2 mA */
1354 bias-pull-down; /* PULL DOWN */
1355 input-enable;
1356 };
1357 };
1358
1359 quat_mi2s_sd2_active: quat_mi2s_sd2_active {
1360 mux {
1361 pins = "gpio62";
1362 function = "qua_mi2s";
1363 };
1364
1365 config {
1366 pins = "gpio62";
1367 drive-strength = <8>; /* 8 mA */
1368 bias-disable; /* NO PULL */
1369 };
1370 };
1371 };
1372
1373 quat_mi2s_sd3 {
1374 quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep {
1375 mux {
1376 pins = "gpio63";
1377 function = "gpio";
1378 };
1379
1380 config {
1381 pins = "gpio63";
1382 drive-strength = <2>; /* 2 mA */
1383 bias-pull-down; /* PULL DOWN */
1384 input-enable;
1385 };
1386 };
1387
1388 quat_mi2s_sd3_active: quat_mi2s_sd3_active {
1389 mux {
1390 pins = "gpio63";
1391 function = "qua_mi2s";
1392 };
1393
1394 config {
1395 pins = "gpio63";
1396 drive-strength = <8>; /* 8 mA */
1397 bias-disable; /* NO PULL */
1398 };
1399 };
1400 };
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06001401
1402 /* QUPv3 South SE mappings */
1403 /* SE 0 pin mappings */
1404 qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
1405 qupv3_se0_i2c_active: qupv3_se0_i2c_active {
1406 mux {
1407 pins = "gpio0", "gpio1";
1408 function = "qup0";
1409 };
1410
1411 config {
1412 pins = "gpio0", "gpio1";
1413 drive-strength = <2>;
1414 bias-disable;
1415 };
1416 };
1417
1418 qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
1419 mux {
1420 pins = "gpio0", "gpio1";
1421 function = "gpio";
1422 };
1423
1424 config {
1425 pins = "gpio0", "gpio1";
1426 drive-strength = <2>;
1427 bias-pull-up;
1428 };
1429 };
1430 };
1431
1432 qupv3_se0_spi_pins: qupv3_se0_spi_pins {
1433 qupv3_se0_spi_active: qupv3_se0_spi_active {
1434 mux {
1435 pins = "gpio0", "gpio1", "gpio2",
1436 "gpio3";
1437 function = "qup0";
1438 };
1439
1440 config {
1441 pins = "gpio0", "gpio1", "gpio2",
1442 "gpio3";
1443 drive-strength = <6>;
1444 bias-disable;
1445 };
1446 };
1447
1448 qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
1449 mux {
1450 pins = "gpio0", "gpio1", "gpio2",
1451 "gpio3";
1452 function = "gpio";
1453 };
1454
1455 config {
1456 pins = "gpio0", "gpio1", "gpio2",
1457 "gpio3";
1458 drive-strength = <6>;
1459 bias-disable;
1460 };
1461 };
1462 };
1463
1464 /* SE 1 pin mappings */
1465 qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
1466 qupv3_se1_i2c_active: qupv3_se1_i2c_active {
1467 mux {
1468 pins = "gpio17", "gpio18";
1469 function = "qup1";
1470 };
1471
1472 config {
1473 pins = "gpio17", "gpio18";
1474 drive-strength = <2>;
1475 bias-disable;
1476 };
1477 };
1478
1479 qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
1480 mux {
1481 pins = "gpio17", "gpio18";
1482 function = "gpio";
1483 };
1484
1485 config {
1486 pins = "gpio17", "gpio18";
1487 drive-strength = <2>;
1488 bias-pull-up;
1489 };
1490 };
1491 };
1492
1493 qupv3_se1_spi_pins: qupv3_se1_spi_pins {
1494 qupv3_se1_spi_active: qupv3_se1_spi_active {
1495 mux {
1496 pins = "gpio17", "gpio18", "gpio19",
1497 "gpio20";
1498 function = "qup1";
1499 };
1500
1501 config {
1502 pins = "gpio17", "gpio18", "gpio19",
1503 "gpio20";
1504 drive-strength = <6>;
1505 bias-disable;
1506 };
1507 };
1508
1509 qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
1510 mux {
1511 pins = "gpio17", "gpio18", "gpio19",
1512 "gpio20";
1513 function = "gpio";
1514 };
1515
1516 config {
1517 pins = "gpio17", "gpio18", "gpio19",
1518 "gpio20";
1519 drive-strength = <6>;
1520 bias-disable;
1521 };
1522 };
1523 };
1524
1525 /* SE 2 pin mappings */
1526 qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
1527 qupv3_se2_i2c_active: qupv3_se2_i2c_active {
1528 mux {
1529 pins = "gpio27", "gpio28";
1530 function = "qup2";
1531 };
1532
1533 config {
1534 pins = "gpio27", "gpio28";
1535 drive-strength = <2>;
1536 bias-disable;
1537 };
1538 };
1539
1540 qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
1541 mux {
1542 pins = "gpio27", "gpio28";
1543 function = "gpio";
1544 };
1545
1546 config {
1547 pins = "gpio27", "gpio28";
1548 drive-strength = <2>;
1549 bias-pull-up;
1550 };
1551 };
1552 };
1553
1554 qupv3_se2_spi_pins: qupv3_se2_spi_pins {
1555 qupv3_se2_spi_active: qupv3_se2_spi_active {
1556 mux {
1557 pins = "gpio27", "gpio28", "gpio29",
1558 "gpio30";
1559 function = "qup2";
1560 };
1561
1562 config {
1563 pins = "gpio27", "gpio28", "gpio29",
1564 "gpio30";
1565 drive-strength = <6>;
1566 bias-disable;
1567 };
1568 };
1569
1570 qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
1571 mux {
1572 pins = "gpio27", "gpio28", "gpio29",
1573 "gpio30";
1574 function = "gpio";
1575 };
1576
1577 config {
1578 pins = "gpio27", "gpio28", "gpio29",
1579 "gpio30";
1580 drive-strength = <6>;
1581 bias-disable;
1582 };
1583 };
1584 };
1585
1586 /* SE 3 pin mappings */
1587 qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
1588 qupv3_se3_i2c_active: qupv3_se3_i2c_active {
1589 mux {
1590 pins = "gpio41", "gpio42";
1591 function = "qup3";
1592 };
1593
1594 config {
1595 pins = "gpio41", "gpio42";
1596 drive-strength = <2>;
1597 bias-disable;
1598 };
1599 };
1600
1601 qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
1602 mux {
1603 pins = "gpio41", "gpio42";
1604 function = "gpio";
1605 };
1606
1607 config {
1608 pins = "gpio41", "gpio42";
1609 drive-strength = <2>;
1610 bias-pull-up;
1611 };
1612 };
1613 };
1614
1615 qupv3_se3_spi_pins: qupv3_se3_spi_pins {
1616 qupv3_se3_spi_active: qupv3_se3_spi_active {
1617 mux {
1618 pins = "gpio41", "gpio42", "gpio43",
1619 "gpio44";
1620 function = "qup3";
1621 };
1622
1623 config {
1624 pins = "gpio41", "gpio42", "gpio43",
1625 "gpio44";
1626 drive-strength = <6>;
1627 bias-disable;
1628 };
1629 };
1630
1631 qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
1632 mux {
1633 pins = "gpio41", "gpio42", "gpio43",
1634 "gpio44";
1635 function = "gpio";
1636 };
1637
1638 config {
1639 pins = "gpio41", "gpio42", "gpio43",
1640 "gpio44";
1641 drive-strength = <6>;
1642 bias-disable;
1643 };
1644 };
1645 };
1646
1647 /* SE 4 pin mappings */
1648 qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
1649 qupv3_se4_i2c_active: qupv3_se4_i2c_active {
1650 mux {
1651 pins = "gpio89", "gpio90";
1652 function = "qup4";
1653 };
1654
1655 config {
1656 pins = "gpio89", "gpio90";
1657 drive-strength = <2>;
1658 bias-disable;
1659 };
1660 };
1661
1662 qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
1663 mux {
1664 pins = "gpio89", "gpio90";
1665 function = "gpio";
1666 };
1667
1668 config {
1669 pins = "gpio89", "gpio90";
1670 drive-strength = <2>;
1671 bias-pull-up;
1672 };
1673 };
1674 };
1675
1676 qupv3_se4_spi_pins: qupv3_se4_spi_pins {
1677 qupv3_se4_spi_active: qupv3_se4_spi_active {
1678 mux {
1679 pins = "gpio89", "gpio90", "gpio91",
1680 "gpio92";
1681 function = "qup4";
1682 };
1683
1684 config {
1685 pins = "gpio89", "gpio90", "gpio91",
1686 "gpio92";
1687 drive-strength = <6>;
1688 bias-disable;
1689 };
1690 };
1691
1692 qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
1693 mux {
1694 pins = "gpio89", "gpio90", "gpio91",
1695 "gpio92";
1696 function = "gpio";
1697 };
1698
1699 config {
1700 pins = "gpio89", "gpio90", "gpio91",
1701 "gpio92";
1702 drive-strength = <6>;
1703 bias-disable;
1704 };
1705 };
1706 };
1707
1708 /* SE 5 pin mappings */
1709 qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
1710 qupv3_se5_i2c_active: qupv3_se5_i2c_active {
1711 mux {
1712 pins = "gpio85", "gpio86";
1713 function = "qup5";
1714 };
1715
1716 config {
1717 pins = "gpio85", "gpio86";
1718 drive-strength = <2>;
1719 bias-disable;
1720 };
1721 };
1722
1723 qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
1724 mux {
1725 pins = "gpio85", "gpio86";
1726 function = "gpio";
1727 };
1728
1729 config {
1730 pins = "gpio85", "gpio86";
1731 drive-strength = <2>;
1732 bias-pull-up;
1733 };
1734 };
1735 };
1736
1737 qupv3_se5_spi_pins: qupv3_se5_spi_pins {
1738 qupv3_se5_spi_active: qupv3_se5_spi_active {
1739 mux {
1740 pins = "gpio85", "gpio86", "gpio87",
1741 "gpio88";
1742 function = "qup5";
1743 };
1744
1745 config {
1746 pins = "gpio85", "gpio86", "gpio87",
1747 "gpio88";
1748 drive-strength = <6>;
1749 bias-disable;
1750 };
1751 };
1752
1753 qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
1754 mux {
1755 pins = "gpio85", "gpio86", "gpio87",
1756 "gpio88";
1757 function = "gpio";
1758 };
1759
1760 config {
1761 pins = "gpio85", "gpio86", "gpio87",
1762 "gpio88";
1763 drive-strength = <6>;
1764 bias-disable;
1765 };
1766 };
1767 };
1768
1769 /* SE 6 pin mappings */
1770 qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
1771 qupv3_se6_i2c_active: qupv3_se6_i2c_active {
1772 mux {
1773 pins = "gpio45", "gpio46";
1774 function = "qup6";
1775 };
1776
1777 config {
1778 pins = "gpio45", "gpio46";
1779 drive-strength = <2>;
1780 bias-disable;
1781 };
1782 };
1783
1784 qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
1785 mux {
1786 pins = "gpio45", "gpio46";
1787 function = "gpio";
1788 };
1789
1790 config {
1791 pins = "gpio45", "gpio46";
1792 drive-strength = <2>;
1793 bias-pull-up;
1794 };
1795 };
1796 };
1797
1798 qupv3_se6_4uart_pins: qupv3_se6_4uart_pins {
1799 qupv3_se6_4uart_active: qupv3_se6_4uart_active {
1800 mux {
1801 pins = "gpio45", "gpio46", "gpio47",
1802 "gpio48";
1803 function = "qup6";
1804 };
1805
1806 config {
1807 pins = "gpio45", "gpio46", "gpio47",
1808 "gpio48";
1809 drive-strength = <2>;
1810 bias-disable;
1811 };
1812 };
1813
1814 qupv3_se6_4uart_sleep: qupv3_se6_4uart_sleep {
1815 mux {
1816 pins = "gpio45", "gpio46", "gpio47",
1817 "gpio48";
1818 function = "gpio";
1819 };
1820
1821 config {
1822 pins = "gpio45", "gpio46", "gpio47",
1823 "gpio48";
1824 drive-strength = <2>;
1825 bias-disable;
1826 };
1827 };
1828 };
1829
1830 qupv3_se6_spi_pins: qupv3_se6_spi_pins {
1831 qupv3_se6_spi_active: qupv3_se6_spi_active {
1832 mux {
1833 pins = "gpio45", "gpio46", "gpio47",
1834 "gpio48";
1835 function = "qup6";
1836 };
1837
1838 config {
1839 pins = "gpio45", "gpio46", "gpio47",
1840 "gpio48";
1841 drive-strength = <6>;
1842 bias-disable;
1843 };
1844 };
1845
1846 qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
1847 mux {
1848 pins = "gpio45", "gpio46", "gpio47",
1849 "gpio48";
1850 function = "gpio";
1851 };
1852
1853 config {
1854 pins = "gpio45", "gpio46", "gpio47",
1855 "gpio48";
1856 drive-strength = <6>;
1857 bias-disable;
1858 };
1859 };
1860 };
1861
1862 /* SE 7 pin mappings */
1863 qupv3_se7_i2c_pins: qupv3_se7_i2c_pins {
1864 qupv3_se7_i2c_active: qupv3_se7_i2c_active {
1865 mux {
1866 pins = "gpio93", "gpio94";
1867 function = "qup7";
1868 };
1869
1870 config {
1871 pins = "gpio93", "gpio94";
1872 drive-strength = <2>;
1873 bias-disable;
1874 };
1875 };
1876
1877 qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep {
1878 mux {
1879 pins = "gpio93", "gpio94";
1880 function = "gpio";
1881 };
1882
1883 config {
1884 pins = "gpio93", "gpio94";
1885 drive-strength = <2>;
1886 bias-pull-up;
1887 };
1888 };
1889 };
1890
1891 qupv3_se7_4uart_pins: qupv3_se7_4uart_pins {
1892 qupv3_se7_4uart_active: qupv3_se7_4uart_active {
1893 mux {
1894 pins = "gpio93", "gpio94", "gpio95",
1895 "gpio96";
1896 function = "qup7";
1897 };
1898
1899 config {
1900 pins = "gpio93", "gpio94", "gpio95",
1901 "gpio96";
1902 drive-strength = <2>;
1903 bias-disable;
1904 };
1905 };
1906
1907 qupv3_se7_4uart_sleep: qupv3_se7_4uart_sleep {
1908 mux {
1909 pins = "gpio93", "gpio94", "gpio95",
1910 "gpio96";
1911 function = "gpio";
1912 };
1913
1914 config {
1915 pins = "gpio93", "gpio94", "gpio95",
1916 "gpio96";
1917 drive-strength = <2>;
1918 bias-disable;
1919 };
1920 };
1921 };
1922
1923 qupv3_se7_spi_pins: qupv3_se7_spi_pins {
1924 qupv3_se7_spi_active: qupv3_se7_spi_active {
1925 mux {
1926 pins = "gpio93", "gpio94", "gpio95",
1927 "gpio96";
1928 function = "qup7";
1929 };
1930
1931 config {
1932 pins = "gpio93", "gpio94", "gpio95",
1933 "gpio96";
1934 drive-strength = <6>;
1935 bias-disable;
1936 };
1937 };
1938
1939 qupv3_se7_spi_sleep: qupv3_se7_spi_sleep {
1940 mux {
1941 pins = "gpio93", "gpio94", "gpio95",
1942 "gpio96";
1943 function = "gpio";
1944 };
1945
1946 config {
1947 pins = "gpio93", "gpio94", "gpio95",
1948 "gpio96";
1949 drive-strength = <6>;
1950 bias-disable;
1951 };
1952 };
1953 };
1954
1955 /* QUPv3 North instances */
1956 /* SE 8 pin mappings */
1957 qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
1958 qupv3_se8_i2c_active: qupv3_se8_i2c_active {
1959 mux {
1960 pins = "gpio65", "gpio66";
1961 function = "qup8";
1962 };
1963
1964 config {
1965 pins = "gpio65", "gpio66";
1966 drive-strength = <2>;
1967 bias-disable;
1968 };
1969 };
1970
1971 qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
1972 mux {
1973 pins = "gpio65", "gpio66";
1974 function = "gpio";
1975 };
1976
1977 config {
1978 pins = "gpio65", "gpio66";
1979 drive-strength = <2>;
1980 bias-pull-up;
1981 };
1982 };
1983 };
1984
1985 qupv3_se8_spi_pins: qupv3_se8_spi_pins {
1986 qupv3_se8_spi_active: qupv3_se8_spi_active {
1987 mux {
1988 pins = "gpio65", "gpio66", "gpio67",
1989 "gpio68";
1990 function = "qup8";
1991 };
1992
1993 config {
1994 pins = "gpio65", "gpio66", "gpio67",
1995 "gpio68";
1996 drive-strength = <6>;
1997 bias-disable;
1998 };
1999 };
2000
2001 qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
2002 mux {
2003 pins = "gpio65", "gpio66", "gpio67",
2004 "gpio68";
2005 function = "gpio";
2006 };
2007
2008 config {
2009 pins = "gpio65", "gpio66", "gpio67",
2010 "gpio68";
2011 drive-strength = <6>;
2012 bias-disable;
2013 };
2014 };
2015 };
2016
2017 /* SE 9 pin mappings */
2018 qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
2019 qupv3_se9_i2c_active: qupv3_se9_i2c_active {
2020 mux {
2021 pins = "gpio6", "gpio7";
2022 function = "qup9";
2023 };
2024
2025 config {
2026 pins = "gpio6", "gpio7";
2027 drive-strength = <2>;
2028 bias-disable;
2029 };
2030 };
2031
2032 qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
2033 mux {
2034 pins = "gpio6", "gpio7";
2035 function = "gpio";
2036 };
2037
2038 config {
2039 pins = "gpio6", "gpio7";
2040 drive-strength = <2>;
2041 bias-pull-up;
2042 };
2043 };
2044 };
2045
2046 qupv3_se9_2uart_pins: qupv3_se9_2uart_pins {
2047 qupv3_se9_2uart_active: qupv3_se9_2uart_active {
2048 mux {
2049 pins = "gpio4", "gpio5";
2050 function = "qup9";
2051 };
2052
2053 config {
2054 pins = "gpio4", "gpio5";
2055 drive-strength = <2>;
2056 bias-disable;
2057 };
2058 };
2059
2060 qupv3_se9_2uart_sleep: qupv3_se9_2uart_sleep {
2061 mux {
2062 pins = "gpio4", "gpio5";
2063 function = "gpio";
2064 };
2065
2066 config {
2067 pins = "gpio4", "gpio5";
2068 drive-strength = <2>;
2069 bias-disable;
2070 };
2071 };
2072 };
2073
2074 qupv3_se9_spi_pins: qupv3_se9_spi_pins {
2075 qupv3_se9_spi_active: qupv3_se9_spi_active {
2076 mux {
2077 pins = "gpio4", "gpio5", "gpio6",
2078 "gpio7";
2079 function = "qup9";
2080 };
2081
2082 config {
2083 pins = "gpio4", "gpio5", "gpio6",
2084 "gpio7";
2085 drive-strength = <6>;
2086 bias-disable;
2087 };
2088 };
2089
2090 qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
2091 mux {
2092 pins = "gpio4", "gpio5", "gpio6",
2093 "gpio7";
2094 function = "gpio";
2095 };
2096
2097 config {
2098 pins = "gpio4", "gpio5", "gpio6",
2099 "gpio7";
2100 drive-strength = <6>;
2101 bias-disable;
2102 };
2103 };
2104 };
2105
2106 /* SE 10 pin mappings */
2107 qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
2108 qupv3_se10_i2c_active: qupv3_se10_i2c_active {
2109 mux {
2110 pins = "gpio55", "gpio56";
2111 function = "qup10";
2112 };
2113
2114 config {
2115 pins = "gpio55", "gpio56";
2116 drive-strength = <2>;
2117 bias-disable;
2118 };
2119 };
2120
2121 qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
2122 mux {
2123 pins = "gpio55", "gpio56";
2124 function = "gpio";
2125 };
2126
2127 config {
2128 pins = "gpio55", "gpio56";
2129 drive-strength = <2>;
2130 bias-pull-up;
2131 };
2132 };
2133 };
2134
2135 qupv3_se10_2uart_pins: qupv3_se10_2uart_pins {
2136 qupv3_se10_2uart_active: qupv3_se10_2uart_active {
2137 mux {
2138 pins = "gpio53", "gpio54";
2139 function = "qup10";
2140 };
2141
2142 config {
2143 pins = "gpio53", "gpio54";
2144 drive-strength = <2>;
2145 bias-disable;
2146 };
2147 };
2148
2149 qupv3_se10_2uart_sleep: qupv3_se10_2uart_sleep {
2150 mux {
2151 pins = "gpio53", "gpio54";
2152 function = "gpio";
2153 };
2154
2155 config {
2156 pins = "gpio53", "gpio54";
2157 drive-strength = <2>;
2158 bias-disable;
2159 };
2160 };
2161 };
2162
2163 qupv3_se10_spi_pins: qupv3_se10_spi_pins {
2164 qupv3_se10_spi_active: qupv3_se10_spi_active {
2165 mux {
2166 pins = "gpio53", "gpio54", "gpio55",
2167 "gpio56";
2168 function = "qup10";
2169 };
2170
2171 config {
2172 pins = "gpio53", "gpio54", "gpio55",
2173 "gpio56";
2174 drive-strength = <6>;
2175 bias-disable;
2176 };
2177 };
2178
2179 qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
2180 mux {
2181 pins = "gpio53", "gpio54", "gpio55",
2182 "gpio56";
2183 function = "gpio";
2184 };
2185
2186 config {
2187 pins = "gpio53", "gpio54", "gpio55",
2188 "gpio56";
2189 drive-strength = <6>;
2190 bias-disable;
2191 };
2192 };
2193 };
2194
2195 /* SE 11 pin mappings */
2196 qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
2197 qupv3_se11_i2c_active: qupv3_se11_i2c_active {
2198 mux {
2199 pins = "gpio31", "gpio32";
2200 function = "qup11";
2201 };
2202
2203 config {
2204 pins = "gpio31", "gpio32";
2205 drive-strength = <2>;
2206 bias-disable;
2207 };
2208 };
2209
2210 qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
2211 mux {
2212 pins = "gpio31", "gpio32";
2213 function = "gpio";
2214 };
2215
2216 config {
2217 pins = "gpio31", "gpio32";
2218 drive-strength = <2>;
2219 bias-pull-up;
2220 };
2221 };
2222 };
2223
2224 qupv3_se11_spi_pins: qupv3_se11_spi_pins {
2225 qupv3_se11_spi_active: qupv3_se11_spi_active {
2226 mux {
2227 pins = "gpio31", "gpio32", "gpio33",
2228 "gpio34";
2229 function = "qup11";
2230 };
2231
2232 config {
2233 pins = "gpio31", "gpio32", "gpio33",
2234 "gpio34";
2235 drive-strength = <6>;
2236 bias-disable;
2237 };
2238 };
2239
2240 qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
2241 mux {
2242 pins = "gpio31", "gpio32", "gpio33",
2243 "gpio34";
2244 function = "gpio";
2245 };
2246
2247 config {
2248 pins = "gpio31", "gpio32", "gpio33",
2249 "gpio34";
2250 drive-strength = <6>;
2251 bias-disable;
2252 };
2253 };
2254 };
2255
2256 /* SE 12 pin mappings */
2257 qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
2258 qupv3_se12_i2c_active: qupv3_se12_i2c_active {
2259 mux {
2260 pins = "gpio49", "gpio50";
2261 function = "qup12";
2262 };
2263
2264 config {
2265 pins = "gpio49", "gpio50";
2266 drive-strength = <2>;
2267 bias-disable;
2268 };
2269 };
2270
2271 qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
2272 mux {
2273 pins = "gpio49", "gpio50";
2274 function = "gpio";
2275 };
2276
2277 config {
2278 pins = "gpio49", "gpio50";
2279 drive-strength = <2>;
2280 bias-pull-up;
2281 };
2282 };
2283 };
2284
2285 qupv3_se12_spi_pins: qupv3_se12_spi_pins {
2286 qupv3_se12_spi_active: qupv3_se12_spi_active {
2287 mux {
2288 pins = "gpio49", "gpio50", "gpio51",
2289 "gpio52";
2290 function = "qup12";
2291 };
2292
2293 config {
2294 pins = "gpio49", "gpio50", "gpio51",
2295 "gpio52";
2296 drive-strength = <6>;
2297 bias-disable;
2298 };
2299 };
2300
2301 qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
2302 mux {
2303 pins = "gpio49", "gpio50", "gpio51",
2304 "gpio52";
2305 function = "gpio";
2306 };
2307
2308 config {
2309 pins = "gpio49", "gpio50", "gpio51",
2310 "gpio52";
2311 drive-strength = <6>;
2312 bias-disable;
2313 };
2314 };
2315 };
2316
2317 /* SE 13 pin mappings */
2318 qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
2319 qupv3_se13_i2c_active: qupv3_se13_i2c_active {
2320 mux {
2321 pins = "gpio105", "gpio106";
2322 function = "qup13";
2323 };
2324
2325 config {
2326 pins = "gpio105", "gpio106";
2327 drive-strength = <2>;
2328 bias-disable;
2329 };
2330 };
2331
2332 qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
2333 mux {
2334 pins = "gpio105", "gpio106";
2335 function = "gpio";
2336 };
2337
2338 config {
2339 pins = "gpio105", "gpio106";
2340 drive-strength = <2>;
2341 bias-pull-up;
2342 };
2343 };
2344 };
2345
2346 qupv3_se13_spi_pins: qupv3_se13_spi_pins {
2347 qupv3_se13_spi_active: qupv3_se13_spi_active {
2348 mux {
2349 pins = "gpio105", "gpio106", "gpio107",
2350 "gpio108";
2351 function = "qup13";
2352 };
2353
2354 config {
2355 pins = "gpio105", "gpio106", "gpio107",
2356 "gpio108";
2357 drive-strength = <6>;
2358 bias-disable;
2359 };
2360 };
2361
2362 qupv3_se13_spi_sleep: qupv3_se13_spi_sleep {
2363 mux {
2364 pins = "gpio105", "gpio106", "gpio107",
2365 "gpio108";
2366 function = "gpio";
2367 };
2368
2369 config {
2370 pins = "gpio105", "gpio106", "gpio107",
2371 "gpio108";
2372 drive-strength = <6>;
2373 bias-disable;
2374 };
2375 };
2376 };
2377
2378 /* SE 14 pin mappings */
2379 qupv3_se14_i2c_pins: qupv3_se14_i2c_pins {
2380 qupv3_se14_i2c_active: qupv3_se14_i2c_active {
2381 mux {
2382 pins = "gpio33", "gpio34";
2383 function = "qup14";
2384 };
2385
2386 config {
2387 pins = "gpio33", "gpio34";
2388 drive-strength = <2>;
2389 bias-disable;
2390 };
2391 };
2392
2393 qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep {
2394 mux {
2395 pins = "gpio33", "gpio34";
2396 function = "gpio";
2397 };
2398
2399 config {
2400 pins = "gpio33", "gpio34";
2401 drive-strength = <2>;
2402 bias-pull-up;
2403 };
2404 };
2405 };
2406
2407 qupv3_se14_spi_pins: qupv3_se14_spi_pins {
2408 qupv3_se14_spi_active: qupv3_se14_spi_active {
2409 mux {
2410 pins = "gpio31", "gpio32", "gpio33",
2411 "gpio34";
2412 function = "qup14";
2413 };
2414
2415 config {
2416 pins = "gpio31", "gpio32", "gpio33",
2417 "gpio34";
2418 drive-strength = <6>;
2419 bias-disable;
2420 };
2421 };
2422
2423 qupv3_se14_spi_sleep: qupv3_se14_spi_sleep {
2424 mux {
2425 pins = "gpio31", "gpio32", "gpio33",
2426 "gpio34";
2427 function = "gpio";
2428 };
2429
2430 config {
2431 pins = "gpio31", "gpio32", "gpio33",
2432 "gpio34";
2433 drive-strength = <6>;
2434 bias-disable;
2435 };
2436 };
2437 };
2438
2439 /* SE 15 pin mappings */
2440 qupv3_se15_i2c_pins: qupv3_se15_i2c_pins {
2441 qupv3_se15_i2c_active: qupv3_se15_i2c_active {
2442 mux {
2443 pins = "gpio81", "gpio82";
2444 function = "qup15";
2445 };
2446
2447 config {
2448 pins = "gpio81", "gpio82";
2449 drive-strength = <2>;
2450 bias-disable;
2451 };
2452 };
2453
2454 qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep {
2455 mux {
2456 pins = "gpio81", "gpio82";
2457 function = "gpio";
2458 };
2459
2460 config {
2461 pins = "gpio81", "gpio82";
2462 drive-strength = <2>;
2463 bias-pull-up;
2464 };
2465 };
2466 };
2467
2468 qupv3_se15_spi_pins: qupv3_se15_spi_pins {
2469 qupv3_se15_spi_active: qupv3_se15_spi_active {
2470 mux {
2471 pins = "gpio81", "gpio82", "gpio83",
2472 "gpio84";
2473 function = "qup15";
2474 };
2475
2476 config {
2477 pins = "gpio81", "gpio82", "gpio83",
2478 "gpio84";
2479 drive-strength = <6>;
2480 bias-disable;
2481 };
2482 };
2483
2484 qupv3_se15_spi_sleep: qupv3_se15_spi_sleep {
2485 mux {
2486 pins = "gpio81", "gpio82", "gpio83",
2487 "gpio84";
2488 function = "gpio";
2489 };
2490
2491 config {
2492 pins = "gpio81", "gpio82", "gpio83",
2493 "gpio84";
2494 drive-strength = <6>;
2495 bias-disable;
2496 };
2497 };
2498 };
Jigarkumar Zala861231152017-02-28 14:05:11 -08002499
2500 cci0_active: cci0_active {
2501 mux {
2502 /* CLK, DATA */
2503 pins = "gpio17","gpio18"; // Only 2
2504 function = "cci_i2c";
2505 };
2506
2507 config {
2508 pins = "gpio17","gpio18";
2509 bias-pull-up; /* PULL UP*/
2510 drive-strength = <2>; /* 2 MA */
2511 };
2512 };
2513
2514 cci0_suspend: cci0_suspend {
2515 mux {
2516 /* CLK, DATA */
2517 pins = "gpio17","gpio18";
2518 function = "cci_i2c";
2519 };
2520
2521 config {
2522 pins = "gpio17","gpio18";
2523 bias-pull-down; /* PULL DOWN */
2524 drive-strength = <2>; /* 2 MA */
2525 };
2526 };
2527
2528 cci1_active: cci1_active {
2529 mux {
2530 /* CLK, DATA */
2531 pins = "gpio19","gpio20";
2532 function = "cci_i2c";
2533 };
2534
2535 config {
2536 pins = "gpio19","gpio20";
2537 bias-pull-up; /* PULL UP*/
2538 drive-strength = <2>; /* 2 MA */
2539 };
2540 };
2541
2542 cci1_suspend: cci1_suspend {
2543 mux {
2544 /* CLK, DATA */
2545 pins = "gpio19","gpio20";
2546 function = "cci_i2c";
2547 };
2548
2549 config {
2550 pins = "gpio19","gpio20";
2551 bias-pull-down; /* PULL DOWN */
2552 drive-strength = <2>; /* 2 MA */
2553 };
2554 };
2555
2556 cam_sensor_mclk0_active: cam_sensor_mclk0_active {
2557 /* MCLK0 */
2558 mux {
2559 pins = "gpio13";
2560 function = "cam_mclk";
2561 };
2562
2563 config {
2564 pins = "gpio13";
2565 bias-disable; /* No PULL */
2566 drive-strength = <2>; /* 2 MA */
2567 };
2568 };
2569
2570 cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend {
2571 /* MCLK0 */
2572 mux {
2573 pins = "gpio13";
2574 function = "cam_mclk";
2575 };
2576
2577 config {
2578 pins = "gpio13";
2579 bias-pull-down; /* PULL DOWN */
2580 drive-strength = <2>; /* 2 MA */
2581 };
2582 };
2583
2584 cam_sensor_rear_active: cam_sensor_rear_active {
2585 /* RESET, AVDD LDO */
2586 mux {
2587 pins = "gpio80","gpio79";
2588 function = "gpio";
2589 };
2590
2591 config {
2592 pins = "gpio80","gpio79";
2593 bias-disable; /* No PULL */
2594 drive-strength = <2>; /* 2 MA */
2595 };
2596 };
2597
2598 cam_sensor_rear_suspend: cam_sensor_rear_suspend {
2599 /* RESET, AVDD LDO */
2600 mux {
2601 pins = "gpio80","gpio79";
2602 function = "gpio";
2603 };
2604
2605 config {
2606 pins = "gpio80","gpio79";
2607 bias-disable; /* No PULL */
2608 drive-strength = <2>; /* 2 MA */
2609 };
2610 };
2611
2612 cam_sensor_mclk1_active: cam_sensor_mclk1_active {
2613 /* MCLK1 */
2614 mux {
2615 pins = "gpio14";
2616 function = "cam_mclk";
2617 };
2618
2619 config {
2620 pins = "gpio14";
2621 bias-disable; /* No PULL */
2622 drive-strength = <2>; /* 2 MA */
2623 };
2624 };
2625
2626 cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend {
2627 /* MCLK1 */
2628 mux {
2629 pins = "gpio14";
2630 function = "cam_mclk";
2631 };
2632
2633 config {
2634 pins = "gpio14";
2635 bias-pull-down; /* PULL DOWN */
2636 drive-strength = <2>; /* 2 MA */
2637 };
2638 };
2639
2640 cam_sensor_front_active: cam_sensor_front_active {
2641 /* RESET AVDD_LDO*/
2642 mux {
2643 pins = "gpio28", "gpio8";
2644 function = "gpio";
2645 };
2646
2647 config {
2648 pins = "gpio28", "gpio8";
2649 bias-disable; /* No PULL */
2650 drive-strength = <2>; /* 2 MA */
2651 };
2652 };
2653
2654 cam_sensor_front_suspend: cam_sensor_front_suspend {
2655 /* RESET */
2656 mux {
2657 pins = "gpio28";
2658 function = "gpio";
2659 };
2660
2661 config {
2662 pins = "gpio28";
2663 bias-disable; /* No PULL */
2664 drive-strength = <2>; /* 2 MA */
2665 };
2666 };
2667
2668 cam_sensor_mclk2_active: cam_sensor_mclk2_active {
2669 /* MCLK1 */
2670 mux {
2671 /* CLK, DATA */
2672 pins = "gpio15";
2673 function = "cam_mclk";
2674 };
2675
2676 config {
2677 pins = "gpio15";
2678 bias-disable; /* No PULL */
2679 drive-strength = <2>; /* 2 MA */
2680 };
2681 };
2682
2683 cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend {
2684 /* MCLK1 */
2685 mux {
2686 /* CLK, DATA */
2687 pins = "gpio15";
2688 function = "cam_mclk";
2689 };
2690
2691 config {
2692 pins = "gpio15";
2693 bias-pull-down; /* PULL DOWN */
2694 drive-strength = <2>; /* 2 MA */
2695 };
2696 };
2697
2698 cam_sensor_rear2_active: cam_sensor_rear2_active {
2699 /* RESET, STANDBY */
2700 mux {
2701 pins = "gpio9","gpio8";
2702 function = "gpio";
2703 };
2704
2705 config {
2706 pins = "gpio9","gpio8";
2707 bias-disable; /* No PULL */
2708 drive-strength = <2>; /* 2 MA */
2709 };
2710 };
2711
2712 cam_sensor_rear2_suspend: cam_sensor_rear2_suspend {
2713 /* RESET, STANDBY */
2714 mux {
2715 pins = "gpio9","gpio8";
2716 function = "gpio";
2717 };
2718 config {
2719 pins = "gpio9","gpio8";
2720 bias-disable; /* No PULL */
2721 drive-strength = <2>; /* 2 MA */
2722 };
2723 };
Satyajit Desaie4508132017-04-05 17:15:22 -07002724
2725 trigout_a: trigout_a {
2726 mux {
Satyajit Desai602a6712017-05-09 14:45:16 -07002727 pins = "gpio90";
Satyajit Desaie4508132017-04-05 17:15:22 -07002728 function = "qdss_cti";
2729 };
2730 config {
Satyajit Desai602a6712017-05-09 14:45:16 -07002731 pins = "gpio90";
Satyajit Desaie4508132017-04-05 17:15:22 -07002732 drive-strength = <2>;
2733 bias-disable;
2734 };
2735 };
Kyle Yan679cbee2016-07-27 16:55:20 -07002736 };
2737};
David Collinsc6686252017-03-31 14:23:09 -07002738
2739&pm8998_gpios {
2740 key_home {
2741 key_home_default: key_home_default {
2742 pins = "gpio5";
2743 function = "normal";
2744 input-enable;
2745 bias-pull-up;
2746 power-source = <0>;
2747 };
2748 };
2749
2750 key_vol_up {
2751 key_vol_up_default: key_vol_up_default {
2752 pins = "gpio6";
2753 function = "normal";
2754 input-enable;
2755 bias-pull-up;
2756 power-source = <0>;
2757 };
2758 };
2759
2760 key_cam_snapshot {
2761 key_cam_snapshot_default: key_cam_snapshot_default {
2762 pins = "gpio7";
2763 function = "normal";
2764 input-enable;
2765 bias-pull-up;
2766 power-source = <0>;
2767 };
2768 };
2769
2770 key_cam_focus {
2771 key_cam_focus_default: key_cam_focus_default {
2772 pins = "gpio8";
2773 function = "normal";
2774 input-enable;
2775 bias-pull-up;
2776 power-source = <0>;
2777 };
2778 };
Jigarkumar Zala861231152017-02-28 14:05:11 -08002779
2780 camera_dvdd_en {
2781 camera_dvdd_en_default: camera_dvdd_en_default {
2782 pins = "gpio9";
2783 function = "normal";
2784 power-source = <0>;
2785 output-low;
2786 };
2787 };
2788
2789 camera_rear_dvdd_en {
2790 camera_rear_dvdd_en_default: camera_rear_dvdd_en_default {
2791 pins = "gpio12";
2792 function = "normal";
2793 power-source = <0>;
2794 output-low;
2795 };
2796 };
David Collinsc6686252017-03-31 14:23:09 -07002797};
Jack Phamc2160c842017-04-05 09:48:59 -07002798
2799&pmi8998_gpios {
2800 usb2_vbus_boost {
2801 usb2_vbus_boost_default: usb2_vbus_boost_default {
2802 pins = "gpio2";
2803 function = "normal";
2804 output-low;
2805 power-source = <0>;
2806 };
2807 };
2808
2809 usb2_vbus_det {
2810 usb2_vbus_det_default: usb2_vbus_det_default {
2811 pins = "gpio8";
2812 function = "normal";
2813 input-enable;
2814 bias-pull-down;
2815 power-source = <1>; /* VPH input supply */
2816 };
2817 };
2818
2819 usb2_id_det {
2820 usb2_id_det_default: usb2_id_det_default {
2821 pins = "gpio9";
2822 function = "normal";
2823 input-enable;
2824 bias-pull-up;
2825 power-source = <0>;
2826 };
2827 };
2828};