Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Red Hat Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Ben Skeggs |
| 23 | */ |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 24 | #include "priv.h" |
| 25 | #include "acpi.h" |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 26 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 27 | #include <core/client.h> |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 28 | #include <core/option.h> |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 29 | #include <core/notify.h> |
| 30 | #include <core/parent.h> |
Ben Skeggs | ddbb55a | 2014-11-18 10:51:19 +1000 | [diff] [blame] | 31 | #include <subdev/bios.h> |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 32 | #include <subdev/fb.h> |
| 33 | #include <subdev/instmem.h> |
| 34 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 35 | #include <nvif/class.h> |
| 36 | #include <nvif/unpack.h> |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 37 | |
| 38 | static DEFINE_MUTEX(nv_devices_mutex); |
| 39 | static LIST_HEAD(nv_devices); |
| 40 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 41 | struct nvkm_device * |
| 42 | nvkm_device_find(u64 name) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 43 | { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 44 | struct nvkm_device *device, *match = NULL; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 45 | mutex_lock(&nv_devices_mutex); |
| 46 | list_for_each_entry(device, &nv_devices, head) { |
| 47 | if (device->handle == name) { |
| 48 | match = device; |
| 49 | break; |
| 50 | } |
| 51 | } |
| 52 | mutex_unlock(&nv_devices_mutex); |
| 53 | return match; |
| 54 | } |
| 55 | |
Ben Skeggs | 803c178 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 56 | int |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 57 | nvkm_device_list(u64 *name, int size) |
Ben Skeggs | 803c178 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 58 | { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 59 | struct nvkm_device *device; |
Ben Skeggs | 803c178 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 60 | int nr = 0; |
| 61 | mutex_lock(&nv_devices_mutex); |
| 62 | list_for_each_entry(device, &nv_devices, head) { |
| 63 | if (nr++ < size) |
| 64 | name[nr - 1] = device->handle; |
| 65 | } |
| 66 | mutex_unlock(&nv_devices_mutex); |
| 67 | return nr; |
| 68 | } |
| 69 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 70 | /****************************************************************************** |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 71 | * nvkm_devobj (0x0080): class implementation |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 72 | *****************************************************************************/ |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 73 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 74 | struct nvkm_devobj { |
| 75 | struct nvkm_parent base; |
| 76 | struct nvkm_object *subdev[NVDEV_SUBDEV_NR]; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 77 | }; |
| 78 | |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 79 | static int |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 80 | nvkm_devobj_info(struct nvkm_object *object, void *data, u32 size) |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 81 | { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 82 | struct nvkm_device *device = nv_device(object); |
| 83 | struct nvkm_fb *pfb = nvkm_fb(device); |
| 84 | struct nvkm_instmem *imem = nvkm_instmem(device); |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 85 | union { |
| 86 | struct nv_device_info_v0 v0; |
| 87 | } *args = data; |
| 88 | int ret; |
| 89 | |
| 90 | nv_ioctl(object, "device info size %d\n", size); |
| 91 | if (nvif_unpack(args->v0, 0, 0, false)) { |
| 92 | nv_ioctl(object, "device info vers %d\n", args->v0.version); |
| 93 | } else |
| 94 | return ret; |
| 95 | |
| 96 | switch (device->chipset) { |
| 97 | case 0x01a: |
| 98 | case 0x01f: |
| 99 | case 0x04c: |
| 100 | case 0x04e: |
| 101 | case 0x063: |
| 102 | case 0x067: |
| 103 | case 0x068: |
| 104 | case 0x0aa: |
| 105 | case 0x0ac: |
| 106 | case 0x0af: |
| 107 | args->v0.platform = NV_DEVICE_INFO_V0_IGP; |
| 108 | break; |
| 109 | default: |
| 110 | if (device->pdev) { |
| 111 | if (pci_find_capability(device->pdev, PCI_CAP_ID_AGP)) |
| 112 | args->v0.platform = NV_DEVICE_INFO_V0_AGP; |
| 113 | else |
| 114 | if (pci_is_pcie(device->pdev)) |
| 115 | args->v0.platform = NV_DEVICE_INFO_V0_PCIE; |
| 116 | else |
| 117 | args->v0.platform = NV_DEVICE_INFO_V0_PCI; |
| 118 | } else { |
| 119 | args->v0.platform = NV_DEVICE_INFO_V0_SOC; |
| 120 | } |
| 121 | break; |
| 122 | } |
| 123 | |
| 124 | switch (device->card_type) { |
| 125 | case NV_04: args->v0.family = NV_DEVICE_INFO_V0_TNT; break; |
| 126 | case NV_10: |
| 127 | case NV_11: args->v0.family = NV_DEVICE_INFO_V0_CELSIUS; break; |
| 128 | case NV_20: args->v0.family = NV_DEVICE_INFO_V0_KELVIN; break; |
| 129 | case NV_30: args->v0.family = NV_DEVICE_INFO_V0_RANKINE; break; |
| 130 | case NV_40: args->v0.family = NV_DEVICE_INFO_V0_CURIE; break; |
| 131 | case NV_50: args->v0.family = NV_DEVICE_INFO_V0_TESLA; break; |
Ben Skeggs | 9c210f3 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 132 | case NV_C0: args->v0.family = NV_DEVICE_INFO_V0_FERMI; break; |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 133 | case NV_E0: args->v0.family = NV_DEVICE_INFO_V0_KEPLER; break; |
| 134 | case GM100: args->v0.family = NV_DEVICE_INFO_V0_MAXWELL; break; |
| 135 | default: |
| 136 | args->v0.family = 0; |
| 137 | break; |
| 138 | } |
| 139 | |
| 140 | args->v0.chipset = device->chipset; |
Ben Skeggs | 3704791 | 2014-11-17 22:56:37 +1000 | [diff] [blame] | 141 | args->v0.revision = device->chiprev; |
Alexandre Courbot | eaecf03 | 2015-02-20 18:22:59 +0900 | [diff] [blame] | 142 | if (pfb && pfb->ram) |
| 143 | args->v0.ram_size = args->v0.ram_user = pfb->ram->size; |
| 144 | else |
| 145 | args->v0.ram_size = args->v0.ram_user = 0; |
| 146 | if (imem && args->v0.ram_size > 0) |
| 147 | args->v0.ram_user = args->v0.ram_user - imem->reserved; |
| 148 | |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 149 | return 0; |
| 150 | } |
| 151 | |
| 152 | static int |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 153 | nvkm_devobj_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 154 | { |
| 155 | switch (mthd) { |
| 156 | case NV_DEVICE_V0_INFO: |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 157 | return nvkm_devobj_info(object, data, size); |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 158 | default: |
| 159 | break; |
| 160 | } |
| 161 | return -EINVAL; |
| 162 | } |
| 163 | |
| 164 | static u8 |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 165 | nvkm_devobj_rd08(struct nvkm_object *object, u64 addr) |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 166 | { |
| 167 | return nv_rd08(object->engine, addr); |
| 168 | } |
| 169 | |
| 170 | static u16 |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 171 | nvkm_devobj_rd16(struct nvkm_object *object, u64 addr) |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 172 | { |
| 173 | return nv_rd16(object->engine, addr); |
| 174 | } |
| 175 | |
| 176 | static u32 |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 177 | nvkm_devobj_rd32(struct nvkm_object *object, u64 addr) |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 178 | { |
| 179 | return nv_rd32(object->engine, addr); |
| 180 | } |
| 181 | |
| 182 | static void |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 183 | nvkm_devobj_wr08(struct nvkm_object *object, u64 addr, u8 data) |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 184 | { |
| 185 | nv_wr08(object->engine, addr, data); |
| 186 | } |
| 187 | |
| 188 | static void |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 189 | nvkm_devobj_wr16(struct nvkm_object *object, u64 addr, u16 data) |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 190 | { |
| 191 | nv_wr16(object->engine, addr, data); |
| 192 | } |
| 193 | |
| 194 | static void |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 195 | nvkm_devobj_wr32(struct nvkm_object *object, u64 addr, u32 data) |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 196 | { |
| 197 | nv_wr32(object->engine, addr, data); |
| 198 | } |
| 199 | |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 200 | static int |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 201 | nvkm_devobj_map(struct nvkm_object *object, u64 *addr, u32 *size) |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 202 | { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 203 | struct nvkm_device *device = nv_device(object); |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 204 | *addr = nv_device_resource_start(device, 0); |
| 205 | *size = nv_device_resource_len(device, 0); |
| 206 | return 0; |
| 207 | } |
| 208 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 209 | static const u64 disable_map[] = { |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 210 | [NVDEV_SUBDEV_VBIOS] = NV_DEVICE_V0_DISABLE_VBIOS, |
| 211 | [NVDEV_SUBDEV_DEVINIT] = NV_DEVICE_V0_DISABLE_CORE, |
| 212 | [NVDEV_SUBDEV_GPIO] = NV_DEVICE_V0_DISABLE_CORE, |
| 213 | [NVDEV_SUBDEV_I2C] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | f3867f4 | 2015-01-13 23:37:38 +1000 | [diff] [blame] | 214 | [NVDEV_SUBDEV_CLK ] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 215 | [NVDEV_SUBDEV_MXM] = NV_DEVICE_V0_DISABLE_CORE, |
| 216 | [NVDEV_SUBDEV_MC] = NV_DEVICE_V0_DISABLE_CORE, |
| 217 | [NVDEV_SUBDEV_BUS] = NV_DEVICE_V0_DISABLE_CORE, |
| 218 | [NVDEV_SUBDEV_TIMER] = NV_DEVICE_V0_DISABLE_CORE, |
| 219 | [NVDEV_SUBDEV_FB] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 95484b5 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 220 | [NVDEV_SUBDEV_LTC] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 221 | [NVDEV_SUBDEV_IBUS] = NV_DEVICE_V0_DISABLE_CORE, |
| 222 | [NVDEV_SUBDEV_INSTMEM] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 5ce3bf3 | 2015-01-14 09:57:36 +1000 | [diff] [blame] | 223 | [NVDEV_SUBDEV_MMU] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 224 | [NVDEV_SUBDEV_BAR] = NV_DEVICE_V0_DISABLE_CORE, |
| 225 | [NVDEV_SUBDEV_VOLT] = NV_DEVICE_V0_DISABLE_CORE, |
| 226 | [NVDEV_SUBDEV_THERM] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | ebb58dc | 2015-01-14 00:04:21 +1000 | [diff] [blame] | 227 | [NVDEV_SUBDEV_PMU] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 3735354 | 2014-11-17 22:52:11 +1000 | [diff] [blame] | 228 | [NVDEV_SUBDEV_FUSE] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 229 | [NVDEV_ENGINE_DMAOBJ] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | d5752b9 | 2015-01-14 12:11:28 +1000 | [diff] [blame] | 230 | [NVDEV_ENGINE_PM ] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 231 | [NVDEV_ENGINE_FIFO] = NV_DEVICE_V0_DISABLE_FIFO, |
| 232 | [NVDEV_ENGINE_SW] = NV_DEVICE_V0_DISABLE_FIFO, |
Ben Skeggs | b8bf04e | 2015-01-14 12:02:28 +1000 | [diff] [blame] | 233 | [NVDEV_ENGINE_GR] = NV_DEVICE_V0_DISABLE_GR, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 234 | [NVDEV_ENGINE_MPEG] = NV_DEVICE_V0_DISABLE_MPEG, |
| 235 | [NVDEV_ENGINE_ME] = NV_DEVICE_V0_DISABLE_ME, |
| 236 | [NVDEV_ENGINE_VP] = NV_DEVICE_V0_DISABLE_VP, |
Ben Skeggs | 93d90ad | 2015-01-14 10:46:55 +1000 | [diff] [blame] | 237 | [NVDEV_ENGINE_CIPHER] = NV_DEVICE_V0_DISABLE_CIPHER, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 238 | [NVDEV_ENGINE_BSP] = NV_DEVICE_V0_DISABLE_BSP, |
Ben Skeggs | fd8666f | 2015-01-14 12:26:28 +1000 | [diff] [blame] | 239 | [NVDEV_ENGINE_MSPPP] = NV_DEVICE_V0_DISABLE_MSPPP, |
Ben Skeggs | aedf24f | 2015-01-14 11:50:20 +1000 | [diff] [blame] | 240 | [NVDEV_ENGINE_CE0] = NV_DEVICE_V0_DISABLE_CE0, |
| 241 | [NVDEV_ENGINE_CE1] = NV_DEVICE_V0_DISABLE_CE1, |
| 242 | [NVDEV_ENGINE_CE2] = NV_DEVICE_V0_DISABLE_CE2, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 243 | [NVDEV_ENGINE_VIC] = NV_DEVICE_V0_DISABLE_VIC, |
Ben Skeggs | bd8369e | 2015-01-14 12:37:00 +1000 | [diff] [blame] | 244 | [NVDEV_ENGINE_MSENC] = NV_DEVICE_V0_DISABLE_MSENC, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 245 | [NVDEV_ENGINE_DISP] = NV_DEVICE_V0_DISABLE_DISP, |
Ben Skeggs | eccf7e8a | 2015-01-14 10:09:24 +1000 | [diff] [blame] | 246 | [NVDEV_ENGINE_MSVLD] = NV_DEVICE_V0_DISABLE_MSVLD, |
Ben Skeggs | 93d90ad | 2015-01-14 10:46:55 +1000 | [diff] [blame] | 247 | [NVDEV_ENGINE_SEC] = NV_DEVICE_V0_DISABLE_SEC, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 248 | [NVDEV_SUBDEV_NR] = 0, |
| 249 | }; |
| 250 | |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 251 | static void |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 252 | nvkm_devobj_dtor(struct nvkm_object *object) |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 253 | { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 254 | struct nvkm_devobj *devobj = (void *)object; |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 255 | int i; |
| 256 | |
| 257 | for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 258 | nvkm_object_ref(NULL, &devobj->subdev[i]); |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 259 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 260 | nvkm_parent_destroy(&devobj->base); |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 261 | } |
| 262 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 263 | static struct nvkm_oclass |
| 264 | nvkm_devobj_oclass_super = { |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 265 | .handle = NV_DEVICE, |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 266 | .ofuncs = &(struct nvkm_ofuncs) { |
| 267 | .dtor = nvkm_devobj_dtor, |
| 268 | .init = _nvkm_parent_init, |
| 269 | .fini = _nvkm_parent_fini, |
| 270 | .mthd = nvkm_devobj_mthd, |
| 271 | .map = nvkm_devobj_map, |
| 272 | .rd08 = nvkm_devobj_rd08, |
| 273 | .rd16 = nvkm_devobj_rd16, |
| 274 | .rd32 = nvkm_devobj_rd32, |
| 275 | .wr08 = nvkm_devobj_wr08, |
| 276 | .wr16 = nvkm_devobj_wr16, |
| 277 | .wr32 = nvkm_devobj_wr32, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 278 | } |
| 279 | }; |
| 280 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 281 | static int |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 282 | nvkm_devobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine, |
| 283 | struct nvkm_oclass *oclass, void *data, u32 size, |
| 284 | struct nvkm_object **pobject) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 285 | { |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 286 | union { |
| 287 | struct nv_device_v0 v0; |
| 288 | } *args = data; |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 289 | struct nvkm_client *client = nv_client(parent); |
| 290 | struct nvkm_device *device; |
| 291 | struct nvkm_devobj *devobj; |
Marcin Slusarz | 950fbfa | 2012-12-29 16:24:37 +0100 | [diff] [blame] | 292 | u32 boot0, strap; |
| 293 | u64 disable, mmio_base, mmio_size; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 294 | void __iomem *map; |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 295 | int ret, i, c; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 296 | |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 297 | nv_ioctl(parent, "create device size %d\n", size); |
| 298 | if (nvif_unpack(args->v0, 0, 0, false)) { |
| 299 | nv_ioctl(parent, "create device v%d device %016llx " |
| 300 | "disable %016llx debug0 %016llx\n", |
| 301 | args->v0.version, args->v0.device, |
| 302 | args->v0.disable, args->v0.debug0); |
| 303 | } else |
| 304 | return ret; |
| 305 | |
| 306 | /* give priviledged clients register access */ |
| 307 | if (client->super) |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 308 | oclass = &nvkm_devobj_oclass_super; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 309 | |
| 310 | /* find the device subdev that matches what the client requested */ |
| 311 | device = nv_device(client->device); |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 312 | if (args->v0.device != ~0) { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 313 | device = nvkm_device_find(args->v0.device); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 314 | if (!device) |
| 315 | return -ENODEV; |
| 316 | } |
| 317 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 318 | ret = nvkm_parent_create(parent, nv_object(device), oclass, 0, |
| 319 | nvkm_control_oclass, |
| 320 | (1ULL << NVDEV_ENGINE_DMAOBJ) | |
| 321 | (1ULL << NVDEV_ENGINE_FIFO) | |
| 322 | (1ULL << NVDEV_ENGINE_DISP) | |
| 323 | (1ULL << NVDEV_ENGINE_PM), &devobj); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 324 | *pobject = nv_object(devobj); |
| 325 | if (ret) |
| 326 | return ret; |
| 327 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 328 | mmio_base = nv_device_resource_start(device, 0); |
| 329 | mmio_size = nv_device_resource_len(device, 0); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 330 | |
| 331 | /* translate api disable mask into internal mapping */ |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 332 | disable = args->v0.debug0; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 333 | for (i = 0; i < NVDEV_SUBDEV_NR; i++) { |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 334 | if (args->v0.disable & disable_map[i]) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 335 | disable |= (1ULL << i); |
| 336 | } |
| 337 | |
| 338 | /* identify the chipset, and determine classes of subdev/engines */ |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 339 | if (!(args->v0.disable & NV_DEVICE_V0_DISABLE_IDENTIFY) && |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 340 | !device->card_type) { |
| 341 | map = ioremap(mmio_base, 0x102000); |
Ben Skeggs | 43b1e9c | 2012-08-06 16:31:26 +1000 | [diff] [blame] | 342 | if (map == NULL) |
| 343 | return -ENOMEM; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 344 | |
| 345 | /* switch mmio to cpu's native endianness */ |
| 346 | #ifndef __BIG_ENDIAN |
Ben Skeggs | 9fcaa14 | 2015-02-02 09:08:14 +1000 | [diff] [blame] | 347 | if (ioread32_native(map + 0x000004) != 0x00000000) { |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 348 | #else |
Ben Skeggs | 9fcaa14 | 2015-02-02 09:08:14 +1000 | [diff] [blame] | 349 | if (ioread32_native(map + 0x000004) == 0x00000000) { |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 350 | #endif |
| 351 | iowrite32_native(0x01000001, map + 0x000004); |
Ben Skeggs | 9fcaa14 | 2015-02-02 09:08:14 +1000 | [diff] [blame] | 352 | ioread32_native(map); |
| 353 | } |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 354 | |
| 355 | /* read boot0 and strapping information */ |
| 356 | boot0 = ioread32_native(map + 0x000000); |
| 357 | strap = ioread32_native(map + 0x101000); |
| 358 | iounmap(map); |
| 359 | |
| 360 | /* determine chipset and derive architecture from it */ |
Ben Skeggs | dd5b84a | 2013-09-28 07:31:07 +1000 | [diff] [blame] | 361 | if ((boot0 & 0x1f000000) > 0) { |
| 362 | device->chipset = (boot0 & 0x1ff00000) >> 20; |
Ben Skeggs | 3704791 | 2014-11-17 22:56:37 +1000 | [diff] [blame] | 363 | device->chiprev = (boot0 & 0x000000ff); |
Ben Skeggs | dd5b84a | 2013-09-28 07:31:07 +1000 | [diff] [blame] | 364 | switch (device->chipset & 0x1f0) { |
Ben Skeggs | aabf19c | 2013-11-05 13:14:25 +1000 | [diff] [blame] | 365 | case 0x010: { |
Ilia Mirkin | 4a0ff75 | 2013-09-05 04:45:02 -0400 | [diff] [blame] | 366 | if (0x461 & (1 << (device->chipset & 0xf))) |
| 367 | device->card_type = NV_10; |
| 368 | else |
| 369 | device->card_type = NV_11; |
Ben Skeggs | 3704791 | 2014-11-17 22:56:37 +1000 | [diff] [blame] | 370 | device->chiprev = 0x00; |
Ilia Mirkin | 4a0ff75 | 2013-09-05 04:45:02 -0400 | [diff] [blame] | 371 | break; |
| 372 | } |
Ben Skeggs | aabf19c | 2013-11-05 13:14:25 +1000 | [diff] [blame] | 373 | case 0x020: device->card_type = NV_20; break; |
| 374 | case 0x030: device->card_type = NV_30; break; |
| 375 | case 0x040: |
| 376 | case 0x060: device->card_type = NV_40; break; |
| 377 | case 0x050: |
| 378 | case 0x080: |
| 379 | case 0x090: |
| 380 | case 0x0a0: device->card_type = NV_50; break; |
Ben Skeggs | 9c210f3 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 381 | case 0x0c0: |
| 382 | case 0x0d0: device->card_type = NV_C0; break; |
Ben Skeggs | aabf19c | 2013-11-05 13:14:25 +1000 | [diff] [blame] | 383 | case 0x0e0: |
| 384 | case 0x0f0: |
| 385 | case 0x100: device->card_type = NV_E0; break; |
Ben Skeggs | 083dba0 | 2014-08-18 14:02:14 +1000 | [diff] [blame] | 386 | case 0x110: |
| 387 | case 0x120: device->card_type = GM100; break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 388 | default: |
| 389 | break; |
| 390 | } |
| 391 | } else |
| 392 | if ((boot0 & 0xff00fff0) == 0x20004000) { |
| 393 | if (boot0 & 0x00f00000) |
| 394 | device->chipset = 0x05; |
| 395 | else |
| 396 | device->chipset = 0x04; |
| 397 | device->card_type = NV_04; |
| 398 | } |
| 399 | |
| 400 | switch (device->card_type) { |
| 401 | case NV_04: ret = nv04_identify(device); break; |
Ilia Mirkin | 4a0ff75 | 2013-09-05 04:45:02 -0400 | [diff] [blame] | 402 | case NV_10: |
| 403 | case NV_11: ret = nv10_identify(device); break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 404 | case NV_20: ret = nv20_identify(device); break; |
| 405 | case NV_30: ret = nv30_identify(device); break; |
| 406 | case NV_40: ret = nv40_identify(device); break; |
| 407 | case NV_50: ret = nv50_identify(device); break; |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 408 | case NV_C0: ret = gf100_identify(device); break; |
| 409 | case NV_E0: ret = gk104_identify(device); break; |
Ben Skeggs | 3f20464 | 2014-02-24 11:28:37 +1000 | [diff] [blame] | 410 | case GM100: ret = gm100_identify(device); break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 411 | default: |
| 412 | ret = -EINVAL; |
| 413 | break; |
| 414 | } |
| 415 | |
| 416 | if (ret) { |
| 417 | nv_error(device, "unknown chipset, 0x%08x\n", boot0); |
| 418 | return ret; |
| 419 | } |
| 420 | |
| 421 | nv_info(device, "BOOT0 : 0x%08x\n", boot0); |
Ben Skeggs | 2094dd8 | 2012-07-27 08:28:20 +1000 | [diff] [blame] | 422 | nv_info(device, "Chipset: %s (NV%02X)\n", |
| 423 | device->cname, device->chipset); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 424 | nv_info(device, "Family : NV%02X\n", device->card_type); |
| 425 | |
| 426 | /* determine frequency of timing crystal */ |
Ilia Mirkin | 8aa816b | 2013-09-05 04:45:03 -0400 | [diff] [blame] | 427 | if ( device->card_type <= NV_10 || device->chipset < 0x17 || |
Viktor Novotný | 1f2285d4 | 2012-11-10 19:24:06 +0100 | [diff] [blame] | 428 | (device->chipset >= 0x20 && device->chipset < 0x25)) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 429 | strap &= 0x00000040; |
| 430 | else |
| 431 | strap &= 0x00400040; |
| 432 | |
| 433 | switch (strap) { |
| 434 | case 0x00000000: device->crystal = 13500; break; |
| 435 | case 0x00000040: device->crystal = 14318; break; |
| 436 | case 0x00400000: device->crystal = 27000; break; |
| 437 | case 0x00400040: device->crystal = 25000; break; |
| 438 | } |
| 439 | |
| 440 | nv_debug(device, "crystal freq: %dKHz\n", device->crystal); |
Ben Skeggs | ddbb55a | 2014-11-18 10:51:19 +1000 | [diff] [blame] | 441 | } else |
| 442 | if ( (args->v0.disable & NV_DEVICE_V0_DISABLE_IDENTIFY)) { |
| 443 | device->cname = "NULL"; |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 444 | device->oclass[NVDEV_SUBDEV_VBIOS] = &nvkm_bios_oclass; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 445 | } |
| 446 | |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 447 | if (!(args->v0.disable & NV_DEVICE_V0_DISABLE_MMIO) && |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 448 | !nv_subdev(device)->mmio) { |
| 449 | nv_subdev(device)->mmio = ioremap(mmio_base, mmio_size); |
| 450 | if (!nv_subdev(device)->mmio) { |
| 451 | nv_error(device, "unable to map device registers\n"); |
Ben Skeggs | 43b1e9c | 2012-08-06 16:31:26 +1000 | [diff] [blame] | 452 | return -ENOMEM; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 453 | } |
| 454 | } |
| 455 | |
| 456 | /* ensure requested subsystems are available for use */ |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 457 | for (i = 1, c = 1; i < NVDEV_SUBDEV_NR; i++) { |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 458 | if (!(oclass = device->oclass[i]) || (disable & (1ULL << i))) |
| 459 | continue; |
| 460 | |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 461 | if (device->subdev[i]) { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 462 | nvkm_object_ref(device->subdev[i], &devobj->subdev[i]); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 463 | continue; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 464 | } |
| 465 | |
Ben Skeggs | 741d778 | 2015-08-20 14:54:05 +1000 | [diff] [blame] | 466 | #define _(s,m) case s: \ |
| 467 | ret = nvkm_object_ctor(nv_object(device), NULL, oclass, NULL, \ |
| 468 | (s), (struct nvkm_object **)&device->m);\ |
| 469 | if (ret == -ENODEV) \ |
| 470 | continue; \ |
| 471 | if (ret) \ |
| 472 | return ret; \ |
| 473 | devobj->subdev[s] = (struct nvkm_object *)device->m; \ |
| 474 | device->subdev[s] = devobj->subdev[s]; \ |
| 475 | break |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 476 | |
Ben Skeggs | 741d778 | 2015-08-20 14:54:05 +1000 | [diff] [blame] | 477 | switch (i) { |
| 478 | _(NVDEV_SUBDEV_BAR , bar); |
| 479 | _(NVDEV_SUBDEV_VBIOS , bios); |
| 480 | _(NVDEV_SUBDEV_BUS , bus); |
| 481 | _(NVDEV_SUBDEV_CLK , clk); |
| 482 | _(NVDEV_SUBDEV_DEVINIT, devinit); |
| 483 | _(NVDEV_SUBDEV_FB , fb); |
| 484 | _(NVDEV_SUBDEV_FUSE , fuse); |
| 485 | _(NVDEV_SUBDEV_GPIO , gpio); |
| 486 | _(NVDEV_SUBDEV_I2C , i2c); |
| 487 | _(NVDEV_SUBDEV_IBUS , ibus); |
| 488 | _(NVDEV_SUBDEV_INSTMEM, imem); |
| 489 | _(NVDEV_SUBDEV_LTC , ltc); |
| 490 | _(NVDEV_SUBDEV_MC , mc); |
| 491 | _(NVDEV_SUBDEV_MMU , mmu); |
| 492 | _(NVDEV_SUBDEV_MXM , mxm); |
| 493 | _(NVDEV_SUBDEV_PMU , pmu); |
| 494 | _(NVDEV_SUBDEV_THERM , therm); |
| 495 | _(NVDEV_SUBDEV_TIMER , timer); |
| 496 | _(NVDEV_SUBDEV_VOLT , volt); |
| 497 | _(NVDEV_ENGINE_BSP , bsp); |
| 498 | _(NVDEV_ENGINE_CE0 , ce[0]); |
| 499 | _(NVDEV_ENGINE_CE1 , ce[1]); |
| 500 | _(NVDEV_ENGINE_CE2 , ce[2]); |
| 501 | _(NVDEV_ENGINE_CIPHER , cipher); |
| 502 | _(NVDEV_ENGINE_DISP , disp); |
| 503 | _(NVDEV_ENGINE_DMAOBJ , dma); |
| 504 | _(NVDEV_ENGINE_FIFO , fifo); |
| 505 | _(NVDEV_ENGINE_GR , gr); |
| 506 | _(NVDEV_ENGINE_IFB , ifb); |
| 507 | _(NVDEV_ENGINE_ME , me); |
| 508 | _(NVDEV_ENGINE_MPEG , mpeg); |
| 509 | _(NVDEV_ENGINE_MSENC , msenc); |
| 510 | _(NVDEV_ENGINE_MSPDEC , mspdec); |
| 511 | _(NVDEV_ENGINE_MSPPP , msppp); |
| 512 | _(NVDEV_ENGINE_MSVLD , msvld); |
| 513 | _(NVDEV_ENGINE_PM , pm); |
| 514 | _(NVDEV_ENGINE_SEC , sec); |
| 515 | _(NVDEV_ENGINE_SW , sw); |
| 516 | _(NVDEV_ENGINE_VIC , vic); |
| 517 | _(NVDEV_ENGINE_VP , vp); |
| 518 | default: |
| 519 | WARN_ON(1); |
| 520 | continue; |
| 521 | } |
| 522 | #undef _ |
Ben Skeggs | 61b365a | 2013-11-27 09:46:56 +1000 | [diff] [blame] | 523 | |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 524 | /* note: can't init *any* subdevs until devinit has been run |
| 525 | * due to not knowing exactly what the vbios init tables will |
| 526 | * mess with. devinit also can't be run until all of its |
| 527 | * dependencies have been created. |
| 528 | * |
| 529 | * this code delays init of any subdev until all of devinit's |
| 530 | * dependencies have been created, and then initialises each |
| 531 | * subdev in turn as they're created. |
| 532 | */ |
| 533 | while (i >= NVDEV_SUBDEV_DEVINIT_LAST && c <= i) { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 534 | struct nvkm_object *subdev = devobj->subdev[c++]; |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 535 | if (subdev && !nv_iclass(subdev, NV_ENGINE_CLASS)) { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 536 | ret = nvkm_object_inc(subdev); |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 537 | if (ret) |
| 538 | return ret; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 539 | atomic_dec(&nv_object(device)->usecount); |
| 540 | } else |
| 541 | if (subdev) { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 542 | nvkm_subdev_reset(subdev); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 543 | } |
| 544 | } |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 545 | } |
| 546 | |
| 547 | return 0; |
| 548 | } |
| 549 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 550 | static struct nvkm_ofuncs |
| 551 | nvkm_devobj_ofuncs = { |
| 552 | .ctor = nvkm_devobj_ctor, |
| 553 | .dtor = nvkm_devobj_dtor, |
| 554 | .init = _nvkm_parent_init, |
| 555 | .fini = _nvkm_parent_fini, |
| 556 | .mthd = nvkm_devobj_mthd, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 557 | }; |
| 558 | |
| 559 | /****************************************************************************** |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 560 | * nvkm_device: engine functions |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 561 | *****************************************************************************/ |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 562 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 563 | struct nvkm_device * |
Ben Skeggs | a38f37a | 2014-12-05 11:20:19 +1000 | [diff] [blame] | 564 | nv_device(void *obj) |
| 565 | { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 566 | struct nvkm_object *device = nv_object(obj); |
Ben Skeggs | 8000fb2 | 2014-12-05 12:21:34 +1000 | [diff] [blame] | 567 | if (device->engine == NULL) { |
| 568 | while (device && device->parent) |
| 569 | device = device->parent; |
| 570 | } else { |
Ben Skeggs | ec0e554 | 2014-12-05 12:37:19 +1000 | [diff] [blame] | 571 | device = &nv_object(obj)->engine->subdev.object; |
Ben Skeggs | 490d595 | 2014-12-05 11:26:23 +1000 | [diff] [blame] | 572 | if (device && device->parent) |
| 573 | device = device->parent; |
Ben Skeggs | a38f37a | 2014-12-05 11:20:19 +1000 | [diff] [blame] | 574 | } |
Ben Skeggs | 490d595 | 2014-12-05 11:26:23 +1000 | [diff] [blame] | 575 | #if CONFIG_NOUVEAU_DEBUG >= NV_DBG_PARANOIA |
| 576 | if (unlikely(!device)) |
| 577 | nv_assert("BAD CAST -> NvDevice, 0x%08x\n", nv_hclass(obj)); |
Ben Skeggs | a38f37a | 2014-12-05 11:20:19 +1000 | [diff] [blame] | 578 | #endif |
Ben Skeggs | a38f37a | 2014-12-05 11:20:19 +1000 | [diff] [blame] | 579 | return (void *)device; |
| 580 | } |
| 581 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 582 | static struct nvkm_oclass |
| 583 | nvkm_device_sclass[] = { |
| 584 | { 0x0080, &nvkm_devobj_ofuncs }, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 585 | {} |
| 586 | }; |
| 587 | |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 588 | static int |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 589 | nvkm_device_event_ctor(struct nvkm_object *object, void *data, u32 size, |
| 590 | struct nvkm_notify *notify) |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 591 | { |
| 592 | if (!WARN_ON(size != 0)) { |
| 593 | notify->size = 0; |
| 594 | notify->types = 1; |
| 595 | notify->index = 0; |
| 596 | return 0; |
| 597 | } |
| 598 | return -EINVAL; |
| 599 | } |
| 600 | |
| 601 | static const struct nvkm_event_func |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 602 | nvkm_device_event_func = { |
| 603 | .ctor = nvkm_device_event_ctor, |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 604 | }; |
| 605 | |
| 606 | static int |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 607 | nvkm_device_fini(struct nvkm_object *object, bool suspend) |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 608 | { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 609 | struct nvkm_device *device = (void *)object; |
| 610 | struct nvkm_object *subdev; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 611 | int ret, i; |
| 612 | |
| 613 | for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) { |
| 614 | if ((subdev = device->subdev[i])) { |
| 615 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 616 | ret = nvkm_object_dec(subdev, suspend); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 617 | if (ret && suspend) |
| 618 | goto fail; |
| 619 | } |
| 620 | } |
| 621 | } |
| 622 | |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 623 | ret = nvkm_acpi_fini(device, suspend); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 624 | fail: |
| 625 | for (; ret && i < NVDEV_SUBDEV_NR; i++) { |
| 626 | if ((subdev = device->subdev[i])) { |
| 627 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 628 | ret = nvkm_object_inc(subdev); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 629 | if (ret) { |
| 630 | /* XXX */ |
| 631 | } |
| 632 | } |
| 633 | } |
| 634 | } |
| 635 | |
| 636 | return ret; |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 637 | } |
| 638 | |
| 639 | static int |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 640 | nvkm_device_init(struct nvkm_object *object) |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 641 | { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 642 | struct nvkm_device *device = (void *)object; |
| 643 | struct nvkm_object *subdev; |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 644 | int ret, i = 0; |
| 645 | |
| 646 | ret = nvkm_acpi_init(device); |
| 647 | if (ret) |
| 648 | goto fail; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 649 | |
| 650 | for (i = 0; i < NVDEV_SUBDEV_NR; i++) { |
| 651 | if ((subdev = device->subdev[i])) { |
| 652 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 653 | ret = nvkm_object_inc(subdev); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 654 | if (ret) |
| 655 | goto fail; |
| 656 | } else { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 657 | nvkm_subdev_reset(subdev); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 658 | } |
| 659 | } |
| 660 | } |
| 661 | |
| 662 | ret = 0; |
| 663 | fail: |
| 664 | for (--i; ret && i >= 0; i--) { |
| 665 | if ((subdev = device->subdev[i])) { |
| 666 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 667 | nvkm_object_dec(subdev, false); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 668 | } |
| 669 | } |
| 670 | |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 671 | if (ret) |
| 672 | nvkm_acpi_fini(device, false); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 673 | return ret; |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 674 | } |
| 675 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 676 | static void |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 677 | nvkm_device_dtor(struct nvkm_object *object) |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 678 | { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 679 | struct nvkm_device *device = (void *)object; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 680 | |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 681 | nvkm_event_fini(&device->event); |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 682 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 683 | mutex_lock(&nv_devices_mutex); |
| 684 | list_del(&device->head); |
| 685 | mutex_unlock(&nv_devices_mutex); |
| 686 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 687 | if (nv_subdev(device)->mmio) |
| 688 | iounmap(nv_subdev(device)->mmio); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 689 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 690 | nvkm_engine_destroy(&device->engine); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 691 | } |
| 692 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 693 | resource_size_t |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 694 | nv_device_resource_start(struct nvkm_device *device, unsigned int bar) |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 695 | { |
| 696 | if (nv_device_is_pci(device)) { |
| 697 | return pci_resource_start(device->pdev, bar); |
| 698 | } else { |
| 699 | struct resource *res; |
| 700 | res = platform_get_resource(device->platformdev, |
| 701 | IORESOURCE_MEM, bar); |
| 702 | if (!res) |
| 703 | return 0; |
| 704 | return res->start; |
| 705 | } |
| 706 | } |
| 707 | |
| 708 | resource_size_t |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 709 | nv_device_resource_len(struct nvkm_device *device, unsigned int bar) |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 710 | { |
| 711 | if (nv_device_is_pci(device)) { |
| 712 | return pci_resource_len(device->pdev, bar); |
| 713 | } else { |
| 714 | struct resource *res; |
| 715 | res = platform_get_resource(device->platformdev, |
| 716 | IORESOURCE_MEM, bar); |
| 717 | if (!res) |
| 718 | return 0; |
| 719 | return resource_size(res); |
| 720 | } |
| 721 | } |
| 722 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 723 | int |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 724 | nv_device_get_irq(struct nvkm_device *device, bool stall) |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 725 | { |
| 726 | if (nv_device_is_pci(device)) { |
| 727 | return device->pdev->irq; |
| 728 | } else { |
| 729 | return platform_get_irq_byname(device->platformdev, |
| 730 | stall ? "stall" : "nonstall"); |
| 731 | } |
| 732 | } |
| 733 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 734 | static struct nvkm_oclass |
| 735 | nvkm_device_oclass = { |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 736 | .handle = NV_ENGINE(DEVICE, 0x00), |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 737 | .ofuncs = &(struct nvkm_ofuncs) { |
| 738 | .dtor = nvkm_device_dtor, |
| 739 | .init = nvkm_device_init, |
| 740 | .fini = nvkm_device_fini, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 741 | }, |
| 742 | }; |
| 743 | |
| 744 | int |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 745 | nvkm_device_create_(void *dev, enum nv_bus_type type, u64 name, |
| 746 | const char *sname, const char *cfg, const char *dbg, |
| 747 | int length, void **pobject) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 748 | { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 749 | struct nvkm_device *device; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 750 | int ret = -EEXIST; |
| 751 | |
| 752 | mutex_lock(&nv_devices_mutex); |
| 753 | list_for_each_entry(device, &nv_devices, head) { |
| 754 | if (device->handle == name) |
| 755 | goto done; |
| 756 | } |
| 757 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 758 | ret = nvkm_engine_create_(NULL, NULL, &nvkm_device_oclass, true, |
| 759 | "DEVICE", "device", length, pobject); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 760 | device = *pobject; |
| 761 | if (ret) |
| 762 | goto done; |
| 763 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 764 | switch (type) { |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 765 | case NVKM_BUS_PCI: |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 766 | device->pdev = dev; |
Ben Skeggs | 6d0d40e | 2015-08-20 14:54:06 +1000 | [diff] [blame^] | 767 | device->dev = &device->pdev->dev; |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 768 | break; |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 769 | case NVKM_BUS_PLATFORM: |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 770 | device->platformdev = dev; |
Ben Skeggs | 6d0d40e | 2015-08-20 14:54:06 +1000 | [diff] [blame^] | 771 | device->dev = &device->platformdev->dev; |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 772 | break; |
| 773 | } |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 774 | device->handle = name; |
| 775 | device->cfgopt = cfg; |
| 776 | device->dbgopt = dbg; |
| 777 | device->name = sname; |
| 778 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 779 | nv_subdev(device)->debug = nvkm_dbgopt(device->dbgopt, "DEVICE"); |
| 780 | nv_engine(device)->sclass = nvkm_device_sclass; |
Ben Skeggs | 0d5dd3f | 2015-08-20 14:54:05 +1000 | [diff] [blame] | 781 | list_add_tail(&device->head, &nv_devices); |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 782 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 783 | ret = nvkm_event_init(&nvkm_device_event_func, 1, 1, &device->event); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 784 | done: |
| 785 | mutex_unlock(&nv_devices_mutex); |
| 786 | return ret; |
| 787 | } |