Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand.c |
| 3 | * |
| 4 | * Overview: |
| 5 | * This is the generic MTD driver for NAND flash devices. It should be |
| 6 | * capable of working with almost all NAND chips currently available. |
| 7 | * Basic support for AG-AND chips is provided. |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 8 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * Additional technical information is available on |
| 10 | * http://www.linux-mtd.infradead.org/tech/nand.html |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 11 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 13 | * 2002-2006 Thomas Gleixner (tglx@linutronix.de) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 15 | * Credits: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 16 | * David Woodhouse for adding multichip support |
| 17 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | * Aleph One Ltd. and Toby Churchill Ltd. for supporting the |
| 19 | * rework for 2K page size chips |
| 20 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 21 | * TODO: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | * Enable cached programming for 2k page size chips |
| 23 | * Check, if mtd->ecctype should be set to MTD_ECC_HW |
| 24 | * if we have HW ecc support. |
| 25 | * The AG-AND chips have nice features for speed improvement, |
| 26 | * which are not supported yet. Read / program 4 pages in one go. |
| 27 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | * This program is free software; you can redistribute it and/or modify |
| 29 | * it under the terms of the GNU General Public License version 2 as |
| 30 | * published by the Free Software Foundation. |
| 31 | * |
| 32 | */ |
| 33 | |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 34 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <linux/delay.h> |
| 36 | #include <linux/errno.h> |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 37 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | #include <linux/sched.h> |
| 39 | #include <linux/slab.h> |
| 40 | #include <linux/types.h> |
| 41 | #include <linux/mtd/mtd.h> |
| 42 | #include <linux/mtd/nand.h> |
| 43 | #include <linux/mtd/nand_ecc.h> |
| 44 | #include <linux/mtd/compatmac.h> |
| 45 | #include <linux/interrupt.h> |
| 46 | #include <linux/bitops.h> |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 47 | #include <linux/leds.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <asm/io.h> |
| 49 | |
| 50 | #ifdef CONFIG_MTD_PARTITIONS |
| 51 | #include <linux/mtd/partitions.h> |
| 52 | #endif |
| 53 | |
| 54 | /* Define default oob placement schemes for large and small page devices */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 55 | static struct nand_ecclayout nand_oob_8 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | .eccbytes = 3, |
| 57 | .eccpos = {0, 1, 2}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 58 | .oobfree = { |
| 59 | {.offset = 3, |
| 60 | .length = 2}, |
| 61 | {.offset = 6, |
| 62 | .length = 2}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | }; |
| 64 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 65 | static struct nand_ecclayout nand_oob_16 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | .eccbytes = 6, |
| 67 | .eccpos = {0, 1, 2, 3, 6, 7}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 68 | .oobfree = { |
| 69 | {.offset = 8, |
| 70 | . length = 8}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | }; |
| 72 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 73 | static struct nand_ecclayout nand_oob_64 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | .eccbytes = 24, |
| 75 | .eccpos = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 76 | 40, 41, 42, 43, 44, 45, 46, 47, |
| 77 | 48, 49, 50, 51, 52, 53, 54, 55, |
| 78 | 56, 57, 58, 59, 60, 61, 62, 63}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 79 | .oobfree = { |
| 80 | {.offset = 2, |
| 81 | .length = 38}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 | }; |
| 83 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 84 | static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 85 | int new_state); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 87 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 88 | struct mtd_oob_ops *ops); |
| 89 | |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 90 | /* |
| 91 | * For devices which display every fart in the system on a seperate LED. Is |
| 92 | * compiled away when LED support is disabled. |
| 93 | */ |
| 94 | DEFINE_LED_TRIGGER(nand_led_trigger); |
| 95 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | /** |
| 97 | * nand_release_device - [GENERIC] release chip |
| 98 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 99 | * |
| 100 | * Deselect, release chip lock and wake up anyone waiting on the device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 102 | static void nand_release_device(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 104 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | |
| 106 | /* De-select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 107 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 108 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 109 | /* Release the controller and the chip */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 110 | spin_lock(&chip->controller->lock); |
| 111 | chip->controller->active = NULL; |
| 112 | chip->state = FL_READY; |
| 113 | wake_up(&chip->controller->wq); |
| 114 | spin_unlock(&chip->controller->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | } |
| 116 | |
| 117 | /** |
| 118 | * nand_read_byte - [DEFAULT] read one byte from the chip |
| 119 | * @mtd: MTD device structure |
| 120 | * |
| 121 | * Default read function for 8bit buswith |
| 122 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 123 | static uint8_t nand_read_byte(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 125 | struct nand_chip *chip = mtd->priv; |
| 126 | return readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | } |
| 128 | |
| 129 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip |
| 131 | * @mtd: MTD device structure |
| 132 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 133 | * Default read function for 16bit buswith with |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | * endianess conversion |
| 135 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 136 | static uint8_t nand_read_byte16(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 138 | struct nand_chip *chip = mtd->priv; |
| 139 | return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | } |
| 141 | |
| 142 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | * nand_read_word - [DEFAULT] read one word from the chip |
| 144 | * @mtd: MTD device structure |
| 145 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 146 | * Default read function for 16bit buswith without |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | * endianess conversion |
| 148 | */ |
| 149 | static u16 nand_read_word(struct mtd_info *mtd) |
| 150 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 151 | struct nand_chip *chip = mtd->priv; |
| 152 | return readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | } |
| 154 | |
| 155 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | * nand_select_chip - [DEFAULT] control CE line |
| 157 | * @mtd: MTD device structure |
| 158 | * @chip: chipnumber to select, -1 for deselect |
| 159 | * |
| 160 | * Default select function for 1 chip devices. |
| 161 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 162 | static void nand_select_chip(struct mtd_info *mtd, int chipnr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 164 | struct nand_chip *chip = mtd->priv; |
| 165 | |
| 166 | switch (chipnr) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | case -1: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 168 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | break; |
| 170 | case 0: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 171 | break; |
| 172 | |
| 173 | default: |
| 174 | BUG(); |
| 175 | } |
| 176 | } |
| 177 | |
| 178 | /** |
| 179 | * nand_write_buf - [DEFAULT] write buffer to chip |
| 180 | * @mtd: MTD device structure |
| 181 | * @buf: data buffer |
| 182 | * @len: number of bytes to write |
| 183 | * |
| 184 | * Default write function for 8bit buswith |
| 185 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 186 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | { |
| 188 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 189 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 191 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 192 | writeb(buf[i], chip->IO_ADDR_W); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | } |
| 194 | |
| 195 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 196 | * nand_read_buf - [DEFAULT] read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | * @mtd: MTD device structure |
| 198 | * @buf: buffer to store date |
| 199 | * @len: number of bytes to read |
| 200 | * |
| 201 | * Default read function for 8bit buswith |
| 202 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 203 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | { |
| 205 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 206 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 208 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 209 | buf[i] = readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | } |
| 211 | |
| 212 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 213 | * nand_verify_buf - [DEFAULT] Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 214 | * @mtd: MTD device structure |
| 215 | * @buf: buffer containing the data to compare |
| 216 | * @len: number of bytes to compare |
| 217 | * |
| 218 | * Default verify function for 8bit buswith |
| 219 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 220 | static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 221 | { |
| 222 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 223 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 225 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 226 | if (buf[i] != readb(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 228 | return 0; |
| 229 | } |
| 230 | |
| 231 | /** |
| 232 | * nand_write_buf16 - [DEFAULT] write buffer to chip |
| 233 | * @mtd: MTD device structure |
| 234 | * @buf: data buffer |
| 235 | * @len: number of bytes to write |
| 236 | * |
| 237 | * Default write function for 16bit buswith |
| 238 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 239 | static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 240 | { |
| 241 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 242 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | u16 *p = (u16 *) buf; |
| 244 | len >>= 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 245 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 246 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 247 | writew(p[i], chip->IO_ADDR_W); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 248 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | } |
| 250 | |
| 251 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 252 | * nand_read_buf16 - [DEFAULT] read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | * @mtd: MTD device structure |
| 254 | * @buf: buffer to store date |
| 255 | * @len: number of bytes to read |
| 256 | * |
| 257 | * Default read function for 16bit buswith |
| 258 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 259 | static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 260 | { |
| 261 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 262 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | u16 *p = (u16 *) buf; |
| 264 | len >>= 1; |
| 265 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 266 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 267 | p[i] = readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | } |
| 269 | |
| 270 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 271 | * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 272 | * @mtd: MTD device structure |
| 273 | * @buf: buffer containing the data to compare |
| 274 | * @len: number of bytes to compare |
| 275 | * |
| 276 | * Default verify function for 16bit buswith |
| 277 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 278 | static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 279 | { |
| 280 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 281 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | u16 *p = (u16 *) buf; |
| 283 | len >>= 1; |
| 284 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 285 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 286 | if (p[i] != readw(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | return -EFAULT; |
| 288 | |
| 289 | return 0; |
| 290 | } |
| 291 | |
| 292 | /** |
| 293 | * nand_block_bad - [DEFAULT] Read bad block marker from the chip |
| 294 | * @mtd: MTD device structure |
| 295 | * @ofs: offset from device start |
| 296 | * @getchip: 0, if the chip is already selected |
| 297 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 298 | * Check, if the block is bad. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | */ |
| 300 | static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) |
| 301 | { |
| 302 | int page, chipnr, res = 0; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 303 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | u16 bad; |
| 305 | |
| 306 | if (getchip) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 307 | page = (int)(ofs >> chip->page_shift); |
| 308 | chipnr = (int)(ofs >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 310 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 311 | |
| 312 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 313 | chip->select_chip(mtd, chipnr); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 314 | } else |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 315 | page = (int)ofs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 317 | if (chip->options & NAND_BUSWIDTH_16) { |
| 318 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE, |
| 319 | page & chip->pagemask); |
| 320 | bad = cpu_to_le16(chip->read_word(mtd)); |
| 321 | if (chip->badblockpos & 0x1) |
Vitaly Wool | 49196f3 | 2005-11-02 16:54:46 +0000 | [diff] [blame] | 322 | bad >>= 8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | if ((bad & 0xFF) != 0xff) |
| 324 | res = 1; |
| 325 | } else { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 326 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, |
| 327 | page & chip->pagemask); |
| 328 | if (chip->read_byte(mtd) != 0xff) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | res = 1; |
| 330 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 331 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 332 | if (getchip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | nand_release_device(mtd); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 334 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | return res; |
| 336 | } |
| 337 | |
| 338 | /** |
| 339 | * nand_default_block_markbad - [DEFAULT] mark a block bad |
| 340 | * @mtd: MTD device structure |
| 341 | * @ofs: offset from device start |
| 342 | * |
| 343 | * This is the default implementation, which can be overridden by |
| 344 | * a hardware specific driver. |
| 345 | */ |
| 346 | static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) |
| 347 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 348 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 349 | uint8_t buf[2] = { 0, 0 }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 350 | int block; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 351 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 352 | /* Get block number */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 353 | block = ((int)ofs) >> chip->bbt_erase_shift; |
| 354 | if (chip->bbt) |
| 355 | chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | |
| 357 | /* Do we have a flash based bad block table ? */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 358 | if (chip->options & NAND_USE_FLASH_BBT) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 359 | return nand_update_bbt(mtd, ofs); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 360 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 361 | /* We write two bytes, so we dont have to mess with 16 bit access */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 362 | ofs += mtd->oobsize; |
| 363 | chip->ops.len = 2; |
| 364 | chip->ops.datbuf = NULL; |
| 365 | chip->ops.oobbuf = buf; |
| 366 | chip->ops.ooboffs = chip->badblockpos & ~0x01; |
| 367 | |
| 368 | return nand_do_write_oob(mtd, ofs, &chip->ops); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 369 | } |
| 370 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 371 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 372 | * nand_check_wp - [GENERIC] check if the chip is write protected |
| 373 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 374 | * Check, if the device is write protected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 376 | * The function expects, that the device is already selected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 377 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 378 | static int nand_check_wp(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 379 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 380 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | /* Check the WP bit */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 382 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
| 383 | return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 384 | } |
| 385 | |
| 386 | /** |
| 387 | * nand_block_checkbad - [GENERIC] Check if a block is marked bad |
| 388 | * @mtd: MTD device structure |
| 389 | * @ofs: offset from device start |
| 390 | * @getchip: 0, if the chip is already selected |
| 391 | * @allowbbt: 1, if its allowed to access the bbt area |
| 392 | * |
| 393 | * Check, if the block is bad. Either by reading the bad block table or |
| 394 | * calling of the scan function. |
| 395 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 396 | static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, |
| 397 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 398 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 399 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 400 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 401 | if (!chip->bbt) |
| 402 | return chip->block_bad(mtd, ofs, getchip); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 403 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | /* Return info from the table */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 405 | return nand_isbad_bbt(mtd, ofs, allowbbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 406 | } |
| 407 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 408 | /* |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 409 | * Wait for the ready pin, after a command |
| 410 | * The timeout is catched later. |
| 411 | */ |
| 412 | static void nand_wait_ready(struct mtd_info *mtd) |
| 413 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 414 | struct nand_chip *chip = mtd->priv; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 415 | unsigned long timeo = jiffies + 2; |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 416 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 417 | led_trigger_event(nand_led_trigger, LED_FULL); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 418 | /* wait until command is processed or timeout occures */ |
| 419 | do { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 420 | if (chip->dev_ready(mtd)) |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 421 | break; |
Ingo Molnar | 8446f1d | 2005-09-06 15:16:27 -0700 | [diff] [blame] | 422 | touch_softlockup_watchdog(); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 423 | } while (time_before(jiffies, timeo)); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 424 | led_trigger_event(nand_led_trigger, LED_OFF); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 425 | } |
| 426 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 427 | /** |
| 428 | * nand_command - [DEFAULT] Send command to NAND device |
| 429 | * @mtd: MTD device structure |
| 430 | * @command: the command to be sent |
| 431 | * @column: the column address for this command, -1 if none |
| 432 | * @page_addr: the page address for this command, -1 if none |
| 433 | * |
| 434 | * Send command to NAND device. This function is used for small page |
| 435 | * devices (256/512 Bytes per page) |
| 436 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 437 | static void nand_command(struct mtd_info *mtd, unsigned int command, |
| 438 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 439 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 440 | register struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 441 | int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 443 | /* |
| 444 | * Write out the command to the device. |
| 445 | */ |
| 446 | if (command == NAND_CMD_SEQIN) { |
| 447 | int readcmd; |
| 448 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 449 | if (column >= mtd->writesize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 450 | /* OOB area */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 451 | column -= mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | readcmd = NAND_CMD_READOOB; |
| 453 | } else if (column < 256) { |
| 454 | /* First 256 bytes --> READ0 */ |
| 455 | readcmd = NAND_CMD_READ0; |
| 456 | } else { |
| 457 | column -= 256; |
| 458 | readcmd = NAND_CMD_READ1; |
| 459 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 460 | chip->cmd_ctrl(mtd, readcmd, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 461 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 462 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 463 | chip->cmd_ctrl(mtd, command, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 464 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 465 | /* |
| 466 | * Address cycle, when necessary |
| 467 | */ |
| 468 | ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE; |
| 469 | /* Serially input address */ |
| 470 | if (column != -1) { |
| 471 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 472 | if (chip->options & NAND_BUSWIDTH_16) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 473 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 474 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 475 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 476 | } |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 477 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 478 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 479 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 480 | chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 481 | /* One more address cycle for devices > 32MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 482 | if (chip->chipsize > (32 << 20)) |
| 483 | chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 484 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 485 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 486 | |
| 487 | /* |
| 488 | * program and erase have their own busy handlers |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 489 | * status and sequential in needs no delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 490 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 491 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 492 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 493 | case NAND_CMD_PAGEPROG: |
| 494 | case NAND_CMD_ERASE1: |
| 495 | case NAND_CMD_ERASE2: |
| 496 | case NAND_CMD_SEQIN: |
| 497 | case NAND_CMD_STATUS: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 498 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 499 | return; |
| 500 | |
| 501 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 502 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 503 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 504 | udelay(chip->chip_delay); |
| 505 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 506 | NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 507 | chip->cmd_ctrl(mtd, |
| 508 | NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 509 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | return; |
| 511 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 512 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 514 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | * If we don't have access to the busy pin, we apply the given |
| 516 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 517 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 518 | if (!chip->dev_ready) { |
| 519 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 521 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 523 | /* Apply this short delay always to ensure that we do wait tWB in |
| 524 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 525 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 526 | |
| 527 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 528 | } |
| 529 | |
| 530 | /** |
| 531 | * nand_command_lp - [DEFAULT] Send command to NAND large page device |
| 532 | * @mtd: MTD device structure |
| 533 | * @command: the command to be sent |
| 534 | * @column: the column address for this command, -1 if none |
| 535 | * @page_addr: the page address for this command, -1 if none |
| 536 | * |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 537 | * Send command to NAND device. This is the version for the new large page |
| 538 | * devices We dont have the separate regions as we have in the small page |
| 539 | * devices. We must emulate NAND_CMD_READOOB to keep the code compatible. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 540 | * |
| 541 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 542 | static void nand_command_lp(struct mtd_info *mtd, unsigned int command, |
| 543 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 544 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 545 | register struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | |
| 547 | /* Emulate NAND_CMD_READOOB */ |
| 548 | if (command == NAND_CMD_READOOB) { |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 549 | column += mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 550 | command = NAND_CMD_READ0; |
| 551 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 552 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 553 | /* Command latch cycle */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 554 | chip->cmd_ctrl(mtd, command & 0xff, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 555 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 556 | |
| 557 | if (column != -1 || page_addr != -1) { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 558 | int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 559 | |
| 560 | /* Serially input address */ |
| 561 | if (column != -1) { |
| 562 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 563 | if (chip->options & NAND_BUSWIDTH_16) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 564 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 565 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 566 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 567 | chip->cmd_ctrl(mtd, column >> 8, ctrl); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 568 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 570 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
| 571 | chip->cmd_ctrl(mtd, page_addr >> 8, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 572 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | /* One more address cycle for devices > 128MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 574 | if (chip->chipsize > (128 << 20)) |
| 575 | chip->cmd_ctrl(mtd, page_addr >> 16, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 576 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 577 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 579 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 580 | |
| 581 | /* |
| 582 | * program and erase have their own busy handlers |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 583 | * status, sequential in, and deplete1 need no delay |
| 584 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 585 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 586 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 587 | case NAND_CMD_CACHEDPROG: |
| 588 | case NAND_CMD_PAGEPROG: |
| 589 | case NAND_CMD_ERASE1: |
| 590 | case NAND_CMD_ERASE2: |
| 591 | case NAND_CMD_SEQIN: |
| 592 | case NAND_CMD_STATUS: |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 593 | case NAND_CMD_DEPLETE1: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | return; |
| 595 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 596 | /* |
| 597 | * read error status commands require only a short delay |
| 598 | */ |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 599 | case NAND_CMD_STATUS_ERROR: |
| 600 | case NAND_CMD_STATUS_ERROR0: |
| 601 | case NAND_CMD_STATUS_ERROR1: |
| 602 | case NAND_CMD_STATUS_ERROR2: |
| 603 | case NAND_CMD_STATUS_ERROR3: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 604 | udelay(chip->chip_delay); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 605 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 606 | |
| 607 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 608 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 610 | udelay(chip->chip_delay); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 611 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
| 612 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 613 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 614 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 615 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 616 | return; |
| 617 | |
| 618 | case NAND_CMD_READ0: |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 619 | chip->cmd_ctrl(mtd, NAND_CMD_READSTART, |
| 620 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 621 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 622 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 623 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 624 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 625 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 626 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | * If we don't have access to the busy pin, we apply the given |
| 628 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 629 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 630 | if (!chip->dev_ready) { |
| 631 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 632 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 633 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | } |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 635 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 636 | /* Apply this short delay always to ensure that we do wait tWB in |
| 637 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 638 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 639 | |
| 640 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 641 | } |
| 642 | |
| 643 | /** |
| 644 | * nand_get_device - [GENERIC] Get chip for selected access |
| 645 | * @this: the nand chip descriptor |
| 646 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 647 | * @new_state: the state which is requested |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | * |
| 649 | * Get the device and lock it for exclusive access |
| 650 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 651 | static int |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 652 | nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 653 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 654 | spinlock_t *lock = &chip->controller->lock; |
| 655 | wait_queue_head_t *wq = &chip->controller->wq; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 656 | DECLARE_WAITQUEUE(wait, current); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 657 | retry: |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 658 | spin_lock(lock); |
| 659 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 660 | /* Hardware controller shared among independend devices */ |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 661 | /* Hardware controller shared among independend devices */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 662 | if (!chip->controller->active) |
| 663 | chip->controller->active = chip; |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 664 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 665 | if (chip->controller->active == chip && chip->state == FL_READY) { |
| 666 | chip->state = new_state; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 667 | spin_unlock(lock); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 668 | return 0; |
| 669 | } |
| 670 | if (new_state == FL_PM_SUSPENDED) { |
| 671 | spin_unlock(lock); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 672 | return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 673 | } |
| 674 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 675 | add_wait_queue(wq, &wait); |
| 676 | spin_unlock(lock); |
| 677 | schedule(); |
| 678 | remove_wait_queue(wq, &wait); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | goto retry; |
| 680 | } |
| 681 | |
| 682 | /** |
| 683 | * nand_wait - [DEFAULT] wait until the command is done |
| 684 | * @mtd: MTD device structure |
| 685 | * @this: NAND chip structure |
| 686 | * @state: state to select the max. timeout value |
| 687 | * |
| 688 | * Wait for command done. This applies to erase and program only |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 689 | * Erase can take up to 400ms and program up to 20ms according to |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 690 | * general NAND and SmartMedia specs |
| 691 | * |
| 692 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 693 | static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip, int state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 694 | { |
| 695 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 696 | unsigned long timeo = jiffies; |
| 697 | int status; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 698 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 699 | if (state == FL_ERASING) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 700 | timeo += (HZ * 400) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 701 | else |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 702 | timeo += (HZ * 20) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 703 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 704 | led_trigger_event(nand_led_trigger, LED_FULL); |
| 705 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 706 | /* Apply this short delay always to ensure that we do wait tWB in |
| 707 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 708 | ndelay(100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 709 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 710 | if ((state == FL_ERASING) && (chip->options & NAND_IS_AND)) |
| 711 | chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 712 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 713 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 714 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 715 | while (time_before(jiffies, timeo)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 716 | /* Check, if we were interrupted */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 717 | if (chip->state != state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 718 | return 0; |
| 719 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 720 | if (chip->dev_ready) { |
| 721 | if (chip->dev_ready(mtd)) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 722 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | } else { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 724 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 725 | break; |
| 726 | } |
Thomas Gleixner | 20a6c21 | 2005-03-01 09:32:48 +0000 | [diff] [blame] | 727 | cond_resched(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 728 | } |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 729 | led_trigger_event(nand_led_trigger, LED_OFF); |
| 730 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 731 | status = (int)chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | return status; |
| 733 | } |
| 734 | |
| 735 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 736 | * nand_read_page_raw - [Intern] read raw page data without ecc |
| 737 | * @mtd: mtd info structure |
| 738 | * @chip: nand chip info structure |
| 739 | * @buf: buffer to store read data |
| 740 | */ |
| 741 | static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
| 742 | uint8_t *buf) |
| 743 | { |
| 744 | chip->read_buf(mtd, buf, mtd->writesize); |
| 745 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 746 | return 0; |
| 747 | } |
| 748 | |
| 749 | /** |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 750 | * nand_read_page_swecc - {REPLACABLE] software ecc based page read function |
| 751 | * @mtd: mtd info structure |
| 752 | * @chip: nand chip info structure |
| 753 | * @buf: buffer to store read data |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 754 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 755 | static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 756 | uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 758 | int i, eccsize = chip->ecc.size; |
| 759 | int eccbytes = chip->ecc.bytes; |
| 760 | int eccsteps = chip->ecc.steps; |
| 761 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 762 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 763 | uint8_t *ecc_code = chip->buffers.ecccode; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 764 | int *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 765 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 766 | nand_read_page_raw(mtd, chip, buf); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 767 | |
| 768 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 769 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 770 | |
| 771 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 772 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 773 | |
| 774 | eccsteps = chip->ecc.steps; |
| 775 | p = buf; |
| 776 | |
| 777 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 778 | int stat; |
| 779 | |
| 780 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
| 781 | if (stat == -1) |
| 782 | mtd->ecc_stats.failed++; |
| 783 | else |
| 784 | mtd->ecc_stats.corrected += stat; |
| 785 | } |
| 786 | return 0; |
Thomas Gleixner | 22c60f5 | 2005-04-04 19:56:32 +0100 | [diff] [blame] | 787 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 788 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 789 | /** |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 790 | * nand_read_page_hwecc - {REPLACABLE] hardware ecc based page read function |
| 791 | * @mtd: mtd info structure |
| 792 | * @chip: nand chip info structure |
| 793 | * @buf: buffer to store read data |
| 794 | * |
| 795 | * Not for syndrome calculating ecc controllers which need a special oob layout |
| 796 | */ |
| 797 | static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 798 | uint8_t *buf) |
| 799 | { |
| 800 | int i, eccsize = chip->ecc.size; |
| 801 | int eccbytes = chip->ecc.bytes; |
| 802 | int eccsteps = chip->ecc.steps; |
| 803 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 804 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 805 | uint8_t *ecc_code = chip->buffers.ecccode; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 806 | int *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 807 | |
| 808 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 809 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 810 | chip->read_buf(mtd, p, eccsize); |
| 811 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 812 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 813 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 814 | |
| 815 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 816 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 817 | |
| 818 | eccsteps = chip->ecc.steps; |
| 819 | p = buf; |
| 820 | |
| 821 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 822 | int stat; |
| 823 | |
| 824 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
| 825 | if (stat == -1) |
| 826 | mtd->ecc_stats.failed++; |
| 827 | else |
| 828 | mtd->ecc_stats.corrected += stat; |
| 829 | } |
| 830 | return 0; |
| 831 | } |
| 832 | |
| 833 | /** |
| 834 | * nand_read_page_syndrome - {REPLACABLE] hardware ecc syndrom based page read |
| 835 | * @mtd: mtd info structure |
| 836 | * @chip: nand chip info structure |
| 837 | * @buf: buffer to store read data |
| 838 | * |
| 839 | * The hw generator calculates the error syndrome automatically. Therefor |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 840 | * we need a special oob layout and handling. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 841 | */ |
| 842 | static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
| 843 | uint8_t *buf) |
| 844 | { |
| 845 | int i, eccsize = chip->ecc.size; |
| 846 | int eccbytes = chip->ecc.bytes; |
| 847 | int eccsteps = chip->ecc.steps; |
| 848 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 849 | uint8_t *oob = chip->oob_poi; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 850 | |
| 851 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 852 | int stat; |
| 853 | |
| 854 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 855 | chip->read_buf(mtd, p, eccsize); |
| 856 | |
| 857 | if (chip->ecc.prepad) { |
| 858 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 859 | oob += chip->ecc.prepad; |
| 860 | } |
| 861 | |
| 862 | chip->ecc.hwctl(mtd, NAND_ECC_READSYN); |
| 863 | chip->read_buf(mtd, oob, eccbytes); |
| 864 | stat = chip->ecc.correct(mtd, p, oob, NULL); |
| 865 | |
| 866 | if (stat == -1) |
| 867 | mtd->ecc_stats.failed++; |
| 868 | else |
| 869 | mtd->ecc_stats.corrected += stat; |
| 870 | |
| 871 | oob += eccbytes; |
| 872 | |
| 873 | if (chip->ecc.postpad) { |
| 874 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 875 | oob += chip->ecc.postpad; |
| 876 | } |
| 877 | } |
| 878 | |
| 879 | /* Calculate remaining oob bytes */ |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 880 | i = oob - chip->oob_poi; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 881 | if (i) |
| 882 | chip->read_buf(mtd, oob, i); |
| 883 | |
| 884 | return 0; |
| 885 | } |
| 886 | |
| 887 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 888 | * nand_transfer_oob - [Internal] Transfer oob to client buffer |
| 889 | * @chip: nand chip structure |
| 890 | * @ops: oob ops structure |
| 891 | */ |
| 892 | static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, |
| 893 | struct mtd_oob_ops *ops) |
| 894 | { |
| 895 | size_t len = ops->ooblen; |
| 896 | |
| 897 | switch(ops->mode) { |
| 898 | |
| 899 | case MTD_OOB_PLACE: |
| 900 | case MTD_OOB_RAW: |
| 901 | memcpy(oob, chip->oob_poi + ops->ooboffs, len); |
| 902 | return oob + len; |
| 903 | |
| 904 | case MTD_OOB_AUTO: { |
| 905 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
| 906 | size_t bytes; |
| 907 | |
| 908 | for(; free->length && len; free++, len -= bytes) { |
| 909 | bytes = min(len, free->length); |
| 910 | |
| 911 | memcpy(oob, chip->oob_poi + free->offset, bytes); |
| 912 | oob += bytes; |
| 913 | } |
| 914 | return oob; |
| 915 | } |
| 916 | default: |
| 917 | BUG(); |
| 918 | } |
| 919 | return NULL; |
| 920 | } |
| 921 | |
| 922 | /** |
| 923 | * nand_do_read_ops - [Internal] Read data with ECC |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 924 | * |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 925 | * @mtd: MTD device structure |
| 926 | * @from: offset to read from |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 927 | * |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 928 | * Internal function. Called with chip held. |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 929 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 930 | static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, |
| 931 | struct mtd_oob_ops *ops) |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 932 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 933 | int chipnr, page, realpage, col, bytes, aligned; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 934 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 935 | struct mtd_ecc_stats stats; |
| 936 | int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 937 | int sndcmd = 1; |
| 938 | int ret = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 939 | uint32_t readlen = ops->len; |
| 940 | uint8_t *bufpoi, *oob, *buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 941 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 942 | stats = mtd->ecc_stats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 943 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 944 | chipnr = (int)(from >> chip->chip_shift); |
| 945 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 946 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 947 | realpage = (int)(from >> chip->page_shift); |
| 948 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 949 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 950 | col = (int)(from & (mtd->writesize - 1)); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 951 | chip->oob_poi = chip->buffers.oobrbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 952 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 953 | buf = ops->datbuf; |
| 954 | oob = ops->oobbuf; |
| 955 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 956 | while(1) { |
| 957 | bytes = min(mtd->writesize - col, readlen); |
| 958 | aligned = (bytes == mtd->writesize); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 959 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 960 | /* Is the current page in the buffer ? */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 961 | if (realpage != chip->pagebuf || oob) { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 962 | bufpoi = aligned ? buf : chip->buffers.databuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 963 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 964 | if (likely(sndcmd)) { |
| 965 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
| 966 | sndcmd = 0; |
| 967 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 968 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 969 | /* Now read the page into the buffer */ |
| 970 | ret = chip->ecc.read_page(mtd, chip, bufpoi); |
| 971 | if (ret < 0) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 972 | break; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 973 | |
| 974 | /* Transfer not aligned data */ |
| 975 | if (!aligned) { |
| 976 | chip->pagebuf = realpage; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 977 | memcpy(buf, chip->buffers.databuf + col, bytes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 978 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 979 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 980 | buf += bytes; |
| 981 | |
| 982 | if (unlikely(oob)) { |
| 983 | /* Raw mode does data:oob:data:oob */ |
| 984 | if (ops->mode != MTD_OOB_RAW) |
| 985 | oob = nand_transfer_oob(chip, oob, ops); |
| 986 | else |
| 987 | buf = nand_transfer_oob(chip, buf, ops); |
| 988 | } |
| 989 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 990 | if (!(chip->options & NAND_NO_READRDY)) { |
| 991 | /* |
| 992 | * Apply delay or wait for ready/busy pin. Do |
| 993 | * this before the AUTOINCR check, so no |
| 994 | * problems arise if a chip which does auto |
| 995 | * increment is marked as NOAUTOINCR by the |
| 996 | * board driver. |
| 997 | */ |
| 998 | if (!chip->dev_ready) |
| 999 | udelay(chip->chip_delay); |
| 1000 | else |
| 1001 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1002 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1003 | } else { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1004 | memcpy(buf, chip->buffers.databuf + col, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1005 | buf += bytes; |
| 1006 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1007 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1008 | readlen -= bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1009 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1010 | if (!readlen) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1011 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1012 | |
| 1013 | /* For subsequent reads align to page boundary. */ |
| 1014 | col = 0; |
| 1015 | /* Increment page address */ |
| 1016 | realpage++; |
| 1017 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1018 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1019 | /* Check, if we cross a chip boundary */ |
| 1020 | if (!page) { |
| 1021 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1022 | chip->select_chip(mtd, -1); |
| 1023 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1024 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1025 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1026 | /* Check, if the chip supports auto page increment |
| 1027 | * or if we have hit a block boundary. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1028 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1029 | if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1030 | sndcmd = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1031 | } |
| 1032 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1033 | ops->retlen = ops->len - (size_t) readlen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1034 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1035 | if (ret) |
| 1036 | return ret; |
| 1037 | |
| 1038 | return mtd->ecc_stats.failed - stats.failed ? -EBADMSG : 0; |
| 1039 | } |
| 1040 | |
| 1041 | /** |
| 1042 | * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc |
| 1043 | * @mtd: MTD device structure |
| 1044 | * @from: offset to read from |
| 1045 | * @len: number of bytes to read |
| 1046 | * @retlen: pointer to variable to store the number of read bytes |
| 1047 | * @buf: the databuffer to put data |
| 1048 | * |
| 1049 | * Get hold of the chip and call nand_do_read |
| 1050 | */ |
| 1051 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 1052 | size_t *retlen, uint8_t *buf) |
| 1053 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1054 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1055 | int ret; |
| 1056 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1057 | /* Do not allow reads past end of device */ |
| 1058 | if ((from + len) > mtd->size) |
| 1059 | return -EINVAL; |
| 1060 | if (!len) |
| 1061 | return 0; |
| 1062 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1063 | nand_get_device(chip, mtd, FL_READING); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1064 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1065 | chip->ops.len = len; |
| 1066 | chip->ops.datbuf = buf; |
| 1067 | chip->ops.oobbuf = NULL; |
| 1068 | |
| 1069 | ret = nand_do_read_ops(mtd, from, &chip->ops); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1070 | |
| 1071 | nand_release_device(mtd); |
| 1072 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1073 | *retlen = chip->ops.retlen; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1074 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1075 | } |
| 1076 | |
| 1077 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1078 | * nand_do_read_oob - [Intern] NAND read out-of-band |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1079 | * @mtd: MTD device structure |
| 1080 | * @from: offset to read from |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1081 | * @ops: oob operations description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1082 | * |
| 1083 | * NAND read out-of-band data from the spare area |
| 1084 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1085 | static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, |
| 1086 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1087 | { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1088 | int col, page, realpage, chipnr, sndcmd = 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1089 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1090 | int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1091 | int direct, bytes, readlen = ops->len; |
| 1092 | uint8_t *bufpoi, *buf = ops->oobbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1093 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1094 | DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", |
| 1095 | (unsigned int)from, (int)len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1096 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1097 | chipnr = (int)(from >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1098 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1099 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1100 | /* Shift to get page */ |
| 1101 | realpage = (int)(from >> chip->page_shift); |
| 1102 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1103 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1104 | if (ops->mode != MTD_OOB_AUTO) { |
| 1105 | col = ops->ooboffs; |
| 1106 | direct = 1; |
| 1107 | } else { |
| 1108 | col = 0; |
| 1109 | direct = 0; |
| 1110 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1111 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1112 | while(1) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1113 | bytes = direct ? ops->ooblen : mtd->oobsize; |
| 1114 | bufpoi = direct ? buf : chip->buffers.oobrbuf; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1115 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1116 | if (likely(sndcmd)) { |
| 1117 | chip->cmdfunc(mtd, NAND_CMD_READOOB, col, page); |
| 1118 | sndcmd = 0; |
| 1119 | } |
| 1120 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1121 | chip->read_buf(mtd, bufpoi, bytes); |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1122 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1123 | if (unlikely(!direct)) |
| 1124 | buf = nand_transfer_oob(chip, buf, ops); |
| 1125 | else |
| 1126 | buf += ops->ooblen; |
| 1127 | |
| 1128 | readlen -= ops->ooblen; |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1129 | if (!readlen) |
| 1130 | break; |
| 1131 | |
| 1132 | if (!(chip->options & NAND_NO_READRDY)) { |
| 1133 | /* |
| 1134 | * Apply delay or wait for ready/busy pin. Do this |
| 1135 | * before the AUTOINCR check, so no problems arise if a |
| 1136 | * chip which does auto increment is marked as |
| 1137 | * NOAUTOINCR by the board driver. |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1138 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1139 | if (!chip->dev_ready) |
| 1140 | udelay(chip->chip_delay); |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1141 | else |
| 1142 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1143 | } |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1144 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1145 | /* Increment page address */ |
| 1146 | realpage++; |
| 1147 | |
| 1148 | page = realpage & chip->pagemask; |
| 1149 | /* Check, if we cross a chip boundary */ |
| 1150 | if (!page) { |
| 1151 | chipnr++; |
| 1152 | chip->select_chip(mtd, -1); |
| 1153 | chip->select_chip(mtd, chipnr); |
| 1154 | } |
| 1155 | |
| 1156 | /* Check, if the chip supports auto page increment |
| 1157 | * or if we have hit a block boundary. |
| 1158 | */ |
| 1159 | if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) |
| 1160 | sndcmd = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1161 | } |
| 1162 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1163 | ops->retlen = ops->len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1164 | return 0; |
| 1165 | } |
| 1166 | |
| 1167 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1168 | * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1169 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1170 | * @from: offset to read from |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1171 | * @ops: oob operation description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1172 | * |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1173 | * NAND read data and/or out-of-band data |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1174 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1175 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, |
| 1176 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1177 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1178 | int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, |
| 1179 | uint8_t *buf) = NULL; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1180 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1181 | int ret = -ENOTSUPP; |
| 1182 | |
| 1183 | ops->retlen = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1184 | |
| 1185 | /* Do not allow reads past end of device */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1186 | if ((from + ops->len) > mtd->size) { |
| 1187 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: " |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1188 | "Attempt read beyond end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1189 | return -EINVAL; |
| 1190 | } |
| 1191 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1192 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1193 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1194 | switch(ops->mode) { |
| 1195 | case MTD_OOB_PLACE: |
| 1196 | case MTD_OOB_AUTO: |
| 1197 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1198 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1199 | case MTD_OOB_RAW: |
| 1200 | /* Replace the read_page algorithm temporary */ |
| 1201 | read_page = chip->ecc.read_page; |
| 1202 | chip->ecc.read_page = nand_read_page_raw; |
| 1203 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1204 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1205 | default: |
| 1206 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1207 | } |
| 1208 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1209 | if (!ops->datbuf) |
| 1210 | ret = nand_do_read_oob(mtd, from, ops); |
| 1211 | else |
| 1212 | ret = nand_do_read_ops(mtd, from, ops); |
| 1213 | |
| 1214 | if (unlikely(ops->mode == MTD_OOB_RAW)) |
| 1215 | chip->ecc.read_page = read_page; |
| 1216 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1217 | nand_release_device(mtd); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1218 | return ret; |
| 1219 | } |
| 1220 | |
| 1221 | |
| 1222 | /** |
| 1223 | * nand_write_page_raw - [Intern] raw page write function |
| 1224 | * @mtd: mtd info structure |
| 1225 | * @chip: nand chip info structure |
| 1226 | * @buf: data buffer |
| 1227 | */ |
| 1228 | static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
| 1229 | const uint8_t *buf) |
| 1230 | { |
| 1231 | chip->write_buf(mtd, buf, mtd->writesize); |
| 1232 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1233 | } |
| 1234 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1235 | /** |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1236 | * nand_write_page_swecc - {REPLACABLE] software ecc based page write function |
| 1237 | * @mtd: mtd info structure |
| 1238 | * @chip: nand chip info structure |
| 1239 | * @buf: data buffer |
| 1240 | */ |
| 1241 | static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 1242 | const uint8_t *buf) |
| 1243 | { |
| 1244 | int i, eccsize = chip->ecc.size; |
| 1245 | int eccbytes = chip->ecc.bytes; |
| 1246 | int eccsteps = chip->ecc.steps; |
| 1247 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 1248 | const uint8_t *p = buf; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 1249 | int *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1250 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1251 | /* Software ecc calculation */ |
| 1252 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 1253 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1254 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1255 | for (i = 0; i < chip->ecc.total; i++) |
| 1256 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1257 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1258 | nand_write_page_raw(mtd, chip, buf); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1259 | } |
| 1260 | |
| 1261 | /** |
| 1262 | * nand_write_page_hwecc - {REPLACABLE] hardware ecc based page write function |
| 1263 | * @mtd: mtd info structure |
| 1264 | * @chip: nand chip info structure |
| 1265 | * @buf: data buffer |
| 1266 | */ |
| 1267 | static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 1268 | const uint8_t *buf) |
| 1269 | { |
| 1270 | int i, eccsize = chip->ecc.size; |
| 1271 | int eccbytes = chip->ecc.bytes; |
| 1272 | int eccsteps = chip->ecc.steps; |
| 1273 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 1274 | const uint8_t *p = buf; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 1275 | int *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1276 | |
| 1277 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1278 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
David Woodhouse | 29da9ce | 2006-05-26 23:05:44 +0100 | [diff] [blame] | 1279 | chip->write_buf(mtd, p, eccsize); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1280 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1281 | } |
| 1282 | |
| 1283 | for (i = 0; i < chip->ecc.total; i++) |
| 1284 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
| 1285 | |
| 1286 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1287 | } |
| 1288 | |
| 1289 | /** |
| 1290 | * nand_write_page_syndrome - {REPLACABLE] hardware ecc syndrom based page write |
| 1291 | * @mtd: mtd info structure |
| 1292 | * @chip: nand chip info structure |
| 1293 | * @buf: data buffer |
| 1294 | * |
| 1295 | * The hw generator calculates the error syndrome automatically. Therefor |
| 1296 | * we need a special oob layout and handling. |
| 1297 | */ |
| 1298 | static void nand_write_page_syndrome(struct mtd_info *mtd, |
| 1299 | struct nand_chip *chip, const uint8_t *buf) |
| 1300 | { |
| 1301 | int i, eccsize = chip->ecc.size; |
| 1302 | int eccbytes = chip->ecc.bytes; |
| 1303 | int eccsteps = chip->ecc.steps; |
| 1304 | const uint8_t *p = buf; |
| 1305 | uint8_t *oob = chip->oob_poi; |
| 1306 | |
| 1307 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1308 | |
| 1309 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
| 1310 | chip->write_buf(mtd, p, eccsize); |
| 1311 | |
| 1312 | if (chip->ecc.prepad) { |
| 1313 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 1314 | oob += chip->ecc.prepad; |
| 1315 | } |
| 1316 | |
| 1317 | chip->ecc.calculate(mtd, p, oob); |
| 1318 | chip->write_buf(mtd, oob, eccbytes); |
| 1319 | oob += eccbytes; |
| 1320 | |
| 1321 | if (chip->ecc.postpad) { |
| 1322 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 1323 | oob += chip->ecc.postpad; |
| 1324 | } |
| 1325 | } |
| 1326 | |
| 1327 | /* Calculate remaining oob bytes */ |
| 1328 | i = oob - chip->oob_poi; |
| 1329 | if (i) |
| 1330 | chip->write_buf(mtd, oob, i); |
| 1331 | } |
| 1332 | |
| 1333 | /** |
| 1334 | * nand_write_page - [INTERNAL] write one page |
| 1335 | * @mtd: MTD device structure |
| 1336 | * @chip: NAND chip descriptor |
| 1337 | * @buf: the data to write |
| 1338 | * @page: page number to write |
| 1339 | * @cached: cached programming |
| 1340 | */ |
| 1341 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
| 1342 | const uint8_t *buf, int page, int cached) |
| 1343 | { |
| 1344 | int status; |
| 1345 | |
| 1346 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
| 1347 | |
| 1348 | chip->ecc.write_page(mtd, chip, buf); |
| 1349 | |
| 1350 | /* |
| 1351 | * Cached progamming disabled for now, Not sure if its worth the |
| 1352 | * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s) |
| 1353 | */ |
| 1354 | cached = 0; |
| 1355 | |
| 1356 | if (!cached || !(chip->options & NAND_CACHEPRG)) { |
| 1357 | |
| 1358 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1359 | status = chip->waitfunc(mtd, chip, FL_WRITING); |
| 1360 | /* |
| 1361 | * See if operation failed and additional status checks are |
| 1362 | * available |
| 1363 | */ |
| 1364 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 1365 | status = chip->errstat(mtd, chip, FL_WRITING, status, |
| 1366 | page); |
| 1367 | |
| 1368 | if (status & NAND_STATUS_FAIL) |
| 1369 | return -EIO; |
| 1370 | } else { |
| 1371 | chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); |
| 1372 | status = chip->waitfunc(mtd, chip, FL_WRITING); |
| 1373 | } |
| 1374 | |
| 1375 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
| 1376 | /* Send command to read back the data */ |
| 1377 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
| 1378 | |
| 1379 | if (chip->verify_buf(mtd, buf, mtd->writesize)) |
| 1380 | return -EIO; |
| 1381 | #endif |
| 1382 | return 0; |
| 1383 | } |
| 1384 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1385 | /** |
| 1386 | * nand_fill_oob - [Internal] Transfer client buffer to oob |
| 1387 | * @chip: nand chip structure |
| 1388 | * @oob: oob data buffer |
| 1389 | * @ops: oob ops structure |
| 1390 | */ |
| 1391 | static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob, |
| 1392 | struct mtd_oob_ops *ops) |
| 1393 | { |
| 1394 | size_t len = ops->ooblen; |
| 1395 | |
| 1396 | switch(ops->mode) { |
| 1397 | |
| 1398 | case MTD_OOB_PLACE: |
| 1399 | case MTD_OOB_RAW: |
| 1400 | memcpy(chip->oob_poi + ops->ooboffs, oob, len); |
| 1401 | return oob + len; |
| 1402 | |
| 1403 | case MTD_OOB_AUTO: { |
| 1404 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
| 1405 | size_t bytes; |
| 1406 | |
| 1407 | for(; free->length && len; free++, len -= bytes) { |
| 1408 | bytes = min(len, free->length); |
| 1409 | memcpy(chip->oob_poi + free->offset, oob, bytes); |
| 1410 | oob += bytes; |
| 1411 | } |
| 1412 | return oob; |
| 1413 | } |
| 1414 | default: |
| 1415 | BUG(); |
| 1416 | } |
| 1417 | return NULL; |
| 1418 | } |
| 1419 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1420 | #define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0 |
| 1421 | |
| 1422 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1423 | * nand_do_write_ops - [Internal] NAND write with ECC |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1424 | * @mtd: MTD device structure |
| 1425 | * @to: offset to write to |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1426 | * @ops: oob operations description structure |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1427 | * |
| 1428 | * NAND write with ECC |
| 1429 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1430 | static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, |
| 1431 | struct mtd_oob_ops *ops) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1432 | { |
| 1433 | int chipnr, realpage, page, blockmask; |
| 1434 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1435 | uint32_t writelen = ops->len; |
| 1436 | uint8_t *oob = ops->oobbuf; |
| 1437 | uint8_t *buf = ops->datbuf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1438 | int bytes = mtd->writesize; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1439 | int ret; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1440 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1441 | ops->retlen = 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1442 | |
| 1443 | /* reject writes, which are not page aligned */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1444 | if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1445 | printk(KERN_NOTICE "nand_write: " |
| 1446 | "Attempt to write not page aligned data\n"); |
| 1447 | return -EINVAL; |
| 1448 | } |
| 1449 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1450 | if (!writelen) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1451 | return 0; |
| 1452 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1453 | /* Check, if it is write protected */ |
| 1454 | if (nand_check_wp(mtd)) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1455 | return -EIO; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1456 | |
| 1457 | chipnr = (int)(to >> chip->chip_shift); |
| 1458 | chip->select_chip(mtd, chipnr); |
| 1459 | |
| 1460 | realpage = (int)(to >> chip->page_shift); |
| 1461 | page = realpage & chip->pagemask; |
| 1462 | blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 1463 | |
| 1464 | /* Invalidate the page cache, when we write to the cached page */ |
| 1465 | if (to <= (chip->pagebuf << chip->page_shift) && |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1466 | (chip->pagebuf << chip->page_shift) < (to + ops->len)) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1467 | chip->pagebuf = -1; |
| 1468 | |
| 1469 | chip->oob_poi = chip->buffers.oobwbuf; |
| 1470 | |
| 1471 | while(1) { |
| 1472 | int cached = writelen > bytes && page != blockmask; |
| 1473 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1474 | if (unlikely(oob)) |
| 1475 | oob = nand_fill_oob(chip, oob, ops); |
| 1476 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1477 | ret = nand_write_page(mtd, chip, buf, page, cached); |
| 1478 | if (ret) |
| 1479 | break; |
| 1480 | |
| 1481 | writelen -= bytes; |
| 1482 | if (!writelen) |
| 1483 | break; |
| 1484 | |
| 1485 | buf += bytes; |
| 1486 | realpage++; |
| 1487 | |
| 1488 | page = realpage & chip->pagemask; |
| 1489 | /* Check, if we cross a chip boundary */ |
| 1490 | if (!page) { |
| 1491 | chipnr++; |
| 1492 | chip->select_chip(mtd, -1); |
| 1493 | chip->select_chip(mtd, chipnr); |
| 1494 | } |
| 1495 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1496 | |
| 1497 | if (unlikely(oob)) |
| 1498 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
| 1499 | |
| 1500 | ops->retlen = ops->len - writelen; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1501 | return ret; |
| 1502 | } |
| 1503 | |
| 1504 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1505 | * nand_write - [MTD Interface] NAND write with ECC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1506 | * @mtd: MTD device structure |
| 1507 | * @to: offset to write to |
| 1508 | * @len: number of bytes to write |
| 1509 | * @retlen: pointer to variable to store the number of written bytes |
| 1510 | * @buf: the data to write |
| 1511 | * |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1512 | * NAND write with ECC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1513 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1514 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1515 | size_t *retlen, const uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1516 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1517 | struct nand_chip *chip = mtd->priv; |
| 1518 | int ret; |
| 1519 | |
| 1520 | /* Do not allow reads past end of device */ |
| 1521 | if ((to + len) > mtd->size) |
| 1522 | return -EINVAL; |
| 1523 | if (!len) |
| 1524 | return 0; |
| 1525 | |
| 1526 | nand_get_device(chip, mtd, FL_READING); |
| 1527 | |
| 1528 | chip->ops.len = len; |
| 1529 | chip->ops.datbuf = (uint8_t *)buf; |
| 1530 | chip->ops.oobbuf = NULL; |
| 1531 | |
| 1532 | ret = nand_do_write_ops(mtd, to, &chip->ops); |
| 1533 | |
| 1534 | nand_release_device(mtd); |
| 1535 | |
| 1536 | *retlen = chip->ops.retlen; |
| 1537 | return ret; |
| 1538 | } |
| 1539 | |
| 1540 | /** |
| 1541 | * nand_do_write_oob - [MTD Interface] NAND write out-of-band |
| 1542 | * @mtd: MTD device structure |
| 1543 | * @to: offset to write to |
| 1544 | * @ops: oob operation description structure |
| 1545 | * |
| 1546 | * NAND write out-of-band |
| 1547 | */ |
| 1548 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 1549 | struct mtd_oob_ops *ops) |
| 1550 | { |
| 1551 | int chipnr, page, status; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1552 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1553 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1554 | DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1555 | (unsigned int)to, (int)ops->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1556 | |
| 1557 | /* Do not allow write past end of page */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1558 | if ((ops->ooboffs + ops->len) > mtd->oobsize) { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1559 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " |
| 1560 | "Attempt to write past end of page\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1561 | return -EINVAL; |
| 1562 | } |
| 1563 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1564 | chipnr = (int)(to >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1565 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1566 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1567 | /* Shift to get page */ |
| 1568 | page = (int)(to >> chip->page_shift); |
| 1569 | |
| 1570 | /* |
| 1571 | * Reset the chip. Some chips (like the Toshiba TC5832DC found in one |
| 1572 | * of my DiskOnChip 2000 test units) will clear the whole data page too |
| 1573 | * if we don't do this. I have no clue why, but I seem to have 'fixed' |
| 1574 | * it in the doc2000 driver in August 1999. dwmw2. |
| 1575 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1576 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1577 | |
| 1578 | /* Check, if it is write protected */ |
| 1579 | if (nand_check_wp(mtd)) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1580 | return -EROFS; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1581 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1582 | /* Invalidate the page cache, if we write to the cached page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1583 | if (page == chip->pagebuf) |
| 1584 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1585 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1586 | if (ops->mode == MTD_OOB_AUTO || NAND_MUST_PAD(chip)) { |
| 1587 | chip->oob_poi = chip->buffers.oobwbuf; |
| 1588 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
| 1589 | nand_fill_oob(chip, ops->oobbuf, ops); |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1590 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, |
| 1591 | page & chip->pagemask); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1592 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1593 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1594 | } else { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1595 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, |
| 1596 | mtd->writesize + ops->ooboffs, |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1597 | page & chip->pagemask); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1598 | chip->write_buf(mtd, ops->oobbuf, ops->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1599 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1600 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1601 | /* Send command to program the OOB data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1602 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1603 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1604 | status = chip->waitfunc(mtd, chip, FL_WRITING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1605 | |
| 1606 | /* See if device thinks it succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 1607 | if (status & NAND_STATUS_FAIL) { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1608 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " |
| 1609 | "Failed write, page 0x%08x\n", page); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1610 | return -EIO; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1611 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1612 | ops->retlen = ops->len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1613 | |
| 1614 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1615 | if (ops->mode != MTD_OOB_AUTO) { |
| 1616 | /* Send command to read back the data */ |
| 1617 | chip->cmdfunc(mtd, NAND_CMD_READOOB, ops->ooboffs, |
| 1618 | page & chip->pagemask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1619 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1620 | if (chip->verify_buf(mtd, ops->oobbuf, ops->len)) { |
| 1621 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " |
| 1622 | "Failed write verify, page 0x%08x\n", page); |
| 1623 | return -EIO; |
| 1624 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1625 | } |
| 1626 | #endif |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1627 | return 0; |
| 1628 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1629 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 1630 | /** |
| 1631 | * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band |
| 1632 | * @mtd: MTD device structure |
| 1633 | * @from: offset to read from |
| 1634 | * @ops: oob operation description structure |
| 1635 | */ |
| 1636 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, |
| 1637 | struct mtd_oob_ops *ops) |
| 1638 | { |
| 1639 | void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, |
| 1640 | const uint8_t *buf) = NULL; |
| 1641 | struct nand_chip *chip = mtd->priv; |
| 1642 | int ret = -ENOTSUPP; |
| 1643 | |
| 1644 | ops->retlen = 0; |
| 1645 | |
| 1646 | /* Do not allow writes past end of device */ |
| 1647 | if ((to + ops->len) > mtd->size) { |
| 1648 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: " |
| 1649 | "Attempt read beyond end of device\n"); |
| 1650 | return -EINVAL; |
| 1651 | } |
| 1652 | |
| 1653 | nand_get_device(chip, mtd, FL_READING); |
| 1654 | |
| 1655 | switch(ops->mode) { |
| 1656 | case MTD_OOB_PLACE: |
| 1657 | case MTD_OOB_AUTO: |
| 1658 | break; |
| 1659 | |
| 1660 | case MTD_OOB_RAW: |
| 1661 | /* Replace the write_page algorithm temporary */ |
| 1662 | write_page = chip->ecc.write_page; |
| 1663 | chip->ecc.write_page = nand_write_page_raw; |
| 1664 | break; |
| 1665 | |
| 1666 | default: |
| 1667 | goto out; |
| 1668 | } |
| 1669 | |
| 1670 | if (!ops->datbuf) |
| 1671 | ret = nand_do_write_oob(mtd, to, ops); |
| 1672 | else |
| 1673 | ret = nand_do_write_ops(mtd, to, ops); |
| 1674 | |
| 1675 | if (unlikely(ops->mode == MTD_OOB_RAW)) |
| 1676 | chip->ecc.write_page = write_page; |
| 1677 | out: |
| 1678 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1679 | return ret; |
| 1680 | } |
| 1681 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1682 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1683 | * single_erease_cmd - [GENERIC] NAND standard block erase command function |
| 1684 | * @mtd: MTD device structure |
| 1685 | * @page: the page address of the block which will be erased |
| 1686 | * |
| 1687 | * Standard erase command for NAND chips |
| 1688 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1689 | static void single_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1690 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1691 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1692 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1693 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 1694 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1695 | } |
| 1696 | |
| 1697 | /** |
| 1698 | * multi_erease_cmd - [GENERIC] AND specific block erase command function |
| 1699 | * @mtd: MTD device structure |
| 1700 | * @page: the page address of the block which will be erased |
| 1701 | * |
| 1702 | * AND multi block erase command function |
| 1703 | * Erase 4 consecutive blocks |
| 1704 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1705 | static void multi_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1706 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1707 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1708 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1709 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1710 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1711 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1712 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 1713 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1714 | } |
| 1715 | |
| 1716 | /** |
| 1717 | * nand_erase - [MTD Interface] erase block(s) |
| 1718 | * @mtd: MTD device structure |
| 1719 | * @instr: erase instruction |
| 1720 | * |
| 1721 | * Erase one ore more blocks |
| 1722 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1723 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1724 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1725 | return nand_erase_nand(mtd, instr, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1726 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1727 | |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1728 | #define BBT_PAGE_MASK 0xffffff3f |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1729 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1730 | * nand_erase_nand - [Internal] erase block(s) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1731 | * @mtd: MTD device structure |
| 1732 | * @instr: erase instruction |
| 1733 | * @allowbbt: allow erasing the bbt area |
| 1734 | * |
| 1735 | * Erase one ore more blocks |
| 1736 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1737 | int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, |
| 1738 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1739 | { |
| 1740 | int page, len, status, pages_per_block, ret, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1741 | struct nand_chip *chip = mtd->priv; |
| 1742 | int rewrite_bbt[NAND_MAX_CHIPS]={0}; |
| 1743 | unsigned int bbt_masked_page = 0xffffffff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1744 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1745 | DEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n", |
| 1746 | (unsigned int)instr->addr, (unsigned int)instr->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1747 | |
| 1748 | /* Start address must align on block boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1749 | if (instr->addr & ((1 << chip->phys_erase_shift) - 1)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1750 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1751 | return -EINVAL; |
| 1752 | } |
| 1753 | |
| 1754 | /* Length must align on block boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1755 | if (instr->len & ((1 << chip->phys_erase_shift) - 1)) { |
| 1756 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1757 | "Length not block aligned\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1758 | return -EINVAL; |
| 1759 | } |
| 1760 | |
| 1761 | /* Do not allow erase past end of device */ |
| 1762 | if ((instr->len + instr->addr) > mtd->size) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1763 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1764 | "Erase past end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1765 | return -EINVAL; |
| 1766 | } |
| 1767 | |
| 1768 | instr->fail_addr = 0xffffffff; |
| 1769 | |
| 1770 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1771 | nand_get_device(chip, mtd, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1772 | |
| 1773 | /* Shift to get first page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1774 | page = (int)(instr->addr >> chip->page_shift); |
| 1775 | chipnr = (int)(instr->addr >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1776 | |
| 1777 | /* Calculate pages in each block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1778 | pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1779 | |
| 1780 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1781 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1782 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1783 | /* Check, if it is write protected */ |
| 1784 | if (nand_check_wp(mtd)) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1785 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1786 | "Device is write protected!!!\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1787 | instr->state = MTD_ERASE_FAILED; |
| 1788 | goto erase_exit; |
| 1789 | } |
| 1790 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1791 | /* |
| 1792 | * If BBT requires refresh, set the BBT page mask to see if the BBT |
| 1793 | * should be rewritten. Otherwise the mask is set to 0xffffffff which |
| 1794 | * can not be matched. This is also done when the bbt is actually |
| 1795 | * erased to avoid recusrsive updates |
| 1796 | */ |
| 1797 | if (chip->options & BBT_AUTO_REFRESH && !allowbbt) |
| 1798 | bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK; |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1799 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1800 | /* Loop through the pages */ |
| 1801 | len = instr->len; |
| 1802 | |
| 1803 | instr->state = MTD_ERASING; |
| 1804 | |
| 1805 | while (len) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1806 | /* |
| 1807 | * heck if we have a bad block, we do not erase bad blocks ! |
| 1808 | */ |
| 1809 | if (nand_block_checkbad(mtd, ((loff_t) page) << |
| 1810 | chip->page_shift, 0, allowbbt)) { |
| 1811 | printk(KERN_WARNING "nand_erase: attempt to erase a " |
| 1812 | "bad block at page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1813 | instr->state = MTD_ERASE_FAILED; |
| 1814 | goto erase_exit; |
| 1815 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1816 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1817 | /* |
| 1818 | * Invalidate the page cache, if we erase the block which |
| 1819 | * contains the current cached page |
| 1820 | */ |
| 1821 | if (page <= chip->pagebuf && chip->pagebuf < |
| 1822 | (page + pages_per_block)) |
| 1823 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1824 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1825 | chip->erase_cmd(mtd, page & chip->pagemask); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1826 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1827 | status = chip->waitfunc(mtd, chip, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1828 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1829 | /* |
| 1830 | * See if operation failed and additional status checks are |
| 1831 | * available |
| 1832 | */ |
| 1833 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 1834 | status = chip->errstat(mtd, chip, FL_ERASING, |
| 1835 | status, page); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1836 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1837 | /* See if block erase succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 1838 | if (status & NAND_STATUS_FAIL) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1839 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1840 | "Failed erase, page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1841 | instr->state = MTD_ERASE_FAILED; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1842 | instr->fail_addr = (page << chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1843 | goto erase_exit; |
| 1844 | } |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1845 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1846 | /* |
| 1847 | * If BBT requires refresh, set the BBT rewrite flag to the |
| 1848 | * page being erased |
| 1849 | */ |
| 1850 | if (bbt_masked_page != 0xffffffff && |
| 1851 | (page & BBT_PAGE_MASK) == bbt_masked_page) |
| 1852 | rewrite_bbt[chipnr] = (page << chip->page_shift); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1853 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1854 | /* Increment page address and decrement length */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1855 | len -= (1 << chip->phys_erase_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1856 | page += pages_per_block; |
| 1857 | |
| 1858 | /* Check, if we cross a chip boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1859 | if (len && !(page & chip->pagemask)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1860 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1861 | chip->select_chip(mtd, -1); |
| 1862 | chip->select_chip(mtd, chipnr); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1863 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1864 | /* |
| 1865 | * If BBT requires refresh and BBT-PERCHIP, set the BBT |
| 1866 | * page mask to see if this BBT should be rewritten |
| 1867 | */ |
| 1868 | if (bbt_masked_page != 0xffffffff && |
| 1869 | (chip->bbt_td->options & NAND_BBT_PERCHIP)) |
| 1870 | bbt_masked_page = chip->bbt_td->pages[chipnr] & |
| 1871 | BBT_PAGE_MASK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1872 | } |
| 1873 | } |
| 1874 | instr->state = MTD_ERASE_DONE; |
| 1875 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1876 | erase_exit: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1877 | |
| 1878 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; |
| 1879 | /* Do call back function */ |
| 1880 | if (!ret) |
| 1881 | mtd_erase_callback(instr); |
| 1882 | |
| 1883 | /* Deselect and wake up anyone waiting on the device */ |
| 1884 | nand_release_device(mtd); |
| 1885 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1886 | /* |
| 1887 | * If BBT requires refresh and erase was successful, rewrite any |
| 1888 | * selected bad block tables |
| 1889 | */ |
| 1890 | if (bbt_masked_page == 0xffffffff || ret) |
| 1891 | return ret; |
| 1892 | |
| 1893 | for (chipnr = 0; chipnr < chip->numchips; chipnr++) { |
| 1894 | if (!rewrite_bbt[chipnr]) |
| 1895 | continue; |
| 1896 | /* update the BBT for chip */ |
| 1897 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt " |
| 1898 | "(%d:0x%0x 0x%0x)\n", chipnr, rewrite_bbt[chipnr], |
| 1899 | chip->bbt_td->pages[chipnr]); |
| 1900 | nand_update_bbt(mtd, rewrite_bbt[chipnr]); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1901 | } |
| 1902 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1903 | /* Return more or less happy */ |
| 1904 | return ret; |
| 1905 | } |
| 1906 | |
| 1907 | /** |
| 1908 | * nand_sync - [MTD Interface] sync |
| 1909 | * @mtd: MTD device structure |
| 1910 | * |
| 1911 | * Sync is actually a wait for chip ready function |
| 1912 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1913 | static void nand_sync(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1914 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1915 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1916 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1917 | DEBUG(MTD_DEBUG_LEVEL3, "nand_sync: called\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1918 | |
| 1919 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1920 | nand_get_device(chip, mtd, FL_SYNCING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1921 | /* Release it and go back */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1922 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1923 | } |
| 1924 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1925 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1926 | * nand_block_isbad - [MTD Interface] Check if block at offset is bad |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1927 | * @mtd: MTD device structure |
| 1928 | * @ofs: offset relative to mtd start |
| 1929 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1930 | static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1931 | { |
| 1932 | /* Check for invalid offset */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1933 | if (offs > mtd->size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1934 | return -EINVAL; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1935 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1936 | return nand_block_checkbad(mtd, offs, 1, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1937 | } |
| 1938 | |
| 1939 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1940 | * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1941 | * @mtd: MTD device structure |
| 1942 | * @ofs: offset relative to mtd start |
| 1943 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1944 | static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1945 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1946 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1947 | int ret; |
| 1948 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1949 | if ((ret = nand_block_isbad(mtd, ofs))) { |
| 1950 | /* If it was bad already, return success and do nothing. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1951 | if (ret > 0) |
| 1952 | return 0; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1953 | return ret; |
| 1954 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1955 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1956 | return chip->block_markbad(mtd, ofs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1957 | } |
| 1958 | |
| 1959 | /** |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1960 | * nand_suspend - [MTD Interface] Suspend the NAND flash |
| 1961 | * @mtd: MTD device structure |
| 1962 | */ |
| 1963 | static int nand_suspend(struct mtd_info *mtd) |
| 1964 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1965 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1966 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1967 | return nand_get_device(chip, mtd, FL_PM_SUSPENDED); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1968 | } |
| 1969 | |
| 1970 | /** |
| 1971 | * nand_resume - [MTD Interface] Resume the NAND flash |
| 1972 | * @mtd: MTD device structure |
| 1973 | */ |
| 1974 | static void nand_resume(struct mtd_info *mtd) |
| 1975 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1976 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1977 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1978 | if (chip->state == FL_PM_SUSPENDED) |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1979 | nand_release_device(mtd); |
| 1980 | else |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 1981 | printk(KERN_ERR "nand_resume() called for a chip which is not " |
| 1982 | "in suspended state\n"); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1983 | } |
| 1984 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 1985 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1986 | * Set default functions |
| 1987 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1988 | static void nand_set_defaults(struct nand_chip *chip, int busw) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1989 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1990 | /* check for proper chip_delay setup, set 20us if not */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1991 | if (!chip->chip_delay) |
| 1992 | chip->chip_delay = 20; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1993 | |
| 1994 | /* check, if a user supplied command function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1995 | if (chip->cmdfunc == NULL) |
| 1996 | chip->cmdfunc = nand_command; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1997 | |
| 1998 | /* check, if a user supplied wait function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1999 | if (chip->waitfunc == NULL) |
| 2000 | chip->waitfunc = nand_wait; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2001 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2002 | if (!chip->select_chip) |
| 2003 | chip->select_chip = nand_select_chip; |
| 2004 | if (!chip->read_byte) |
| 2005 | chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; |
| 2006 | if (!chip->read_word) |
| 2007 | chip->read_word = nand_read_word; |
| 2008 | if (!chip->block_bad) |
| 2009 | chip->block_bad = nand_block_bad; |
| 2010 | if (!chip->block_markbad) |
| 2011 | chip->block_markbad = nand_default_block_markbad; |
| 2012 | if (!chip->write_buf) |
| 2013 | chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; |
| 2014 | if (!chip->read_buf) |
| 2015 | chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; |
| 2016 | if (!chip->verify_buf) |
| 2017 | chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf; |
| 2018 | if (!chip->scan_bbt) |
| 2019 | chip->scan_bbt = nand_default_bbt; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2020 | |
| 2021 | if (!chip->controller) { |
| 2022 | chip->controller = &chip->hwcontrol; |
| 2023 | spin_lock_init(&chip->controller->lock); |
| 2024 | init_waitqueue_head(&chip->controller->wq); |
| 2025 | } |
| 2026 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2027 | } |
| 2028 | |
| 2029 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2030 | * Get the flash and manufacturer id and lookup if the type is supported |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2031 | */ |
| 2032 | static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2033 | struct nand_chip *chip, |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2034 | int busw, int *maf_id) |
| 2035 | { |
| 2036 | struct nand_flash_dev *type = NULL; |
| 2037 | int i, dev_id, maf_idx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2038 | |
| 2039 | /* Select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2040 | chip->select_chip(mtd, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2041 | |
| 2042 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2043 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2044 | |
| 2045 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2046 | *maf_id = chip->read_byte(mtd); |
| 2047 | dev_id = chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2048 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2049 | /* Lookup the flash id */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2050 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2051 | if (dev_id == nand_flash_ids[i].id) { |
| 2052 | type = &nand_flash_ids[i]; |
| 2053 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2054 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2055 | } |
| 2056 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2057 | if (!type) |
| 2058 | return ERR_PTR(-ENODEV); |
| 2059 | |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2060 | if (!mtd->name) |
| 2061 | mtd->name = type->name; |
| 2062 | |
| 2063 | chip->chipsize = type->chipsize << 20; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2064 | |
| 2065 | /* Newer devices have all the information in additional id bytes */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2066 | if (!type->pagesize) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2067 | int extid; |
| 2068 | /* The 3rd id byte contains non relevant data ATM */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2069 | extid = chip->read_byte(mtd); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2070 | /* The 4th id byte is the important one */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2071 | extid = chip->read_byte(mtd); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2072 | /* Calc pagesize */ |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2073 | mtd->writesize = 1024 << (extid & 0x3); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2074 | extid >>= 2; |
| 2075 | /* Calc oobsize */ |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2076 | mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2077 | extid >>= 2; |
| 2078 | /* Calc blocksize. Blocksize is multiples of 64KiB */ |
| 2079 | mtd->erasesize = (64 * 1024) << (extid & 0x03); |
| 2080 | extid >>= 2; |
| 2081 | /* Get buswidth information */ |
| 2082 | busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; |
| 2083 | |
| 2084 | } else { |
| 2085 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2086 | * Old devices have chip data hardcoded in the device id table |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2087 | */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2088 | mtd->erasesize = type->erasesize; |
| 2089 | mtd->writesize = type->pagesize; |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2090 | mtd->oobsize = mtd->writesize / 32; |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2091 | busw = type->options & NAND_BUSWIDTH_16; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2092 | } |
| 2093 | |
| 2094 | /* Try to identify manufacturer */ |
| 2095 | for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_id++) { |
| 2096 | if (nand_manuf_ids[maf_idx].id == *maf_id) |
| 2097 | break; |
| 2098 | } |
| 2099 | |
| 2100 | /* |
| 2101 | * Check, if buswidth is correct. Hardware drivers should set |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2102 | * chip correct ! |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2103 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2104 | if (busw != (chip->options & NAND_BUSWIDTH_16)) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2105 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
| 2106 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, |
| 2107 | dev_id, nand_manuf_ids[maf_idx].name, mtd->name); |
| 2108 | printk(KERN_WARNING "NAND bus width %d instead %d bit\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2109 | (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2110 | busw ? 16 : 8); |
| 2111 | return ERR_PTR(-EINVAL); |
| 2112 | } |
| 2113 | |
| 2114 | /* Calculate the address shift from the page size */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2115 | chip->page_shift = ffs(mtd->writesize) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2116 | /* Convert chipsize to number of pages per chip -1. */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2117 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2118 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2119 | chip->bbt_erase_shift = chip->phys_erase_shift = |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2120 | ffs(mtd->erasesize) - 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2121 | chip->chip_shift = ffs(chip->chipsize) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2122 | |
| 2123 | /* Set the bad block position */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2124 | chip->badblockpos = mtd->writesize > 512 ? |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2125 | NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS; |
| 2126 | |
| 2127 | /* Get chip options, preserve non chip based options */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2128 | chip->options &= ~NAND_CHIPOPTIONS_MSK; |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2129 | chip->options |= type->options & NAND_CHIPOPTIONS_MSK; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2130 | |
| 2131 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2132 | * Set chip as a default. Board drivers can override it, if necessary |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2133 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2134 | chip->options |= NAND_NO_AUTOINCR; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2135 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2136 | /* Check if chip is a not a samsung device. Do not clear the |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2137 | * options for chips which are not having an extended id. |
| 2138 | */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2139 | if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2140 | chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2141 | |
| 2142 | /* Check for AND chips with 4 page planes */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2143 | if (chip->options & NAND_4PAGE_ARRAY) |
| 2144 | chip->erase_cmd = multi_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2145 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2146 | chip->erase_cmd = single_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2147 | |
| 2148 | /* Do not replace user supplied command function ! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2149 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
| 2150 | chip->cmdfunc = nand_command_lp; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2151 | |
| 2152 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
| 2153 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id, |
| 2154 | nand_manuf_ids[maf_idx].name, type->name); |
| 2155 | |
| 2156 | return type; |
| 2157 | } |
| 2158 | |
| 2159 | /* module_text_address() isn't exported, and it's mostly a pointless |
| 2160 | test if this is a module _anyway_ -- they'd have to try _really_ hard |
| 2161 | to call us from in-kernel code if the core NAND support is modular. */ |
| 2162 | #ifdef MODULE |
| 2163 | #define caller_is_module() (1) |
| 2164 | #else |
| 2165 | #define caller_is_module() \ |
| 2166 | module_text_address((unsigned long)__builtin_return_address(0)) |
| 2167 | #endif |
| 2168 | |
| 2169 | /** |
| 2170 | * nand_scan - [NAND Interface] Scan for the NAND device |
| 2171 | * @mtd: MTD device structure |
| 2172 | * @maxchips: Number of chips to scan for |
| 2173 | * |
| 2174 | * This fills out all the uninitialized function pointers |
| 2175 | * with the defaults. |
| 2176 | * The flash ID is read and the mtd/chip structures are |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2177 | * filled with the appropriate values. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2178 | * The mtd->owner field must be set to the module of the caller |
| 2179 | * |
| 2180 | */ |
| 2181 | int nand_scan(struct mtd_info *mtd, int maxchips) |
| 2182 | { |
| 2183 | int i, busw, nand_maf_id; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2184 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2185 | struct nand_flash_dev *type; |
| 2186 | |
| 2187 | /* Many callers got this wrong, so check for it for a while... */ |
| 2188 | if (!mtd->owner && caller_is_module()) { |
| 2189 | printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n"); |
| 2190 | BUG(); |
| 2191 | } |
| 2192 | |
| 2193 | /* Get buswidth to select the correct functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2194 | busw = chip->options & NAND_BUSWIDTH_16; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2195 | /* Set the default functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2196 | nand_set_defaults(chip, busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2197 | |
| 2198 | /* Read the flash type */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2199 | type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2200 | |
| 2201 | if (IS_ERR(type)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2202 | printk(KERN_WARNING "No NAND device found!!!\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2203 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2204 | return PTR_ERR(type); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2205 | } |
| 2206 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2207 | /* Check for a chip array */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2208 | for (i = 1; i < maxchips; i++) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2209 | chip->select_chip(mtd, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2210 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2211 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2212 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2213 | if (nand_maf_id != chip->read_byte(mtd) || |
| 2214 | type->id != chip->read_byte(mtd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2215 | break; |
| 2216 | } |
| 2217 | if (i > 1) |
| 2218 | printk(KERN_INFO "%d NAND chips detected\n", i); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2219 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2220 | /* Store the number of chips and calc total size for mtd */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2221 | chip->numchips = i; |
| 2222 | mtd->size = i * chip->chipsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2223 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2224 | /* Preset the internal oob write buffer */ |
| 2225 | memset(chip->buffers.oobwbuf, 0xff, mtd->oobsize); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2226 | |
| 2227 | /* |
| 2228 | * If no default placement scheme is given, select an appropriate one |
| 2229 | */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2230 | if (!chip->ecc.layout) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2231 | switch (mtd->oobsize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2232 | case 8: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2233 | chip->ecc.layout = &nand_oob_8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2234 | break; |
| 2235 | case 16: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2236 | chip->ecc.layout = &nand_oob_16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2237 | break; |
| 2238 | case 64: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2239 | chip->ecc.layout = &nand_oob_64; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2240 | break; |
| 2241 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2242 | printk(KERN_WARNING "No oob scheme defined for " |
| 2243 | "oobsize %d\n", mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2244 | BUG(); |
| 2245 | } |
| 2246 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2247 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2248 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2249 | * check ECC mode, default to software if 3byte/512byte hardware ECC is |
| 2250 | * selected and we have 256 byte pagesize fallback to software ECC |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2251 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2252 | switch (chip->ecc.mode) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2253 | case NAND_ECC_HW: |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2254 | /* Use standard hwecc read page function ? */ |
| 2255 | if (!chip->ecc.read_page) |
| 2256 | chip->ecc.read_page = nand_read_page_hwecc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2257 | if (!chip->ecc.write_page) |
| 2258 | chip->ecc.write_page = nand_write_page_hwecc; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2259 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2260 | case NAND_ECC_HW_SYNDROME: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2261 | if (!chip->ecc.calculate || !chip->ecc.correct || |
| 2262 | !chip->ecc.hwctl) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2263 | printk(KERN_WARNING "No ECC functions supplied, " |
| 2264 | "Hardware ECC not possible\n"); |
| 2265 | BUG(); |
| 2266 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2267 | /* Use standard syndrome read/write page function ? */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2268 | if (!chip->ecc.read_page) |
| 2269 | chip->ecc.read_page = nand_read_page_syndrome; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2270 | if (!chip->ecc.write_page) |
| 2271 | chip->ecc.write_page = nand_write_page_syndrome; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2272 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2273 | if (mtd->writesize >= chip->ecc.size) |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2274 | break; |
| 2275 | printk(KERN_WARNING "%d byte HW ECC not possible on " |
| 2276 | "%d byte page size, fallback to SW ECC\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2277 | chip->ecc.size, mtd->writesize); |
| 2278 | chip->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2279 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2280 | case NAND_ECC_SOFT: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2281 | chip->ecc.calculate = nand_calculate_ecc; |
| 2282 | chip->ecc.correct = nand_correct_data; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2283 | chip->ecc.read_page = nand_read_page_swecc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2284 | chip->ecc.write_page = nand_write_page_swecc; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2285 | chip->ecc.size = 256; |
| 2286 | chip->ecc.bytes = 3; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2287 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2288 | |
| 2289 | case NAND_ECC_NONE: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2290 | printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. " |
| 2291 | "This is not recommended !!\n"); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame^] | 2292 | chip->ecc.read_page = nand_read_page_raw; |
| 2293 | chip->ecc.write_page = nand_write_page_raw; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2294 | chip->ecc.size = mtd->writesize; |
| 2295 | chip->ecc.bytes = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2296 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2297 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2298 | printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2299 | chip->ecc.mode); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2300 | BUG(); |
| 2301 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2302 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2303 | /* |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2304 | * The number of bytes available for a client to place data into |
| 2305 | * the out of band area |
| 2306 | */ |
| 2307 | chip->ecc.layout->oobavail = 0; |
| 2308 | for (i = 0; chip->ecc.layout->oobfree[i].length; i++) |
| 2309 | chip->ecc.layout->oobavail += |
| 2310 | chip->ecc.layout->oobfree[i].length; |
| 2311 | |
| 2312 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2313 | * Set the number of read / write steps for one page depending on ECC |
| 2314 | * mode |
| 2315 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2316 | chip->ecc.steps = mtd->writesize / chip->ecc.size; |
| 2317 | if(chip->ecc.steps * chip->ecc.size != mtd->writesize) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2318 | printk(KERN_WARNING "Invalid ecc parameters\n"); |
| 2319 | BUG(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2320 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2321 | chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2322 | |
Thomas Gleixner | 04bbd0e | 2006-05-25 09:45:29 +0200 | [diff] [blame] | 2323 | /* Initialize state */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2324 | chip->state = FL_READY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2325 | |
| 2326 | /* De-select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2327 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2328 | |
| 2329 | /* Invalidate the pagebuffer reference */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2330 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2331 | |
| 2332 | /* Fill in remaining MTD driver data */ |
| 2333 | mtd->type = MTD_NANDFLASH; |
Joern Engel | 5fa4339 | 2006-05-22 23:18:29 +0200 | [diff] [blame] | 2334 | mtd->flags = MTD_CAP_NANDFLASH; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2335 | mtd->ecctype = MTD_ECC_SW; |
| 2336 | mtd->erase = nand_erase; |
| 2337 | mtd->point = NULL; |
| 2338 | mtd->unpoint = NULL; |
| 2339 | mtd->read = nand_read; |
| 2340 | mtd->write = nand_write; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2341 | mtd->read_oob = nand_read_oob; |
| 2342 | mtd->write_oob = nand_write_oob; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2343 | mtd->sync = nand_sync; |
| 2344 | mtd->lock = NULL; |
| 2345 | mtd->unlock = NULL; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2346 | mtd->suspend = nand_suspend; |
| 2347 | mtd->resume = nand_resume; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2348 | mtd->block_isbad = nand_block_isbad; |
| 2349 | mtd->block_markbad = nand_block_markbad; |
| 2350 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2351 | /* propagate ecc.layout to mtd_info */ |
| 2352 | mtd->ecclayout = chip->ecc.layout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2353 | |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 2354 | /* Check, if we should skip the bad block table scan */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2355 | if (chip->options & NAND_SKIP_BBTSCAN) |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 2356 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2357 | |
| 2358 | /* Build bad block table */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2359 | return chip->scan_bbt(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2360 | } |
| 2361 | |
| 2362 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2363 | * nand_release - [NAND Interface] Free resources held by the NAND device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2364 | * @mtd: MTD device structure |
| 2365 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2366 | void nand_release(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2367 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2368 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2369 | |
| 2370 | #ifdef CONFIG_MTD_PARTITIONS |
| 2371 | /* Deregister partitions */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2372 | del_mtd_partitions(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2373 | #endif |
| 2374 | /* Deregister the device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2375 | del_mtd_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2376 | |
Jesper Juhl | fa67164 | 2005-11-07 01:01:27 -0800 | [diff] [blame] | 2377 | /* Free bad block table memory */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2378 | kfree(chip->bbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2379 | } |
| 2380 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2381 | EXPORT_SYMBOL_GPL(nand_scan); |
| 2382 | EXPORT_SYMBOL_GPL(nand_release); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 2383 | |
| 2384 | static int __init nand_base_init(void) |
| 2385 | { |
| 2386 | led_trigger_register_simple("nand-disk", &nand_led_trigger); |
| 2387 | return 0; |
| 2388 | } |
| 2389 | |
| 2390 | static void __exit nand_base_exit(void) |
| 2391 | { |
| 2392 | led_trigger_unregister_simple(nand_led_trigger); |
| 2393 | } |
| 2394 | |
| 2395 | module_init(nand_base_init); |
| 2396 | module_exit(nand_base_exit); |
| 2397 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2398 | MODULE_LICENSE("GPL"); |
| 2399 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>"); |
| 2400 | MODULE_DESCRIPTION("Generic NAND flash driver code"); |