blob: 9802ee848f1dda782c8b69bb9dbf411d180e9770 [file] [log] [blame]
dea31012005-04-17 16:05:31 -05001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04003 * Fibre Channel Host Bus Adapters. *
Jamie Wellnitz41415862006-02-28 19:25:27 -05004 * Copyright (C) 2004-2006 Emulex. All rights reserved. *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04005 * EMULEX and SLI are trademarks of Emulex. *
dea31012005-04-17 16:05:31 -05006 * www.emulex.com *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04007 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea31012005-04-17 16:05:31 -05008 * *
9 * This program is free software; you can redistribute it and/or *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -040010 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea31012005-04-17 16:05:31 -050020 *******************************************************************/
21
dea31012005-04-17 16:05:31 -050022#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26
James.Smart@Emulex.Com91886522005-08-10 15:03:09 -040027#include <scsi/scsi.h>
dea31012005-04-17 16:05:31 -050028#include <scsi/scsi_cmnd.h>
29#include <scsi/scsi_device.h>
30#include <scsi/scsi_host.h>
James.Smart@Emulex.Comf888ba32005-08-10 15:03:01 -040031#include <scsi/scsi_transport_fc.h>
dea31012005-04-17 16:05:31 -050032
33#include "lpfc_hw.h"
34#include "lpfc_sli.h"
35#include "lpfc_disc.h"
36#include "lpfc_scsi.h"
37#include "lpfc.h"
38#include "lpfc_crtn.h"
39#include "lpfc_logmsg.h"
40#include "lpfc_compat.h"
41
42/*
43 * Define macro to log: Mailbox command x%x cannot issue Data
44 * This allows multiple uses of lpfc_msgBlk0311
45 * w/o perturbing log msg utility.
46 */
47#define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
48 lpfc_printf_log(phba, \
49 KERN_INFO, \
50 LOG_MBOX | LOG_SLI, \
51 "%d:0311 Mailbox command x%x cannot issue " \
52 "Data: x%x x%x x%x\n", \
53 phba->brd_no, \
54 mb->mbxCommand, \
55 phba->hba_state, \
56 psli->sli_flag, \
57 flag);
58
59
60/* There are only four IOCB completion types. */
61typedef enum _lpfc_iocb_type {
62 LPFC_UNKNOWN_IOCB,
63 LPFC_UNSOL_IOCB,
64 LPFC_SOL_IOCB,
65 LPFC_ABORT_IOCB
66} lpfc_iocb_type;
67
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -040068struct lpfc_iocbq *
69lpfc_sli_get_iocbq(struct lpfc_hba * phba)
70{
71 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
72 struct lpfc_iocbq * iocbq = NULL;
73
74 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
75 return iocbq;
76}
77
James Bottomley604a3e32005-10-29 10:28:33 -050078void
79lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
80{
81 size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
82
83 /*
84 * Clean all volatile data fields, preserve iotag and node struct.
85 */
86 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
87 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
88}
89
dea31012005-04-17 16:05:31 -050090/*
91 * Translate the iocb command to an iocb command type used to decide the final
92 * disposition of each completed IOCB.
93 */
94static lpfc_iocb_type
95lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
96{
97 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
98
99 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
100 return 0;
101
102 switch (iocb_cmnd) {
103 case CMD_XMIT_SEQUENCE_CR:
104 case CMD_XMIT_SEQUENCE_CX:
105 case CMD_XMIT_BCAST_CN:
106 case CMD_XMIT_BCAST_CX:
107 case CMD_ELS_REQUEST_CR:
108 case CMD_ELS_REQUEST_CX:
109 case CMD_CREATE_XRI_CR:
110 case CMD_CREATE_XRI_CX:
111 case CMD_GET_RPI_CN:
112 case CMD_XMIT_ELS_RSP_CX:
113 case CMD_GET_RPI_CR:
114 case CMD_FCP_IWRITE_CR:
115 case CMD_FCP_IWRITE_CX:
116 case CMD_FCP_IREAD_CR:
117 case CMD_FCP_IREAD_CX:
118 case CMD_FCP_ICMND_CR:
119 case CMD_FCP_ICMND_CX:
120 case CMD_ADAPTER_MSG:
121 case CMD_ADAPTER_DUMP:
122 case CMD_XMIT_SEQUENCE64_CR:
123 case CMD_XMIT_SEQUENCE64_CX:
124 case CMD_XMIT_BCAST64_CN:
125 case CMD_XMIT_BCAST64_CX:
126 case CMD_ELS_REQUEST64_CR:
127 case CMD_ELS_REQUEST64_CX:
128 case CMD_FCP_IWRITE64_CR:
129 case CMD_FCP_IWRITE64_CX:
130 case CMD_FCP_IREAD64_CR:
131 case CMD_FCP_IREAD64_CX:
132 case CMD_FCP_ICMND64_CR:
133 case CMD_FCP_ICMND64_CX:
134 case CMD_GEN_REQUEST64_CR:
135 case CMD_GEN_REQUEST64_CX:
136 case CMD_XMIT_ELS_RSP64_CX:
137 type = LPFC_SOL_IOCB;
138 break;
139 case CMD_ABORT_XRI_CN:
140 case CMD_ABORT_XRI_CX:
141 case CMD_CLOSE_XRI_CN:
142 case CMD_CLOSE_XRI_CX:
143 case CMD_XRI_ABORTED_CX:
144 case CMD_ABORT_MXRI64_CN:
145 type = LPFC_ABORT_IOCB;
146 break;
147 case CMD_RCV_SEQUENCE_CX:
148 case CMD_RCV_ELS_REQ_CX:
149 case CMD_RCV_SEQUENCE64_CX:
150 case CMD_RCV_ELS_REQ64_CX:
151 type = LPFC_UNSOL_IOCB;
152 break;
153 default:
154 type = LPFC_UNKNOWN_IOCB;
155 break;
156 }
157
158 return type;
159}
160
161static int
162lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
163{
164 struct lpfc_sli *psli = &phba->sli;
165 MAILBOX_t *pmbox = &pmb->mb;
166 int i, rc;
167
168 for (i = 0; i < psli->num_rings; i++) {
169 phba->hba_state = LPFC_INIT_MBX_CMDS;
170 lpfc_config_ring(phba, i, pmb);
171 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
172 if (rc != MBX_SUCCESS) {
173 lpfc_printf_log(phba,
174 KERN_ERR,
175 LOG_INIT,
176 "%d:0446 Adapter failed to init, "
177 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
178 "ring %d\n",
179 phba->brd_no,
180 pmbox->mbxCommand,
181 pmbox->mbxStatus,
182 i);
183 phba->hba_state = LPFC_HBA_ERROR;
184 return -ENXIO;
185 }
186 }
187 return 0;
188}
189
190static int
191lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
192 struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
193{
dea31012005-04-17 16:05:31 -0500194 list_add_tail(&piocb->list, &pring->txcmplq);
195 pring->txcmplq_cnt++;
196 if (unlikely(pring->ringno == LPFC_ELS_RING))
197 mod_timer(&phba->els_tmofunc,
198 jiffies + HZ * (phba->fc_ratov << 1));
199
dea31012005-04-17 16:05:31 -0500200 return (0);
201}
202
203static struct lpfc_iocbq *
204lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
205{
206 struct list_head *dlp;
207 struct lpfc_iocbq *cmd_iocb;
208
209 dlp = &pring->txq;
210 cmd_iocb = NULL;
211 list_remove_head((&pring->txq), cmd_iocb,
212 struct lpfc_iocbq,
213 list);
214 if (cmd_iocb) {
215 /* If the first ptr is not equal to the list header,
216 * deque the IOCBQ_t and return it.
217 */
218 pring->txq_cnt--;
219 }
220 return (cmd_iocb);
221}
222
223static IOCB_t *
224lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
225{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400226 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -0500227 uint32_t max_cmd_idx = pring->numCiocb;
228 IOCB_t *iocb = NULL;
229
230 if ((pring->next_cmdidx == pring->cmdidx) &&
231 (++pring->next_cmdidx >= max_cmd_idx))
232 pring->next_cmdidx = 0;
233
234 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
235
236 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
237
238 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
239 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
240 "%d:0315 Ring %d issue: portCmdGet %d "
241 "is bigger then cmd ring %d\n",
242 phba->brd_no, pring->ringno,
243 pring->local_getidx, max_cmd_idx);
244
245 phba->hba_state = LPFC_HBA_ERROR;
246 /*
247 * All error attention handlers are posted to
248 * worker thread
249 */
250 phba->work_ha |= HA_ERATT;
251 phba->work_hs = HS_FFER3;
252 if (phba->work_wait)
253 wake_up(phba->work_wait);
254
255 return NULL;
256 }
257
258 if (pring->local_getidx == pring->next_cmdidx)
259 return NULL;
260 }
261
262 iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
263
264 return iocb;
265}
266
James Bottomley604a3e32005-10-29 10:28:33 -0500267uint16_t
268lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
dea31012005-04-17 16:05:31 -0500269{
James Bottomley604a3e32005-10-29 10:28:33 -0500270 struct lpfc_iocbq ** new_arr;
271 struct lpfc_iocbq ** old_arr;
272 size_t new_len;
273 struct lpfc_sli *psli = &phba->sli;
274 uint16_t iotag;
dea31012005-04-17 16:05:31 -0500275
James Bottomley604a3e32005-10-29 10:28:33 -0500276 spin_lock_irq(phba->host->host_lock);
277 iotag = psli->last_iotag;
278 if(++iotag < psli->iocbq_lookup_len) {
279 psli->last_iotag = iotag;
280 psli->iocbq_lookup[iotag] = iocbq;
281 spin_unlock_irq(phba->host->host_lock);
282 iocbq->iotag = iotag;
283 return iotag;
284 }
285 else if (psli->iocbq_lookup_len < (0xffff
286 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
287 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
288 spin_unlock_irq(phba->host->host_lock);
289 new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
290 GFP_KERNEL);
291 if (new_arr) {
292 memset((char *)new_arr, 0,
293 new_len * sizeof (struct lpfc_iocbq *));
294 spin_lock_irq(phba->host->host_lock);
295 old_arr = psli->iocbq_lookup;
296 if (new_len <= psli->iocbq_lookup_len) {
297 /* highly unprobable case */
298 kfree(new_arr);
299 iotag = psli->last_iotag;
300 if(++iotag < psli->iocbq_lookup_len) {
301 psli->last_iotag = iotag;
302 psli->iocbq_lookup[iotag] = iocbq;
303 spin_unlock_irq(phba->host->host_lock);
304 iocbq->iotag = iotag;
305 return iotag;
306 }
307 spin_unlock_irq(phba->host->host_lock);
308 return 0;
309 }
310 if (psli->iocbq_lookup)
311 memcpy(new_arr, old_arr,
312 ((psli->last_iotag + 1) *
313 sizeof (struct lpfc_iocbq *)));
314 psli->iocbq_lookup = new_arr;
315 psli->iocbq_lookup_len = new_len;
316 psli->last_iotag = iotag;
317 psli->iocbq_lookup[iotag] = iocbq;
318 spin_unlock_irq(phba->host->host_lock);
319 iocbq->iotag = iotag;
320 kfree(old_arr);
321 return iotag;
322 }
James Smart8f6d98d2006-08-01 07:34:00 -0400323 } else
324 spin_unlock_irq(phba->host->host_lock);
dea31012005-04-17 16:05:31 -0500325
James Bottomley604a3e32005-10-29 10:28:33 -0500326 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
327 "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
328 phba->brd_no, psli->last_iotag);
dea31012005-04-17 16:05:31 -0500329
James Bottomley604a3e32005-10-29 10:28:33 -0500330 return 0;
dea31012005-04-17 16:05:31 -0500331}
332
333static void
334lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
335 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
336{
337 /*
James Bottomley604a3e32005-10-29 10:28:33 -0500338 * Set up an iotag
dea31012005-04-17 16:05:31 -0500339 */
James Bottomley604a3e32005-10-29 10:28:33 -0500340 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea31012005-04-17 16:05:31 -0500341
342 /*
343 * Issue iocb command to adapter
344 */
345 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
346 wmb();
347 pring->stats.iocb_cmd++;
348
349 /*
350 * If there is no completion routine to call, we can release the
351 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
352 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
353 */
354 if (nextiocb->iocb_cmpl)
355 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
James Bottomley604a3e32005-10-29 10:28:33 -0500356 else
357 lpfc_sli_release_iocbq(phba, nextiocb);
dea31012005-04-17 16:05:31 -0500358
359 /*
360 * Let the HBA know what IOCB slot will be the next one the
361 * driver will put a command into.
362 */
363 pring->cmdidx = pring->next_cmdidx;
James.Smart@Emulex.Comf91b3922005-10-28 20:29:28 -0400364 writel(pring->cmdidx, phba->MBslimaddr
dea31012005-04-17 16:05:31 -0500365 + (SLIMOFF + (pring->ringno * 2)) * 4);
366}
367
368static void
369lpfc_sli_update_full_ring(struct lpfc_hba * phba,
370 struct lpfc_sli_ring *pring)
371{
372 int ringno = pring->ringno;
373
374 pring->flag |= LPFC_CALL_RING_AVAILABLE;
375
376 wmb();
377
378 /*
379 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
380 * The HBA will tell us when an IOCB entry is available.
381 */
382 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
383 readl(phba->CAregaddr); /* flush */
384
385 pring->stats.iocb_cmd_full++;
386}
387
388static void
389lpfc_sli_update_ring(struct lpfc_hba * phba,
390 struct lpfc_sli_ring *pring)
391{
392 int ringno = pring->ringno;
393
394 /*
395 * Tell the HBA that there is work to do in this ring.
396 */
397 wmb();
398 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
399 readl(phba->CAregaddr); /* flush */
400}
401
402static void
403lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
404{
405 IOCB_t *iocb;
406 struct lpfc_iocbq *nextiocb;
407
408 /*
409 * Check to see if:
410 * (a) there is anything on the txq to send
411 * (b) link is up
412 * (c) link attention events can be processed (fcp ring only)
413 * (d) IOCB processing is not blocked by the outstanding mbox command.
414 */
415 if (pring->txq_cnt &&
416 (phba->hba_state > LPFC_LINK_DOWN) &&
417 (pring->ringno != phba->sli.fcp_ring ||
418 phba->sli.sli_flag & LPFC_PROCESS_LA) &&
419 !(pring->flag & LPFC_STOP_IOCB_MBX)) {
420
421 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
422 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
423 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
424
425 if (iocb)
426 lpfc_sli_update_ring(phba, pring);
427 else
428 lpfc_sli_update_full_ring(phba, pring);
429 }
430
431 return;
432}
433
434/* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
435static void
436lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
437{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400438 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
dea31012005-04-17 16:05:31 -0500439
440 /* If the ring is active, flag it */
441 if (phba->sli.ring[ringno].cmdringaddr) {
442 if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
443 phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
444 /*
445 * Force update of the local copy of cmdGetInx
446 */
447 phba->sli.ring[ringno].local_getidx
448 = le32_to_cpu(pgp->cmdGetInx);
449 spin_lock_irq(phba->host->host_lock);
450 lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
451 spin_unlock_irq(phba->host->host_lock);
452 }
453 }
454}
455
456static int
457lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
458{
459 uint8_t ret;
460
461 switch (mbxCommand) {
462 case MBX_LOAD_SM:
463 case MBX_READ_NV:
464 case MBX_WRITE_NV:
465 case MBX_RUN_BIU_DIAG:
466 case MBX_INIT_LINK:
467 case MBX_DOWN_LINK:
468 case MBX_CONFIG_LINK:
469 case MBX_CONFIG_RING:
470 case MBX_RESET_RING:
471 case MBX_READ_CONFIG:
472 case MBX_READ_RCONFIG:
473 case MBX_READ_SPARM:
474 case MBX_READ_STATUS:
475 case MBX_READ_RPI:
476 case MBX_READ_XRI:
477 case MBX_READ_REV:
478 case MBX_READ_LNK_STAT:
479 case MBX_REG_LOGIN:
480 case MBX_UNREG_LOGIN:
481 case MBX_READ_LA:
482 case MBX_CLEAR_LA:
483 case MBX_DUMP_MEMORY:
484 case MBX_DUMP_CONTEXT:
485 case MBX_RUN_DIAGS:
486 case MBX_RESTART:
487 case MBX_UPDATE_CFG:
488 case MBX_DOWN_LOAD:
489 case MBX_DEL_LD_ENTRY:
490 case MBX_RUN_PROGRAM:
491 case MBX_SET_MASK:
492 case MBX_SET_SLIM:
493 case MBX_UNREG_D_ID:
Jamie Wellnitz41415862006-02-28 19:25:27 -0500494 case MBX_KILL_BOARD:
dea31012005-04-17 16:05:31 -0500495 case MBX_CONFIG_FARP:
Jamie Wellnitz41415862006-02-28 19:25:27 -0500496 case MBX_BEACON:
dea31012005-04-17 16:05:31 -0500497 case MBX_LOAD_AREA:
498 case MBX_RUN_BIU_DIAG64:
499 case MBX_CONFIG_PORT:
500 case MBX_READ_SPARM64:
501 case MBX_READ_RPI64:
502 case MBX_REG_LOGIN64:
503 case MBX_READ_LA64:
504 case MBX_FLASH_WR_ULA:
505 case MBX_SET_DEBUG:
506 case MBX_LOAD_EXP_ROM:
507 ret = mbxCommand;
508 break;
509 default:
510 ret = MBX_SHUTDOWN;
511 break;
512 }
513 return (ret);
514}
515static void
516lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
517{
518 wait_queue_head_t *pdone_q;
519
520 /*
521 * If pdone_q is empty, the driver thread gave up waiting and
522 * continued running.
523 */
524 pdone_q = (wait_queue_head_t *) pmboxq->context1;
525 if (pdone_q)
526 wake_up_interruptible(pdone_q);
527 return;
528}
529
530void
531lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
532{
533 struct lpfc_dmabuf *mp;
534 mp = (struct lpfc_dmabuf *) (pmb->context1);
535 if (mp) {
536 lpfc_mbuf_free(phba, mp->virt, mp->phys);
537 kfree(mp);
538 }
539 mempool_free( pmb, phba->mbox_mem_pool);
540 return;
541}
542
543int
544lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
545{
546 MAILBOX_t *mbox;
547 MAILBOX_t *pmbox;
548 LPFC_MBOXQ_t *pmb;
549 struct lpfc_sli *psli;
550 int i, rc;
551 uint32_t process_next;
552
553 psli = &phba->sli;
554 /* We should only get here if we are in SLI2 mode */
555 if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
556 return (1);
557 }
558
559 phba->sli.slistat.mbox_event++;
560
561 /* Get a Mailbox buffer to setup mailbox commands for callback */
562 if ((pmb = phba->sli.mbox_active)) {
563 pmbox = &pmb->mb;
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400564 mbox = &phba->slim2p->mbx;
dea31012005-04-17 16:05:31 -0500565
566 /* First check out the status word */
567 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
568
569 /* Sanity check to ensure the host owns the mailbox */
570 if (pmbox->mbxOwner != OWN_HOST) {
571 /* Lets try for a while */
572 for (i = 0; i < 10240; i++) {
573 /* First copy command data */
574 lpfc_sli_pcimem_bcopy(mbox, pmbox,
575 sizeof (uint32_t));
576 if (pmbox->mbxOwner == OWN_HOST)
577 goto mbout;
578 }
579 /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
580 <status> */
581 lpfc_printf_log(phba,
James Smartb4c02652006-07-06 15:50:43 -0400582 KERN_WARNING,
dea31012005-04-17 16:05:31 -0500583 LOG_MBOX | LOG_SLI,
584 "%d:0304 Stray Mailbox Interrupt "
585 "mbxCommand x%x mbxStatus x%x\n",
586 phba->brd_no,
587 pmbox->mbxCommand,
588 pmbox->mbxStatus);
589
590 spin_lock_irq(phba->host->host_lock);
591 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
592 spin_unlock_irq(phba->host->host_lock);
593 return (1);
594 }
595
596 mbout:
597 del_timer_sync(&phba->sli.mbox_tmo);
598 phba->work_hba_events &= ~WORKER_MBOX_TMO;
599
600 /*
601 * It is a fatal error if unknown mbox command completion.
602 */
603 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
604 MBX_SHUTDOWN) {
605
606 /* Unknow mailbox command compl */
607 lpfc_printf_log(phba,
608 KERN_ERR,
609 LOG_MBOX | LOG_SLI,
610 "%d:0323 Unknown Mailbox command %x Cmpl\n",
611 phba->brd_no,
612 pmbox->mbxCommand);
613 phba->hba_state = LPFC_HBA_ERROR;
614 phba->work_hs = HS_FFER3;
615 lpfc_handle_eratt(phba);
616 return (0);
617 }
618
619 phba->sli.mbox_active = NULL;
620 if (pmbox->mbxStatus) {
621 phba->sli.slistat.mbox_stat_err++;
622 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
623 /* Mbox cmd cmpl error - RETRYing */
624 lpfc_printf_log(phba,
625 KERN_INFO,
626 LOG_MBOX | LOG_SLI,
627 "%d:0305 Mbox cmd cmpl error - "
628 "RETRYing Data: x%x x%x x%x x%x\n",
629 phba->brd_no,
630 pmbox->mbxCommand,
631 pmbox->mbxStatus,
632 pmbox->un.varWords[0],
633 phba->hba_state);
634 pmbox->mbxStatus = 0;
635 pmbox->mbxOwner = OWN_HOST;
636 spin_lock_irq(phba->host->host_lock);
637 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
638 spin_unlock_irq(phba->host->host_lock);
639 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
640 if (rc == MBX_SUCCESS)
641 return (0);
642 }
643 }
644
645 /* Mailbox cmd <cmd> Cmpl <cmpl> */
646 lpfc_printf_log(phba,
647 KERN_INFO,
648 LOG_MBOX | LOG_SLI,
649 "%d:0307 Mailbox cmd x%x Cmpl x%p "
650 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
651 phba->brd_no,
652 pmbox->mbxCommand,
653 pmb->mbox_cmpl,
654 *((uint32_t *) pmbox),
655 pmbox->un.varWords[0],
656 pmbox->un.varWords[1],
657 pmbox->un.varWords[2],
658 pmbox->un.varWords[3],
659 pmbox->un.varWords[4],
660 pmbox->un.varWords[5],
661 pmbox->un.varWords[6],
662 pmbox->un.varWords[7]);
663
664 if (pmb->mbox_cmpl) {
665 lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
666 pmb->mbox_cmpl(phba,pmb);
667 }
668 }
669
670
671 do {
672 process_next = 0; /* by default don't loop */
673 spin_lock_irq(phba->host->host_lock);
674 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
675
676 /* Process next mailbox command if there is one */
677 if ((pmb = lpfc_mbox_get(phba))) {
678 spin_unlock_irq(phba->host->host_lock);
679 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
680 if (rc == MBX_NOT_FINISHED) {
681 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
682 pmb->mbox_cmpl(phba,pmb);
683 process_next = 1;
684 continue; /* loop back */
685 }
686 } else {
687 spin_unlock_irq(phba->host->host_lock);
688 /* Turn on IOCB processing */
689 for (i = 0; i < phba->sli.num_rings; i++) {
690 lpfc_sli_turn_on_ring(phba, i);
691 }
692
693 /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
694 while (!list_empty(&phba->freebufList)) {
695 struct lpfc_dmabuf *mp;
696
697 mp = NULL;
698 list_remove_head((&phba->freebufList),
699 mp,
700 struct lpfc_dmabuf,
701 list);
702 if (mp) {
703 lpfc_mbuf_free(phba, mp->virt,
704 mp->phys);
705 kfree(mp);
706 }
707 }
708 }
709
710 } while (process_next);
711
712 return (0);
713}
714static int
715lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
716 struct lpfc_iocbq *saveq)
717{
718 IOCB_t * irsp;
719 WORD5 * w5p;
720 uint32_t Rctl, Type;
721 uint32_t match, i;
722
723 match = 0;
724 irsp = &(saveq->iocb);
725 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
726 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
727 Rctl = FC_ELS_REQ;
728 Type = FC_ELS_DATA;
729 } else {
730 w5p =
731 (WORD5 *) & (saveq->iocb.un.
732 ulpWord[5]);
733 Rctl = w5p->hcsw.Rctl;
734 Type = w5p->hcsw.Type;
735
736 /* Firmware Workaround */
737 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
738 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
739 Rctl = FC_ELS_REQ;
740 Type = FC_ELS_DATA;
741 w5p->hcsw.Rctl = Rctl;
742 w5p->hcsw.Type = Type;
743 }
744 }
745 /* unSolicited Responses */
746 if (pring->prt[0].profile) {
Jamie Wellnitzcf5bf972006-02-28 22:33:08 -0500747 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
748 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
749 saveq);
dea31012005-04-17 16:05:31 -0500750 match = 1;
751 } else {
752 /* We must search, based on rctl / type
753 for the right routine */
754 for (i = 0; i < pring->num_mask;
755 i++) {
756 if ((pring->prt[i].rctl ==
757 Rctl)
758 && (pring->prt[i].
759 type == Type)) {
Jamie Wellnitzcf5bf972006-02-28 22:33:08 -0500760 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
761 (pring->prt[i].lpfc_sli_rcv_unsol_event)
762 (phba, pring, saveq);
dea31012005-04-17 16:05:31 -0500763 match = 1;
764 break;
765 }
766 }
767 }
768 if (match == 0) {
769 /* Unexpected Rctl / Type received */
770 /* Ring <ringno> handler: unexpected
771 Rctl <Rctl> Type <Type> received */
772 lpfc_printf_log(phba,
773 KERN_WARNING,
774 LOG_SLI,
775 "%d:0313 Ring %d handler: unexpected Rctl x%x "
776 "Type x%x received \n",
777 phba->brd_no,
778 pring->ringno,
779 Rctl,
780 Type);
781 }
782 return(1);
783}
784
785static struct lpfc_iocbq *
James Bottomley604a3e32005-10-29 10:28:33 -0500786lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
787 struct lpfc_sli_ring * pring,
788 struct lpfc_iocbq * prspiocb)
dea31012005-04-17 16:05:31 -0500789{
dea31012005-04-17 16:05:31 -0500790 struct lpfc_iocbq *cmd_iocb = NULL;
791 uint16_t iotag;
792
James Bottomley604a3e32005-10-29 10:28:33 -0500793 iotag = prspiocb->iocb.ulpIoTag;
dea31012005-04-17 16:05:31 -0500794
James Bottomley604a3e32005-10-29 10:28:33 -0500795 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
796 cmd_iocb = phba->sli.iocbq_lookup[iotag];
797 list_del(&cmd_iocb->list);
798 pring->txcmplq_cnt--;
799 return cmd_iocb;
dea31012005-04-17 16:05:31 -0500800 }
801
dea31012005-04-17 16:05:31 -0500802 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
James Bottomley604a3e32005-10-29 10:28:33 -0500803 "%d:0317 iotag x%x is out off "
804 "range: max iotag x%x wd0 x%x\n",
805 phba->brd_no, iotag,
806 phba->sli.last_iotag,
807 *(((uint32_t *) &prspiocb->iocb) + 7));
dea31012005-04-17 16:05:31 -0500808 return NULL;
809}
810
811static int
812lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
813 struct lpfc_iocbq *saveq)
814{
815 struct lpfc_iocbq * cmdiocbp;
816 int rc = 1;
817 unsigned long iflag;
818
819 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
820 spin_lock_irqsave(phba->host->host_lock, iflag);
James Bottomley604a3e32005-10-29 10:28:33 -0500821 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
dea31012005-04-17 16:05:31 -0500822 if (cmdiocbp) {
823 if (cmdiocbp->iocb_cmpl) {
824 /*
825 * Post all ELS completions to the worker thread.
826 * All other are passed to the completion callback.
827 */
828 if (pring->ringno == LPFC_ELS_RING) {
829 spin_unlock_irqrestore(phba->host->host_lock,
830 iflag);
831 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
832 spin_lock_irqsave(phba->host->host_lock, iflag);
833 }
834 else {
dea31012005-04-17 16:05:31 -0500835 spin_unlock_irqrestore(phba->host->host_lock,
836 iflag);
837 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
838 spin_lock_irqsave(phba->host->host_lock, iflag);
839 }
James Bottomley604a3e32005-10-29 10:28:33 -0500840 } else
841 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea31012005-04-17 16:05:31 -0500842 } else {
843 /*
844 * Unknown initiating command based on the response iotag.
845 * This could be the case on the ELS ring because of
846 * lpfc_els_abort().
847 */
848 if (pring->ringno != LPFC_ELS_RING) {
849 /*
850 * Ring <ringno> handler: unexpected completion IoTag
851 * <IoTag>
852 */
853 lpfc_printf_log(phba,
854 KERN_WARNING,
855 LOG_SLI,
856 "%d:0322 Ring %d handler: unexpected "
857 "completion IoTag x%x Data: x%x x%x x%x x%x\n",
858 phba->brd_no,
859 pring->ringno,
860 saveq->iocb.ulpIoTag,
861 saveq->iocb.ulpStatus,
862 saveq->iocb.un.ulpWord[4],
863 saveq->iocb.ulpCommand,
864 saveq->iocb.ulpContext);
865 }
866 }
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -0400867
dea31012005-04-17 16:05:31 -0500868 spin_unlock_irqrestore(phba->host->host_lock, iflag);
869 return rc;
870}
871
James.Smart@Emulex.Com875fbdf2005-11-29 16:32:13 -0500872static void lpfc_sli_rsp_pointers_error(struct lpfc_hba * phba,
873 struct lpfc_sli_ring * pring)
874{
875 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
876 /*
877 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
878 * rsp ring <portRspMax>
879 */
880 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
881 "%d:0312 Ring %d handler: portRspPut %d "
882 "is bigger then rsp ring %d\n",
883 phba->brd_no, pring->ringno,
884 le32_to_cpu(pgp->rspPutInx),
885 pring->numRiocb);
886
887 phba->hba_state = LPFC_HBA_ERROR;
888
889 /*
890 * All error attention handlers are posted to
891 * worker thread
892 */
893 phba->work_ha |= HA_ERATT;
894 phba->work_hs = HS_FFER3;
895 if (phba->work_wait)
896 wake_up(phba->work_wait);
897
898 return;
899}
900
901void lpfc_sli_poll_fcp_ring(struct lpfc_hba * phba)
902{
903 struct lpfc_sli * psli = &phba->sli;
904 struct lpfc_sli_ring * pring = &psli->ring[LPFC_FCP_RING];
905 IOCB_t *irsp = NULL;
906 IOCB_t *entry = NULL;
907 struct lpfc_iocbq *cmdiocbq = NULL;
908 struct lpfc_iocbq rspiocbq;
909 struct lpfc_pgp *pgp;
910 uint32_t status;
911 uint32_t portRspPut, portRspMax;
912 int type;
913 uint32_t rsp_cmpl = 0;
914 void __iomem *to_slim;
915 uint32_t ha_copy;
916
917 pring->stats.iocb_event++;
918
919 /* The driver assumes SLI-2 mode */
920 pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
921
922 /*
923 * The next available response entry should never exceed the maximum
924 * entries. If it does, treat it as an adapter hardware error.
925 */
926 portRspMax = pring->numRiocb;
927 portRspPut = le32_to_cpu(pgp->rspPutInx);
928 if (unlikely(portRspPut >= portRspMax)) {
929 lpfc_sli_rsp_pointers_error(phba, pring);
930 return;
931 }
932
933 rmb();
934 while (pring->rspidx != portRspPut) {
935
936 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
937
938 if (++pring->rspidx >= portRspMax)
939 pring->rspidx = 0;
940
941 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
942 (uint32_t *) &rspiocbq.iocb,
943 sizeof (IOCB_t));
944 irsp = &rspiocbq.iocb;
945 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
946 pring->stats.iocb_rsp++;
947 rsp_cmpl++;
948
949 if (unlikely(irsp->ulpStatus)) {
950 /* Rsp ring <ringno> error: IOCB */
951 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
952 "%d:0326 Rsp Ring %d error: IOCB Data: "
953 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
954 phba->brd_no, pring->ringno,
955 irsp->un.ulpWord[0],
956 irsp->un.ulpWord[1],
957 irsp->un.ulpWord[2],
958 irsp->un.ulpWord[3],
959 irsp->un.ulpWord[4],
960 irsp->un.ulpWord[5],
961 *(((uint32_t *) irsp) + 6),
962 *(((uint32_t *) irsp) + 7));
963 }
964
965 switch (type) {
966 case LPFC_ABORT_IOCB:
967 case LPFC_SOL_IOCB:
968 /*
969 * Idle exchange closed via ABTS from port. No iocb
970 * resources need to be recovered.
971 */
972 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
973 printk(KERN_INFO "%s: IOCB cmd 0x%x processed."
974 " Skipping completion\n", __FUNCTION__,
975 irsp->ulpCommand);
976 break;
977 }
978
979 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
980 &rspiocbq);
981 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
982 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
983 &rspiocbq);
984 }
985 break;
986 default:
987 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
988 char adaptermsg[LPFC_MAX_ADPTMSG];
989 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
990 memcpy(&adaptermsg[0], (uint8_t *) irsp,
991 MAX_MSG_DATA);
992 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
993 phba->brd_no, adaptermsg);
994 } else {
995 /* Unknown IOCB command */
996 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
997 "%d:0321 Unknown IOCB command "
998 "Data: x%x, x%x x%x x%x x%x\n",
999 phba->brd_no, type,
1000 irsp->ulpCommand,
1001 irsp->ulpStatus,
1002 irsp->ulpIoTag,
1003 irsp->ulpContext);
1004 }
1005 break;
1006 }
1007
1008 /*
1009 * The response IOCB has been processed. Update the ring
1010 * pointer in SLIM. If the port response put pointer has not
1011 * been updated, sync the pgp->rspPutInx and fetch the new port
1012 * response put pointer.
1013 */
1014 to_slim = phba->MBslimaddr +
1015 (SLIMOFF + (pring->ringno * 2) + 1) * 4;
1016 writeb(pring->rspidx, to_slim);
1017
1018 if (pring->rspidx == portRspPut)
1019 portRspPut = le32_to_cpu(pgp->rspPutInx);
1020 }
1021
1022 ha_copy = readl(phba->HAregaddr);
1023 ha_copy >>= (LPFC_FCP_RING * 4);
1024
1025 if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
1026 pring->stats.iocb_rsp_full++;
1027 status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
1028 writel(status, phba->CAregaddr);
1029 readl(phba->CAregaddr);
1030 }
1031 if ((ha_copy & HA_R0CE_RSP) &&
1032 (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1033 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1034 pring->stats.iocb_cmd_empty++;
1035
1036 /* Force update of the local copy of cmdGetInx */
1037 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1038 lpfc_sli_resume_iocb(phba, pring);
1039
1040 if ((pring->lpfc_sli_cmd_available))
1041 (pring->lpfc_sli_cmd_available) (phba, pring);
1042
1043 }
1044
1045 return;
1046}
1047
dea31012005-04-17 16:05:31 -05001048/*
1049 * This routine presumes LPFC_FCP_RING handling and doesn't bother
1050 * to check it explicitly.
1051 */
1052static int
1053lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
1054 struct lpfc_sli_ring * pring, uint32_t mask)
1055{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001056 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -05001057 IOCB_t *irsp = NULL;
James.Smart@Emulex.Com87f6eaf2005-06-25 10:34:13 -04001058 IOCB_t *entry = NULL;
dea31012005-04-17 16:05:31 -05001059 struct lpfc_iocbq *cmdiocbq = NULL;
1060 struct lpfc_iocbq rspiocbq;
dea31012005-04-17 16:05:31 -05001061 uint32_t status;
1062 uint32_t portRspPut, portRspMax;
1063 int rc = 1;
1064 lpfc_iocb_type type;
1065 unsigned long iflag;
1066 uint32_t rsp_cmpl = 0;
1067 void __iomem *to_slim;
1068
1069 spin_lock_irqsave(phba->host->host_lock, iflag);
1070 pring->stats.iocb_event++;
1071
dea31012005-04-17 16:05:31 -05001072 /*
1073 * The next available response entry should never exceed the maximum
1074 * entries. If it does, treat it as an adapter hardware error.
1075 */
1076 portRspMax = pring->numRiocb;
1077 portRspPut = le32_to_cpu(pgp->rspPutInx);
1078 if (unlikely(portRspPut >= portRspMax)) {
James.Smart@Emulex.Com875fbdf2005-11-29 16:32:13 -05001079 lpfc_sli_rsp_pointers_error(phba, pring);
dea31012005-04-17 16:05:31 -05001080 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1081 return 1;
1082 }
1083
1084 rmb();
1085 while (pring->rspidx != portRspPut) {
James.Smart@Emulex.Com87f6eaf2005-06-25 10:34:13 -04001086 /*
1087 * Fetch an entry off the ring and copy it into a local data
1088 * structure. The copy involves a byte-swap since the
1089 * network byte order and pci byte orders are different.
1090 */
James.Smart@Emulex.Com4a0dfcd2005-10-28 20:29:56 -04001091 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
James.Smart@Emulex.Com875fbdf2005-11-29 16:32:13 -05001092
1093 if (++pring->rspidx >= portRspMax)
1094 pring->rspidx = 0;
1095
James.Smart@Emulex.Com87f6eaf2005-06-25 10:34:13 -04001096 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
1097 (uint32_t *) &rspiocbq.iocb,
1098 sizeof (IOCB_t));
1099 irsp = &rspiocbq.iocb;
1100
dea31012005-04-17 16:05:31 -05001101 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
1102 pring->stats.iocb_rsp++;
1103 rsp_cmpl++;
1104
1105 if (unlikely(irsp->ulpStatus)) {
1106 /* Rsp ring <ringno> error: IOCB */
1107 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
1108 "%d:0326 Rsp Ring %d error: IOCB Data: "
1109 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
1110 phba->brd_no, pring->ringno,
1111 irsp->un.ulpWord[0], irsp->un.ulpWord[1],
1112 irsp->un.ulpWord[2], irsp->un.ulpWord[3],
1113 irsp->un.ulpWord[4], irsp->un.ulpWord[5],
1114 *(((uint32_t *) irsp) + 6),
1115 *(((uint32_t *) irsp) + 7));
1116 }
1117
1118 switch (type) {
1119 case LPFC_ABORT_IOCB:
1120 case LPFC_SOL_IOCB:
1121 /*
1122 * Idle exchange closed via ABTS from port. No iocb
1123 * resources need to be recovered.
1124 */
1125 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
1126 printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
1127 "Skipping completion\n", __FUNCTION__,
1128 irsp->ulpCommand);
1129 break;
1130 }
1131
James Bottomley604a3e32005-10-29 10:28:33 -05001132 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
1133 &rspiocbq);
dea31012005-04-17 16:05:31 -05001134 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
Jamie Wellnitzb8086082006-02-28 22:33:12 -05001135 if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
1136 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1137 &rspiocbq);
1138 } else {
1139 spin_unlock_irqrestore(
1140 phba->host->host_lock, iflag);
1141 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1142 &rspiocbq);
1143 spin_lock_irqsave(phba->host->host_lock,
1144 iflag);
1145 }
dea31012005-04-17 16:05:31 -05001146 }
1147 break;
1148 default:
1149 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1150 char adaptermsg[LPFC_MAX_ADPTMSG];
1151 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1152 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1153 MAX_MSG_DATA);
1154 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
1155 phba->brd_no, adaptermsg);
1156 } else {
1157 /* Unknown IOCB command */
1158 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1159 "%d:0321 Unknown IOCB command "
1160 "Data: x%x, x%x x%x x%x x%x\n",
1161 phba->brd_no, type, irsp->ulpCommand,
1162 irsp->ulpStatus, irsp->ulpIoTag,
1163 irsp->ulpContext);
1164 }
1165 break;
1166 }
1167
1168 /*
1169 * The response IOCB has been processed. Update the ring
1170 * pointer in SLIM. If the port response put pointer has not
1171 * been updated, sync the pgp->rspPutInx and fetch the new port
1172 * response put pointer.
1173 */
dea31012005-04-17 16:05:31 -05001174 to_slim = phba->MBslimaddr +
1175 (SLIMOFF + (pring->ringno * 2) + 1) * 4;
James.Smart@Emulex.Comf91b3922005-10-28 20:29:28 -04001176 writel(pring->rspidx, to_slim);
dea31012005-04-17 16:05:31 -05001177
1178 if (pring->rspidx == portRspPut)
1179 portRspPut = le32_to_cpu(pgp->rspPutInx);
1180 }
1181
1182 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1183 pring->stats.iocb_rsp_full++;
1184 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1185 writel(status, phba->CAregaddr);
1186 readl(phba->CAregaddr);
1187 }
1188 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1189 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1190 pring->stats.iocb_cmd_empty++;
1191
1192 /* Force update of the local copy of cmdGetInx */
1193 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1194 lpfc_sli_resume_iocb(phba, pring);
1195
1196 if ((pring->lpfc_sli_cmd_available))
1197 (pring->lpfc_sli_cmd_available) (phba, pring);
1198
1199 }
1200
1201 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1202 return rc;
1203}
1204
1205
1206int
1207lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
1208 struct lpfc_sli_ring * pring, uint32_t mask)
1209{
1210 IOCB_t *entry;
1211 IOCB_t *irsp = NULL;
1212 struct lpfc_iocbq *rspiocbp = NULL;
1213 struct lpfc_iocbq *next_iocb;
1214 struct lpfc_iocbq *cmdiocbp;
1215 struct lpfc_iocbq *saveq;
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001216 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -05001217 uint8_t iocb_cmd_type;
1218 lpfc_iocb_type type;
1219 uint32_t status, free_saveq;
1220 uint32_t portRspPut, portRspMax;
1221 int rc = 1;
1222 unsigned long iflag;
1223 void __iomem *to_slim;
1224
1225 spin_lock_irqsave(phba->host->host_lock, iflag);
1226 pring->stats.iocb_event++;
1227
dea31012005-04-17 16:05:31 -05001228 /*
1229 * The next available response entry should never exceed the maximum
1230 * entries. If it does, treat it as an adapter hardware error.
1231 */
1232 portRspMax = pring->numRiocb;
1233 portRspPut = le32_to_cpu(pgp->rspPutInx);
1234 if (portRspPut >= portRspMax) {
1235 /*
1236 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1237 * rsp ring <portRspMax>
1238 */
1239 lpfc_printf_log(phba,
1240 KERN_ERR,
1241 LOG_SLI,
1242 "%d:0312 Ring %d handler: portRspPut %d "
1243 "is bigger then rsp ring %d\n",
1244 phba->brd_no,
1245 pring->ringno, portRspPut, portRspMax);
1246
1247 phba->hba_state = LPFC_HBA_ERROR;
1248 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1249
1250 phba->work_hs = HS_FFER3;
1251 lpfc_handle_eratt(phba);
1252
1253 return 1;
1254 }
1255
1256 rmb();
dea31012005-04-17 16:05:31 -05001257 while (pring->rspidx != portRspPut) {
1258 /*
1259 * Build a completion list and call the appropriate handler.
1260 * The process is to get the next available response iocb, get
1261 * a free iocb from the list, copy the response data into the
1262 * free iocb, insert to the continuation list, and update the
1263 * next response index to slim. This process makes response
1264 * iocb's in the ring available to DMA as fast as possible but
1265 * pays a penalty for a copy operation. Since the iocb is
1266 * only 32 bytes, this penalty is considered small relative to
1267 * the PCI reads for register values and a slim write. When
1268 * the ulpLe field is set, the entire Command has been
1269 * received.
1270 */
1271 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04001272 rspiocbp = lpfc_sli_get_iocbq(phba);
dea31012005-04-17 16:05:31 -05001273 if (rspiocbp == NULL) {
1274 printk(KERN_ERR "%s: out of buffers! Failing "
1275 "completion.\n", __FUNCTION__);
1276 break;
1277 }
1278
1279 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
1280 irsp = &rspiocbp->iocb;
1281
1282 if (++pring->rspidx >= portRspMax)
1283 pring->rspidx = 0;
1284
1285 to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
1286 + 1) * 4;
James.Smart@Emulex.Comf91b3922005-10-28 20:29:28 -04001287 writel(pring->rspidx, to_slim);
dea31012005-04-17 16:05:31 -05001288
1289 if (list_empty(&(pring->iocb_continueq))) {
1290 list_add(&rspiocbp->list, &(pring->iocb_continueq));
1291 } else {
1292 list_add_tail(&rspiocbp->list,
1293 &(pring->iocb_continueq));
1294 }
1295
1296 pring->iocb_continueq_cnt++;
1297 if (irsp->ulpLe) {
1298 /*
1299 * By default, the driver expects to free all resources
1300 * associated with this iocb completion.
1301 */
1302 free_saveq = 1;
1303 saveq = list_get_first(&pring->iocb_continueq,
1304 struct lpfc_iocbq, list);
1305 irsp = &(saveq->iocb);
1306 list_del_init(&pring->iocb_continueq);
1307 pring->iocb_continueq_cnt = 0;
1308
1309 pring->stats.iocb_rsp++;
1310
1311 if (irsp->ulpStatus) {
1312 /* Rsp ring <ringno> error: IOCB */
1313 lpfc_printf_log(phba,
1314 KERN_WARNING,
1315 LOG_SLI,
1316 "%d:0328 Rsp Ring %d error: IOCB Data: "
1317 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
1318 phba->brd_no,
1319 pring->ringno,
1320 irsp->un.ulpWord[0],
1321 irsp->un.ulpWord[1],
1322 irsp->un.ulpWord[2],
1323 irsp->un.ulpWord[3],
1324 irsp->un.ulpWord[4],
1325 irsp->un.ulpWord[5],
1326 *(((uint32_t *) irsp) + 6),
1327 *(((uint32_t *) irsp) + 7));
1328 }
1329
1330 /*
1331 * Fetch the IOCB command type and call the correct
1332 * completion routine. Solicited and Unsolicited
1333 * IOCBs on the ELS ring get freed back to the
1334 * lpfc_iocb_list by the discovery kernel thread.
1335 */
1336 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1337 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1338 if (type == LPFC_SOL_IOCB) {
1339 spin_unlock_irqrestore(phba->host->host_lock,
1340 iflag);
1341 rc = lpfc_sli_process_sol_iocb(phba, pring,
1342 saveq);
1343 spin_lock_irqsave(phba->host->host_lock, iflag);
1344 } else if (type == LPFC_UNSOL_IOCB) {
1345 spin_unlock_irqrestore(phba->host->host_lock,
1346 iflag);
1347 rc = lpfc_sli_process_unsol_iocb(phba, pring,
1348 saveq);
1349 spin_lock_irqsave(phba->host->host_lock, iflag);
1350 } else if (type == LPFC_ABORT_IOCB) {
1351 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1352 ((cmdiocbp =
James Bottomley604a3e32005-10-29 10:28:33 -05001353 lpfc_sli_iocbq_lookup(phba, pring,
1354 saveq)))) {
dea31012005-04-17 16:05:31 -05001355 /* Call the specified completion
1356 routine */
1357 if (cmdiocbp->iocb_cmpl) {
1358 spin_unlock_irqrestore(
1359 phba->host->host_lock,
1360 iflag);
1361 (cmdiocbp->iocb_cmpl) (phba,
1362 cmdiocbp, saveq);
1363 spin_lock_irqsave(
1364 phba->host->host_lock,
1365 iflag);
James Bottomley604a3e32005-10-29 10:28:33 -05001366 } else
1367 lpfc_sli_release_iocbq(phba,
1368 cmdiocbp);
dea31012005-04-17 16:05:31 -05001369 }
1370 } else if (type == LPFC_UNKNOWN_IOCB) {
1371 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1372
1373 char adaptermsg[LPFC_MAX_ADPTMSG];
1374
1375 memset(adaptermsg, 0,
1376 LPFC_MAX_ADPTMSG);
1377 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1378 MAX_MSG_DATA);
1379 dev_warn(&((phba->pcidev)->dev),
1380 "lpfc%d: %s",
1381 phba->brd_no, adaptermsg);
1382 } else {
1383 /* Unknown IOCB command */
1384 lpfc_printf_log(phba,
1385 KERN_ERR,
1386 LOG_SLI,
1387 "%d:0321 Unknown IOCB command "
1388 "Data: x%x x%x x%x x%x\n",
1389 phba->brd_no,
1390 irsp->ulpCommand,
1391 irsp->ulpStatus,
1392 irsp->ulpIoTag,
1393 irsp->ulpContext);
1394 }
1395 }
1396
1397 if (free_saveq) {
1398 if (!list_empty(&saveq->list)) {
1399 list_for_each_entry_safe(rspiocbp,
1400 next_iocb,
1401 &saveq->list,
1402 list) {
James Smart8f6d98d2006-08-01 07:34:00 -04001403 list_del(&rspiocbp->list);
James Bottomley604a3e32005-10-29 10:28:33 -05001404 lpfc_sli_release_iocbq(phba,
1405 rspiocbp);
dea31012005-04-17 16:05:31 -05001406 }
1407 }
James Bottomley604a3e32005-10-29 10:28:33 -05001408 lpfc_sli_release_iocbq(phba, saveq);
dea31012005-04-17 16:05:31 -05001409 }
1410 }
1411
1412 /*
1413 * If the port response put pointer has not been updated, sync
1414 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1415 * response put pointer.
1416 */
1417 if (pring->rspidx == portRspPut) {
1418 portRspPut = le32_to_cpu(pgp->rspPutInx);
1419 }
1420 } /* while (pring->rspidx != portRspPut) */
1421
1422 if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
1423 /* At least one response entry has been freed */
1424 pring->stats.iocb_rsp_full++;
1425 /* SET RxRE_RSP in Chip Att register */
1426 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1427 writel(status, phba->CAregaddr);
1428 readl(phba->CAregaddr); /* flush */
1429 }
1430 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1431 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1432 pring->stats.iocb_cmd_empty++;
1433
1434 /* Force update of the local copy of cmdGetInx */
1435 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1436 lpfc_sli_resume_iocb(phba, pring);
1437
1438 if ((pring->lpfc_sli_cmd_available))
1439 (pring->lpfc_sli_cmd_available) (phba, pring);
1440
1441 }
1442
1443 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1444 return rc;
1445}
1446
1447int
1448lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1449{
1450 struct lpfc_iocbq *iocb, *next_iocb;
1451 IOCB_t *icmd = NULL, *cmd = NULL;
1452 int errcnt;
dea31012005-04-17 16:05:31 -05001453
1454 errcnt = 0;
1455
1456 /* Error everything on txq and txcmplq
1457 * First do the txq.
1458 */
1459 spin_lock_irq(phba->host->host_lock);
1460 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
1461 list_del_init(&iocb->list);
1462 if (iocb->iocb_cmpl) {
1463 icmd = &iocb->iocb;
1464 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1465 icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1466 spin_unlock_irq(phba->host->host_lock);
1467 (iocb->iocb_cmpl) (phba, iocb, iocb);
1468 spin_lock_irq(phba->host->host_lock);
James Bottomley604a3e32005-10-29 10:28:33 -05001469 } else
1470 lpfc_sli_release_iocbq(phba, iocb);
dea31012005-04-17 16:05:31 -05001471 }
1472 pring->txq_cnt = 0;
1473 INIT_LIST_HEAD(&(pring->txq));
1474
1475 /* Next issue ABTS for everything on the txcmplq */
1476 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
1477 cmd = &iocb->iocb;
1478
1479 /*
James Bottomley604a3e32005-10-29 10:28:33 -05001480 * Imediate abort of IOCB, deque and call compl
dea31012005-04-17 16:05:31 -05001481 */
dea31012005-04-17 16:05:31 -05001482
1483 list_del_init(&iocb->list);
1484 pring->txcmplq_cnt--;
1485
1486 if (iocb->iocb_cmpl) {
1487 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1488 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1489 spin_unlock_irq(phba->host->host_lock);
1490 (iocb->iocb_cmpl) (phba, iocb, iocb);
1491 spin_lock_irq(phba->host->host_lock);
James Bottomley604a3e32005-10-29 10:28:33 -05001492 } else
1493 lpfc_sli_release_iocbq(phba, iocb);
dea31012005-04-17 16:05:31 -05001494 }
1495
1496 INIT_LIST_HEAD(&pring->txcmplq);
1497 pring->txcmplq_cnt = 0;
1498 spin_unlock_irq(phba->host->host_lock);
1499
1500 return errcnt;
1501}
1502
Jamie Wellnitz41415862006-02-28 19:25:27 -05001503int
1504lpfc_sli_brdready(struct lpfc_hba * phba, uint32_t mask)
dea31012005-04-17 16:05:31 -05001505{
Jamie Wellnitz41415862006-02-28 19:25:27 -05001506 uint32_t status;
1507 int i = 0;
1508 int retval = 0;
dea31012005-04-17 16:05:31 -05001509
Jamie Wellnitz41415862006-02-28 19:25:27 -05001510 /* Read the HBA Host Status Register */
1511 status = readl(phba->HSregaddr);
dea31012005-04-17 16:05:31 -05001512
Jamie Wellnitz41415862006-02-28 19:25:27 -05001513 /*
1514 * Check status register every 100ms for 5 retries, then every
1515 * 500ms for 5, then every 2.5 sec for 5, then reset board and
1516 * every 2.5 sec for 4.
1517 * Break our of the loop if errors occurred during init.
1518 */
1519 while (((status & mask) != mask) &&
1520 !(status & HS_FFERM) &&
1521 i++ < 20) {
dea31012005-04-17 16:05:31 -05001522
Jamie Wellnitz41415862006-02-28 19:25:27 -05001523 if (i <= 5)
1524 msleep(10);
1525 else if (i <= 10)
1526 msleep(500);
1527 else
1528 msleep(2500);
dea31012005-04-17 16:05:31 -05001529
Jamie Wellnitz41415862006-02-28 19:25:27 -05001530 if (i == 15) {
1531 phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
1532 lpfc_sli_brdrestart(phba);
1533 }
1534 /* Read the HBA Host Status Register */
1535 status = readl(phba->HSregaddr);
dea31012005-04-17 16:05:31 -05001536 }
dea31012005-04-17 16:05:31 -05001537
Jamie Wellnitz41415862006-02-28 19:25:27 -05001538 /* Check to see if any errors occurred during init */
1539 if ((status & HS_FFERM) || (i >= 20)) {
1540 phba->hba_state = LPFC_HBA_ERROR;
1541 retval = 1;
1542 }
dea31012005-04-17 16:05:31 -05001543
Jamie Wellnitz41415862006-02-28 19:25:27 -05001544 return retval;
dea31012005-04-17 16:05:31 -05001545}
1546
James Smart92908312006-03-07 15:04:13 -05001547#define BARRIER_TEST_PATTERN (0xdeadbeef)
1548
1549void lpfc_reset_barrier(struct lpfc_hba * phba)
1550{
James Smart65a29c12006-07-06 15:50:50 -04001551 uint32_t __iomem *resp_buf;
1552 uint32_t __iomem *mbox_buf;
James Smart92908312006-03-07 15:04:13 -05001553 volatile uint32_t mbox;
1554 uint32_t hc_copy;
1555 int i;
1556 uint8_t hdrtype;
1557
1558 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
1559 if (hdrtype != 0x80 ||
1560 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
1561 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
1562 return;
1563
1564 /*
1565 * Tell the other part of the chip to suspend temporarily all
1566 * its DMA activity.
1567 */
James Smart65a29c12006-07-06 15:50:50 -04001568 resp_buf = phba->MBslimaddr;
James Smart92908312006-03-07 15:04:13 -05001569
1570 /* Disable the error attention */
1571 hc_copy = readl(phba->HCregaddr);
1572 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
1573 readl(phba->HCregaddr); /* flush */
1574
1575 if (readl(phba->HAregaddr) & HA_ERATT) {
1576 /* Clear Chip error bit */
1577 writel(HA_ERATT, phba->HAregaddr);
1578 phba->stopped = 1;
1579 }
1580
1581 mbox = 0;
1582 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
1583 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
1584
1585 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
James Smart65a29c12006-07-06 15:50:50 -04001586 mbox_buf = phba->MBslimaddr;
James Smart92908312006-03-07 15:04:13 -05001587 writel(mbox, mbox_buf);
1588
1589 for (i = 0;
1590 readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
1591 mdelay(1);
1592
1593 if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
1594 if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
1595 phba->stopped)
1596 goto restore_hc;
1597 else
1598 goto clear_errat;
1599 }
1600
1601 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
1602 for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
1603 mdelay(1);
1604
1605clear_errat:
1606
1607 while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
1608 mdelay(1);
1609
1610 if (readl(phba->HAregaddr) & HA_ERATT) {
1611 writel(HA_ERATT, phba->HAregaddr);
1612 phba->stopped = 1;
1613 }
1614
1615restore_hc:
1616 writel(hc_copy, phba->HCregaddr);
1617 readl(phba->HCregaddr); /* flush */
1618}
1619
Jamie Wellnitz41415862006-02-28 19:25:27 -05001620int
1621lpfc_sli_brdkill(struct lpfc_hba * phba)
dea31012005-04-17 16:05:31 -05001622{
Jamie Wellnitz41415862006-02-28 19:25:27 -05001623 struct lpfc_sli *psli;
1624 LPFC_MBOXQ_t *pmb;
1625 uint32_t status;
1626 uint32_t ha_copy;
1627 int retval;
1628 int i = 0;
1629
1630 psli = &phba->sli;
1631
1632 /* Kill HBA */
1633 lpfc_printf_log(phba,
1634 KERN_INFO,
1635 LOG_SLI,
1636 "%d:0329 Kill HBA Data: x%x x%x\n",
1637 phba->brd_no,
1638 phba->hba_state,
1639 psli->sli_flag);
1640
1641 if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
James Smart92908312006-03-07 15:04:13 -05001642 GFP_KERNEL)) == 0)
Jamie Wellnitz41415862006-02-28 19:25:27 -05001643 return 1;
Jamie Wellnitz41415862006-02-28 19:25:27 -05001644
1645 /* Disable the error attention */
1646 spin_lock_irq(phba->host->host_lock);
1647 status = readl(phba->HCregaddr);
1648 status &= ~HC_ERINT_ENA;
1649 writel(status, phba->HCregaddr);
1650 readl(phba->HCregaddr); /* flush */
1651 spin_unlock_irq(phba->host->host_lock);
1652
1653 lpfc_kill_board(phba, pmb);
1654 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1655 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
1656
1657 if (retval != MBX_SUCCESS) {
1658 if (retval != MBX_BUSY)
1659 mempool_free(pmb, phba->mbox_mem_pool);
1660 return 1;
1661 }
1662
James Smart92908312006-03-07 15:04:13 -05001663 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
1664
Jamie Wellnitz41415862006-02-28 19:25:27 -05001665 mempool_free(pmb, phba->mbox_mem_pool);
1666
1667 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
1668 * attention every 100ms for 3 seconds. If we don't get ERATT after
1669 * 3 seconds we still set HBA_ERROR state because the status of the
1670 * board is now undefined.
1671 */
1672 ha_copy = readl(phba->HAregaddr);
1673
1674 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
1675 mdelay(100);
1676 ha_copy = readl(phba->HAregaddr);
1677 }
1678
1679 del_timer_sync(&psli->mbox_tmo);
James Smart92908312006-03-07 15:04:13 -05001680 if (ha_copy & HA_ERATT) {
1681 writel(HA_ERATT, phba->HAregaddr);
1682 phba->stopped = 1;
1683 }
Jamie Wellnitz41415862006-02-28 19:25:27 -05001684 spin_lock_irq(phba->host->host_lock);
1685 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1686 spin_unlock_irq(phba->host->host_lock);
1687
1688 psli->mbox_active = NULL;
1689 lpfc_hba_down_post(phba);
1690 phba->hba_state = LPFC_HBA_ERROR;
1691
1692 return (ha_copy & HA_ERATT ? 0 : 1);
1693}
1694
1695int
1696lpfc_sli_brdreset(struct lpfc_hba * phba)
1697{
1698 struct lpfc_sli *psli;
dea31012005-04-17 16:05:31 -05001699 struct lpfc_sli_ring *pring;
Jamie Wellnitz41415862006-02-28 19:25:27 -05001700 uint16_t cfg_value;
dea31012005-04-17 16:05:31 -05001701 int i;
dea31012005-04-17 16:05:31 -05001702
Jamie Wellnitz41415862006-02-28 19:25:27 -05001703 psli = &phba->sli;
dea31012005-04-17 16:05:31 -05001704
Jamie Wellnitz41415862006-02-28 19:25:27 -05001705 /* Reset HBA */
1706 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1707 "%d:0325 Reset HBA Data: x%x x%x\n", phba->brd_no,
1708 phba->hba_state, psli->sli_flag);
dea31012005-04-17 16:05:31 -05001709
1710 /* perform board reset */
1711 phba->fc_eventTag = 0;
1712 phba->fc_myDID = 0;
Jamie Wellnitz41415862006-02-28 19:25:27 -05001713 phba->fc_prevDID = 0;
dea31012005-04-17 16:05:31 -05001714
Jamie Wellnitz41415862006-02-28 19:25:27 -05001715 /* Turn off parity checking and serr during the physical reset */
1716 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
1717 pci_write_config_word(phba->pcidev, PCI_COMMAND,
1718 (cfg_value &
1719 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
1720
James Smart1c067a42006-08-01 07:33:52 -04001721 psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
Jamie Wellnitz41415862006-02-28 19:25:27 -05001722 /* Now toggle INITFF bit in the Host Control Register */
1723 writel(HC_INITFF, phba->HCregaddr);
1724 mdelay(1);
1725 readl(phba->HCregaddr); /* flush */
1726 writel(0, phba->HCregaddr);
1727 readl(phba->HCregaddr); /* flush */
1728
1729 /* Restore PCI cmd register */
1730 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea31012005-04-17 16:05:31 -05001731
1732 /* Initialize relevant SLI info */
Jamie Wellnitz41415862006-02-28 19:25:27 -05001733 for (i = 0; i < psli->num_rings; i++) {
1734 pring = &psli->ring[i];
dea31012005-04-17 16:05:31 -05001735 pring->flag = 0;
1736 pring->rspidx = 0;
1737 pring->next_cmdidx = 0;
1738 pring->local_getidx = 0;
1739 pring->cmdidx = 0;
1740 pring->missbufcnt = 0;
1741 }
dea31012005-04-17 16:05:31 -05001742
Jamie Wellnitz41415862006-02-28 19:25:27 -05001743 phba->hba_state = LPFC_WARM_START;
1744 return 0;
1745}
1746
1747int
1748lpfc_sli_brdrestart(struct lpfc_hba * phba)
1749{
1750 MAILBOX_t *mb;
1751 struct lpfc_sli *psli;
1752 uint16_t skip_post;
1753 volatile uint32_t word0;
1754 void __iomem *to_slim;
1755
1756 spin_lock_irq(phba->host->host_lock);
1757
1758 psli = &phba->sli;
1759
1760 /* Restart HBA */
1761 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1762 "%d:0328 Restart HBA Data: x%x x%x\n", phba->brd_no,
1763 phba->hba_state, psli->sli_flag);
1764
1765 word0 = 0;
1766 mb = (MAILBOX_t *) &word0;
1767 mb->mbxCommand = MBX_RESTART;
1768 mb->mbxHc = 1;
1769
James Smart92908312006-03-07 15:04:13 -05001770 lpfc_reset_barrier(phba);
1771
Jamie Wellnitz41415862006-02-28 19:25:27 -05001772 to_slim = phba->MBslimaddr;
1773 writel(*(uint32_t *) mb, to_slim);
1774 readl(to_slim); /* flush */
1775
1776 /* Only skip post after fc_ffinit is completed */
1777 if (phba->hba_state) {
1778 skip_post = 1;
1779 word0 = 1; /* This is really setting up word1 */
dea31012005-04-17 16:05:31 -05001780 } else {
Jamie Wellnitz41415862006-02-28 19:25:27 -05001781 skip_post = 0;
1782 word0 = 0; /* This is really setting up word1 */
1783 }
James Smart65a29c12006-07-06 15:50:50 -04001784 to_slim = phba->MBslimaddr + sizeof (uint32_t);
Jamie Wellnitz41415862006-02-28 19:25:27 -05001785 writel(*(uint32_t *) mb, to_slim);
1786 readl(to_slim); /* flush */
1787
1788 lpfc_sli_brdreset(phba);
James Smart92908312006-03-07 15:04:13 -05001789 phba->stopped = 0;
Jamie Wellnitz41415862006-02-28 19:25:27 -05001790 phba->hba_state = LPFC_INIT_START;
1791
1792 spin_unlock_irq(phba->host->host_lock);
1793
James Smart64ba8812006-08-02 15:24:34 -04001794 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
1795 psli->stats_start = get_seconds();
1796
Jamie Wellnitz41415862006-02-28 19:25:27 -05001797 if (skip_post)
1798 mdelay(100);
1799 else
dea31012005-04-17 16:05:31 -05001800 mdelay(2000);
dea31012005-04-17 16:05:31 -05001801
Jamie Wellnitz41415862006-02-28 19:25:27 -05001802 lpfc_hba_down_post(phba);
dea31012005-04-17 16:05:31 -05001803
1804 return 0;
1805}
1806
1807static int
1808lpfc_sli_chipset_init(struct lpfc_hba *phba)
1809{
1810 uint32_t status, i = 0;
1811
1812 /* Read the HBA Host Status Register */
1813 status = readl(phba->HSregaddr);
1814
1815 /* Check status register to see what current state is */
1816 i = 0;
1817 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
1818
1819 /* Check every 100ms for 5 retries, then every 500ms for 5, then
1820 * every 2.5 sec for 5, then reset board and every 2.5 sec for
1821 * 4.
1822 */
1823 if (i++ >= 20) {
1824 /* Adapter failed to init, timeout, status reg
1825 <status> */
1826 lpfc_printf_log(phba,
1827 KERN_ERR,
1828 LOG_INIT,
1829 "%d:0436 Adapter failed to init, "
1830 "timeout, status reg x%x\n",
1831 phba->brd_no,
1832 status);
1833 phba->hba_state = LPFC_HBA_ERROR;
1834 return -ETIMEDOUT;
1835 }
1836
1837 /* Check to see if any errors occurred during init */
1838 if (status & HS_FFERM) {
1839 /* ERROR: During chipset initialization */
1840 /* Adapter failed to init, chipset, status reg
1841 <status> */
1842 lpfc_printf_log(phba,
1843 KERN_ERR,
1844 LOG_INIT,
1845 "%d:0437 Adapter failed to init, "
1846 "chipset, status reg x%x\n",
1847 phba->brd_no,
1848 status);
1849 phba->hba_state = LPFC_HBA_ERROR;
1850 return -EIO;
1851 }
1852
1853 if (i <= 5) {
1854 msleep(10);
1855 } else if (i <= 10) {
1856 msleep(500);
1857 } else {
1858 msleep(2500);
1859 }
1860
1861 if (i == 15) {
Jamie Wellnitz41415862006-02-28 19:25:27 -05001862 phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
1863 lpfc_sli_brdrestart(phba);
dea31012005-04-17 16:05:31 -05001864 }
1865 /* Read the HBA Host Status Register */
1866 status = readl(phba->HSregaddr);
1867 }
1868
1869 /* Check to see if any errors occurred during init */
1870 if (status & HS_FFERM) {
1871 /* ERROR: During chipset initialization */
1872 /* Adapter failed to init, chipset, status reg <status> */
1873 lpfc_printf_log(phba,
1874 KERN_ERR,
1875 LOG_INIT,
1876 "%d:0438 Adapter failed to init, chipset, "
1877 "status reg x%x\n",
1878 phba->brd_no,
1879 status);
1880 phba->hba_state = LPFC_HBA_ERROR;
1881 return -EIO;
1882 }
1883
1884 /* Clear all interrupt enable conditions */
1885 writel(0, phba->HCregaddr);
1886 readl(phba->HCregaddr); /* flush */
1887
1888 /* setup host attn register */
1889 writel(0xffffffff, phba->HAregaddr);
1890 readl(phba->HAregaddr); /* flush */
1891 return 0;
1892}
1893
1894int
1895lpfc_sli_hba_setup(struct lpfc_hba * phba)
1896{
1897 LPFC_MBOXQ_t *pmb;
1898 uint32_t resetcount = 0, rc = 0, done = 0;
1899
1900 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1901 if (!pmb) {
1902 phba->hba_state = LPFC_HBA_ERROR;
1903 return -ENOMEM;
1904 }
1905
1906 while (resetcount < 2 && !done) {
James Smart1c067a42006-08-01 07:33:52 -04001907 spin_lock_irq(phba->host->host_lock);
1908 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
1909 spin_unlock_irq(phba->host->host_lock);
Jamie Wellnitz41415862006-02-28 19:25:27 -05001910 phba->hba_state = LPFC_STATE_UNKNOWN;
1911 lpfc_sli_brdrestart(phba);
dea31012005-04-17 16:05:31 -05001912 msleep(2500);
1913 rc = lpfc_sli_chipset_init(phba);
1914 if (rc)
1915 break;
1916
James Smart1c067a42006-08-01 07:33:52 -04001917 spin_lock_irq(phba->host->host_lock);
1918 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1919 spin_unlock_irq(phba->host->host_lock);
dea31012005-04-17 16:05:31 -05001920 resetcount++;
1921
1922 /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
1923 * means the call was successful. Any other nonzero value is a failure,
1924 * but if ERESTART is returned, the driver may reset the HBA and try
1925 * again.
1926 */
1927 rc = lpfc_config_port_prep(phba);
1928 if (rc == -ERESTART) {
1929 phba->hba_state = 0;
1930 continue;
1931 } else if (rc) {
1932 break;
1933 }
1934
1935 phba->hba_state = LPFC_INIT_MBX_CMDS;
1936 lpfc_config_port(phba, pmb);
1937 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1938 if (rc == MBX_SUCCESS)
1939 done = 1;
1940 else {
1941 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1942 "%d:0442 Adapter failed to init, mbxCmd x%x "
1943 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
1944 phba->brd_no, pmb->mb.mbxCommand,
1945 pmb->mb.mbxStatus, 0);
1946 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1947 }
1948 }
1949 if (!done)
1950 goto lpfc_sli_hba_setup_error;
1951
1952 rc = lpfc_sli_ring_map(phba, pmb);
1953
1954 if (rc)
1955 goto lpfc_sli_hba_setup_error;
1956
1957 phba->sli.sli_flag |= LPFC_PROCESS_LA;
1958
1959 rc = lpfc_config_port_post(phba);
1960 if (rc)
1961 goto lpfc_sli_hba_setup_error;
1962
1963 goto lpfc_sli_hba_setup_exit;
1964lpfc_sli_hba_setup_error:
1965 phba->hba_state = LPFC_HBA_ERROR;
1966lpfc_sli_hba_setup_exit:
1967 mempool_free(pmb, phba->mbox_mem_pool);
1968 return rc;
1969}
1970
1971static void
1972lpfc_mbox_abort(struct lpfc_hba * phba)
1973{
1974 LPFC_MBOXQ_t *pmbox;
1975 MAILBOX_t *mb;
1976
1977 if (phba->sli.mbox_active) {
1978 del_timer_sync(&phba->sli.mbox_tmo);
1979 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1980 pmbox = phba->sli.mbox_active;
1981 mb = &pmbox->mb;
1982 phba->sli.mbox_active = NULL;
1983 if (pmbox->mbox_cmpl) {
1984 mb->mbxStatus = MBX_NOT_FINISHED;
1985 (pmbox->mbox_cmpl) (phba, pmbox);
1986 }
1987 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1988 }
1989
1990 /* Abort all the non active mailbox commands. */
1991 spin_lock_irq(phba->host->host_lock);
1992 pmbox = lpfc_mbox_get(phba);
1993 while (pmbox) {
1994 mb = &pmbox->mb;
1995 if (pmbox->mbox_cmpl) {
1996 mb->mbxStatus = MBX_NOT_FINISHED;
1997 spin_unlock_irq(phba->host->host_lock);
1998 (pmbox->mbox_cmpl) (phba, pmbox);
1999 spin_lock_irq(phba->host->host_lock);
2000 }
2001 pmbox = lpfc_mbox_get(phba);
2002 }
2003 spin_unlock_irq(phba->host->host_lock);
2004 return;
2005}
2006
2007/*! lpfc_mbox_timeout
2008 *
2009 * \pre
2010 * \post
2011 * \param hba Pointer to per struct lpfc_hba structure
2012 * \param l1 Pointer to the driver's mailbox queue.
2013 * \return
2014 * void
2015 *
2016 * \b Description:
2017 *
2018 * This routine handles mailbox timeout events at timer interrupt context.
2019 */
2020void
2021lpfc_mbox_timeout(unsigned long ptr)
2022{
2023 struct lpfc_hba *phba;
2024 unsigned long iflag;
2025
2026 phba = (struct lpfc_hba *)ptr;
2027 spin_lock_irqsave(phba->host->host_lock, iflag);
2028 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
2029 phba->work_hba_events |= WORKER_MBOX_TMO;
2030 if (phba->work_wait)
2031 wake_up(phba->work_wait);
2032 }
2033 spin_unlock_irqrestore(phba->host->host_lock, iflag);
2034}
2035
2036void
2037lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
2038{
2039 LPFC_MBOXQ_t *pmbox;
2040 MAILBOX_t *mb;
2041
2042 spin_lock_irq(phba->host->host_lock);
2043 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
2044 spin_unlock_irq(phba->host->host_lock);
2045 return;
2046 }
2047
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04002048 phba->work_hba_events &= ~WORKER_MBOX_TMO;
2049
dea31012005-04-17 16:05:31 -05002050 pmbox = phba->sli.mbox_active;
2051 mb = &pmbox->mb;
2052
2053 /* Mbox cmd <mbxCommand> timeout */
2054 lpfc_printf_log(phba,
2055 KERN_ERR,
2056 LOG_MBOX | LOG_SLI,
2057 "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
2058 phba->brd_no,
2059 mb->mbxCommand,
2060 phba->hba_state,
2061 phba->sli.sli_flag,
2062 phba->sli.mbox_active);
2063
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04002064 phba->sli.mbox_active = NULL;
2065 if (pmbox->mbox_cmpl) {
2066 mb->mbxStatus = MBX_NOT_FINISHED;
2067 spin_unlock_irq(phba->host->host_lock);
2068 (pmbox->mbox_cmpl) (phba, pmbox);
2069 spin_lock_irq(phba->host->host_lock);
dea31012005-04-17 16:05:31 -05002070 }
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04002071 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea31012005-04-17 16:05:31 -05002072
2073 spin_unlock_irq(phba->host->host_lock);
2074 lpfc_mbox_abort(phba);
2075 return;
2076}
2077
2078int
2079lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
2080{
dea31012005-04-17 16:05:31 -05002081 MAILBOX_t *mb;
2082 struct lpfc_sli *psli;
2083 uint32_t status, evtctr;
2084 uint32_t ha_copy;
2085 int i;
2086 unsigned long drvr_flag = 0;
2087 volatile uint32_t word0, ldata;
2088 void __iomem *to_slim;
2089
2090 psli = &phba->sli;
2091
2092 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
2093
2094
2095 mb = &pmbox->mb;
2096 status = MBX_SUCCESS;
2097
Jamie Wellnitz41415862006-02-28 19:25:27 -05002098 if (phba->hba_state == LPFC_HBA_ERROR) {
2099 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
2100
2101 /* Mbox command <mbxCommand> cannot issue */
2102 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
2103 return (MBX_NOT_FINISHED);
2104 }
2105
James Smart92908312006-03-07 15:04:13 -05002106 if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
2107 !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
2108 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
2109 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
2110 return (MBX_NOT_FINISHED);
2111 }
2112
dea31012005-04-17 16:05:31 -05002113 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
2114 /* Polling for a mbox command when another one is already active
2115 * is not allowed in SLI. Also, the driver must have established
2116 * SLI2 mode to queue and process multiple mbox commands.
2117 */
2118
2119 if (flag & MBX_POLL) {
2120 spin_unlock_irqrestore(phba->host->host_lock,
2121 drvr_flag);
2122
2123 /* Mbox command <mbxCommand> cannot issue */
2124 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
2125 return (MBX_NOT_FINISHED);
2126 }
2127
2128 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
2129 spin_unlock_irqrestore(phba->host->host_lock,
2130 drvr_flag);
2131 /* Mbox command <mbxCommand> cannot issue */
2132 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
2133 return (MBX_NOT_FINISHED);
2134 }
2135
2136 /* Handle STOP IOCB processing flag. This is only meaningful
2137 * if we are not polling for mbox completion.
2138 */
2139 if (flag & MBX_STOP_IOCB) {
2140 flag &= ~MBX_STOP_IOCB;
2141 /* Now flag each ring */
2142 for (i = 0; i < psli->num_rings; i++) {
2143 /* If the ring is active, flag it */
2144 if (psli->ring[i].cmdringaddr) {
2145 psli->ring[i].flag |=
2146 LPFC_STOP_IOCB_MBX;
2147 }
2148 }
2149 }
2150
2151 /* Another mailbox command is still being processed, queue this
2152 * command to be processed later.
2153 */
2154 lpfc_mbox_put(phba, pmbox);
2155
2156 /* Mbox cmd issue - BUSY */
2157 lpfc_printf_log(phba,
2158 KERN_INFO,
2159 LOG_MBOX | LOG_SLI,
2160 "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
2161 phba->brd_no,
2162 mb->mbxCommand,
2163 phba->hba_state,
2164 psli->sli_flag,
2165 flag);
2166
2167 psli->slistat.mbox_busy++;
2168 spin_unlock_irqrestore(phba->host->host_lock,
2169 drvr_flag);
2170
2171 return (MBX_BUSY);
2172 }
2173
2174 /* Handle STOP IOCB processing flag. This is only meaningful
2175 * if we are not polling for mbox completion.
2176 */
2177 if (flag & MBX_STOP_IOCB) {
2178 flag &= ~MBX_STOP_IOCB;
2179 if (flag == MBX_NOWAIT) {
2180 /* Now flag each ring */
2181 for (i = 0; i < psli->num_rings; i++) {
2182 /* If the ring is active, flag it */
2183 if (psli->ring[i].cmdringaddr) {
2184 psli->ring[i].flag |=
2185 LPFC_STOP_IOCB_MBX;
2186 }
2187 }
2188 }
2189 }
2190
2191 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2192
2193 /* If we are not polling, we MUST be in SLI2 mode */
2194 if (flag != MBX_POLL) {
Jamie Wellnitz41415862006-02-28 19:25:27 -05002195 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
2196 (mb->mbxCommand != MBX_KILL_BOARD)) {
dea31012005-04-17 16:05:31 -05002197 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2198 spin_unlock_irqrestore(phba->host->host_lock,
2199 drvr_flag);
2200 /* Mbox command <mbxCommand> cannot issue */
2201 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
2202 return (MBX_NOT_FINISHED);
2203 }
2204 /* timeout active mbox command */
James Smarta309a6b2006-08-01 07:33:43 -04002205 mod_timer(&psli->mbox_tmo, (jiffies +
2206 (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
dea31012005-04-17 16:05:31 -05002207 }
2208
2209 /* Mailbox cmd <cmd> issue */
2210 lpfc_printf_log(phba,
2211 KERN_INFO,
2212 LOG_MBOX | LOG_SLI,
2213 "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
2214 phba->brd_no,
2215 mb->mbxCommand,
2216 phba->hba_state,
2217 psli->sli_flag,
2218 flag);
2219
2220 psli->slistat.mbox_cmd++;
2221 evtctr = psli->slistat.mbox_event;
2222
2223 /* next set own bit for the adapter and copy over command word */
2224 mb->mbxOwner = OWN_CHIP;
2225
2226 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea31012005-04-17 16:05:31 -05002227 /* First copy command data to host SLIM area */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04002228 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05002229 } else {
James Smart92908312006-03-07 15:04:13 -05002230 if (mb->mbxCommand == MBX_CONFIG_PORT) {
dea31012005-04-17 16:05:31 -05002231 /* copy command data into host mbox for cmpl */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04002232 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
2233 MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05002234 }
2235
2236 /* First copy mbox command data to HBA SLIM, skip past first
2237 word */
2238 to_slim = phba->MBslimaddr + sizeof (uint32_t);
2239 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
2240 MAILBOX_CMD_SIZE - sizeof (uint32_t));
2241
2242 /* Next copy over first word, with mbxOwner set */
2243 ldata = *((volatile uint32_t *)mb);
2244 to_slim = phba->MBslimaddr;
2245 writel(ldata, to_slim);
2246 readl(to_slim); /* flush */
2247
2248 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2249 /* switch over to host mailbox */
2250 psli->sli_flag |= LPFC_SLI2_ACTIVE;
2251 }
2252 }
2253
2254 wmb();
2255 /* interrupt board to doit right away */
2256 writel(CA_MBATT, phba->CAregaddr);
2257 readl(phba->CAregaddr); /* flush */
2258
2259 switch (flag) {
2260 case MBX_NOWAIT:
2261 /* Don't wait for it to finish, just return */
2262 psli->mbox_active = pmbox;
2263 break;
2264
2265 case MBX_POLL:
dea31012005-04-17 16:05:31 -05002266 psli->mbox_active = NULL;
2267 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2268 /* First read mbox status word */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04002269 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea31012005-04-17 16:05:31 -05002270 word0 = le32_to_cpu(word0);
2271 } else {
2272 /* First read mbox status word */
2273 word0 = readl(phba->MBslimaddr);
2274 }
2275
2276 /* Read the HBA Host Attention Register */
2277 ha_copy = readl(phba->HAregaddr);
2278
James Smarta309a6b2006-08-01 07:33:43 -04002279 i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
2280 i *= 1000; /* Convert to ms */
2281
dea31012005-04-17 16:05:31 -05002282 /* Wait for command to complete */
Jamie Wellnitz41415862006-02-28 19:25:27 -05002283 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
2284 (!(ha_copy & HA_MBATT) &&
2285 (phba->hba_state > LPFC_WARM_START))) {
James Smarta309a6b2006-08-01 07:33:43 -04002286 if (i-- <= 0) {
dea31012005-04-17 16:05:31 -05002287 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2288 spin_unlock_irqrestore(phba->host->host_lock,
2289 drvr_flag);
2290 return (MBX_NOT_FINISHED);
2291 }
2292
2293 /* Check if we took a mbox interrupt while we were
2294 polling */
2295 if (((word0 & OWN_CHIP) != OWN_CHIP)
2296 && (evtctr != psli->slistat.mbox_event))
2297 break;
2298
2299 spin_unlock_irqrestore(phba->host->host_lock,
2300 drvr_flag);
2301
2302 /* Can be in interrupt context, do not sleep */
2303 /* (or might be called with interrupts disabled) */
James Smarta309a6b2006-08-01 07:33:43 -04002304 mdelay(1);
dea31012005-04-17 16:05:31 -05002305
2306 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
2307
2308 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
2309 /* First copy command data */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04002310 word0 = *((volatile uint32_t *)
2311 &phba->slim2p->mbx);
dea31012005-04-17 16:05:31 -05002312 word0 = le32_to_cpu(word0);
2313 if (mb->mbxCommand == MBX_CONFIG_PORT) {
2314 MAILBOX_t *slimmb;
2315 volatile uint32_t slimword0;
2316 /* Check real SLIM for any errors */
2317 slimword0 = readl(phba->MBslimaddr);
2318 slimmb = (MAILBOX_t *) & slimword0;
2319 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
2320 && slimmb->mbxStatus) {
2321 psli->sli_flag &=
2322 ~LPFC_SLI2_ACTIVE;
2323 word0 = slimword0;
2324 }
2325 }
2326 } else {
2327 /* First copy command data */
2328 word0 = readl(phba->MBslimaddr);
2329 }
2330 /* Read the HBA Host Attention Register */
2331 ha_copy = readl(phba->HAregaddr);
2332 }
2333
2334 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea31012005-04-17 16:05:31 -05002335 /* copy results back to user */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04002336 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
2337 MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05002338 } else {
2339 /* First copy command data */
2340 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
2341 MAILBOX_CMD_SIZE);
2342 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
2343 pmbox->context2) {
2344 lpfc_memcpy_from_slim((void *)pmbox->context2,
2345 phba->MBslimaddr + DMP_RSP_OFFSET,
2346 mb->un.varDmp.word_cnt);
2347 }
2348 }
2349
2350 writel(HA_MBATT, phba->HAregaddr);
2351 readl(phba->HAregaddr); /* flush */
2352
2353 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2354 status = mb->mbxStatus;
2355 }
2356
2357 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
2358 return (status);
2359}
2360
2361static int
2362lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2363 struct lpfc_iocbq * piocb)
2364{
2365 /* Insert the caller's iocb in the txq tail for later processing. */
2366 list_add_tail(&piocb->list, &pring->txq);
2367 pring->txq_cnt++;
2368 return (0);
2369}
2370
2371static struct lpfc_iocbq *
2372lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2373 struct lpfc_iocbq ** piocb)
2374{
2375 struct lpfc_iocbq * nextiocb;
2376
2377 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2378 if (!nextiocb) {
2379 nextiocb = *piocb;
2380 *piocb = NULL;
2381 }
2382
2383 return nextiocb;
2384}
2385
2386int
2387lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2388 struct lpfc_iocbq *piocb, uint32_t flag)
2389{
2390 struct lpfc_iocbq *nextiocb;
2391 IOCB_t *iocb;
2392
2393 /*
2394 * We should never get an IOCB if we are in a < LINK_DOWN state
2395 */
2396 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2397 return IOCB_ERROR;
2398
2399 /*
2400 * Check to see if we are blocking IOCB processing because of a
2401 * outstanding mbox command.
2402 */
2403 if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
2404 goto iocb_busy;
2405
2406 if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
2407 /*
2408 * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
2409 * can be issued if the link is not up.
2410 */
2411 switch (piocb->iocb.ulpCommand) {
2412 case CMD_QUE_RING_BUF_CN:
2413 case CMD_QUE_RING_BUF64_CN:
dea31012005-04-17 16:05:31 -05002414 /*
2415 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2416 * completion, iocb_cmpl MUST be 0.
2417 */
2418 if (piocb->iocb_cmpl)
2419 piocb->iocb_cmpl = NULL;
2420 /*FALLTHROUGH*/
2421 case CMD_CREATE_XRI_CR:
2422 break;
2423 default:
2424 goto iocb_busy;
2425 }
2426
2427 /*
2428 * For FCP commands, we must be in a state where we can process link
2429 * attention events.
2430 */
2431 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
2432 !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
2433 goto iocb_busy;
2434
dea31012005-04-17 16:05:31 -05002435 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2436 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2437 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2438
2439 if (iocb)
2440 lpfc_sli_update_ring(phba, pring);
2441 else
2442 lpfc_sli_update_full_ring(phba, pring);
2443
2444 if (!piocb)
2445 return IOCB_SUCCESS;
2446
2447 goto out_busy;
2448
2449 iocb_busy:
2450 pring->stats.iocb_cmd_delay++;
2451
2452 out_busy:
2453
2454 if (!(flag & SLI_IOCB_RET_IOCB)) {
2455 lpfc_sli_ringtx_put(phba, pring, piocb);
2456 return IOCB_SUCCESS;
2457 }
2458
2459 return IOCB_BUSY;
2460}
2461
Jamie Wellnitzcf5bf972006-02-28 22:33:08 -05002462static int
2463lpfc_extra_ring_setup( struct lpfc_hba *phba)
2464{
2465 struct lpfc_sli *psli;
2466 struct lpfc_sli_ring *pring;
2467
2468 psli = &phba->sli;
2469
2470 /* Adjust cmd/rsp ring iocb entries more evenly */
2471 pring = &psli->ring[psli->fcp_ring];
2472 pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2473 pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2474 pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2475 pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2476
2477 pring = &psli->ring[1];
2478 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2479 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2480 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2481 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2482
2483 /* Setup default profile for this ring */
2484 pring->iotag_max = 4096;
2485 pring->num_mask = 1;
2486 pring->prt[0].profile = 0; /* Mask 0 */
2487 pring->prt[0].rctl = FC_UNSOL_DATA;
2488 pring->prt[0].type = 5;
2489 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
2490 return 0;
2491}
2492
dea31012005-04-17 16:05:31 -05002493int
2494lpfc_sli_setup(struct lpfc_hba *phba)
2495{
2496 int i, totiocb = 0;
2497 struct lpfc_sli *psli = &phba->sli;
2498 struct lpfc_sli_ring *pring;
2499
2500 psli->num_rings = MAX_CONFIGURED_RINGS;
2501 psli->sli_flag = 0;
2502 psli->fcp_ring = LPFC_FCP_RING;
2503 psli->next_ring = LPFC_FCP_NEXT_RING;
2504 psli->ip_ring = LPFC_IP_RING;
2505
James Bottomley604a3e32005-10-29 10:28:33 -05002506 psli->iocbq_lookup = NULL;
2507 psli->iocbq_lookup_len = 0;
2508 psli->last_iotag = 0;
2509
dea31012005-04-17 16:05:31 -05002510 for (i = 0; i < psli->num_rings; i++) {
2511 pring = &psli->ring[i];
2512 switch (i) {
2513 case LPFC_FCP_RING: /* ring 0 - FCP */
2514 /* numCiocb and numRiocb are used in config_port */
2515 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
2516 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
2517 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2518 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2519 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2520 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2521 pring->iotag_ctr = 0;
2522 pring->iotag_max =
2523 (phba->cfg_hba_queue_depth * 2);
2524 pring->fast_iotag = pring->iotag_max;
2525 pring->num_mask = 0;
2526 break;
2527 case LPFC_IP_RING: /* ring 1 - IP */
2528 /* numCiocb and numRiocb are used in config_port */
2529 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
2530 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
2531 pring->num_mask = 0;
2532 break;
2533 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
2534 /* numCiocb and numRiocb are used in config_port */
2535 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
2536 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
2537 pring->fast_iotag = 0;
2538 pring->iotag_ctr = 0;
2539 pring->iotag_max = 4096;
2540 pring->num_mask = 4;
2541 pring->prt[0].profile = 0; /* Mask 0 */
2542 pring->prt[0].rctl = FC_ELS_REQ;
2543 pring->prt[0].type = FC_ELS_DATA;
2544 pring->prt[0].lpfc_sli_rcv_unsol_event =
2545 lpfc_els_unsol_event;
2546 pring->prt[1].profile = 0; /* Mask 1 */
2547 pring->prt[1].rctl = FC_ELS_RSP;
2548 pring->prt[1].type = FC_ELS_DATA;
2549 pring->prt[1].lpfc_sli_rcv_unsol_event =
2550 lpfc_els_unsol_event;
2551 pring->prt[2].profile = 0; /* Mask 2 */
2552 /* NameServer Inquiry */
2553 pring->prt[2].rctl = FC_UNSOL_CTL;
2554 /* NameServer */
2555 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
2556 pring->prt[2].lpfc_sli_rcv_unsol_event =
2557 lpfc_ct_unsol_event;
2558 pring->prt[3].profile = 0; /* Mask 3 */
2559 /* NameServer response */
2560 pring->prt[3].rctl = FC_SOL_CTL;
2561 /* NameServer */
2562 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
2563 pring->prt[3].lpfc_sli_rcv_unsol_event =
2564 lpfc_ct_unsol_event;
2565 break;
2566 }
2567 totiocb += (pring->numCiocb + pring->numRiocb);
2568 }
2569 if (totiocb > MAX_SLI2_IOCB) {
2570 /* Too many cmd / rsp ring entries in SLI2 SLIM */
2571 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2572 "%d:0462 Too many cmd / rsp ring entries in "
2573 "SLI2 SLIM Data: x%x x%x\n",
2574 phba->brd_no, totiocb, MAX_SLI2_IOCB);
2575 }
Jamie Wellnitzcf5bf972006-02-28 22:33:08 -05002576 if (phba->cfg_multi_ring_support == 2)
2577 lpfc_extra_ring_setup(phba);
dea31012005-04-17 16:05:31 -05002578
2579 return 0;
2580}
2581
2582int
2583lpfc_sli_queue_setup(struct lpfc_hba * phba)
2584{
2585 struct lpfc_sli *psli;
2586 struct lpfc_sli_ring *pring;
James Bottomley604a3e32005-10-29 10:28:33 -05002587 int i;
dea31012005-04-17 16:05:31 -05002588
2589 psli = &phba->sli;
2590 spin_lock_irq(phba->host->host_lock);
2591 INIT_LIST_HEAD(&psli->mboxq);
2592 /* Initialize list headers for txq and txcmplq as double linked lists */
2593 for (i = 0; i < psli->num_rings; i++) {
2594 pring = &psli->ring[i];
2595 pring->ringno = i;
2596 pring->next_cmdidx = 0;
2597 pring->local_getidx = 0;
2598 pring->cmdidx = 0;
2599 INIT_LIST_HEAD(&pring->txq);
2600 INIT_LIST_HEAD(&pring->txcmplq);
2601 INIT_LIST_HEAD(&pring->iocb_continueq);
2602 INIT_LIST_HEAD(&pring->postbufq);
dea31012005-04-17 16:05:31 -05002603 }
2604 spin_unlock_irq(phba->host->host_lock);
2605 return (1);
2606}
2607
2608int
2609lpfc_sli_hba_down(struct lpfc_hba * phba)
2610{
2611 struct lpfc_sli *psli;
2612 struct lpfc_sli_ring *pring;
2613 LPFC_MBOXQ_t *pmb;
2614 struct lpfc_iocbq *iocb, *next_iocb;
2615 IOCB_t *icmd = NULL;
2616 int i;
2617 unsigned long flags = 0;
2618
2619 psli = &phba->sli;
2620 lpfc_hba_down_prep(phba);
2621
2622 spin_lock_irqsave(phba->host->host_lock, flags);
2623
2624 for (i = 0; i < psli->num_rings; i++) {
2625 pring = &psli->ring[i];
2626 pring->flag |= LPFC_DEFERRED_RING_EVENT;
2627
2628 /*
2629 * Error everything on the txq since these iocbs have not been
2630 * given to the FW yet.
2631 */
2632 pring->txq_cnt = 0;
2633
2634 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
2635 list_del_init(&iocb->list);
2636 if (iocb->iocb_cmpl) {
2637 icmd = &iocb->iocb;
2638 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
2639 icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
2640 spin_unlock_irqrestore(phba->host->host_lock,
2641 flags);
2642 (iocb->iocb_cmpl) (phba, iocb, iocb);
2643 spin_lock_irqsave(phba->host->host_lock, flags);
James Bottomley604a3e32005-10-29 10:28:33 -05002644 } else
2645 lpfc_sli_release_iocbq(phba, iocb);
dea31012005-04-17 16:05:31 -05002646 }
2647
2648 INIT_LIST_HEAD(&(pring->txq));
2649
dea31012005-04-17 16:05:31 -05002650 }
2651
2652 spin_unlock_irqrestore(phba->host->host_lock, flags);
2653
2654 /* Return any active mbox cmds */
2655 del_timer_sync(&psli->mbox_tmo);
2656 spin_lock_irqsave(phba->host->host_lock, flags);
2657 phba->work_hba_events &= ~WORKER_MBOX_TMO;
2658 if (psli->mbox_active) {
2659 pmb = psli->mbox_active;
2660 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2661 if (pmb->mbox_cmpl) {
2662 spin_unlock_irqrestore(phba->host->host_lock, flags);
2663 pmb->mbox_cmpl(phba,pmb);
2664 spin_lock_irqsave(phba->host->host_lock, flags);
2665 }
2666 }
2667 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2668 psli->mbox_active = NULL;
2669
2670 /* Return any pending mbox cmds */
2671 while ((pmb = lpfc_mbox_get(phba)) != NULL) {
2672 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2673 if (pmb->mbox_cmpl) {
2674 spin_unlock_irqrestore(phba->host->host_lock, flags);
2675 pmb->mbox_cmpl(phba,pmb);
2676 spin_lock_irqsave(phba->host->host_lock, flags);
2677 }
2678 }
2679
2680 INIT_LIST_HEAD(&psli->mboxq);
2681
2682 spin_unlock_irqrestore(phba->host->host_lock, flags);
2683
dea31012005-04-17 16:05:31 -05002684 return 1;
2685}
2686
2687void
2688lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
2689{
2690 uint32_t *src = srcp;
2691 uint32_t *dest = destp;
2692 uint32_t ldata;
2693 int i;
2694
2695 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
2696 ldata = *src;
2697 ldata = le32_to_cpu(ldata);
2698 *dest = ldata;
2699 src++;
2700 dest++;
2701 }
2702}
2703
2704int
2705lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2706 struct lpfc_dmabuf * mp)
2707{
2708 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
2709 later */
2710 list_add_tail(&mp->list, &pring->postbufq);
2711
2712 pring->postbufq_cnt++;
2713 return 0;
2714}
2715
2716
2717struct lpfc_dmabuf *
2718lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2719 dma_addr_t phys)
2720{
2721 struct lpfc_dmabuf *mp, *next_mp;
2722 struct list_head *slp = &pring->postbufq;
2723
2724 /* Search postbufq, from the begining, looking for a match on phys */
2725 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
2726 if (mp->phys == phys) {
2727 list_del_init(&mp->list);
2728 pring->postbufq_cnt--;
2729 return mp;
2730 }
2731 }
2732
2733 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2734 "%d:0410 Cannot find virtual addr for mapped buf on "
2735 "ring %d Data x%llx x%p x%p x%x\n",
2736 phba->brd_no, pring->ringno, (unsigned long long)phys,
2737 slp->next, slp->prev, pring->postbufq_cnt);
2738 return NULL;
2739}
2740
2741static void
2742lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2743 struct lpfc_iocbq * rspiocb)
2744{
2745 struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
2746 /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
2747 * just aborted.
2748 * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
2749 */
2750 if (cmdiocb->context2) {
2751 buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
2752
2753 /* Free the response IOCB before completing the abort
2754 command. */
2755 buf_ptr = NULL;
2756 list_remove_head((&buf_ptr1->list), buf_ptr,
2757 struct lpfc_dmabuf, list);
2758 if (buf_ptr) {
2759 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2760 kfree(buf_ptr);
2761 }
2762 lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
2763 kfree(buf_ptr1);
2764 }
2765
2766 if (cmdiocb->context3) {
2767 buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
2768 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2769 kfree(buf_ptr);
2770 }
2771
James Bottomley604a3e32005-10-29 10:28:33 -05002772 lpfc_sli_release_iocbq(phba, cmdiocb);
dea31012005-04-17 16:05:31 -05002773 return;
2774}
2775
2776int
2777lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
2778 struct lpfc_sli_ring * pring,
2779 struct lpfc_iocbq * cmdiocb)
2780{
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002781 struct lpfc_iocbq *abtsiocbp;
dea31012005-04-17 16:05:31 -05002782 IOCB_t *icmd = NULL;
2783 IOCB_t *iabt = NULL;
2784
2785 /* issue ABTS for this IOCB based on iotag */
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002786 abtsiocbp = lpfc_sli_get_iocbq(phba);
dea31012005-04-17 16:05:31 -05002787 if (abtsiocbp == NULL)
2788 return 0;
dea31012005-04-17 16:05:31 -05002789
2790 iabt = &abtsiocbp->iocb;
2791 icmd = &cmdiocb->iocb;
2792 switch (icmd->ulpCommand) {
2793 case CMD_ELS_REQUEST64_CR:
2794 /* Even though we abort the ELS command, the firmware may access
2795 * the BPL or other resources before it processes our
2796 * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
2797 * resources till the actual abort request completes.
2798 */
2799 abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
2800 abtsiocbp->context2 = cmdiocb->context2;
2801 abtsiocbp->context3 = cmdiocb->context3;
2802 cmdiocb->context2 = NULL;
2803 cmdiocb->context3 = NULL;
2804 abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
2805 break;
2806 default:
James Bottomley604a3e32005-10-29 10:28:33 -05002807 lpfc_sli_release_iocbq(phba, abtsiocbp);
dea31012005-04-17 16:05:31 -05002808 return 0;
2809 }
2810
2811 iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
2812 iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
2813
2814 iabt->ulpLe = 1;
2815 iabt->ulpClass = CLASS3;
2816 iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
2817
2818 if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
James Bottomley604a3e32005-10-29 10:28:33 -05002819 lpfc_sli_release_iocbq(phba, abtsiocbp);
dea31012005-04-17 16:05:31 -05002820 return 0;
2821 }
2822
2823 return 1;
2824}
2825
2826static int
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002827lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
2828 uint64_t lun_id, uint32_t ctx,
2829 lpfc_ctx_cmd ctx_cmd)
dea31012005-04-17 16:05:31 -05002830{
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002831 struct lpfc_scsi_buf *lpfc_cmd;
2832 struct scsi_cmnd *cmnd;
dea31012005-04-17 16:05:31 -05002833 int rc = 1;
2834
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002835 if (!(iocbq->iocb_flag & LPFC_IO_FCP))
2836 return rc;
2837
2838 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
2839 cmnd = lpfc_cmd->pCmd;
2840
2841 if (cmnd == NULL)
dea31012005-04-17 16:05:31 -05002842 return rc;
2843
2844 switch (ctx_cmd) {
2845 case LPFC_CTX_LUN:
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002846 if ((cmnd->device->id == tgt_id) &&
2847 (cmnd->device->lun == lun_id))
dea31012005-04-17 16:05:31 -05002848 rc = 0;
2849 break;
2850 case LPFC_CTX_TGT:
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002851 if (cmnd->device->id == tgt_id)
dea31012005-04-17 16:05:31 -05002852 rc = 0;
2853 break;
2854 case LPFC_CTX_CTX:
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002855 if (iocbq->iocb.ulpContext == ctx)
dea31012005-04-17 16:05:31 -05002856 rc = 0;
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002857 break;
dea31012005-04-17 16:05:31 -05002858 case LPFC_CTX_HOST:
2859 rc = 0;
2860 break;
2861 default:
2862 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
2863 __FUNCTION__, ctx_cmd);
2864 break;
2865 }
2866
2867 return rc;
2868}
2869
2870int
2871lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2872 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
2873{
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002874 struct lpfc_iocbq *iocbq;
2875 int sum, i;
dea31012005-04-17 16:05:31 -05002876
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002877 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
2878 iocbq = phba->sli.iocbq_lookup[i];
dea31012005-04-17 16:05:31 -05002879
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002880 if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
2881 0, ctx_cmd) == 0)
2882 sum++;
dea31012005-04-17 16:05:31 -05002883 }
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002884
dea31012005-04-17 16:05:31 -05002885 return sum;
2886}
2887
James.Smart@Emulex.Com5eb95af2005-06-25 10:34:30 -04002888void
2889lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2890 struct lpfc_iocbq * rspiocb)
2891{
2892 spin_lock_irq(phba->host->host_lock);
James Bottomley604a3e32005-10-29 10:28:33 -05002893 lpfc_sli_release_iocbq(phba, cmdiocb);
James.Smart@Emulex.Com5eb95af2005-06-25 10:34:30 -04002894 spin_unlock_irq(phba->host->host_lock);
2895 return;
2896}
2897
dea31012005-04-17 16:05:31 -05002898int
2899lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2900 uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
2901 lpfc_ctx_cmd abort_cmd)
2902{
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002903 struct lpfc_iocbq *iocbq;
2904 struct lpfc_iocbq *abtsiocb;
dea31012005-04-17 16:05:31 -05002905 IOCB_t *cmd = NULL;
dea31012005-04-17 16:05:31 -05002906 int errcnt = 0, ret_val = 0;
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002907 int i;
dea31012005-04-17 16:05:31 -05002908
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002909 for (i = 1; i <= phba->sli.last_iotag; i++) {
2910 iocbq = phba->sli.iocbq_lookup[i];
dea31012005-04-17 16:05:31 -05002911
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002912 if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
2913 0, abort_cmd) != 0)
dea31012005-04-17 16:05:31 -05002914 continue;
2915
2916 /* issue ABTS for this IOCB based on iotag */
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002917 abtsiocb = lpfc_sli_get_iocbq(phba);
dea31012005-04-17 16:05:31 -05002918 if (abtsiocb == NULL) {
2919 errcnt++;
2920 continue;
2921 }
dea31012005-04-17 16:05:31 -05002922
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -04002923 cmd = &iocbq->iocb;
dea31012005-04-17 16:05:31 -05002924 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
2925 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
2926 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
2927 abtsiocb->iocb.ulpLe = 1;
2928 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2929
2930 if (phba->hba_state >= LPFC_LINK_UP)
2931 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
2932 else
2933 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
2934
James.Smart@Emulex.Com5eb95af2005-06-25 10:34:30 -04002935 /* Setup callback routine and issue the command. */
2936 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea31012005-04-17 16:05:31 -05002937 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
2938 if (ret_val == IOCB_ERROR) {
James Bottomley604a3e32005-10-29 10:28:33 -05002939 lpfc_sli_release_iocbq(phba, abtsiocb);
dea31012005-04-17 16:05:31 -05002940 errcnt++;
2941 continue;
2942 }
2943 }
2944
2945 return errcnt;
2946}
2947
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002948static void
2949lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
2950 struct lpfc_iocbq *cmdiocbq,
2951 struct lpfc_iocbq *rspiocbq)
dea31012005-04-17 16:05:31 -05002952{
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002953 wait_queue_head_t *pdone_q;
2954 unsigned long iflags;
dea31012005-04-17 16:05:31 -05002955
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002956 spin_lock_irqsave(phba->host->host_lock, iflags);
2957 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
2958 if (cmdiocbq->context2 && rspiocbq)
2959 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
2960 &rspiocbq->iocb, sizeof(IOCB_t));
2961
2962 pdone_q = cmdiocbq->context_un.wait_queue;
2963 spin_unlock_irqrestore(phba->host->host_lock, iflags);
2964 if (pdone_q)
2965 wake_up(pdone_q);
dea31012005-04-17 16:05:31 -05002966 return;
2967}
2968
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002969/*
2970 * Issue the caller's iocb and wait for its completion, but no longer than the
2971 * caller's timeout. Note that iocb_flags is cleared before the
2972 * lpfc_sli_issue_call since the wake routine sets a unique value and by
2973 * definition this is a wait function.
2974 */
dea31012005-04-17 16:05:31 -05002975int
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002976lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
2977 struct lpfc_sli_ring * pring,
2978 struct lpfc_iocbq * piocb,
2979 struct lpfc_iocbq * prspiocbq,
2980 uint32_t timeout)
dea31012005-04-17 16:05:31 -05002981{
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002982 DECLARE_WAIT_QUEUE_HEAD(done_q);
2983 long timeleft, timeout_req = 0;
2984 int retval = IOCB_SUCCESS;
James.Smart@Emulex.Com875fbdf2005-11-29 16:32:13 -05002985 uint32_t creg_val;
dea31012005-04-17 16:05:31 -05002986
2987 /*
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002988 * If the caller has provided a response iocbq buffer, then context2
2989 * is NULL or its an error.
dea31012005-04-17 16:05:31 -05002990 */
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002991 if (prspiocbq) {
2992 if (piocb->context2)
2993 return IOCB_ERROR;
2994 piocb->context2 = prspiocbq;
dea31012005-04-17 16:05:31 -05002995 }
2996
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002997 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
2998 piocb->context_un.wait_queue = &done_q;
2999 piocb->iocb_flag &= ~LPFC_IO_WAKE;
dea31012005-04-17 16:05:31 -05003000
James.Smart@Emulex.Com875fbdf2005-11-29 16:32:13 -05003001 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3002 creg_val = readl(phba->HCregaddr);
3003 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
3004 writel(creg_val, phba->HCregaddr);
3005 readl(phba->HCregaddr); /* flush */
3006 }
3007
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04003008 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
3009 if (retval == IOCB_SUCCESS) {
3010 timeout_req = timeout * HZ;
3011 spin_unlock_irq(phba->host->host_lock);
3012 timeleft = wait_event_timeout(done_q,
3013 piocb->iocb_flag & LPFC_IO_WAKE,
3014 timeout_req);
3015 spin_lock_irq(phba->host->host_lock);
dea31012005-04-17 16:05:31 -05003016
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04003017 if (timeleft == 0) {
3018 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3019 "%d:0329 IOCB wait timeout error - no "
3020 "wake response Data x%x\n",
3021 phba->brd_no, timeout);
3022 retval = IOCB_TIMEDOUT;
3023 } else if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
3024 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3025 "%d:0330 IOCB wake NOT set, "
3026 "Data x%x x%lx\n", phba->brd_no,
3027 timeout, (timeleft / jiffies));
3028 retval = IOCB_TIMEDOUT;
3029 } else {
3030 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3031 "%d:0331 IOCB wake signaled\n",
3032 phba->brd_no);
dea31012005-04-17 16:05:31 -05003033 }
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04003034 } else {
3035 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3036 "%d:0332 IOCB wait issue failed, Data x%x\n",
3037 phba->brd_no, retval);
3038 retval = IOCB_ERROR;
dea31012005-04-17 16:05:31 -05003039 }
3040
James.Smart@Emulex.Com875fbdf2005-11-29 16:32:13 -05003041 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
3042 creg_val = readl(phba->HCregaddr);
3043 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
3044 writel(creg_val, phba->HCregaddr);
3045 readl(phba->HCregaddr); /* flush */
3046 }
3047
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04003048 if (prspiocbq)
3049 piocb->context2 = NULL;
3050
3051 piocb->context_un.wait_queue = NULL;
3052 piocb->iocb_cmpl = NULL;
dea31012005-04-17 16:05:31 -05003053 return retval;
3054}
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04003055
dea31012005-04-17 16:05:31 -05003056int
3057lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
3058 uint32_t timeout)
3059{
3060 DECLARE_WAIT_QUEUE_HEAD(done_q);
3061 DECLARE_WAITQUEUE(wq_entry, current);
3062 uint32_t timeleft = 0;
3063 int retval;
3064
3065 /* The caller must leave context1 empty. */
3066 if (pmboxq->context1 != 0) {
3067 return (MBX_NOT_FINISHED);
3068 }
3069
3070 /* setup wake call as IOCB callback */
3071 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
3072 /* setup context field to pass wait_queue pointer to wake function */
3073 pmboxq->context1 = &done_q;
3074
3075 /* start to sleep before we wait, to avoid races */
3076 set_current_state(TASK_INTERRUPTIBLE);
3077 add_wait_queue(&done_q, &wq_entry);
3078
3079 /* now issue the command */
3080 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
3081
3082 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
3083 timeleft = schedule_timeout(timeout * HZ);
3084 pmboxq->context1 = NULL;
3085 /* if schedule_timeout returns 0, we timed out and were not
3086 woken up */
Jamie Wellnitz406d6042006-02-28 19:25:20 -05003087 if ((timeleft == 0) || signal_pending(current))
dea31012005-04-17 16:05:31 -05003088 retval = MBX_TIMEOUT;
Jamie Wellnitz406d6042006-02-28 19:25:20 -05003089 else
dea31012005-04-17 16:05:31 -05003090 retval = MBX_SUCCESS;
dea31012005-04-17 16:05:31 -05003091 }
3092
3093
3094 set_current_state(TASK_RUNNING);
3095 remove_wait_queue(&done_q, &wq_entry);
3096 return retval;
3097}
3098
James Smartb4c02652006-07-06 15:50:43 -04003099int
3100lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
3101{
3102 int i = 0;
3103
3104 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !phba->stopped) {
3105 if (i++ > LPFC_MBOX_TMO * 1000)
3106 return 1;
3107
3108 if (lpfc_sli_handle_mb_event(phba) == 0)
3109 i = 0;
3110
3111 msleep(1);
3112 }
3113
3114 return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
3115}
3116
dea31012005-04-17 16:05:31 -05003117irqreturn_t
3118lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
3119{
3120 struct lpfc_hba *phba;
3121 uint32_t ha_copy;
3122 uint32_t work_ha_copy;
3123 unsigned long status;
3124 int i;
3125 uint32_t control;
3126
3127 /*
3128 * Get the driver's phba structure from the dev_id and
3129 * assume the HBA is not interrupting.
3130 */
3131 phba = (struct lpfc_hba *) dev_id;
3132
3133 if (unlikely(!phba))
3134 return IRQ_NONE;
3135
3136 phba->sli.slistat.sli_intr++;
3137
3138 /*
3139 * Call the HBA to see if it is interrupting. If not, don't claim
3140 * the interrupt
3141 */
3142
3143 /* Ignore all interrupts during initialization. */
3144 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
3145 return IRQ_NONE;
3146
3147 /*
3148 * Read host attention register to determine interrupt source
3149 * Clear Attention Sources, except Error Attention (to
3150 * preserve status) and Link Attention
3151 */
3152 spin_lock(phba->host->host_lock);
3153 ha_copy = readl(phba->HAregaddr);
3154 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
3155 readl(phba->HAregaddr); /* flush */
3156 spin_unlock(phba->host->host_lock);
3157
3158 if (unlikely(!ha_copy))
3159 return IRQ_NONE;
3160
3161 work_ha_copy = ha_copy & phba->work_ha_mask;
3162
3163 if (unlikely(work_ha_copy)) {
3164 if (work_ha_copy & HA_LATT) {
3165 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
3166 /*
3167 * Turn off Link Attention interrupts
3168 * until CLEAR_LA done
3169 */
3170 spin_lock(phba->host->host_lock);
3171 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
3172 control = readl(phba->HCregaddr);
3173 control &= ~HC_LAINT_ENA;
3174 writel(control, phba->HCregaddr);
3175 readl(phba->HCregaddr); /* flush */
3176 spin_unlock(phba->host->host_lock);
3177 }
3178 else
3179 work_ha_copy &= ~HA_LATT;
3180 }
3181
3182 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
3183 for (i = 0; i < phba->sli.num_rings; i++) {
3184 if (work_ha_copy & (HA_RXATT << (4*i))) {
3185 /*
3186 * Turn off Slow Rings interrupts
3187 */
3188 spin_lock(phba->host->host_lock);
3189 control = readl(phba->HCregaddr);
3190 control &= ~(HC_R0INT_ENA << i);
3191 writel(control, phba->HCregaddr);
3192 readl(phba->HCregaddr); /* flush */
3193 spin_unlock(phba->host->host_lock);
3194 }
3195 }
3196 }
3197
3198 if (work_ha_copy & HA_ERATT) {
3199 phba->hba_state = LPFC_HBA_ERROR;
3200 /*
3201 * There was a link/board error. Read the
3202 * status register to retrieve the error event
3203 * and process it.
3204 */
3205 phba->sli.slistat.err_attn_event++;
3206 /* Save status info */
3207 phba->work_hs = readl(phba->HSregaddr);
3208 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
3209 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
3210
3211 /* Clear Chip error bit */
3212 writel(HA_ERATT, phba->HAregaddr);
3213 readl(phba->HAregaddr); /* flush */
James Smart92908312006-03-07 15:04:13 -05003214 phba->stopped = 1;
dea31012005-04-17 16:05:31 -05003215 }
3216
3217 spin_lock(phba->host->host_lock);
3218 phba->work_ha |= work_ha_copy;
3219 if (phba->work_wait)
3220 wake_up(phba->work_wait);
3221 spin_unlock(phba->host->host_lock);
3222 }
3223
3224 ha_copy &= ~(phba->work_ha_mask);
3225
3226 /*
3227 * Process all events on FCP ring. Take the optimized path for
3228 * FCP IO. Any other IO is slow path and is handled by
3229 * the worker thread.
3230 */
3231 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
3232 status >>= (4*LPFC_FCP_RING);
3233 if (status & HA_RXATT)
3234 lpfc_sli_handle_fast_ring_event(phba,
3235 &phba->sli.ring[LPFC_FCP_RING],
3236 status);
3237 return IRQ_HANDLED;
3238
3239} /* lpfc_intr_handler */