Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 1 | /* |
Joerg Roedel | 5d0d715 | 2010-10-13 11:13:21 +0200 | [diff] [blame] | 2 | * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 3 | * Author: Joerg Roedel <joerg.roedel@amd.com> |
| 4 | * Leo Duran <leo.duran@amd.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #include <linux/pci.h> |
| 21 | #include <linux/acpi.h> |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 22 | #include <linux/list.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 23 | #include <linux/slab.h> |
Rafael J. Wysocki | f3c6ea1 | 2011-03-23 22:15:54 +0100 | [diff] [blame] | 24 | #include <linux/syscore_ops.h> |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/msi.h> |
Joerg Roedel | 403f81d | 2011-06-14 16:44:25 +0200 | [diff] [blame] | 27 | #include <linux/amd-iommu.h> |
Joerg Roedel | 400a28a | 2011-11-28 15:11:02 +0100 | [diff] [blame] | 28 | #include <linux/export.h> |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 29 | #include <asm/pci-direct.h> |
FUJITA Tomonori | 46a7fa2 | 2008-07-11 10:23:42 +0900 | [diff] [blame] | 30 | #include <asm/iommu.h> |
Joerg Roedel | 1d9b16d | 2008-11-27 18:39:15 +0100 | [diff] [blame] | 31 | #include <asm/gart.h> |
FUJITA Tomonori | ea1b0d3 | 2009-11-10 19:46:15 +0900 | [diff] [blame] | 32 | #include <asm/x86_init.h> |
Konrad Rzeszutek Wilk | 22e6daf | 2010-08-26 13:58:03 -0400 | [diff] [blame] | 33 | #include <asm/iommu_table.h> |
Joerg Roedel | 403f81d | 2011-06-14 16:44:25 +0200 | [diff] [blame] | 34 | |
| 35 | #include "amd_iommu_proto.h" |
| 36 | #include "amd_iommu_types.h" |
| 37 | |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 38 | /* |
| 39 | * definitions for the ACPI scanning code |
| 40 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 41 | #define IVRS_HEADER_LENGTH 48 |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 42 | |
| 43 | #define ACPI_IVHD_TYPE 0x10 |
| 44 | #define ACPI_IVMD_TYPE_ALL 0x20 |
| 45 | #define ACPI_IVMD_TYPE 0x21 |
| 46 | #define ACPI_IVMD_TYPE_RANGE 0x22 |
| 47 | |
| 48 | #define IVHD_DEV_ALL 0x01 |
| 49 | #define IVHD_DEV_SELECT 0x02 |
| 50 | #define IVHD_DEV_SELECT_RANGE_START 0x03 |
| 51 | #define IVHD_DEV_RANGE_END 0x04 |
| 52 | #define IVHD_DEV_ALIAS 0x42 |
| 53 | #define IVHD_DEV_ALIAS_RANGE 0x43 |
| 54 | #define IVHD_DEV_EXT_SELECT 0x46 |
| 55 | #define IVHD_DEV_EXT_SELECT_RANGE 0x47 |
| 56 | |
Joerg Roedel | 6da7342 | 2009-05-04 11:44:38 +0200 | [diff] [blame] | 57 | #define IVHD_FLAG_HT_TUN_EN_MASK 0x01 |
| 58 | #define IVHD_FLAG_PASSPW_EN_MASK 0x02 |
| 59 | #define IVHD_FLAG_RESPASSPW_EN_MASK 0x04 |
| 60 | #define IVHD_FLAG_ISOC_EN_MASK 0x08 |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 61 | |
| 62 | #define IVMD_FLAG_EXCL_RANGE 0x08 |
| 63 | #define IVMD_FLAG_UNITY_MAP 0x01 |
| 64 | |
| 65 | #define ACPI_DEVFLAG_INITPASS 0x01 |
| 66 | #define ACPI_DEVFLAG_EXTINT 0x02 |
| 67 | #define ACPI_DEVFLAG_NMI 0x04 |
| 68 | #define ACPI_DEVFLAG_SYSMGT1 0x10 |
| 69 | #define ACPI_DEVFLAG_SYSMGT2 0x20 |
| 70 | #define ACPI_DEVFLAG_LINT0 0x40 |
| 71 | #define ACPI_DEVFLAG_LINT1 0x80 |
| 72 | #define ACPI_DEVFLAG_ATSDIS 0x10000000 |
| 73 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 74 | /* |
| 75 | * ACPI table definitions |
| 76 | * |
| 77 | * These data structures are laid over the table to parse the important values |
| 78 | * out of it. |
| 79 | */ |
| 80 | |
| 81 | /* |
| 82 | * structure describing one IOMMU in the ACPI table. Typically followed by one |
| 83 | * or more ivhd_entrys. |
| 84 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 85 | struct ivhd_header { |
| 86 | u8 type; |
| 87 | u8 flags; |
| 88 | u16 length; |
| 89 | u16 devid; |
| 90 | u16 cap_ptr; |
| 91 | u64 mmio_phys; |
| 92 | u16 pci_seg; |
| 93 | u16 info; |
| 94 | u32 reserved; |
| 95 | } __attribute__((packed)); |
| 96 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 97 | /* |
| 98 | * A device entry describing which devices a specific IOMMU translates and |
| 99 | * which requestor ids they use. |
| 100 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 101 | struct ivhd_entry { |
| 102 | u8 type; |
| 103 | u16 devid; |
| 104 | u8 flags; |
| 105 | u32 ext; |
| 106 | } __attribute__((packed)); |
| 107 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 108 | /* |
| 109 | * An AMD IOMMU memory definition structure. It defines things like exclusion |
| 110 | * ranges for devices and regions that should be unity mapped. |
| 111 | */ |
Joerg Roedel | f6e2e6b | 2008-06-26 21:27:39 +0200 | [diff] [blame] | 112 | struct ivmd_header { |
| 113 | u8 type; |
| 114 | u8 flags; |
| 115 | u16 length; |
| 116 | u16 devid; |
| 117 | u16 aux; |
| 118 | u64 resv; |
| 119 | u64 range_start; |
| 120 | u64 range_length; |
| 121 | } __attribute__((packed)); |
| 122 | |
Joerg Roedel | fefda11 | 2009-05-20 12:21:42 +0200 | [diff] [blame] | 123 | bool amd_iommu_dump; |
| 124 | |
Joerg Roedel | c1cbebe | 2008-07-03 19:35:10 +0200 | [diff] [blame] | 125 | static int __initdata amd_iommu_detected; |
Joerg Roedel | a523572 | 2010-05-11 17:12:33 +0200 | [diff] [blame] | 126 | static bool __initdata amd_iommu_disabled; |
Joerg Roedel | c1cbebe | 2008-07-03 19:35:10 +0200 | [diff] [blame] | 127 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 128 | u16 amd_iommu_last_bdf; /* largest PCI device id we have |
| 129 | to handle */ |
Joerg Roedel | 2e22847 | 2008-07-11 17:14:31 +0200 | [diff] [blame] | 130 | LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 131 | we find in ACPI */ |
Dan Carpenter | 3775d48 | 2012-06-27 12:09:18 +0300 | [diff] [blame] | 132 | u32 amd_iommu_unmap_flush; /* if true, flush on every unmap */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 133 | |
Joerg Roedel | 2e22847 | 2008-07-11 17:14:31 +0200 | [diff] [blame] | 134 | LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 135 | system */ |
| 136 | |
Joerg Roedel | bb52777 | 2009-11-20 14:31:51 +0100 | [diff] [blame] | 137 | /* Array to assign indices to IOMMUs*/ |
| 138 | struct amd_iommu *amd_iommus[MAX_IOMMUS]; |
| 139 | int amd_iommus_present; |
| 140 | |
Joerg Roedel | 318afd4 | 2009-11-23 18:32:38 +0100 | [diff] [blame] | 141 | /* IOMMUs have a non-present cache? */ |
| 142 | bool amd_iommu_np_cache __read_mostly; |
Joerg Roedel | 60f723b | 2011-04-05 12:50:24 +0200 | [diff] [blame] | 143 | bool amd_iommu_iotlb_sup __read_mostly = true; |
Joerg Roedel | 318afd4 | 2009-11-23 18:32:38 +0100 | [diff] [blame] | 144 | |
Joerg Roedel | 62f71ab | 2011-11-10 14:41:57 +0100 | [diff] [blame] | 145 | u32 amd_iommu_max_pasids __read_mostly = ~0; |
| 146 | |
Joerg Roedel | 400a28a | 2011-11-28 15:11:02 +0100 | [diff] [blame] | 147 | bool amd_iommu_v2_present __read_mostly; |
| 148 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 149 | bool amd_iommu_force_isolation __read_mostly; |
| 150 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 151 | /* |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 152 | * The ACPI table parsing functions set this variable on an error |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 153 | */ |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 154 | static int __initdata amd_iommu_init_err; |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 155 | |
| 156 | /* |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 157 | * List of protection domains - used during resume |
| 158 | */ |
| 159 | LIST_HEAD(amd_iommu_pd_list); |
| 160 | spinlock_t amd_iommu_pd_lock; |
| 161 | |
| 162 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 163 | * Pointer to the device table which is shared by all AMD IOMMUs |
| 164 | * it is indexed by the PCI device id or the HT unit id and contains |
| 165 | * information about the domain the device belongs to as well as the |
| 166 | * page table root pointer. |
| 167 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 168 | struct dev_table_entry *amd_iommu_dev_table; |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 169 | |
| 170 | /* |
| 171 | * The alias table is a driver specific data structure which contains the |
| 172 | * mappings of the PCI device ids to the actual requestor ids on the IOMMU. |
| 173 | * More than one device can share the same requestor id. |
| 174 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 175 | u16 *amd_iommu_alias_table; |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 176 | |
| 177 | /* |
| 178 | * The rlookup table is used to find the IOMMU which is responsible |
| 179 | * for a specific device. It is also indexed by the PCI device id. |
| 180 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 181 | struct amd_iommu **amd_iommu_rlookup_table; |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 182 | |
| 183 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 184 | * AMD IOMMU allows up to 2^16 differend protection domains. This is a bitmap |
| 185 | * to know which ones are already in use. |
| 186 | */ |
Joerg Roedel | 928abd2 | 2008-06-26 21:27:40 +0200 | [diff] [blame] | 187 | unsigned long *amd_iommu_pd_alloc_bitmap; |
| 188 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 189 | static u32 dev_table_size; /* size of the device table */ |
| 190 | static u32 alias_table_size; /* size of the alias table */ |
| 191 | static u32 rlookup_table_size; /* size if the rlookup table */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 192 | |
Gerard Snitselaar | ae29514 | 2012-03-16 11:38:22 -0700 | [diff] [blame] | 193 | static int amd_iommu_enable_interrupts(void); |
Joerg Roedel | 3d9761e | 2012-03-15 16:39:21 +0100 | [diff] [blame] | 194 | |
Joerg Roedel | 208ec8c | 2008-07-11 17:14:24 +0200 | [diff] [blame] | 195 | static inline void update_last_devid(u16 devid) |
| 196 | { |
| 197 | if (devid > amd_iommu_last_bdf) |
| 198 | amd_iommu_last_bdf = devid; |
| 199 | } |
| 200 | |
Joerg Roedel | c571484 | 2008-07-11 17:14:25 +0200 | [diff] [blame] | 201 | static inline unsigned long tbl_size(int entry_size) |
| 202 | { |
| 203 | unsigned shift = PAGE_SHIFT + |
Neil Turton | 421f909 | 2009-05-14 14:00:35 +0100 | [diff] [blame] | 204 | get_order(((int)amd_iommu_last_bdf + 1) * entry_size); |
Joerg Roedel | c571484 | 2008-07-11 17:14:25 +0200 | [diff] [blame] | 205 | |
| 206 | return 1UL << shift; |
| 207 | } |
| 208 | |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 209 | /* Access to l1 and l2 indexed register spaces */ |
| 210 | |
| 211 | static u32 iommu_read_l1(struct amd_iommu *iommu, u16 l1, u8 address) |
| 212 | { |
| 213 | u32 val; |
| 214 | |
| 215 | pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16)); |
| 216 | pci_read_config_dword(iommu->dev, 0xfc, &val); |
| 217 | return val; |
| 218 | } |
| 219 | |
| 220 | static void iommu_write_l1(struct amd_iommu *iommu, u16 l1, u8 address, u32 val) |
| 221 | { |
| 222 | pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16 | 1 << 31)); |
| 223 | pci_write_config_dword(iommu->dev, 0xfc, val); |
| 224 | pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16)); |
| 225 | } |
| 226 | |
| 227 | static u32 iommu_read_l2(struct amd_iommu *iommu, u8 address) |
| 228 | { |
| 229 | u32 val; |
| 230 | |
| 231 | pci_write_config_dword(iommu->dev, 0xf0, address); |
| 232 | pci_read_config_dword(iommu->dev, 0xf4, &val); |
| 233 | return val; |
| 234 | } |
| 235 | |
| 236 | static void iommu_write_l2(struct amd_iommu *iommu, u8 address, u32 val) |
| 237 | { |
| 238 | pci_write_config_dword(iommu->dev, 0xf0, (address | 1 << 8)); |
| 239 | pci_write_config_dword(iommu->dev, 0xf4, val); |
| 240 | } |
| 241 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 242 | /**************************************************************************** |
| 243 | * |
| 244 | * AMD IOMMU MMIO register space handling functions |
| 245 | * |
| 246 | * These functions are used to program the IOMMU device registers in |
| 247 | * MMIO space required for that driver. |
| 248 | * |
| 249 | ****************************************************************************/ |
| 250 | |
| 251 | /* |
| 252 | * This function set the exclusion range in the IOMMU. DMA accesses to the |
| 253 | * exclusion range are passed through untranslated |
| 254 | */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 255 | static void iommu_set_exclusion_range(struct amd_iommu *iommu) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 256 | { |
| 257 | u64 start = iommu->exclusion_start & PAGE_MASK; |
| 258 | u64 limit = (start + iommu->exclusion_length) & PAGE_MASK; |
| 259 | u64 entry; |
| 260 | |
| 261 | if (!iommu->exclusion_start) |
| 262 | return; |
| 263 | |
| 264 | entry = start | MMIO_EXCL_ENABLE_MASK; |
| 265 | memcpy_toio(iommu->mmio_base + MMIO_EXCL_BASE_OFFSET, |
| 266 | &entry, sizeof(entry)); |
| 267 | |
| 268 | entry = limit; |
| 269 | memcpy_toio(iommu->mmio_base + MMIO_EXCL_LIMIT_OFFSET, |
| 270 | &entry, sizeof(entry)); |
| 271 | } |
| 272 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 273 | /* Programs the physical address of the device table into the IOMMU hardware */ |
Jan Beulich | 6b7f000 | 2012-03-08 08:58:13 +0000 | [diff] [blame] | 274 | static void iommu_set_device_table(struct amd_iommu *iommu) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 275 | { |
Andreas Herrmann | f609891 | 2008-10-16 16:27:36 +0200 | [diff] [blame] | 276 | u64 entry; |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 277 | |
| 278 | BUG_ON(iommu->mmio_base == NULL); |
| 279 | |
| 280 | entry = virt_to_phys(amd_iommu_dev_table); |
| 281 | entry |= (dev_table_size >> 12) - 1; |
| 282 | memcpy_toio(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET, |
| 283 | &entry, sizeof(entry)); |
| 284 | } |
| 285 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 286 | /* Generic functions to enable/disable certain features of the IOMMU. */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 287 | static void iommu_feature_enable(struct amd_iommu *iommu, u8 bit) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 288 | { |
| 289 | u32 ctrl; |
| 290 | |
| 291 | ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); |
| 292 | ctrl |= (1 << bit); |
| 293 | writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); |
| 294 | } |
| 295 | |
Joerg Roedel | ca020711 | 2009-10-28 18:02:26 +0100 | [diff] [blame] | 296 | static void iommu_feature_disable(struct amd_iommu *iommu, u8 bit) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 297 | { |
| 298 | u32 ctrl; |
| 299 | |
Joerg Roedel | 199d0d5 | 2008-09-17 16:45:59 +0200 | [diff] [blame] | 300 | ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 301 | ctrl &= ~(1 << bit); |
| 302 | writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); |
| 303 | } |
| 304 | |
Joerg Roedel | 1456e9d | 2011-12-22 14:51:53 +0100 | [diff] [blame] | 305 | static void iommu_set_inv_tlb_timeout(struct amd_iommu *iommu, int timeout) |
| 306 | { |
| 307 | u32 ctrl; |
| 308 | |
| 309 | ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); |
| 310 | ctrl &= ~CTRL_INV_TO_MASK; |
| 311 | ctrl |= (timeout << CONTROL_INV_TIMEOUT) & CTRL_INV_TO_MASK; |
| 312 | writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); |
| 313 | } |
| 314 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 315 | /* Function to enable the hardware */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 316 | static void iommu_enable(struct amd_iommu *iommu) |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 317 | { |
Joerg Roedel | d99ddec | 2011-04-11 11:03:18 +0200 | [diff] [blame] | 318 | static const char * const feat_str[] = { |
| 319 | "PreF", "PPR", "X2APIC", "NX", "GT", "[5]", |
| 320 | "IA", "GA", "HE", "PC", NULL |
| 321 | }; |
| 322 | int i; |
| 323 | |
| 324 | printk(KERN_INFO "AMD-Vi: Enabling IOMMU at %s cap 0x%hx", |
Joerg Roedel | a4e267c | 2008-12-10 20:04:18 +0100 | [diff] [blame] | 325 | dev_name(&iommu->dev->dev), iommu->cap_ptr); |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 326 | |
Joerg Roedel | d99ddec | 2011-04-11 11:03:18 +0200 | [diff] [blame] | 327 | if (iommu->cap & (1 << IOMMU_CAP_EFR)) { |
| 328 | printk(KERN_CONT " extended features: "); |
| 329 | for (i = 0; feat_str[i]; ++i) |
| 330 | if (iommu_feature(iommu, (1ULL << i))) |
| 331 | printk(KERN_CONT " %s", feat_str[i]); |
| 332 | } |
| 333 | printk(KERN_CONT "\n"); |
| 334 | |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 335 | iommu_feature_enable(iommu, CONTROL_IOMMU_EN); |
Joerg Roedel | b2026aa | 2008-06-26 21:27:44 +0200 | [diff] [blame] | 336 | } |
| 337 | |
Joerg Roedel | 92ac432 | 2009-05-19 19:06:27 +0200 | [diff] [blame] | 338 | static void iommu_disable(struct amd_iommu *iommu) |
Joerg Roedel | 126c52b | 2008-09-09 16:47:35 +0200 | [diff] [blame] | 339 | { |
Chris Wright | a8c485b | 2009-06-15 15:53:45 +0200 | [diff] [blame] | 340 | /* Disable command buffer */ |
| 341 | iommu_feature_disable(iommu, CONTROL_CMDBUF_EN); |
| 342 | |
| 343 | /* Disable event logging and event interrupts */ |
| 344 | iommu_feature_disable(iommu, CONTROL_EVT_INT_EN); |
| 345 | iommu_feature_disable(iommu, CONTROL_EVT_LOG_EN); |
| 346 | |
| 347 | /* Disable IOMMU hardware itself */ |
Joerg Roedel | 92ac432 | 2009-05-19 19:06:27 +0200 | [diff] [blame] | 348 | iommu_feature_disable(iommu, CONTROL_IOMMU_EN); |
Joerg Roedel | 126c52b | 2008-09-09 16:47:35 +0200 | [diff] [blame] | 349 | } |
| 350 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 351 | /* |
| 352 | * mapping and unmapping functions for the IOMMU MMIO space. Each AMD IOMMU in |
| 353 | * the system has one. |
| 354 | */ |
Joerg Roedel | 98f1ad2 | 2012-07-06 13:28:37 +0200 | [diff] [blame^] | 355 | static u8 __iomem * __init iommu_map_mmio_space(u64 address) |
Joerg Roedel | 6c56747 | 2008-06-26 21:27:43 +0200 | [diff] [blame] | 356 | { |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 357 | if (!request_mem_region(address, MMIO_REGION_LENGTH, "amd_iommu")) { |
| 358 | pr_err("AMD-Vi: Can not reserve memory region %llx for mmio\n", |
| 359 | address); |
| 360 | pr_err("AMD-Vi: This is a BIOS bug. Please contact your hardware vendor\n"); |
Joerg Roedel | 6c56747 | 2008-06-26 21:27:43 +0200 | [diff] [blame] | 361 | return NULL; |
Joerg Roedel | e82752d | 2010-05-28 14:26:48 +0200 | [diff] [blame] | 362 | } |
Joerg Roedel | 6c56747 | 2008-06-26 21:27:43 +0200 | [diff] [blame] | 363 | |
Joerg Roedel | 98f1ad2 | 2012-07-06 13:28:37 +0200 | [diff] [blame^] | 364 | return (u8 __iomem *)ioremap_nocache(address, MMIO_REGION_LENGTH); |
Joerg Roedel | 6c56747 | 2008-06-26 21:27:43 +0200 | [diff] [blame] | 365 | } |
| 366 | |
| 367 | static void __init iommu_unmap_mmio_space(struct amd_iommu *iommu) |
| 368 | { |
| 369 | if (iommu->mmio_base) |
| 370 | iounmap(iommu->mmio_base); |
| 371 | release_mem_region(iommu->mmio_phys, MMIO_REGION_LENGTH); |
| 372 | } |
| 373 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 374 | /**************************************************************************** |
| 375 | * |
| 376 | * The functions below belong to the first pass of AMD IOMMU ACPI table |
| 377 | * parsing. In this pass we try to find out the highest device id this |
| 378 | * code has to handle. Upon this information the size of the shared data |
| 379 | * structures is determined later. |
| 380 | * |
| 381 | ****************************************************************************/ |
| 382 | |
| 383 | /* |
Joerg Roedel | b514e55 | 2008-09-17 17:14:27 +0200 | [diff] [blame] | 384 | * This function calculates the length of a given IVHD entry |
| 385 | */ |
| 386 | static inline int ivhd_entry_length(u8 *ivhd) |
| 387 | { |
| 388 | return 0x04 << (*ivhd >> 6); |
| 389 | } |
| 390 | |
| 391 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 392 | * This function reads the last device id the IOMMU has to handle from the PCI |
| 393 | * capability header for this IOMMU |
| 394 | */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 395 | static int __init find_last_devid_on_pci(int bus, int dev, int fn, int cap_ptr) |
| 396 | { |
| 397 | u32 cap; |
| 398 | |
| 399 | cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET); |
Joerg Roedel | d591b0a | 2008-07-11 17:14:35 +0200 | [diff] [blame] | 400 | update_last_devid(calc_devid(MMIO_GET_BUS(cap), MMIO_GET_LD(cap))); |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 401 | |
| 402 | return 0; |
| 403 | } |
| 404 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 405 | /* |
| 406 | * After reading the highest device id from the IOMMU PCI capability header |
| 407 | * this function looks if there is a higher device id defined in the ACPI table |
| 408 | */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 409 | static int __init find_last_devid_from_ivhd(struct ivhd_header *h) |
| 410 | { |
| 411 | u8 *p = (void *)h, *end = (void *)h; |
| 412 | struct ivhd_entry *dev; |
| 413 | |
| 414 | p += sizeof(*h); |
| 415 | end += h->length; |
| 416 | |
| 417 | find_last_devid_on_pci(PCI_BUS(h->devid), |
| 418 | PCI_SLOT(h->devid), |
| 419 | PCI_FUNC(h->devid), |
| 420 | h->cap_ptr); |
| 421 | |
| 422 | while (p < end) { |
| 423 | dev = (struct ivhd_entry *)p; |
| 424 | switch (dev->type) { |
| 425 | case IVHD_DEV_SELECT: |
| 426 | case IVHD_DEV_RANGE_END: |
| 427 | case IVHD_DEV_ALIAS: |
| 428 | case IVHD_DEV_EXT_SELECT: |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 429 | /* all the above subfield types refer to device ids */ |
Joerg Roedel | 208ec8c | 2008-07-11 17:14:24 +0200 | [diff] [blame] | 430 | update_last_devid(dev->devid); |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 431 | break; |
| 432 | default: |
| 433 | break; |
| 434 | } |
Joerg Roedel | b514e55 | 2008-09-17 17:14:27 +0200 | [diff] [blame] | 435 | p += ivhd_entry_length(p); |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 436 | } |
| 437 | |
| 438 | WARN_ON(p != end); |
| 439 | |
| 440 | return 0; |
| 441 | } |
| 442 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 443 | /* |
| 444 | * Iterate over all IVHD entries in the ACPI table and find the highest device |
| 445 | * id which we need to handle. This is the first of three functions which parse |
| 446 | * the ACPI table. So we check the checksum here. |
| 447 | */ |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 448 | static int __init find_last_devid_acpi(struct acpi_table_header *table) |
| 449 | { |
| 450 | int i; |
| 451 | u8 checksum = 0, *p = (u8 *)table, *end = (u8 *)table; |
| 452 | struct ivhd_header *h; |
| 453 | |
| 454 | /* |
| 455 | * Validate checksum here so we don't need to do it when |
| 456 | * we actually parse the table |
| 457 | */ |
| 458 | for (i = 0; i < table->length; ++i) |
| 459 | checksum += p[i]; |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 460 | if (checksum != 0) { |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 461 | /* ACPI table corrupt */ |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 462 | amd_iommu_init_err = -ENODEV; |
| 463 | return 0; |
| 464 | } |
Joerg Roedel | 3e8064b | 2008-06-26 21:27:41 +0200 | [diff] [blame] | 465 | |
| 466 | p += IVRS_HEADER_LENGTH; |
| 467 | |
| 468 | end += table->length; |
| 469 | while (p < end) { |
| 470 | h = (struct ivhd_header *)p; |
| 471 | switch (h->type) { |
| 472 | case ACPI_IVHD_TYPE: |
| 473 | find_last_devid_from_ivhd(h); |
| 474 | break; |
| 475 | default: |
| 476 | break; |
| 477 | } |
| 478 | p += h->length; |
| 479 | } |
| 480 | WARN_ON(p != end); |
| 481 | |
| 482 | return 0; |
| 483 | } |
| 484 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 485 | /**************************************************************************** |
| 486 | * |
| 487 | * The following functions belong the the code path which parses the ACPI table |
| 488 | * the second time. In this ACPI parsing iteration we allocate IOMMU specific |
| 489 | * data structures, initialize the device/alias/rlookup table and also |
| 490 | * basically initialize the hardware. |
| 491 | * |
| 492 | ****************************************************************************/ |
| 493 | |
| 494 | /* |
| 495 | * Allocates the command buffer. This buffer is per AMD IOMMU. We can |
| 496 | * write commands to that buffer later and the IOMMU will execute them |
| 497 | * asynchronously |
| 498 | */ |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 499 | static u8 * __init alloc_command_buffer(struct amd_iommu *iommu) |
| 500 | { |
Joerg Roedel | d0312b2 | 2008-07-11 17:14:29 +0200 | [diff] [blame] | 501 | u8 *cmd_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 502 | get_order(CMD_BUFFER_SIZE)); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 503 | |
| 504 | if (cmd_buf == NULL) |
| 505 | return NULL; |
| 506 | |
Chris Wright | 549c90d | 2010-04-02 18:27:53 -0700 | [diff] [blame] | 507 | iommu->cmd_buf_size = CMD_BUFFER_SIZE | CMD_BUFFER_UNINITIALIZED; |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 508 | |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 509 | return cmd_buf; |
| 510 | } |
| 511 | |
| 512 | /* |
Joerg Roedel | 93f1cc67 | 2009-09-03 14:50:20 +0200 | [diff] [blame] | 513 | * This function resets the command buffer if the IOMMU stopped fetching |
| 514 | * commands from it. |
| 515 | */ |
| 516 | void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu) |
| 517 | { |
| 518 | iommu_feature_disable(iommu, CONTROL_CMDBUF_EN); |
| 519 | |
| 520 | writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); |
| 521 | writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 522 | |
| 523 | iommu_feature_enable(iommu, CONTROL_CMDBUF_EN); |
| 524 | } |
| 525 | |
| 526 | /* |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 527 | * This function writes the command buffer address to the hardware and |
| 528 | * enables it. |
| 529 | */ |
| 530 | static void iommu_enable_command_buffer(struct amd_iommu *iommu) |
| 531 | { |
| 532 | u64 entry; |
| 533 | |
| 534 | BUG_ON(iommu->cmd_buf == NULL); |
| 535 | |
| 536 | entry = (u64)virt_to_phys(iommu->cmd_buf); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 537 | entry |= MMIO_CMD_SIZE_512; |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 538 | |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 539 | memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 540 | &entry, sizeof(entry)); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 541 | |
Joerg Roedel | 93f1cc67 | 2009-09-03 14:50:20 +0200 | [diff] [blame] | 542 | amd_iommu_reset_cmd_buffer(iommu); |
Chris Wright | 549c90d | 2010-04-02 18:27:53 -0700 | [diff] [blame] | 543 | iommu->cmd_buf_size &= ~(CMD_BUFFER_UNINITIALIZED); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 544 | } |
| 545 | |
| 546 | static void __init free_command_buffer(struct amd_iommu *iommu) |
| 547 | { |
Joerg Roedel | 23c1713 | 2008-09-17 17:18:17 +0200 | [diff] [blame] | 548 | free_pages((unsigned long)iommu->cmd_buf, |
Chris Wright | 549c90d | 2010-04-02 18:27:53 -0700 | [diff] [blame] | 549 | get_order(iommu->cmd_buf_size & ~(CMD_BUFFER_UNINITIALIZED))); |
Joerg Roedel | b36ca91 | 2008-06-26 21:27:45 +0200 | [diff] [blame] | 550 | } |
| 551 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 552 | /* allocates the memory where the IOMMU will log its events to */ |
| 553 | static u8 * __init alloc_event_buffer(struct amd_iommu *iommu) |
| 554 | { |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 555 | iommu->evt_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
| 556 | get_order(EVT_BUFFER_SIZE)); |
| 557 | |
| 558 | if (iommu->evt_buf == NULL) |
| 559 | return NULL; |
| 560 | |
Joerg Roedel | 1bc6f83 | 2009-07-02 18:32:05 +0200 | [diff] [blame] | 561 | iommu->evt_buf_size = EVT_BUFFER_SIZE; |
| 562 | |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 563 | return iommu->evt_buf; |
| 564 | } |
| 565 | |
| 566 | static void iommu_enable_event_buffer(struct amd_iommu *iommu) |
| 567 | { |
| 568 | u64 entry; |
| 569 | |
| 570 | BUG_ON(iommu->evt_buf == NULL); |
| 571 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 572 | entry = (u64)virt_to_phys(iommu->evt_buf) | EVT_LEN_MASK; |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 573 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 574 | memcpy_toio(iommu->mmio_base + MMIO_EVT_BUF_OFFSET, |
| 575 | &entry, sizeof(entry)); |
| 576 | |
Joerg Roedel | 09067207 | 2009-06-15 16:06:48 +0200 | [diff] [blame] | 577 | /* set head and tail to zero manually */ |
| 578 | writel(0x00, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 579 | writel(0x00, iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); |
| 580 | |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 581 | iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN); |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 582 | } |
| 583 | |
| 584 | static void __init free_event_buffer(struct amd_iommu *iommu) |
| 585 | { |
| 586 | free_pages((unsigned long)iommu->evt_buf, get_order(EVT_BUFFER_SIZE)); |
| 587 | } |
| 588 | |
Joerg Roedel | 1a29ac0 | 2011-11-10 15:41:40 +0100 | [diff] [blame] | 589 | /* allocates the memory where the IOMMU will log its events to */ |
| 590 | static u8 * __init alloc_ppr_log(struct amd_iommu *iommu) |
| 591 | { |
| 592 | iommu->ppr_log = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
| 593 | get_order(PPR_LOG_SIZE)); |
| 594 | |
| 595 | if (iommu->ppr_log == NULL) |
| 596 | return NULL; |
| 597 | |
| 598 | return iommu->ppr_log; |
| 599 | } |
| 600 | |
| 601 | static void iommu_enable_ppr_log(struct amd_iommu *iommu) |
| 602 | { |
| 603 | u64 entry; |
| 604 | |
| 605 | if (iommu->ppr_log == NULL) |
| 606 | return; |
| 607 | |
| 608 | entry = (u64)virt_to_phys(iommu->ppr_log) | PPR_LOG_SIZE_512; |
| 609 | |
| 610 | memcpy_toio(iommu->mmio_base + MMIO_PPR_LOG_OFFSET, |
| 611 | &entry, sizeof(entry)); |
| 612 | |
| 613 | /* set head and tail to zero manually */ |
| 614 | writel(0x00, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
| 615 | writel(0x00, iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); |
| 616 | |
| 617 | iommu_feature_enable(iommu, CONTROL_PPFLOG_EN); |
| 618 | iommu_feature_enable(iommu, CONTROL_PPR_EN); |
| 619 | } |
| 620 | |
| 621 | static void __init free_ppr_log(struct amd_iommu *iommu) |
| 622 | { |
| 623 | if (iommu->ppr_log == NULL) |
| 624 | return; |
| 625 | |
| 626 | free_pages((unsigned long)iommu->ppr_log, get_order(PPR_LOG_SIZE)); |
| 627 | } |
| 628 | |
Joerg Roedel | cbc33a9 | 2011-11-25 11:41:31 +0100 | [diff] [blame] | 629 | static void iommu_enable_gt(struct amd_iommu *iommu) |
| 630 | { |
| 631 | if (!iommu_feature(iommu, FEATURE_GT)) |
| 632 | return; |
| 633 | |
| 634 | iommu_feature_enable(iommu, CONTROL_GT_EN); |
| 635 | } |
| 636 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 637 | /* sets a specific bit in the device table entry. */ |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 638 | static void set_dev_entry_bit(u16 devid, u8 bit) |
| 639 | { |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 640 | int i = (bit >> 6) & 0x03; |
| 641 | int _bit = bit & 0x3f; |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 642 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 643 | amd_iommu_dev_table[devid].data[i] |= (1UL << _bit); |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 644 | } |
| 645 | |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 646 | static int get_dev_entry_bit(u16 devid, u8 bit) |
| 647 | { |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 648 | int i = (bit >> 6) & 0x03; |
| 649 | int _bit = bit & 0x3f; |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 650 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 651 | return (amd_iommu_dev_table[devid].data[i] & (1UL << _bit)) >> _bit; |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 652 | } |
| 653 | |
| 654 | |
| 655 | void amd_iommu_apply_erratum_63(u16 devid) |
| 656 | { |
| 657 | int sysmgt; |
| 658 | |
| 659 | sysmgt = get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1) | |
| 660 | (get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2) << 1); |
| 661 | |
| 662 | if (sysmgt == 0x01) |
| 663 | set_dev_entry_bit(devid, DEV_ENTRY_IW); |
| 664 | } |
| 665 | |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 666 | /* Writes the specific IOMMU for a device into the rlookup table */ |
| 667 | static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) |
| 668 | { |
| 669 | amd_iommu_rlookup_table[devid] = iommu; |
| 670 | } |
| 671 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 672 | /* |
| 673 | * This function takes the device specific flags read from the ACPI |
| 674 | * table and sets up the device table entry with that information |
| 675 | */ |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 676 | static void __init set_dev_entry_from_acpi(struct amd_iommu *iommu, |
| 677 | u16 devid, u32 flags, u32 ext_flags) |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 678 | { |
| 679 | if (flags & ACPI_DEVFLAG_INITPASS) |
| 680 | set_dev_entry_bit(devid, DEV_ENTRY_INIT_PASS); |
| 681 | if (flags & ACPI_DEVFLAG_EXTINT) |
| 682 | set_dev_entry_bit(devid, DEV_ENTRY_EINT_PASS); |
| 683 | if (flags & ACPI_DEVFLAG_NMI) |
| 684 | set_dev_entry_bit(devid, DEV_ENTRY_NMI_PASS); |
| 685 | if (flags & ACPI_DEVFLAG_SYSMGT1) |
| 686 | set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1); |
| 687 | if (flags & ACPI_DEVFLAG_SYSMGT2) |
| 688 | set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2); |
| 689 | if (flags & ACPI_DEVFLAG_LINT0) |
| 690 | set_dev_entry_bit(devid, DEV_ENTRY_LINT0_PASS); |
| 691 | if (flags & ACPI_DEVFLAG_LINT1) |
| 692 | set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS); |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 693 | |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 694 | amd_iommu_apply_erratum_63(devid); |
| 695 | |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 696 | set_iommu_for_device(iommu, devid); |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 697 | } |
| 698 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 699 | /* |
| 700 | * Reads the device exclusion range from ACPI and initialize IOMMU with |
| 701 | * it |
| 702 | */ |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 703 | static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m) |
| 704 | { |
| 705 | struct amd_iommu *iommu = amd_iommu_rlookup_table[devid]; |
| 706 | |
| 707 | if (!(m->flags & IVMD_FLAG_EXCL_RANGE)) |
| 708 | return; |
| 709 | |
| 710 | if (iommu) { |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 711 | /* |
| 712 | * We only can configure exclusion ranges per IOMMU, not |
| 713 | * per device. But we can enable the exclusion range per |
| 714 | * device. This is done here |
| 715 | */ |
Joerg Roedel | 3566b77 | 2008-06-26 21:27:46 +0200 | [diff] [blame] | 716 | set_dev_entry_bit(m->devid, DEV_ENTRY_EX); |
| 717 | iommu->exclusion_start = m->range_start; |
| 718 | iommu->exclusion_length = m->range_length; |
| 719 | } |
| 720 | } |
| 721 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 722 | /* |
| 723 | * This function reads some important data from the IOMMU PCI space and |
| 724 | * initializes the driver data structure with it. It reads the hardware |
| 725 | * capabilities and the first/last device entries |
| 726 | */ |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 727 | static void __init init_iommu_from_pci(struct amd_iommu *iommu) |
| 728 | { |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 729 | int cap_ptr = iommu->cap_ptr; |
Joerg Roedel | d99ddec | 2011-04-11 11:03:18 +0200 | [diff] [blame] | 730 | u32 range, misc, low, high; |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 731 | int i, j; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 732 | |
Joerg Roedel | 3eaf28a | 2008-09-08 15:55:10 +0200 | [diff] [blame] | 733 | pci_read_config_dword(iommu->dev, cap_ptr + MMIO_CAP_HDR_OFFSET, |
| 734 | &iommu->cap); |
| 735 | pci_read_config_dword(iommu->dev, cap_ptr + MMIO_RANGE_OFFSET, |
| 736 | &range); |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 737 | pci_read_config_dword(iommu->dev, cap_ptr + MMIO_MISC_OFFSET, |
| 738 | &misc); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 739 | |
Joerg Roedel | d591b0a | 2008-07-11 17:14:35 +0200 | [diff] [blame] | 740 | iommu->first_device = calc_devid(MMIO_GET_BUS(range), |
| 741 | MMIO_GET_FD(range)); |
| 742 | iommu->last_device = calc_devid(MMIO_GET_BUS(range), |
| 743 | MMIO_GET_LD(range)); |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 744 | iommu->evt_msi_num = MMIO_MSI_NUM(misc); |
Joerg Roedel | 4c894f4 | 2010-09-23 15:15:19 +0200 | [diff] [blame] | 745 | |
Joerg Roedel | 60f723b | 2011-04-05 12:50:24 +0200 | [diff] [blame] | 746 | if (!(iommu->cap & (1 << IOMMU_CAP_IOTLB))) |
| 747 | amd_iommu_iotlb_sup = false; |
| 748 | |
Joerg Roedel | d99ddec | 2011-04-11 11:03:18 +0200 | [diff] [blame] | 749 | /* read extended feature bits */ |
| 750 | low = readl(iommu->mmio_base + MMIO_EXT_FEATURES); |
| 751 | high = readl(iommu->mmio_base + MMIO_EXT_FEATURES + 4); |
| 752 | |
| 753 | iommu->features = ((u64)high << 32) | low; |
| 754 | |
Joerg Roedel | 62f71ab | 2011-11-10 14:41:57 +0100 | [diff] [blame] | 755 | if (iommu_feature(iommu, FEATURE_GT)) { |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 756 | int glxval; |
Joerg Roedel | 62f71ab | 2011-11-10 14:41:57 +0100 | [diff] [blame] | 757 | u32 pasids; |
| 758 | u64 shift; |
| 759 | |
| 760 | shift = iommu->features & FEATURE_PASID_MASK; |
| 761 | shift >>= FEATURE_PASID_SHIFT; |
| 762 | pasids = (1 << shift); |
| 763 | |
| 764 | amd_iommu_max_pasids = min(amd_iommu_max_pasids, pasids); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 765 | |
| 766 | glxval = iommu->features & FEATURE_GLXVAL_MASK; |
| 767 | glxval >>= FEATURE_GLXVAL_SHIFT; |
| 768 | |
| 769 | if (amd_iommu_max_glx_val == -1) |
| 770 | amd_iommu_max_glx_val = glxval; |
| 771 | else |
| 772 | amd_iommu_max_glx_val = min(amd_iommu_max_glx_val, glxval); |
Joerg Roedel | 62f71ab | 2011-11-10 14:41:57 +0100 | [diff] [blame] | 773 | } |
| 774 | |
Joerg Roedel | 400a28a | 2011-11-28 15:11:02 +0100 | [diff] [blame] | 775 | if (iommu_feature(iommu, FEATURE_GT) && |
| 776 | iommu_feature(iommu, FEATURE_PPR)) { |
| 777 | iommu->is_iommu_v2 = true; |
| 778 | amd_iommu_v2_present = true; |
| 779 | } |
| 780 | |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 781 | if (!is_rd890_iommu(iommu->dev)) |
| 782 | return; |
| 783 | |
| 784 | /* |
| 785 | * Some rd890 systems may not be fully reconfigured by the BIOS, so |
| 786 | * it's necessary for us to store this information so it can be |
| 787 | * reprogrammed on resume |
| 788 | */ |
| 789 | |
| 790 | pci_read_config_dword(iommu->dev, iommu->cap_ptr + 4, |
| 791 | &iommu->stored_addr_lo); |
| 792 | pci_read_config_dword(iommu->dev, iommu->cap_ptr + 8, |
| 793 | &iommu->stored_addr_hi); |
| 794 | |
| 795 | /* Low bit locks writes to configuration space */ |
| 796 | iommu->stored_addr_lo &= ~1; |
| 797 | |
| 798 | for (i = 0; i < 6; i++) |
| 799 | for (j = 0; j < 0x12; j++) |
| 800 | iommu->stored_l1[i][j] = iommu_read_l1(iommu, i, j); |
| 801 | |
| 802 | for (i = 0; i < 0x83; i++) |
| 803 | iommu->stored_l2[i] = iommu_read_l2(iommu, i); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 804 | } |
| 805 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 806 | /* |
| 807 | * Takes a pointer to an AMD IOMMU entry in the ACPI table and |
| 808 | * initializes the hardware and our data structures with it. |
| 809 | */ |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 810 | static void __init init_iommu_from_acpi(struct amd_iommu *iommu, |
| 811 | struct ivhd_header *h) |
| 812 | { |
| 813 | u8 *p = (u8 *)h; |
| 814 | u8 *end = p, flags = 0; |
Joerg Roedel | 0de66d5 | 2011-06-06 16:04:02 +0200 | [diff] [blame] | 815 | u16 devid = 0, devid_start = 0, devid_to = 0; |
| 816 | u32 dev_i, ext_flags = 0; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 817 | bool alias = false; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 818 | struct ivhd_entry *e; |
| 819 | |
| 820 | /* |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame] | 821 | * First save the recommended feature enable bits from ACPI |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 822 | */ |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame] | 823 | iommu->acpi_flags = h->flags; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 824 | |
| 825 | /* |
| 826 | * Done. Now parse the device entries |
| 827 | */ |
| 828 | p += sizeof(struct ivhd_header); |
| 829 | end += h->length; |
| 830 | |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 831 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 832 | while (p < end) { |
| 833 | e = (struct ivhd_entry *)p; |
| 834 | switch (e->type) { |
| 835 | case IVHD_DEV_ALL: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 836 | |
| 837 | DUMP_printk(" DEV_ALL\t\t\t first devid: %02x:%02x.%x" |
| 838 | " last device %02x:%02x.%x flags: %02x\n", |
| 839 | PCI_BUS(iommu->first_device), |
| 840 | PCI_SLOT(iommu->first_device), |
| 841 | PCI_FUNC(iommu->first_device), |
| 842 | PCI_BUS(iommu->last_device), |
| 843 | PCI_SLOT(iommu->last_device), |
| 844 | PCI_FUNC(iommu->last_device), |
| 845 | e->flags); |
| 846 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 847 | for (dev_i = iommu->first_device; |
| 848 | dev_i <= iommu->last_device; ++dev_i) |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 849 | set_dev_entry_from_acpi(iommu, dev_i, |
| 850 | e->flags, 0); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 851 | break; |
| 852 | case IVHD_DEV_SELECT: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 853 | |
| 854 | DUMP_printk(" DEV_SELECT\t\t\t devid: %02x:%02x.%x " |
| 855 | "flags: %02x\n", |
| 856 | PCI_BUS(e->devid), |
| 857 | PCI_SLOT(e->devid), |
| 858 | PCI_FUNC(e->devid), |
| 859 | e->flags); |
| 860 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 861 | devid = e->devid; |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 862 | set_dev_entry_from_acpi(iommu, devid, e->flags, 0); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 863 | break; |
| 864 | case IVHD_DEV_SELECT_RANGE_START: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 865 | |
| 866 | DUMP_printk(" DEV_SELECT_RANGE_START\t " |
| 867 | "devid: %02x:%02x.%x flags: %02x\n", |
| 868 | PCI_BUS(e->devid), |
| 869 | PCI_SLOT(e->devid), |
| 870 | PCI_FUNC(e->devid), |
| 871 | e->flags); |
| 872 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 873 | devid_start = e->devid; |
| 874 | flags = e->flags; |
| 875 | ext_flags = 0; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 876 | alias = false; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 877 | break; |
| 878 | case IVHD_DEV_ALIAS: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 879 | |
| 880 | DUMP_printk(" DEV_ALIAS\t\t\t devid: %02x:%02x.%x " |
| 881 | "flags: %02x devid_to: %02x:%02x.%x\n", |
| 882 | PCI_BUS(e->devid), |
| 883 | PCI_SLOT(e->devid), |
| 884 | PCI_FUNC(e->devid), |
| 885 | e->flags, |
| 886 | PCI_BUS(e->ext >> 8), |
| 887 | PCI_SLOT(e->ext >> 8), |
| 888 | PCI_FUNC(e->ext >> 8)); |
| 889 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 890 | devid = e->devid; |
| 891 | devid_to = e->ext >> 8; |
Joerg Roedel | 7a6a3a0 | 2009-07-02 12:23:23 +0200 | [diff] [blame] | 892 | set_dev_entry_from_acpi(iommu, devid , e->flags, 0); |
Neil Turton | 7455aab | 2009-05-14 14:08:11 +0100 | [diff] [blame] | 893 | set_dev_entry_from_acpi(iommu, devid_to, e->flags, 0); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 894 | amd_iommu_alias_table[devid] = devid_to; |
| 895 | break; |
| 896 | case IVHD_DEV_ALIAS_RANGE: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 897 | |
| 898 | DUMP_printk(" DEV_ALIAS_RANGE\t\t " |
| 899 | "devid: %02x:%02x.%x flags: %02x " |
| 900 | "devid_to: %02x:%02x.%x\n", |
| 901 | PCI_BUS(e->devid), |
| 902 | PCI_SLOT(e->devid), |
| 903 | PCI_FUNC(e->devid), |
| 904 | e->flags, |
| 905 | PCI_BUS(e->ext >> 8), |
| 906 | PCI_SLOT(e->ext >> 8), |
| 907 | PCI_FUNC(e->ext >> 8)); |
| 908 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 909 | devid_start = e->devid; |
| 910 | flags = e->flags; |
| 911 | devid_to = e->ext >> 8; |
| 912 | ext_flags = 0; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 913 | alias = true; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 914 | break; |
| 915 | case IVHD_DEV_EXT_SELECT: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 916 | |
| 917 | DUMP_printk(" DEV_EXT_SELECT\t\t devid: %02x:%02x.%x " |
| 918 | "flags: %02x ext: %08x\n", |
| 919 | PCI_BUS(e->devid), |
| 920 | PCI_SLOT(e->devid), |
| 921 | PCI_FUNC(e->devid), |
| 922 | e->flags, e->ext); |
| 923 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 924 | devid = e->devid; |
Joerg Roedel | 5ff4789 | 2008-07-14 20:11:18 +0200 | [diff] [blame] | 925 | set_dev_entry_from_acpi(iommu, devid, e->flags, |
| 926 | e->ext); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 927 | break; |
| 928 | case IVHD_DEV_EXT_SELECT_RANGE: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 929 | |
| 930 | DUMP_printk(" DEV_EXT_SELECT_RANGE\t devid: " |
| 931 | "%02x:%02x.%x flags: %02x ext: %08x\n", |
| 932 | PCI_BUS(e->devid), |
| 933 | PCI_SLOT(e->devid), |
| 934 | PCI_FUNC(e->devid), |
| 935 | e->flags, e->ext); |
| 936 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 937 | devid_start = e->devid; |
| 938 | flags = e->flags; |
| 939 | ext_flags = e->ext; |
Joerg Roedel | 58a3bee | 2008-07-11 17:14:30 +0200 | [diff] [blame] | 940 | alias = false; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 941 | break; |
| 942 | case IVHD_DEV_RANGE_END: |
Joerg Roedel | 42a698f | 2009-05-20 15:41:28 +0200 | [diff] [blame] | 943 | |
| 944 | DUMP_printk(" DEV_RANGE_END\t\t devid: %02x:%02x.%x\n", |
| 945 | PCI_BUS(e->devid), |
| 946 | PCI_SLOT(e->devid), |
| 947 | PCI_FUNC(e->devid)); |
| 948 | |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 949 | devid = e->devid; |
| 950 | for (dev_i = devid_start; dev_i <= devid; ++dev_i) { |
Joerg Roedel | 7a6a3a0 | 2009-07-02 12:23:23 +0200 | [diff] [blame] | 951 | if (alias) { |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 952 | amd_iommu_alias_table[dev_i] = devid_to; |
Joerg Roedel | 7a6a3a0 | 2009-07-02 12:23:23 +0200 | [diff] [blame] | 953 | set_dev_entry_from_acpi(iommu, |
| 954 | devid_to, flags, ext_flags); |
| 955 | } |
| 956 | set_dev_entry_from_acpi(iommu, dev_i, |
| 957 | flags, ext_flags); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 958 | } |
| 959 | break; |
| 960 | default: |
| 961 | break; |
| 962 | } |
| 963 | |
Joerg Roedel | b514e55 | 2008-09-17 17:14:27 +0200 | [diff] [blame] | 964 | p += ivhd_entry_length(p); |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 965 | } |
| 966 | } |
| 967 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 968 | /* Initializes the device->iommu mapping for the driver */ |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 969 | static int __init init_iommu_devices(struct amd_iommu *iommu) |
| 970 | { |
Joerg Roedel | 0de66d5 | 2011-06-06 16:04:02 +0200 | [diff] [blame] | 971 | u32 i; |
Joerg Roedel | 5d0c8e4 | 2008-06-26 21:27:47 +0200 | [diff] [blame] | 972 | |
| 973 | for (i = iommu->first_device; i <= iommu->last_device; ++i) |
| 974 | set_iommu_for_device(iommu, i); |
| 975 | |
| 976 | return 0; |
| 977 | } |
| 978 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 979 | static void __init free_iommu_one(struct amd_iommu *iommu) |
| 980 | { |
| 981 | free_command_buffer(iommu); |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 982 | free_event_buffer(iommu); |
Joerg Roedel | 1a29ac0 | 2011-11-10 15:41:40 +0100 | [diff] [blame] | 983 | free_ppr_log(iommu); |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 984 | iommu_unmap_mmio_space(iommu); |
| 985 | } |
| 986 | |
| 987 | static void __init free_iommu_all(void) |
| 988 | { |
| 989 | struct amd_iommu *iommu, *next; |
| 990 | |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 991 | for_each_iommu_safe(iommu, next) { |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 992 | list_del(&iommu->list); |
| 993 | free_iommu_one(iommu); |
| 994 | kfree(iommu); |
| 995 | } |
| 996 | } |
| 997 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 998 | /* |
| 999 | * This function clues the initialization function for one IOMMU |
| 1000 | * together and also allocates the command buffer and programs the |
| 1001 | * hardware. It does NOT enable the IOMMU. This is done afterwards. |
| 1002 | */ |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1003 | static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h) |
| 1004 | { |
| 1005 | spin_lock_init(&iommu->lock); |
Joerg Roedel | bb52777 | 2009-11-20 14:31:51 +0100 | [diff] [blame] | 1006 | |
| 1007 | /* Add IOMMU to internal data structures */ |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1008 | list_add_tail(&iommu->list, &amd_iommu_list); |
Joerg Roedel | bb52777 | 2009-11-20 14:31:51 +0100 | [diff] [blame] | 1009 | iommu->index = amd_iommus_present++; |
| 1010 | |
| 1011 | if (unlikely(iommu->index >= MAX_IOMMUS)) { |
| 1012 | WARN(1, "AMD-Vi: System has more IOMMUs than supported by this driver\n"); |
| 1013 | return -ENOSYS; |
| 1014 | } |
| 1015 | |
| 1016 | /* Index is fine - add IOMMU to the array */ |
| 1017 | amd_iommus[iommu->index] = iommu; |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1018 | |
| 1019 | /* |
| 1020 | * Copy data from ACPI table entry to the iommu struct |
| 1021 | */ |
Joerg Roedel | 3eaf28a | 2008-09-08 15:55:10 +0200 | [diff] [blame] | 1022 | iommu->dev = pci_get_bus_and_slot(PCI_BUS(h->devid), h->devid & 0xff); |
| 1023 | if (!iommu->dev) |
| 1024 | return 1; |
| 1025 | |
Joerg Roedel | c1bf94e | 2012-05-31 17:38:11 +0200 | [diff] [blame] | 1026 | iommu->root_pdev = pci_get_bus_and_slot(iommu->dev->bus->number, |
| 1027 | PCI_DEVFN(0, 0)); |
| 1028 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1029 | iommu->cap_ptr = h->cap_ptr; |
Joerg Roedel | ee893c2 | 2008-09-08 14:48:04 +0200 | [diff] [blame] | 1030 | iommu->pci_seg = h->pci_seg; |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1031 | iommu->mmio_phys = h->mmio_phys; |
| 1032 | iommu->mmio_base = iommu_map_mmio_space(h->mmio_phys); |
| 1033 | if (!iommu->mmio_base) |
| 1034 | return -ENOMEM; |
| 1035 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1036 | iommu->cmd_buf = alloc_command_buffer(iommu); |
| 1037 | if (!iommu->cmd_buf) |
| 1038 | return -ENOMEM; |
| 1039 | |
Joerg Roedel | 335503e | 2008-09-05 14:29:07 +0200 | [diff] [blame] | 1040 | iommu->evt_buf = alloc_event_buffer(iommu); |
| 1041 | if (!iommu->evt_buf) |
| 1042 | return -ENOMEM; |
| 1043 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1044 | iommu->int_enabled = false; |
| 1045 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1046 | init_iommu_from_pci(iommu); |
| 1047 | init_iommu_from_acpi(iommu, h); |
| 1048 | init_iommu_devices(iommu); |
| 1049 | |
Joerg Roedel | 1a29ac0 | 2011-11-10 15:41:40 +0100 | [diff] [blame] | 1050 | if (iommu_feature(iommu, FEATURE_PPR)) { |
| 1051 | iommu->ppr_log = alloc_ppr_log(iommu); |
| 1052 | if (!iommu->ppr_log) |
| 1053 | return -ENOMEM; |
| 1054 | } |
| 1055 | |
Joerg Roedel | 318afd4 | 2009-11-23 18:32:38 +0100 | [diff] [blame] | 1056 | if (iommu->cap & (1UL << IOMMU_CAP_NPCACHE)) |
| 1057 | amd_iommu_np_cache = true; |
| 1058 | |
Ingo Molnar | 8a66712 | 2008-10-12 15:24:53 +0200 | [diff] [blame] | 1059 | return pci_enable_device(iommu->dev); |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1060 | } |
| 1061 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1062 | /* |
| 1063 | * Iterates over all IOMMU entries in the ACPI table, allocates the |
| 1064 | * IOMMU structure and initializes it with init_iommu_one() |
| 1065 | */ |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1066 | static int __init init_iommu_all(struct acpi_table_header *table) |
| 1067 | { |
| 1068 | u8 *p = (u8 *)table, *end = (u8 *)table; |
| 1069 | struct ivhd_header *h; |
| 1070 | struct amd_iommu *iommu; |
| 1071 | int ret; |
| 1072 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1073 | end += table->length; |
| 1074 | p += IVRS_HEADER_LENGTH; |
| 1075 | |
| 1076 | while (p < end) { |
| 1077 | h = (struct ivhd_header *)p; |
| 1078 | switch (*p) { |
| 1079 | case ACPI_IVHD_TYPE: |
Joerg Roedel | 9c72041 | 2009-05-20 13:53:57 +0200 | [diff] [blame] | 1080 | |
Joerg Roedel | ae908c2 | 2009-09-01 16:52:16 +0200 | [diff] [blame] | 1081 | DUMP_printk("device: %02x:%02x.%01x cap: %04x " |
Joerg Roedel | 9c72041 | 2009-05-20 13:53:57 +0200 | [diff] [blame] | 1082 | "seg: %d flags: %01x info %04x\n", |
| 1083 | PCI_BUS(h->devid), PCI_SLOT(h->devid), |
| 1084 | PCI_FUNC(h->devid), h->cap_ptr, |
| 1085 | h->pci_seg, h->flags, h->info); |
| 1086 | DUMP_printk(" mmio-addr: %016llx\n", |
| 1087 | h->mmio_phys); |
| 1088 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1089 | iommu = kzalloc(sizeof(struct amd_iommu), GFP_KERNEL); |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1090 | if (iommu == NULL) { |
| 1091 | amd_iommu_init_err = -ENOMEM; |
| 1092 | return 0; |
| 1093 | } |
| 1094 | |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1095 | ret = init_iommu_one(iommu, h); |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1096 | if (ret) { |
| 1097 | amd_iommu_init_err = ret; |
| 1098 | return 0; |
| 1099 | } |
Joerg Roedel | e47d402 | 2008-06-26 21:27:48 +0200 | [diff] [blame] | 1100 | break; |
| 1101 | default: |
| 1102 | break; |
| 1103 | } |
| 1104 | p += h->length; |
| 1105 | |
| 1106 | } |
| 1107 | WARN_ON(p != end); |
| 1108 | |
| 1109 | return 0; |
| 1110 | } |
| 1111 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1112 | /**************************************************************************** |
| 1113 | * |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1114 | * The following functions initialize the MSI interrupts for all IOMMUs |
| 1115 | * in the system. Its a bit challenging because there could be multiple |
| 1116 | * IOMMUs per PCI BDF but we can call pci_enable_msi(x) only once per |
| 1117 | * pci_dev. |
| 1118 | * |
| 1119 | ****************************************************************************/ |
| 1120 | |
Joerg Roedel | 9f800de | 2009-11-23 12:45:25 +0100 | [diff] [blame] | 1121 | static int iommu_setup_msi(struct amd_iommu *iommu) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1122 | { |
| 1123 | int r; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1124 | |
Joerg Roedel | 9ddd592 | 2012-03-15 16:29:47 +0100 | [diff] [blame] | 1125 | r = pci_enable_msi(iommu->dev); |
| 1126 | if (r) |
| 1127 | return r; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1128 | |
Joerg Roedel | 72fe00f | 2011-05-10 10:50:42 +0200 | [diff] [blame] | 1129 | r = request_threaded_irq(iommu->dev->irq, |
| 1130 | amd_iommu_int_handler, |
| 1131 | amd_iommu_int_thread, |
| 1132 | 0, "AMD-Vi", |
| 1133 | iommu->dev); |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1134 | |
| 1135 | if (r) { |
| 1136 | pci_disable_msi(iommu->dev); |
Joerg Roedel | 9ddd592 | 2012-03-15 16:29:47 +0100 | [diff] [blame] | 1137 | return r; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1138 | } |
| 1139 | |
Joerg Roedel | fab6afa | 2009-05-04 18:46:34 +0200 | [diff] [blame] | 1140 | iommu->int_enabled = true; |
Joerg Roedel | 1a29ac0 | 2011-11-10 15:41:40 +0100 | [diff] [blame] | 1141 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1142 | return 0; |
| 1143 | } |
| 1144 | |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 1145 | static int iommu_init_msi(struct amd_iommu *iommu) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1146 | { |
Joerg Roedel | 9ddd592 | 2012-03-15 16:29:47 +0100 | [diff] [blame] | 1147 | int ret; |
| 1148 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1149 | if (iommu->int_enabled) |
Joerg Roedel | 9ddd592 | 2012-03-15 16:29:47 +0100 | [diff] [blame] | 1150 | goto enable_faults; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1151 | |
Joerg Roedel | d91cecd | 2009-05-04 18:51:00 +0200 | [diff] [blame] | 1152 | if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI)) |
Joerg Roedel | 9ddd592 | 2012-03-15 16:29:47 +0100 | [diff] [blame] | 1153 | ret = iommu_setup_msi(iommu); |
| 1154 | else |
| 1155 | ret = -ENODEV; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1156 | |
Joerg Roedel | 9ddd592 | 2012-03-15 16:29:47 +0100 | [diff] [blame] | 1157 | if (ret) |
| 1158 | return ret; |
| 1159 | |
| 1160 | enable_faults: |
| 1161 | iommu_feature_enable(iommu, CONTROL_EVT_INT_EN); |
| 1162 | |
| 1163 | if (iommu->ppr_log != NULL) |
| 1164 | iommu_feature_enable(iommu, CONTROL_PPFINT_EN); |
| 1165 | |
| 1166 | return 0; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 1167 | } |
| 1168 | |
| 1169 | /**************************************************************************** |
| 1170 | * |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1171 | * The next functions belong to the third pass of parsing the ACPI |
| 1172 | * table. In this last pass the memory mapping requirements are |
| 1173 | * gathered (like exclusion and unity mapping reanges). |
| 1174 | * |
| 1175 | ****************************************************************************/ |
| 1176 | |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1177 | static void __init free_unity_maps(void) |
| 1178 | { |
| 1179 | struct unity_map_entry *entry, *next; |
| 1180 | |
| 1181 | list_for_each_entry_safe(entry, next, &amd_iommu_unity_map, list) { |
| 1182 | list_del(&entry->list); |
| 1183 | kfree(entry); |
| 1184 | } |
| 1185 | } |
| 1186 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1187 | /* called when we find an exclusion range definition in ACPI */ |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1188 | static int __init init_exclusion_range(struct ivmd_header *m) |
| 1189 | { |
| 1190 | int i; |
| 1191 | |
| 1192 | switch (m->type) { |
| 1193 | case ACPI_IVMD_TYPE: |
| 1194 | set_device_exclusion_range(m->devid, m); |
| 1195 | break; |
| 1196 | case ACPI_IVMD_TYPE_ALL: |
Joerg Roedel | 3a61ec3 | 2008-07-25 13:07:50 +0200 | [diff] [blame] | 1197 | for (i = 0; i <= amd_iommu_last_bdf; ++i) |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1198 | set_device_exclusion_range(i, m); |
| 1199 | break; |
| 1200 | case ACPI_IVMD_TYPE_RANGE: |
| 1201 | for (i = m->devid; i <= m->aux; ++i) |
| 1202 | set_device_exclusion_range(i, m); |
| 1203 | break; |
| 1204 | default: |
| 1205 | break; |
| 1206 | } |
| 1207 | |
| 1208 | return 0; |
| 1209 | } |
| 1210 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1211 | /* called for unity map ACPI definition */ |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1212 | static int __init init_unity_map_range(struct ivmd_header *m) |
| 1213 | { |
Joerg Roedel | 98f1ad2 | 2012-07-06 13:28:37 +0200 | [diff] [blame^] | 1214 | struct unity_map_entry *e = NULL; |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1215 | char *s; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1216 | |
| 1217 | e = kzalloc(sizeof(*e), GFP_KERNEL); |
| 1218 | if (e == NULL) |
| 1219 | return -ENOMEM; |
| 1220 | |
| 1221 | switch (m->type) { |
| 1222 | default: |
Joerg Roedel | 0bc252f | 2009-05-22 12:48:05 +0200 | [diff] [blame] | 1223 | kfree(e); |
| 1224 | return 0; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1225 | case ACPI_IVMD_TYPE: |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1226 | s = "IVMD_TYPEi\t\t\t"; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1227 | e->devid_start = e->devid_end = m->devid; |
| 1228 | break; |
| 1229 | case ACPI_IVMD_TYPE_ALL: |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1230 | s = "IVMD_TYPE_ALL\t\t"; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1231 | e->devid_start = 0; |
| 1232 | e->devid_end = amd_iommu_last_bdf; |
| 1233 | break; |
| 1234 | case ACPI_IVMD_TYPE_RANGE: |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1235 | s = "IVMD_TYPE_RANGE\t\t"; |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1236 | e->devid_start = m->devid; |
| 1237 | e->devid_end = m->aux; |
| 1238 | break; |
| 1239 | } |
| 1240 | e->address_start = PAGE_ALIGN(m->range_start); |
| 1241 | e->address_end = e->address_start + PAGE_ALIGN(m->range_length); |
| 1242 | e->prot = m->flags >> 1; |
| 1243 | |
Joerg Roedel | 02acc43 | 2009-05-20 16:24:21 +0200 | [diff] [blame] | 1244 | DUMP_printk("%s devid_start: %02x:%02x.%x devid_end: %02x:%02x.%x" |
| 1245 | " range_start: %016llx range_end: %016llx flags: %x\n", s, |
| 1246 | PCI_BUS(e->devid_start), PCI_SLOT(e->devid_start), |
| 1247 | PCI_FUNC(e->devid_start), PCI_BUS(e->devid_end), |
| 1248 | PCI_SLOT(e->devid_end), PCI_FUNC(e->devid_end), |
| 1249 | e->address_start, e->address_end, m->flags); |
| 1250 | |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1251 | list_add_tail(&e->list, &amd_iommu_unity_map); |
| 1252 | |
| 1253 | return 0; |
| 1254 | } |
| 1255 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1256 | /* iterates over all memory definitions we find in the ACPI table */ |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1257 | static int __init init_memory_definitions(struct acpi_table_header *table) |
| 1258 | { |
| 1259 | u8 *p = (u8 *)table, *end = (u8 *)table; |
| 1260 | struct ivmd_header *m; |
| 1261 | |
Joerg Roedel | be2a022 | 2008-06-26 21:27:49 +0200 | [diff] [blame] | 1262 | end += table->length; |
| 1263 | p += IVRS_HEADER_LENGTH; |
| 1264 | |
| 1265 | while (p < end) { |
| 1266 | m = (struct ivmd_header *)p; |
| 1267 | if (m->flags & IVMD_FLAG_EXCL_RANGE) |
| 1268 | init_exclusion_range(m); |
| 1269 | else if (m->flags & IVMD_FLAG_UNITY_MAP) |
| 1270 | init_unity_map_range(m); |
| 1271 | |
| 1272 | p += m->length; |
| 1273 | } |
| 1274 | |
| 1275 | return 0; |
| 1276 | } |
| 1277 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1278 | /* |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1279 | * Init the device table to not allow DMA access for devices and |
| 1280 | * suppress all page faults |
| 1281 | */ |
| 1282 | static void init_device_table(void) |
| 1283 | { |
Joerg Roedel | 0de66d5 | 2011-06-06 16:04:02 +0200 | [diff] [blame] | 1284 | u32 devid; |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1285 | |
| 1286 | for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) { |
| 1287 | set_dev_entry_bit(devid, DEV_ENTRY_VALID); |
| 1288 | set_dev_entry_bit(devid, DEV_ENTRY_TRANSLATION); |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1289 | } |
| 1290 | } |
| 1291 | |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame] | 1292 | static void iommu_init_flags(struct amd_iommu *iommu) |
| 1293 | { |
| 1294 | iommu->acpi_flags & IVHD_FLAG_HT_TUN_EN_MASK ? |
| 1295 | iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) : |
| 1296 | iommu_feature_disable(iommu, CONTROL_HT_TUN_EN); |
| 1297 | |
| 1298 | iommu->acpi_flags & IVHD_FLAG_PASSPW_EN_MASK ? |
| 1299 | iommu_feature_enable(iommu, CONTROL_PASSPW_EN) : |
| 1300 | iommu_feature_disable(iommu, CONTROL_PASSPW_EN); |
| 1301 | |
| 1302 | iommu->acpi_flags & IVHD_FLAG_RESPASSPW_EN_MASK ? |
| 1303 | iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) : |
| 1304 | iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN); |
| 1305 | |
| 1306 | iommu->acpi_flags & IVHD_FLAG_ISOC_EN_MASK ? |
| 1307 | iommu_feature_enable(iommu, CONTROL_ISOC_EN) : |
| 1308 | iommu_feature_disable(iommu, CONTROL_ISOC_EN); |
| 1309 | |
| 1310 | /* |
| 1311 | * make IOMMU memory accesses cache coherent |
| 1312 | */ |
| 1313 | iommu_feature_enable(iommu, CONTROL_COHERENT_EN); |
Joerg Roedel | 1456e9d | 2011-12-22 14:51:53 +0100 | [diff] [blame] | 1314 | |
| 1315 | /* Set IOTLB invalidation timeout to 1s */ |
| 1316 | iommu_set_inv_tlb_timeout(iommu, CTRL_INV_TO_1S); |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame] | 1317 | } |
| 1318 | |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 1319 | static void iommu_apply_resume_quirks(struct amd_iommu *iommu) |
Joerg Roedel | 4c894f4 | 2010-09-23 15:15:19 +0200 | [diff] [blame] | 1320 | { |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 1321 | int i, j; |
| 1322 | u32 ioc_feature_control; |
Joerg Roedel | c1bf94e | 2012-05-31 17:38:11 +0200 | [diff] [blame] | 1323 | struct pci_dev *pdev = iommu->root_pdev; |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 1324 | |
| 1325 | /* RD890 BIOSes may not have completely reconfigured the iommu */ |
Joerg Roedel | c1bf94e | 2012-05-31 17:38:11 +0200 | [diff] [blame] | 1326 | if (!is_rd890_iommu(iommu->dev) || !pdev) |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 1327 | return; |
| 1328 | |
| 1329 | /* |
| 1330 | * First, we need to ensure that the iommu is enabled. This is |
| 1331 | * controlled by a register in the northbridge |
| 1332 | */ |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 1333 | |
| 1334 | /* Select Northbridge indirect register 0x75 and enable writing */ |
| 1335 | pci_write_config_dword(pdev, 0x60, 0x75 | (1 << 7)); |
| 1336 | pci_read_config_dword(pdev, 0x64, &ioc_feature_control); |
| 1337 | |
| 1338 | /* Enable the iommu */ |
| 1339 | if (!(ioc_feature_control & 0x1)) |
| 1340 | pci_write_config_dword(pdev, 0x64, ioc_feature_control | 1); |
| 1341 | |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 1342 | /* Restore the iommu BAR */ |
| 1343 | pci_write_config_dword(iommu->dev, iommu->cap_ptr + 4, |
| 1344 | iommu->stored_addr_lo); |
| 1345 | pci_write_config_dword(iommu->dev, iommu->cap_ptr + 8, |
| 1346 | iommu->stored_addr_hi); |
| 1347 | |
| 1348 | /* Restore the l1 indirect regs for each of the 6 l1s */ |
| 1349 | for (i = 0; i < 6; i++) |
| 1350 | for (j = 0; j < 0x12; j++) |
| 1351 | iommu_write_l1(iommu, i, j, iommu->stored_l1[i][j]); |
| 1352 | |
| 1353 | /* Restore the l2 indirect regs */ |
| 1354 | for (i = 0; i < 0x83; i++) |
| 1355 | iommu_write_l2(iommu, i, iommu->stored_l2[i]); |
| 1356 | |
| 1357 | /* Lock PCI setup registers */ |
| 1358 | pci_write_config_dword(iommu->dev, iommu->cap_ptr + 4, |
| 1359 | iommu->stored_addr_lo | 1); |
Joerg Roedel | 4c894f4 | 2010-09-23 15:15:19 +0200 | [diff] [blame] | 1360 | } |
| 1361 | |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1362 | /* |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1363 | * This function finally enables all IOMMUs found in the system after |
| 1364 | * they have been initialized |
| 1365 | */ |
Joerg Roedel | 05f92db | 2009-05-12 09:52:46 +0200 | [diff] [blame] | 1366 | static void enable_iommus(void) |
Joerg Roedel | 8736197 | 2008-06-26 21:28:07 +0200 | [diff] [blame] | 1367 | { |
| 1368 | struct amd_iommu *iommu; |
| 1369 | |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 1370 | for_each_iommu(iommu) { |
Chris Wright | a8c485b | 2009-06-15 15:53:45 +0200 | [diff] [blame] | 1371 | iommu_disable(iommu); |
Joerg Roedel | e9bf519 | 2010-09-20 14:33:07 +0200 | [diff] [blame] | 1372 | iommu_init_flags(iommu); |
Joerg Roedel | 58492e1 | 2009-05-04 18:41:16 +0200 | [diff] [blame] | 1373 | iommu_set_device_table(iommu); |
| 1374 | iommu_enable_command_buffer(iommu); |
| 1375 | iommu_enable_event_buffer(iommu); |
Joerg Roedel | 1a29ac0 | 2011-11-10 15:41:40 +0100 | [diff] [blame] | 1376 | iommu_enable_ppr_log(iommu); |
Joerg Roedel | cbc33a9 | 2011-11-25 11:41:31 +0100 | [diff] [blame] | 1377 | iommu_enable_gt(iommu); |
Joerg Roedel | 8736197 | 2008-06-26 21:28:07 +0200 | [diff] [blame] | 1378 | iommu_set_exclusion_range(iommu); |
| 1379 | iommu_enable(iommu); |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1380 | iommu_flush_all_caches(iommu); |
Joerg Roedel | 8736197 | 2008-06-26 21:28:07 +0200 | [diff] [blame] | 1381 | } |
| 1382 | } |
| 1383 | |
Joerg Roedel | 92ac432 | 2009-05-19 19:06:27 +0200 | [diff] [blame] | 1384 | static void disable_iommus(void) |
| 1385 | { |
| 1386 | struct amd_iommu *iommu; |
| 1387 | |
| 1388 | for_each_iommu(iommu) |
| 1389 | iommu_disable(iommu); |
| 1390 | } |
| 1391 | |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1392 | /* |
| 1393 | * Suspend/Resume support |
| 1394 | * disable suspend until real resume implemented |
| 1395 | */ |
| 1396 | |
Rafael J. Wysocki | f3c6ea1 | 2011-03-23 22:15:54 +0100 | [diff] [blame] | 1397 | static void amd_iommu_resume(void) |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1398 | { |
Matthew Garrett | 5bcd757 | 2010-10-04 14:59:31 -0400 | [diff] [blame] | 1399 | struct amd_iommu *iommu; |
| 1400 | |
| 1401 | for_each_iommu(iommu) |
| 1402 | iommu_apply_resume_quirks(iommu); |
| 1403 | |
Joerg Roedel | 736501e | 2009-05-12 09:56:12 +0200 | [diff] [blame] | 1404 | /* re-load the hardware */ |
| 1405 | enable_iommus(); |
Joerg Roedel | 3d9761e | 2012-03-15 16:39:21 +0100 | [diff] [blame] | 1406 | |
| 1407 | amd_iommu_enable_interrupts(); |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1408 | } |
| 1409 | |
Rafael J. Wysocki | f3c6ea1 | 2011-03-23 22:15:54 +0100 | [diff] [blame] | 1410 | static int amd_iommu_suspend(void) |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1411 | { |
Joerg Roedel | 736501e | 2009-05-12 09:56:12 +0200 | [diff] [blame] | 1412 | /* disable IOMMUs to go out of the way for BIOS */ |
| 1413 | disable_iommus(); |
| 1414 | |
| 1415 | return 0; |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1416 | } |
| 1417 | |
Rafael J. Wysocki | f3c6ea1 | 2011-03-23 22:15:54 +0100 | [diff] [blame] | 1418 | static struct syscore_ops amd_iommu_syscore_ops = { |
Joerg Roedel | 7441e9c | 2008-06-30 20:18:02 +0200 | [diff] [blame] | 1419 | .suspend = amd_iommu_suspend, |
| 1420 | .resume = amd_iommu_resume, |
| 1421 | }; |
| 1422 | |
Joerg Roedel | 8704a1b | 2012-03-01 15:57:53 +0100 | [diff] [blame] | 1423 | static void __init free_on_init_error(void) |
| 1424 | { |
| 1425 | amd_iommu_uninit_devices(); |
| 1426 | |
| 1427 | free_pages((unsigned long)amd_iommu_pd_alloc_bitmap, |
| 1428 | get_order(MAX_DOMAIN_ID/8)); |
| 1429 | |
| 1430 | free_pages((unsigned long)amd_iommu_rlookup_table, |
| 1431 | get_order(rlookup_table_size)); |
| 1432 | |
| 1433 | free_pages((unsigned long)amd_iommu_alias_table, |
| 1434 | get_order(alias_table_size)); |
| 1435 | |
| 1436 | free_pages((unsigned long)amd_iommu_dev_table, |
| 1437 | get_order(dev_table_size)); |
| 1438 | |
| 1439 | free_iommu_all(); |
| 1440 | |
| 1441 | free_unity_maps(); |
| 1442 | |
| 1443 | #ifdef CONFIG_GART_IOMMU |
| 1444 | /* |
| 1445 | * We failed to initialize the AMD IOMMU - try fallback to GART |
| 1446 | * if possible. |
| 1447 | */ |
| 1448 | gart_iommu_init(); |
| 1449 | |
| 1450 | #endif |
| 1451 | } |
| 1452 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1453 | /* |
Joerg Roedel | 8704a1b | 2012-03-01 15:57:53 +0100 | [diff] [blame] | 1454 | * This is the hardware init function for AMD IOMMU in the system. |
| 1455 | * This function is called either from amd_iommu_init or from the interrupt |
| 1456 | * remapping setup code. |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1457 | * |
| 1458 | * This function basically parses the ACPI table for AMD IOMMU (IVRS) |
| 1459 | * three times: |
| 1460 | * |
| 1461 | * 1 pass) Find the highest PCI device id the driver has to handle. |
| 1462 | * Upon this information the size of the data structures is |
| 1463 | * determined that needs to be allocated. |
| 1464 | * |
| 1465 | * 2 pass) Initialize the data structures just allocated with the |
| 1466 | * information in the ACPI table about available AMD IOMMUs |
| 1467 | * in the system. It also maps the PCI devices in the |
| 1468 | * system to specific IOMMUs |
| 1469 | * |
| 1470 | * 3 pass) After the basic data structures are allocated and |
| 1471 | * initialized we update them with information about memory |
| 1472 | * remapping requirements parsed out of the ACPI table in |
| 1473 | * this last pass. |
| 1474 | * |
Joerg Roedel | 8704a1b | 2012-03-01 15:57:53 +0100 | [diff] [blame] | 1475 | * After everything is set up the IOMMUs are enabled and the necessary |
| 1476 | * hotplug and suspend notifiers are registered. |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1477 | */ |
Joerg Roedel | 8704a1b | 2012-03-01 15:57:53 +0100 | [diff] [blame] | 1478 | int __init amd_iommu_init_hardware(void) |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1479 | { |
| 1480 | int i, ret = 0; |
| 1481 | |
Joerg Roedel | 8704a1b | 2012-03-01 15:57:53 +0100 | [diff] [blame] | 1482 | if (!amd_iommu_detected) |
| 1483 | return -ENODEV; |
| 1484 | |
| 1485 | if (amd_iommu_dev_table != NULL) { |
| 1486 | /* Hardware already initialized */ |
| 1487 | return 0; |
| 1488 | } |
| 1489 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1490 | /* |
| 1491 | * First parse ACPI tables to find the largest Bus/Dev/Func |
| 1492 | * we need to handle. Upon this information the shared data |
| 1493 | * structures for the IOMMUs in the system will be allocated |
| 1494 | */ |
| 1495 | if (acpi_table_parse("IVRS", find_last_devid_acpi) != 0) |
| 1496 | return -ENODEV; |
| 1497 | |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1498 | ret = amd_iommu_init_err; |
| 1499 | if (ret) |
| 1500 | goto out; |
| 1501 | |
Joerg Roedel | c571484 | 2008-07-11 17:14:25 +0200 | [diff] [blame] | 1502 | dev_table_size = tbl_size(DEV_TABLE_ENTRY_SIZE); |
| 1503 | alias_table_size = tbl_size(ALIAS_TABLE_ENTRY_SIZE); |
| 1504 | rlookup_table_size = tbl_size(RLOOKUP_TABLE_ENTRY_SIZE); |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1505 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1506 | /* Device table - directly used by all IOMMUs */ |
Joerg Roedel | 8704a1b | 2012-03-01 15:57:53 +0100 | [diff] [blame] | 1507 | ret = -ENOMEM; |
Joerg Roedel | 5dc8bff | 2008-07-11 17:14:32 +0200 | [diff] [blame] | 1508 | amd_iommu_dev_table = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1509 | get_order(dev_table_size)); |
| 1510 | if (amd_iommu_dev_table == NULL) |
| 1511 | goto out; |
| 1512 | |
| 1513 | /* |
| 1514 | * Alias table - map PCI Bus/Dev/Func to Bus/Dev/Func the |
| 1515 | * IOMMU see for that device |
| 1516 | */ |
| 1517 | amd_iommu_alias_table = (void *)__get_free_pages(GFP_KERNEL, |
| 1518 | get_order(alias_table_size)); |
| 1519 | if (amd_iommu_alias_table == NULL) |
| 1520 | goto free; |
| 1521 | |
| 1522 | /* IOMMU rlookup table - find the IOMMU for a specific device */ |
Joerg Roedel | 83fd5cc | 2008-12-16 19:17:11 +0100 | [diff] [blame] | 1523 | amd_iommu_rlookup_table = (void *)__get_free_pages( |
| 1524 | GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1525 | get_order(rlookup_table_size)); |
| 1526 | if (amd_iommu_rlookup_table == NULL) |
| 1527 | goto free; |
| 1528 | |
Joerg Roedel | 5dc8bff | 2008-07-11 17:14:32 +0200 | [diff] [blame] | 1529 | amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages( |
| 1530 | GFP_KERNEL | __GFP_ZERO, |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1531 | get_order(MAX_DOMAIN_ID/8)); |
| 1532 | if (amd_iommu_pd_alloc_bitmap == NULL) |
| 1533 | goto free; |
| 1534 | |
Joerg Roedel | 9f5f5fb | 2008-08-14 19:55:16 +0200 | [diff] [blame] | 1535 | /* init the device table */ |
| 1536 | init_device_table(); |
| 1537 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1538 | /* |
Joerg Roedel | 5dc8bff | 2008-07-11 17:14:32 +0200 | [diff] [blame] | 1539 | * let all alias entries point to itself |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1540 | */ |
Joerg Roedel | 3a61ec3 | 2008-07-25 13:07:50 +0200 | [diff] [blame] | 1541 | for (i = 0; i <= amd_iommu_last_bdf; ++i) |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1542 | amd_iommu_alias_table[i] = i; |
| 1543 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1544 | /* |
| 1545 | * never allocate domain 0 because its used as the non-allocated and |
| 1546 | * error value placeholder |
| 1547 | */ |
| 1548 | amd_iommu_pd_alloc_bitmap[0] = 1; |
| 1549 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1550 | spin_lock_init(&amd_iommu_pd_lock); |
| 1551 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1552 | /* |
| 1553 | * now the data structures are allocated and basically initialized |
| 1554 | * start the real acpi table scan |
| 1555 | */ |
| 1556 | ret = -ENODEV; |
| 1557 | if (acpi_table_parse("IVRS", init_iommu_all) != 0) |
| 1558 | goto free; |
| 1559 | |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1560 | if (amd_iommu_init_err) { |
| 1561 | ret = amd_iommu_init_err; |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 1562 | goto free; |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1563 | } |
Joerg Roedel | 0f76480 | 2009-12-21 15:51:23 +0100 | [diff] [blame] | 1564 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1565 | if (acpi_table_parse("IVRS", init_memory_definitions) != 0) |
| 1566 | goto free; |
| 1567 | |
Joerg Roedel | 3551a70 | 2010-03-01 13:52:19 +0100 | [diff] [blame] | 1568 | if (amd_iommu_init_err) { |
| 1569 | ret = amd_iommu_init_err; |
| 1570 | goto free; |
| 1571 | } |
| 1572 | |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 1573 | ret = amd_iommu_init_devices(); |
| 1574 | if (ret) |
| 1575 | goto free; |
| 1576 | |
Chris Wright | 75f6653 | 2010-04-02 18:27:52 -0700 | [diff] [blame] | 1577 | enable_iommus(); |
| 1578 | |
Joerg Roedel | 8704a1b | 2012-03-01 15:57:53 +0100 | [diff] [blame] | 1579 | amd_iommu_init_notifier(); |
| 1580 | |
| 1581 | register_syscore_ops(&amd_iommu_syscore_ops); |
| 1582 | |
| 1583 | out: |
| 1584 | return ret; |
| 1585 | |
| 1586 | free: |
| 1587 | free_on_init_error(); |
| 1588 | |
| 1589 | return ret; |
| 1590 | } |
| 1591 | |
Gerard Snitselaar | ae29514 | 2012-03-16 11:38:22 -0700 | [diff] [blame] | 1592 | static int amd_iommu_enable_interrupts(void) |
Joerg Roedel | 3d9761e | 2012-03-15 16:39:21 +0100 | [diff] [blame] | 1593 | { |
| 1594 | struct amd_iommu *iommu; |
| 1595 | int ret = 0; |
| 1596 | |
| 1597 | for_each_iommu(iommu) { |
| 1598 | ret = iommu_init_msi(iommu); |
| 1599 | if (ret) |
| 1600 | goto out; |
| 1601 | } |
| 1602 | |
| 1603 | out: |
| 1604 | return ret; |
| 1605 | } |
| 1606 | |
Joerg Roedel | 8704a1b | 2012-03-01 15:57:53 +0100 | [diff] [blame] | 1607 | /* |
| 1608 | * This is the core init function for AMD IOMMU hardware in the system. |
| 1609 | * This function is called from the generic x86 DMA layer initialization |
| 1610 | * code. |
| 1611 | * |
| 1612 | * The function calls amd_iommu_init_hardware() to setup and enable the |
| 1613 | * IOMMU hardware if this has not happened yet. After that the driver |
| 1614 | * registers for the DMA-API and for the IOMMU-API as necessary. |
| 1615 | */ |
| 1616 | static int __init amd_iommu_init(void) |
| 1617 | { |
| 1618 | int ret = 0; |
| 1619 | |
| 1620 | ret = amd_iommu_init_hardware(); |
| 1621 | if (ret) |
| 1622 | goto out; |
| 1623 | |
Joerg Roedel | 3d9761e | 2012-03-15 16:39:21 +0100 | [diff] [blame] | 1624 | ret = amd_iommu_enable_interrupts(); |
| 1625 | if (ret) |
| 1626 | goto free; |
| 1627 | |
Joerg Roedel | 4751a95 | 2009-09-01 15:53:54 +0200 | [diff] [blame] | 1628 | if (iommu_pass_through) |
| 1629 | ret = amd_iommu_init_passthrough(); |
| 1630 | else |
| 1631 | ret = amd_iommu_init_dma_ops(); |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 1632 | |
Joerg Roedel | 129d6ab | 2008-08-14 19:55:18 +0200 | [diff] [blame] | 1633 | if (ret) |
Joerg Roedel | 8704a1b | 2012-03-01 15:57:53 +0100 | [diff] [blame] | 1634 | goto free; |
Joerg Roedel | 129d6ab | 2008-08-14 19:55:18 +0200 | [diff] [blame] | 1635 | |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 1636 | amd_iommu_init_api(); |
| 1637 | |
Shuah Khan | f2f12b6 | 2012-06-06 10:50:06 -0600 | [diff] [blame] | 1638 | x86_platform.iommu_shutdown = disable_iommus; |
| 1639 | |
Joerg Roedel | 4751a95 | 2009-09-01 15:53:54 +0200 | [diff] [blame] | 1640 | if (iommu_pass_through) |
| 1641 | goto out; |
| 1642 | |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 1643 | if (amd_iommu_unmap_flush) |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 1644 | printk(KERN_INFO "AMD-Vi: IO/TLB flush on unmap enabled\n"); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1645 | else |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 1646 | printk(KERN_INFO "AMD-Vi: Lazy IO/TLB flushing enabled\n"); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1647 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1648 | out: |
| 1649 | return ret; |
| 1650 | |
Joerg Roedel | 8704a1b | 2012-03-01 15:57:53 +0100 | [diff] [blame] | 1651 | free: |
Chris Wright | 75f6653 | 2010-04-02 18:27:52 -0700 | [diff] [blame] | 1652 | disable_iommus(); |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 1653 | |
Joerg Roedel | 8704a1b | 2012-03-01 15:57:53 +0100 | [diff] [blame] | 1654 | free_on_init_error(); |
Joerg Roedel | d7f0776 | 2010-05-31 15:05:20 +0200 | [diff] [blame] | 1655 | |
Joerg Roedel | fe74c9c | 2008-06-26 21:27:50 +0200 | [diff] [blame] | 1656 | goto out; |
| 1657 | } |
| 1658 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1659 | /**************************************************************************** |
| 1660 | * |
| 1661 | * Early detect code. This code runs at IOMMU detection time in the DMA |
| 1662 | * layer. It just looks if there is an IVRS ACPI table to detect AMD |
| 1663 | * IOMMUs |
| 1664 | * |
| 1665 | ****************************************************************************/ |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1666 | static int __init early_amd_iommu_detect(struct acpi_table_header *table) |
| 1667 | { |
| 1668 | return 0; |
| 1669 | } |
| 1670 | |
Konrad Rzeszutek Wilk | 480125b | 2010-08-26 13:57:57 -0400 | [diff] [blame] | 1671 | int __init amd_iommu_detect(void) |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1672 | { |
FUJITA Tomonori | 75f1cdf | 2009-11-10 19:46:20 +0900 | [diff] [blame] | 1673 | if (no_iommu || (iommu_detected && !gart_iommu_aperture)) |
Konrad Rzeszutek Wilk | 480125b | 2010-08-26 13:57:57 -0400 | [diff] [blame] | 1674 | return -ENODEV; |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1675 | |
Joerg Roedel | a523572 | 2010-05-11 17:12:33 +0200 | [diff] [blame] | 1676 | if (amd_iommu_disabled) |
Konrad Rzeszutek Wilk | 480125b | 2010-08-26 13:57:57 -0400 | [diff] [blame] | 1677 | return -ENODEV; |
Joerg Roedel | a523572 | 2010-05-11 17:12:33 +0200 | [diff] [blame] | 1678 | |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1679 | if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) { |
| 1680 | iommu_detected = 1; |
Joerg Roedel | c1cbebe | 2008-07-03 19:35:10 +0200 | [diff] [blame] | 1681 | amd_iommu_detected = 1; |
FUJITA Tomonori | ea1b0d3 | 2009-11-10 19:46:15 +0900 | [diff] [blame] | 1682 | x86_init.iommu.iommu_init = amd_iommu_init; |
Linus Torvalds | 11bd04f | 2009-12-11 12:18:16 -0800 | [diff] [blame] | 1683 | |
Chris Wright | 5d990b6 | 2009-12-04 12:15:21 -0800 | [diff] [blame] | 1684 | /* Make sure ACS will be enabled */ |
| 1685 | pci_request_acs(); |
Konrad Rzeszutek Wilk | 480125b | 2010-08-26 13:57:57 -0400 | [diff] [blame] | 1686 | return 1; |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1687 | } |
Konrad Rzeszutek Wilk | 480125b | 2010-08-26 13:57:57 -0400 | [diff] [blame] | 1688 | return -ENODEV; |
Joerg Roedel | ae7877d | 2008-06-26 21:27:51 +0200 | [diff] [blame] | 1689 | } |
| 1690 | |
Joerg Roedel | b65233a | 2008-07-11 17:14:21 +0200 | [diff] [blame] | 1691 | /**************************************************************************** |
| 1692 | * |
| 1693 | * Parsing functions for the AMD IOMMU specific kernel command line |
| 1694 | * options. |
| 1695 | * |
| 1696 | ****************************************************************************/ |
| 1697 | |
Joerg Roedel | fefda11 | 2009-05-20 12:21:42 +0200 | [diff] [blame] | 1698 | static int __init parse_amd_iommu_dump(char *str) |
| 1699 | { |
| 1700 | amd_iommu_dump = true; |
| 1701 | |
| 1702 | return 1; |
| 1703 | } |
| 1704 | |
Joerg Roedel | 918ad6c | 2008-06-26 21:27:52 +0200 | [diff] [blame] | 1705 | static int __init parse_amd_iommu_options(char *str) |
| 1706 | { |
| 1707 | for (; *str; ++str) { |
Joerg Roedel | 695b567 | 2008-11-17 15:16:43 +0100 | [diff] [blame] | 1708 | if (strncmp(str, "fullflush", 9) == 0) |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 1709 | amd_iommu_unmap_flush = true; |
Joerg Roedel | a523572 | 2010-05-11 17:12:33 +0200 | [diff] [blame] | 1710 | if (strncmp(str, "off", 3) == 0) |
| 1711 | amd_iommu_disabled = true; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 1712 | if (strncmp(str, "force_isolation", 15) == 0) |
| 1713 | amd_iommu_force_isolation = true; |
Joerg Roedel | 918ad6c | 2008-06-26 21:27:52 +0200 | [diff] [blame] | 1714 | } |
| 1715 | |
| 1716 | return 1; |
| 1717 | } |
| 1718 | |
Joerg Roedel | fefda11 | 2009-05-20 12:21:42 +0200 | [diff] [blame] | 1719 | __setup("amd_iommu_dump", parse_amd_iommu_dump); |
Joerg Roedel | 918ad6c | 2008-06-26 21:27:52 +0200 | [diff] [blame] | 1720 | __setup("amd_iommu=", parse_amd_iommu_options); |
Konrad Rzeszutek Wilk | 22e6daf | 2010-08-26 13:58:03 -0400 | [diff] [blame] | 1721 | |
| 1722 | IOMMU_INIT_FINISH(amd_iommu_detect, |
| 1723 | gart_iommu_hole_init, |
Joerg Roedel | 98f1ad2 | 2012-07-06 13:28:37 +0200 | [diff] [blame^] | 1724 | NULL, |
| 1725 | NULL); |
Joerg Roedel | 400a28a | 2011-11-28 15:11:02 +0100 | [diff] [blame] | 1726 | |
| 1727 | bool amd_iommu_v2_supported(void) |
| 1728 | { |
| 1729 | return amd_iommu_v2_present; |
| 1730 | } |
| 1731 | EXPORT_SYMBOL(amd_iommu_v2_supported); |