Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 1 | /* |
| 2 | * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC |
| 3 | * |
| 4 | * Copyright (C) 2011 Atmel, |
| 5 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>, |
| 6 | * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 7 | * |
| 8 | * Licensed under GPLv2 or later. |
| 9 | */ |
| 10 | |
Jean-Christophe PLAGNIOL-VILLARD | 6db64d2 | 2013-05-15 01:21:50 +0800 | [diff] [blame] | 11 | #include "skeleton.dtsi" |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 12 | #include <dt-bindings/pinctrl/at91.h> |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 13 | #include <dt-bindings/interrupt-controller/irq.h> |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 14 | #include <dt-bindings/gpio/gpio.h> |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 15 | |
| 16 | / { |
| 17 | model = "Atmel AT91SAM9260 family SoC"; |
| 18 | compatible = "atmel,at91sam9260"; |
| 19 | interrupt-parent = <&aic>; |
| 20 | |
| 21 | aliases { |
| 22 | serial0 = &dbgu; |
| 23 | serial1 = &usart0; |
| 24 | serial2 = &usart1; |
| 25 | serial3 = &usart2; |
| 26 | serial4 = &usart3; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 27 | serial5 = &uart0; |
| 28 | serial6 = &uart1; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 29 | gpio0 = &pioA; |
| 30 | gpio1 = &pioB; |
| 31 | gpio2 = &pioC; |
| 32 | tcb0 = &tcb0; |
| 33 | tcb1 = &tcb1; |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 34 | i2c0 = &i2c0; |
Bo Shen | 099343c | 2012-11-07 11:41:41 +0800 | [diff] [blame] | 35 | ssc0 = &ssc0; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 36 | }; |
| 37 | cpus { |
Lorenzo Pieralisi | e757a6e | 2013-04-18 18:31:35 +0100 | [diff] [blame] | 38 | #address-cells = <0>; |
| 39 | #size-cells = <0>; |
| 40 | |
| 41 | cpu { |
| 42 | compatible = "arm,arm926ej-s"; |
| 43 | device_type = "cpu"; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 44 | }; |
| 45 | }; |
| 46 | |
| 47 | memory { |
| 48 | reg = <0x20000000 0x04000000>; |
| 49 | }; |
| 50 | |
| 51 | ahb { |
| 52 | compatible = "simple-bus"; |
| 53 | #address-cells = <1>; |
| 54 | #size-cells = <1>; |
| 55 | ranges; |
| 56 | |
| 57 | apb { |
| 58 | compatible = "simple-bus"; |
| 59 | #address-cells = <1>; |
| 60 | #size-cells = <1>; |
| 61 | ranges; |
| 62 | |
| 63 | aic: interrupt-controller@fffff000 { |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 64 | #interrupt-cells = <3>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 65 | compatible = "atmel,at91rm9200-aic"; |
| 66 | interrupt-controller; |
| 67 | reg = <0xfffff000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | c657394 | 2012-04-09 19:36:36 +0800 | [diff] [blame] | 68 | atmel,external-irqs = <29 30 31>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 69 | }; |
| 70 | |
| 71 | ramc0: ramc@ffffea00 { |
| 72 | compatible = "atmel,at91sam9260-sdramc"; |
| 73 | reg = <0xffffea00 0x200>; |
| 74 | }; |
| 75 | |
| 76 | pmc: pmc@fffffc00 { |
| 77 | compatible = "atmel,at91rm9200-pmc"; |
| 78 | reg = <0xfffffc00 0x100>; |
| 79 | }; |
| 80 | |
| 81 | rstc@fffffd00 { |
| 82 | compatible = "atmel,at91sam9260-rstc"; |
| 83 | reg = <0xfffffd00 0x10>; |
| 84 | }; |
| 85 | |
| 86 | shdwc@fffffd10 { |
| 87 | compatible = "atmel,at91sam9260-shdwc"; |
| 88 | reg = <0xfffffd10 0x10>; |
| 89 | }; |
| 90 | |
| 91 | pit: timer@fffffd30 { |
| 92 | compatible = "atmel,at91sam9260-pit"; |
| 93 | reg = <0xfffffd30 0xf>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 94 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 95 | }; |
| 96 | |
| 97 | tcb0: timer@fffa0000 { |
| 98 | compatible = "atmel,at91rm9200-tcb"; |
| 99 | reg = <0xfffa0000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 100 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 |
| 101 | 18 IRQ_TYPE_LEVEL_HIGH 0 |
| 102 | 19 IRQ_TYPE_LEVEL_HIGH 0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 103 | }; |
| 104 | |
| 105 | tcb1: timer@fffdc000 { |
| 106 | compatible = "atmel,at91rm9200-tcb"; |
| 107 | reg = <0xfffdc000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 108 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0 |
| 109 | 27 IRQ_TYPE_LEVEL_HIGH 0 |
| 110 | 28 IRQ_TYPE_LEVEL_HIGH 0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 111 | }; |
| 112 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 113 | pinctrl@fffff400 { |
| 114 | #address-cells = <1>; |
| 115 | #size-cells = <1>; |
| 116 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; |
| 117 | ranges = <0xfffff400 0xfffff400 0x600>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 118 | |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 119 | atmel,mux-mask = < |
| 120 | /* A B */ |
| 121 | 0xffffffff 0xffc00c3b /* pioA */ |
| 122 | 0xffffffff 0x7fff3ccf /* pioB */ |
| 123 | 0xffffffff 0x007fffff /* pioC */ |
| 124 | >; |
| 125 | |
| 126 | /* shared pinctrl settings */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 127 | dbgu { |
| 128 | pinctrl_dbgu: dbgu-0 { |
| 129 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 130 | <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ |
| 131 | AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 132 | }; |
| 133 | }; |
| 134 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 135 | usart0 { |
| 136 | pinctrl_usart0: usart0-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 137 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 138 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ |
| 139 | AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 140 | }; |
| 141 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 142 | pinctrl_usart0_rts: usart0_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 143 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 144 | <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 145 | }; |
| 146 | |
| 147 | pinctrl_usart0_cts: usart0_cts-0 { |
| 148 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 149 | <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 150 | }; |
| 151 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 152 | pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 153 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 154 | <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */ |
| 155 | AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 156 | }; |
| 157 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 158 | pinctrl_usart0_dcd: usart0_dcd-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 159 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 160 | <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 161 | }; |
| 162 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 163 | pinctrl_usart0_ri: usart0_ri-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 164 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 165 | <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 166 | }; |
| 167 | }; |
| 168 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 169 | usart1 { |
| 170 | pinctrl_usart1: usart1-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 171 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 172 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */ |
| 173 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 174 | }; |
| 175 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 176 | pinctrl_usart1_rts: usart1_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 177 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 178 | <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 179 | }; |
| 180 | |
| 181 | pinctrl_usart1_cts: usart1_cts-0 { |
| 182 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 183 | <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 184 | }; |
| 185 | }; |
| 186 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 187 | usart2 { |
| 188 | pinctrl_usart2: usart2-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 189 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 190 | <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */ |
| 191 | AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 192 | }; |
| 193 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 194 | pinctrl_usart2_rts: usart2_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 195 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 196 | <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 197 | }; |
| 198 | |
| 199 | pinctrl_usart2_cts: usart2_cts-0 { |
| 200 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 201 | <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 202 | }; |
| 203 | }; |
| 204 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 205 | usart3 { |
| 206 | pinctrl_usart3: usart3-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 207 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 208 | <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */ |
| 209 | AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 210 | }; |
| 211 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 212 | pinctrl_usart3_rts: usart3_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 213 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 214 | <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 215 | }; |
| 216 | |
| 217 | pinctrl_usart3_cts: usart3_cts-0 { |
| 218 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 219 | <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 220 | }; |
| 221 | }; |
| 222 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 223 | uart0 { |
| 224 | pinctrl_uart0: uart0-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 225 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 226 | <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */ |
| 227 | AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 228 | }; |
| 229 | }; |
| 230 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 231 | uart1 { |
| 232 | pinctrl_uart1: uart1-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 233 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 234 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */ |
| 235 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 236 | }; |
| 237 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 238 | |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 239 | nand { |
| 240 | pinctrl_nand: nand-0 { |
| 241 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 242 | <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */ |
| 243 | AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 244 | }; |
| 245 | }; |
| 246 | |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 247 | macb { |
| 248 | pinctrl_macb_rmii: macb_rmii-0 { |
| 249 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 250 | <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ |
| 251 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ |
| 252 | AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ |
| 253 | AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ |
| 254 | AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ |
| 255 | AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ |
| 256 | AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ |
| 257 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */ |
| 258 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */ |
| 259 | AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 260 | }; |
| 261 | |
| 262 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { |
| 263 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 264 | <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ |
| 265 | AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */ |
| 266 | AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ |
| 267 | AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ |
| 268 | AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ |
| 269 | AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ |
| 270 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ |
| 271 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 272 | }; |
| 273 | |
| 274 | pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { |
| 275 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 276 | <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */ |
| 277 | AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */ |
Olof Johansson | fc20c6f | 2013-06-01 00:38:04 -0700 | [diff] [blame] | 278 | AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 279 | AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ |
| 280 | AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ |
| 281 | AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ |
| 282 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ |
| 283 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 284 | }; |
| 285 | }; |
| 286 | |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 287 | mmc0 { |
| 288 | pinctrl_mmc0_clk: mmc0_clk-0 { |
| 289 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 290 | <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 291 | }; |
| 292 | |
| 293 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { |
| 294 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 295 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ |
| 296 | AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 297 | }; |
| 298 | |
| 299 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { |
| 300 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 301 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ |
| 302 | AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ |
| 303 | AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 304 | }; |
| 305 | |
| 306 | pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { |
| 307 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 308 | <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */ |
| 309 | AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 310 | }; |
| 311 | |
| 312 | pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { |
| 313 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 314 | <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */ |
| 315 | AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */ |
| 316 | AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 317 | }; |
| 318 | }; |
| 319 | |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 320 | ssc0 { |
| 321 | pinctrl_ssc0_tx: ssc0_tx-0 { |
| 322 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 323 | <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ |
| 324 | AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */ |
| 325 | AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 326 | }; |
| 327 | |
| 328 | pinctrl_ssc0_rx: ssc0_rx-0 { |
| 329 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 330 | <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */ |
| 331 | AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */ |
| 332 | AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */ |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 333 | }; |
| 334 | }; |
| 335 | |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 336 | spi0 { |
| 337 | pinctrl_spi0: spi0-0 { |
| 338 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 339 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */ |
| 340 | AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */ |
| 341 | AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */ |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 342 | }; |
| 343 | }; |
| 344 | |
| 345 | spi1 { |
| 346 | pinctrl_spi1: spi1-0 { |
| 347 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 348 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */ |
| 349 | AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */ |
| 350 | AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */ |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 351 | }; |
| 352 | }; |
| 353 | |
Jean-Christophe PLAGNIOL-VILLARD | f89ae61 | 2013-05-26 16:55:59 +0800 | [diff] [blame] | 354 | i2c_gpio0 { |
| 355 | pinctrl_i2c_gpio0: i2c_gpio0-0 { |
| 356 | atmel,pins = |
| 357 | <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE |
| 358 | AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; |
| 359 | }; |
| 360 | }; |
| 361 | |
Boris BREZILLON | 028633c | 2013-05-24 10:05:56 +0000 | [diff] [blame] | 362 | tcb0 { |
| 363 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { |
| 364 | atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; |
| 365 | }; |
| 366 | |
| 367 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { |
| 368 | atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 369 | }; |
| 370 | |
| 371 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { |
| 372 | atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 373 | }; |
| 374 | |
| 375 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { |
| 376 | atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; |
| 377 | }; |
| 378 | |
| 379 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { |
| 380 | atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; |
| 381 | }; |
| 382 | |
| 383 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { |
| 384 | atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; |
| 385 | }; |
| 386 | |
| 387 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { |
| 388 | atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 389 | }; |
| 390 | |
| 391 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { |
| 392 | atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; |
| 393 | }; |
| 394 | |
| 395 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { |
| 396 | atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; |
| 397 | }; |
| 398 | }; |
| 399 | |
| 400 | tcb1 { |
| 401 | pinctrl_tcb1_tclk0: tcb1_tclk0-0 { |
| 402 | atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 403 | }; |
| 404 | |
| 405 | pinctrl_tcb1_tclk1: tcb1_tclk1-0 { |
| 406 | atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 407 | }; |
| 408 | |
| 409 | pinctrl_tcb1_tclk2: tcb1_tclk2-0 { |
| 410 | atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 411 | }; |
| 412 | |
| 413 | pinctrl_tcb1_tioa0: tcb1_tioa0-0 { |
| 414 | atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 415 | }; |
| 416 | |
| 417 | pinctrl_tcb1_tioa1: tcb1_tioa1-0 { |
| 418 | atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 419 | }; |
| 420 | |
| 421 | pinctrl_tcb1_tioa2: tcb1_tioa2-0 { |
| 422 | atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 423 | }; |
| 424 | |
| 425 | pinctrl_tcb1_tiob0: tcb1_tiob0-0 { |
| 426 | atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 427 | }; |
| 428 | |
| 429 | pinctrl_tcb1_tiob1: tcb1_tiob1-0 { |
| 430 | atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 431 | }; |
| 432 | |
| 433 | pinctrl_tcb1_tiob2: tcb1_tiob2-0 { |
| 434 | atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 435 | }; |
| 436 | }; |
| 437 | |
| 438 | pioA: gpio@fffff400 { |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 439 | compatible = "atmel,at91rm9200-gpio"; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 440 | reg = <0xfffff400 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 441 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 442 | #gpio-cells = <2>; |
| 443 | gpio-controller; |
| 444 | interrupt-controller; |
| 445 | #interrupt-cells = <2>; |
| 446 | }; |
| 447 | |
| 448 | pioB: gpio@fffff600 { |
| 449 | compatible = "atmel,at91rm9200-gpio"; |
| 450 | reg = <0xfffff600 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 451 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 452 | #gpio-cells = <2>; |
| 453 | gpio-controller; |
| 454 | interrupt-controller; |
| 455 | #interrupt-cells = <2>; |
| 456 | }; |
| 457 | |
| 458 | pioC: gpio@fffff800 { |
| 459 | compatible = "atmel,at91rm9200-gpio"; |
| 460 | reg = <0xfffff800 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 461 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 462 | #gpio-cells = <2>; |
| 463 | gpio-controller; |
| 464 | interrupt-controller; |
| 465 | #interrupt-cells = <2>; |
| 466 | }; |
| 467 | }; |
| 468 | |
| 469 | dbgu: serial@fffff200 { |
| 470 | compatible = "atmel,at91sam9260-usart"; |
| 471 | reg = <0xfffff200 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 472 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 473 | pinctrl-names = "default"; |
| 474 | pinctrl-0 = <&pinctrl_dbgu>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 475 | status = "disabled"; |
| 476 | }; |
| 477 | |
| 478 | usart0: serial@fffb0000 { |
| 479 | compatible = "atmel,at91sam9260-usart"; |
| 480 | reg = <0xfffb0000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 481 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 482 | atmel,use-dma-rx; |
| 483 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 484 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 485 | pinctrl-0 = <&pinctrl_usart0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 486 | status = "disabled"; |
| 487 | }; |
| 488 | |
| 489 | usart1: serial@fffb4000 { |
| 490 | compatible = "atmel,at91sam9260-usart"; |
| 491 | reg = <0xfffb4000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 492 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 493 | atmel,use-dma-rx; |
| 494 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 495 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 496 | pinctrl-0 = <&pinctrl_usart1>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 497 | status = "disabled"; |
| 498 | }; |
| 499 | |
| 500 | usart2: serial@fffb8000 { |
| 501 | compatible = "atmel,at91sam9260-usart"; |
| 502 | reg = <0xfffb8000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 503 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 504 | atmel,use-dma-rx; |
| 505 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 506 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 507 | pinctrl-0 = <&pinctrl_usart2>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 508 | status = "disabled"; |
| 509 | }; |
| 510 | |
| 511 | usart3: serial@fffd0000 { |
| 512 | compatible = "atmel,at91sam9260-usart"; |
| 513 | reg = <0xfffd0000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 514 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 515 | atmel,use-dma-rx; |
| 516 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 517 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 518 | pinctrl-0 = <&pinctrl_usart3>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 519 | status = "disabled"; |
| 520 | }; |
| 521 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 522 | uart0: serial@fffd4000 { |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 523 | compatible = "atmel,at91sam9260-usart"; |
| 524 | reg = <0xfffd4000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 525 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 526 | atmel,use-dma-rx; |
| 527 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 528 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 529 | pinctrl-0 = <&pinctrl_uart0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 530 | status = "disabled"; |
| 531 | }; |
| 532 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 533 | uart1: serial@fffd8000 { |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 534 | compatible = "atmel,at91sam9260-usart"; |
| 535 | reg = <0xfffd8000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 536 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 537 | atmel,use-dma-rx; |
| 538 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 539 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 540 | pinctrl-0 = <&pinctrl_uart1>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 541 | status = "disabled"; |
| 542 | }; |
| 543 | |
| 544 | macb0: ethernet@fffc4000 { |
| 545 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| 546 | reg = <0xfffc4000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 547 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 548 | pinctrl-names = "default"; |
| 549 | pinctrl-0 = <&pinctrl_macb_rmii>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 550 | status = "disabled"; |
| 551 | }; |
| 552 | |
| 553 | usb1: gadget@fffa4000 { |
| 554 | compatible = "atmel,at91rm9200-udc"; |
| 555 | reg = <0xfffa4000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 556 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 557 | status = "disabled"; |
| 558 | }; |
Nicolas Ferre | 73d68d9 | 2012-05-16 17:37:06 +0200 | [diff] [blame] | 559 | |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 560 | i2c0: i2c@fffac000 { |
| 561 | compatible = "atmel,at91sam9260-i2c"; |
| 562 | reg = <0xfffac000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 563 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 564 | #address-cells = <1>; |
| 565 | #size-cells = <0>; |
| 566 | status = "disabled"; |
| 567 | }; |
| 568 | |
Ludovic Desroches | 9873137 | 2012-11-19 12:23:36 +0100 | [diff] [blame] | 569 | mmc0: mmc@fffa8000 { |
| 570 | compatible = "atmel,hsmci"; |
| 571 | reg = <0xfffa8000 0x600>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 572 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; |
Ludovic Desroches | 9873137 | 2012-11-19 12:23:36 +0100 | [diff] [blame] | 573 | #address-cells = <1>; |
| 574 | #size-cells = <0>; |
Jean-Christophe PLAGNIOL-VILLARD | 6e19c94 | 2013-07-15 12:05:19 +0200 | [diff] [blame] | 575 | pinctrl-names = "default"; |
Ludovic Desroches | 9873137 | 2012-11-19 12:23:36 +0100 | [diff] [blame] | 576 | status = "disabled"; |
| 577 | }; |
| 578 | |
Bo Shen | 099343c | 2012-11-07 11:41:41 +0800 | [diff] [blame] | 579 | ssc0: ssc@fffbc000 { |
| 580 | compatible = "atmel,at91rm9200-ssc"; |
| 581 | reg = <0xfffbc000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 582 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 583 | pinctrl-names = "default"; |
| 584 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; |
Linus Torvalds | 046e7d6 | 2012-12-13 11:51:23 -0800 | [diff] [blame] | 585 | status = "disabled"; |
Bo Shen | 099343c | 2012-11-07 11:41:41 +0800 | [diff] [blame] | 586 | }; |
| 587 | |
Richard Genoud | d50f88a | 2013-04-03 14:02:18 +0800 | [diff] [blame] | 588 | spi0: spi@fffc8000 { |
| 589 | #address-cells = <1>; |
| 590 | #size-cells = <0>; |
| 591 | compatible = "atmel,at91rm9200-spi"; |
| 592 | reg = <0xfffc8000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 593 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 594 | pinctrl-names = "default"; |
| 595 | pinctrl-0 = <&pinctrl_spi0>; |
Richard Genoud | d50f88a | 2013-04-03 14:02:18 +0800 | [diff] [blame] | 596 | status = "disabled"; |
| 597 | }; |
| 598 | |
| 599 | spi1: spi@fffcc000 { |
| 600 | #address-cells = <1>; |
| 601 | #size-cells = <0>; |
| 602 | compatible = "atmel,at91rm9200-spi"; |
| 603 | reg = <0xfffcc000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 604 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 605 | pinctrl-names = "default"; |
| 606 | pinctrl-0 = <&pinctrl_spi1>; |
Richard Genoud | d50f88a | 2013-04-03 14:02:18 +0800 | [diff] [blame] | 607 | status = "disabled"; |
| 608 | }; |
| 609 | |
Nicolas Ferre | 73d68d9 | 2012-05-16 17:37:06 +0200 | [diff] [blame] | 610 | adc0: adc@fffe0000 { |
| 611 | compatible = "atmel,at91sam9260-adc"; |
| 612 | reg = <0xfffe0000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 613 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>; |
Nicolas Ferre | 73d68d9 | 2012-05-16 17:37:06 +0200 | [diff] [blame] | 614 | atmel,adc-use-external-triggers; |
| 615 | atmel,adc-channels-used = <0xf>; |
| 616 | atmel,adc-vref = <3300>; |
| 617 | atmel,adc-num-channels = <4>; |
| 618 | atmel,adc-startup-time = <15>; |
| 619 | atmel,adc-channel-base = <0x30>; |
| 620 | atmel,adc-drdy-mask = <0x10000>; |
| 621 | atmel,adc-status-register = <0x1c>; |
| 622 | atmel,adc-trigger-register = <0x04>; |
Ludovic Desroches | 4b50da6 | 2013-03-29 10:13:19 +0100 | [diff] [blame] | 623 | atmel,adc-res = <8 10>; |
| 624 | atmel,adc-res-names = "lowres", "highres"; |
| 625 | atmel,adc-use-res = "highres"; |
Nicolas Ferre | 73d68d9 | 2012-05-16 17:37:06 +0200 | [diff] [blame] | 626 | |
| 627 | trigger@0 { |
| 628 | trigger-name = "timer-counter-0"; |
| 629 | trigger-value = <0x1>; |
| 630 | }; |
| 631 | trigger@1 { |
| 632 | trigger-name = "timer-counter-1"; |
| 633 | trigger-value = <0x3>; |
| 634 | }; |
| 635 | |
| 636 | trigger@2 { |
| 637 | trigger-name = "timer-counter-2"; |
| 638 | trigger-value = <0x5>; |
| 639 | }; |
| 640 | |
| 641 | trigger@3 { |
| 642 | trigger-name = "external"; |
| 643 | trigger-value = <0x13>; |
| 644 | trigger-external; |
| 645 | }; |
| 646 | }; |
Fabio Porcedda | 7492e7c | 2012-11-12 09:37:26 +0100 | [diff] [blame] | 647 | |
| 648 | watchdog@fffffd40 { |
| 649 | compatible = "atmel,at91sam9260-wdt"; |
| 650 | reg = <0xfffffd40 0x10>; |
| 651 | status = "disabled"; |
| 652 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 653 | }; |
| 654 | |
| 655 | nand0: nand@40000000 { |
| 656 | compatible = "atmel,at91rm9200-nand"; |
| 657 | #address-cells = <1>; |
| 658 | #size-cells = <1>; |
| 659 | reg = <0x40000000 0x10000000 |
| 660 | 0xffffe800 0x200 |
| 661 | >; |
| 662 | atmel,nand-addr-offset = <21>; |
| 663 | atmel,nand-cmd-offset = <22>; |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 664 | pinctrl-names = "default"; |
| 665 | pinctrl-0 = <&pinctrl_nand>; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 666 | gpios = <&pioC 13 GPIO_ACTIVE_HIGH |
| 667 | &pioC 14 GPIO_ACTIVE_HIGH |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 668 | 0 |
| 669 | >; |
| 670 | status = "disabled"; |
| 671 | }; |
| 672 | |
| 673 | usb0: ohci@00500000 { |
| 674 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
| 675 | reg = <0x00500000 0x100000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 676 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 677 | status = "disabled"; |
| 678 | }; |
| 679 | }; |
| 680 | |
| 681 | i2c@0 { |
| 682 | compatible = "i2c-gpio"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 683 | gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */ |
| 684 | &pioA 24 GPIO_ACTIVE_HIGH /* scl */ |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 685 | >; |
| 686 | i2c-gpio,sda-open-drain; |
| 687 | i2c-gpio,scl-open-drain; |
| 688 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ |
| 689 | #address-cells = <1>; |
| 690 | #size-cells = <0>; |
Jean-Christophe PLAGNIOL-VILLARD | f89ae61 | 2013-05-26 16:55:59 +0800 | [diff] [blame] | 691 | pinctrl-names = "default"; |
| 692 | pinctrl-0 = <&pinctrl_i2c_gpio0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 693 | status = "disabled"; |
| 694 | }; |
| 695 | }; |