blob: 48554da7a11c8eb9b9fdbec162480786448c9306 [file] [log] [blame]
Johannes Berg8ca151b2013-01-24 14:25:36 +01001/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +02008 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8ca151b2013-01-24 14:25:36 +01009 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
Emmanuel Grumbach410dc5a2013-02-18 09:22:28 +020025 * in the file called COPYING.
Johannes Berg8ca151b2013-01-24 14:25:36 +010026 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +020033 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8ca151b2013-01-24 14:25:36 +010034 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
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44 * the documentation and/or other materials provided with the
45 * distribution.
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48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63
64#ifndef __fw_api_h__
65#define __fw_api_h__
66
67#include "fw-api-rs.h"
68#include "fw-api-tx.h"
69#include "fw-api-sta.h"
70#include "fw-api-mac.h"
71#include "fw-api-power.h"
72#include "fw-api-d3.h"
Emmanuel Grumbach5b7ff612014-03-11 19:27:45 +020073#include "fw-api-coex.h"
Johannes Berg8ca151b2013-01-24 14:25:36 +010074
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020075/* maximal number of Tx queues in any platform */
76#define IWL_MVM_MAX_QUEUES 20
77
78/* Tx queue numbers */
Johannes Berg8ca151b2013-01-24 14:25:36 +010079enum {
80 IWL_MVM_OFFCHANNEL_QUEUE = 8,
81 IWL_MVM_CMD_QUEUE = 9,
Johannes Berg8ca151b2013-01-24 14:25:36 +010082};
83
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020084#define IWL_MVM_CMD_FIFO 7
85
Johannes Berg8ca151b2013-01-24 14:25:36 +010086#define IWL_MVM_STATION_COUNT 16
87
88/* commands */
89enum {
90 MVM_ALIVE = 0x1,
91 REPLY_ERROR = 0x2,
92
93 INIT_COMPLETE_NOTIF = 0x4,
94
95 /* PHY context commands */
96 PHY_CONTEXT_CMD = 0x8,
97 DBG_CFG = 0x9,
Emmanuel Grumbachb9fae2d2014-02-17 11:24:10 +020098 ANTENNA_COUPLING_NOTIFICATION = 0xa,
Johannes Berg8ca151b2013-01-24 14:25:36 +010099
100 /* station table */
Max Stepanov5a258aa2013-04-07 09:11:21 +0300101 ADD_STA_KEY = 0x17,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100102 ADD_STA = 0x18,
103 REMOVE_STA = 0x19,
104
105 /* TX */
106 TX_CMD = 0x1c,
107 TXPATH_FLUSH = 0x1e,
108 MGMT_MCAST_KEY = 0x1f,
109
110 /* global key */
111 WEP_KEY = 0x20,
112
113 /* MAC and Binding commands */
114 MAC_CONTEXT_CMD = 0x28,
115 TIME_EVENT_CMD = 0x29, /* both CMD and response */
116 TIME_EVENT_NOTIFICATION = 0x2a,
117 BINDING_CONTEXT_CMD = 0x2b,
118 TIME_QUOTA_CMD = 0x2c,
Johannes Berg4ac6cb52013-08-08 09:30:13 +0200119 NON_QOS_TX_COUNTER_CMD = 0x2d,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100120
121 LQ_CMD = 0x4e,
122
123 /* Calibration */
124 TEMPERATURE_NOTIFICATION = 0x62,
125 CALIBRATION_CFG_CMD = 0x65,
126 CALIBRATION_RES_NOTIFICATION = 0x66,
127 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
128 RADIO_VERSION_NOTIFICATION = 0x68,
129
130 /* Scan offload */
131 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
132 SCAN_OFFLOAD_ABORT_CMD = 0x52,
133 SCAN_OFFLOAD_COMPLETE = 0x6D,
134 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
135 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
David Spinadel35a000b2013-08-28 09:29:43 +0300136 MATCH_FOUND_NOTIFICATION = 0xd9,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100137
138 /* Phy */
139 PHY_CONFIGURATION_CMD = 0x6a,
140 CALIB_RES_NOTIF_PHY_DB = 0x6b,
141 /* PHY_DB_CMD = 0x6c, */
142
Alexander Bondare811ada2013-03-10 15:29:44 +0200143 /* Power - legacy power table command */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100144 POWER_TABLE_CMD = 0x77,
Alexander Bondar175a70b2013-04-14 20:59:37 +0300145 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100146
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +0300147 /* Thermal Throttling*/
148 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
149
Johannes Berg8ca151b2013-01-24 14:25:36 +0100150 /* Scanning */
151 SCAN_REQUEST_CMD = 0x80,
152 SCAN_ABORT_CMD = 0x81,
153 SCAN_START_NOTIFICATION = 0x82,
154 SCAN_RESULTS_NOTIFICATION = 0x83,
155 SCAN_COMPLETE_NOTIFICATION = 0x84,
156
157 /* NVM */
158 NVM_ACCESS_CMD = 0x88,
159
160 SET_CALIB_DEFAULT_CMD = 0x8e,
161
Ilan Peer571765c2013-03-05 15:26:03 +0200162 BEACON_NOTIFICATION = 0x90,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100163 BEACON_TEMPLATE_CMD = 0x91,
164 TX_ANT_CONFIGURATION_CMD = 0x98,
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200165 BT_CONFIG = 0x9b,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100166 STATISTICS_NOTIFICATION = 0x9d,
Johannes Berg3e56ead2013-02-15 22:23:18 +0100167 EOSP_NOTIFICATION = 0x9e,
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300168 REDUCE_TX_POWER_CMD = 0x9f,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100169
170 /* RF-KILL commands and notifications */
171 CARD_STATE_CMD = 0xa0,
172 CARD_STATE_NOTIFICATION = 0xa1,
173
Hila Gonend64048e2013-03-13 18:00:03 +0200174 MISSED_BEACONS_NOTIFICATION = 0xa2,
175
Alexander Bondare811ada2013-03-10 15:29:44 +0200176 /* Power - new power table command */
177 MAC_PM_POWER_TABLE = 0xa9,
178
Johannes Berg8ca151b2013-01-24 14:25:36 +0100179 REPLY_RX_PHY_CMD = 0xc0,
180 REPLY_RX_MPDU_CMD = 0xc1,
181 BA_NOTIF = 0xc5,
182
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200183 /* BT Coex */
184 BT_COEX_PRIO_TABLE = 0xcc,
185 BT_COEX_PROT_ENV = 0xcd,
186 BT_PROFILE_NOTIFICATION = 0xce,
Emmanuel Grumbachdac94da2013-06-18 07:35:27 +0300187 BT_COEX_CI = 0x5d,
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200188
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +0200189 REPLY_SF_CFG_CMD = 0xd1,
Hila Gonen7df15b12012-12-12 11:16:19 +0200190 REPLY_BEACON_FILTERING_CMD = 0xd2,
191
Johannes Berg8ca151b2013-01-24 14:25:36 +0100192 REPLY_DEBUG_CMD = 0xf0,
193 DEBUG_LOG_MSG = 0xf7,
194
Eliad Pellerc87163b2014-01-08 10:11:11 +0200195 BCAST_FILTER_CMD = 0xcf,
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +0300196 MCAST_FILTER_CMD = 0xd0,
197
Johannes Berg8ca151b2013-01-24 14:25:36 +0100198 /* D3 commands/notifications */
199 D3_CONFIG_CMD = 0xd3,
200 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
201 OFFLOADS_QUERY_CMD = 0xd5,
202 REMOTE_WAKE_CONFIG_CMD = 0xd6,
Arik Nemtsov98ee7782013-10-02 16:58:09 +0300203 D0I3_END_CMD = 0xed,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100204
205 /* for WoWLAN in particular */
206 WOWLAN_PATTERNS = 0xe0,
207 WOWLAN_CONFIGURATION = 0xe1,
208 WOWLAN_TSC_RSC_PARAM = 0xe2,
209 WOWLAN_TKIP_PARAM = 0xe3,
210 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
211 WOWLAN_GET_STATUSES = 0xe5,
212 WOWLAN_TX_POWER_PER_DB = 0xe6,
213
214 /* and for NetDetect */
215 NET_DETECT_CONFIG_CMD = 0x54,
216 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
217 NET_DETECT_PROFILES_CMD = 0x57,
218 NET_DETECT_HOTSPOTS_CMD = 0x58,
219 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
220
221 REPLY_MAX = 0xff,
222};
223
224/**
225 * struct iwl_cmd_response - generic response struct for most commands
226 * @status: status of the command asked, changes for each one
227 */
228struct iwl_cmd_response {
229 __le32 status;
230};
231
232/*
233 * struct iwl_tx_ant_cfg_cmd
234 * @valid: valid antenna configuration
235 */
236struct iwl_tx_ant_cfg_cmd {
237 __le32 valid;
238} __packed;
239
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300240/**
241 * struct iwl_reduce_tx_power_cmd - TX power reduction command
242 * REDUCE_TX_POWER_CMD = 0x9f
243 * @flags: (reserved for future implementation)
244 * @mac_context_id: id of the mac ctx for which we are reducing TX power.
245 * @pwr_restriction: TX power restriction in dBms.
246 */
247struct iwl_reduce_tx_power_cmd {
248 u8 flags;
249 u8 mac_context_id;
250 __le16 pwr_restriction;
251} __packed; /* TX_REDUCED_POWER_API_S_VER_1 */
252
Johannes Berg8ca151b2013-01-24 14:25:36 +0100253/*
254 * Calibration control struct.
255 * Sent as part of the phy configuration command.
256 * @flow_trigger: bitmap for which calibrations to perform according to
257 * flow triggers.
258 * @event_trigger: bitmap for which calibrations to perform according to
259 * event triggers.
260 */
261struct iwl_calib_ctrl {
262 __le32 flow_trigger;
263 __le32 event_trigger;
264} __packed;
265
266/* This enum defines the bitmap of various calibrations to enable in both
267 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
268 */
269enum iwl_calib_cfg {
270 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
271 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
272 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
273 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
274 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
275 IWL_CALIB_CFG_DC_IDX = BIT(5),
276 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
277 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
278 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
279 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
280 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
281 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
282 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
283 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
284 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
285 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
286 IWL_CALIB_CFG_DAC_IDX = BIT(16),
287 IWL_CALIB_CFG_ABS_IDX = BIT(17),
288 IWL_CALIB_CFG_AGC_IDX = BIT(18),
289};
290
291/*
292 * Phy configuration command.
293 */
294struct iwl_phy_cfg_cmd {
295 __le32 phy_cfg;
296 struct iwl_calib_ctrl calib_control;
297} __packed;
298
299#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
300#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
301#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
302#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
303#define PHY_CFG_TX_CHAIN_A BIT(8)
304#define PHY_CFG_TX_CHAIN_B BIT(9)
305#define PHY_CFG_TX_CHAIN_C BIT(10)
306#define PHY_CFG_RX_CHAIN_A BIT(12)
307#define PHY_CFG_RX_CHAIN_B BIT(13)
308#define PHY_CFG_RX_CHAIN_C BIT(14)
309
310
311/* Target of the NVM_ACCESS_CMD */
312enum {
313 NVM_ACCESS_TARGET_CACHE = 0,
314 NVM_ACCESS_TARGET_OTP = 1,
315 NVM_ACCESS_TARGET_EEPROM = 2,
316};
317
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200318/* Section types for NVM_ACCESS_CMD */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100319enum {
Eran Hararyae2b21b2014-01-09 08:08:24 +0200320 NVM_SECTION_TYPE_SW = 1,
Eran Harary77db0a32014-02-04 14:21:38 +0200321 NVM_SECTION_TYPE_REGULATORY = 3,
Eran Hararyae2b21b2014-01-09 08:08:24 +0200322 NVM_SECTION_TYPE_CALIBRATION = 4,
323 NVM_SECTION_TYPE_PRODUCTION = 5,
Eran Harary77db0a32014-02-04 14:21:38 +0200324 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
325 NVM_MAX_NUM_SECTIONS = 12,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100326};
327
328/**
329 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
330 * @op_code: 0 - read, 1 - write
331 * @target: NVM_ACCESS_TARGET_*
332 * @type: NVM_SECTION_TYPE_*
333 * @offset: offset in bytes into the section
334 * @length: in bytes, to read/write
335 * @data: if write operation, the data to write. On read its empty
336 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200337struct iwl_nvm_access_cmd {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100338 u8 op_code;
339 u8 target;
340 __le16 type;
341 __le16 offset;
342 __le16 length;
343 u8 data[];
344} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
345
346/**
347 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
348 * @offset: offset in bytes into the section
349 * @length: in bytes, either how much was written or read
350 * @type: NVM_SECTION_TYPE_*
351 * @status: 0 for success, fail otherwise
352 * @data: if read operation, the data returned. Empty on write.
353 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200354struct iwl_nvm_access_resp {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100355 __le16 offset;
356 __le16 length;
357 __le16 type;
358 __le16 status;
359 u8 data[];
360} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
361
362/* MVM_ALIVE 0x1 */
363
364/* alive response is_valid values */
365#define ALIVE_RESP_UCODE_OK BIT(0)
366#define ALIVE_RESP_RFKILL BIT(1)
367
368/* alive response ver_type values */
369enum {
370 FW_TYPE_HW = 0,
371 FW_TYPE_PROT = 1,
372 FW_TYPE_AP = 2,
373 FW_TYPE_WOWLAN = 3,
374 FW_TYPE_TIMING = 4,
375 FW_TYPE_WIPAN = 5
376};
377
378/* alive response ver_subtype values */
379enum {
380 FW_SUBTYPE_FULL_FEATURE = 0,
381 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
382 FW_SUBTYPE_REDUCED = 2,
383 FW_SUBTYPE_ALIVE_ONLY = 3,
384 FW_SUBTYPE_WOWLAN = 4,
385 FW_SUBTYPE_AP_SUBTYPE = 5,
386 FW_SUBTYPE_WIPAN = 6,
387 FW_SUBTYPE_INITIALIZE = 9
388};
389
390#define IWL_ALIVE_STATUS_ERR 0xDEAD
391#define IWL_ALIVE_STATUS_OK 0xCAFE
392
393#define IWL_ALIVE_FLG_RFKILL BIT(0)
394
395struct mvm_alive_resp {
396 __le16 status;
397 __le16 flags;
398 u8 ucode_minor;
399 u8 ucode_major;
400 __le16 id;
401 u8 api_minor;
402 u8 api_major;
403 u8 ver_subtype;
404 u8 ver_type;
405 u8 mac;
406 u8 opt;
407 __le16 reserved2;
408 __le32 timestamp;
409 __le32 error_event_table_ptr; /* SRAM address for error log */
410 __le32 log_event_table_ptr; /* SRAM address for event log */
411 __le32 cpu_register_ptr;
412 __le32 dbgm_config_ptr;
413 __le32 alive_counter_ptr;
414 __le32 scd_base_ptr; /* SRAM address for SCD */
415} __packed; /* ALIVE_RES_API_S_VER_1 */
416
Eran Harary01a9ca52014-02-03 09:29:57 +0200417struct mvm_alive_resp_ver2 {
418 __le16 status;
419 __le16 flags;
420 u8 ucode_minor;
421 u8 ucode_major;
422 __le16 id;
423 u8 api_minor;
424 u8 api_major;
425 u8 ver_subtype;
426 u8 ver_type;
427 u8 mac;
428 u8 opt;
429 __le16 reserved2;
430 __le32 timestamp;
431 __le32 error_event_table_ptr; /* SRAM address for error log */
432 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
433 __le32 cpu_register_ptr;
434 __le32 dbgm_config_ptr;
435 __le32 alive_counter_ptr;
436 __le32 scd_base_ptr; /* SRAM address for SCD */
437 __le32 st_fwrd_addr; /* pointer to Store and forward */
438 __le32 st_fwrd_size;
439 u8 umac_minor; /* UMAC version: minor */
440 u8 umac_major; /* UMAC version: major */
441 __le16 umac_id; /* UMAC version: id */
442 __le32 error_info_addr; /* SRAM address for UMAC error log */
443 __le32 dbg_print_buff_addr;
444} __packed; /* ALIVE_RES_API_S_VER_2 */
445
Johannes Berg8ca151b2013-01-24 14:25:36 +0100446/* Error response/notification */
447enum {
448 FW_ERR_UNKNOWN_CMD = 0x0,
449 FW_ERR_INVALID_CMD_PARAM = 0x1,
450 FW_ERR_SERVICE = 0x2,
451 FW_ERR_ARC_MEMORY = 0x3,
452 FW_ERR_ARC_CODE = 0x4,
453 FW_ERR_WATCH_DOG = 0x5,
454 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
455 FW_ERR_WEP_KEY_SIZE = 0x11,
456 FW_ERR_OBSOLETE_FUNC = 0x12,
457 FW_ERR_UNEXPECTED = 0xFE,
458 FW_ERR_FATAL = 0xFF
459};
460
461/**
462 * struct iwl_error_resp - FW error indication
463 * ( REPLY_ERROR = 0x2 )
464 * @error_type: one of FW_ERR_*
465 * @cmd_id: the command ID for which the error occured
466 * @bad_cmd_seq_num: sequence number of the erroneous command
467 * @error_service: which service created the error, applicable only if
468 * error_type = 2, otherwise 0
469 * @timestamp: TSF in usecs.
470 */
471struct iwl_error_resp {
472 __le32 error_type;
473 u8 cmd_id;
474 u8 reserved1;
475 __le16 bad_cmd_seq_num;
476 __le32 error_service;
477 __le64 timestamp;
478} __packed;
479
480
481/* Common PHY, MAC and Bindings definitions */
482
483#define MAX_MACS_IN_BINDING (3)
484#define MAX_BINDINGS (4)
485#define AUX_BINDING_INDEX (3)
486#define MAX_PHYS (4)
487
488/* Used to extract ID and color from the context dword */
489#define FW_CTXT_ID_POS (0)
490#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
491#define FW_CTXT_COLOR_POS (8)
492#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
493#define FW_CTXT_INVALID (0xffffffff)
494
495#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
496 (_color << FW_CTXT_COLOR_POS))
497
498/* Possible actions on PHYs, MACs and Bindings */
499enum {
500 FW_CTXT_ACTION_STUB = 0,
501 FW_CTXT_ACTION_ADD,
502 FW_CTXT_ACTION_MODIFY,
503 FW_CTXT_ACTION_REMOVE,
504 FW_CTXT_ACTION_NUM
505}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
506
507/* Time Events */
508
509/* Time Event types, according to MAC type */
510enum iwl_time_event_type {
511 /* BSS Station Events */
512 TE_BSS_STA_AGGRESSIVE_ASSOC,
513 TE_BSS_STA_ASSOC,
514 TE_BSS_EAP_DHCP_PROT,
515 TE_BSS_QUIET_PERIOD,
516
517 /* P2P Device Events */
518 TE_P2P_DEVICE_DISCOVERABLE,
519 TE_P2P_DEVICE_LISTEN,
520 TE_P2P_DEVICE_ACTION_SCAN,
521 TE_P2P_DEVICE_FULL_SCAN,
522
523 /* P2P Client Events */
524 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
525 TE_P2P_CLIENT_ASSOC,
526 TE_P2P_CLIENT_QUIET_PERIOD,
527
528 /* P2P GO Events */
529 TE_P2P_GO_ASSOC_PROT,
530 TE_P2P_GO_REPETITIVE_NOA,
531 TE_P2P_GO_CT_WINDOW,
532
533 /* WiDi Sync Events */
534 TE_WIDI_TX_SYNC,
535
536 TE_MAX
537}; /* MAC_EVENT_TYPE_API_E_VER_1 */
538
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300539
540
541/* Time event - defines for command API v1 */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100542
543/*
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300544 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
545 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
546 * the first fragment is scheduled.
547 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
548 * the first 2 fragments are scheduled.
549 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
550 * number of fragments are valid.
Johannes Berg8ca151b2013-01-24 14:25:36 +0100551 *
552 * Other than the constant defined above, specifying a fragmentation value 'x'
553 * means that the event can be fragmented but only the first 'x' will be
554 * scheduled.
555 */
556enum {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300557 TE_V1_FRAG_NONE = 0,
558 TE_V1_FRAG_SINGLE = 1,
559 TE_V1_FRAG_DUAL = 2,
560 TE_V1_FRAG_ENDLESS = 0xffffffff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100561};
562
Johannes Berg8ca151b2013-01-24 14:25:36 +0100563/* If a Time Event can be fragmented, this is the max number of fragments */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300564#define TE_V1_FRAG_MAX_MSK 0x0fffffff
565/* Repeat the time event endlessly (until removed) */
566#define TE_V1_REPEAT_ENDLESS 0xffffffff
567/* If a Time Event has bounded repetitions, this is the maximal value */
568#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
569
570/* Time Event dependencies: none, on another TE, or in a specific time */
571enum {
572 TE_V1_INDEPENDENT = 0,
573 TE_V1_DEP_OTHER = BIT(0),
574 TE_V1_DEP_TSF = BIT(1),
575 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
576}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
577
578/*
579 * @TE_V1_NOTIF_NONE: no notifications
580 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
581 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
582 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
583 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
584 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
585 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
586 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
587 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
588 *
589 * Supported Time event notifications configuration.
590 * A notification (both event and fragment) includes a status indicating weather
591 * the FW was able to schedule the event or not. For fragment start/end
592 * notification the status is always success. There is no start/end fragment
593 * notification for monolithic events.
594 */
595enum {
596 TE_V1_NOTIF_NONE = 0,
597 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
598 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
599 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
600 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
601 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
602 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
603 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
604 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
605}; /* MAC_EVENT_ACTION_API_E_VER_2 */
606
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300607/* Time event - defines for command API */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300608
609/*
610 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
611 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
612 * the first fragment is scheduled.
613 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
614 * the first 2 fragments are scheduled.
615 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
616 * number of fragments are valid.
617 *
618 * Other than the constant defined above, specifying a fragmentation value 'x'
619 * means that the event can be fragmented but only the first 'x' will be
620 * scheduled.
621 */
622enum {
623 TE_V2_FRAG_NONE = 0,
624 TE_V2_FRAG_SINGLE = 1,
625 TE_V2_FRAG_DUAL = 2,
626 TE_V2_FRAG_MAX = 0xfe,
627 TE_V2_FRAG_ENDLESS = 0xff
628};
629
630/* Repeat the time event endlessly (until removed) */
631#define TE_V2_REPEAT_ENDLESS 0xff
632/* If a Time Event has bounded repetitions, this is the maximal value */
633#define TE_V2_REPEAT_MAX 0xfe
634
635#define TE_V2_PLACEMENT_POS 12
636#define TE_V2_ABSENCE_POS 15
637
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300638/* Time event policy values
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300639 * A notification (both event and fragment) includes a status indicating weather
640 * the FW was able to schedule the event or not. For fragment start/end
641 * notification the status is always success. There is no start/end fragment
642 * notification for monolithic events.
643 *
644 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
645 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
646 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
647 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
648 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
649 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
650 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
651 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
652 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
653 * @TE_V2_DEP_OTHER: depends on another time event
654 * @TE_V2_DEP_TSF: depends on a specific time
655 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
656 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
657 */
658enum {
659 TE_V2_DEFAULT_POLICY = 0x0,
660
661 /* notifications (event start/stop, fragment start/stop) */
662 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
663 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
664 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
665 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
666
667 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
668 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
669 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
670 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
Emmanuel Grumbach1f6bf072014-02-16 15:36:00 +0200671 T2_V2_START_IMMEDIATELY = BIT(11),
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300672
673 TE_V2_NOTIF_MSK = 0xff,
674
675 /* placement characteristics */
676 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
677 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
678 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
679
680 /* are we present or absent during the Time Event. */
681 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
682};
683
684/**
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300685 * struct iwl_time_event_cmd_api - configuring Time Events
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300686 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
687 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
688 * ( TIME_EVENT_CMD = 0x29 )
689 * @id_and_color: ID and color of the relevant MAC
690 * @action: action to perform, one of FW_CTXT_ACTION_*
691 * @id: this field has two meanings, depending on the action:
692 * If the action is ADD, then it means the type of event to add.
693 * For all other actions it is the unique event ID assigned when the
694 * event was added by the FW.
695 * @apply_time: When to start the Time Event (in GP2)
696 * @max_delay: maximum delay to event's start (apply time), in TU
697 * @depends_on: the unique ID of the event we depend on (if any)
698 * @interval: interval between repetitions, in TU
699 * @duration: duration of event in TU
700 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
701 * @max_frags: maximal number of fragments the Time Event can be divided to
702 * @policy: defines whether uCode shall notify the host or other uCode modules
703 * on event and/or fragment start and/or end
704 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
705 * TE_EVENT_SOCIOPATHIC
706 * using TE_ABSENCE and using TE_NOTIF_*
707 */
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300708struct iwl_time_event_cmd {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300709 /* COMMON_INDEX_HDR_API_S_VER_1 */
710 __le32 id_and_color;
711 __le32 action;
712 __le32 id;
713 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
714 __le32 apply_time;
715 __le32 max_delay;
716 __le32 depends_on;
717 __le32 interval;
718 __le32 duration;
719 u8 repeat;
720 u8 max_frags;
721 __le16 policy;
722} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
723
Johannes Berg8ca151b2013-01-24 14:25:36 +0100724/**
725 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
726 * @status: bit 0 indicates success, all others specify errors
727 * @id: the Time Event type
728 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
729 * @id_and_color: ID and color of the relevant MAC
730 */
731struct iwl_time_event_resp {
732 __le32 status;
733 __le32 id;
734 __le32 unique_id;
735 __le32 id_and_color;
736} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
737
738/**
739 * struct iwl_time_event_notif - notifications of time event start/stop
740 * ( TIME_EVENT_NOTIFICATION = 0x2a )
741 * @timestamp: action timestamp in GP2
742 * @session_id: session's unique id
743 * @unique_id: unique id of the Time Event itself
744 * @id_and_color: ID and color of the relevant MAC
745 * @action: one of TE_NOTIF_START or TE_NOTIF_END
746 * @status: true if scheduled, false otherwise (not executed)
747 */
748struct iwl_time_event_notif {
749 __le32 timestamp;
750 __le32 session_id;
751 __le32 unique_id;
752 __le32 id_and_color;
753 __le32 action;
754 __le32 status;
755} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
756
757
758/* Bindings and Time Quota */
759
760/**
761 * struct iwl_binding_cmd - configuring bindings
762 * ( BINDING_CONTEXT_CMD = 0x2b )
763 * @id_and_color: ID and color of the relevant Binding
764 * @action: action to perform, one of FW_CTXT_ACTION_*
765 * @macs: array of MAC id and colors which belong to the binding
766 * @phy: PHY id and color which belongs to the binding
767 */
768struct iwl_binding_cmd {
769 /* COMMON_INDEX_HDR_API_S_VER_1 */
770 __le32 id_and_color;
771 __le32 action;
772 /* BINDING_DATA_API_S_VER_1 */
773 __le32 macs[MAX_MACS_IN_BINDING];
774 __le32 phy;
775} __packed; /* BINDING_CMD_API_S_VER_1 */
776
Ilan Peer35adfd62013-02-04 13:16:24 +0200777/* The maximal number of fragments in the FW's schedule session */
778#define IWL_MVM_MAX_QUOTA 128
779
Johannes Berg8ca151b2013-01-24 14:25:36 +0100780/**
781 * struct iwl_time_quota_data - configuration of time quota per binding
782 * @id_and_color: ID and color of the relevant Binding
783 * @quota: absolute time quota in TU. The scheduler will try to divide the
784 * remainig quota (after Time Events) according to this quota.
785 * @max_duration: max uninterrupted context duration in TU
786 */
787struct iwl_time_quota_data {
788 __le32 id_and_color;
789 __le32 quota;
790 __le32 max_duration;
791} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
792
793/**
794 * struct iwl_time_quota_cmd - configuration of time quota between bindings
795 * ( TIME_QUOTA_CMD = 0x2c )
796 * @quotas: allocations per binding
797 */
798struct iwl_time_quota_cmd {
799 struct iwl_time_quota_data quotas[MAX_BINDINGS];
800} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
801
802
803/* PHY context */
804
805/* Supported bands */
806#define PHY_BAND_5 (0)
807#define PHY_BAND_24 (1)
808
809/* Supported channel width, vary if there is VHT support */
810#define PHY_VHT_CHANNEL_MODE20 (0x0)
811#define PHY_VHT_CHANNEL_MODE40 (0x1)
812#define PHY_VHT_CHANNEL_MODE80 (0x2)
813#define PHY_VHT_CHANNEL_MODE160 (0x3)
814
815/*
816 * Control channel position:
817 * For legacy set bit means upper channel, otherwise lower.
818 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
819 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
820 * center_freq
821 * |
822 * 40Mhz |_______|_______|
823 * 80Mhz |_______|_______|_______|_______|
824 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
825 * code 011 010 001 000 | 100 101 110 111
826 */
827#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
828#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
829#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
830#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
831#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
832#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
833#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
834#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
835
836/*
837 * @band: PHY_BAND_*
838 * @channel: channel number
839 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
840 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
841 */
842struct iwl_fw_channel_info {
843 u8 band;
844 u8 channel;
845 u8 width;
846 u8 ctrl_pos;
847} __packed;
848
849#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
850#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
851 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
852#define PHY_RX_CHAIN_VALID_POS (1)
853#define PHY_RX_CHAIN_VALID_MSK \
854 (0x7 << PHY_RX_CHAIN_VALID_POS)
855#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
856#define PHY_RX_CHAIN_FORCE_SEL_MSK \
857 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
858#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
859#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
860 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
861#define PHY_RX_CHAIN_CNT_POS (10)
862#define PHY_RX_CHAIN_CNT_MSK \
863 (0x3 << PHY_RX_CHAIN_CNT_POS)
864#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
865#define PHY_RX_CHAIN_MIMO_CNT_MSK \
866 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
867#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
868#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
869 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
870
871/* TODO: fix the value, make it depend on firmware at runtime? */
872#define NUM_PHY_CTX 3
873
874/* TODO: complete missing documentation */
875/**
876 * struct iwl_phy_context_cmd - config of the PHY context
877 * ( PHY_CONTEXT_CMD = 0x8 )
878 * @id_and_color: ID and color of the relevant Binding
879 * @action: action to perform, one of FW_CTXT_ACTION_*
880 * @apply_time: 0 means immediate apply and context switch.
881 * other value means apply new params after X usecs
882 * @tx_param_color: ???
883 * @channel_info:
884 * @txchain_info: ???
885 * @rxchain_info: ???
886 * @acquisition_data: ???
887 * @dsp_cfg_flags: set to 0
888 */
889struct iwl_phy_context_cmd {
890 /* COMMON_INDEX_HDR_API_S_VER_1 */
891 __le32 id_and_color;
892 __le32 action;
893 /* PHY_CONTEXT_DATA_API_S_VER_1 */
894 __le32 apply_time;
895 __le32 tx_param_color;
896 struct iwl_fw_channel_info ci;
897 __le32 txchain_info;
898 __le32 rxchain_info;
899 __le32 acquisition_data;
900 __le32 dsp_cfg_flags;
901} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
902
903#define IWL_RX_INFO_PHY_CNT 8
Avri Altmana2d7b872013-07-09 01:42:17 +0300904#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
905#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
906#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
907#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
908#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
909#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
910#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
911
Johannes Berg8ca151b2013-01-24 14:25:36 +0100912#define IWL_RX_INFO_AGC_IDX 1
913#define IWL_RX_INFO_RSSI_AB_IDX 2
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200914#define IWL_OFDM_AGC_A_MSK 0x0000007f
915#define IWL_OFDM_AGC_A_POS 0
916#define IWL_OFDM_AGC_B_MSK 0x00003f80
917#define IWL_OFDM_AGC_B_POS 7
918#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
919#define IWL_OFDM_AGC_CODE_POS 20
Johannes Berg8ca151b2013-01-24 14:25:36 +0100920#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100921#define IWL_OFDM_RSSI_A_POS 0
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200922#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
923#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
Johannes Berg8ca151b2013-01-24 14:25:36 +0100924#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
Johannes Berg8ca151b2013-01-24 14:25:36 +0100925#define IWL_OFDM_RSSI_B_POS 16
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200926#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
927#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
Johannes Berg8ca151b2013-01-24 14:25:36 +0100928
929/**
930 * struct iwl_rx_phy_info - phy info
931 * (REPLY_RX_PHY_CMD = 0xc0)
932 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
933 * @cfg_phy_cnt: configurable DSP phy data byte count
934 * @stat_id: configurable DSP phy data set ID
935 * @reserved1:
936 * @system_timestamp: GP2 at on air rise
937 * @timestamp: TSF at on air rise
938 * @beacon_time_stamp: beacon at on-air rise
939 * @phy_flags: general phy flags: band, modulation, ...
940 * @channel: channel number
941 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
942 * @rate_n_flags: RATE_MCS_*
943 * @byte_count: frame's byte-count
944 * @frame_time: frame's time on the air, based on byte count and frame rate
945 * calculation
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +0200946 * @mac_active_msk: what MACs were active when the frame was received
Johannes Berg8ca151b2013-01-24 14:25:36 +0100947 *
948 * Before each Rx, the device sends this data. It contains PHY information
949 * about the reception of the packet.
950 */
951struct iwl_rx_phy_info {
952 u8 non_cfg_phy_cnt;
953 u8 cfg_phy_cnt;
954 u8 stat_id;
955 u8 reserved1;
956 __le32 system_timestamp;
957 __le64 timestamp;
958 __le32 beacon_time_stamp;
959 __le16 phy_flags;
960 __le16 channel;
961 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
962 __le32 rate_n_flags;
963 __le32 byte_count;
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +0200964 __le16 mac_active_msk;
Johannes Berg8ca151b2013-01-24 14:25:36 +0100965 __le16 frame_time;
966} __packed;
967
968struct iwl_rx_mpdu_res_start {
969 __le16 byte_count;
970 __le16 reserved;
971} __packed;
972
973/**
974 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
975 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
976 * @RX_RES_PHY_FLAGS_MOD_CCK:
977 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
978 * @RX_RES_PHY_FLAGS_NARROW_BAND:
979 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
980 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
981 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
982 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
983 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
984 */
985enum iwl_rx_phy_flags {
986 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
987 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
988 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
989 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
990 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
991 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
992 RX_RES_PHY_FLAGS_AGG = BIT(7),
993 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
994 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
995 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
996};
997
998/**
999 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1000 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1001 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1002 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1003 * @RX_MPDU_RES_STATUS_KEY_VALID:
1004 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1005 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1006 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1007 * in the driver.
1008 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1009 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1010 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1011 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1012 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1013 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1014 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1015 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1016 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1017 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1018 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1019 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1020 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1021 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1022 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1023 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1024 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1025 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1026 * @RX_MPDU_RES_STATUS_RRF_KILL:
1027 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1028 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1029 */
1030enum iwl_mvm_rx_status {
1031 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1032 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1033 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1034 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1035 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1036 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1037 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1038 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1039 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1040 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1041 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1042 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1043 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
Max Stepanove36e5432013-08-27 19:56:13 +03001044 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
Johannes Berg8ca151b2013-01-24 14:25:36 +01001045 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1046 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1047 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1048 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1049 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1050 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1051 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1052 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1053 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1054 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1055 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1056 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1057 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1058};
1059
1060/**
1061 * struct iwl_radio_version_notif - information on the radio version
1062 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1063 * @radio_flavor:
1064 * @radio_step:
1065 * @radio_dash:
1066 */
1067struct iwl_radio_version_notif {
1068 __le32 radio_flavor;
1069 __le32 radio_step;
1070 __le32 radio_dash;
1071} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1072
1073enum iwl_card_state_flags {
1074 CARD_ENABLED = 0x00,
1075 HW_CARD_DISABLED = 0x01,
1076 SW_CARD_DISABLED = 0x02,
1077 CT_KILL_CARD_DISABLED = 0x04,
1078 HALT_CARD_DISABLED = 0x08,
1079 CARD_DISABLED_MSK = 0x0f,
1080 CARD_IS_RX_ON = 0x10,
1081};
1082
1083/**
1084 * struct iwl_radio_version_notif - information on the radio version
1085 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1086 * @flags: %iwl_card_state_flags
1087 */
1088struct iwl_card_state_notif {
1089 __le32 flags;
1090} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1091
1092/**
Hila Gonend64048e2013-03-13 18:00:03 +02001093 * struct iwl_missed_beacons_notif - information on missed beacons
1094 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1095 * @mac_id: interface ID
1096 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1097 * beacons since last RX.
1098 * @consec_missed_beacons: number of consecutive missed beacons
1099 * @num_expected_beacons:
1100 * @num_recvd_beacons:
1101 */
1102struct iwl_missed_beacons_notif {
1103 __le32 mac_id;
1104 __le32 consec_missed_beacons_since_last_rx;
1105 __le32 consec_missed_beacons;
1106 __le32 num_expected_beacons;
1107 __le32 num_recvd_beacons;
1108} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1109
1110/**
Johannes Berg8ca151b2013-01-24 14:25:36 +01001111 * struct iwl_set_calib_default_cmd - set default value for calibration.
1112 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1113 * @calib_index: the calibration to set value for
1114 * @length: of data
1115 * @data: the value to set for the calibration result
1116 */
1117struct iwl_set_calib_default_cmd {
1118 __le16 calib_index;
1119 __le16 length;
1120 u8 data[0];
1121} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1122
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001123#define MAX_PORT_ID_NUM 2
Eliad Pellere59647e2013-11-28 14:08:50 +02001124#define MAX_MCAST_FILTERING_ADDRESSES 256
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001125
1126/**
1127 * struct iwl_mcast_filter_cmd - configure multicast filter.
1128 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1129 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1130 * to identify network interface adopted in host-device IF.
1131 * It is used by FW as index in array of addresses. This array has
1132 * MAX_PORT_ID_NUM members.
1133 * @count: Number of MAC addresses in the array
1134 * @pass_all: Set 1 to pass all multicast packets.
1135 * @bssid: current association BSSID.
1136 * @addr_list: Place holder for array of MAC addresses.
1137 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1138 */
1139struct iwl_mcast_filter_cmd {
1140 u8 filter_own;
1141 u8 port_id;
1142 u8 count;
1143 u8 pass_all;
1144 u8 bssid[6];
1145 u8 reserved[2];
1146 u8 addr_list[0];
1147} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1148
Eliad Pellerc87163b2014-01-08 10:11:11 +02001149#define MAX_BCAST_FILTERS 8
1150#define MAX_BCAST_FILTER_ATTRS 2
1151
1152/**
1153 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1154 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1155 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1156 * start of ip payload).
1157 */
1158enum iwl_mvm_bcast_filter_attr_offset {
1159 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1160 BCAST_FILTER_OFFSET_IP_END = 1,
1161};
1162
1163/**
1164 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1165 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1166 * @offset: starting offset of this pattern.
1167 * @val: value to match - big endian (MSB is the first
1168 * byte to match from offset pos).
1169 * @mask: mask to match (big endian).
1170 */
1171struct iwl_fw_bcast_filter_attr {
1172 u8 offset_type;
1173 u8 offset;
1174 __le16 reserved1;
1175 __be32 val;
1176 __be32 mask;
1177} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1178
1179/**
1180 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1181 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1182 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1183 */
1184enum iwl_mvm_bcast_filter_frame_type {
1185 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1186 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1187};
1188
1189/**
1190 * struct iwl_fw_bcast_filter - broadcast filter
1191 * @discard: discard frame (1) or let it pass (0).
1192 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1193 * @num_attrs: number of valid attributes in this filter.
1194 * @attrs: attributes of this filter. a filter is considered matched
1195 * only when all its attributes are matched (i.e. AND relationship)
1196 */
1197struct iwl_fw_bcast_filter {
1198 u8 discard;
1199 u8 frame_type;
1200 u8 num_attrs;
1201 u8 reserved1;
1202 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1203} __packed; /* BCAST_FILTER_S_VER_1 */
1204
1205/**
1206 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1207 * @default_discard: default action for this mac (discard (1) / pass (0)).
1208 * @attached_filters: bitmap of relevant filters for this mac.
1209 */
1210struct iwl_fw_bcast_mac {
1211 u8 default_discard;
1212 u8 reserved1;
1213 __le16 attached_filters;
1214} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1215
1216/**
1217 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1218 * @disable: enable (0) / disable (1)
1219 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1220 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1221 * @filters: broadcast filters
1222 * @macs: broadcast filtering configuration per-mac
1223 */
1224struct iwl_bcast_filter_cmd {
1225 u8 disable;
1226 u8 max_bcast_filters;
1227 u8 max_macs;
1228 u8 reserved1;
1229 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1230 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1231} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1232
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001233struct mvm_statistics_dbg {
1234 __le32 burst_check;
1235 __le32 burst_count;
1236 __le32 wait_for_silence_timeout_cnt;
1237 __le32 reserved[3];
1238} __packed; /* STATISTICS_DEBUG_API_S_VER_2 */
1239
1240struct mvm_statistics_div {
1241 __le32 tx_on_a;
1242 __le32 tx_on_b;
1243 __le32 exec_time;
1244 __le32 probe_time;
1245 __le32 rssi_ant;
1246 __le32 reserved2;
1247} __packed; /* STATISTICS_SLOW_DIV_API_S_VER_2 */
1248
1249struct mvm_statistics_general_common {
1250 __le32 temperature; /* radio temperature */
1251 __le32 temperature_m; /* radio voltage */
1252 struct mvm_statistics_dbg dbg;
1253 __le32 sleep_time;
1254 __le32 slots_out;
1255 __le32 slots_idle;
1256 __le32 ttl_timestamp;
1257 struct mvm_statistics_div div;
1258 __le32 rx_enable_counter;
1259 /*
1260 * num_of_sos_states:
1261 * count the number of times we have to re-tune
1262 * in order to get out of bad PHY status
1263 */
1264 __le32 num_of_sos_states;
1265} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1266
1267struct mvm_statistics_rx_non_phy {
1268 __le32 bogus_cts; /* CTS received when not expecting CTS */
1269 __le32 bogus_ack; /* ACK received when not expecting ACK */
1270 __le32 non_bssid_frames; /* number of frames with BSSID that
1271 * doesn't belong to the STA BSSID */
1272 __le32 filtered_frames; /* count frames that were dumped in the
1273 * filtering process */
1274 __le32 non_channel_beacons; /* beacons with our bss id but not on
1275 * our serving channel */
1276 __le32 channel_beacons; /* beacons with our bss id and in our
1277 * serving channel */
1278 __le32 num_missed_bcon; /* number of missed beacons */
1279 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
1280 * ADC was in saturation */
1281 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
1282 * for INA */
1283 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
1284 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
1285 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
1286 __le32 interference_data_flag; /* flag for interference data
1287 * availability. 1 when data is
1288 * available. */
1289 __le32 channel_load; /* counts RX Enable time in uSec */
1290 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
1291 * and CCK) counter */
1292 __le32 beacon_rssi_a;
1293 __le32 beacon_rssi_b;
1294 __le32 beacon_rssi_c;
1295 __le32 beacon_energy_a;
1296 __le32 beacon_energy_b;
1297 __le32 beacon_energy_c;
1298 __le32 num_bt_kills;
1299 __le32 mac_id;
1300 __le32 directed_data_mpdu;
1301} __packed; /* STATISTICS_RX_NON_PHY_API_S_VER_3 */
1302
1303struct mvm_statistics_rx_phy {
1304 __le32 ina_cnt;
1305 __le32 fina_cnt;
1306 __le32 plcp_err;
1307 __le32 crc32_err;
1308 __le32 overrun_err;
1309 __le32 early_overrun_err;
1310 __le32 crc32_good;
1311 __le32 false_alarm_cnt;
1312 __le32 fina_sync_err_cnt;
1313 __le32 sfd_timeout;
1314 __le32 fina_timeout;
1315 __le32 unresponded_rts;
1316 __le32 rxe_frame_limit_overrun;
1317 __le32 sent_ack_cnt;
1318 __le32 sent_cts_cnt;
1319 __le32 sent_ba_rsp_cnt;
1320 __le32 dsp_self_kill;
1321 __le32 mh_format_err;
1322 __le32 re_acq_main_rssi_sum;
1323 __le32 reserved;
1324} __packed; /* STATISTICS_RX_PHY_API_S_VER_2 */
1325
1326struct mvm_statistics_rx_ht_phy {
1327 __le32 plcp_err;
1328 __le32 overrun_err;
1329 __le32 early_overrun_err;
1330 __le32 crc32_good;
1331 __le32 crc32_err;
1332 __le32 mh_format_err;
1333 __le32 agg_crc32_good;
1334 __le32 agg_mpdu_cnt;
1335 __le32 agg_cnt;
1336 __le32 unsupport_mcs;
1337} __packed; /* STATISTICS_HT_RX_PHY_API_S_VER_1 */
1338
1339#define MAX_CHAINS 3
1340
1341struct mvm_statistics_tx_non_phy_agg {
1342 __le32 ba_timeout;
1343 __le32 ba_reschedule_frames;
1344 __le32 scd_query_agg_frame_cnt;
1345 __le32 scd_query_no_agg;
1346 __le32 scd_query_agg;
1347 __le32 scd_query_mismatch;
1348 __le32 frame_not_ready;
1349 __le32 underrun;
1350 __le32 bt_prio_kill;
1351 __le32 rx_ba_rsp_cnt;
1352 __s8 txpower[MAX_CHAINS];
1353 __s8 reserved;
1354 __le32 reserved2;
1355} __packed; /* STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */
1356
1357struct mvm_statistics_tx_channel_width {
1358 __le32 ext_cca_narrow_ch20[1];
1359 __le32 ext_cca_narrow_ch40[2];
1360 __le32 ext_cca_narrow_ch80[3];
1361 __le32 ext_cca_narrow_ch160[4];
1362 __le32 last_tx_ch_width_indx;
1363 __le32 rx_detected_per_ch_width[4];
1364 __le32 success_per_ch_width[4];
1365 __le32 fail_per_ch_width[4];
1366}; /* STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */
1367
1368struct mvm_statistics_tx {
1369 __le32 preamble_cnt;
1370 __le32 rx_detected_cnt;
1371 __le32 bt_prio_defer_cnt;
1372 __le32 bt_prio_kill_cnt;
1373 __le32 few_bytes_cnt;
1374 __le32 cts_timeout;
1375 __le32 ack_timeout;
1376 __le32 expected_ack_cnt;
1377 __le32 actual_ack_cnt;
1378 __le32 dump_msdu_cnt;
1379 __le32 burst_abort_next_frame_mismatch_cnt;
1380 __le32 burst_abort_missing_next_frame_cnt;
1381 __le32 cts_timeout_collision;
1382 __le32 ack_or_ba_timeout_collision;
1383 struct mvm_statistics_tx_non_phy_agg agg;
1384 struct mvm_statistics_tx_channel_width channel_width;
1385} __packed; /* STATISTICS_TX_API_S_VER_4 */
1386
1387
1388struct mvm_statistics_bt_activity {
1389 __le32 hi_priority_tx_req_cnt;
1390 __le32 hi_priority_tx_denied_cnt;
1391 __le32 lo_priority_tx_req_cnt;
1392 __le32 lo_priority_tx_denied_cnt;
1393 __le32 hi_priority_rx_req_cnt;
1394 __le32 hi_priority_rx_denied_cnt;
1395 __le32 lo_priority_rx_req_cnt;
1396 __le32 lo_priority_rx_denied_cnt;
1397} __packed; /* STATISTICS_BT_ACTIVITY_API_S_VER_1 */
1398
1399struct mvm_statistics_general {
1400 struct mvm_statistics_general_common common;
1401 __le32 beacon_filtered;
1402 __le32 missed_beacons;
Andrei Otcheretianskia20fd392013-07-21 17:23:59 +03001403 __s8 beacon_filter_average_energy;
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001404 __s8 beacon_filter_reason;
1405 __s8 beacon_filter_current_energy;
1406 __s8 beacon_filter_reserved;
1407 __le32 beacon_filter_delta_time;
1408 struct mvm_statistics_bt_activity bt_activity;
1409} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1410
1411struct mvm_statistics_rx {
1412 struct mvm_statistics_rx_phy ofdm;
1413 struct mvm_statistics_rx_phy cck;
1414 struct mvm_statistics_rx_non_phy general;
1415 struct mvm_statistics_rx_ht_phy ofdm_ht;
1416} __packed; /* STATISTICS_RX_API_S_VER_3 */
1417
1418/*
1419 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
1420 *
1421 * By default, uCode issues this notification after receiving a beacon
1422 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
1423 * REPLY_STATISTICS_CMD 0x9c, above.
1424 *
1425 * Statistics counters continue to increment beacon after beacon, but are
1426 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
1427 * 0x9c with CLEAR_STATS bit set (see above).
1428 *
1429 * uCode also issues this notification during scans. uCode clears statistics
1430 * appropriately so that each notification contains statistics for only the
1431 * one channel that has just been scanned.
1432 */
1433
1434struct iwl_notif_statistics { /* STATISTICS_NTFY_API_S_VER_8 */
1435 __le32 flag;
1436 struct mvm_statistics_rx rx;
1437 struct mvm_statistics_tx tx;
1438 struct mvm_statistics_general general;
1439} __packed;
1440
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001441/***********************************
1442 * Smart Fifo API
1443 ***********************************/
1444/* Smart Fifo state */
1445enum iwl_sf_state {
1446 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1447 SF_FULL_ON,
1448 SF_UNINIT,
1449 SF_INIT_OFF,
1450 SF_HW_NUM_STATES
1451};
1452
1453/* Smart Fifo possible scenario */
1454enum iwl_sf_scenario {
1455 SF_SCENARIO_SINGLE_UNICAST,
1456 SF_SCENARIO_AGG_UNICAST,
1457 SF_SCENARIO_MULTICAST,
1458 SF_SCENARIO_BA_RESP,
1459 SF_SCENARIO_TX_RESP,
1460 SF_NUM_SCENARIO
1461};
1462
1463#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1464#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1465
1466/* smart FIFO default values */
1467#define SF_W_MARK_SISO 4096
1468#define SF_W_MARK_MIMO2 8192
1469#define SF_W_MARK_MIMO3 6144
1470#define SF_W_MARK_LEGACY 4096
1471#define SF_W_MARK_SCAN 4096
1472
1473/* SF Scenarios timers for FULL_ON state (aligned to 32 uSec) */
1474#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1475#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1476#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1477#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1478#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1479#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1480#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1481#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1482#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1483#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1484
1485#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1486
1487/**
1488 * Smart Fifo configuration command.
1489 * @state: smart fifo state, types listed in iwl_sf_sate.
1490 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1491 * @long_delay_timeouts: aging and idle timer values for each scenario
1492 * in long delay state.
1493 * @full_on_timeouts: timer values for each scenario in full on state.
1494 */
1495struct iwl_sf_cfg_cmd {
1496 enum iwl_sf_state state;
1497 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1498 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1499 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1500} __packed; /* SF_CFG_API_S_VER_2 */
1501
Johannes Berg8ca151b2013-01-24 14:25:36 +01001502#endif /* __fw_api_h__ */