blob: dee3f822cea8ec423924aaf40e18aa149dee52d4 [file] [log] [blame]
Mingkai Hu8b60d6c2010-10-12 18:18:32 +08001/*
2 * Freescale eSPI controller driver.
3 *
4 * Copyright 2010 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080011#include <linux/delay.h>
Xiubo Lia3108362014-09-29 10:57:06 +080012#include <linux/err.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080013#include <linux/fsl_devices.h>
Xiubo Lia3108362014-09-29 10:57:06 +080014#include <linux/interrupt.h>
Xiubo Lia3108362014-09-29 10:57:06 +080015#include <linux/module.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080016#include <linux/mm.h>
17#include <linux/of.h>
Rob Herring5af50732013-09-17 14:28:33 -050018#include <linux/of_address.h>
19#include <linux/of_irq.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080020#include <linux/of_platform.h>
Xiubo Lia3108362014-09-29 10:57:06 +080021#include <linux/platform_device.h>
22#include <linux/spi/spi.h>
Heiner Kallweite9abb4d2015-08-26 21:21:55 +020023#include <linux/pm_runtime.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080024#include <sysdev/fsl_soc.h>
25
Grant Likelyca632f52011-06-06 01:16:30 -060026#include "spi-fsl-lib.h"
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080027
28/* eSPI Controller registers */
Heiner Kallweit46afd382016-09-13 23:16:02 +020029#define ESPI_SPMODE 0x00 /* eSPI mode register */
30#define ESPI_SPIE 0x04 /* eSPI event register */
31#define ESPI_SPIM 0x08 /* eSPI mask register */
32#define ESPI_SPCOM 0x0c /* eSPI command register */
33#define ESPI_SPITF 0x10 /* eSPI transmit FIFO access register*/
34#define ESPI_SPIRF 0x14 /* eSPI receive FIFO access register*/
35#define ESPI_SPMODE0 0x20 /* eSPI cs0 mode register */
36
37#define ESPI_SPMODEx(x) (ESPI_SPMODE0 + (x) * 4)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080038
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080039/* eSPI Controller mode register definitions */
Heiner Kallweit81abc2e2016-09-13 23:16:06 +020040#define SPMODE_ENABLE BIT(31)
41#define SPMODE_LOOP BIT(30)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080042#define SPMODE_TXTHR(x) ((x) << 8)
43#define SPMODE_RXTHR(x) ((x) << 0)
44
45/* eSPI Controller CS mode register definitions */
Heiner Kallweit81abc2e2016-09-13 23:16:06 +020046#define CSMODE_CI_INACTIVEHIGH BIT(31)
47#define CSMODE_CP_BEGIN_EDGECLK BIT(30)
48#define CSMODE_REV BIT(29)
49#define CSMODE_DIV16 BIT(28)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080050#define CSMODE_PM(x) ((x) << 24)
Heiner Kallweit81abc2e2016-09-13 23:16:06 +020051#define CSMODE_POL_1 BIT(20)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080052#define CSMODE_LEN(x) ((x) << 16)
53#define CSMODE_BEF(x) ((x) << 12)
54#define CSMODE_AFT(x) ((x) << 8)
55#define CSMODE_CG(x) ((x) << 3)
56
57/* Default mode/csmode for eSPI controller */
58#define SPMODE_INIT_VAL (SPMODE_TXTHR(4) | SPMODE_RXTHR(3))
59#define CSMODE_INIT_VAL (CSMODE_POL_1 | CSMODE_BEF(0) \
60 | CSMODE_AFT(0) | CSMODE_CG(1))
61
62/* SPIE register values */
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080063#define SPIE_RXCNT(reg) ((reg >> 24) & 0x3F)
64#define SPIE_TXCNT(reg) ((reg >> 16) & 0x3F)
Heiner Kallweit81abc2e2016-09-13 23:16:06 +020065#define SPIE_TXE BIT(15) /* TX FIFO empty */
66#define SPIE_DON BIT(14) /* TX done */
67#define SPIE_RXT BIT(13) /* RX FIFO threshold */
68#define SPIE_RXF BIT(12) /* RX FIFO full */
69#define SPIE_TXT BIT(11) /* TX FIFO threshold*/
70#define SPIE_RNE BIT(9) /* RX FIFO not empty */
71#define SPIE_TNF BIT(8) /* TX FIFO not full */
72
73/* SPIM register values */
74#define SPIM_TXE BIT(15) /* TX FIFO empty */
75#define SPIM_DON BIT(14) /* TX done */
76#define SPIM_RXT BIT(13) /* RX FIFO threshold */
77#define SPIM_RXF BIT(12) /* RX FIFO full */
78#define SPIM_TXT BIT(11) /* TX FIFO threshold*/
79#define SPIM_RNE BIT(9) /* RX FIFO not empty */
80#define SPIM_TNF BIT(8) /* TX FIFO not full */
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080081
82/* SPCOM register values */
83#define SPCOM_CS(x) ((x) << 30)
Heiner Kallweit81abc2e2016-09-13 23:16:06 +020084#define SPCOM_DO BIT(28) /* Dual output */
85#define SPCOM_TO BIT(27) /* TX only */
86#define SPCOM_RXSKIP(x) ((x) << 16)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080087#define SPCOM_TRANLEN(x) ((x) << 0)
Heiner Kallweit81abc2e2016-09-13 23:16:06 +020088
Hou Zhiqiang5cfa1e42016-01-22 18:58:26 +080089#define SPCOM_TRANLEN_MAX 0x10000 /* Max transaction length */
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080090
Heiner Kallweite9abb4d2015-08-26 21:21:55 +020091#define AUTOSUSPEND_TIMEOUT 2000
92
Heiner Kallweit46afd382016-09-13 23:16:02 +020093static inline u32 fsl_espi_read_reg(struct mpc8xxx_spi *mspi, int offset)
94{
95 return ioread32be(mspi->reg_base + offset);
96}
97
98static inline u8 fsl_espi_read_reg8(struct mpc8xxx_spi *mspi, int offset)
99{
100 return ioread8(mspi->reg_base + offset);
101}
102
103static inline void fsl_espi_write_reg(struct mpc8xxx_spi *mspi, int offset,
104 u32 val)
105{
106 iowrite32be(val, mspi->reg_base + offset);
107}
108
109static inline void fsl_espi_write_reg8(struct mpc8xxx_spi *mspi, int offset,
110 u8 val)
111{
112 iowrite8(val, mspi->reg_base + offset);
113}
114
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +0200115static void fsl_espi_copy_to_buf(struct spi_message *m,
116 struct mpc8xxx_spi *mspi)
Heiner Kallweit7c159aa2016-09-07 22:50:53 +0200117{
Heiner Kallweit7c159aa2016-09-07 22:50:53 +0200118 struct spi_transfer *t;
119 u8 *buf = mspi->local_buf;
120
121 list_for_each_entry(t, &m->transfers, transfer_list) {
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +0200122 if (t->tx_buf)
Heiner Kallweit7c159aa2016-09-07 22:50:53 +0200123 memcpy(buf, t->tx_buf, t->len);
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +0200124 else
Heiner Kallweit7c159aa2016-09-07 22:50:53 +0200125 memset(buf, 0, t->len);
Heiner Kallweit7c159aa2016-09-07 22:50:53 +0200126 buf += t->len;
127 }
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +0200128}
Heiner Kallweit7c159aa2016-09-07 22:50:53 +0200129
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +0200130static void fsl_espi_copy_from_buf(struct spi_message *m,
131 struct mpc8xxx_spi *mspi)
132{
133 struct spi_transfer *t;
134 u8 *buf = mspi->local_buf;
135
136 list_for_each_entry(t, &m->transfers, transfer_list) {
137 if (t->rx_buf)
138 memcpy(t->rx_buf, buf, t->len);
139 buf += t->len;
140 }
Heiner Kallweit7c159aa2016-09-07 22:50:53 +0200141}
142
Heiner Kallweitd3152cf12016-09-07 22:53:38 +0200143static int fsl_espi_check_message(struct spi_message *m)
144{
145 struct mpc8xxx_spi *mspi = spi_master_get_devdata(m->spi->master);
146 struct spi_transfer *t, *first;
147
148 if (m->frame_length > SPCOM_TRANLEN_MAX) {
149 dev_err(mspi->dev, "message too long, size is %u bytes\n",
150 m->frame_length);
151 return -EMSGSIZE;
152 }
153
154 first = list_first_entry(&m->transfers, struct spi_transfer,
155 transfer_list);
156 list_for_each_entry(t, &m->transfers, transfer_list) {
157 if (first->bits_per_word != t->bits_per_word ||
158 first->speed_hz != t->speed_hz) {
159 dev_err(mspi->dev, "bits_per_word/speed_hz should be the same for all transfers\n");
160 return -EINVAL;
161 }
162 }
163
164 return 0;
165}
166
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800167static void fsl_espi_change_mode(struct spi_device *spi)
168{
169 struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
170 struct spi_mpc8xxx_cs *cs = spi->controller_state;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800171 u32 tmp;
172 unsigned long flags;
173
174 /* Turn off IRQs locally to minimize time that SPI is disabled. */
175 local_irq_save(flags);
176
177 /* Turn off SPI unit prior changing mode */
Heiner Kallweit46afd382016-09-13 23:16:02 +0200178 tmp = fsl_espi_read_reg(mspi, ESPI_SPMODE);
179 fsl_espi_write_reg(mspi, ESPI_SPMODE, tmp & ~SPMODE_ENABLE);
180 fsl_espi_write_reg(mspi, ESPI_SPMODEx(spi->chip_select),
181 cs->hw_mode);
182 fsl_espi_write_reg(mspi, ESPI_SPMODE, tmp);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800183
184 local_irq_restore(flags);
185}
186
187static u32 fsl_espi_tx_buf_lsb(struct mpc8xxx_spi *mpc8xxx_spi)
188{
189 u32 data;
190 u16 data_h;
191 u16 data_l;
192 const u32 *tx = mpc8xxx_spi->tx;
193
194 if (!tx)
195 return 0;
196
197 data = *tx++ << mpc8xxx_spi->tx_shift;
198 data_l = data & 0xffff;
199 data_h = (data >> 16) & 0xffff;
200 swab16s(&data_l);
201 swab16s(&data_h);
202 data = data_h | data_l;
203
204 mpc8xxx_spi->tx = tx;
205 return data;
206}
207
Heiner Kallweitea616ee2016-08-25 06:44:42 +0200208static void fsl_espi_setup_transfer(struct spi_device *spi,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800209 struct spi_transfer *t)
210{
211 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
Heiner Kallweitd198ebf2016-09-13 23:15:45 +0200212 int bits_per_word = t ? t->bits_per_word : spi->bits_per_word;
213 u32 hz = t ? t->speed_hz : spi->max_speed_hz;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800214 u8 pm;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800215 struct spi_mpc8xxx_cs *cs = spi->controller_state;
216
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800217 cs->rx_shift = 0;
218 cs->tx_shift = 0;
219 cs->get_rx = mpc8xxx_spi_rx_buf_u32;
220 cs->get_tx = mpc8xxx_spi_tx_buf_u32;
221 if (bits_per_word <= 8) {
222 cs->rx_shift = 8 - bits_per_word;
Stephen Warren51faed62013-05-30 09:59:41 -0600223 } else {
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800224 cs->rx_shift = 16 - bits_per_word;
225 if (spi->mode & SPI_LSB_FIRST)
226 cs->get_tx = fsl_espi_tx_buf_lsb;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800227 }
228
229 mpc8xxx_spi->rx_shift = cs->rx_shift;
230 mpc8xxx_spi->tx_shift = cs->tx_shift;
231 mpc8xxx_spi->get_rx = cs->get_rx;
232 mpc8xxx_spi->get_tx = cs->get_tx;
233
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800234 /* mask out bits we are going to set */
235 cs->hw_mode &= ~(CSMODE_LEN(0xF) | CSMODE_DIV16 | CSMODE_PM(0xF));
236
Heiner Kallweita755af52016-09-04 09:56:57 +0200237 cs->hw_mode |= CSMODE_LEN(bits_per_word - 1);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800238
239 if ((mpc8xxx_spi->spibrg / hz) > 64) {
240 cs->hw_mode |= CSMODE_DIV16;
Sebastian Andrzej Siewior35faa552012-03-15 18:42:31 +0100241 pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 16 * 4);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800242
Sebastian Andrzej Siewior87bf5ab2012-03-15 18:42:32 +0100243 WARN_ONCE(pm > 33, "%s: Requested speed is too low: %d Hz. "
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800244 "Will use %d Hz instead.\n", dev_name(&spi->dev),
Sebastian Andrzej Siewior87bf5ab2012-03-15 18:42:32 +0100245 hz, mpc8xxx_spi->spibrg / (4 * 16 * (32 + 1)));
246 if (pm > 33)
247 pm = 33;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800248 } else {
Sebastian Andrzej Siewior35faa552012-03-15 18:42:31 +0100249 pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 4);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800250 }
251 if (pm)
252 pm--;
Sebastian Andrzej Siewior87bf5ab2012-03-15 18:42:32 +0100253 if (pm < 2)
254 pm = 2;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800255
256 cs->hw_mode |= CSMODE_PM(pm);
257
258 fsl_espi_change_mode(spi);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800259}
260
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800261static int fsl_espi_bufs(struct spi_device *spi, struct spi_transfer *t)
262{
263 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
Heiner Kallweit5bcc6a22016-09-07 22:53:01 +0200264 u32 word;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800265 int ret;
266
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800267 mpc8xxx_spi->len = t->len;
Heiner Kallweit5bcc6a22016-09-07 22:53:01 +0200268 mpc8xxx_spi->count = roundup(t->len, 4) / 4;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800269
270 mpc8xxx_spi->tx = t->tx_buf;
271 mpc8xxx_spi->rx = t->rx_buf;
272
Wolfram Sang16735d02013-11-14 14:32:02 -0800273 reinit_completion(&mpc8xxx_spi->done);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800274
275 /* Set SPCOM[CS] and SPCOM[TRANLEN] field */
Heiner Kallweit46afd382016-09-13 23:16:02 +0200276 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPCOM,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800277 (SPCOM_CS(spi->chip_select) | SPCOM_TRANLEN(t->len - 1)));
278
Heiner Kallweit5bcc6a22016-09-07 22:53:01 +0200279 /* enable rx ints */
Heiner Kallweit81abc2e2016-09-13 23:16:06 +0200280 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIM, SPIM_RNE);
Heiner Kallweit5bcc6a22016-09-07 22:53:01 +0200281
282 /* transmit word */
283 word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
Heiner Kallweit46afd382016-09-13 23:16:02 +0200284 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPITF, word);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800285
Nobuteru Hayashiaa70e562016-03-18 11:35:21 +0000286 /* Won't hang up forever, SPI bus sometimes got lost interrupts... */
287 ret = wait_for_completion_timeout(&mpc8xxx_spi->done, 2 * HZ);
288 if (ret == 0)
289 dev_err(mpc8xxx_spi->dev,
290 "Transaction hanging up (left %d bytes)\n",
291 mpc8xxx_spi->count);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800292
293 /* disable rx ints */
Heiner Kallweit46afd382016-09-13 23:16:02 +0200294 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIM, 0);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800295
Heiner Kallweit84ccfc32016-09-07 22:52:43 +0200296 return mpc8xxx_spi->count > 0 ? -EMSGSIZE : 0;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800297}
298
Heiner Kallweit38d003f2016-09-07 22:54:51 +0200299static int fsl_espi_trans(struct spi_message *m, struct spi_transfer *trans)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800300{
Heiner Kallweit38d003f2016-09-07 22:54:51 +0200301 struct mpc8xxx_spi *mspi = spi_master_get_devdata(m->spi->master);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800302 struct spi_device *spi = m->spi;
Heiner Kallweit38d003f2016-09-07 22:54:51 +0200303 int ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800304
Heiner Kallweit38d003f2016-09-07 22:54:51 +0200305 fsl_espi_copy_to_buf(m, mspi);
Heiner Kallweitfaceef32016-09-07 22:52:06 +0200306 fsl_espi_setup_transfer(spi, trans);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800307
Heiner Kallweit06af1152016-09-07 22:54:35 +0200308 ret = fsl_espi_bufs(spi, trans);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800309
Heiner Kallweitfaceef32016-09-07 22:52:06 +0200310 if (trans->delay_usecs)
311 udelay(trans->delay_usecs);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800312
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800313 fsl_espi_setup_transfer(spi, NULL);
Heiner Kallweite33a3ad2016-09-07 22:51:10 +0200314
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +0200315 if (!ret)
316 fsl_espi_copy_from_buf(m, mspi);
Heiner Kallweite33a3ad2016-09-07 22:51:10 +0200317
318 return ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800319}
320
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100321static int fsl_espi_do_one_msg(struct spi_master *master,
322 struct spi_message *m)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800323{
Heiner Kallweit96361faf2016-09-07 22:54:00 +0200324 struct mpc8xxx_spi *mspi = spi_master_get_devdata(m->spi->master);
Heiner Kallweit06af1152016-09-07 22:54:35 +0200325 unsigned int delay_usecs = 0;
Heiner Kallweitfaceef32016-09-07 22:52:06 +0200326 struct spi_transfer *t, trans = {};
Heiner Kallweite33a3ad2016-09-07 22:51:10 +0200327 int ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800328
Heiner Kallweitd3152cf12016-09-07 22:53:38 +0200329 ret = fsl_espi_check_message(m);
330 if (ret)
331 goto out;
332
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800333 list_for_each_entry(t, &m->transfers, transfer_list) {
Heiner Kallweit96361faf2016-09-07 22:54:00 +0200334 if (t->delay_usecs > delay_usecs)
335 delay_usecs = t->delay_usecs;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800336 }
337
Heiner Kallweit96361faf2016-09-07 22:54:00 +0200338 t = list_first_entry(&m->transfers, struct spi_transfer,
339 transfer_list);
340
Heiner Kallweit06af1152016-09-07 22:54:35 +0200341 trans.len = m->frame_length;
Heiner Kallweit96361faf2016-09-07 22:54:00 +0200342 trans.speed_hz = t->speed_hz;
343 trans.bits_per_word = t->bits_per_word;
344 trans.delay_usecs = delay_usecs;
345 trans.tx_buf = mspi->local_buf;
346 trans.rx_buf = mspi->local_buf;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800347
Heiner Kallweit06af1152016-09-07 22:54:35 +0200348 if (trans.len)
349 ret = fsl_espi_trans(m, &trans);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800350
Heiner Kallweitfaceef32016-09-07 22:52:06 +0200351 m->actual_length = ret ? 0 : trans.len;
Heiner Kallweitd3152cf12016-09-07 22:53:38 +0200352out:
Heiner Kallweit0319d492016-09-07 22:51:29 +0200353 if (m->status == -EINPROGRESS)
354 m->status = ret;
355
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100356 spi_finalize_current_message(master);
Heiner Kallweit0319d492016-09-07 22:51:29 +0200357
358 return ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800359}
360
361static int fsl_espi_setup(struct spi_device *spi)
362{
363 struct mpc8xxx_spi *mpc8xxx_spi;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800364 u32 loop_mode;
Axel Lind9f26742014-08-31 12:44:09 +0800365 struct spi_mpc8xxx_cs *cs = spi_get_ctldata(spi);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800366
367 if (!spi->max_speed_hz)
368 return -EINVAL;
369
370 if (!cs) {
Axel Lind9f26742014-08-31 12:44:09 +0800371 cs = kzalloc(sizeof(*cs), GFP_KERNEL);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800372 if (!cs)
373 return -ENOMEM;
Axel Lind9f26742014-08-31 12:44:09 +0800374 spi_set_ctldata(spi, cs);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800375 }
376
377 mpc8xxx_spi = spi_master_get_devdata(spi->master);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800378
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200379 pm_runtime_get_sync(mpc8xxx_spi->dev);
380
Heiner Kallweit46afd382016-09-13 23:16:02 +0200381 cs->hw_mode = fsl_espi_read_reg(mpc8xxx_spi,
382 ESPI_SPMODEx(spi->chip_select));
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800383 /* mask out bits we are going to set */
384 cs->hw_mode &= ~(CSMODE_CP_BEGIN_EDGECLK | CSMODE_CI_INACTIVEHIGH
385 | CSMODE_REV);
386
387 if (spi->mode & SPI_CPHA)
388 cs->hw_mode |= CSMODE_CP_BEGIN_EDGECLK;
389 if (spi->mode & SPI_CPOL)
390 cs->hw_mode |= CSMODE_CI_INACTIVEHIGH;
391 if (!(spi->mode & SPI_LSB_FIRST))
392 cs->hw_mode |= CSMODE_REV;
393
394 /* Handle the loop mode */
Heiner Kallweit46afd382016-09-13 23:16:02 +0200395 loop_mode = fsl_espi_read_reg(mpc8xxx_spi, ESPI_SPMODE);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800396 loop_mode &= ~SPMODE_LOOP;
397 if (spi->mode & SPI_LOOP)
398 loop_mode |= SPMODE_LOOP;
Heiner Kallweit46afd382016-09-13 23:16:02 +0200399 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, loop_mode);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800400
Heiner Kallweitea616ee2016-08-25 06:44:42 +0200401 fsl_espi_setup_transfer(spi, NULL);
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200402
403 pm_runtime_mark_last_busy(mpc8xxx_spi->dev);
404 pm_runtime_put_autosuspend(mpc8xxx_spi->dev);
405
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800406 return 0;
407}
408
Axel Lind9f26742014-08-31 12:44:09 +0800409static void fsl_espi_cleanup(struct spi_device *spi)
410{
411 struct spi_mpc8xxx_cs *cs = spi_get_ctldata(spi);
412
413 kfree(cs);
414 spi_set_ctldata(spi, NULL);
415}
416
Heiner Kallweit10ed1e62016-08-25 06:45:16 +0200417static void fsl_espi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800418{
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800419 /* We need handle RX first */
Heiner Kallweit81abc2e2016-09-13 23:16:06 +0200420 if (events & SPIE_RNE) {
Mingkai Hue6289d62010-12-21 09:26:07 +0800421 u32 rx_data, tmp;
422 u8 rx_data_8;
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000423 int rx_nr_bytes = 4;
Nobuteru Hayashia12ddd62016-03-18 11:35:21 +0000424 int ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800425
426 /* Spin until RX is done */
Nobuteru Hayashia12ddd62016-03-18 11:35:21 +0000427 if (SPIE_RXCNT(events) < min(4, mspi->len)) {
428 ret = spin_event_timeout(
429 !(SPIE_RXCNT(events =
Heiner Kallweit46afd382016-09-13 23:16:02 +0200430 fsl_espi_read_reg(mspi, ESPI_SPIE)) <
Nobuteru Hayashia12ddd62016-03-18 11:35:21 +0000431 min(4, mspi->len)),
432 10000, 0); /* 10 msec */
433 if (!ret)
434 dev_err(mspi->dev,
435 "tired waiting for SPIE_RXCNT\n");
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800436 }
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800437
Mingkai Hue6289d62010-12-21 09:26:07 +0800438 if (mspi->len >= 4) {
Heiner Kallweit46afd382016-09-13 23:16:02 +0200439 rx_data = fsl_espi_read_reg(mspi, ESPI_SPIRF);
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000440 } else if (mspi->len <= 0) {
441 dev_err(mspi->dev,
Heiner Kallweit81abc2e2016-09-13 23:16:06 +0200442 "unexpected RX(SPIE_RNE) interrupt occurred,\n"
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000443 "(local rxlen %d bytes, reg rxlen %d bytes)\n",
444 min(4, mspi->len), SPIE_RXCNT(events));
445 rx_nr_bytes = 0;
Mingkai Hue6289d62010-12-21 09:26:07 +0800446 } else {
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000447 rx_nr_bytes = mspi->len;
Mingkai Hue6289d62010-12-21 09:26:07 +0800448 tmp = mspi->len;
449 rx_data = 0;
450 while (tmp--) {
Heiner Kallweit46afd382016-09-13 23:16:02 +0200451 rx_data_8 = fsl_espi_read_reg8(mspi,
452 ESPI_SPIRF);
Mingkai Hue6289d62010-12-21 09:26:07 +0800453 rx_data |= (rx_data_8 << (tmp * 8));
454 }
455
456 rx_data <<= (4 - mspi->len) * 8;
457 }
458
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000459 mspi->len -= rx_nr_bytes;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800460
461 if (mspi->rx)
462 mspi->get_rx(rx_data, mspi);
463 }
464
Heiner Kallweit81abc2e2016-09-13 23:16:06 +0200465 if (!(events & SPIE_TNF)) {
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800466 int ret;
467
468 /* spin until TX is done */
Heiner Kallweit46afd382016-09-13 23:16:02 +0200469 ret = spin_event_timeout(((events = fsl_espi_read_reg(
Heiner Kallweit81abc2e2016-09-13 23:16:06 +0200470 mspi, ESPI_SPIE)) & SPIE_TNF), 1000, 0);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800471 if (!ret) {
Heiner Kallweit81abc2e2016-09-13 23:16:06 +0200472 dev_err(mspi->dev, "tired waiting for SPIE_TNF\n");
Jane Wan7a0a1752015-05-01 16:37:42 -0700473 complete(&mspi->done);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800474 return;
475 }
476 }
477
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800478 mspi->count -= 1;
479 if (mspi->count) {
480 u32 word = mspi->get_tx(mspi);
481
Heiner Kallweit46afd382016-09-13 23:16:02 +0200482 fsl_espi_write_reg(mspi, ESPI_SPITF, word);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800483 } else {
484 complete(&mspi->done);
485 }
486}
487
488static irqreturn_t fsl_espi_irq(s32 irq, void *context_data)
489{
490 struct mpc8xxx_spi *mspi = context_data;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800491 u32 events;
492
493 /* Get interrupt events(tx/rx) */
Heiner Kallweit46afd382016-09-13 23:16:02 +0200494 events = fsl_espi_read_reg(mspi, ESPI_SPIE);
Heiner Kallweit35f5d712016-09-13 23:15:57 +0200495 if (!events)
496 return IRQ_NONE;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800497
498 dev_vdbg(mspi->dev, "%s: events %x\n", __func__, events);
499
500 fsl_espi_cpu_irq(mspi, events);
501
Heiner Kallweit35f5d712016-09-13 23:15:57 +0200502 /* Clear the events */
Heiner Kallweit46afd382016-09-13 23:16:02 +0200503 fsl_espi_write_reg(mspi, ESPI_SPIE, events);
Heiner Kallweit35f5d712016-09-13 23:15:57 +0200504
505 return IRQ_HANDLED;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800506}
507
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200508#ifdef CONFIG_PM
509static int fsl_espi_runtime_suspend(struct device *dev)
Heiner Kallweit75506d02014-12-03 07:56:19 +0100510{
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200511 struct spi_master *master = dev_get_drvdata(dev);
512 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);
Heiner Kallweit75506d02014-12-03 07:56:19 +0100513 u32 regval;
514
Heiner Kallweit46afd382016-09-13 23:16:02 +0200515 regval = fsl_espi_read_reg(mpc8xxx_spi, ESPI_SPMODE);
Heiner Kallweit75506d02014-12-03 07:56:19 +0100516 regval &= ~SPMODE_ENABLE;
Heiner Kallweit46afd382016-09-13 23:16:02 +0200517 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, regval);
Heiner Kallweit75506d02014-12-03 07:56:19 +0100518
519 return 0;
520}
521
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200522static int fsl_espi_runtime_resume(struct device *dev)
Heiner Kallweit75506d02014-12-03 07:56:19 +0100523{
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200524 struct spi_master *master = dev_get_drvdata(dev);
525 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);
Heiner Kallweit75506d02014-12-03 07:56:19 +0100526 u32 regval;
527
Heiner Kallweit46afd382016-09-13 23:16:02 +0200528 regval = fsl_espi_read_reg(mpc8xxx_spi, ESPI_SPMODE);
Heiner Kallweit75506d02014-12-03 07:56:19 +0100529 regval |= SPMODE_ENABLE;
Heiner Kallweit46afd382016-09-13 23:16:02 +0200530 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, regval);
Heiner Kallweit75506d02014-12-03 07:56:19 +0100531
532 return 0;
533}
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200534#endif
Heiner Kallweit75506d02014-12-03 07:56:19 +0100535
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200536static size_t fsl_espi_max_message_size(struct spi_device *spi)
Michal Suchanekb541eef2015-12-02 10:38:21 +0000537{
538 return SPCOM_TRANLEN_MAX;
539}
540
Grant Likelyfd4a3192012-12-07 16:57:14 +0000541static struct spi_master * fsl_espi_probe(struct device *dev,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800542 struct resource *mem, unsigned int irq)
543{
Jingoo Han8074cf02013-07-30 16:58:59 +0900544 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800545 struct spi_master *master;
546 struct mpc8xxx_spi *mpc8xxx_spi;
Jane Wand0fb47a52014-04-16 13:09:39 -0700547 struct device_node *nc;
548 const __be32 *prop;
549 u32 regval, csmode;
550 int i, len, ret = 0;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800551
552 master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi));
553 if (!master) {
554 ret = -ENOMEM;
555 goto err;
556 }
557
558 dev_set_drvdata(dev, master);
559
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100560 mpc8xxx_spi_probe(dev, mem, irq);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800561
Stephen Warren24778be2013-05-21 20:36:35 -0600562 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800563 master->setup = fsl_espi_setup;
Axel Lind9f26742014-08-31 12:44:09 +0800564 master->cleanup = fsl_espi_cleanup;
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100565 master->transfer_one_message = fsl_espi_do_one_msg;
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200566 master->auto_runtime_pm = true;
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200567 master->max_message_size = fsl_espi_max_message_size;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800568
569 mpc8xxx_spi = spi_master_get_devdata(master);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800570
Heiner Kallweit14238772016-09-07 22:50:22 +0200571 mpc8xxx_spi->local_buf =
572 devm_kmalloc(dev, SPCOM_TRANLEN_MAX, GFP_KERNEL);
573 if (!mpc8xxx_spi->local_buf) {
574 ret = -ENOMEM;
575 goto err_probe;
576 }
577
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200578 mpc8xxx_spi->reg_base = devm_ioremap_resource(dev, mem);
Axel Lin37c5db72015-08-30 18:35:51 +0800579 if (IS_ERR(mpc8xxx_spi->reg_base)) {
580 ret = PTR_ERR(mpc8xxx_spi->reg_base);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800581 goto err_probe;
582 }
583
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800584 /* Register for SPI Interrupt */
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200585 ret = devm_request_irq(dev, mpc8xxx_spi->irq, fsl_espi_irq,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800586 0, "fsl_espi", mpc8xxx_spi);
587 if (ret)
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200588 goto err_probe;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800589
590 if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
591 mpc8xxx_spi->rx_shift = 16;
592 mpc8xxx_spi->tx_shift = 24;
593 }
594
595 /* SPI controller initializations */
Heiner Kallweit46afd382016-09-13 23:16:02 +0200596 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, 0);
597 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIM, 0);
598 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPCOM, 0);
599 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIE, 0xffffffff);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800600
601 /* Init eSPI CS mode register */
Jane Wand0fb47a52014-04-16 13:09:39 -0700602 for_each_available_child_of_node(master->dev.of_node, nc) {
603 /* get chip select */
604 prop = of_get_property(nc, "reg", &len);
605 if (!prop || len < sizeof(*prop))
606 continue;
607 i = be32_to_cpup(prop);
608 if (i < 0 || i >= pdata->max_chipselect)
609 continue;
610
611 csmode = CSMODE_INIT_VAL;
612 /* check if CSBEF is set in device tree */
613 prop = of_get_property(nc, "fsl,csbef", &len);
614 if (prop && len >= sizeof(*prop)) {
615 csmode &= ~(CSMODE_BEF(0xf));
616 csmode |= CSMODE_BEF(be32_to_cpup(prop));
617 }
618 /* check if CSAFT is set in device tree */
619 prop = of_get_property(nc, "fsl,csaft", &len);
620 if (prop && len >= sizeof(*prop)) {
621 csmode &= ~(CSMODE_AFT(0xf));
622 csmode |= CSMODE_AFT(be32_to_cpup(prop));
623 }
Heiner Kallweit46afd382016-09-13 23:16:02 +0200624 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODEx(i), csmode);
Jane Wand0fb47a52014-04-16 13:09:39 -0700625
626 dev_info(dev, "cs=%d, init_csmode=0x%x\n", i, csmode);
627 }
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800628
629 /* Enable SPI interface */
630 regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
631
Heiner Kallweit46afd382016-09-13 23:16:02 +0200632 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, regval);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800633
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200634 pm_runtime_set_autosuspend_delay(dev, AUTOSUSPEND_TIMEOUT);
635 pm_runtime_use_autosuspend(dev);
636 pm_runtime_set_active(dev);
637 pm_runtime_enable(dev);
638 pm_runtime_get_sync(dev);
639
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200640 ret = devm_spi_register_master(dev, master);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800641 if (ret < 0)
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200642 goto err_pm;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800643
Heiner Kallweit46afd382016-09-13 23:16:02 +0200644 dev_info(dev, "at 0x%p (irq = %d)\n", mpc8xxx_spi->reg_base,
645 mpc8xxx_spi->irq);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800646
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200647 pm_runtime_mark_last_busy(dev);
648 pm_runtime_put_autosuspend(dev);
649
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800650 return master;
651
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200652err_pm:
653 pm_runtime_put_noidle(dev);
654 pm_runtime_disable(dev);
655 pm_runtime_set_suspended(dev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800656err_probe:
657 spi_master_put(master);
658err:
659 return ERR_PTR(ret);
660}
661
662static int of_fsl_espi_get_chipselects(struct device *dev)
663{
664 struct device_node *np = dev->of_node;
Jingoo Han8074cf02013-07-30 16:58:59 +0900665 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800666 const u32 *prop;
667 int len;
668
669 prop = of_get_property(np, "fsl,espi-num-chipselects", &len);
670 if (!prop || len < sizeof(*prop)) {
671 dev_err(dev, "No 'fsl,espi-num-chipselects' property\n");
672 return -EINVAL;
673 }
674
675 pdata->max_chipselect = *prop;
676 pdata->cs_control = NULL;
677
678 return 0;
679}
680
Grant Likelyfd4a3192012-12-07 16:57:14 +0000681static int of_fsl_espi_probe(struct platform_device *ofdev)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800682{
683 struct device *dev = &ofdev->dev;
684 struct device_node *np = ofdev->dev.of_node;
685 struct spi_master *master;
686 struct resource mem;
Thierry Redingf7578492013-09-18 15:24:44 +0200687 unsigned int irq;
Heiner Kallweitacf69212016-09-17 15:43:00 +0200688 int ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800689
Grant Likely18d306d2011-02-22 21:02:43 -0700690 ret = of_mpc8xxx_spi_probe(ofdev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800691 if (ret)
692 return ret;
693
694 ret = of_fsl_espi_get_chipselects(dev);
695 if (ret)
Heiner Kallweitacf69212016-09-17 15:43:00 +0200696 return ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800697
698 ret = of_address_to_resource(np, 0, &mem);
699 if (ret)
Heiner Kallweitacf69212016-09-17 15:43:00 +0200700 return ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800701
Thierry Redingf7578492013-09-18 15:24:44 +0200702 irq = irq_of_parse_and_map(np, 0);
Heiner Kallweitacf69212016-09-17 15:43:00 +0200703 if (!irq)
704 return -EINVAL;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800705
Thierry Redingf7578492013-09-18 15:24:44 +0200706 master = fsl_espi_probe(dev, &mem, irq);
Heiner Kallweitacf69212016-09-17 15:43:00 +0200707 if (IS_ERR(master))
708 return PTR_ERR(master);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800709
710 return 0;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800711}
712
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200713static int of_fsl_espi_remove(struct platform_device *dev)
714{
715 pm_runtime_disable(&dev->dev);
716
717 return 0;
718}
719
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800720#ifdef CONFIG_PM_SLEEP
721static int of_fsl_espi_suspend(struct device *dev)
722{
723 struct spi_master *master = dev_get_drvdata(dev);
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800724 int ret;
725
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800726 ret = spi_master_suspend(master);
727 if (ret) {
728 dev_warn(dev, "cannot suspend master\n");
729 return ret;
730 }
731
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200732 ret = pm_runtime_force_suspend(dev);
733 if (ret < 0)
734 return ret;
735
736 return 0;
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800737}
738
739static int of_fsl_espi_resume(struct device *dev)
740{
741 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
742 struct spi_master *master = dev_get_drvdata(dev);
743 struct mpc8xxx_spi *mpc8xxx_spi;
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800744 u32 regval;
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200745 int i, ret;
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800746
747 mpc8xxx_spi = spi_master_get_devdata(master);
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800748
749 /* SPI controller initializations */
Heiner Kallweit46afd382016-09-13 23:16:02 +0200750 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, 0);
751 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIM, 0);
752 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPCOM, 0);
753 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIE, 0xffffffff);
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800754
755 /* Init eSPI CS mode register */
756 for (i = 0; i < pdata->max_chipselect; i++)
Heiner Kallweit46afd382016-09-13 23:16:02 +0200757 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODEx(i),
758 CSMODE_INIT_VAL);
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800759
760 /* Enable SPI interface */
761 regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
762
Heiner Kallweit46afd382016-09-13 23:16:02 +0200763 fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, regval);
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800764
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200765 ret = pm_runtime_force_resume(dev);
766 if (ret < 0)
767 return ret;
768
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800769 return spi_master_resume(master);
770}
771#endif /* CONFIG_PM_SLEEP */
772
773static const struct dev_pm_ops espi_pm = {
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200774 SET_RUNTIME_PM_OPS(fsl_espi_runtime_suspend,
775 fsl_espi_runtime_resume, NULL)
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800776 SET_SYSTEM_SLEEP_PM_OPS(of_fsl_espi_suspend, of_fsl_espi_resume)
777};
778
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800779static const struct of_device_id of_fsl_espi_match[] = {
780 { .compatible = "fsl,mpc8536-espi" },
781 {}
782};
783MODULE_DEVICE_TABLE(of, of_fsl_espi_match);
784
Grant Likely18d306d2011-02-22 21:02:43 -0700785static struct platform_driver fsl_espi_driver = {
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800786 .driver = {
787 .name = "fsl_espi",
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800788 .of_match_table = of_fsl_espi_match,
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800789 .pm = &espi_pm,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800790 },
791 .probe = of_fsl_espi_probe,
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200792 .remove = of_fsl_espi_remove,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800793};
Grant Likely940ab882011-10-05 11:29:49 -0600794module_platform_driver(fsl_espi_driver);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800795
796MODULE_AUTHOR("Mingkai Hu");
797MODULE_DESCRIPTION("Enhanced Freescale SPI Driver");
798MODULE_LICENSE("GPL");