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gerrit-public.fairphone.software / kernel / msm-4.9 / bcd3cca741a1bb28e78cdcc83551630ed83c8244 / . / arch / arm / boot / dts / omap2.dtsi
blob: b3cc896af6ebbdc164298d365a2f8507a4db93d3 [file] [log] [blame]
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]1/*
2 * Device Tree Source for OMAP2 SoC
3 *
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
Florian Vaussard6d624ea2013-05-31 14:32:56 +0200[diff] [blame]11#include <dt-bindings/gpio/gpio.h>
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200[diff] [blame^]12#include <dt-bindings/pinctrl/omap.h>
Florian Vaussard6d624ea2013-05-31 14:32:56 +0200[diff] [blame]13
Florian Vaussard98ef79572013-05-31 14:32:55 +0200[diff] [blame]14#include "skeleton.dtsi"
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]15
16/ {
17 compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
Benoit Cousson4c94ac22012-10-24 10:47:52 +0200[diff] [blame]18 interrupt-parent = <&intc>;
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]19
20 aliases {
21 serial0 = &uart1;
22 serial1 = &uart2;
23 serial2 = &uart3;
24 };
25
26 cpus {
27 cpu@0 {
28 compatible = "arm,arm1136jf-s";
29 };
30 };
31
Jon Hunter9b07b472012-10-18 09:28:52 -0500[diff] [blame]32 pmu {
33 compatible = "arm,arm1136-pmu";
34 interrupts = <3>;
35 };
36
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]37 soc {
38 compatible = "ti,omap-infra";
39 mpu {
40 compatible = "ti,omap2-mpu";
41 ti,hwmods = "mpu";
42 };
43 };
44
45 ocp {
46 compatible = "simple-bus";
47 #address-cells = <1>;
48 #size-cells = <1>;
49 ranges;
50 ti,hwmods = "l3_main";
51
52 intc: interrupt-controller@1 {
53 compatible = "ti,omap2-intc";
54 interrupt-controller;
55 #interrupt-cells = <1>;
Jon Hunter95dca122012-06-12 19:40:46 -0500[diff] [blame]56 ti,intc-size = <96>;
57 reg = <0x480FE000 0x1000>;
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]58 };
59
Jon Hunter2c2dc542012-04-26 13:47:59 -0500[diff] [blame]60 sdma: dma-controller@48056000 {
61 compatible = "ti,omap2430-sdma", "ti,omap2420-sdma";
62 reg = <0x48056000 0x1000>;
63 interrupts = <12>,
64 <13>,
65 <14>,
66 <15>;
67 #dma-cells = <1>;
68 #dma-channels = <32>;
69 #dma-requests = <64>;
70 };
71
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]72 uart1: serial@4806a000 {
73 compatible = "ti,omap2-uart";
74 ti,hwmods = "uart1";
75 clock-frequency = <48000000>;
76 };
77
78 uart2: serial@4806c000 {
79 compatible = "ti,omap2-uart";
80 ti,hwmods = "uart2";
81 clock-frequency = <48000000>;
82 };
83
84 uart3: serial@4806e000 {
85 compatible = "ti,omap2-uart";
86 ti,hwmods = "uart3";
87 clock-frequency = <48000000>;
88 };
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]89
90 timer2: timer@4802a000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]91 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]92 reg = <0x4802a000 0x400>;
93 interrupts = <38>;
94 ti,hwmods = "timer2";
95 };
96
97 timer3: timer@48078000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]98 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]99 reg = <0x48078000 0x400>;
100 interrupts = <39>;
101 ti,hwmods = "timer3";
102 };
103
104 timer4: timer@4807a000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]105 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]106 reg = <0x4807a000 0x400>;
107 interrupts = <40>;
108 ti,hwmods = "timer4";
109 };
110
111 timer5: timer@4807c000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]112 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]113 reg = <0x4807c000 0x400>;
114 interrupts = <41>;
115 ti,hwmods = "timer5";
116 ti,timer-dsp;
117 };
118
119 timer6: timer@4807e000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]120 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]121 reg = <0x4807e000 0x400>;
122 interrupts = <42>;
123 ti,hwmods = "timer6";
124 ti,timer-dsp;
125 };
126
127 timer7: timer@48080000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]128 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]129 reg = <0x48080000 0x400>;
130 interrupts = <43>;
131 ti,hwmods = "timer7";
132 ti,timer-dsp;
133 };
134
135 timer8: timer@48082000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]136 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]137 reg = <0x48082000 0x400>;
138 interrupts = <44>;
139 ti,hwmods = "timer8";
140 ti,timer-dsp;
141 };
142
143 timer9: timer@48084000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]144 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]145 reg = <0x48084000 0x400>;
146 interrupts = <45>;
147 ti,hwmods = "timer9";
148 ti,timer-pwm;
149 };
150
151 timer10: timer@48086000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]152 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]153 reg = <0x48086000 0x400>;
154 interrupts = <46>;
155 ti,hwmods = "timer10";
156 ti,timer-pwm;
157 };
158
159 timer11: timer@48088000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]160 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]161 reg = <0x48088000 0x400>;
162 interrupts = <47>;
163 ti,hwmods = "timer11";
164 ti,timer-pwm;
165 };
166
167 timer12: timer@4808a000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]168 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]169 reg = <0x4808a000 0x400>;
170 interrupts = <48>;
171 ti,hwmods = "timer12";
172 ti,timer-pwm;
173 };
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]174 };
175};