Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Freescale MPC85xx, MPC83xx DMA Engine support |
| 3 | * |
Li Yang | e2c8e425 | 2010-11-11 20:16:29 +0800 | [diff] [blame] | 4 | * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 5 | * |
| 6 | * Author: |
| 7 | * Zhang Wei <wei.zhang@freescale.com>, Jul 2007 |
| 8 | * Ebony Zhu <ebony.zhu@freescale.com>, May 2007 |
| 9 | * |
| 10 | * Description: |
| 11 | * DMA engine driver for Freescale MPC8540 DMA controller, which is |
| 12 | * also fit for MPC8560, MPC8555, MPC8548, MPC8641, and etc. |
Stefan Weil | c2e07b3 | 2010-08-03 19:44:52 +0200 | [diff] [blame] | 13 | * The support for MPC8349 DMA controller is also added. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 14 | * |
Ira W. Snyder | a7aea37 | 2009-04-23 16:17:54 -0700 | [diff] [blame] | 15 | * This driver instructs the DMA controller to issue the PCI Read Multiple |
| 16 | * command for PCI read operations, instead of using the default PCI Read Line |
| 17 | * command. Please be aware that this setting may result in read pre-fetching |
| 18 | * on some platforms. |
| 19 | * |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 20 | * This is free software; you can redistribute it and/or modify |
| 21 | * it under the terms of the GNU General Public License as published by |
| 22 | * the Free Software Foundation; either version 2 of the License, or |
| 23 | * (at your option) any later version. |
| 24 | * |
| 25 | */ |
| 26 | |
| 27 | #include <linux/init.h> |
| 28 | #include <linux/module.h> |
| 29 | #include <linux/pci.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 30 | #include <linux/slab.h> |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 31 | #include <linux/interrupt.h> |
| 32 | #include <linux/dmaengine.h> |
| 33 | #include <linux/delay.h> |
| 34 | #include <linux/dma-mapping.h> |
| 35 | #include <linux/dmapool.h> |
| 36 | #include <linux/of_platform.h> |
| 37 | |
Russell King - ARM Linux | d2ebfb3 | 2012-03-06 22:34:26 +0000 | [diff] [blame^] | 38 | #include "dmaengine.h" |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 39 | #include "fsldma.h" |
| 40 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 41 | #define chan_dbg(chan, fmt, arg...) \ |
| 42 | dev_dbg(chan->dev, "%s: " fmt, chan->name, ##arg) |
| 43 | #define chan_err(chan, fmt, arg...) \ |
| 44 | dev_err(chan->dev, "%s: " fmt, chan->name, ##arg) |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 45 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 46 | static const char msg_ld_oom[] = "No free memory for link descriptor"; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 47 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 48 | /* |
| 49 | * Register Helpers |
| 50 | */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 51 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 52 | static void set_sr(struct fsldma_chan *chan, u32 val) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 53 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 54 | DMA_OUT(chan, &chan->regs->sr, val, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 55 | } |
| 56 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 57 | static u32 get_sr(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 58 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 59 | return DMA_IN(chan, &chan->regs->sr, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 60 | } |
| 61 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 62 | static void set_cdar(struct fsldma_chan *chan, dma_addr_t addr) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 63 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 64 | DMA_OUT(chan, &chan->regs->cdar, addr | FSL_DMA_SNEN, 64); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 65 | } |
| 66 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 67 | static dma_addr_t get_cdar(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 68 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 69 | return DMA_IN(chan, &chan->regs->cdar, 64) & ~FSL_DMA_SNEN; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 70 | } |
| 71 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 72 | static u32 get_bcr(struct fsldma_chan *chan) |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 73 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 74 | return DMA_IN(chan, &chan->regs->bcr, 32); |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 75 | } |
| 76 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 77 | /* |
| 78 | * Descriptor Helpers |
| 79 | */ |
| 80 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 81 | static void set_desc_cnt(struct fsldma_chan *chan, |
| 82 | struct fsl_dma_ld_hw *hw, u32 count) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 83 | { |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 84 | hw->count = CPU_TO_DMA(chan, count, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 85 | } |
| 86 | |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 87 | static u32 get_desc_cnt(struct fsldma_chan *chan, struct fsl_desc_sw *desc) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 88 | { |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 89 | return DMA_TO_CPU(chan, desc->hw.count, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 90 | } |
| 91 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 92 | static void set_desc_src(struct fsldma_chan *chan, |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 93 | struct fsl_dma_ld_hw *hw, dma_addr_t src) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 94 | { |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 95 | u64 snoop_bits; |
Dan Williams | 900325a | 2009-03-02 15:33:46 -0700 | [diff] [blame] | 96 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 97 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) |
| 98 | ? ((u64)FSL_DMA_SATR_SREADTYPE_SNOOP_READ << 32) : 0; |
| 99 | hw->src_addr = CPU_TO_DMA(chan, snoop_bits | src, 64); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 100 | } |
| 101 | |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 102 | static dma_addr_t get_desc_src(struct fsldma_chan *chan, |
| 103 | struct fsl_desc_sw *desc) |
| 104 | { |
| 105 | u64 snoop_bits; |
| 106 | |
| 107 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) |
| 108 | ? ((u64)FSL_DMA_SATR_SREADTYPE_SNOOP_READ << 32) : 0; |
| 109 | return DMA_TO_CPU(chan, desc->hw.src_addr, 64) & ~snoop_bits; |
| 110 | } |
| 111 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 112 | static void set_desc_dst(struct fsldma_chan *chan, |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 113 | struct fsl_dma_ld_hw *hw, dma_addr_t dst) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 114 | { |
| 115 | u64 snoop_bits; |
| 116 | |
| 117 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) |
| 118 | ? ((u64)FSL_DMA_DATR_DWRITETYPE_SNOOP_WRITE << 32) : 0; |
| 119 | hw->dst_addr = CPU_TO_DMA(chan, snoop_bits | dst, 64); |
| 120 | } |
| 121 | |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 122 | static dma_addr_t get_desc_dst(struct fsldma_chan *chan, |
| 123 | struct fsl_desc_sw *desc) |
| 124 | { |
| 125 | u64 snoop_bits; |
| 126 | |
| 127 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) |
| 128 | ? ((u64)FSL_DMA_DATR_DWRITETYPE_SNOOP_WRITE << 32) : 0; |
| 129 | return DMA_TO_CPU(chan, desc->hw.dst_addr, 64) & ~snoop_bits; |
| 130 | } |
| 131 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 132 | static void set_desc_next(struct fsldma_chan *chan, |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 133 | struct fsl_dma_ld_hw *hw, dma_addr_t next) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 134 | { |
| 135 | u64 snoop_bits; |
| 136 | |
| 137 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_83XX) |
| 138 | ? FSL_DMA_SNEN : 0; |
| 139 | hw->next_ln_addr = CPU_TO_DMA(chan, snoop_bits | next, 64); |
| 140 | } |
| 141 | |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 142 | static void set_ld_eol(struct fsldma_chan *chan, struct fsl_desc_sw *desc) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 143 | { |
Ira Snyder | 776c894 | 2009-05-15 11:33:20 -0700 | [diff] [blame] | 144 | u64 snoop_bits; |
| 145 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 146 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_83XX) |
Ira Snyder | 776c894 | 2009-05-15 11:33:20 -0700 | [diff] [blame] | 147 | ? FSL_DMA_SNEN : 0; |
| 148 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 149 | desc->hw.next_ln_addr = CPU_TO_DMA(chan, |
| 150 | DMA_TO_CPU(chan, desc->hw.next_ln_addr, 64) | FSL_DMA_EOL |
Ira Snyder | 776c894 | 2009-05-15 11:33:20 -0700 | [diff] [blame] | 151 | | snoop_bits, 64); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 152 | } |
| 153 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 154 | /* |
| 155 | * DMA Engine Hardware Control Helpers |
| 156 | */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 157 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 158 | static void dma_init(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 159 | { |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 160 | /* Reset the channel */ |
| 161 | DMA_OUT(chan, &chan->regs->mr, 0, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 162 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 163 | switch (chan->feature & FSL_DMA_IP_MASK) { |
| 164 | case FSL_DMA_IP_85XX: |
| 165 | /* Set the channel to below modes: |
| 166 | * EIE - Error interrupt enable |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 167 | * EOLNIE - End of links interrupt enable |
| 168 | * BWC - Bandwidth sharing among channels |
| 169 | */ |
| 170 | DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_BWC |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 171 | | FSL_DMA_MR_EIE | FSL_DMA_MR_EOLNIE, 32); |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 172 | break; |
| 173 | case FSL_DMA_IP_83XX: |
| 174 | /* Set the channel to below modes: |
| 175 | * EOTIE - End-of-transfer interrupt enable |
| 176 | * PRC_RM - PCI read multiple |
| 177 | */ |
| 178 | DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_EOTIE |
| 179 | | FSL_DMA_MR_PRC_RM, 32); |
| 180 | break; |
| 181 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 182 | } |
| 183 | |
| 184 | static int dma_is_idle(struct fsldma_chan *chan) |
| 185 | { |
| 186 | u32 sr = get_sr(chan); |
| 187 | return (!(sr & FSL_DMA_SR_CB)) || (sr & FSL_DMA_SR_CH); |
| 188 | } |
| 189 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 190 | /* |
| 191 | * Start the DMA controller |
| 192 | * |
| 193 | * Preconditions: |
| 194 | * - the CDAR register must point to the start descriptor |
| 195 | * - the MRn[CS] bit must be cleared |
| 196 | */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 197 | static void dma_start(struct fsldma_chan *chan) |
| 198 | { |
| 199 | u32 mode; |
| 200 | |
| 201 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
| 202 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 203 | if (chan->feature & FSL_DMA_CHAN_PAUSE_EXT) { |
| 204 | DMA_OUT(chan, &chan->regs->bcr, 0, 32); |
| 205 | mode |= FSL_DMA_MR_EMP_EN; |
| 206 | } else { |
| 207 | mode &= ~FSL_DMA_MR_EMP_EN; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 208 | } |
| 209 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 210 | if (chan->feature & FSL_DMA_CHAN_START_EXT) { |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 211 | mode |= FSL_DMA_MR_EMS_EN; |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 212 | } else { |
| 213 | mode &= ~FSL_DMA_MR_EMS_EN; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 214 | mode |= FSL_DMA_MR_CS; |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 215 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 216 | |
| 217 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
| 218 | } |
| 219 | |
| 220 | static void dma_halt(struct fsldma_chan *chan) |
| 221 | { |
| 222 | u32 mode; |
| 223 | int i; |
| 224 | |
Ira Snyder | a00ae34 | 2011-03-03 07:55:01 +0000 | [diff] [blame] | 225 | /* read the mode register */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 226 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | a00ae34 | 2011-03-03 07:55:01 +0000 | [diff] [blame] | 227 | |
| 228 | /* |
| 229 | * The 85xx controller supports channel abort, which will stop |
| 230 | * the current transfer. On 83xx, this bit is the transfer error |
| 231 | * mask bit, which should not be changed. |
| 232 | */ |
| 233 | if ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) { |
| 234 | mode |= FSL_DMA_MR_CA; |
| 235 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
| 236 | |
| 237 | mode &= ~FSL_DMA_MR_CA; |
| 238 | } |
| 239 | |
| 240 | /* stop the DMA controller */ |
| 241 | mode &= ~(FSL_DMA_MR_CS | FSL_DMA_MR_EMS_EN); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 242 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
| 243 | |
Ira Snyder | a00ae34 | 2011-03-03 07:55:01 +0000 | [diff] [blame] | 244 | /* wait for the DMA controller to become idle */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 245 | for (i = 0; i < 100; i++) { |
| 246 | if (dma_is_idle(chan)) |
| 247 | return; |
| 248 | |
| 249 | udelay(10); |
| 250 | } |
| 251 | |
| 252 | if (!dma_is_idle(chan)) |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 253 | chan_err(chan, "DMA halt timeout!\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 254 | } |
| 255 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 256 | /** |
| 257 | * fsl_chan_set_src_loop_size - Set source address hold transfer size |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 258 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 259 | * @size : Address loop size, 0 for disable loop |
| 260 | * |
| 261 | * The set source address hold transfer size. The source |
| 262 | * address hold or loop transfer size is when the DMA transfer |
| 263 | * data from source address (SA), if the loop size is 4, the DMA will |
| 264 | * read data from SA, SA + 1, SA + 2, SA + 3, then loop back to SA, |
| 265 | * SA + 1 ... and so on. |
| 266 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 267 | static void fsl_chan_set_src_loop_size(struct fsldma_chan *chan, int size) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 268 | { |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 269 | u32 mode; |
| 270 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 271 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 272 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 273 | switch (size) { |
| 274 | case 0: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 275 | mode &= ~FSL_DMA_MR_SAHE; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 276 | break; |
| 277 | case 1: |
| 278 | case 2: |
| 279 | case 4: |
| 280 | case 8: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 281 | mode |= FSL_DMA_MR_SAHE | (__ilog2(size) << 14); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 282 | break; |
| 283 | } |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 284 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 285 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 286 | } |
| 287 | |
| 288 | /** |
Ira Snyder | 738f5f7 | 2010-01-06 13:34:02 +0000 | [diff] [blame] | 289 | * fsl_chan_set_dst_loop_size - Set destination address hold transfer size |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 290 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 291 | * @size : Address loop size, 0 for disable loop |
| 292 | * |
| 293 | * The set destination address hold transfer size. The destination |
| 294 | * address hold or loop transfer size is when the DMA transfer |
| 295 | * data to destination address (TA), if the loop size is 4, the DMA will |
| 296 | * write data to TA, TA + 1, TA + 2, TA + 3, then loop back to TA, |
| 297 | * TA + 1 ... and so on. |
| 298 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 299 | static void fsl_chan_set_dst_loop_size(struct fsldma_chan *chan, int size) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 300 | { |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 301 | u32 mode; |
| 302 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 303 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 304 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 305 | switch (size) { |
| 306 | case 0: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 307 | mode &= ~FSL_DMA_MR_DAHE; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 308 | break; |
| 309 | case 1: |
| 310 | case 2: |
| 311 | case 4: |
| 312 | case 8: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 313 | mode |= FSL_DMA_MR_DAHE | (__ilog2(size) << 16); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 314 | break; |
| 315 | } |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 316 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 317 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 318 | } |
| 319 | |
| 320 | /** |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 321 | * fsl_chan_set_request_count - Set DMA Request Count for external control |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 322 | * @chan : Freescale DMA channel |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 323 | * @size : Number of bytes to transfer in a single request |
| 324 | * |
| 325 | * The Freescale DMA channel can be controlled by the external signal DREQ#. |
| 326 | * The DMA request count is how many bytes are allowed to transfer before |
| 327 | * pausing the channel, after which a new assertion of DREQ# resumes channel |
| 328 | * operation. |
| 329 | * |
| 330 | * A size of 0 disables external pause control. The maximum size is 1024. |
| 331 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 332 | static void fsl_chan_set_request_count(struct fsldma_chan *chan, int size) |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 333 | { |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 334 | u32 mode; |
| 335 | |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 336 | BUG_ON(size > 1024); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 337 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 338 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 339 | mode |= (__ilog2(size) << 24) & 0x0f000000; |
| 340 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 341 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 342 | } |
| 343 | |
| 344 | /** |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 345 | * fsl_chan_toggle_ext_pause - Toggle channel external pause status |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 346 | * @chan : Freescale DMA channel |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 347 | * @enable : 0 is disabled, 1 is enabled. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 348 | * |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 349 | * The Freescale DMA channel can be controlled by the external signal DREQ#. |
| 350 | * The DMA Request Count feature should be used in addition to this feature |
| 351 | * to set the number of bytes to transfer before pausing the channel. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 352 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 353 | static void fsl_chan_toggle_ext_pause(struct fsldma_chan *chan, int enable) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 354 | { |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 355 | if (enable) |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 356 | chan->feature |= FSL_DMA_CHAN_PAUSE_EXT; |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 357 | else |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 358 | chan->feature &= ~FSL_DMA_CHAN_PAUSE_EXT; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 359 | } |
| 360 | |
| 361 | /** |
| 362 | * fsl_chan_toggle_ext_start - Toggle channel external start status |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 363 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 364 | * @enable : 0 is disabled, 1 is enabled. |
| 365 | * |
| 366 | * If enable the external start, the channel can be started by an |
| 367 | * external DMA start pin. So the dma_start() does not start the |
| 368 | * transfer immediately. The DMA channel will wait for the |
| 369 | * control pin asserted. |
| 370 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 371 | static void fsl_chan_toggle_ext_start(struct fsldma_chan *chan, int enable) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 372 | { |
| 373 | if (enable) |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 374 | chan->feature |= FSL_DMA_CHAN_START_EXT; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 375 | else |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 376 | chan->feature &= ~FSL_DMA_CHAN_START_EXT; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 377 | } |
| 378 | |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 379 | static void append_ld_queue(struct fsldma_chan *chan, struct fsl_desc_sw *desc) |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 380 | { |
| 381 | struct fsl_desc_sw *tail = to_fsl_desc(chan->ld_pending.prev); |
| 382 | |
| 383 | if (list_empty(&chan->ld_pending)) |
| 384 | goto out_splice; |
| 385 | |
| 386 | /* |
| 387 | * Add the hardware descriptor to the chain of hardware descriptors |
| 388 | * that already exists in memory. |
| 389 | * |
| 390 | * This will un-set the EOL bit of the existing transaction, and the |
| 391 | * last link in this transaction will become the EOL descriptor. |
| 392 | */ |
| 393 | set_desc_next(chan, &tail->hw, desc->async_tx.phys); |
| 394 | |
| 395 | /* |
| 396 | * Add the software descriptor and all children to the list |
| 397 | * of pending transactions |
| 398 | */ |
| 399 | out_splice: |
| 400 | list_splice_tail_init(&desc->tx_list, &chan->ld_pending); |
| 401 | } |
| 402 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 403 | static dma_cookie_t fsl_dma_tx_submit(struct dma_async_tx_descriptor *tx) |
| 404 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 405 | struct fsldma_chan *chan = to_fsl_chan(tx->chan); |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 406 | struct fsl_desc_sw *desc = tx_to_fsl_desc(tx); |
| 407 | struct fsl_desc_sw *child; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 408 | unsigned long flags; |
| 409 | dma_cookie_t cookie; |
| 410 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 411 | spin_lock_irqsave(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 412 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 413 | /* |
| 414 | * assign cookies to all of the software descriptors |
| 415 | * that make up this transaction |
| 416 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 417 | cookie = chan->common.cookie; |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 418 | list_for_each_entry(child, &desc->tx_list, node) { |
Ira Snyder | bcfb746 | 2009-05-15 14:27:16 -0700 | [diff] [blame] | 419 | cookie++; |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 420 | if (cookie < DMA_MIN_COOKIE) |
| 421 | cookie = DMA_MIN_COOKIE; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 422 | |
Steven J. Magnani | 6ca3a7a | 2010-02-25 13:39:30 -0600 | [diff] [blame] | 423 | child->async_tx.cookie = cookie; |
Ira Snyder | bcfb746 | 2009-05-15 14:27:16 -0700 | [diff] [blame] | 424 | } |
| 425 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 426 | chan->common.cookie = cookie; |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 427 | |
| 428 | /* put this transaction onto the tail of the pending queue */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 429 | append_ld_queue(chan, desc); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 430 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 431 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 432 | |
| 433 | return cookie; |
| 434 | } |
| 435 | |
| 436 | /** |
| 437 | * fsl_dma_alloc_descriptor - Allocate descriptor from channel's DMA pool. |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 438 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 439 | * |
| 440 | * Return - The descriptor allocated. NULL for failed. |
| 441 | */ |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 442 | static struct fsl_desc_sw *fsl_dma_alloc_descriptor(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 443 | { |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 444 | struct fsl_desc_sw *desc; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 445 | dma_addr_t pdesc; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 446 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 447 | desc = dma_pool_alloc(chan->desc_pool, GFP_ATOMIC, &pdesc); |
| 448 | if (!desc) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 449 | chan_dbg(chan, "out of memory for link descriptor\n"); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 450 | return NULL; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 451 | } |
| 452 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 453 | memset(desc, 0, sizeof(*desc)); |
| 454 | INIT_LIST_HEAD(&desc->tx_list); |
| 455 | dma_async_tx_descriptor_init(&desc->async_tx, &chan->common); |
| 456 | desc->async_tx.tx_submit = fsl_dma_tx_submit; |
| 457 | desc->async_tx.phys = pdesc; |
| 458 | |
Ira Snyder | 0ab09c3 | 2011-03-03 07:54:56 +0000 | [diff] [blame] | 459 | #ifdef FSL_DMA_LD_DEBUG |
| 460 | chan_dbg(chan, "LD %p allocated\n", desc); |
| 461 | #endif |
| 462 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 463 | return desc; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 464 | } |
| 465 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 466 | /** |
| 467 | * fsl_dma_alloc_chan_resources - Allocate resources for DMA channel. |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 468 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 469 | * |
| 470 | * This function will create a dma pool for descriptor allocation. |
| 471 | * |
| 472 | * Return - The number of descriptors allocated. |
| 473 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 474 | static int fsl_dma_alloc_chan_resources(struct dma_chan *dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 475 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 476 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 477 | |
| 478 | /* Has this channel already been allocated? */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 479 | if (chan->desc_pool) |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 480 | return 1; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 481 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 482 | /* |
| 483 | * We need the descriptor to be aligned to 32bytes |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 484 | * for meeting FSL DMA specification requirement. |
| 485 | */ |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 486 | chan->desc_pool = dma_pool_create(chan->name, chan->dev, |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 487 | sizeof(struct fsl_desc_sw), |
| 488 | __alignof__(struct fsl_desc_sw), 0); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 489 | if (!chan->desc_pool) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 490 | chan_err(chan, "unable to allocate descriptor pool\n"); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 491 | return -ENOMEM; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 492 | } |
| 493 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 494 | /* there is at least one descriptor free to be allocated */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 495 | return 1; |
| 496 | } |
| 497 | |
| 498 | /** |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 499 | * fsldma_free_desc_list - Free all descriptors in a queue |
| 500 | * @chan: Freescae DMA channel |
| 501 | * @list: the list to free |
| 502 | * |
| 503 | * LOCKING: must hold chan->desc_lock |
| 504 | */ |
| 505 | static void fsldma_free_desc_list(struct fsldma_chan *chan, |
| 506 | struct list_head *list) |
| 507 | { |
| 508 | struct fsl_desc_sw *desc, *_desc; |
| 509 | |
| 510 | list_for_each_entry_safe(desc, _desc, list, node) { |
| 511 | list_del(&desc->node); |
Ira Snyder | 0ab09c3 | 2011-03-03 07:54:56 +0000 | [diff] [blame] | 512 | #ifdef FSL_DMA_LD_DEBUG |
| 513 | chan_dbg(chan, "LD %p free\n", desc); |
| 514 | #endif |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 515 | dma_pool_free(chan->desc_pool, desc, desc->async_tx.phys); |
| 516 | } |
| 517 | } |
| 518 | |
| 519 | static void fsldma_free_desc_list_reverse(struct fsldma_chan *chan, |
| 520 | struct list_head *list) |
| 521 | { |
| 522 | struct fsl_desc_sw *desc, *_desc; |
| 523 | |
| 524 | list_for_each_entry_safe_reverse(desc, _desc, list, node) { |
| 525 | list_del(&desc->node); |
Ira Snyder | 0ab09c3 | 2011-03-03 07:54:56 +0000 | [diff] [blame] | 526 | #ifdef FSL_DMA_LD_DEBUG |
| 527 | chan_dbg(chan, "LD %p free\n", desc); |
| 528 | #endif |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 529 | dma_pool_free(chan->desc_pool, desc, desc->async_tx.phys); |
| 530 | } |
| 531 | } |
| 532 | |
| 533 | /** |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 534 | * fsl_dma_free_chan_resources - Free all resources of the channel. |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 535 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 536 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 537 | static void fsl_dma_free_chan_resources(struct dma_chan *dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 538 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 539 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 540 | unsigned long flags; |
| 541 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 542 | chan_dbg(chan, "free all channel resources\n"); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 543 | spin_lock_irqsave(&chan->desc_lock, flags); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 544 | fsldma_free_desc_list(chan, &chan->ld_pending); |
| 545 | fsldma_free_desc_list(chan, &chan->ld_running); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 546 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 547 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 548 | dma_pool_destroy(chan->desc_pool); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 549 | chan->desc_pool = NULL; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 550 | } |
| 551 | |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 552 | static struct dma_async_tx_descriptor * |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 553 | fsl_dma_prep_interrupt(struct dma_chan *dchan, unsigned long flags) |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 554 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 555 | struct fsldma_chan *chan; |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 556 | struct fsl_desc_sw *new; |
| 557 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 558 | if (!dchan) |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 559 | return NULL; |
| 560 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 561 | chan = to_fsl_chan(dchan); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 562 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 563 | new = fsl_dma_alloc_descriptor(chan); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 564 | if (!new) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 565 | chan_err(chan, "%s\n", msg_ld_oom); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 566 | return NULL; |
| 567 | } |
| 568 | |
| 569 | new->async_tx.cookie = -EBUSY; |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 570 | new->async_tx.flags = flags; |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 571 | |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 572 | /* Insert the link descriptor to the LD ring */ |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 573 | list_add_tail(&new->node, &new->tx_list); |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 574 | |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 575 | /* Set End-of-link to the last link descriptor of new list */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 576 | set_ld_eol(chan, new); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 577 | |
| 578 | return &new->async_tx; |
| 579 | } |
| 580 | |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 581 | static struct dma_async_tx_descriptor * |
| 582 | fsl_dma_prep_memcpy(struct dma_chan *dchan, |
| 583 | dma_addr_t dma_dst, dma_addr_t dma_src, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 584 | size_t len, unsigned long flags) |
| 585 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 586 | struct fsldma_chan *chan; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 587 | struct fsl_desc_sw *first = NULL, *prev = NULL, *new; |
| 588 | size_t copy; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 589 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 590 | if (!dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 591 | return NULL; |
| 592 | |
| 593 | if (!len) |
| 594 | return NULL; |
| 595 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 596 | chan = to_fsl_chan(dchan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 597 | |
| 598 | do { |
| 599 | |
| 600 | /* Allocate the link descriptor from DMA pool */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 601 | new = fsl_dma_alloc_descriptor(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 602 | if (!new) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 603 | chan_err(chan, "%s\n", msg_ld_oom); |
Ira Snyder | 2e077f8 | 2009-05-15 09:59:46 -0700 | [diff] [blame] | 604 | goto fail; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 605 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 606 | |
Zhang Wei | 5682284 | 2008-03-13 10:45:27 -0700 | [diff] [blame] | 607 | copy = min(len, (size_t)FSL_DMA_BCR_MAX_CNT); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 608 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 609 | set_desc_cnt(chan, &new->hw, copy); |
| 610 | set_desc_src(chan, &new->hw, dma_src); |
| 611 | set_desc_dst(chan, &new->hw, dma_dst); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 612 | |
| 613 | if (!first) |
| 614 | first = new; |
| 615 | else |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 616 | set_desc_next(chan, &prev->hw, new->async_tx.phys); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 617 | |
| 618 | new->async_tx.cookie = 0; |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 619 | async_tx_ack(&new->async_tx); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 620 | |
| 621 | prev = new; |
| 622 | len -= copy; |
| 623 | dma_src += copy; |
Ira Snyder | 738f5f7 | 2010-01-06 13:34:02 +0000 | [diff] [blame] | 624 | dma_dst += copy; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 625 | |
| 626 | /* Insert the link descriptor to the LD ring */ |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 627 | list_add_tail(&new->node, &first->tx_list); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 628 | } while (len); |
| 629 | |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 630 | new->async_tx.flags = flags; /* client is in control of this ack */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 631 | new->async_tx.cookie = -EBUSY; |
| 632 | |
Ira Snyder | 31f4306 | 2011-03-03 07:54:57 +0000 | [diff] [blame] | 633 | /* Set End-of-link to the last link descriptor of new list */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 634 | set_ld_eol(chan, new); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 635 | |
Ira Snyder | 2e077f8 | 2009-05-15 09:59:46 -0700 | [diff] [blame] | 636 | return &first->async_tx; |
| 637 | |
| 638 | fail: |
| 639 | if (!first) |
| 640 | return NULL; |
| 641 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 642 | fsldma_free_desc_list_reverse(chan, &first->tx_list); |
Ira Snyder | 2e077f8 | 2009-05-15 09:59:46 -0700 | [diff] [blame] | 643 | return NULL; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 644 | } |
| 645 | |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 646 | static struct dma_async_tx_descriptor *fsl_dma_prep_sg(struct dma_chan *dchan, |
| 647 | struct scatterlist *dst_sg, unsigned int dst_nents, |
| 648 | struct scatterlist *src_sg, unsigned int src_nents, |
| 649 | unsigned long flags) |
| 650 | { |
| 651 | struct fsl_desc_sw *first = NULL, *prev = NULL, *new = NULL; |
| 652 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
| 653 | size_t dst_avail, src_avail; |
| 654 | dma_addr_t dst, src; |
| 655 | size_t len; |
| 656 | |
| 657 | /* basic sanity checks */ |
| 658 | if (dst_nents == 0 || src_nents == 0) |
| 659 | return NULL; |
| 660 | |
| 661 | if (dst_sg == NULL || src_sg == NULL) |
| 662 | return NULL; |
| 663 | |
| 664 | /* |
| 665 | * TODO: should we check that both scatterlists have the same |
| 666 | * TODO: number of bytes in total? Is that really an error? |
| 667 | */ |
| 668 | |
| 669 | /* get prepared for the loop */ |
| 670 | dst_avail = sg_dma_len(dst_sg); |
| 671 | src_avail = sg_dma_len(src_sg); |
| 672 | |
| 673 | /* run until we are out of scatterlist entries */ |
| 674 | while (true) { |
| 675 | |
| 676 | /* create the largest transaction possible */ |
| 677 | len = min_t(size_t, src_avail, dst_avail); |
| 678 | len = min_t(size_t, len, FSL_DMA_BCR_MAX_CNT); |
| 679 | if (len == 0) |
| 680 | goto fetch; |
| 681 | |
| 682 | dst = sg_dma_address(dst_sg) + sg_dma_len(dst_sg) - dst_avail; |
| 683 | src = sg_dma_address(src_sg) + sg_dma_len(src_sg) - src_avail; |
| 684 | |
| 685 | /* allocate and populate the descriptor */ |
| 686 | new = fsl_dma_alloc_descriptor(chan); |
| 687 | if (!new) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 688 | chan_err(chan, "%s\n", msg_ld_oom); |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 689 | goto fail; |
| 690 | } |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 691 | |
| 692 | set_desc_cnt(chan, &new->hw, len); |
| 693 | set_desc_src(chan, &new->hw, src); |
| 694 | set_desc_dst(chan, &new->hw, dst); |
| 695 | |
| 696 | if (!first) |
| 697 | first = new; |
| 698 | else |
| 699 | set_desc_next(chan, &prev->hw, new->async_tx.phys); |
| 700 | |
| 701 | new->async_tx.cookie = 0; |
| 702 | async_tx_ack(&new->async_tx); |
| 703 | prev = new; |
| 704 | |
| 705 | /* Insert the link descriptor to the LD ring */ |
| 706 | list_add_tail(&new->node, &first->tx_list); |
| 707 | |
| 708 | /* update metadata */ |
| 709 | dst_avail -= len; |
| 710 | src_avail -= len; |
| 711 | |
| 712 | fetch: |
| 713 | /* fetch the next dst scatterlist entry */ |
| 714 | if (dst_avail == 0) { |
| 715 | |
| 716 | /* no more entries: we're done */ |
| 717 | if (dst_nents == 0) |
| 718 | break; |
| 719 | |
| 720 | /* fetch the next entry: if there are no more: done */ |
| 721 | dst_sg = sg_next(dst_sg); |
| 722 | if (dst_sg == NULL) |
| 723 | break; |
| 724 | |
| 725 | dst_nents--; |
| 726 | dst_avail = sg_dma_len(dst_sg); |
| 727 | } |
| 728 | |
| 729 | /* fetch the next src scatterlist entry */ |
| 730 | if (src_avail == 0) { |
| 731 | |
| 732 | /* no more entries: we're done */ |
| 733 | if (src_nents == 0) |
| 734 | break; |
| 735 | |
| 736 | /* fetch the next entry: if there are no more: done */ |
| 737 | src_sg = sg_next(src_sg); |
| 738 | if (src_sg == NULL) |
| 739 | break; |
| 740 | |
| 741 | src_nents--; |
| 742 | src_avail = sg_dma_len(src_sg); |
| 743 | } |
| 744 | } |
| 745 | |
| 746 | new->async_tx.flags = flags; /* client is in control of this ack */ |
| 747 | new->async_tx.cookie = -EBUSY; |
| 748 | |
| 749 | /* Set End-of-link to the last link descriptor of new list */ |
| 750 | set_ld_eol(chan, new); |
| 751 | |
| 752 | return &first->async_tx; |
| 753 | |
| 754 | fail: |
| 755 | if (!first) |
| 756 | return NULL; |
| 757 | |
| 758 | fsldma_free_desc_list_reverse(chan, &first->tx_list); |
| 759 | return NULL; |
| 760 | } |
| 761 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 762 | /** |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 763 | * fsl_dma_prep_slave_sg - prepare descriptors for a DMA_SLAVE transaction |
| 764 | * @chan: DMA channel |
| 765 | * @sgl: scatterlist to transfer to/from |
| 766 | * @sg_len: number of entries in @scatterlist |
| 767 | * @direction: DMA direction |
| 768 | * @flags: DMAEngine flags |
| 769 | * |
| 770 | * Prepare a set of descriptors for a DMA_SLAVE transaction. Following the |
| 771 | * DMA_SLAVE API, this gets the device-specific information from the |
| 772 | * chan->private variable. |
| 773 | */ |
| 774 | static struct dma_async_tx_descriptor *fsl_dma_prep_slave_sg( |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 775 | struct dma_chan *dchan, struct scatterlist *sgl, unsigned int sg_len, |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 776 | enum dma_transfer_direction direction, unsigned long flags) |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 777 | { |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 778 | /* |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 779 | * This operation is not supported on the Freescale DMA controller |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 780 | * |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 781 | * However, we need to provide the function pointer to allow the |
| 782 | * device_control() method to work. |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 783 | */ |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 784 | return NULL; |
| 785 | } |
| 786 | |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 787 | static int fsl_dma_device_control(struct dma_chan *dchan, |
Linus Walleij | 0582763 | 2010-05-17 16:30:42 -0700 | [diff] [blame] | 788 | enum dma_ctrl_cmd cmd, unsigned long arg) |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 789 | { |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 790 | struct dma_slave_config *config; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 791 | struct fsldma_chan *chan; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 792 | unsigned long flags; |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 793 | int size; |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 794 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 795 | if (!dchan) |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 796 | return -EINVAL; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 797 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 798 | chan = to_fsl_chan(dchan); |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 799 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 800 | switch (cmd) { |
| 801 | case DMA_TERMINATE_ALL: |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 802 | spin_lock_irqsave(&chan->desc_lock, flags); |
| 803 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 804 | /* Halt the DMA engine */ |
| 805 | dma_halt(chan); |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 806 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 807 | /* Remove and free all of the descriptors in the LD queue */ |
| 808 | fsldma_free_desc_list(chan, &chan->ld_pending); |
| 809 | fsldma_free_desc_list(chan, &chan->ld_running); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 810 | chan->idle = true; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 811 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 812 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
| 813 | return 0; |
| 814 | |
| 815 | case DMA_SLAVE_CONFIG: |
| 816 | config = (struct dma_slave_config *)arg; |
| 817 | |
| 818 | /* make sure the channel supports setting burst size */ |
| 819 | if (!chan->set_request_count) |
| 820 | return -ENXIO; |
| 821 | |
| 822 | /* we set the controller burst size depending on direction */ |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 823 | if (config->direction == DMA_MEM_TO_DEV) |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 824 | size = config->dst_addr_width * config->dst_maxburst; |
| 825 | else |
| 826 | size = config->src_addr_width * config->src_maxburst; |
| 827 | |
| 828 | chan->set_request_count(chan, size); |
| 829 | return 0; |
| 830 | |
| 831 | case FSLDMA_EXTERNAL_START: |
| 832 | |
| 833 | /* make sure the channel supports external start */ |
| 834 | if (!chan->toggle_ext_start) |
| 835 | return -ENXIO; |
| 836 | |
| 837 | chan->toggle_ext_start(chan, arg); |
| 838 | return 0; |
| 839 | |
| 840 | default: |
| 841 | return -ENXIO; |
| 842 | } |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 843 | |
| 844 | return 0; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 845 | } |
| 846 | |
| 847 | /** |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 848 | * fsldma_cleanup_descriptor - cleanup and free a single link descriptor |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 849 | * @chan: Freescale DMA channel |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 850 | * @desc: descriptor to cleanup and free |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 851 | * |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 852 | * This function is used on a descriptor which has been executed by the DMA |
| 853 | * controller. It will run any callbacks, submit any dependencies, and then |
| 854 | * free the descriptor. |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 855 | */ |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 856 | static void fsldma_cleanup_descriptor(struct fsldma_chan *chan, |
| 857 | struct fsl_desc_sw *desc) |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 858 | { |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 859 | struct dma_async_tx_descriptor *txd = &desc->async_tx; |
| 860 | struct device *dev = chan->common.device->dev; |
| 861 | dma_addr_t src = get_desc_src(chan, desc); |
| 862 | dma_addr_t dst = get_desc_dst(chan, desc); |
| 863 | u32 len = get_desc_cnt(chan, desc); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 864 | |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 865 | /* Run the link descriptor callback function */ |
| 866 | if (txd->callback) { |
| 867 | #ifdef FSL_DMA_LD_DEBUG |
| 868 | chan_dbg(chan, "LD %p callback\n", desc); |
| 869 | #endif |
| 870 | txd->callback(txd->callback_param); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 871 | } |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 872 | |
Ira Snyder | 9c4d1e7 | 2011-03-03 07:54:59 +0000 | [diff] [blame] | 873 | /* Run any dependencies */ |
| 874 | dma_run_dependencies(txd); |
| 875 | |
| 876 | /* Unmap the dst buffer, if requested */ |
| 877 | if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) { |
| 878 | if (txd->flags & DMA_COMPL_DEST_UNMAP_SINGLE) |
| 879 | dma_unmap_single(dev, dst, len, DMA_FROM_DEVICE); |
| 880 | else |
| 881 | dma_unmap_page(dev, dst, len, DMA_FROM_DEVICE); |
| 882 | } |
| 883 | |
| 884 | /* Unmap the src buffer, if requested */ |
| 885 | if (!(txd->flags & DMA_COMPL_SKIP_SRC_UNMAP)) { |
| 886 | if (txd->flags & DMA_COMPL_SRC_UNMAP_SINGLE) |
| 887 | dma_unmap_single(dev, src, len, DMA_TO_DEVICE); |
| 888 | else |
| 889 | dma_unmap_page(dev, src, len, DMA_TO_DEVICE); |
| 890 | } |
| 891 | |
| 892 | #ifdef FSL_DMA_LD_DEBUG |
| 893 | chan_dbg(chan, "LD %p free\n", desc); |
| 894 | #endif |
| 895 | dma_pool_free(chan->desc_pool, desc, txd->phys); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 896 | } |
| 897 | |
| 898 | /** |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 899 | * fsl_chan_xfer_ld_queue - transfer any pending transactions |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 900 | * @chan : Freescale DMA channel |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 901 | * |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 902 | * HARDWARE STATE: idle |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 903 | * LOCKING: must hold chan->desc_lock |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 904 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 905 | static void fsl_chan_xfer_ld_queue(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 906 | { |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 907 | struct fsl_desc_sw *desc; |
Ira Snyder | 138ef01 | 2009-05-19 15:42:13 -0700 | [diff] [blame] | 908 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 909 | /* |
| 910 | * If the list of pending descriptors is empty, then we |
| 911 | * don't need to do any work at all |
| 912 | */ |
| 913 | if (list_empty(&chan->ld_pending)) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 914 | chan_dbg(chan, "no pending LDs\n"); |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 915 | return; |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 916 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 917 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 918 | /* |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 919 | * The DMA controller is not idle, which means that the interrupt |
| 920 | * handler will start any queued transactions when it runs after |
| 921 | * this transaction finishes |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 922 | */ |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 923 | if (!chan->idle) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 924 | chan_dbg(chan, "DMA controller still busy\n"); |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 925 | return; |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 926 | } |
| 927 | |
| 928 | /* |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 929 | * If there are some link descriptors which have not been |
| 930 | * transferred, we need to start the controller |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 931 | */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 932 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 933 | /* |
| 934 | * Move all elements from the queue of pending transactions |
| 935 | * onto the list of running transactions |
| 936 | */ |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 937 | chan_dbg(chan, "idle, starting controller\n"); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 938 | desc = list_first_entry(&chan->ld_pending, struct fsl_desc_sw, node); |
| 939 | list_splice_tail_init(&chan->ld_pending, &chan->ld_running); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 940 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 941 | /* |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 942 | * The 85xx DMA controller doesn't clear the channel start bit |
| 943 | * automatically at the end of a transfer. Therefore we must clear |
| 944 | * it in software before starting the transfer. |
| 945 | */ |
| 946 | if ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) { |
| 947 | u32 mode; |
| 948 | |
| 949 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
| 950 | mode &= ~FSL_DMA_MR_CS; |
| 951 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
| 952 | } |
| 953 | |
| 954 | /* |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 955 | * Program the descriptor's address into the DMA controller, |
| 956 | * then start the DMA transaction |
| 957 | */ |
| 958 | set_cdar(chan, desc->async_tx.phys); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 959 | get_cdar(chan); |
Ira Snyder | 138ef01 | 2009-05-19 15:42:13 -0700 | [diff] [blame] | 960 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 961 | dma_start(chan); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 962 | chan->idle = false; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 963 | } |
| 964 | |
| 965 | /** |
| 966 | * fsl_dma_memcpy_issue_pending - Issue the DMA start command |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 967 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 968 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 969 | static void fsl_dma_memcpy_issue_pending(struct dma_chan *dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 970 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 971 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 972 | unsigned long flags; |
| 973 | |
| 974 | spin_lock_irqsave(&chan->desc_lock, flags); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 975 | fsl_chan_xfer_ld_queue(chan); |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 976 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 977 | } |
| 978 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 979 | /** |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 980 | * fsl_tx_status - Determine the DMA status |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 981 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 982 | */ |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 983 | static enum dma_status fsl_tx_status(struct dma_chan *dchan, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 984 | dma_cookie_t cookie, |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 985 | struct dma_tx_state *txstate) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 986 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 987 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 988 | dma_cookie_t last_complete; |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 989 | dma_cookie_t last_used; |
| 990 | unsigned long flags; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 991 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 992 | spin_lock_irqsave(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 993 | |
Russell King - ARM Linux | 4d4e58d | 2012-03-06 22:34:06 +0000 | [diff] [blame] | 994 | last_complete = dchan->completed_cookie; |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 995 | last_used = dchan->cookie; |
| 996 | |
| 997 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 998 | |
Dan Williams | bca3469 | 2010-03-26 16:52:10 -0700 | [diff] [blame] | 999 | dma_set_tx_state(txstate, last_complete, last_used, 0); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1000 | return dma_async_is_complete(cookie, last_complete, last_used); |
| 1001 | } |
| 1002 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1003 | /*----------------------------------------------------------------------------*/ |
| 1004 | /* Interrupt Handling */ |
| 1005 | /*----------------------------------------------------------------------------*/ |
| 1006 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1007 | static irqreturn_t fsldma_chan_irq(int irq, void *data) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1008 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1009 | struct fsldma_chan *chan = data; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1010 | u32 stat; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1011 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1012 | /* save and clear the status register */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1013 | stat = get_sr(chan); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1014 | set_sr(chan, stat); |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1015 | chan_dbg(chan, "irq: stat = 0x%x\n", stat); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1016 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1017 | /* check that this was really our device */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1018 | stat &= ~(FSL_DMA_SR_CB | FSL_DMA_SR_CH); |
| 1019 | if (!stat) |
| 1020 | return IRQ_NONE; |
| 1021 | |
| 1022 | if (stat & FSL_DMA_SR_TE) |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1023 | chan_err(chan, "Transfer Error!\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1024 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1025 | /* |
| 1026 | * Programming Error |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 1027 | * The DMA_INTERRUPT async_tx is a NULL transfer, which will |
| 1028 | * triger a PE interrupt. |
| 1029 | */ |
| 1030 | if (stat & FSL_DMA_SR_PE) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1031 | chan_dbg(chan, "irq: Programming Error INT\n"); |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 1032 | stat &= ~FSL_DMA_SR_PE; |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1033 | if (get_bcr(chan) != 0) |
| 1034 | chan_err(chan, "Programming Error!\n"); |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1035 | } |
| 1036 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1037 | /* |
| 1038 | * For MPC8349, EOCDI event need to update cookie |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1039 | * and start the next transfer if it exist. |
| 1040 | */ |
| 1041 | if (stat & FSL_DMA_SR_EOCDI) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1042 | chan_dbg(chan, "irq: End-of-Chain link INT\n"); |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1043 | stat &= ~FSL_DMA_SR_EOCDI; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1044 | } |
| 1045 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1046 | /* |
| 1047 | * If it current transfer is the end-of-transfer, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1048 | * we should clear the Channel Start bit for |
| 1049 | * prepare next transfer. |
| 1050 | */ |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1051 | if (stat & FSL_DMA_SR_EOLNI) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1052 | chan_dbg(chan, "irq: End-of-link INT\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1053 | stat &= ~FSL_DMA_SR_EOLNI; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1054 | } |
| 1055 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1056 | /* check that the DMA controller is really idle */ |
| 1057 | if (!dma_is_idle(chan)) |
| 1058 | chan_err(chan, "irq: controller not idle!\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1059 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1060 | /* check that we handled all of the bits */ |
| 1061 | if (stat) |
| 1062 | chan_err(chan, "irq: unhandled sr 0x%08x\n", stat); |
| 1063 | |
| 1064 | /* |
| 1065 | * Schedule the tasklet to handle all cleanup of the current |
| 1066 | * transaction. It will start a new transaction if there is |
| 1067 | * one pending. |
| 1068 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1069 | tasklet_schedule(&chan->tasklet); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1070 | chan_dbg(chan, "irq: Exit\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1071 | return IRQ_HANDLED; |
| 1072 | } |
| 1073 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1074 | static void dma_do_tasklet(unsigned long data) |
| 1075 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1076 | struct fsldma_chan *chan = (struct fsldma_chan *)data; |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 1077 | struct fsl_desc_sw *desc, *_desc; |
| 1078 | LIST_HEAD(ld_cleanup); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1079 | unsigned long flags; |
| 1080 | |
| 1081 | chan_dbg(chan, "tasklet entry\n"); |
| 1082 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1083 | spin_lock_irqsave(&chan->desc_lock, flags); |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 1084 | |
| 1085 | /* update the cookie if we have some descriptors to cleanup */ |
| 1086 | if (!list_empty(&chan->ld_running)) { |
| 1087 | dma_cookie_t cookie; |
| 1088 | |
| 1089 | desc = to_fsl_desc(chan->ld_running.prev); |
| 1090 | cookie = desc->async_tx.cookie; |
| 1091 | |
Russell King - ARM Linux | 4d4e58d | 2012-03-06 22:34:06 +0000 | [diff] [blame] | 1092 | chan->common.completed_cookie = cookie; |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 1093 | chan_dbg(chan, "completed_cookie=%d\n", cookie); |
| 1094 | } |
| 1095 | |
| 1096 | /* |
| 1097 | * move the descriptors to a temporary list so we can drop the lock |
| 1098 | * during the entire cleanup operation |
| 1099 | */ |
| 1100 | list_splice_tail_init(&chan->ld_running, &ld_cleanup); |
| 1101 | |
| 1102 | /* the hardware is now idle and ready for more */ |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1103 | chan->idle = true; |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 1104 | |
| 1105 | /* |
| 1106 | * Start any pending transactions automatically |
| 1107 | * |
| 1108 | * In the ideal case, we keep the DMA controller busy while we go |
| 1109 | * ahead and free the descriptors below. |
| 1110 | */ |
| 1111 | fsl_chan_xfer_ld_queue(chan); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1112 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
| 1113 | |
Ira Snyder | dc8d409 | 2011-03-03 07:55:00 +0000 | [diff] [blame] | 1114 | /* Run the callback for each descriptor, in order */ |
| 1115 | list_for_each_entry_safe(desc, _desc, &ld_cleanup, node) { |
| 1116 | |
| 1117 | /* Remove from the list of transactions */ |
| 1118 | list_del(&desc->node); |
| 1119 | |
| 1120 | /* Run all cleanup for this descriptor */ |
| 1121 | fsldma_cleanup_descriptor(chan, desc); |
| 1122 | } |
| 1123 | |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1124 | chan_dbg(chan, "tasklet exit\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1125 | } |
| 1126 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1127 | static irqreturn_t fsldma_ctrl_irq(int irq, void *data) |
| 1128 | { |
| 1129 | struct fsldma_device *fdev = data; |
| 1130 | struct fsldma_chan *chan; |
| 1131 | unsigned int handled = 0; |
| 1132 | u32 gsr, mask; |
| 1133 | int i; |
| 1134 | |
| 1135 | gsr = (fdev->feature & FSL_DMA_BIG_ENDIAN) ? in_be32(fdev->regs) |
| 1136 | : in_le32(fdev->regs); |
| 1137 | mask = 0xff000000; |
| 1138 | dev_dbg(fdev->dev, "IRQ: gsr 0x%.8x\n", gsr); |
| 1139 | |
| 1140 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
| 1141 | chan = fdev->chan[i]; |
| 1142 | if (!chan) |
| 1143 | continue; |
| 1144 | |
| 1145 | if (gsr & mask) { |
| 1146 | dev_dbg(fdev->dev, "IRQ: chan %d\n", chan->id); |
| 1147 | fsldma_chan_irq(irq, chan); |
| 1148 | handled++; |
| 1149 | } |
| 1150 | |
| 1151 | gsr &= ~mask; |
| 1152 | mask >>= 8; |
| 1153 | } |
| 1154 | |
| 1155 | return IRQ_RETVAL(handled); |
| 1156 | } |
| 1157 | |
| 1158 | static void fsldma_free_irqs(struct fsldma_device *fdev) |
| 1159 | { |
| 1160 | struct fsldma_chan *chan; |
| 1161 | int i; |
| 1162 | |
| 1163 | if (fdev->irq != NO_IRQ) { |
| 1164 | dev_dbg(fdev->dev, "free per-controller IRQ\n"); |
| 1165 | free_irq(fdev->irq, fdev); |
| 1166 | return; |
| 1167 | } |
| 1168 | |
| 1169 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
| 1170 | chan = fdev->chan[i]; |
| 1171 | if (chan && chan->irq != NO_IRQ) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1172 | chan_dbg(chan, "free per-channel IRQ\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1173 | free_irq(chan->irq, chan); |
| 1174 | } |
| 1175 | } |
| 1176 | } |
| 1177 | |
| 1178 | static int fsldma_request_irqs(struct fsldma_device *fdev) |
| 1179 | { |
| 1180 | struct fsldma_chan *chan; |
| 1181 | int ret; |
| 1182 | int i; |
| 1183 | |
| 1184 | /* if we have a per-controller IRQ, use that */ |
| 1185 | if (fdev->irq != NO_IRQ) { |
| 1186 | dev_dbg(fdev->dev, "request per-controller IRQ\n"); |
| 1187 | ret = request_irq(fdev->irq, fsldma_ctrl_irq, IRQF_SHARED, |
| 1188 | "fsldma-controller", fdev); |
| 1189 | return ret; |
| 1190 | } |
| 1191 | |
| 1192 | /* no per-controller IRQ, use the per-channel IRQs */ |
| 1193 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
| 1194 | chan = fdev->chan[i]; |
| 1195 | if (!chan) |
| 1196 | continue; |
| 1197 | |
| 1198 | if (chan->irq == NO_IRQ) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1199 | chan_err(chan, "interrupts property missing in device tree\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1200 | ret = -ENODEV; |
| 1201 | goto out_unwind; |
| 1202 | } |
| 1203 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1204 | chan_dbg(chan, "request per-channel IRQ\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1205 | ret = request_irq(chan->irq, fsldma_chan_irq, IRQF_SHARED, |
| 1206 | "fsldma-chan", chan); |
| 1207 | if (ret) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1208 | chan_err(chan, "unable to request per-channel IRQ\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1209 | goto out_unwind; |
| 1210 | } |
| 1211 | } |
| 1212 | |
| 1213 | return 0; |
| 1214 | |
| 1215 | out_unwind: |
| 1216 | for (/* none */; i >= 0; i--) { |
| 1217 | chan = fdev->chan[i]; |
| 1218 | if (!chan) |
| 1219 | continue; |
| 1220 | |
| 1221 | if (chan->irq == NO_IRQ) |
| 1222 | continue; |
| 1223 | |
| 1224 | free_irq(chan->irq, chan); |
| 1225 | } |
| 1226 | |
| 1227 | return ret; |
| 1228 | } |
| 1229 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1230 | /*----------------------------------------------------------------------------*/ |
| 1231 | /* OpenFirmware Subsystem */ |
| 1232 | /*----------------------------------------------------------------------------*/ |
| 1233 | |
| 1234 | static int __devinit fsl_dma_chan_probe(struct fsldma_device *fdev, |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1235 | struct device_node *node, u32 feature, const char *compatible) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1236 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1237 | struct fsldma_chan *chan; |
Ira Snyder | 4ce0e95 | 2010-01-06 13:34:00 +0000 | [diff] [blame] | 1238 | struct resource res; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1239 | int err; |
| 1240 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1241 | /* alloc channel */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1242 | chan = kzalloc(sizeof(*chan), GFP_KERNEL); |
| 1243 | if (!chan) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1244 | dev_err(fdev->dev, "no free memory for DMA channels!\n"); |
| 1245 | err = -ENOMEM; |
| 1246 | goto out_return; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1247 | } |
| 1248 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1249 | /* ioremap registers for use */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1250 | chan->regs = of_iomap(node, 0); |
| 1251 | if (!chan->regs) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1252 | dev_err(fdev->dev, "unable to ioremap registers\n"); |
| 1253 | err = -ENOMEM; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1254 | goto out_free_chan; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1255 | } |
| 1256 | |
Ira Snyder | 4ce0e95 | 2010-01-06 13:34:00 +0000 | [diff] [blame] | 1257 | err = of_address_to_resource(node, 0, &res); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1258 | if (err) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1259 | dev_err(fdev->dev, "unable to find 'reg' property\n"); |
| 1260 | goto out_iounmap_regs; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1261 | } |
| 1262 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1263 | chan->feature = feature; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1264 | if (!fdev->feature) |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1265 | fdev->feature = chan->feature; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1266 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1267 | /* |
| 1268 | * If the DMA device's feature is different than the feature |
| 1269 | * of its channels, report the bug |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1270 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1271 | WARN_ON(fdev->feature != chan->feature); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1272 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1273 | chan->dev = fdev->dev; |
| 1274 | chan->id = ((res.start - 0x100) & 0xfff) >> 7; |
| 1275 | if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1276 | dev_err(fdev->dev, "too many channels for device\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1277 | err = -EINVAL; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1278 | goto out_iounmap_regs; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1279 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1280 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1281 | fdev->chan[chan->id] = chan; |
| 1282 | tasklet_init(&chan->tasklet, dma_do_tasklet, (unsigned long)chan); |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame] | 1283 | snprintf(chan->name, sizeof(chan->name), "chan%d", chan->id); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1284 | |
| 1285 | /* Initialize the channel */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1286 | dma_init(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1287 | |
| 1288 | /* Clear cdar registers */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1289 | set_cdar(chan, 0); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1290 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1291 | switch (chan->feature & FSL_DMA_IP_MASK) { |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1292 | case FSL_DMA_IP_85XX: |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1293 | chan->toggle_ext_pause = fsl_chan_toggle_ext_pause; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1294 | case FSL_DMA_IP_83XX: |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1295 | chan->toggle_ext_start = fsl_chan_toggle_ext_start; |
| 1296 | chan->set_src_loop_size = fsl_chan_set_src_loop_size; |
| 1297 | chan->set_dst_loop_size = fsl_chan_set_dst_loop_size; |
| 1298 | chan->set_request_count = fsl_chan_set_request_count; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1299 | } |
| 1300 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1301 | spin_lock_init(&chan->desc_lock); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1302 | INIT_LIST_HEAD(&chan->ld_pending); |
| 1303 | INIT_LIST_HEAD(&chan->ld_running); |
Ira Snyder | f04cd40 | 2011-03-03 07:54:58 +0000 | [diff] [blame] | 1304 | chan->idle = true; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1305 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1306 | chan->common.device = &fdev->common; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1307 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1308 | /* find the IRQ line, if it exists in the device tree */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1309 | chan->irq = irq_of_parse_and_map(node, 0); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1310 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1311 | /* Add the channel to DMA device channel list */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1312 | list_add_tail(&chan->common.device_node, &fdev->common.channels); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1313 | fdev->common.chancnt++; |
| 1314 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1315 | dev_info(fdev->dev, "#%d (%s), irq %d\n", chan->id, compatible, |
| 1316 | chan->irq != NO_IRQ ? chan->irq : fdev->irq); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1317 | |
| 1318 | return 0; |
Li Yang | 51ee87f | 2008-05-29 23:25:45 -0700 | [diff] [blame] | 1319 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1320 | out_iounmap_regs: |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1321 | iounmap(chan->regs); |
| 1322 | out_free_chan: |
| 1323 | kfree(chan); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1324 | out_return: |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1325 | return err; |
| 1326 | } |
| 1327 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1328 | static void fsl_dma_chan_remove(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1329 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1330 | irq_dispose_mapping(chan->irq); |
| 1331 | list_del(&chan->common.device_node); |
| 1332 | iounmap(chan->regs); |
| 1333 | kfree(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1334 | } |
| 1335 | |
Grant Likely | 0000612 | 2011-02-22 19:59:54 -0700 | [diff] [blame] | 1336 | static int __devinit fsldma_of_probe(struct platform_device *op) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1337 | { |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1338 | struct fsldma_device *fdev; |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1339 | struct device_node *child; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1340 | int err; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1341 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1342 | fdev = kzalloc(sizeof(*fdev), GFP_KERNEL); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1343 | if (!fdev) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1344 | dev_err(&op->dev, "No enough memory for 'priv'\n"); |
| 1345 | err = -ENOMEM; |
| 1346 | goto out_return; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1347 | } |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1348 | |
| 1349 | fdev->dev = &op->dev; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1350 | INIT_LIST_HEAD(&fdev->common.channels); |
| 1351 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1352 | /* ioremap the registers for use */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1353 | fdev->regs = of_iomap(op->dev.of_node, 0); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1354 | if (!fdev->regs) { |
| 1355 | dev_err(&op->dev, "unable to ioremap registers\n"); |
| 1356 | err = -ENOMEM; |
| 1357 | goto out_free_fdev; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1358 | } |
| 1359 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1360 | /* map the channel IRQ if it exists, but don't hookup the handler yet */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1361 | fdev->irq = irq_of_parse_and_map(op->dev.of_node, 0); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1362 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1363 | dma_cap_set(DMA_MEMCPY, fdev->common.cap_mask); |
| 1364 | dma_cap_set(DMA_INTERRUPT, fdev->common.cap_mask); |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 1365 | dma_cap_set(DMA_SG, fdev->common.cap_mask); |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 1366 | dma_cap_set(DMA_SLAVE, fdev->common.cap_mask); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1367 | fdev->common.device_alloc_chan_resources = fsl_dma_alloc_chan_resources; |
| 1368 | fdev->common.device_free_chan_resources = fsl_dma_free_chan_resources; |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 1369 | fdev->common.device_prep_dma_interrupt = fsl_dma_prep_interrupt; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1370 | fdev->common.device_prep_dma_memcpy = fsl_dma_prep_memcpy; |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 1371 | fdev->common.device_prep_dma_sg = fsl_dma_prep_sg; |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 1372 | fdev->common.device_tx_status = fsl_tx_status; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1373 | fdev->common.device_issue_pending = fsl_dma_memcpy_issue_pending; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 1374 | fdev->common.device_prep_slave_sg = fsl_dma_prep_slave_sg; |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 1375 | fdev->common.device_control = fsl_dma_device_control; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1376 | fdev->common.dev = &op->dev; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1377 | |
Li Yang | e2c8e425 | 2010-11-11 20:16:29 +0800 | [diff] [blame] | 1378 | dma_set_mask(&(op->dev), DMA_BIT_MASK(36)); |
| 1379 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1380 | dev_set_drvdata(&op->dev, fdev); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1381 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1382 | /* |
| 1383 | * We cannot use of_platform_bus_probe() because there is no |
| 1384 | * of_platform_bus_remove(). Instead, we manually instantiate every DMA |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1385 | * channel object. |
| 1386 | */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1387 | for_each_child_of_node(op->dev.of_node, child) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1388 | if (of_device_is_compatible(child, "fsl,eloplus-dma-channel")) { |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1389 | fsl_dma_chan_probe(fdev, child, |
| 1390 | FSL_DMA_IP_85XX | FSL_DMA_BIG_ENDIAN, |
| 1391 | "fsl,eloplus-dma-channel"); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1392 | } |
| 1393 | |
| 1394 | if (of_device_is_compatible(child, "fsl,elo-dma-channel")) { |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1395 | fsl_dma_chan_probe(fdev, child, |
| 1396 | FSL_DMA_IP_83XX | FSL_DMA_LITTLE_ENDIAN, |
| 1397 | "fsl,elo-dma-channel"); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1398 | } |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1399 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1400 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1401 | /* |
| 1402 | * Hookup the IRQ handler(s) |
| 1403 | * |
| 1404 | * If we have a per-controller interrupt, we prefer that to the |
| 1405 | * per-channel interrupts to reduce the number of shared interrupt |
| 1406 | * handlers on the same IRQ line |
| 1407 | */ |
| 1408 | err = fsldma_request_irqs(fdev); |
| 1409 | if (err) { |
| 1410 | dev_err(fdev->dev, "unable to request IRQs\n"); |
| 1411 | goto out_free_fdev; |
| 1412 | } |
| 1413 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1414 | dma_async_device_register(&fdev->common); |
| 1415 | return 0; |
| 1416 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1417 | out_free_fdev: |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1418 | irq_dispose_mapping(fdev->irq); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1419 | kfree(fdev); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1420 | out_return: |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1421 | return err; |
| 1422 | } |
| 1423 | |
Grant Likely | 2dc1158 | 2010-08-06 09:25:50 -0600 | [diff] [blame] | 1424 | static int fsldma_of_remove(struct platform_device *op) |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1425 | { |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1426 | struct fsldma_device *fdev; |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1427 | unsigned int i; |
| 1428 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1429 | fdev = dev_get_drvdata(&op->dev); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1430 | dma_async_device_unregister(&fdev->common); |
| 1431 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1432 | fsldma_free_irqs(fdev); |
| 1433 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1434 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1435 | if (fdev->chan[i]) |
| 1436 | fsl_dma_chan_remove(fdev->chan[i]); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1437 | } |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1438 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1439 | iounmap(fdev->regs); |
| 1440 | dev_set_drvdata(&op->dev, NULL); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1441 | kfree(fdev); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1442 | |
| 1443 | return 0; |
| 1444 | } |
| 1445 | |
Márton Németh | 4b1cf1f | 2010-02-02 23:41:06 -0700 | [diff] [blame] | 1446 | static const struct of_device_id fsldma_of_ids[] = { |
Kumar Gala | 049c9d4 | 2008-03-31 11:13:21 -0500 | [diff] [blame] | 1447 | { .compatible = "fsl,eloplus-dma", }, |
| 1448 | { .compatible = "fsl,elo-dma", }, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1449 | {} |
| 1450 | }; |
| 1451 | |
Ira W. Snyder | 8faa7cf | 2011-04-07 10:33:03 -0700 | [diff] [blame] | 1452 | static struct platform_driver fsldma_of_driver = { |
Grant Likely | 4018294 | 2010-04-13 16:13:02 -0700 | [diff] [blame] | 1453 | .driver = { |
| 1454 | .name = "fsl-elo-dma", |
| 1455 | .owner = THIS_MODULE, |
| 1456 | .of_match_table = fsldma_of_ids, |
| 1457 | }, |
| 1458 | .probe = fsldma_of_probe, |
| 1459 | .remove = fsldma_of_remove, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1460 | }; |
| 1461 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1462 | /*----------------------------------------------------------------------------*/ |
| 1463 | /* Module Init / Exit */ |
| 1464 | /*----------------------------------------------------------------------------*/ |
| 1465 | |
| 1466 | static __init int fsldma_init(void) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1467 | { |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1468 | pr_info("Freescale Elo / Elo Plus DMA driver\n"); |
Grant Likely | 0000612 | 2011-02-22 19:59:54 -0700 | [diff] [blame] | 1469 | return platform_driver_register(&fsldma_of_driver); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1470 | } |
| 1471 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1472 | static void __exit fsldma_exit(void) |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1473 | { |
Grant Likely | 0000612 | 2011-02-22 19:59:54 -0700 | [diff] [blame] | 1474 | platform_driver_unregister(&fsldma_of_driver); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1475 | } |
| 1476 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1477 | subsys_initcall(fsldma_init); |
| 1478 | module_exit(fsldma_exit); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1479 | |
| 1480 | MODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver"); |
| 1481 | MODULE_LICENSE("GPL"); |