blob: bc26d7990cc3744512c717540565b7c0dfa557ad [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/pci/setup-bus.c
3 *
4 * Extruded from code written by
5 * Dave Rusling (david.rusling@reo.mts.dec.com)
6 * David Mosberger (davidm@cs.arizona.edu)
7 * David Miller (davem@redhat.com)
8 *
9 * Support routines for initializing a PCI subsystem.
10 */
11
12/*
13 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
14 * PCI-PCI bridges cleanup, sorted resource allocation.
15 * Feb 2002, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
16 * Converted to allocation in 3 passes, which gives
17 * tighter packing. Prefetchable range support.
18 */
19
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/pci.h>
24#include <linux/errno.h>
25#include <linux/ioport.h>
26#include <linux/cache.h>
27#include <linux/slab.h>
Bjorn Helgaas47087702012-02-23 14:29:23 -070028#include <asm-generic/pci-bridge.h>
Chris Wright6faf17f2009-08-28 13:00:06 -070029#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
Bjorn Helgaas844393f2012-02-23 20:18:59 -070031unsigned int pci_flags;
Bjorn Helgaas47087702012-02-23 14:29:23 -070032
Yinghai Lubdc4abe2012-01-21 02:08:27 -080033struct pci_dev_resource {
34 struct list_head list;
Yinghai Lu2934a0d2012-01-21 02:08:26 -080035 struct resource *res;
36 struct pci_dev *dev;
Yinghai Lu568ddef2010-01-22 01:02:21 -080037 resource_size_t start;
38 resource_size_t end;
Ram Paic8adf9a2011-02-14 17:43:20 -080039 resource_size_t add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070040 resource_size_t min_align;
Yinghai Lu568ddef2010-01-22 01:02:21 -080041 unsigned long flags;
42};
43
Yinghai Lubffc56d2012-01-21 02:08:30 -080044static void free_list(struct list_head *head)
45{
46 struct pci_dev_resource *dev_res, *tmp;
47
48 list_for_each_entry_safe(dev_res, tmp, head, list) {
49 list_del(&dev_res->list);
50 kfree(dev_res);
51 }
52}
Ram Pai094732a2011-02-14 17:43:18 -080053
Ram Paic8adf9a2011-02-14 17:43:20 -080054/**
55 * add_to_list() - add a new resource tracker to the list
56 * @head: Head of the list
57 * @dev: device corresponding to which the resource
58 * belongs
59 * @res: The resource to be tracked
60 * @add_size: additional size to be optionally added
61 * to the resource
62 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -080063static int add_to_list(struct list_head *head,
Ram Paic8adf9a2011-02-14 17:43:20 -080064 struct pci_dev *dev, struct resource *res,
Ram Pai2bbc6942011-07-25 13:08:39 -070065 resource_size_t add_size, resource_size_t min_align)
Yinghai Lu568ddef2010-01-22 01:02:21 -080066{
Yinghai Lu764242a2012-01-21 02:08:28 -080067 struct pci_dev_resource *tmp;
Yinghai Lu568ddef2010-01-22 01:02:21 -080068
Yinghai Lubdc4abe2012-01-21 02:08:27 -080069 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
Yinghai Lu568ddef2010-01-22 01:02:21 -080070 if (!tmp) {
Ram Paic8adf9a2011-02-14 17:43:20 -080071 pr_warning("add_to_list: kmalloc() failed!\n");
Yinghai Luef62dfe2012-01-21 02:08:18 -080072 return -ENOMEM;
Yinghai Lu568ddef2010-01-22 01:02:21 -080073 }
74
Yinghai Lu568ddef2010-01-22 01:02:21 -080075 tmp->res = res;
76 tmp->dev = dev;
77 tmp->start = res->start;
78 tmp->end = res->end;
79 tmp->flags = res->flags;
Ram Paic8adf9a2011-02-14 17:43:20 -080080 tmp->add_size = add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070081 tmp->min_align = min_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -080082
83 list_add(&tmp->list, head);
Yinghai Luef62dfe2012-01-21 02:08:18 -080084
85 return 0;
Yinghai Lu568ddef2010-01-22 01:02:21 -080086}
87
Yinghai Lub9b0bba2012-01-21 02:08:29 -080088static void remove_from_list(struct list_head *head,
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080089 struct resource *res)
90{
Yinghai Lub9b0bba2012-01-21 02:08:29 -080091 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080092
Yinghai Lub9b0bba2012-01-21 02:08:29 -080093 list_for_each_entry_safe(dev_res, tmp, head, list) {
94 if (dev_res->res == res) {
95 list_del(&dev_res->list);
96 kfree(dev_res);
Yinghai Lubdc4abe2012-01-21 02:08:27 -080097 break;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080098 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080099 }
100}
101
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800102static resource_size_t get_res_add_size(struct list_head *head,
Yinghai Lu1c372352012-01-21 02:08:19 -0800103 struct resource *res)
104{
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800105 struct pci_dev_resource *dev_res;
Yinghai Lu1c372352012-01-21 02:08:19 -0800106
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800107 list_for_each_entry(dev_res, head, list) {
108 if (dev_res->res == res) {
Yinghai Lub5924432012-01-21 02:08:31 -0800109 int idx = res - &dev_res->dev->resource[0];
110
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800111 dev_printk(KERN_DEBUG, &dev_res->dev->dev,
Yinghai Lub5924432012-01-21 02:08:31 -0800112 "res[%d]=%pR get_res_add_size add_size %llx\n",
113 idx, dev_res->res,
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800114 (unsigned long long)dev_res->add_size);
Yinghai Lub5924432012-01-21 02:08:31 -0800115
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800116 return dev_res->add_size;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800117 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800118 }
Yinghai Lu1c372352012-01-21 02:08:19 -0800119
120 return 0;
121}
122
Yinghai Lu78c3b322012-01-21 02:08:25 -0800123/* Sort resources by alignment */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800124static void pdev_sort_resources(struct pci_dev *dev, struct list_head *head)
Yinghai Lu78c3b322012-01-21 02:08:25 -0800125{
126 int i;
127
128 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
129 struct resource *r;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800130 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800131 resource_size_t r_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800132 struct list_head *n;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800133
134 r = &dev->resource[i];
135
136 if (r->flags & IORESOURCE_PCI_FIXED)
137 continue;
138
139 if (!(r->flags) || r->parent)
140 continue;
141
142 r_align = pci_resource_alignment(dev, r);
143 if (!r_align) {
144 dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
145 i, r);
146 continue;
147 }
Yinghai Lu78c3b322012-01-21 02:08:25 -0800148
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800149 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
150 if (!tmp)
151 panic("pdev_sort_resources(): "
152 "kmalloc() failed!\n");
153 tmp->res = r;
154 tmp->dev = dev;
155
156 /* fallback is smallest one or list is empty*/
157 n = head;
158 list_for_each_entry(dev_res, head, list) {
159 resource_size_t align;
160
161 align = pci_resource_alignment(dev_res->dev,
162 dev_res->res);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800163
164 if (r_align > align) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800165 n = &dev_res->list;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800166 break;
167 }
168 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800169 /* Insert it just before n*/
170 list_add_tail(&tmp->list, n);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800171 }
172}
173
Yinghai Lu6841ec62010-01-22 01:02:25 -0800174static void __dev_sort_resources(struct pci_dev *dev,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800175 struct list_head *head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176{
Yinghai Lu6841ec62010-01-22 01:02:25 -0800177 u16 class = dev->class >> 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178
Yinghai Lu6841ec62010-01-22 01:02:25 -0800179 /* Don't touch classless devices or host bridges or ioapics. */
180 if (class == PCI_CLASS_NOT_DEFINED || class == PCI_CLASS_BRIDGE_HOST)
181 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182
Yinghai Lu6841ec62010-01-22 01:02:25 -0800183 /* Don't touch ioapic devices already enabled by firmware */
184 if (class == PCI_CLASS_SYSTEM_PIC) {
185 u16 command;
186 pci_read_config_word(dev, PCI_COMMAND, &command);
187 if (command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
188 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189 }
190
Yinghai Lu6841ec62010-01-22 01:02:25 -0800191 pdev_sort_resources(dev, head);
192}
193
Ram Paifc075e12011-02-14 17:43:19 -0800194static inline void reset_resource(struct resource *res)
195{
196 res->start = 0;
197 res->end = 0;
198 res->flags = 0;
199}
200
Ram Paic8adf9a2011-02-14 17:43:20 -0800201/**
Ram Pai9e8bf932011-07-25 13:08:42 -0700202 * reassign_resources_sorted() - satisfy any additional resource requests
Ram Paic8adf9a2011-02-14 17:43:20 -0800203 *
Ram Pai9e8bf932011-07-25 13:08:42 -0700204 * @realloc_head : head of the list tracking requests requiring additional
Ram Paic8adf9a2011-02-14 17:43:20 -0800205 * resources
206 * @head : head of the list tracking requests with allocated
207 * resources
208 *
Ram Pai9e8bf932011-07-25 13:08:42 -0700209 * Walk through each element of the realloc_head and try to procure
Ram Paic8adf9a2011-02-14 17:43:20 -0800210 * additional resources for the element, provided the element
211 * is in the head list.
212 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800213static void reassign_resources_sorted(struct list_head *realloc_head,
214 struct list_head *head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800215{
216 struct resource *res;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800217 struct pci_dev_resource *add_res, *tmp;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800218 struct pci_dev_resource *dev_res;
Ram Paic8adf9a2011-02-14 17:43:20 -0800219 resource_size_t add_size;
220 int idx;
221
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800222 list_for_each_entry_safe(add_res, tmp, realloc_head, list) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800223 bool found_match = false;
224
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800225 res = add_res->res;
Ram Paic8adf9a2011-02-14 17:43:20 -0800226 /* skip resource that has been reset */
227 if (!res->flags)
228 goto out;
229
230 /* skip this resource if not found in head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800231 list_for_each_entry(dev_res, head, list) {
232 if (dev_res->res == res) {
233 found_match = true;
234 break;
235 }
Ram Paic8adf9a2011-02-14 17:43:20 -0800236 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800237 if (!found_match)/* just skip */
238 continue;
Ram Paic8adf9a2011-02-14 17:43:20 -0800239
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800240 idx = res - &add_res->dev->resource[0];
241 add_size = add_res->add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -0700242 if (!resource_size(res)) {
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800243 res->start = add_res->start;
Ram Pai2bbc6942011-07-25 13:08:39 -0700244 res->end = res->start + add_size - 1;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800245 if (pci_assign_resource(add_res->dev, idx))
Ram Paic8adf9a2011-02-14 17:43:20 -0800246 reset_resource(res);
Ram Pai2bbc6942011-07-25 13:08:39 -0700247 } else {
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800248 resource_size_t align = add_res->min_align;
249 res->flags |= add_res->flags &
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800250 (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800251 if (pci_reassign_resource(add_res->dev, idx,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800252 add_size, align))
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800253 dev_printk(KERN_DEBUG, &add_res->dev->dev,
Yinghai Lub5924432012-01-21 02:08:31 -0800254 "failed to add %llx res[%d]=%pR\n",
255 (unsigned long long)add_size,
256 idx, res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800257 }
258out:
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800259 list_del(&add_res->list);
260 kfree(add_res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800261 }
262}
263
264/**
265 * assign_requested_resources_sorted() - satisfy resource requests
266 *
267 * @head : head of the list tracking requests for resources
Wanpeng Li8356aad2012-06-15 21:15:49 +0800268 * @fail_head : head of the list tracking requests that could
Ram Paic8adf9a2011-02-14 17:43:20 -0800269 * not be allocated
270 *
271 * Satisfy resource requests of each element in the list. Add
272 * requests that could not satisfied to the failed_list.
273 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800274static void assign_requested_resources_sorted(struct list_head *head,
275 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800276{
277 struct resource *res;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800278 struct pci_dev_resource *dev_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -0800279 int idx;
280
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800281 list_for_each_entry(dev_res, head, list) {
282 res = dev_res->res;
283 idx = res - &dev_res->dev->resource[0];
284 if (resource_size(res) &&
285 pci_assign_resource(dev_res->dev, idx)) {
Yinghai Lua3cb9992013-01-21 13:20:43 -0800286 if (fail_head) {
Yinghai Lu9a928662010-02-28 15:49:39 -0800287 /*
288 * if the failed res is for ROM BAR, and it will
289 * be enabled later, don't add it to the list
290 */
291 if (!((idx == PCI_ROM_RESOURCE) &&
292 (!(res->flags & IORESOURCE_ROM_ENABLE))))
Yinghai Lu67cc7e22012-01-21 02:08:32 -0800293 add_to_list(fail_head,
294 dev_res->dev, res,
295 0 /* dont care */,
296 0 /* dont care */);
Yinghai Lu9a928662010-02-28 15:49:39 -0800297 }
Ram Paifc075e12011-02-14 17:43:19 -0800298 reset_resource(res);
Rajesh Shah542df5d2005-04-28 00:25:50 -0700299 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300 }
301}
302
Yinghai Luaa914f52013-07-25 06:31:38 -0700303static unsigned long pci_fail_res_type_mask(struct list_head *fail_head)
304{
305 struct pci_dev_resource *fail_res;
306 unsigned long mask = 0;
307
308 /* check failed type */
309 list_for_each_entry(fail_res, fail_head, list)
310 mask |= fail_res->flags;
311
312 /*
313 * one pref failed resource will set IORESOURCE_MEM,
314 * as we can allocate pref in non-pref range.
315 * Will release all assigned non-pref sibling resources
316 * according to that bit.
317 */
318 return mask & (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH);
319}
320
321static bool pci_need_to_release(unsigned long mask, struct resource *res)
322{
323 if (res->flags & IORESOURCE_IO)
324 return !!(mask & IORESOURCE_IO);
325
326 /* check pref at first */
327 if (res->flags & IORESOURCE_PREFETCH) {
328 if (mask & IORESOURCE_PREFETCH)
329 return true;
330 /* count pref if its parent is non-pref */
331 else if ((mask & IORESOURCE_MEM) &&
332 !(res->parent->flags & IORESOURCE_PREFETCH))
333 return true;
334 else
335 return false;
336 }
337
338 if (res->flags & IORESOURCE_MEM)
339 return !!(mask & IORESOURCE_MEM);
340
341 return false; /* should not get here */
342}
343
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800344static void __assign_resources_sorted(struct list_head *head,
345 struct list_head *realloc_head,
346 struct list_head *fail_head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800347{
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800348 /*
349 * Should not assign requested resources at first.
350 * they could be adjacent, so later reassign can not reallocate
351 * them one by one in parent resource window.
Masanari Iida367fa982012-07-23 22:39:51 +0900352 * Try to assign requested + add_size at beginning
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800353 * if could do that, could get out early.
354 * if could not do that, we still try to assign requested at first,
355 * then try to reassign add_size for some resources.
Yinghai Luaa914f52013-07-25 06:31:38 -0700356 *
357 * Separate three resource type checking if we need to release
358 * assigned resource after requested + add_size try.
359 * 1. if there is io port assign fail, will release assigned
360 * io port.
361 * 2. if there is pref mmio assign fail, release assigned
362 * pref mmio.
363 * if assigned pref mmio's parent is non-pref mmio and there
364 * is non-pref mmio assign fail, will release that assigned
365 * pref mmio.
366 * 3. if there is non-pref mmio assign fail or pref mmio
367 * assigned fail, will release assigned non-pref mmio.
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800368 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800369 LIST_HEAD(save_head);
370 LIST_HEAD(local_fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800371 struct pci_dev_resource *save_res;
Yinghai Luaa914f52013-07-25 06:31:38 -0700372 struct pci_dev_resource *dev_res, *tmp_res;
373 unsigned long fail_type;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800374
375 /* Check if optional add_size is there */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800376 if (!realloc_head || list_empty(realloc_head))
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800377 goto requested_and_reassign;
378
379 /* Save original start, end, flags etc at first */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800380 list_for_each_entry(dev_res, head, list) {
381 if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) {
Yinghai Lubffc56d2012-01-21 02:08:30 -0800382 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800383 goto requested_and_reassign;
384 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800385 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800386
387 /* Update res in head list with add_size in realloc_head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800388 list_for_each_entry(dev_res, head, list)
389 dev_res->res->end += get_res_add_size(realloc_head,
390 dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800391
392 /* Try updated head list with add_size added */
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800393 assign_requested_resources_sorted(head, &local_fail_head);
394
395 /* all assigned with add_size ? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800396 if (list_empty(&local_fail_head)) {
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800397 /* Remove head list from realloc_head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800398 list_for_each_entry(dev_res, head, list)
399 remove_from_list(realloc_head, dev_res->res);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800400 free_list(&save_head);
401 free_list(head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800402 return;
403 }
404
Yinghai Luaa914f52013-07-25 06:31:38 -0700405 /* check failed type */
406 fail_type = pci_fail_res_type_mask(&local_fail_head);
407 /* remove not need to be released assigned res from head list etc */
408 list_for_each_entry_safe(dev_res, tmp_res, head, list)
409 if (dev_res->res->parent &&
410 !pci_need_to_release(fail_type, dev_res->res)) {
411 /* remove it from realloc_head list */
412 remove_from_list(realloc_head, dev_res->res);
413 remove_from_list(&save_head, dev_res->res);
414 list_del(&dev_res->list);
415 kfree(dev_res);
416 }
417
Yinghai Lubffc56d2012-01-21 02:08:30 -0800418 free_list(&local_fail_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800419 /* Release assigned resource */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800420 list_for_each_entry(dev_res, head, list)
421 if (dev_res->res->parent)
422 release_resource(dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800423 /* Restore start/end/flags from saved list */
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800424 list_for_each_entry(save_res, &save_head, list) {
425 struct resource *res = save_res->res;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800426
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800427 res->start = save_res->start;
428 res->end = save_res->end;
429 res->flags = save_res->flags;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800430 }
Yinghai Lubffc56d2012-01-21 02:08:30 -0800431 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800432
433requested_and_reassign:
Ram Paic8adf9a2011-02-14 17:43:20 -0800434 /* Satisfy the must-have resource requests */
435 assign_requested_resources_sorted(head, fail_head);
436
Ram Pai0a2daa12011-07-25 13:08:41 -0700437 /* Try to satisfy any additional optional resource
Ram Paic8adf9a2011-02-14 17:43:20 -0800438 requests */
Ram Pai9e8bf932011-07-25 13:08:42 -0700439 if (realloc_head)
440 reassign_resources_sorted(realloc_head, head);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800441 free_list(head);
Ram Paic8adf9a2011-02-14 17:43:20 -0800442}
443
Yinghai Lu6841ec62010-01-22 01:02:25 -0800444static void pdev_assign_resources_sorted(struct pci_dev *dev,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800445 struct list_head *add_head,
446 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800447{
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800448 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800449
Yinghai Lu6841ec62010-01-22 01:02:25 -0800450 __dev_sort_resources(dev, &head);
Yinghai Lu8424d752012-01-21 02:08:21 -0800451 __assign_resources_sorted(&head, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800452
453}
454
455static void pbus_assign_resources_sorted(const struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800456 struct list_head *realloc_head,
457 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800458{
459 struct pci_dev *dev;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800460 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800461
Yinghai Lu6841ec62010-01-22 01:02:25 -0800462 list_for_each_entry(dev, &bus->devices, bus_list)
463 __dev_sort_resources(dev, &head);
464
Ram Pai9e8bf932011-07-25 13:08:42 -0700465 __assign_resources_sorted(&head, realloc_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800466}
467
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700468void pci_setup_cardbus(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469{
470 struct pci_dev *bridge = bus->self;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600471 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472 struct pci_bus_region region;
473
Yinghai Lub918c622012-05-17 18:51:11 -0700474 dev_info(&bridge->dev, "CardBus bridge to %pR\n",
475 &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600477 res = bus->resource[0];
478 pcibios_resource_to_bus(bridge, &region, res);
479 if (res->flags & IORESOURCE_IO) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700480 /*
481 * The IO resource is allocated a range twice as large as it
482 * would normally need. This allows us to set both IO regs.
483 */
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600484 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700485 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
486 region.start);
487 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
488 region.end);
489 }
490
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600491 res = bus->resource[1];
492 pcibios_resource_to_bus(bridge, &region, res);
493 if (res->flags & IORESOURCE_IO) {
494 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
496 region.start);
497 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
498 region.end);
499 }
500
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600501 res = bus->resource[2];
502 pcibios_resource_to_bus(bridge, &region, res);
503 if (res->flags & IORESOURCE_MEM) {
504 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700505 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
506 region.start);
507 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
508 region.end);
509 }
510
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600511 res = bus->resource[3];
512 pcibios_resource_to_bus(bridge, &region, res);
513 if (res->flags & IORESOURCE_MEM) {
514 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700515 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
516 region.start);
517 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
518 region.end);
519 }
520}
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700521EXPORT_SYMBOL(pci_setup_cardbus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700522
523/* Initialize bridges with base/limit values we have collected.
524 PCI-to-PCI Bridge Architecture Specification rev. 1.1 (1998)
525 requires that if there is no I/O ports or memory behind the
526 bridge, corresponding range must be turned off by writing base
527 value greater than limit to the bridge's base/limit registers.
528
529 Note: care must be taken when updating I/O base/limit registers
530 of bridges which support 32-bit I/O. This update requires two
531 config space writes, so it's quite possible that an I/O window of
532 the bridge will have some undesirable address (e.g. 0) after the
533 first write. Ditto 64-bit prefetchable MMIO. */
Yinghai Lu7cc59972009-12-22 15:02:21 -0800534static void pci_setup_bridge_io(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535{
536 struct pci_dev *bridge = bus->self;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600537 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538 struct pci_bus_region region;
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600539 unsigned long io_mask;
540 u8 io_base_lo, io_limit_lo;
Yinghai Lu7cc59972009-12-22 15:02:21 -0800541 u32 l, io_upper16;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700542
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600543 io_mask = PCI_IO_RANGE_MASK;
544 if (bridge->io_window_1k)
545 io_mask = PCI_IO_1K_RANGE_MASK;
546
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547 /* Set up the top and bottom of the PCI I/O segment for this bus. */
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600548 res = bus->resource[0];
549 pcibios_resource_to_bus(bridge, &region, res);
550 if (res->flags & IORESOURCE_IO) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 pci_read_config_dword(bridge, PCI_IO_BASE, &l);
552 l &= 0xffff0000;
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600553 io_base_lo = (region.start >> 8) & io_mask;
554 io_limit_lo = (region.end >> 8) & io_mask;
555 l |= ((u32) io_limit_lo << 8) | io_base_lo;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700556 /* Set up upper 16 bits of I/O base/limit. */
557 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600558 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800559 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700560 /* Clear upper 16 bits of I/O base/limit. */
561 io_upper16 = 0;
562 l = 0x00f0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700563 }
564 /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
565 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
566 /* Update lower 16 bits of I/O base/limit. */
567 pci_write_config_dword(bridge, PCI_IO_BASE, l);
568 /* Update upper 16 bits of I/O base/limit. */
569 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800570}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571
Yinghai Lu7cc59972009-12-22 15:02:21 -0800572static void pci_setup_bridge_mmio(struct pci_bus *bus)
573{
574 struct pci_dev *bridge = bus->self;
575 struct resource *res;
576 struct pci_bus_region region;
577 u32 l;
578
579 /* Set up the top and bottom of the PCI Memory segment for this bus. */
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600580 res = bus->resource[1];
581 pcibios_resource_to_bus(bridge, &region, res);
582 if (res->flags & IORESOURCE_MEM) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700583 l = (region.start >> 16) & 0xfff0;
584 l |= region.end & 0xfff00000;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600585 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800586 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588 }
589 pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800590}
591
592static void pci_setup_bridge_mmio_pref(struct pci_bus *bus)
593{
594 struct pci_dev *bridge = bus->self;
595 struct resource *res;
596 struct pci_bus_region region;
597 u32 l, bu, lu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700598
599 /* Clear out the upper 32 bits of PREF limit.
600 If PCI_PREF_BASE_UPPER32 was non-zero, this temporarily
601 disables PREF range, which is ok. */
602 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);
603
604 /* Set up PREF base/limit. */
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100605 bu = lu = 0;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600606 res = bus->resource[2];
607 pcibios_resource_to_bus(bridge, &region, res);
608 if (res->flags & IORESOURCE_PREFETCH) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700609 l = (region.start >> 16) & 0xfff0;
610 l |= region.end & 0xfff00000;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600611 if (res->flags & IORESOURCE_MEM_64) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700612 bu = upper_32_bits(region.start);
613 lu = upper_32_bits(region.end);
Yinghai Lu1f82de12009-04-23 20:48:32 -0700614 }
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600615 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800616 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700617 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700618 }
619 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
620
Alex Williamson59353ea2009-11-30 14:51:44 -0700621 /* Set the upper 32 bits of PREF base & limit. */
622 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
623 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800624}
625
626static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type)
627{
628 struct pci_dev *bridge = bus->self;
629
Yinghai Lub918c622012-05-17 18:51:11 -0700630 dev_info(&bridge->dev, "PCI bridge to %pR\n",
631 &bus->busn_res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800632
633 if (type & IORESOURCE_IO)
634 pci_setup_bridge_io(bus);
635
636 if (type & IORESOURCE_MEM)
637 pci_setup_bridge_mmio(bus);
638
639 if (type & IORESOURCE_PREFETCH)
640 pci_setup_bridge_mmio_pref(bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700641
642 pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);
643}
644
Benjamin Herrenschmidte2444272011-09-11 14:08:38 -0300645void pci_setup_bridge(struct pci_bus *bus)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800646{
647 unsigned long type = IORESOURCE_IO | IORESOURCE_MEM |
648 IORESOURCE_PREFETCH;
649
650 __pci_setup_bridge(bus, type);
651}
652
Linus Torvalds1da177e2005-04-16 15:20:36 -0700653/* Check whether the bridge supports optional I/O and
654 prefetchable memory ranges. If not, the respective
655 base/limit registers must be read-only and read as 0. */
Sam Ravnborg96bde062007-03-26 21:53:30 -0800656static void pci_bridge_check_ranges(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700657{
658 u16 io;
659 u32 pmem;
660 struct pci_dev *bridge = bus->self;
661 struct resource *b_res;
662
663 b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
664 b_res[1].flags |= IORESOURCE_MEM;
665
666 pci_read_config_word(bridge, PCI_IO_BASE, &io);
667 if (!io) {
668 pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0);
669 pci_read_config_word(bridge, PCI_IO_BASE, &io);
670 pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
671 }
672 if (io)
673 b_res[0].flags |= IORESOURCE_IO;
674 /* DECchip 21050 pass 2 errata: the bridge may miss an address
675 disconnect boundary by one PCI data phase.
676 Workaround: do not use prefetching on this device. */
677 if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001)
678 return;
679 pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
680 if (!pmem) {
681 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE,
682 0xfff0fff0);
683 pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
684 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, 0x0);
685 }
Yinghai Lu1f82de12009-04-23 20:48:32 -0700686 if (pmem) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
Yinghai Lu99586102010-01-22 01:02:28 -0800688 if ((pmem & PCI_PREF_RANGE_TYPE_MASK) ==
689 PCI_PREF_RANGE_TYPE_64) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700690 b_res[2].flags |= IORESOURCE_MEM_64;
Yinghai Lu99586102010-01-22 01:02:28 -0800691 b_res[2].flags |= PCI_PREF_RANGE_TYPE_64;
692 }
Yinghai Lu1f82de12009-04-23 20:48:32 -0700693 }
694
695 /* double check if bridge does support 64 bit pref */
696 if (b_res[2].flags & IORESOURCE_MEM_64) {
697 u32 mem_base_hi, tmp;
698 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32,
699 &mem_base_hi);
700 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
701 0xffffffff);
702 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp);
703 if (!tmp)
704 b_res[2].flags &= ~IORESOURCE_MEM_64;
705 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
706 mem_base_hi);
707 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708}
709
710/* Helper function for sizing routines: find first available
711 bus resource of a given type. Note: we intentionally skip
712 the bus resources which have already been assigned (that is,
713 have non-NULL parent resource). */
Sam Ravnborg96bde062007-03-26 21:53:30 -0800714static struct resource *find_free_bus_resource(struct pci_bus *bus, unsigned long type)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700715{
716 int i;
717 struct resource *r;
718 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
719 IORESOURCE_PREFETCH;
720
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -0700721 pci_bus_for_each_resource(bus, r, i) {
Ivan Kokshaysky299de032005-06-15 18:59:27 +0400722 if (r == &ioport_resource || r == &iomem_resource)
723 continue;
Jesse Barnes55a10982009-10-27 09:39:18 -0700724 if (r && (r->flags & type_mask) == type && !r->parent)
725 return r;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700726 }
727 return NULL;
728}
729
Ram Pai13583b12011-02-14 17:43:17 -0800730static resource_size_t calculate_iosize(resource_size_t size,
731 resource_size_t min_size,
732 resource_size_t size1,
733 resource_size_t old_size,
734 resource_size_t align)
735{
736 if (size < min_size)
737 size = min_size;
738 if (old_size == 1 )
739 old_size = 0;
740 /* To be fixed in 2.5: we should have sort of HAVE_ISA
741 flag in the struct pci_bus. */
742#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
743 size = (size & 0xff) + ((size & ~0xffUL) << 2);
744#endif
745 size = ALIGN(size + size1, align);
746 if (size < old_size)
747 size = old_size;
748 return size;
749}
750
751static resource_size_t calculate_memsize(resource_size_t size,
752 resource_size_t min_size,
753 resource_size_t size1,
754 resource_size_t old_size,
755 resource_size_t align)
756{
757 if (size < min_size)
758 size = min_size;
759 if (old_size == 1 )
760 old_size = 0;
761 if (size < old_size)
762 size = old_size;
763 size = ALIGN(size + size1, align);
764 return size;
765}
766
Gavin Shanac5ad932012-09-11 16:59:45 -0600767resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus,
768 unsigned long type)
769{
770 return 1;
771}
772
773#define PCI_P2P_DEFAULT_MEM_ALIGN 0x100000 /* 1MiB */
774#define PCI_P2P_DEFAULT_IO_ALIGN 0x1000 /* 4KiB */
775#define PCI_P2P_DEFAULT_IO_ALIGN_1K 0x400 /* 1KiB */
776
777static resource_size_t window_alignment(struct pci_bus *bus,
778 unsigned long type)
779{
780 resource_size_t align = 1, arch_align;
781
782 if (type & IORESOURCE_MEM)
783 align = PCI_P2P_DEFAULT_MEM_ALIGN;
784 else if (type & IORESOURCE_IO) {
785 /*
786 * Per spec, I/O windows are 4K-aligned, but some
787 * bridges have an extension to support 1K alignment.
788 */
789 if (bus->self->io_window_1k)
790 align = PCI_P2P_DEFAULT_IO_ALIGN_1K;
791 else
792 align = PCI_P2P_DEFAULT_IO_ALIGN;
793 }
794
795 arch_align = pcibios_window_alignment(bus, type);
796 return max(align, arch_align);
797}
798
Ram Paic8adf9a2011-02-14 17:43:20 -0800799/**
800 * pbus_size_io() - size the io window of a given bus
801 *
802 * @bus : the bus
803 * @min_size : the minimum io window that must to be allocated
804 * @add_size : additional optional io window
Ram Pai9e8bf932011-07-25 13:08:42 -0700805 * @realloc_head : track the additional io window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -0800806 *
807 * Sizing the IO windows of the PCI-PCI bridge is trivial,
Yinghai Lufd591342012-07-09 19:55:29 -0600808 * since these windows have 1K or 4K granularity and the IO ranges
Ram Paic8adf9a2011-02-14 17:43:20 -0800809 * of non-bridge PCI devices are limited to 256 bytes.
810 * We must be careful with the ISA aliasing though.
811 */
812static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800813 resource_size_t add_size, struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700814{
815 struct pci_dev *dev;
816 struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
Wei Yang11251a82013-08-02 17:31:05 +0800817 resource_size_t size = 0, size0 = 0, size1 = 0;
Yinghai Lube768912011-07-25 13:08:38 -0700818 resource_size_t children_add_size = 0;
Bjorn Helgaas2d1d6672013-08-05 16:15:10 -0600819 resource_size_t min_align, align;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700820
821 if (!b_res)
822 return;
823
Bjorn Helgaas2d1d6672013-08-05 16:15:10 -0600824 min_align = window_alignment(bus, IORESOURCE_IO);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700825 list_for_each_entry(dev, &bus->devices, bus_list) {
826 int i;
827
828 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
829 struct resource *r = &dev->resource[i];
830 unsigned long r_size;
831
832 if (r->parent || !(r->flags & IORESOURCE_IO))
833 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +0800834 r_size = resource_size(r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700835
836 if (r_size < 0x400)
837 /* Might be re-aligned for ISA */
838 size += r_size;
839 else
840 size1 += r_size;
Yinghai Lube768912011-07-25 13:08:38 -0700841
Yinghai Lufd591342012-07-09 19:55:29 -0600842 align = pci_resource_alignment(dev, r);
843 if (align > min_align)
844 min_align = align;
845
Ram Pai9e8bf932011-07-25 13:08:42 -0700846 if (realloc_head)
847 children_add_size += get_res_add_size(realloc_head, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700848 }
849 }
Yinghai Lufd591342012-07-09 19:55:29 -0600850
Ram Paic8adf9a2011-02-14 17:43:20 -0800851 size0 = calculate_iosize(size, min_size, size1,
Yinghai Lufd591342012-07-09 19:55:29 -0600852 resource_size(b_res), min_align);
Yinghai Lube768912011-07-25 13:08:38 -0700853 if (children_add_size > add_size)
854 add_size = children_add_size;
Ram Pai9e8bf932011-07-25 13:08:42 -0700855 size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
Yinghai Lua4ac9fe2012-01-21 02:08:17 -0800856 calculate_iosize(size, min_size, add_size + size1,
Yinghai Lufd591342012-07-09 19:55:29 -0600857 resource_size(b_res), min_align);
Ram Paic8adf9a2011-02-14 17:43:20 -0800858 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700859 if (b_res->start || b_res->end)
860 dev_info(&bus->self->dev, "disabling bridge window "
Yinghai Lub918c622012-05-17 18:51:11 -0700861 "%pR to %pR (unused)\n", b_res,
862 &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700863 b_res->flags = 0;
864 return;
865 }
Yinghai Lufd591342012-07-09 19:55:29 -0600866
867 b_res->start = min_align;
Ram Paic8adf9a2011-02-14 17:43:20 -0800868 b_res->end = b_res->start + size0 - 1;
Ivan Kokshaysky88452562008-03-30 19:50:14 +0400869 b_res->flags |= IORESOURCE_STARTALIGN;
Yinghai Lub5924432012-01-21 02:08:31 -0800870 if (size1 > size0 && realloc_head) {
Yinghai Lufd591342012-07-09 19:55:29 -0600871 add_to_list(realloc_head, bus->self, b_res, size1-size0,
872 min_align);
Yinghai Lub5924432012-01-21 02:08:31 -0800873 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window "
Wei Yang11251a82013-08-02 17:31:05 +0800874 "%pR to %pR add_size %llx\n", b_res,
875 &bus->busn_res,
876 (unsigned long long)size1-size0);
Yinghai Lub5924432012-01-21 02:08:31 -0800877 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700878}
879
Gavin Shanc1215042012-09-11 16:59:46 -0600880static inline resource_size_t calculate_mem_align(resource_size_t *aligns,
881 int max_order)
882{
883 resource_size_t align = 0;
884 resource_size_t min_align = 0;
885 int order;
886
887 for (order = 0; order <= max_order; order++) {
888 resource_size_t align1 = 1;
889
890 align1 <<= (order + 20);
891
892 if (!align)
893 min_align = align1;
894 else if (ALIGN(align + min_align, min_align) < align1)
895 min_align = align1 >> 1;
896 align += aligns[order];
897 }
898
899 return min_align;
900}
901
Ram Paic8adf9a2011-02-14 17:43:20 -0800902/**
903 * pbus_size_mem() - size the memory window of a given bus
904 *
905 * @bus : the bus
Wei Yang496f70c2013-08-02 17:31:04 +0800906 * @mask: mask the resource flag, then compare it with type
907 * @type: the type of free resource from bridge
Ram Paic8adf9a2011-02-14 17:43:20 -0800908 * @min_size : the minimum memory window that must to be allocated
909 * @add_size : additional optional memory window
Ram Pai9e8bf932011-07-25 13:08:42 -0700910 * @realloc_head : track the additional memory window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -0800911 *
912 * Calculate the size of the bus and minimal alignment which
913 * guarantees that all child resources fit in this size.
914 */
Eric W. Biederman28760482009-09-09 14:09:24 -0700915static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
Ram Paic8adf9a2011-02-14 17:43:20 -0800916 unsigned long type, resource_size_t min_size,
917 resource_size_t add_size,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800918 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700919{
920 struct pci_dev *dev;
Ram Paic8adf9a2011-02-14 17:43:20 -0800921 resource_size_t min_align, align, size, size0, size1;
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100922 resource_size_t aligns[12]; /* Alignments from 1Mb to 2Gb */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700923 int order, max_order;
924 struct resource *b_res = find_free_bus_resource(bus, type);
Yinghai Lu1f82de12009-04-23 20:48:32 -0700925 unsigned int mem64_mask = 0;
Yinghai Lube768912011-07-25 13:08:38 -0700926 resource_size_t children_add_size = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700927
928 if (!b_res)
929 return 0;
930
931 memset(aligns, 0, sizeof(aligns));
932 max_order = 0;
933 size = 0;
934
Yinghai Lu1f82de12009-04-23 20:48:32 -0700935 mem64_mask = b_res->flags & IORESOURCE_MEM_64;
936 b_res->flags &= ~IORESOURCE_MEM_64;
937
Linus Torvalds1da177e2005-04-16 15:20:36 -0700938 list_for_each_entry(dev, &bus->devices, bus_list) {
939 int i;
Yinghai Lu1f82de12009-04-23 20:48:32 -0700940
Linus Torvalds1da177e2005-04-16 15:20:36 -0700941 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
942 struct resource *r = &dev->resource[i];
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100943 resource_size_t r_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944
945 if (r->parent || (r->flags & mask) != type)
946 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +0800947 r_size = resource_size(r);
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700948#ifdef CONFIG_PCI_IOV
949 /* put SRIOV requested res to the optional list */
Ram Pai9e8bf932011-07-25 13:08:42 -0700950 if (realloc_head && i >= PCI_IOV_RESOURCES &&
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700951 i <= PCI_IOV_RESOURCE_END) {
952 r->end = r->start - 1;
Ram Pai9e8bf932011-07-25 13:08:42 -0700953 add_to_list(realloc_head, dev, r, r_size, 0/* dont' care */);
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700954 children_add_size += r_size;
955 continue;
956 }
957#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700958 /* For bridges size != alignment */
Chris Wright6faf17f2009-08-28 13:00:06 -0700959 align = pci_resource_alignment(dev, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700960 order = __ffs(align) - 20;
961 if (order > 11) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700962 dev_warn(&dev->dev, "disabling BAR %d: %pR "
963 "(bad alignment %#llx)\n", i, r,
964 (unsigned long long) align);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700965 r->flags = 0;
966 continue;
967 }
968 size += r_size;
969 if (order < 0)
970 order = 0;
971 /* Exclude ranges with size > align from
972 calculation of the alignment. */
973 if (r_size == align)
974 aligns[order] += align;
975 if (order > max_order)
976 max_order = order;
Yinghai Lu1f82de12009-04-23 20:48:32 -0700977 mem64_mask &= r->flags & IORESOURCE_MEM_64;
Yinghai Lube768912011-07-25 13:08:38 -0700978
Ram Pai9e8bf932011-07-25 13:08:42 -0700979 if (realloc_head)
980 children_add_size += get_res_add_size(realloc_head, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700981 }
982 }
Jeremy Fitzhardinge8308c542008-09-11 01:31:50 -0700983
Gavin Shanc1215042012-09-11 16:59:46 -0600984 min_align = calculate_mem_align(aligns, max_order);
Gavin Shan462d9302012-09-11 16:59:46 -0600985 min_align = max(min_align, window_alignment(bus, b_res->flags & mask));
Linus Torvaldsb42282e2011-04-11 10:53:11 -0700986 size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align);
Yinghai Lube768912011-07-25 13:08:38 -0700987 if (children_add_size > add_size)
988 add_size = children_add_size;
Ram Pai9e8bf932011-07-25 13:08:42 -0700989 size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
Yinghai Lua4ac9fe2012-01-21 02:08:17 -0800990 calculate_memsize(size, min_size, add_size,
Linus Torvaldsb42282e2011-04-11 10:53:11 -0700991 resource_size(b_res), min_align);
Ram Paic8adf9a2011-02-14 17:43:20 -0800992 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700993 if (b_res->start || b_res->end)
994 dev_info(&bus->self->dev, "disabling bridge window "
Yinghai Lub918c622012-05-17 18:51:11 -0700995 "%pR to %pR (unused)\n", b_res,
996 &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700997 b_res->flags = 0;
998 return 1;
999 }
1000 b_res->start = min_align;
Ram Paic8adf9a2011-02-14 17:43:20 -08001001 b_res->end = size0 + min_align - 1;
1002 b_res->flags |= IORESOURCE_STARTALIGN | mem64_mask;
Yinghai Lub5924432012-01-21 02:08:31 -08001003 if (size1 > size0 && realloc_head) {
Ram Pai9e8bf932011-07-25 13:08:42 -07001004 add_to_list(realloc_head, bus->self, b_res, size1-size0, min_align);
Yinghai Lub5924432012-01-21 02:08:31 -08001005 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window "
Yinghai Lub918c622012-05-17 18:51:11 -07001006 "%pR to %pR add_size %llx\n", b_res,
1007 &bus->busn_res, (unsigned long long)size1-size0);
Yinghai Lub5924432012-01-21 02:08:31 -08001008 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001009 return 1;
1010}
1011
Ram Pai0a2daa12011-07-25 13:08:41 -07001012unsigned long pci_cardbus_resource_alignment(struct resource *res)
1013{
1014 if (res->flags & IORESOURCE_IO)
1015 return pci_cardbus_io_size;
1016 if (res->flags & IORESOURCE_MEM)
1017 return pci_cardbus_mem_size;
1018 return 0;
1019}
1020
1021static void pci_bus_size_cardbus(struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001022 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001023{
1024 struct pci_dev *bridge = bus->self;
1025 struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
Yinghai Lu11848932012-02-10 15:33:47 -08001026 resource_size_t b_res_3_size = pci_cardbus_mem_size * 2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001027 u16 ctrl;
1028
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001029 if (b_res[0].parent)
1030 goto handle_b_res_1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001031 /*
1032 * Reserve some resources for CardBus. We reserve
1033 * a fixed amount of bus space for CardBus bridges.
1034 */
Yinghai Lu11848932012-02-10 15:33:47 -08001035 b_res[0].start = pci_cardbus_io_size;
1036 b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1;
1037 b_res[0].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
1038 if (realloc_head) {
1039 b_res[0].end -= pci_cardbus_io_size;
1040 add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,
1041 pci_cardbus_io_size);
1042 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001043
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001044handle_b_res_1:
1045 if (b_res[1].parent)
1046 goto handle_b_res_2;
Yinghai Lu11848932012-02-10 15:33:47 -08001047 b_res[1].start = pci_cardbus_io_size;
1048 b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1;
1049 b_res[1].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
1050 if (realloc_head) {
1051 b_res[1].end -= pci_cardbus_io_size;
1052 add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size,
1053 pci_cardbus_io_size);
1054 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001055
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001056handle_b_res_2:
Yinghai Ludcef0d02012-02-10 15:33:46 -08001057 /* MEM1 must not be pref mmio */
1058 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1059 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {
1060 ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
1061 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
1062 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1063 }
1064
Linus Torvalds1da177e2005-04-16 15:20:36 -07001065 /*
1066 * Check whether prefetchable memory is supported
1067 * by this bridge.
1068 */
1069 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1070 if (!(ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)) {
1071 ctrl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
1072 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
1073 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1074 }
1075
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001076 if (b_res[2].parent)
1077 goto handle_b_res_3;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001078 /*
1079 * If we have prefetchable memory support, allocate
1080 * two regions. Otherwise, allocate one region of
1081 * twice the size.
1082 */
1083 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
Yinghai Lu11848932012-02-10 15:33:47 -08001084 b_res[2].start = pci_cardbus_mem_size;
1085 b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1;
1086 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH |
1087 IORESOURCE_STARTALIGN;
1088 if (realloc_head) {
1089 b_res[2].end -= pci_cardbus_mem_size;
1090 add_to_list(realloc_head, bridge, b_res+2,
1091 pci_cardbus_mem_size, pci_cardbus_mem_size);
1092 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001093
Yinghai Lu11848932012-02-10 15:33:47 -08001094 /* reduce that to half */
1095 b_res_3_size = pci_cardbus_mem_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001096 }
Ram Pai0a2daa12011-07-25 13:08:41 -07001097
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001098handle_b_res_3:
1099 if (b_res[3].parent)
1100 goto handle_done;
Yinghai Lu11848932012-02-10 15:33:47 -08001101 b_res[3].start = pci_cardbus_mem_size;
1102 b_res[3].end = b_res[3].start + b_res_3_size - 1;
1103 b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN;
1104 if (realloc_head) {
1105 b_res[3].end -= b_res_3_size;
1106 add_to_list(realloc_head, bridge, b_res+3, b_res_3_size,
1107 pci_cardbus_mem_size);
1108 }
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001109
1110handle_done:
1111 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001112}
1113
Jiang Liud66ecb72013-06-23 01:01:35 +02001114void __ref __pci_bus_size_bridges(struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001115 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001116{
1117 struct pci_dev *dev;
1118 unsigned long mask, prefmask;
Ram Paic8adf9a2011-02-14 17:43:20 -08001119 resource_size_t additional_mem_size = 0, additional_io_size = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001120
1121 list_for_each_entry(dev, &bus->devices, bus_list) {
1122 struct pci_bus *b = dev->subordinate;
1123 if (!b)
1124 continue;
1125
1126 switch (dev->class >> 8) {
1127 case PCI_CLASS_BRIDGE_CARDBUS:
Ram Pai9e8bf932011-07-25 13:08:42 -07001128 pci_bus_size_cardbus(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001129 break;
1130
1131 case PCI_CLASS_BRIDGE_PCI:
1132 default:
Ram Pai9e8bf932011-07-25 13:08:42 -07001133 __pci_bus_size_bridges(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001134 break;
1135 }
1136 }
1137
1138 /* The root bus? */
1139 if (!bus->self)
1140 return;
1141
1142 switch (bus->self->class >> 8) {
1143 case PCI_CLASS_BRIDGE_CARDBUS:
1144 /* don't size cardbuses yet. */
1145 break;
1146
1147 case PCI_CLASS_BRIDGE_PCI:
1148 pci_bridge_check_ranges(bus);
Eric W. Biederman28760482009-09-09 14:09:24 -07001149 if (bus->self->is_hotplug_bridge) {
Ram Paic8adf9a2011-02-14 17:43:20 -08001150 additional_io_size = pci_hotplug_io_size;
1151 additional_mem_size = pci_hotplug_mem_size;
Eric W. Biederman28760482009-09-09 14:09:24 -07001152 }
Ram Paic8adf9a2011-02-14 17:43:20 -08001153 /*
1154 * Follow thru
1155 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001156 default:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001157 pbus_size_io(bus, realloc_head ? 0 : additional_io_size,
1158 additional_io_size, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001159 /* If the bridge supports prefetchable range, size it
1160 separately. If it doesn't, or its prefetchable window
1161 has already been allocated by arch code, try
1162 non-prefetchable range for both types of PCI memory
1163 resources. */
1164 mask = IORESOURCE_MEM;
1165 prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH;
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001166 if (pbus_size_mem(bus, prefmask, prefmask,
1167 realloc_head ? 0 : additional_mem_size,
1168 additional_mem_size, realloc_head))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001169 mask = prefmask; /* Success, size non-prefetch only. */
Eric W. Biederman28760482009-09-09 14:09:24 -07001170 else
Ram Paic8adf9a2011-02-14 17:43:20 -08001171 additional_mem_size += additional_mem_size;
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001172 pbus_size_mem(bus, mask, IORESOURCE_MEM,
1173 realloc_head ? 0 : additional_mem_size,
1174 additional_mem_size, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001175 break;
1176 }
1177}
Ram Paic8adf9a2011-02-14 17:43:20 -08001178
1179void __ref pci_bus_size_bridges(struct pci_bus *bus)
1180{
1181 __pci_bus_size_bridges(bus, NULL);
1182}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001183EXPORT_SYMBOL(pci_bus_size_bridges);
1184
Jiang Liud66ecb72013-06-23 01:01:35 +02001185void __ref __pci_bus_assign_resources(const struct pci_bus *bus,
1186 struct list_head *realloc_head,
1187 struct list_head *fail_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001188{
1189 struct pci_bus *b;
1190 struct pci_dev *dev;
1191
Ram Pai9e8bf932011-07-25 13:08:42 -07001192 pbus_assign_resources_sorted(bus, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001193
Linus Torvalds1da177e2005-04-16 15:20:36 -07001194 list_for_each_entry(dev, &bus->devices, bus_list) {
1195 b = dev->subordinate;
1196 if (!b)
1197 continue;
1198
Ram Pai9e8bf932011-07-25 13:08:42 -07001199 __pci_bus_assign_resources(b, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001200
1201 switch (dev->class >> 8) {
1202 case PCI_CLASS_BRIDGE_PCI:
Yinghai Lu6841ec62010-01-22 01:02:25 -08001203 if (!pci_is_enabled(dev))
1204 pci_setup_bridge(b);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001205 break;
1206
1207 case PCI_CLASS_BRIDGE_CARDBUS:
1208 pci_setup_cardbus(b);
1209 break;
1210
1211 default:
Bjorn Helgaas80ccba12008-06-13 10:52:11 -06001212 dev_info(&dev->dev, "not setting up bridge for bus "
1213 "%04x:%02x\n", pci_domain_nr(b), b->number);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001214 break;
1215 }
1216 }
1217}
Yinghai Lu568ddef2010-01-22 01:02:21 -08001218
1219void __ref pci_bus_assign_resources(const struct pci_bus *bus)
1220{
Ram Paic8adf9a2011-02-14 17:43:20 -08001221 __pci_bus_assign_resources(bus, NULL, NULL);
Yinghai Lu568ddef2010-01-22 01:02:21 -08001222}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001223EXPORT_SYMBOL(pci_bus_assign_resources);
1224
Yinghai Lu6841ec62010-01-22 01:02:25 -08001225static void __ref __pci_bridge_assign_resources(const struct pci_dev *bridge,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001226 struct list_head *add_head,
1227 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -08001228{
1229 struct pci_bus *b;
1230
Yinghai Lu8424d752012-01-21 02:08:21 -08001231 pdev_assign_resources_sorted((struct pci_dev *)bridge,
1232 add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001233
1234 b = bridge->subordinate;
1235 if (!b)
1236 return;
1237
Yinghai Lu8424d752012-01-21 02:08:21 -08001238 __pci_bus_assign_resources(b, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001239
1240 switch (bridge->class >> 8) {
1241 case PCI_CLASS_BRIDGE_PCI:
1242 pci_setup_bridge(b);
1243 break;
1244
1245 case PCI_CLASS_BRIDGE_CARDBUS:
1246 pci_setup_cardbus(b);
1247 break;
1248
1249 default:
1250 dev_info(&bridge->dev, "not setting up bridge for bus "
1251 "%04x:%02x\n", pci_domain_nr(b), b->number);
1252 break;
1253 }
1254}
Yinghai Lu5009b462010-01-22 01:02:20 -08001255static void pci_bridge_release_resources(struct pci_bus *bus,
1256 unsigned long type)
1257{
1258 int idx;
1259 bool changed = false;
1260 struct pci_dev *dev;
1261 struct resource *r;
1262 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
1263 IORESOURCE_PREFETCH;
1264
1265 dev = bus->self;
1266 for (idx = PCI_BRIDGE_RESOURCES; idx <= PCI_BRIDGE_RESOURCE_END;
1267 idx++) {
1268 r = &dev->resource[idx];
1269 if ((r->flags & type_mask) != type)
1270 continue;
1271 if (!r->parent)
1272 continue;
1273 /*
1274 * if there are children under that, we should release them
1275 * all
1276 */
1277 release_child_resources(r);
1278 if (!release_resource(r)) {
1279 dev_printk(KERN_DEBUG, &dev->dev,
1280 "resource %d %pR released\n", idx, r);
1281 /* keep the old size */
1282 r->end = resource_size(r) - 1;
1283 r->start = 0;
1284 r->flags = 0;
1285 changed = true;
1286 }
1287 }
1288
1289 if (changed) {
1290 /* avoiding touch the one without PREF */
1291 if (type & IORESOURCE_PREFETCH)
1292 type = IORESOURCE_PREFETCH;
1293 __pci_setup_bridge(bus, type);
1294 }
1295}
1296
1297enum release_type {
1298 leaf_only,
1299 whole_subtree,
1300};
1301/*
1302 * try to release pci bridge resources that is from leaf bridge,
1303 * so we can allocate big new one later
1304 */
1305static void __ref pci_bus_release_bridge_resources(struct pci_bus *bus,
1306 unsigned long type,
1307 enum release_type rel_type)
1308{
1309 struct pci_dev *dev;
1310 bool is_leaf_bridge = true;
1311
1312 list_for_each_entry(dev, &bus->devices, bus_list) {
1313 struct pci_bus *b = dev->subordinate;
1314 if (!b)
1315 continue;
1316
1317 is_leaf_bridge = false;
1318
1319 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1320 continue;
1321
1322 if (rel_type == whole_subtree)
1323 pci_bus_release_bridge_resources(b, type,
1324 whole_subtree);
1325 }
1326
1327 if (pci_is_root_bus(bus))
1328 return;
1329
1330 if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1331 return;
1332
1333 if ((rel_type == whole_subtree) || is_leaf_bridge)
1334 pci_bridge_release_resources(bus, type);
1335}
1336
Yinghai Lu76fbc262008-06-23 20:33:06 +02001337static void pci_bus_dump_res(struct pci_bus *bus)
1338{
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001339 struct resource *res;
1340 int i;
Yinghai Lu76fbc262008-06-23 20:33:06 +02001341
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001342 pci_bus_for_each_resource(bus, res, i) {
Yinghai Lu7c9342b2009-12-22 15:02:24 -08001343 if (!res || !res->end || !res->flags)
Yinghai Lu76fbc262008-06-23 20:33:06 +02001344 continue;
1345
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -06001346 dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res);
Yinghai Lu76fbc262008-06-23 20:33:06 +02001347 }
1348}
1349
1350static void pci_bus_dump_resources(struct pci_bus *bus)
1351{
1352 struct pci_bus *b;
1353 struct pci_dev *dev;
1354
1355
1356 pci_bus_dump_res(bus);
1357
1358 list_for_each_entry(dev, &bus->devices, bus_list) {
1359 b = dev->subordinate;
1360 if (!b)
1361 continue;
1362
1363 pci_bus_dump_resources(b);
1364 }
1365}
1366
Yinghai Luff351472013-07-24 15:37:13 -06001367static int pci_bus_get_depth(struct pci_bus *bus)
Yinghai Luda7822e2011-05-12 17:11:37 -07001368{
1369 int depth = 0;
Wei Yangf2a230b2013-08-02 17:31:03 +08001370 struct pci_bus *child_bus;
Yinghai Luda7822e2011-05-12 17:11:37 -07001371
Wei Yangf2a230b2013-08-02 17:31:03 +08001372 list_for_each_entry(child_bus, &bus->children, node){
Yinghai Luda7822e2011-05-12 17:11:37 -07001373 int ret;
Yinghai Luda7822e2011-05-12 17:11:37 -07001374
Wei Yangf2a230b2013-08-02 17:31:03 +08001375 ret = pci_bus_get_depth(child_bus);
Yinghai Luda7822e2011-05-12 17:11:37 -07001376 if (ret + 1 > depth)
1377 depth = ret + 1;
1378 }
1379
1380 return depth;
1381}
Yinghai Luda7822e2011-05-12 17:11:37 -07001382
Yinghai Lub55438f2012-02-23 19:23:30 -08001383/*
1384 * -1: undefined, will auto detect later
1385 * 0: disabled by user
1386 * 1: disabled by auto detect
1387 * 2: enabled by user
1388 * 3: enabled by auto detect
1389 */
1390enum enable_type {
1391 undefined = -1,
1392 user_disabled,
1393 auto_disabled,
1394 user_enabled,
1395 auto_enabled,
1396};
1397
Yinghai Luff351472013-07-24 15:37:13 -06001398static enum enable_type pci_realloc_enable = undefined;
Yinghai Lub55438f2012-02-23 19:23:30 -08001399void __init pci_realloc_get_opt(char *str)
1400{
1401 if (!strncmp(str, "off", 3))
1402 pci_realloc_enable = user_disabled;
1403 else if (!strncmp(str, "on", 2))
1404 pci_realloc_enable = user_enabled;
1405}
Yinghai Luff351472013-07-24 15:37:13 -06001406static bool pci_realloc_enabled(enum enable_type enable)
Yinghai Lub55438f2012-02-23 19:23:30 -08001407{
Yinghai Lu967260c2013-07-22 14:37:15 -07001408 return enable >= user_enabled;
Yinghai Lub55438f2012-02-23 19:23:30 -08001409}
Ram Paif483d392011-07-07 11:19:10 -07001410
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001411#if defined(CONFIG_PCI_IOV) && defined(CONFIG_PCI_REALLOC_ENABLE_AUTO)
Yinghai Luff351472013-07-24 15:37:13 -06001412static int iov_resources_unassigned(struct pci_dev *dev, void *data)
Yinghai Lu223d96f2013-07-22 14:37:13 -07001413{
1414 int i;
1415 bool *unassigned = data;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001416
Yinghai Lu223d96f2013-07-22 14:37:13 -07001417 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) {
1418 struct resource *r = &dev->resource[i];
Yinghai Lufa216bf2013-07-22 14:37:14 -07001419 struct pci_bus_region region;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001420
Yinghai Lu223d96f2013-07-22 14:37:13 -07001421 /* Not assigned or rejected by kernel? */
Yinghai Lufa216bf2013-07-22 14:37:14 -07001422 if (!r->flags)
1423 continue;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001424
Yinghai Lufa216bf2013-07-22 14:37:14 -07001425 pcibios_resource_to_bus(dev, &region, r);
1426 if (!region.start) {
Yinghai Lu223d96f2013-07-22 14:37:13 -07001427 *unassigned = true;
1428 return 1; /* return early from pci_walk_bus() */
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001429 }
1430 }
Yinghai Lu223d96f2013-07-22 14:37:13 -07001431
1432 return 0;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001433}
1434
Yinghai Luff351472013-07-24 15:37:13 -06001435static enum enable_type pci_realloc_detect(struct pci_bus *bus,
Yinghai Lu967260c2013-07-22 14:37:15 -07001436 enum enable_type enable_local)
Yinghai Lu223d96f2013-07-22 14:37:13 -07001437{
1438 bool unassigned = false;
Yinghai Luda7822e2011-05-12 17:11:37 -07001439
Yinghai Lu967260c2013-07-22 14:37:15 -07001440 if (enable_local != undefined)
1441 return enable_local;
Yinghai Luda7822e2011-05-12 17:11:37 -07001442
Yinghai Lu967260c2013-07-22 14:37:15 -07001443 pci_walk_bus(bus, iov_resources_unassigned, &unassigned);
1444 if (unassigned)
1445 return auto_enabled;
1446
1447 return enable_local;
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001448}
Yinghai Lu223d96f2013-07-22 14:37:13 -07001449#else
Yinghai Luff351472013-07-24 15:37:13 -06001450static enum enable_type pci_realloc_detect(struct pci_bus *bus,
Yinghai Lu967260c2013-07-22 14:37:15 -07001451 enum enable_type enable_local)
1452{
1453 return enable_local;
1454}
Yinghai Lu223d96f2013-07-22 14:37:13 -07001455#endif
Yinghai Luda7822e2011-05-12 17:11:37 -07001456
1457/*
1458 * first try will not touch pci bridge res
1459 * second and later try will clear small leaf bridge res
1460 * will stop till to the max deepth if can not find good one
Linus Torvalds1da177e2005-04-16 15:20:36 -07001461 */
Yinghai Lu39772032013-07-22 14:37:18 -07001462void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001463{
Ram Paic8adf9a2011-02-14 17:43:20 -08001464 LIST_HEAD(realloc_head); /* list of resources that
Yinghai Luda7822e2011-05-12 17:11:37 -07001465 want additional resources */
1466 struct list_head *add_list = NULL;
1467 int tried_times = 0;
1468 enum release_type rel_type = leaf_only;
1469 LIST_HEAD(fail_head);
1470 struct pci_dev_resource *fail_res;
1471 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
1472 IORESOURCE_PREFETCH;
1473 int pci_try_num = 1;
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001474 enum enable_type enable_local;
Yinghai Luda7822e2011-05-12 17:11:37 -07001475
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001476 /* don't realloc if asked to do so */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001477 enable_local = pci_realloc_detect(bus, pci_realloc_enable);
Yinghai Lu967260c2013-07-22 14:37:15 -07001478 if (pci_realloc_enabled(enable_local)) {
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001479 int max_depth = pci_bus_get_depth(bus);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001480
1481 pci_try_num = max_depth + 1;
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001482 dev_printk(KERN_DEBUG, &bus->dev,
1483 "max bus depth: %d pci_try_num: %d\n",
1484 max_depth, pci_try_num);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001485 }
Yinghai Luda7822e2011-05-12 17:11:37 -07001486
1487again:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001488 /*
1489 * last try will use add_list, otherwise will try good to have as
1490 * must have, so can realloc parent bridge resource
1491 */
1492 if (tried_times + 1 == pci_try_num)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001493 add_list = &realloc_head;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001494 /* Depth first, calculate sizes and alignments of all
1495 subordinate buses. */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001496 __pci_bus_size_bridges(bus, add_list);
Ram Paic8adf9a2011-02-14 17:43:20 -08001497
Linus Torvalds1da177e2005-04-16 15:20:36 -07001498 /* Depth last, allocate resources and update the hardware. */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001499 __pci_bus_assign_resources(bus, add_list, &fail_head);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001500 if (add_list)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001501 BUG_ON(!list_empty(add_list));
Yinghai Luda7822e2011-05-12 17:11:37 -07001502 tried_times++;
1503
1504 /* any device complain? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001505 if (list_empty(&fail_head))
Yinghai Lu928bea92013-07-22 14:37:17 -07001506 goto dump;
Ram Paif483d392011-07-07 11:19:10 -07001507
Yinghai Lu0c5be0c2012-02-23 19:23:29 -08001508 if (tried_times >= pci_try_num) {
Yinghai Lu967260c2013-07-22 14:37:15 -07001509 if (enable_local == undefined)
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001510 dev_info(&bus->dev, "Some PCI device resources are unassigned, try booting with pci=realloc\n");
Yinghai Lu967260c2013-07-22 14:37:15 -07001511 else if (enable_local == auto_enabled)
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001512 dev_info(&bus->dev, "Automatically enabled pci realloc, if you have problem, try booting with pci=realloc=off\n");
Yinghai Lueb572e72012-02-23 19:23:31 -08001513
Yinghai Lubffc56d2012-01-21 02:08:30 -08001514 free_list(&fail_head);
Yinghai Lu928bea92013-07-22 14:37:17 -07001515 goto dump;
Yinghai Luda7822e2011-05-12 17:11:37 -07001516 }
1517
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001518 dev_printk(KERN_DEBUG, &bus->dev,
1519 "No. %d try to assign unassigned res\n", tried_times + 1);
Yinghai Luda7822e2011-05-12 17:11:37 -07001520
1521 /* third times and later will not check if it is leaf */
1522 if ((tried_times + 1) > 2)
1523 rel_type = whole_subtree;
1524
1525 /*
1526 * Try to release leaf bridge's resources that doesn't fit resource of
1527 * child device under that bridge
1528 */
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001529 list_for_each_entry(fail_res, &fail_head, list)
1530 pci_bus_release_bridge_resources(fail_res->dev->bus,
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001531 fail_res->flags & type_mask,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001532 rel_type);
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001533
Yinghai Luda7822e2011-05-12 17:11:37 -07001534 /* restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001535 list_for_each_entry(fail_res, &fail_head, list) {
1536 struct resource *res = fail_res->res;
Yinghai Luda7822e2011-05-12 17:11:37 -07001537
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001538 res->start = fail_res->start;
1539 res->end = fail_res->end;
1540 res->flags = fail_res->flags;
1541 if (fail_res->dev->subordinate)
Yinghai Luda7822e2011-05-12 17:11:37 -07001542 res->flags = 0;
Yinghai Luda7822e2011-05-12 17:11:37 -07001543 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08001544 free_list(&fail_head);
Yinghai Luda7822e2011-05-12 17:11:37 -07001545
1546 goto again;
1547
Yinghai Lu928bea92013-07-22 14:37:17 -07001548dump:
Yinghai Lu76fbc262008-06-23 20:33:06 +02001549 /* dump the resource on buses */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001550 pci_bus_dump_resources(bus);
1551}
1552
1553void __init pci_assign_unassigned_resources(void)
1554{
1555 struct pci_bus *root_bus;
1556
1557 list_for_each_entry(root_bus, &pci_root_buses, node)
1558 pci_assign_unassigned_root_bus_resources(root_bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001559}
Yinghai Lu6841ec62010-01-22 01:02:25 -08001560
1561void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
1562{
1563 struct pci_bus *parent = bridge->subordinate;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001564 LIST_HEAD(add_list); /* list of resources that
Yinghai Lu8424d752012-01-21 02:08:21 -08001565 want additional resources */
Yinghai Lu32180e42010-01-22 01:02:27 -08001566 int tried_times = 0;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001567 LIST_HEAD(fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001568 struct pci_dev_resource *fail_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -08001569 int retval;
Yinghai Lu32180e42010-01-22 01:02:27 -08001570 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
1571 IORESOURCE_PREFETCH;
Yinghai Lu6841ec62010-01-22 01:02:25 -08001572
Yinghai Lu32180e42010-01-22 01:02:27 -08001573again:
Yinghai Lu8424d752012-01-21 02:08:21 -08001574 __pci_bus_size_bridges(parent, &add_list);
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001575 __pci_bridge_assign_resources(bridge, &add_list, &fail_head);
1576 BUG_ON(!list_empty(&add_list));
Yinghai Lu32180e42010-01-22 01:02:27 -08001577 tried_times++;
1578
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001579 if (list_empty(&fail_head))
Yinghai Lu3f579c32010-05-21 14:35:06 -07001580 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08001581
1582 if (tried_times >= 2) {
1583 /* still fail, don't need to try more */
Yinghai Lubffc56d2012-01-21 02:08:30 -08001584 free_list(&fail_head);
Yinghai Lu3f579c32010-05-21 14:35:06 -07001585 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08001586 }
1587
1588 printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n",
1589 tried_times + 1);
1590
1591 /*
1592 * Try to release leaf bridge's resources that doesn't fit resource of
1593 * child device under that bridge
1594 */
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001595 list_for_each_entry(fail_res, &fail_head, list)
1596 pci_bus_release_bridge_resources(fail_res->dev->bus,
1597 fail_res->flags & type_mask,
Yinghai Lu32180e42010-01-22 01:02:27 -08001598 whole_subtree);
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001599
Yinghai Lu32180e42010-01-22 01:02:27 -08001600 /* restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001601 list_for_each_entry(fail_res, &fail_head, list) {
1602 struct resource *res = fail_res->res;
Yinghai Lu32180e42010-01-22 01:02:27 -08001603
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001604 res->start = fail_res->start;
1605 res->end = fail_res->end;
1606 res->flags = fail_res->flags;
1607 if (fail_res->dev->subordinate)
Yinghai Lu32180e42010-01-22 01:02:27 -08001608 res->flags = 0;
Yinghai Lu32180e42010-01-22 01:02:27 -08001609 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08001610 free_list(&fail_head);
Yinghai Lu32180e42010-01-22 01:02:27 -08001611
1612 goto again;
Yinghai Lu3f579c32010-05-21 14:35:06 -07001613
1614enable_all:
1615 retval = pci_reenable_device(bridge);
Bjorn Helgaas9fc9eea2013-04-12 11:35:40 -06001616 if (retval)
1617 dev_err(&bridge->dev, "Error reenabling bridge (%d)\n", retval);
Yinghai Lu3f579c32010-05-21 14:35:06 -07001618 pci_set_master(bridge);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001619}
1620EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);
Yinghai Lu9b030882012-01-21 02:08:23 -08001621
Yinghai Lu17787942012-10-30 14:31:10 -06001622void pci_assign_unassigned_bus_resources(struct pci_bus *bus)
Yinghai Lu9b030882012-01-21 02:08:23 -08001623{
Yinghai Lu9b030882012-01-21 02:08:23 -08001624 struct pci_dev *dev;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001625 LIST_HEAD(add_list); /* list of resources that
Yinghai Lu9b030882012-01-21 02:08:23 -08001626 want additional resources */
1627
Yinghai Lu9b030882012-01-21 02:08:23 -08001628 down_read(&pci_bus_sem);
1629 list_for_each_entry(dev, &bus->devices, bus_list)
1630 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
1631 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1632 if (dev->subordinate)
1633 __pci_bus_size_bridges(dev->subordinate,
1634 &add_list);
1635 up_read(&pci_bus_sem);
1636 __pci_bus_assign_resources(bus, &add_list, NULL);
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001637 BUG_ON(!list_empty(&add_list));
Yinghai Lu17787942012-10-30 14:31:10 -06001638}