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Nicolas Ferre467f1cf2012-01-26 11:59:20 +01001/*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 gpio0 = &pioA;
25 gpio1 = &pioB;
26 gpio2 = &pioC;
27 gpio3 = &pioD;
28 tcb0 = &tcb0;
29 tcb1 = &tcb1;
Ludovic Desroches05dcd362012-09-12 08:42:16 +020030 i2c0 = &i2c0;
31 i2c1 = &i2c1;
32 i2c2 = &i2c2;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010033 };
34 cpus {
35 cpu@0 {
36 compatible = "arm,arm926ejs";
37 };
38 };
39
Ludovic Desrochesdcce6ce2012-04-02 20:44:20 +020040 memory {
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010041 reg = <0x20000000 0x10000000>;
42 };
43
44 ahb {
45 compatible = "simple-bus";
46 #address-cells = <1>;
47 #size-cells = <1>;
48 ranges;
49
50 apb {
51 compatible = "simple-bus";
52 #address-cells = <1>;
53 #size-cells = <1>;
54 ranges;
55
56 aic: interrupt-controller@fffff000 {
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020057 #interrupt-cells = <3>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010058 compatible = "atmel,at91rm9200-aic";
59 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010060 reg = <0xfffff000 0x200>;
Jean-Christophe PLAGNIOL-VILLARDc6573942012-04-09 19:36:36 +080061 atmel,external-irqs = <31>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010062 };
63
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +080064 ramc0: ramc@ffffe800 {
65 compatible = "atmel,at91sam9g45-ddramc";
66 reg = <0xffffe800 0x200>;
67 };
68
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +080069 pmc: pmc@fffffc00 {
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
72 };
73
Jean-Christophe PLAGNIOL-VILLARDc8082d32012-03-03 03:16:27 +080074 rstc@fffffe00 {
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffe00 0x10>;
77 };
78
Jean-Christophe PLAGNIOL-VILLARD82015c42012-03-02 21:01:00 +080079 shdwc@fffffe10 {
80 compatible = "atmel,at91sam9x5-shdwc";
81 reg = <0xfffffe10 0x10>;
82 };
83
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010084 pit: timer@fffffe30 {
85 compatible = "atmel,at91sam9260-pit";
86 reg = <0xfffffe30 0xf>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020087 interrupts = <1 4 7>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010088 };
89
90 tcb0: timer@f8008000 {
91 compatible = "atmel,at91sam9x5-tcb";
92 reg = <0xf8008000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020093 interrupts = <17 4 0>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010094 };
95
96 tcb1: timer@f800c000 {
97 compatible = "atmel,at91sam9x5-tcb";
98 reg = <0xf800c000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020099 interrupts = <17 4 0>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100100 };
101
102 dma0: dma-controller@ffffec00 {
103 compatible = "atmel,at91sam9g45-dma";
104 reg = <0xffffec00 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200105 interrupts = <20 4 0>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100106 };
107
108 dma1: dma-controller@ffffee00 {
109 compatible = "atmel,at91sam9g45-dma";
110 reg = <0xffffee00 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200111 interrupts = <21 4 0>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100112 };
113
Jean-Christophe PLAGNIOL-VILLARDe4541ff2012-07-04 17:20:46 +0800114 pinctrl@fffff200 {
115 #address-cells = <1>;
116 #size-cells = <1>;
117 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
118 ranges = <0xfffff400 0xfffff400 0x800>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100119
Jean-Christophe PLAGNIOL-VILLARDe4541ff2012-07-04 17:20:46 +0800120 pioA: gpio@fffff400 {
121 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
122 reg = <0xfffff400 0x200>;
123 interrupts = <2 4 1>;
124 #gpio-cells = <2>;
125 gpio-controller;
126 interrupt-controller;
127 #interrupt-cells = <2>;
128 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100129
Jean-Christophe PLAGNIOL-VILLARDe4541ff2012-07-04 17:20:46 +0800130 pioB: gpio@fffff600 {
131 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
132 reg = <0xfffff600 0x200>;
133 interrupts = <2 4 1>;
134 #gpio-cells = <2>;
135 gpio-controller;
136 interrupt-controller;
137 #interrupt-cells = <2>;
138 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100139
Jean-Christophe PLAGNIOL-VILLARDe4541ff2012-07-04 17:20:46 +0800140 pioC: gpio@fffff800 {
141 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
142 reg = <0xfffff800 0x200>;
143 interrupts = <3 4 1>;
144 #gpio-cells = <2>;
145 gpio-controller;
146 interrupt-controller;
147 #interrupt-cells = <2>;
148 };
149
150 pioD: gpio@fffffa00 {
151 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
152 reg = <0xfffffa00 0x200>;
153 interrupts = <3 4 1>;
154 #gpio-cells = <2>;
155 gpio-controller;
156 interrupt-controller;
157 #interrupt-cells = <2>;
158 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100159 };
160
161 dbgu: serial@fffff200 {
162 compatible = "atmel,at91sam9260-usart";
163 reg = <0xfffff200 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200164 interrupts = <1 4 7>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100165 status = "disabled";
166 };
167
168 usart0: serial@f801c000 {
169 compatible = "atmel,at91sam9260-usart";
170 reg = <0xf801c000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200171 interrupts = <5 4 5>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100172 atmel,use-dma-rx;
173 atmel,use-dma-tx;
174 status = "disabled";
175 };
176
177 usart1: serial@f8020000 {
178 compatible = "atmel,at91sam9260-usart";
179 reg = <0xf8020000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200180 interrupts = <6 4 5>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100181 atmel,use-dma-rx;
182 atmel,use-dma-tx;
183 status = "disabled";
184 };
185
186 usart2: serial@f8024000 {
187 compatible = "atmel,at91sam9260-usart";
188 reg = <0xf8024000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200189 interrupts = <7 4 5>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100190 atmel,use-dma-rx;
191 atmel,use-dma-tx;
192 status = "disabled";
193 };
194
195 macb0: ethernet@f802c000 {
196 compatible = "cdns,at32ap7000-macb", "cdns,macb";
197 reg = <0xf802c000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200198 interrupts = <24 4 3>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100199 status = "disabled";
200 };
201
202 macb1: ethernet@f8030000 {
203 compatible = "cdns,at32ap7000-macb", "cdns,macb";
204 reg = <0xf8030000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200205 interrupts = <27 4 3>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100206 status = "disabled";
207 };
Maxime Ripardd029f372012-05-11 15:35:39 +0200208
Ludovic Desroches05dcd362012-09-12 08:42:16 +0200209 i2c0: i2c@f8010000 {
210 compatible = "atmel,at91sam9x5-i2c";
211 reg = <0xf8010000 0x100>;
212 interrupts = <9 4 6>;
213 #address-cells = <1>;
214 #size-cells = <0>;
215 status = "disabled";
216 };
217
218 i2c1: i2c@f8014000 {
219 compatible = "atmel,at91sam9x5-i2c";
220 reg = <0xf8014000 0x100>;
221 interrupts = <10 4 6>;
222 #address-cells = <1>;
223 #size-cells = <0>;
224 status = "disabled";
225 };
226
227 i2c2: i2c@f8018000 {
228 compatible = "atmel,at91sam9x5-i2c";
229 reg = <0xf8018000 0x100>;
230 interrupts = <11 4 6>;
231 #address-cells = <1>;
232 #size-cells = <0>;
233 status = "disabled";
234 };
235
Maxime Ripardd029f372012-05-11 15:35:39 +0200236 adc0: adc@f804c000 {
237 compatible = "atmel,at91sam9260-adc";
238 reg = <0xf804c000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200239 interrupts = <19 4 0>;
Maxime Ripardd029f372012-05-11 15:35:39 +0200240 atmel,adc-use-external;
241 atmel,adc-channels-used = <0xffff>;
242 atmel,adc-vref = <3300>;
243 atmel,adc-num-channels = <12>;
244 atmel,adc-startup-time = <40>;
245 atmel,adc-channel-base = <0x50>;
246 atmel,adc-drdy-mask = <0x1000000>;
247 atmel,adc-status-register = <0x30>;
248 atmel,adc-trigger-register = <0xc0>;
249
250 trigger@0 {
251 trigger-name = "external-rising";
252 trigger-value = <0x1>;
253 trigger-external;
254 };
255
256 trigger@1 {
257 trigger-name = "external-falling";
258 trigger-value = <0x2>;
259 trigger-external;
260 };
261
262 trigger@2 {
263 trigger-name = "external-any";
264 trigger-value = <0x3>;
265 trigger-external;
266 };
267
268 trigger@3 {
269 trigger-name = "continuous";
270 trigger-value = <0x6>;
271 };
272 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100273 };
Jean-Christophe PLAGNIOL-VILLARD86a89f42012-02-21 21:38:18 +0800274
275 nand0: nand@40000000 {
276 compatible = "atmel,at91rm9200-nand";
277 #address-cells = <1>;
278 #size-cells = <1>;
279 reg = <0x40000000 0x10000000
280 >;
281 atmel,nand-addr-offset = <21>;
282 atmel,nand-cmd-offset = <22>;
Nicolas Ferre43528082012-03-22 14:47:40 +0100283 gpios = <&pioD 5 0
284 &pioD 4 0
Jean-Christophe PLAGNIOL-VILLARD86a89f42012-02-21 21:38:18 +0800285 0
286 >;
287 status = "disabled";
288 };
Jean-Christophe PLAGNIOL-VILLARD6a062452011-11-21 06:55:18 +0800289
290 usb0: ohci@00600000 {
291 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
292 reg = <0x00600000 0x100000>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200293 interrupts = <22 4 2>;
Jean-Christophe PLAGNIOL-VILLARD6a062452011-11-21 06:55:18 +0800294 status = "disabled";
295 };
Jean-Christophe PLAGNIOL-VILLARD62c55532011-11-22 12:11:13 +0800296
297 usb1: ehci@00700000 {
298 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
299 reg = <0x00700000 0x100000>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200300 interrupts = <22 4 2>;
Jean-Christophe PLAGNIOL-VILLARD62c55532011-11-22 12:11:13 +0800301 status = "disabled";
302 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100303 };
Jean-Christophe PLAGNIOL-VILLARD10f71c22012-02-23 22:50:32 +0800304
305 i2c@0 {
306 compatible = "i2c-gpio";
307 gpios = <&pioA 30 0 /* sda */
308 &pioA 31 0 /* scl */
309 >;
310 i2c-gpio,sda-open-drain;
311 i2c-gpio,scl-open-drain;
312 i2c-gpio,delay-us = <2>; /* ~100 kHz */
313 #address-cells = <1>;
314 #size-cells = <0>;
315 status = "disabled";
316 };
317
318 i2c@1 {
319 compatible = "i2c-gpio";
320 gpios = <&pioC 0 0 /* sda */
321 &pioC 1 0 /* scl */
322 >;
323 i2c-gpio,sda-open-drain;
324 i2c-gpio,scl-open-drain;
325 i2c-gpio,delay-us = <2>; /* ~100 kHz */
326 #address-cells = <1>;
327 #size-cells = <0>;
328 status = "disabled";
329 };
330
331 i2c@2 {
332 compatible = "i2c-gpio";
333 gpios = <&pioB 4 0 /* sda */
334 &pioB 5 0 /* scl */
335 >;
336 i2c-gpio,sda-open-drain;
337 i2c-gpio,scl-open-drain;
338 i2c-gpio,delay-us = <2>; /* ~100 kHz */
339 #address-cells = <1>;
340 #size-cells = <0>;
341 status = "disabled";
342 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100343};