Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2006-2007 Intel Corporation |
| 3 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | * Dave Airlie <airlied@linux.ie> |
| 27 | * Jesse Barnes <jesse.barnes@intel.com> |
| 28 | */ |
| 29 | |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 30 | #include <acpi/button.h> |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 31 | #include <linux/dmi.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 32 | #include <linux/i2c.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 33 | #include <linux/slab.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 34 | #include "drmP.h" |
| 35 | #include "drm.h" |
| 36 | #include "drm_crtc.h" |
| 37 | #include "drm_edid.h" |
| 38 | #include "intel_drv.h" |
| 39 | #include "i915_drm.h" |
| 40 | #include "i915_drv.h" |
Zhao Yakui | e99da35 | 2009-06-26 09:46:18 +0800 | [diff] [blame] | 41 | #include <linux/acpi.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 42 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 43 | /* Private structure for the integrated LVDS support */ |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 44 | struct intel_lvds { |
| 45 | struct intel_encoder base; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 46 | |
Chris Wilson | 219adae | 2010-09-16 23:05:10 +0100 | [diff] [blame] | 47 | struct edid *edid; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 48 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 49 | int fitting_mode; |
| 50 | u32 pfit_control; |
| 51 | u32 pfit_pgm_ratios; |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 52 | bool pfit_dirty; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 53 | |
| 54 | struct drm_display_mode *fixed_mode; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 55 | }; |
| 56 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 57 | static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder) |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 58 | { |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 59 | return container_of(encoder, struct intel_lvds, base.base); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 60 | } |
| 61 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 62 | static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector) |
| 63 | { |
| 64 | return container_of(intel_attached_encoder(connector), |
| 65 | struct intel_lvds, base); |
| 66 | } |
| 67 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 68 | /** |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 69 | * Sets the power state for the panel. |
| 70 | */ |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 71 | static void intel_lvds_enable(struct intel_lvds *intel_lvds) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 72 | { |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 73 | struct drm_device *dev = intel_lvds->base.base.dev; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 74 | struct drm_i915_private *dev_priv = dev->dev_private; |
Keith Packard | de842ef | 2011-08-06 10:30:45 -0700 | [diff] [blame] | 75 | u32 ctl_reg, lvds_reg, stat_reg; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 76 | |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 77 | if (HAS_PCH_SPLIT(dev)) { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 78 | ctl_reg = PCH_PP_CONTROL; |
Jesse Barnes | 469d129 | 2010-02-11 12:41:05 -0800 | [diff] [blame] | 79 | lvds_reg = PCH_LVDS; |
Keith Packard | de842ef | 2011-08-06 10:30:45 -0700 | [diff] [blame] | 80 | stat_reg = PCH_PP_STATUS; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 81 | } else { |
| 82 | ctl_reg = PP_CONTROL; |
Jesse Barnes | 469d129 | 2010-02-11 12:41:05 -0800 | [diff] [blame] | 83 | lvds_reg = LVDS; |
Keith Packard | de842ef | 2011-08-06 10:30:45 -0700 | [diff] [blame] | 84 | stat_reg = PP_STATUS; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 85 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 86 | |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 87 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 88 | |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 89 | if (intel_lvds->pfit_dirty) { |
| 90 | /* |
| 91 | * Enable automatic panel scaling so that non-native modes |
| 92 | * fill the screen. The panel fitter should only be |
| 93 | * adjusted whilst the pipe is disabled, according to |
| 94 | * register description and PRM. |
| 95 | */ |
| 96 | DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", |
| 97 | intel_lvds->pfit_control, |
| 98 | intel_lvds->pfit_pgm_ratios); |
Keith Packard | de842ef | 2011-08-06 10:30:45 -0700 | [diff] [blame] | 99 | |
| 100 | I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios); |
| 101 | I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control); |
| 102 | intel_lvds->pfit_dirty = false; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 103 | } |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 104 | |
| 105 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); |
| 106 | POSTING_READ(lvds_reg); |
Keith Packard | de842ef | 2011-08-06 10:30:45 -0700 | [diff] [blame] | 107 | if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000)) |
| 108 | DRM_ERROR("timed out waiting for panel to power on\n"); |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 109 | |
Chris Wilson | 47356eb | 2011-01-11 17:06:04 +0000 | [diff] [blame] | 110 | intel_panel_enable_backlight(dev); |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 111 | } |
| 112 | |
| 113 | static void intel_lvds_disable(struct intel_lvds *intel_lvds) |
| 114 | { |
| 115 | struct drm_device *dev = intel_lvds->base.base.dev; |
| 116 | struct drm_i915_private *dev_priv = dev->dev_private; |
Keith Packard | de842ef | 2011-08-06 10:30:45 -0700 | [diff] [blame] | 117 | u32 ctl_reg, lvds_reg, stat_reg; |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 118 | |
| 119 | if (HAS_PCH_SPLIT(dev)) { |
| 120 | ctl_reg = PCH_PP_CONTROL; |
| 121 | lvds_reg = PCH_LVDS; |
Keith Packard | de842ef | 2011-08-06 10:30:45 -0700 | [diff] [blame] | 122 | stat_reg = PCH_PP_STATUS; |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 123 | } else { |
| 124 | ctl_reg = PP_CONTROL; |
| 125 | lvds_reg = LVDS; |
Keith Packard | de842ef | 2011-08-06 10:30:45 -0700 | [diff] [blame] | 126 | stat_reg = PP_STATUS; |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 127 | } |
| 128 | |
Chris Wilson | 47356eb | 2011-01-11 17:06:04 +0000 | [diff] [blame] | 129 | intel_panel_disable_backlight(dev); |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 130 | |
| 131 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); |
Keith Packard | de842ef | 2011-08-06 10:30:45 -0700 | [diff] [blame] | 132 | if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000)) |
| 133 | DRM_ERROR("timed out waiting for panel to power off\n"); |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 134 | |
| 135 | if (intel_lvds->pfit_control) { |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 136 | I915_WRITE(PFIT_CONTROL, 0); |
| 137 | intel_lvds->pfit_dirty = true; |
| 138 | } |
| 139 | |
| 140 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN); |
Chris Wilson | c9f9ccc | 2010-09-12 13:07:25 +0100 | [diff] [blame] | 141 | POSTING_READ(lvds_reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 142 | } |
| 143 | |
| 144 | static void intel_lvds_dpms(struct drm_encoder *encoder, int mode) |
| 145 | { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 146 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 147 | |
| 148 | if (mode == DRM_MODE_DPMS_ON) |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 149 | intel_lvds_enable(intel_lvds); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 150 | else |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 151 | intel_lvds_disable(intel_lvds); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 152 | |
| 153 | /* XXX: We never power down the LVDS pairs. */ |
| 154 | } |
| 155 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 156 | static int intel_lvds_mode_valid(struct drm_connector *connector, |
| 157 | struct drm_display_mode *mode) |
| 158 | { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 159 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); |
| 160 | struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 161 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 162 | if (mode->hdisplay > fixed_mode->hdisplay) |
| 163 | return MODE_PANEL; |
| 164 | if (mode->vdisplay > fixed_mode->vdisplay) |
| 165 | return MODE_PANEL; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 166 | |
| 167 | return MODE_OK; |
| 168 | } |
| 169 | |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 170 | static void |
| 171 | centre_horizontally(struct drm_display_mode *mode, |
| 172 | int width) |
| 173 | { |
| 174 | u32 border, sync_pos, blank_width, sync_width; |
| 175 | |
| 176 | /* keep the hsync and hblank widths constant */ |
| 177 | sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; |
| 178 | blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; |
| 179 | sync_pos = (blank_width - sync_width + 1) / 2; |
| 180 | |
| 181 | border = (mode->hdisplay - width + 1) / 2; |
| 182 | border += border & 1; /* make the border even */ |
| 183 | |
| 184 | mode->crtc_hdisplay = width; |
| 185 | mode->crtc_hblank_start = width + border; |
| 186 | mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; |
| 187 | |
| 188 | mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; |
| 189 | mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; |
| 190 | } |
| 191 | |
| 192 | static void |
| 193 | centre_vertically(struct drm_display_mode *mode, |
| 194 | int height) |
| 195 | { |
| 196 | u32 border, sync_pos, blank_width, sync_width; |
| 197 | |
| 198 | /* keep the vsync and vblank widths constant */ |
| 199 | sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; |
| 200 | blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; |
| 201 | sync_pos = (blank_width - sync_width + 1) / 2; |
| 202 | |
| 203 | border = (mode->vdisplay - height + 1) / 2; |
| 204 | |
| 205 | mode->crtc_vdisplay = height; |
| 206 | mode->crtc_vblank_start = height + border; |
| 207 | mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; |
| 208 | |
| 209 | mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; |
| 210 | mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; |
| 211 | } |
| 212 | |
| 213 | static inline u32 panel_fitter_scaling(u32 source, u32 target) |
| 214 | { |
| 215 | /* |
| 216 | * Floating point operation is not supported. So the FACTOR |
| 217 | * is defined, which can avoid the floating point computation |
| 218 | * when calculating the panel ratio. |
| 219 | */ |
| 220 | #define ACCURACY 12 |
| 221 | #define FACTOR (1 << ACCURACY) |
| 222 | u32 ratio = source * FACTOR / target; |
| 223 | return (FACTOR * ratio + FACTOR/2) / FACTOR; |
| 224 | } |
| 225 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 226 | static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, |
| 227 | struct drm_display_mode *mode, |
| 228 | struct drm_display_mode *adjusted_mode) |
| 229 | { |
| 230 | struct drm_device *dev = encoder->dev; |
| 231 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 232 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 233 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 234 | struct drm_encoder *tmp_encoder; |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 235 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 236 | int pipe; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 237 | |
| 238 | /* Should never happen!! */ |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 239 | if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { |
Keith Packard | 1ae8c0a | 2009-06-28 15:42:17 -0700 | [diff] [blame] | 240 | DRM_ERROR("Can't support LVDS on pipe A\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 241 | return false; |
| 242 | } |
| 243 | |
| 244 | /* Should never happen!! */ |
| 245 | list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) { |
| 246 | if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) { |
Keith Packard | 1ae8c0a | 2009-06-28 15:42:17 -0700 | [diff] [blame] | 247 | DRM_ERROR("Can't enable LVDS and another " |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 248 | "encoder on the same pipe\n"); |
| 249 | return false; |
| 250 | } |
| 251 | } |
Chris Wilson | 1d8e1c7 | 2010-08-07 11:01:28 +0100 | [diff] [blame] | 252 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 253 | /* |
Chris Wilson | 7167704 | 2010-07-17 13:38:43 +0100 | [diff] [blame] | 254 | * We have timings from the BIOS for the panel, put them in |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 255 | * to the adjusted mode. The CRTC will be set up for this mode, |
| 256 | * with the panel scaling set up to source from the H/VDisplay |
| 257 | * of the original mode. |
| 258 | */ |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 259 | intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode); |
Chris Wilson | 1d8e1c7 | 2010-08-07 11:01:28 +0100 | [diff] [blame] | 260 | |
| 261 | if (HAS_PCH_SPLIT(dev)) { |
| 262 | intel_pch_panel_fitting(dev, intel_lvds->fitting_mode, |
| 263 | mode, adjusted_mode); |
| 264 | return true; |
| 265 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 266 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 267 | /* Native modes don't need fitting */ |
| 268 | if (adjusted_mode->hdisplay == mode->hdisplay && |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 269 | adjusted_mode->vdisplay == mode->vdisplay) |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 270 | goto out; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 271 | |
| 272 | /* 965+ wants fuzzy fitting */ |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 273 | if (INTEL_INFO(dev)->gen >= 4) |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 274 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | |
| 275 | PFIT_FILTER_FUZZY); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 276 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 277 | /* |
| 278 | * Enable automatic panel scaling for non-native modes so that they fill |
| 279 | * the screen. Should be enabled before the pipe is enabled, according |
| 280 | * to register description and PRM. |
| 281 | * Change the value here to see the borders for debugging |
| 282 | */ |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 283 | for_each_pipe(pipe) |
| 284 | I915_WRITE(BCLRPAT(pipe), 0); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 285 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 286 | switch (intel_lvds->fitting_mode) { |
Jesse Barnes | 53bd838 | 2009-07-01 10:04:40 -0700 | [diff] [blame] | 287 | case DRM_MODE_SCALE_CENTER: |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 288 | /* |
| 289 | * For centered modes, we have to calculate border widths & |
| 290 | * heights and modify the values programmed into the CRTC. |
| 291 | */ |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 292 | centre_horizontally(adjusted_mode, mode->hdisplay); |
| 293 | centre_vertically(adjusted_mode, mode->vdisplay); |
| 294 | border = LVDS_BORDER_ENABLE; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 295 | break; |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 296 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 297 | case DRM_MODE_SCALE_ASPECT: |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 298 | /* Scale but preserve the aspect ratio */ |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 299 | if (INTEL_INFO(dev)->gen >= 4) { |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 300 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; |
| 301 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; |
| 302 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 303 | /* 965+ is easy, it does everything in hw */ |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 304 | if (scaled_width > scaled_height) |
Chris Wilson | 257e48f | 2010-11-29 16:19:24 +0000 | [diff] [blame] | 305 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR; |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 306 | else if (scaled_width < scaled_height) |
Chris Wilson | 257e48f | 2010-11-29 16:19:24 +0000 | [diff] [blame] | 307 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER; |
| 308 | else if (adjusted_mode->hdisplay != mode->hdisplay) |
| 309 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 310 | } else { |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 311 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; |
| 312 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 313 | /* |
| 314 | * For earlier chips we have to calculate the scaling |
| 315 | * ratio by hand and program it into the |
| 316 | * PFIT_PGM_RATIO register |
| 317 | */ |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 318 | if (scaled_width > scaled_height) { /* pillar */ |
| 319 | centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 320 | |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 321 | border = LVDS_BORDER_ENABLE; |
| 322 | if (mode->vdisplay != adjusted_mode->vdisplay) { |
| 323 | u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay); |
| 324 | pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | |
| 325 | bits << PFIT_VERT_SCALE_SHIFT); |
| 326 | pfit_control |= (PFIT_ENABLE | |
| 327 | VERT_INTERP_BILINEAR | |
| 328 | HORIZ_INTERP_BILINEAR); |
| 329 | } |
| 330 | } else if (scaled_width < scaled_height) { /* letter */ |
| 331 | centre_vertically(adjusted_mode, scaled_width / mode->hdisplay); |
| 332 | |
| 333 | border = LVDS_BORDER_ENABLE; |
| 334 | if (mode->hdisplay != adjusted_mode->hdisplay) { |
| 335 | u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay); |
| 336 | pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | |
| 337 | bits << PFIT_VERT_SCALE_SHIFT); |
| 338 | pfit_control |= (PFIT_ENABLE | |
| 339 | VERT_INTERP_BILINEAR | |
| 340 | HORIZ_INTERP_BILINEAR); |
| 341 | } |
| 342 | } else |
| 343 | /* Aspects match, Let hw scale both directions */ |
| 344 | pfit_control |= (PFIT_ENABLE | |
| 345 | VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 346 | VERT_INTERP_BILINEAR | |
| 347 | HORIZ_INTERP_BILINEAR); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 348 | } |
| 349 | break; |
| 350 | |
| 351 | case DRM_MODE_SCALE_FULLSCREEN: |
| 352 | /* |
| 353 | * Full scaling, even if it changes the aspect ratio. |
| 354 | * Fortunately this is all done for us in hw. |
| 355 | */ |
Chris Wilson | 257e48f | 2010-11-29 16:19:24 +0000 | [diff] [blame] | 356 | if (mode->vdisplay != adjusted_mode->vdisplay || |
| 357 | mode->hdisplay != adjusted_mode->hdisplay) { |
| 358 | pfit_control |= PFIT_ENABLE; |
| 359 | if (INTEL_INFO(dev)->gen >= 4) |
| 360 | pfit_control |= PFIT_SCALING_AUTO; |
| 361 | else |
| 362 | pfit_control |= (VERT_AUTO_SCALE | |
| 363 | VERT_INTERP_BILINEAR | |
| 364 | HORIZ_AUTO_SCALE | |
| 365 | HORIZ_INTERP_BILINEAR); |
| 366 | } |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 367 | break; |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 368 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 369 | default: |
| 370 | break; |
| 371 | } |
| 372 | |
| 373 | out: |
Chris Wilson | 72389a3 | 2011-02-06 15:50:52 +0000 | [diff] [blame] | 374 | /* If not enabling scaling, be consistent and always use 0. */ |
Chris Wilson | bee17e5 | 2011-01-11 18:09:58 +0000 | [diff] [blame] | 375 | if ((pfit_control & PFIT_ENABLE) == 0) { |
| 376 | pfit_control = 0; |
| 377 | pfit_pgm_ratios = 0; |
| 378 | } |
Chris Wilson | 72389a3 | 2011-02-06 15:50:52 +0000 | [diff] [blame] | 379 | |
| 380 | /* Make sure pre-965 set dither correctly */ |
| 381 | if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither) |
| 382 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; |
| 383 | |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 384 | if (pfit_control != intel_lvds->pfit_control || |
| 385 | pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) { |
| 386 | intel_lvds->pfit_control = pfit_control; |
| 387 | intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios; |
| 388 | intel_lvds->pfit_dirty = true; |
| 389 | } |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 390 | dev_priv->lvds_border_bits = border; |
| 391 | |
Zhao Yakui | a3e17eb | 2009-10-10 10:42:37 +0800 | [diff] [blame] | 392 | /* |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 393 | * XXX: It would be nice to support lower refresh rates on the |
| 394 | * panels to reduce power consumption, and perhaps match the |
| 395 | * user's requested refresh rate. |
| 396 | */ |
| 397 | |
| 398 | return true; |
| 399 | } |
| 400 | |
| 401 | static void intel_lvds_prepare(struct drm_encoder *encoder) |
| 402 | { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 403 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 404 | |
Keith Packard | ed10fca | 2011-08-06 10:33:12 -0700 | [diff] [blame^] | 405 | /* |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 406 | * Prior to Ironlake, we must disable the pipe if we want to adjust |
| 407 | * the panel fitter. However at all other times we can just reset |
| 408 | * the registers regardless. |
| 409 | */ |
Keith Packard | ed10fca | 2011-08-06 10:33:12 -0700 | [diff] [blame^] | 410 | if (!HAS_PCH_SPLIT(encoder->dev) && intel_lvds->pfit_dirty) |
| 411 | intel_lvds_disable(intel_lvds); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 412 | } |
| 413 | |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 414 | static void intel_lvds_commit(struct drm_encoder *encoder) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 415 | { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 416 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 417 | |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 418 | /* Always do a full power on as we do not know what state |
| 419 | * we were left in. |
| 420 | */ |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 421 | intel_lvds_enable(intel_lvds); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 422 | } |
| 423 | |
| 424 | static void intel_lvds_mode_set(struct drm_encoder *encoder, |
| 425 | struct drm_display_mode *mode, |
| 426 | struct drm_display_mode *adjusted_mode) |
| 427 | { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 428 | /* |
| 429 | * The LVDS pin pair will already have been turned on in the |
| 430 | * intel_crtc_mode_set since it has a large impact on the DPLL |
| 431 | * settings. |
| 432 | */ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 433 | } |
| 434 | |
| 435 | /** |
| 436 | * Detect the LVDS connection. |
| 437 | * |
Jesse Barnes | b42d4c5 | 2009-09-10 15:28:04 -0700 | [diff] [blame] | 438 | * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means |
| 439 | * connected and closed means disconnected. We also send hotplug events as |
| 440 | * needed, using lid status notification from the input layer. |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 441 | */ |
Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 442 | static enum drm_connector_status |
Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 443 | intel_lvds_detect(struct drm_connector *connector, bool force) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 444 | { |
Jesse Barnes | 7b9c5ab | 2010-02-12 09:30:00 -0800 | [diff] [blame] | 445 | struct drm_device *dev = connector->dev; |
Chris Wilson | 6ee3b5a | 2011-03-24 13:26:43 +0000 | [diff] [blame] | 446 | enum drm_connector_status status; |
Jesse Barnes | b42d4c5 | 2009-09-10 15:28:04 -0700 | [diff] [blame] | 447 | |
Chris Wilson | fe16d94 | 2011-02-12 10:29:38 +0000 | [diff] [blame] | 448 | status = intel_panel_detect(dev); |
| 449 | if (status != connector_status_unknown) |
| 450 | return status; |
Chris Wilson | 01fe9db | 2011-01-16 19:37:30 +0000 | [diff] [blame] | 451 | |
Chris Wilson | 6ee3b5a | 2011-03-24 13:26:43 +0000 | [diff] [blame] | 452 | return connector_status_connected; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 453 | } |
| 454 | |
| 455 | /** |
| 456 | * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. |
| 457 | */ |
| 458 | static int intel_lvds_get_modes(struct drm_connector *connector) |
| 459 | { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 460 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 461 | struct drm_device *dev = connector->dev; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 462 | struct drm_display_mode *mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 463 | |
Chris Wilson | 3f8ff0e | 2010-11-08 23:20:52 +0000 | [diff] [blame] | 464 | if (intel_lvds->edid) |
Chris Wilson | 219adae | 2010-09-16 23:05:10 +0100 | [diff] [blame] | 465 | return drm_add_edid_modes(connector, intel_lvds->edid); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 466 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 467 | mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode); |
Chris Wilson | 311bd68 | 2011-01-13 19:06:50 +0000 | [diff] [blame] | 468 | if (mode == NULL) |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 469 | return 0; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 470 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 471 | drm_mode_probed_add(connector, mode); |
| 472 | return 1; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 473 | } |
| 474 | |
Thomas Bächler | 0544edf | 2010-07-02 10:44:23 +0200 | [diff] [blame] | 475 | static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) |
| 476 | { |
| 477 | DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident); |
| 478 | return 1; |
| 479 | } |
| 480 | |
| 481 | /* The GPU hangs up on these systems if modeset is performed on LID open */ |
| 482 | static const struct dmi_system_id intel_no_modeset_on_lid[] = { |
| 483 | { |
| 484 | .callback = intel_no_modeset_on_lid_dmi_callback, |
| 485 | .ident = "Toshiba Tecra A11", |
| 486 | .matches = { |
| 487 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
| 488 | DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), |
| 489 | }, |
| 490 | }, |
| 491 | |
| 492 | { } /* terminating entry */ |
| 493 | }; |
| 494 | |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 495 | /* |
| 496 | * Lid events. Note the use of 'modeset_on_lid': |
| 497 | * - we set it on lid close, and reset it on open |
| 498 | * - we use it as a "only once" bit (ie we ignore |
| 499 | * duplicate events where it was already properly |
| 500 | * set/reset) |
| 501 | * - the suspend/resume paths will also set it to |
| 502 | * zero, since they restore the mode ("lid open"). |
| 503 | */ |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 504 | static int intel_lid_notify(struct notifier_block *nb, unsigned long val, |
| 505 | void *unused) |
| 506 | { |
| 507 | struct drm_i915_private *dev_priv = |
| 508 | container_of(nb, struct drm_i915_private, lid_notifier); |
| 509 | struct drm_device *dev = dev_priv->dev; |
Zhao Yakui | a256537 | 2009-12-11 09:26:11 +0800 | [diff] [blame] | 510 | struct drm_connector *connector = dev_priv->int_lvds_connector; |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 511 | |
Alex Williamson | 2fb4e61 | 2011-04-21 16:08:14 -0600 | [diff] [blame] | 512 | if (dev->switch_power_state != DRM_SWITCH_POWER_ON) |
| 513 | return NOTIFY_OK; |
| 514 | |
Zhao Yakui | a256537 | 2009-12-11 09:26:11 +0800 | [diff] [blame] | 515 | /* |
| 516 | * check and update the status of LVDS connector after receiving |
| 517 | * the LID nofication event. |
| 518 | */ |
| 519 | if (connector) |
Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 520 | connector->status = connector->funcs->detect(connector, |
Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 521 | false); |
Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 522 | |
Thomas Bächler | 0544edf | 2010-07-02 10:44:23 +0200 | [diff] [blame] | 523 | /* Don't force modeset on machines where it causes a GPU lockup */ |
| 524 | if (dmi_check_system(intel_no_modeset_on_lid)) |
| 525 | return NOTIFY_OK; |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 526 | if (!acpi_lid_open()) { |
| 527 | dev_priv->modeset_on_lid = 1; |
| 528 | return NOTIFY_OK; |
Jesse Barnes | 06891e2 | 2009-09-14 10:58:48 -0700 | [diff] [blame] | 529 | } |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 530 | |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 531 | if (!dev_priv->modeset_on_lid) |
| 532 | return NOTIFY_OK; |
| 533 | |
| 534 | dev_priv->modeset_on_lid = 0; |
| 535 | |
| 536 | mutex_lock(&dev->mode_config.mutex); |
| 537 | drm_helper_resume_force_mode(dev); |
| 538 | mutex_unlock(&dev->mode_config.mutex); |
Jesse Barnes | 0632419 | 2009-09-10 15:28:05 -0700 | [diff] [blame] | 539 | |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 540 | return NOTIFY_OK; |
| 541 | } |
| 542 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 543 | /** |
| 544 | * intel_lvds_destroy - unregister and free LVDS structures |
| 545 | * @connector: connector to free |
| 546 | * |
| 547 | * Unregister the DDC bus for this connector then free the driver private |
| 548 | * structure. |
| 549 | */ |
| 550 | static void intel_lvds_destroy(struct drm_connector *connector) |
| 551 | { |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 552 | struct drm_device *dev = connector->dev; |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 553 | struct drm_i915_private *dev_priv = dev->dev_private; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 554 | |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 555 | if (dev_priv->lid_notifier.notifier_call) |
| 556 | acpi_lid_notifier_unregister(&dev_priv->lid_notifier); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 557 | drm_sysfs_connector_remove(connector); |
| 558 | drm_connector_cleanup(connector); |
| 559 | kfree(connector); |
| 560 | } |
| 561 | |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 562 | static int intel_lvds_set_property(struct drm_connector *connector, |
| 563 | struct drm_property *property, |
| 564 | uint64_t value) |
| 565 | { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 566 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 567 | struct drm_device *dev = connector->dev; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 568 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 569 | if (property == dev->mode_config.scaling_mode_property) { |
| 570 | struct drm_crtc *crtc = intel_lvds->base.base.crtc; |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 571 | |
Jesse Barnes | 53bd838 | 2009-07-01 10:04:40 -0700 | [diff] [blame] | 572 | if (value == DRM_MODE_SCALE_NONE) { |
| 573 | DRM_DEBUG_KMS("no scaling not supported\n"); |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 574 | return -EINVAL; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 575 | } |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 576 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 577 | if (intel_lvds->fitting_mode == value) { |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 578 | /* the LVDS scaling property is not changed */ |
| 579 | return 0; |
| 580 | } |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 581 | intel_lvds->fitting_mode = value; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 582 | if (crtc && crtc->enabled) { |
| 583 | /* |
| 584 | * If the CRTC is enabled, the display will be changed |
| 585 | * according to the new panel fitting mode. |
| 586 | */ |
| 587 | drm_crtc_helper_set_mode(crtc, &crtc->mode, |
| 588 | crtc->x, crtc->y, crtc->fb); |
| 589 | } |
| 590 | } |
| 591 | |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 592 | return 0; |
| 593 | } |
| 594 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 595 | static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = { |
| 596 | .dpms = intel_lvds_dpms, |
| 597 | .mode_fixup = intel_lvds_mode_fixup, |
| 598 | .prepare = intel_lvds_prepare, |
| 599 | .mode_set = intel_lvds_mode_set, |
| 600 | .commit = intel_lvds_commit, |
| 601 | }; |
| 602 | |
| 603 | static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { |
| 604 | .get_modes = intel_lvds_get_modes, |
| 605 | .mode_valid = intel_lvds_mode_valid, |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 606 | .best_encoder = intel_best_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 607 | }; |
| 608 | |
| 609 | static const struct drm_connector_funcs intel_lvds_connector_funcs = { |
Keith Packard | c9fb15f | 2009-05-30 20:42:28 -0700 | [diff] [blame] | 610 | .dpms = drm_helper_connector_dpms, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 611 | .detect = intel_lvds_detect, |
| 612 | .fill_modes = drm_helper_probe_single_connector_modes, |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 613 | .set_property = intel_lvds_set_property, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 614 | .destroy = intel_lvds_destroy, |
| 615 | }; |
| 616 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 617 | static const struct drm_encoder_funcs intel_lvds_enc_funcs = { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 618 | .destroy = intel_encoder_destroy, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 619 | }; |
| 620 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 621 | static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id) |
| 622 | { |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 623 | DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident); |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 624 | return 1; |
| 625 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 626 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 627 | /* These systems claim to have LVDS, but really don't */ |
Jaswinder Singh Rajput | 93c05f2 | 2009-06-04 09:41:19 +1000 | [diff] [blame] | 628 | static const struct dmi_system_id intel_no_lvds[] = { |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 629 | { |
| 630 | .callback = intel_no_lvds_dmi_callback, |
| 631 | .ident = "Apple Mac Mini (Core series)", |
| 632 | .matches = { |
Keith Packard | 98acd46 | 2009-06-14 12:31:58 -0700 | [diff] [blame] | 633 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 634 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), |
| 635 | }, |
| 636 | }, |
| 637 | { |
| 638 | .callback = intel_no_lvds_dmi_callback, |
| 639 | .ident = "Apple Mac Mini (Core 2 series)", |
| 640 | .matches = { |
Keith Packard | 98acd46 | 2009-06-14 12:31:58 -0700 | [diff] [blame] | 641 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 642 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), |
| 643 | }, |
| 644 | }, |
| 645 | { |
| 646 | .callback = intel_no_lvds_dmi_callback, |
| 647 | .ident = "MSI IM-945GSE-A", |
| 648 | .matches = { |
| 649 | DMI_MATCH(DMI_SYS_VENDOR, "MSI"), |
| 650 | DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), |
| 651 | }, |
| 652 | }, |
| 653 | { |
| 654 | .callback = intel_no_lvds_dmi_callback, |
| 655 | .ident = "Dell Studio Hybrid", |
| 656 | .matches = { |
| 657 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
| 658 | DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), |
| 659 | }, |
| 660 | }, |
Jarod Wilson | 70aa96c | 2009-05-27 17:20:39 -0400 | [diff] [blame] | 661 | { |
| 662 | .callback = intel_no_lvds_dmi_callback, |
Pieterjan Camerlynck | b066254 | 2011-07-26 16:23:54 +0200 | [diff] [blame] | 663 | .ident = "Dell OptiPlex FX170", |
| 664 | .matches = { |
| 665 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
| 666 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"), |
| 667 | }, |
| 668 | }, |
| 669 | { |
| 670 | .callback = intel_no_lvds_dmi_callback, |
Jarod Wilson | 70aa96c | 2009-05-27 17:20:39 -0400 | [diff] [blame] | 671 | .ident = "AOpen Mini PC", |
| 672 | .matches = { |
| 673 | DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), |
| 674 | DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), |
| 675 | }, |
| 676 | }, |
Michael Cousin | fa0864b | 2009-06-05 21:16:22 +0200 | [diff] [blame] | 677 | { |
| 678 | .callback = intel_no_lvds_dmi_callback, |
Tormod Volden | ed8c754 | 2009-07-13 22:26:48 +0200 | [diff] [blame] | 679 | .ident = "AOpen Mini PC MP915", |
| 680 | .matches = { |
| 681 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
| 682 | DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), |
| 683 | }, |
| 684 | }, |
| 685 | { |
| 686 | .callback = intel_no_lvds_dmi_callback, |
Knut Petersen | 22ab70d | 2011-01-14 15:38:10 +0000 | [diff] [blame] | 687 | .ident = "AOpen i915GMm-HFS", |
| 688 | .matches = { |
| 689 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
| 690 | DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"), |
| 691 | }, |
| 692 | }, |
| 693 | { |
| 694 | .callback = intel_no_lvds_dmi_callback, |
Michael Cousin | fa0864b | 2009-06-05 21:16:22 +0200 | [diff] [blame] | 695 | .ident = "Aopen i945GTt-VFA", |
| 696 | .matches = { |
| 697 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), |
| 698 | }, |
| 699 | }, |
Stefan Bader | 9875557ee8 | 2010-03-29 17:53:12 +0200 | [diff] [blame] | 700 | { |
| 701 | .callback = intel_no_lvds_dmi_callback, |
| 702 | .ident = "Clientron U800", |
| 703 | .matches = { |
| 704 | DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), |
| 705 | DMI_MATCH(DMI_PRODUCT_NAME, "U800"), |
| 706 | }, |
| 707 | }, |
Hans de Goede | 6a574b5 | 2011-06-04 15:39:21 +0200 | [diff] [blame] | 708 | { |
| 709 | .callback = intel_no_lvds_dmi_callback, |
| 710 | .ident = "Asus EeeBox PC EB1007", |
| 711 | .matches = { |
| 712 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), |
| 713 | DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), |
| 714 | }, |
| 715 | }, |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 716 | |
| 717 | { } /* terminating entry */ |
| 718 | }; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 719 | |
| 720 | /** |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 721 | * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID |
| 722 | * @dev: drm device |
| 723 | * @connector: LVDS connector |
| 724 | * |
| 725 | * Find the reduced downclock for LVDS in EDID. |
| 726 | */ |
| 727 | static void intel_find_lvds_downclock(struct drm_device *dev, |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 728 | struct drm_display_mode *fixed_mode, |
| 729 | struct drm_connector *connector) |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 730 | { |
| 731 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 732 | struct drm_display_mode *scan; |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 733 | int temp_downclock; |
| 734 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 735 | temp_downclock = fixed_mode->clock; |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 736 | list_for_each_entry(scan, &connector->probed_modes, head) { |
| 737 | /* |
| 738 | * If one mode has the same resolution with the fixed_panel |
| 739 | * mode while they have the different refresh rate, it means |
| 740 | * that the reduced downclock is found for the LVDS. In such |
| 741 | * case we can set the different FPx0/1 to dynamically select |
| 742 | * between low and high frequency. |
| 743 | */ |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 744 | if (scan->hdisplay == fixed_mode->hdisplay && |
| 745 | scan->hsync_start == fixed_mode->hsync_start && |
| 746 | scan->hsync_end == fixed_mode->hsync_end && |
| 747 | scan->htotal == fixed_mode->htotal && |
| 748 | scan->vdisplay == fixed_mode->vdisplay && |
| 749 | scan->vsync_start == fixed_mode->vsync_start && |
| 750 | scan->vsync_end == fixed_mode->vsync_end && |
| 751 | scan->vtotal == fixed_mode->vtotal) { |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 752 | if (scan->clock < temp_downclock) { |
| 753 | /* |
| 754 | * The downclock is already found. But we |
| 755 | * expect to find the lower downclock. |
| 756 | */ |
| 757 | temp_downclock = scan->clock; |
| 758 | } |
| 759 | } |
| 760 | } |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 761 | if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) { |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 762 | /* We found the downclock for LVDS. */ |
| 763 | dev_priv->lvds_downclock_avail = 1; |
| 764 | dev_priv->lvds_downclock = temp_downclock; |
| 765 | DRM_DEBUG_KMS("LVDS downclock is found in EDID. " |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 766 | "Normal clock %dKhz, downclock %dKhz\n", |
| 767 | fixed_mode->clock, temp_downclock); |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 768 | } |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 769 | } |
| 770 | |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 771 | /* |
| 772 | * Enumerate the child dev array parsed from VBT to check whether |
| 773 | * the LVDS is present. |
| 774 | * If it is present, return 1. |
| 775 | * If it is not present, return false. |
| 776 | * If no child dev is parsed from VBT, it assumes that the LVDS is present. |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 777 | */ |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 778 | static bool lvds_is_present_in_vbt(struct drm_device *dev, |
| 779 | u8 *i2c_pin) |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 780 | { |
| 781 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 782 | int i; |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 783 | |
| 784 | if (!dev_priv->child_dev_num) |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 785 | return true; |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 786 | |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 787 | for (i = 0; i < dev_priv->child_dev_num; i++) { |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 788 | struct child_device_config *child = dev_priv->child_dev + i; |
| 789 | |
| 790 | /* If the device type is not LFP, continue. |
| 791 | * We have to check both the new identifiers as well as the |
| 792 | * old for compatibility with some BIOSes. |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 793 | */ |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 794 | if (child->device_type != DEVICE_TYPE_INT_LFP && |
| 795 | child->device_type != DEVICE_TYPE_LFP) |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 796 | continue; |
| 797 | |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 798 | if (child->i2c_pin) |
| 799 | *i2c_pin = child->i2c_pin; |
| 800 | |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 801 | /* However, we cannot trust the BIOS writers to populate |
| 802 | * the VBT correctly. Since LVDS requires additional |
| 803 | * information from AIM blocks, a non-zero addin offset is |
| 804 | * a good indicator that the LVDS is actually present. |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 805 | */ |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 806 | if (child->addin_offset) |
| 807 | return true; |
| 808 | |
| 809 | /* But even then some BIOS writers perform some black magic |
| 810 | * and instantiate the device without reference to any |
| 811 | * additional data. Trust that if the VBT was written into |
| 812 | * the OpRegion then they have validated the LVDS's existence. |
| 813 | */ |
| 814 | if (dev_priv->opregion.vbt) |
| 815 | return true; |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 816 | } |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 817 | |
| 818 | return false; |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 819 | } |
| 820 | |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 821 | /** |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 822 | * intel_lvds_init - setup LVDS connectors on this device |
| 823 | * @dev: drm device |
| 824 | * |
| 825 | * Create the connector, register the LVDS DDC bus, and try to figure out what |
| 826 | * modes we can display on the LVDS panel (if present). |
| 827 | */ |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 828 | bool intel_lvds_init(struct drm_device *dev) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 829 | { |
| 830 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 831 | struct intel_lvds *intel_lvds; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 832 | struct intel_encoder *intel_encoder; |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 833 | struct intel_connector *intel_connector; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 834 | struct drm_connector *connector; |
| 835 | struct drm_encoder *encoder; |
| 836 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ |
| 837 | struct drm_crtc *crtc; |
| 838 | u32 lvds; |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 839 | int pipe; |
| 840 | u8 pin; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 841 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 842 | /* Skip init on machines we know falsely report LVDS */ |
| 843 | if (dmi_check_system(intel_no_lvds)) |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 844 | return false; |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 845 | |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 846 | pin = GMBUS_PORT_PANEL; |
| 847 | if (!lvds_is_present_in_vbt(dev, &pin)) { |
Matthew Garrett | 11ba159 | 2009-12-15 13:55:24 -0500 | [diff] [blame] | 848 | DRM_DEBUG_KMS("LVDS is not present in VBT\n"); |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 849 | return false; |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 850 | } |
Zhao Yakui | e99da35 | 2009-06-26 09:46:18 +0800 | [diff] [blame] | 851 | |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 852 | if (HAS_PCH_SPLIT(dev)) { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 853 | if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 854 | return false; |
Chris Wilson | 5ceb0f9 | 2010-09-24 10:24:28 +0100 | [diff] [blame] | 855 | if (dev_priv->edp.support) { |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 856 | DRM_DEBUG_KMS("disable LVDS for eDP support\n"); |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 857 | return false; |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 858 | } |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 859 | } |
| 860 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 861 | intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL); |
| 862 | if (!intel_lvds) { |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 863 | return false; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 864 | } |
| 865 | |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 866 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); |
| 867 | if (!intel_connector) { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 868 | kfree(intel_lvds); |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 869 | return false; |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 870 | } |
| 871 | |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 872 | if (!HAS_PCH_SPLIT(dev)) { |
| 873 | intel_lvds->pfit_control = I915_READ(PFIT_CONTROL); |
| 874 | } |
| 875 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 876 | intel_encoder = &intel_lvds->base; |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 877 | encoder = &intel_encoder->base; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 878 | connector = &intel_connector->base; |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 879 | drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 880 | DRM_MODE_CONNECTOR_LVDS); |
| 881 | |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 882 | drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 883 | DRM_MODE_ENCODER_LVDS); |
| 884 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 885 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 886 | intel_encoder->type = INTEL_OUTPUT_LVDS; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 887 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 888 | intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); |
| 889 | intel_encoder->crtc_mask = (1 << 1); |
Chris Wilson | 4add75c | 2010-12-04 17:49:46 +0000 | [diff] [blame] | 890 | if (INTEL_INFO(dev)->gen >= 5) |
| 891 | intel_encoder->crtc_mask |= (1 << 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 892 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); |
| 893 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); |
| 894 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
| 895 | connector->interlace_allowed = false; |
| 896 | connector->doublescan_allowed = false; |
| 897 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 898 | /* create the scaling mode property */ |
| 899 | drm_mode_create_scaling_mode_property(dev); |
| 900 | /* |
| 901 | * the initial panel fitting mode will be FULL_SCREEN. |
| 902 | */ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 903 | |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 904 | drm_connector_attach_property(&intel_connector->base, |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 905 | dev->mode_config.scaling_mode_property, |
Jesse Barnes | dd1ea37 | 2010-06-24 11:05:10 -0700 | [diff] [blame] | 906 | DRM_MODE_SCALE_ASPECT); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 907 | intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 908 | /* |
| 909 | * LVDS discovery: |
| 910 | * 1) check for EDID on DDC |
| 911 | * 2) check for VBT data |
| 912 | * 3) check to see if LVDS is already on |
| 913 | * if none of the above, no panel |
| 914 | * 4) make sure lid is open |
| 915 | * if closed, act like it's not there for now |
| 916 | */ |
| 917 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 918 | /* |
| 919 | * Attempt to get the fixed panel mode from DDC. Assume that the |
| 920 | * preferred mode is the right one. |
| 921 | */ |
Chris Wilson | 219adae | 2010-09-16 23:05:10 +0100 | [diff] [blame] | 922 | intel_lvds->edid = drm_get_edid(connector, |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 923 | &dev_priv->gmbus[pin].adapter); |
Chris Wilson | 3f8ff0e | 2010-11-08 23:20:52 +0000 | [diff] [blame] | 924 | if (intel_lvds->edid) { |
| 925 | if (drm_add_edid_modes(connector, |
| 926 | intel_lvds->edid)) { |
| 927 | drm_mode_connector_update_edid_property(connector, |
| 928 | intel_lvds->edid); |
| 929 | } else { |
| 930 | kfree(intel_lvds->edid); |
| 931 | intel_lvds->edid = NULL; |
| 932 | } |
| 933 | } |
Chris Wilson | 219adae | 2010-09-16 23:05:10 +0100 | [diff] [blame] | 934 | if (!intel_lvds->edid) { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 935 | /* Didn't get an EDID, so |
| 936 | * Set wide sync ranges so we get all modes |
| 937 | * handed to valid_mode for checking |
| 938 | */ |
| 939 | connector->display_info.min_vfreq = 0; |
| 940 | connector->display_info.max_vfreq = 200; |
| 941 | connector->display_info.min_hfreq = 0; |
| 942 | connector->display_info.max_hfreq = 200; |
| 943 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 944 | |
| 945 | list_for_each_entry(scan, &connector->probed_modes, head) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 946 | if (scan->type & DRM_MODE_TYPE_PREFERRED) { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 947 | intel_lvds->fixed_mode = |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 948 | drm_mode_duplicate(dev, scan); |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 949 | intel_find_lvds_downclock(dev, |
| 950 | intel_lvds->fixed_mode, |
| 951 | connector); |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 952 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 953 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 954 | } |
| 955 | |
| 956 | /* Failed to get EDID, what about VBT? */ |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 957 | if (dev_priv->lfp_lvds_vbt_mode) { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 958 | intel_lvds->fixed_mode = |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 959 | drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 960 | if (intel_lvds->fixed_mode) { |
| 961 | intel_lvds->fixed_mode->type |= |
Jesse Barnes | e285f3cd | 2009-01-14 10:53:36 -0800 | [diff] [blame] | 962 | DRM_MODE_TYPE_PREFERRED; |
Jesse Barnes | e285f3cd | 2009-01-14 10:53:36 -0800 | [diff] [blame] | 963 | goto out; |
| 964 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 965 | } |
| 966 | |
| 967 | /* |
| 968 | * If we didn't get EDID, try checking if the panel is already turned |
| 969 | * on. If so, assume that whatever is currently programmed is the |
| 970 | * correct mode. |
| 971 | */ |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 972 | |
Adam Jackson | f2b115e | 2009-12-03 17:14:42 -0500 | [diff] [blame] | 973 | /* Ironlake: FIXME if still fail, not try pipe mode now */ |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 974 | if (HAS_PCH_SPLIT(dev)) |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 975 | goto failed; |
| 976 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 977 | lvds = I915_READ(LVDS); |
| 978 | pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; |
Chris Wilson | f875c15 | 2010-09-09 15:44:14 +0100 | [diff] [blame] | 979 | crtc = intel_get_crtc_for_pipe(dev, pipe); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 980 | |
| 981 | if (crtc && (lvds & LVDS_PORT_EN)) { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 982 | intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc); |
| 983 | if (intel_lvds->fixed_mode) { |
| 984 | intel_lvds->fixed_mode->type |= |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 985 | DRM_MODE_TYPE_PREFERRED; |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 986 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 987 | } |
| 988 | } |
| 989 | |
| 990 | /* If we still don't have a mode after all that, give up. */ |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 991 | if (!intel_lvds->fixed_mode) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 992 | goto failed; |
| 993 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 994 | out: |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 995 | if (HAS_PCH_SPLIT(dev)) { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 996 | u32 pwm; |
Chris Wilson | 17fe698 | 2010-12-03 20:17:19 +0000 | [diff] [blame] | 997 | |
| 998 | pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0; |
| 999 | |
| 1000 | /* make sure PWM is enabled and locked to the LVDS pipe */ |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 1001 | pwm = I915_READ(BLC_PWM_CPU_CTL2); |
Chris Wilson | 17fe698 | 2010-12-03 20:17:19 +0000 | [diff] [blame] | 1002 | if (pipe == 0 && (pwm & PWM_PIPE_B)) |
| 1003 | I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE); |
| 1004 | if (pipe) |
| 1005 | pwm |= PWM_PIPE_B; |
| 1006 | else |
| 1007 | pwm &= ~PWM_PIPE_B; |
| 1008 | I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE); |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 1009 | |
| 1010 | pwm = I915_READ(BLC_PWM_PCH_CTL1); |
| 1011 | pwm |= PWM_PCH_ENABLE; |
| 1012 | I915_WRITE(BLC_PWM_PCH_CTL1, pwm); |
Keith Packard | ed10fca | 2011-08-06 10:33:12 -0700 | [diff] [blame^] | 1013 | /* |
| 1014 | * Unlock registers and just |
| 1015 | * leave them unlocked |
| 1016 | */ |
| 1017 | I915_WRITE(PCH_PP_CONTROL, |
| 1018 | I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); |
| 1019 | } else { |
| 1020 | /* |
| 1021 | * Unlock registers and just |
| 1022 | * leave them unlocked |
| 1023 | */ |
| 1024 | I915_WRITE(PP_CONTROL, |
| 1025 | I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 1026 | } |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 1027 | dev_priv->lid_notifier.notifier_call = intel_lid_notify; |
| 1028 | if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) { |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 1029 | DRM_DEBUG_KMS("lid notifier registration failed\n"); |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 1030 | dev_priv->lid_notifier.notifier_call = NULL; |
| 1031 | } |
Zhao Yakui | a256537 | 2009-12-11 09:26:11 +0800 | [diff] [blame] | 1032 | /* keep the LVDS connector */ |
| 1033 | dev_priv->int_lvds_connector = connector; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1034 | drm_sysfs_connector_add(connector); |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 1035 | return true; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1036 | |
| 1037 | failed: |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 1038 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1039 | drm_connector_cleanup(connector); |
Shaohua Li | 1991bdf | 2009-11-17 17:19:23 +0800 | [diff] [blame] | 1040 | drm_encoder_cleanup(encoder); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 1041 | kfree(intel_lvds); |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 1042 | kfree(intel_connector); |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 1043 | return false; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1044 | } |