Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 3 | #include <dt-bindings/input/input.h> |
Stephen Warren | 1bd0bd4 | 2012-10-17 16:38:21 -0600 | [diff] [blame] | 4 | #include "tegra20.dtsi" |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 5 | |
| 6 | / { |
| 7 | model = "NVIDIA Seaboard"; |
| 8 | compatible = "nvidia,seaboard", "nvidia,tegra20"; |
| 9 | |
Stephen Warren | 553c0a2 | 2013-12-09 14:43:59 -0700 | [diff] [blame] | 10 | aliases { |
| 11 | rtc0 = "/i2c@7000d000/tps6586x@34"; |
| 12 | rtc1 = "/rtc@7000e000"; |
| 13 | }; |
| 14 | |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 15 | memory { |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 16 | reg = <0x00000000 0x40000000>; |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 17 | }; |
| 18 | |
Stephen Warren | 58ecb23 | 2013-11-25 17:53:16 -0700 | [diff] [blame] | 19 | host1x@50000000 { |
Stephen Warren | 9615d65 | 2014-01-07 16:16:32 -0700 | [diff] [blame] | 20 | dc@54200000 { |
| 21 | rgb { |
| 22 | status = "okay"; |
| 23 | |
| 24 | nvidia,panel = <&panel>; |
| 25 | }; |
| 26 | }; |
| 27 | |
Stephen Warren | 58ecb23 | 2013-11-25 17:53:16 -0700 | [diff] [blame] | 28 | hdmi@54280000 { |
Stephen Warren | a75191e | 2013-01-02 14:53:20 -0700 | [diff] [blame] | 29 | status = "okay"; |
| 30 | |
| 31 | vdd-supply = <&hdmi_vdd_reg>; |
| 32 | pll-supply = <&hdmi_pll_reg>; |
| 33 | |
| 34 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; |
Stephen Warren | 3325f1b | 2013-02-12 17:25:15 -0700 | [diff] [blame] | 35 | nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) |
| 36 | GPIO_ACTIVE_HIGH>; |
Stephen Warren | a75191e | 2013-01-02 14:53:20 -0700 | [diff] [blame] | 37 | }; |
| 38 | }; |
| 39 | |
Stephen Warren | 58ecb23 | 2013-11-25 17:53:16 -0700 | [diff] [blame] | 40 | pinmux@70000014 { |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 41 | pinctrl-names = "default"; |
| 42 | pinctrl-0 = <&state_default>; |
| 43 | |
| 44 | state_default: pinmux { |
| 45 | ata { |
| 46 | nvidia,pins = "ata"; |
| 47 | nvidia,function = "ide"; |
| 48 | }; |
| 49 | atb { |
| 50 | nvidia,pins = "atb", "gma", "gme"; |
| 51 | nvidia,function = "sdio4"; |
| 52 | }; |
| 53 | atc { |
| 54 | nvidia,pins = "atc"; |
| 55 | nvidia,function = "nand"; |
| 56 | }; |
| 57 | atd { |
| 58 | nvidia,pins = "atd", "ate", "gmb", "spia", |
| 59 | "spib", "spic"; |
| 60 | nvidia,function = "gmi"; |
| 61 | }; |
| 62 | cdev1 { |
| 63 | nvidia,pins = "cdev1"; |
| 64 | nvidia,function = "plla_out"; |
| 65 | }; |
| 66 | cdev2 { |
| 67 | nvidia,pins = "cdev2"; |
| 68 | nvidia,function = "pllp_out4"; |
| 69 | }; |
| 70 | crtp { |
| 71 | nvidia,pins = "crtp", "lm1"; |
| 72 | nvidia,function = "crt"; |
| 73 | }; |
| 74 | csus { |
| 75 | nvidia,pins = "csus"; |
| 76 | nvidia,function = "vi_sensor_clk"; |
| 77 | }; |
| 78 | dap1 { |
| 79 | nvidia,pins = "dap1"; |
| 80 | nvidia,function = "dap1"; |
| 81 | }; |
| 82 | dap2 { |
| 83 | nvidia,pins = "dap2"; |
| 84 | nvidia,function = "dap2"; |
| 85 | }; |
| 86 | dap3 { |
| 87 | nvidia,pins = "dap3"; |
| 88 | nvidia,function = "dap3"; |
| 89 | }; |
| 90 | dap4 { |
| 91 | nvidia,pins = "dap4"; |
| 92 | nvidia,function = "dap4"; |
| 93 | }; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 94 | dta { |
| 95 | nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; |
| 96 | nvidia,function = "vi"; |
| 97 | }; |
| 98 | dtf { |
| 99 | nvidia,pins = "dtf"; |
| 100 | nvidia,function = "i2c3"; |
| 101 | }; |
| 102 | gmc { |
| 103 | nvidia,pins = "gmc"; |
| 104 | nvidia,function = "uartd"; |
| 105 | }; |
| 106 | gmd { |
| 107 | nvidia,pins = "gmd"; |
| 108 | nvidia,function = "sflash"; |
| 109 | }; |
| 110 | gpu { |
| 111 | nvidia,pins = "gpu"; |
| 112 | nvidia,function = "pwm"; |
| 113 | }; |
| 114 | gpu7 { |
| 115 | nvidia,pins = "gpu7"; |
| 116 | nvidia,function = "rtck"; |
| 117 | }; |
| 118 | gpv { |
| 119 | nvidia,pins = "gpv", "slxa", "slxk"; |
| 120 | nvidia,function = "pcie"; |
| 121 | }; |
| 122 | hdint { |
| 123 | nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1", |
Stephen Warren | 802a849 | 2012-04-26 11:21:54 -0600 | [diff] [blame] | 124 | "lsck", "lsda"; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 125 | nvidia,function = "hdmi"; |
| 126 | }; |
| 127 | i2cp { |
| 128 | nvidia,pins = "i2cp"; |
| 129 | nvidia,function = "i2cp"; |
| 130 | }; |
| 131 | irrx { |
| 132 | nvidia,pins = "irrx", "irtx"; |
| 133 | nvidia,function = "uartb"; |
| 134 | }; |
| 135 | kbca { |
| 136 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", |
| 137 | "kbce", "kbcf"; |
| 138 | nvidia,function = "kbc"; |
| 139 | }; |
| 140 | lcsn { |
| 141 | nvidia,pins = "lcsn", "ldc", "lm0", "lpw1", |
| 142 | "lsdi", "lvp0"; |
| 143 | nvidia,function = "rsvd4"; |
| 144 | }; |
| 145 | ld0 { |
| 146 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", |
| 147 | "ld5", "ld6", "ld7", "ld8", "ld9", |
| 148 | "ld10", "ld11", "ld12", "ld13", "ld14", |
| 149 | "ld15", "ld16", "ld17", "ldi", "lhp0", |
| 150 | "lhp1", "lhp2", "lhs", "lpp", "lsc0", |
| 151 | "lspi", "lvp1", "lvs"; |
| 152 | nvidia,function = "displaya"; |
| 153 | }; |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 154 | owc { |
| 155 | nvidia,pins = "owc", "spdi", "spdo", "uac"; |
| 156 | nvidia,function = "rsvd2"; |
| 157 | }; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 158 | pmc { |
| 159 | nvidia,pins = "pmc"; |
| 160 | nvidia,function = "pwr_on"; |
| 161 | }; |
| 162 | rm { |
| 163 | nvidia,pins = "rm"; |
| 164 | nvidia,function = "i2c1"; |
| 165 | }; |
| 166 | sdb { |
| 167 | nvidia,pins = "sdb", "sdc", "sdd"; |
| 168 | nvidia,function = "sdio3"; |
| 169 | }; |
| 170 | sdio1 { |
| 171 | nvidia,pins = "sdio1"; |
| 172 | nvidia,function = "sdio1"; |
| 173 | }; |
| 174 | slxc { |
| 175 | nvidia,pins = "slxc", "slxd"; |
| 176 | nvidia,function = "spdif"; |
| 177 | }; |
| 178 | spid { |
| 179 | nvidia,pins = "spid", "spie", "spif"; |
| 180 | nvidia,function = "spi1"; |
| 181 | }; |
| 182 | spig { |
| 183 | nvidia,pins = "spig", "spih"; |
| 184 | nvidia,function = "spi2_alt"; |
| 185 | }; |
| 186 | uaa { |
| 187 | nvidia,pins = "uaa", "uab", "uda"; |
| 188 | nvidia,function = "ulpi"; |
| 189 | }; |
| 190 | uad { |
| 191 | nvidia,pins = "uad"; |
| 192 | nvidia,function = "irda"; |
| 193 | }; |
| 194 | uca { |
| 195 | nvidia,pins = "uca", "ucb"; |
| 196 | nvidia,function = "uartc"; |
| 197 | }; |
| 198 | conf_ata { |
| 199 | nvidia,pins = "ata", "atb", "atc", "atd", |
| 200 | "cdev1", "cdev2", "dap1", "dap2", |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 201 | "dap4", "ddc", "dtf", "gma", "gmc", "gmd", |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 202 | "gme", "gpu", "gpu7", "i2cp", "irrx", |
| 203 | "irtx", "pta", "rm", "sdc", "sdd", |
| 204 | "slxd", "slxk", "spdi", "spdo", "uac", |
| 205 | "uad", "uca", "ucb", "uda"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 206 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 207 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 208 | }; |
| 209 | conf_ate { |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 210 | nvidia,pins = "ate", "csus", "dap3", |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 211 | "gpv", "owc", "slxc", "spib", "spid", |
| 212 | "spie"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 213 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 214 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 215 | }; |
| 216 | conf_ck32 { |
| 217 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", |
| 218 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 219 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 220 | }; |
| 221 | conf_crtp { |
| 222 | nvidia,pins = "crtp", "gmb", "slxa", "spia", |
| 223 | "spig", "spih"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 224 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| 225 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 226 | }; |
| 227 | conf_dta { |
| 228 | nvidia,pins = "dta", "dtb", "dtc", "dtd"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 229 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 230 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 231 | }; |
| 232 | conf_dte { |
| 233 | nvidia,pins = "dte", "spif"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 234 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 235 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 236 | }; |
| 237 | conf_hdint { |
| 238 | nvidia,pins = "hdint", "lcsn", "ldc", "lm1", |
| 239 | "lpw1", "lsc1", "lsck", "lsda", "lsdi", |
| 240 | "lvp0"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 241 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 242 | }; |
| 243 | conf_kbca { |
| 244 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", |
| 245 | "kbce", "kbcf", "sdio1", "spic", "uaa", |
| 246 | "uab"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 247 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| 248 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 249 | }; |
| 250 | conf_lc { |
| 251 | nvidia,pins = "lc", "ls"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 252 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 253 | }; |
| 254 | conf_ld0 { |
| 255 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", |
| 256 | "ld5", "ld6", "ld7", "ld8", "ld9", |
| 257 | "ld10", "ld11", "ld12", "ld13", "ld14", |
| 258 | "ld15", "ld16", "ld17", "ldi", "lhp0", |
| 259 | "lhp1", "lhp2", "lhs", "lm0", "lpp", |
| 260 | "lpw0", "lpw2", "lsc0", "lspi", "lvp1", |
| 261 | "lvs", "pmc", "sdb"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 262 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 263 | }; |
| 264 | conf_ld17_0 { |
| 265 | nvidia,pins = "ld17_0", "ld19_18", "ld21_20", |
| 266 | "ld23_22"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 267 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 268 | }; |
| 269 | drive_sdio1 { |
| 270 | nvidia,pins = "drive_sdio1"; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 271 | nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>; |
| 272 | nvidia,schmitt = <TEGRA_PIN_DISABLE>; |
| 273 | nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 274 | nvidia,pull-down-strength = <31>; |
| 275 | nvidia,pull-up-strength = <31>; |
Laxman Dewangan | ba4104e | 2013-12-05 16:14:08 +0530 | [diff] [blame] | 276 | nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>; |
| 277 | nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 278 | }; |
| 279 | }; |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 280 | |
| 281 | state_i2cmux_ddc: pinmux_i2cmux_ddc { |
| 282 | ddc { |
| 283 | nvidia,pins = "ddc"; |
| 284 | nvidia,function = "i2c2"; |
| 285 | }; |
| 286 | pta { |
| 287 | nvidia,pins = "pta"; |
| 288 | nvidia,function = "rsvd4"; |
| 289 | }; |
| 290 | }; |
| 291 | |
| 292 | state_i2cmux_pta: pinmux_i2cmux_pta { |
| 293 | ddc { |
| 294 | nvidia,pins = "ddc"; |
| 295 | nvidia,function = "rsvd4"; |
| 296 | }; |
| 297 | pta { |
| 298 | nvidia,pins = "pta"; |
| 299 | nvidia,function = "i2c2"; |
| 300 | }; |
| 301 | }; |
| 302 | |
| 303 | state_i2cmux_idle: pinmux_i2cmux_idle { |
| 304 | ddc { |
| 305 | nvidia,pins = "ddc"; |
| 306 | nvidia,function = "rsvd4"; |
| 307 | }; |
| 308 | pta { |
| 309 | nvidia,pins = "pta"; |
| 310 | nvidia,function = "rsvd4"; |
| 311 | }; |
| 312 | }; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 313 | }; |
| 314 | |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 315 | i2s@70002800 { |
| 316 | status = "okay"; |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 317 | }; |
| 318 | |
| 319 | serial@70006300 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 320 | status = "okay"; |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 321 | }; |
| 322 | |
Stephen Warren | 9615d65 | 2014-01-07 16:16:32 -0700 | [diff] [blame] | 323 | pwm: pwm@7000a000 { |
| 324 | status = "okay"; |
| 325 | }; |
| 326 | |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 327 | i2c@7000c000 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 328 | status = "okay"; |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 329 | clock-frequency = <400000>; |
Stephen Warren | 797acf7 | 2012-01-11 16:09:57 -0700 | [diff] [blame] | 330 | |
| 331 | wm8903: wm8903@1a { |
| 332 | compatible = "wlf,wm8903"; |
| 333 | reg = <0x1a>; |
| 334 | interrupt-parent = <&gpio>; |
Stephen Warren | 6cecf91 | 2013-02-13 12:51:51 -0700 | [diff] [blame] | 335 | interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>; |
Stephen Warren | 797acf7 | 2012-01-11 16:09:57 -0700 | [diff] [blame] | 336 | |
| 337 | gpio-controller; |
| 338 | #gpio-cells = <2>; |
| 339 | |
| 340 | micdet-cfg = <0>; |
| 341 | micdet-delay = <100>; |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 342 | gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; |
Stephen Warren | 797acf7 | 2012-01-11 16:09:57 -0700 | [diff] [blame] | 343 | }; |
Laxman Dewangan | b46b0b5 | 2012-04-23 17:41:36 +0530 | [diff] [blame] | 344 | |
| 345 | /* ALS and proximity sensor */ |
| 346 | isl29018@44 { |
| 347 | compatible = "isil,isl29018"; |
| 348 | reg = <0x44>; |
| 349 | interrupt-parent = <&gpio>; |
Stephen Warren | 6cecf91 | 2013-02-13 12:51:51 -0700 | [diff] [blame] | 350 | interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>; |
Laxman Dewangan | b46b0b5 | 2012-04-23 17:41:36 +0530 | [diff] [blame] | 351 | }; |
Olof Johansson | 45dbe9d | 2011-12-22 16:33:13 +0000 | [diff] [blame] | 352 | |
| 353 | gyrometer@68 { |
| 354 | compatible = "invn,mpu3050"; |
| 355 | reg = <0x68>; |
| 356 | interrupt-parent = <&gpio>; |
Stephen Warren | 6cecf91 | 2013-02-13 12:51:51 -0700 | [diff] [blame] | 357 | interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>; |
Olof Johansson | 45dbe9d | 2011-12-22 16:33:13 +0000 | [diff] [blame] | 358 | }; |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 359 | }; |
| 360 | |
| 361 | i2c@7000c400 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 362 | status = "okay"; |
Stephen Warren | 22bd1f7 | 2012-04-26 11:19:03 -0600 | [diff] [blame] | 363 | clock-frequency = <100000>; |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 364 | }; |
| 365 | |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 366 | i2cmux { |
| 367 | compatible = "i2c-mux-pinctrl"; |
| 368 | #address-cells = <1>; |
| 369 | #size-cells = <0>; |
| 370 | |
| 371 | i2c-parent = <&{/i2c@7000c400}>; |
| 372 | |
| 373 | pinctrl-names = "ddc", "pta", "idle"; |
| 374 | pinctrl-0 = <&state_i2cmux_ddc>; |
| 375 | pinctrl-1 = <&state_i2cmux_pta>; |
| 376 | pinctrl-2 = <&state_i2cmux_idle>; |
| 377 | |
Stephen Warren | a75191e | 2013-01-02 14:53:20 -0700 | [diff] [blame] | 378 | hdmi_ddc: i2c@0 { |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 379 | reg = <0>; |
| 380 | #address-cells = <1>; |
| 381 | #size-cells = <0>; |
| 382 | }; |
| 383 | |
Stephen Warren | 9615d65 | 2014-01-07 16:16:32 -0700 | [diff] [blame] | 384 | lvds_ddc: i2c@1 { |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 385 | reg = <1>; |
| 386 | #address-cells = <1>; |
| 387 | #size-cells = <0>; |
Stephen Warren | 0879c5f | 2012-04-25 16:57:28 -0600 | [diff] [blame] | 388 | |
| 389 | smart-battery@b { |
| 390 | compatible = "ti,bq20z75", "smart-battery-1.1"; |
| 391 | reg = <0xb>; |
| 392 | ti,i2c-retry-count = <2>; |
| 393 | ti,poll-retry-count = <10>; |
| 394 | }; |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 395 | }; |
| 396 | }; |
| 397 | |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 398 | i2c@7000c500 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 399 | status = "okay"; |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 400 | clock-frequency = <400000>; |
| 401 | }; |
| 402 | |
| 403 | i2c@7000d000 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 404 | status = "okay"; |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 405 | clock-frequency = <400000>; |
Stephen Warren | 401c9a5 | 2011-12-17 23:29:32 -0700 | [diff] [blame] | 406 | |
Stephen Warren | 5789905 | 2013-11-26 14:43:45 -0700 | [diff] [blame] | 407 | magnetometer@c { |
| 408 | compatible = "ak,ak8975"; |
| 409 | reg = <0xc>; |
| 410 | interrupt-parent = <&gpio>; |
| 411 | interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>; |
| 412 | }; |
| 413 | |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 414 | pmic: tps6586x@34 { |
| 415 | compatible = "ti,tps6586x"; |
| 416 | reg = <0x34>; |
Stephen Warren | 6cecf91 | 2013-02-13 12:51:51 -0700 | [diff] [blame] | 417 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 418 | |
Stephen Warren | 44b12ef | 2012-09-11 11:42:26 -0600 | [diff] [blame] | 419 | ti,system-power-controller; |
| 420 | |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 421 | #gpio-cells = <2>; |
| 422 | gpio-controller; |
| 423 | |
| 424 | sys-supply = <&vdd_5v0_reg>; |
| 425 | vin-sm0-supply = <&sys_reg>; |
| 426 | vin-sm1-supply = <&sys_reg>; |
| 427 | vin-sm2-supply = <&sys_reg>; |
| 428 | vinldo01-supply = <&sm2_reg>; |
| 429 | vinldo23-supply = <&sm2_reg>; |
| 430 | vinldo4-supply = <&sm2_reg>; |
| 431 | vinldo678-supply = <&sm2_reg>; |
| 432 | vinldo9-supply = <&sm2_reg>; |
| 433 | |
| 434 | regulators { |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 435 | sys_reg: sys { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 436 | regulator-name = "vdd_sys"; |
| 437 | regulator-always-on; |
| 438 | }; |
| 439 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 440 | sm0 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 441 | regulator-name = "vdd_sm0,vdd_core"; |
| 442 | regulator-min-microvolt = <1300000>; |
| 443 | regulator-max-microvolt = <1300000>; |
| 444 | regulator-always-on; |
| 445 | }; |
| 446 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 447 | sm1 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 448 | regulator-name = "vdd_sm1,vdd_cpu"; |
| 449 | regulator-min-microvolt = <1125000>; |
| 450 | regulator-max-microvolt = <1125000>; |
| 451 | regulator-always-on; |
| 452 | }; |
| 453 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 454 | sm2_reg: sm2 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 455 | regulator-name = "vdd_sm2,vin_ldo*"; |
| 456 | regulator-min-microvolt = <3700000>; |
| 457 | regulator-max-microvolt = <3700000>; |
| 458 | regulator-always-on; |
| 459 | }; |
| 460 | |
| 461 | /* LDO0 is not connected to anything */ |
| 462 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 463 | ldo1 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 464 | regulator-name = "vdd_ldo1,avdd_pll*"; |
| 465 | regulator-min-microvolt = <1100000>; |
| 466 | regulator-max-microvolt = <1100000>; |
| 467 | regulator-always-on; |
| 468 | }; |
| 469 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 470 | ldo2 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 471 | regulator-name = "vdd_ldo2,vdd_rtc"; |
| 472 | regulator-min-microvolt = <1200000>; |
| 473 | regulator-max-microvolt = <1200000>; |
| 474 | }; |
| 475 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 476 | ldo3 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 477 | regulator-name = "vdd_ldo3,avdd_usb*"; |
| 478 | regulator-min-microvolt = <3300000>; |
| 479 | regulator-max-microvolt = <3300000>; |
| 480 | regulator-always-on; |
| 481 | }; |
| 482 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 483 | ldo4 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 484 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
| 485 | regulator-min-microvolt = <1800000>; |
| 486 | regulator-max-microvolt = <1800000>; |
| 487 | regulator-always-on; |
| 488 | }; |
| 489 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 490 | ldo5 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 491 | regulator-name = "vdd_ldo5,vcore_mmc"; |
| 492 | regulator-min-microvolt = <2850000>; |
| 493 | regulator-max-microvolt = <2850000>; |
| 494 | regulator-always-on; |
| 495 | }; |
| 496 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 497 | ldo6 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 498 | regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; |
| 499 | regulator-min-microvolt = <1800000>; |
| 500 | regulator-max-microvolt = <1800000>; |
| 501 | }; |
| 502 | |
Stephen Warren | a75191e | 2013-01-02 14:53:20 -0700 | [diff] [blame] | 503 | hdmi_vdd_reg: ldo7 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 504 | regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; |
| 505 | regulator-min-microvolt = <3300000>; |
| 506 | regulator-max-microvolt = <3300000>; |
| 507 | }; |
| 508 | |
Stephen Warren | a75191e | 2013-01-02 14:53:20 -0700 | [diff] [blame] | 509 | hdmi_pll_reg: ldo8 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 510 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
| 511 | regulator-min-microvolt = <1800000>; |
| 512 | regulator-max-microvolt = <1800000>; |
| 513 | }; |
| 514 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 515 | ldo9 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 516 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; |
| 517 | regulator-min-microvolt = <2850000>; |
| 518 | regulator-max-microvolt = <2850000>; |
| 519 | regulator-always-on; |
| 520 | }; |
| 521 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 522 | ldo_rtc { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 523 | regulator-name = "vdd_rtc_out,vdd_cell"; |
| 524 | regulator-min-microvolt = <3300000>; |
| 525 | regulator-max-microvolt = <3300000>; |
| 526 | regulator-always-on; |
| 527 | }; |
| 528 | }; |
| 529 | }; |
| 530 | |
Olof Johansson | 45dbe9d | 2011-12-22 16:33:13 +0000 | [diff] [blame] | 531 | temperature-sensor@4c { |
Stephen Warren | 9846210 | 2012-11-19 15:34:44 -0700 | [diff] [blame] | 532 | compatible = "onnn,nct1008"; |
Stephen Warren | 401c9a5 | 2011-12-17 23:29:32 -0700 | [diff] [blame] | 533 | reg = <0x4c>; |
| 534 | }; |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 535 | }; |
| 536 | |
Stephen Warren | 58ecb23 | 2013-11-25 17:53:16 -0700 | [diff] [blame] | 537 | kbc@7000e200 { |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 538 | status = "okay"; |
| 539 | nvidia,debounce-delay-ms = <32>; |
| 540 | nvidia,repeat-delay-ms = <160>; |
| 541 | nvidia,ghost-filter; |
| 542 | nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; |
| 543 | nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>; |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 544 | linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W) |
| 545 | MATRIX_KEY(0x00, 0x03, KEY_S) |
| 546 | MATRIX_KEY(0x00, 0x04, KEY_A) |
| 547 | MATRIX_KEY(0x00, 0x05, KEY_Z) |
| 548 | MATRIX_KEY(0x00, 0x07, KEY_FN) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 549 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 550 | MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA) |
| 551 | MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT) |
| 552 | MATRIX_KEY(0x02, 0x07, KEY_LEFTALT) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 553 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 554 | MATRIX_KEY(0x03, 0x00, KEY_5) |
| 555 | MATRIX_KEY(0x03, 0x01, KEY_4) |
| 556 | MATRIX_KEY(0x03, 0x02, KEY_R) |
| 557 | MATRIX_KEY(0x03, 0x03, KEY_E) |
| 558 | MATRIX_KEY(0x03, 0x04, KEY_F) |
| 559 | MATRIX_KEY(0x03, 0x05, KEY_D) |
| 560 | MATRIX_KEY(0x03, 0x06, KEY_X) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 561 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 562 | MATRIX_KEY(0x04, 0x00, KEY_7) |
| 563 | MATRIX_KEY(0x04, 0x01, KEY_6) |
| 564 | MATRIX_KEY(0x04, 0x02, KEY_T) |
| 565 | MATRIX_KEY(0x04, 0x03, KEY_H) |
| 566 | MATRIX_KEY(0x04, 0x04, KEY_G) |
| 567 | MATRIX_KEY(0x04, 0x05, KEY_V) |
| 568 | MATRIX_KEY(0x04, 0x06, KEY_C) |
| 569 | MATRIX_KEY(0x04, 0x07, KEY_SPACE) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 570 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 571 | MATRIX_KEY(0x05, 0x00, KEY_9) |
| 572 | MATRIX_KEY(0x05, 0x01, KEY_8) |
| 573 | MATRIX_KEY(0x05, 0x02, KEY_U) |
| 574 | MATRIX_KEY(0x05, 0x03, KEY_Y) |
| 575 | MATRIX_KEY(0x05, 0x04, KEY_J) |
| 576 | MATRIX_KEY(0x05, 0x05, KEY_N) |
| 577 | MATRIX_KEY(0x05, 0x06, KEY_B) |
| 578 | MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 579 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 580 | MATRIX_KEY(0x06, 0x00, KEY_MINUS) |
| 581 | MATRIX_KEY(0x06, 0x01, KEY_0) |
| 582 | MATRIX_KEY(0x06, 0x02, KEY_O) |
| 583 | MATRIX_KEY(0x06, 0x03, KEY_I) |
| 584 | MATRIX_KEY(0x06, 0x04, KEY_L) |
| 585 | MATRIX_KEY(0x06, 0x05, KEY_K) |
| 586 | MATRIX_KEY(0x06, 0x06, KEY_COMMA) |
| 587 | MATRIX_KEY(0x06, 0x07, KEY_M) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 588 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 589 | MATRIX_KEY(0x07, 0x01, KEY_EQUAL) |
| 590 | MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE) |
| 591 | MATRIX_KEY(0x07, 0x03, KEY_ENTER) |
| 592 | MATRIX_KEY(0x07, 0x07, KEY_MENU) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 593 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 594 | MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT) |
| 595 | MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 596 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 597 | MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL) |
| 598 | MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 599 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 600 | MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE) |
| 601 | MATRIX_KEY(0x0B, 0x01, KEY_P) |
| 602 | MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE) |
| 603 | MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON) |
| 604 | MATRIX_KEY(0x0B, 0x04, KEY_SLASH) |
| 605 | MATRIX_KEY(0x0B, 0x05, KEY_DOT) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 606 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 607 | MATRIX_KEY(0x0C, 0x00, KEY_F10) |
| 608 | MATRIX_KEY(0x0C, 0x01, KEY_F9) |
| 609 | MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE) |
| 610 | MATRIX_KEY(0x0C, 0x03, KEY_3) |
| 611 | MATRIX_KEY(0x0C, 0x04, KEY_2) |
| 612 | MATRIX_KEY(0x0C, 0x05, KEY_UP) |
| 613 | MATRIX_KEY(0x0C, 0x06, KEY_PRINT) |
| 614 | MATRIX_KEY(0x0C, 0x07, KEY_PAUSE) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 615 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 616 | MATRIX_KEY(0x0D, 0x00, KEY_INSERT) |
| 617 | MATRIX_KEY(0x0D, 0x01, KEY_DELETE) |
| 618 | MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP ) |
| 619 | MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN) |
| 620 | MATRIX_KEY(0x0D, 0x05, KEY_RIGHT) |
| 621 | MATRIX_KEY(0x0D, 0x06, KEY_DOWN) |
| 622 | MATRIX_KEY(0x0D, 0x07, KEY_LEFT) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 623 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 624 | MATRIX_KEY(0x0E, 0x00, KEY_F11) |
| 625 | MATRIX_KEY(0x0E, 0x01, KEY_F12) |
| 626 | MATRIX_KEY(0x0E, 0x02, KEY_F8) |
| 627 | MATRIX_KEY(0x0E, 0x03, KEY_Q) |
| 628 | MATRIX_KEY(0x0E, 0x04, KEY_F4) |
| 629 | MATRIX_KEY(0x0E, 0x05, KEY_F3) |
| 630 | MATRIX_KEY(0x0E, 0x06, KEY_1) |
| 631 | MATRIX_KEY(0x0E, 0x07, KEY_F7) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 632 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 633 | MATRIX_KEY(0x0F, 0x00, KEY_ESC) |
| 634 | MATRIX_KEY(0x0F, 0x01, KEY_GRAVE) |
| 635 | MATRIX_KEY(0x0F, 0x02, KEY_F5) |
| 636 | MATRIX_KEY(0x0F, 0x03, KEY_TAB) |
| 637 | MATRIX_KEY(0x0F, 0x04, KEY_F1) |
| 638 | MATRIX_KEY(0x0F, 0x05, KEY_F2) |
| 639 | MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK) |
| 640 | MATRIX_KEY(0x0F, 0x07, KEY_F6) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 641 | |
| 642 | /* Software Handled Function Keys */ |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 643 | MATRIX_KEY(0x14, 0x00, KEY_KP7) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 644 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 645 | MATRIX_KEY(0x15, 0x00, KEY_KP9) |
| 646 | MATRIX_KEY(0x15, 0x01, KEY_KP8) |
| 647 | MATRIX_KEY(0x15, 0x02, KEY_KP4) |
| 648 | MATRIX_KEY(0x15, 0x04, KEY_KP1) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 649 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 650 | MATRIX_KEY(0x16, 0x01, KEY_KPSLASH) |
| 651 | MATRIX_KEY(0x16, 0x02, KEY_KP6) |
| 652 | MATRIX_KEY(0x16, 0x03, KEY_KP5) |
| 653 | MATRIX_KEY(0x16, 0x04, KEY_KP3) |
| 654 | MATRIX_KEY(0x16, 0x05, KEY_KP2) |
| 655 | MATRIX_KEY(0x16, 0x07, KEY_KP0) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 656 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 657 | MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK) |
| 658 | MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS) |
| 659 | MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS) |
| 660 | MATRIX_KEY(0x1B, 0x05, KEY_KPDOT) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 661 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 662 | MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 663 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 664 | MATRIX_KEY(0x1D, 0x03, KEY_HOME) |
| 665 | MATRIX_KEY(0x1D, 0x04, KEY_END) |
| 666 | MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN) |
| 667 | MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN) |
| 668 | MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 669 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 670 | MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK) |
| 671 | MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK) |
| 672 | MATRIX_KEY(0x1E, 0x02, KEY_MUTE) |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 673 | |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 674 | MATRIX_KEY(0x1F, 0x04, KEY_HELP)>; |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 675 | }; |
Stephen Warren | 5789905 | 2013-11-26 14:43:45 -0700 | [diff] [blame] | 676 | |
| 677 | pmc@7000e400 { |
| 678 | nvidia,invert-interrupt; |
| 679 | nvidia,suspend-mode = <1>; |
| 680 | nvidia,cpu-pwr-good-time = <5000>; |
| 681 | nvidia,cpu-pwr-off-time = <5000>; |
| 682 | nvidia,core-pwr-good-time = <3845 3845>; |
| 683 | nvidia,core-pwr-off-time = <3875>; |
| 684 | nvidia,sys-clock-req-active-high; |
| 685 | }; |
| 686 | |
| 687 | memory-controller@7000f400 { |
| 688 | emc-table@190000 { |
| 689 | reg = <190000>; |
| 690 | compatible = "nvidia,tegra20-emc-table"; |
| 691 | clock-frequency = <190000>; |
| 692 | nvidia,emc-registers = <0x0000000c 0x00000026 |
| 693 | 0x00000009 0x00000003 0x00000004 0x00000004 |
| 694 | 0x00000002 0x0000000c 0x00000003 0x00000003 |
| 695 | 0x00000002 0x00000001 0x00000004 0x00000005 |
| 696 | 0x00000004 0x00000009 0x0000000d 0x0000059f |
| 697 | 0x00000000 0x00000003 0x00000003 0x00000003 |
| 698 | 0x00000003 0x00000001 0x0000000b 0x000000c8 |
| 699 | 0x00000003 0x00000007 0x00000004 0x0000000f |
| 700 | 0x00000002 0x00000000 0x00000000 0x00000002 |
| 701 | 0x00000000 0x00000000 0x00000083 0xa06204ae |
| 702 | 0x007dc010 0x00000000 0x00000000 0x00000000 |
| 703 | 0x00000000 0x00000000 0x00000000 0x00000000>; |
| 704 | }; |
| 705 | |
| 706 | emc-table@380000 { |
| 707 | reg = <380000>; |
| 708 | compatible = "nvidia,tegra20-emc-table"; |
| 709 | clock-frequency = <380000>; |
| 710 | nvidia,emc-registers = <0x00000017 0x0000004b |
| 711 | 0x00000012 0x00000006 0x00000004 0x00000005 |
| 712 | 0x00000003 0x0000000c 0x00000006 0x00000006 |
| 713 | 0x00000003 0x00000001 0x00000004 0x00000005 |
| 714 | 0x00000004 0x00000009 0x0000000d 0x00000b5f |
| 715 | 0x00000000 0x00000003 0x00000003 0x00000006 |
| 716 | 0x00000006 0x00000001 0x00000011 0x000000c8 |
| 717 | 0x00000003 0x0000000e 0x00000007 0x0000000f |
| 718 | 0x00000002 0x00000000 0x00000000 0x00000002 |
| 719 | 0x00000000 0x00000000 0x00000083 0xe044048b |
| 720 | 0x007d8010 0x00000000 0x00000000 0x00000000 |
| 721 | 0x00000000 0x00000000 0x00000000 0x00000000>; |
| 722 | }; |
| 723 | }; |
| 724 | |
| 725 | usb@c5000000 { |
| 726 | status = "okay"; |
| 727 | dr_mode = "otg"; |
| 728 | }; |
| 729 | |
| 730 | usb-phy@c5000000 { |
| 731 | status = "okay"; |
| 732 | vbus-supply = <&vbus_reg>; |
| 733 | dr_mode = "otg"; |
| 734 | }; |
| 735 | |
| 736 | usb@c5004000 { |
| 737 | status = "okay"; |
| 738 | nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) |
| 739 | GPIO_ACTIVE_LOW>; |
| 740 | }; |
| 741 | |
| 742 | usb-phy@c5004000 { |
| 743 | status = "okay"; |
| 744 | nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) |
| 745 | GPIO_ACTIVE_LOW>; |
| 746 | }; |
| 747 | |
| 748 | usb@c5008000 { |
| 749 | status = "okay"; |
| 750 | }; |
| 751 | |
| 752 | usb-phy@c5008000 { |
| 753 | status = "okay"; |
| 754 | }; |
| 755 | |
| 756 | sdhci@c8000000 { |
| 757 | status = "okay"; |
| 758 | power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; |
| 759 | bus-width = <4>; |
| 760 | keep-power-in-suspend; |
| 761 | }; |
| 762 | |
| 763 | sdhci@c8000400 { |
| 764 | status = "okay"; |
| 765 | cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; |
| 766 | wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; |
| 767 | power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; |
| 768 | bus-width = <4>; |
| 769 | }; |
| 770 | |
| 771 | sdhci@c8000600 { |
| 772 | status = "okay"; |
| 773 | bus-width = <8>; |
| 774 | non-removable; |
| 775 | }; |
| 776 | |
Stephen Warren | 9615d65 | 2014-01-07 16:16:32 -0700 | [diff] [blame] | 777 | backlight: backlight { |
| 778 | compatible = "pwm-backlight"; |
| 779 | |
| 780 | enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>; |
| 781 | power-supply = <&vdd_bl_reg>; |
| 782 | pwms = <&pwm 2 5000000>; |
| 783 | |
| 784 | brightness-levels = <0 4 8 16 32 64 128 255>; |
| 785 | default-brightness-level = <6>; |
| 786 | }; |
| 787 | |
Stephen Warren | 5789905 | 2013-11-26 14:43:45 -0700 | [diff] [blame] | 788 | clocks { |
| 789 | compatible = "simple-bus"; |
| 790 | #address-cells = <1>; |
| 791 | #size-cells = <0>; |
| 792 | |
| 793 | clk32k_in: clock@0 { |
| 794 | compatible = "fixed-clock"; |
| 795 | reg=<0>; |
| 796 | #clock-cells = <0>; |
| 797 | clock-frequency = <32768>; |
| 798 | }; |
| 799 | }; |
| 800 | |
| 801 | gpio-keys { |
| 802 | compatible = "gpio-keys"; |
| 803 | |
| 804 | power { |
| 805 | label = "Power"; |
| 806 | gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; |
Laxman Dewangan | 6bccbd5 | 2013-12-02 18:39:57 +0530 | [diff] [blame] | 807 | linux,code = <KEY_POWER>; |
Stephen Warren | 5789905 | 2013-11-26 14:43:45 -0700 | [diff] [blame] | 808 | gpio-key,wakeup; |
| 809 | }; |
| 810 | |
| 811 | lid { |
| 812 | label = "Lid"; |
| 813 | gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>; |
| 814 | linux,input-type = <5>; /* EV_SW */ |
| 815 | linux,code = <0>; /* SW_LID */ |
| 816 | debounce-interval = <1>; |
| 817 | gpio-key,wakeup; |
| 818 | }; |
| 819 | }; |
| 820 | |
Stephen Warren | 9615d65 | 2014-01-07 16:16:32 -0700 | [diff] [blame] | 821 | panel: panel { |
| 822 | compatible = "chunghwa,claa101wa01a", "simple-panel"; |
| 823 | |
| 824 | power-supply = <&vdd_pnl_reg>; |
| 825 | enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>; |
| 826 | |
| 827 | backlight = <&backlight>; |
| 828 | ddc-i2c-bus = <&lvds_ddc>; |
| 829 | }; |
| 830 | |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 831 | regulators { |
| 832 | compatible = "simple-bus"; |
| 833 | #address-cells = <1>; |
| 834 | #size-cells = <0>; |
| 835 | |
| 836 | vdd_5v0_reg: regulator@0 { |
| 837 | compatible = "regulator-fixed"; |
| 838 | reg = <0>; |
| 839 | regulator-name = "vdd_5v0"; |
| 840 | regulator-min-microvolt = <5000000>; |
| 841 | regulator-max-microvolt = <5000000>; |
| 842 | regulator-always-on; |
| 843 | }; |
| 844 | |
| 845 | regulator@1 { |
| 846 | compatible = "regulator-fixed"; |
| 847 | reg = <1>; |
| 848 | regulator-name = "vdd_1v5"; |
| 849 | regulator-min-microvolt = <1500000>; |
| 850 | regulator-max-microvolt = <1500000>; |
Stephen Warren | 3325f1b | 2013-02-12 17:25:15 -0700 | [diff] [blame] | 851 | gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 852 | }; |
| 853 | |
| 854 | regulator@2 { |
| 855 | compatible = "regulator-fixed"; |
| 856 | reg = <2>; |
| 857 | regulator-name = "vdd_1v2"; |
| 858 | regulator-min-microvolt = <1200000>; |
| 859 | regulator-max-microvolt = <1200000>; |
Stephen Warren | 3325f1b | 2013-02-12 17:25:15 -0700 | [diff] [blame] | 860 | gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 861 | enable-active-high; |
| 862 | }; |
Venu Byravarasu | 4c94c8b | 2013-05-16 19:42:57 +0530 | [diff] [blame] | 863 | |
| 864 | vbus_reg: regulator@3 { |
| 865 | compatible = "regulator-fixed"; |
| 866 | reg = <3>; |
| 867 | regulator-name = "vdd_vbus_wup1"; |
| 868 | regulator-min-microvolt = <5000000>; |
| 869 | regulator-max-microvolt = <5000000>; |
Stephen Warren | 9f310de | 2013-07-01 15:07:05 -0600 | [diff] [blame] | 870 | enable-active-high; |
Stephen Warren | 23f95ef | 2013-08-01 12:26:01 -0600 | [diff] [blame] | 871 | gpio = <&gpio TEGRA_GPIO(D, 0) 0>; |
Stephen Warren | 30ca222 | 2013-08-20 14:00:13 -0600 | [diff] [blame] | 872 | regulator-always-on; |
| 873 | regulator-boot-on; |
Venu Byravarasu | 4c94c8b | 2013-05-16 19:42:57 +0530 | [diff] [blame] | 874 | }; |
Stephen Warren | 9615d65 | 2014-01-07 16:16:32 -0700 | [diff] [blame] | 875 | |
| 876 | vdd_pnl_reg: regulator@4 { |
| 877 | compatible = "regulator-fixed"; |
| 878 | reg = <4>; |
| 879 | regulator-name = "vdd_pnl"; |
| 880 | regulator-min-microvolt = <2800000>; |
| 881 | regulator-max-microvolt = <2800000>; |
| 882 | gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>; |
| 883 | enable-active-high; |
| 884 | }; |
| 885 | |
| 886 | vdd_bl_reg: regulator@5 { |
| 887 | compatible = "regulator-fixed"; |
| 888 | reg = <5>; |
| 889 | regulator-name = "vdd_bl"; |
| 890 | regulator-min-microvolt = <2800000>; |
| 891 | regulator-max-microvolt = <2800000>; |
| 892 | gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>; |
| 893 | enable-active-high; |
| 894 | }; |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 895 | }; |
| 896 | |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 897 | sound { |
| 898 | compatible = "nvidia,tegra-audio-wm8903-seaboard", |
| 899 | "nvidia,tegra-audio-wm8903"; |
| 900 | nvidia,model = "NVIDIA Tegra Seaboard"; |
| 901 | |
| 902 | nvidia,audio-routing = |
| 903 | "Headphone Jack", "HPOUTR", |
| 904 | "Headphone Jack", "HPOUTL", |
| 905 | "Int Spk", "ROP", |
| 906 | "Int Spk", "RON", |
| 907 | "Int Spk", "LOP", |
| 908 | "Int Spk", "LON", |
| 909 | "Mic Jack", "MICBIAS", |
| 910 | "IN1R", "Mic Jack"; |
| 911 | |
| 912 | nvidia,i2s-controller = <&tegra_i2s1>; |
| 913 | nvidia,audio-codec = <&wm8903>; |
| 914 | |
Stephen Warren | 3325f1b | 2013-02-12 17:25:15 -0700 | [diff] [blame] | 915 | nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; |
| 916 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>; |
Stephen Warren | f9cd2b3 | 2013-03-26 16:45:52 -0600 | [diff] [blame] | 917 | |
Hiroshi Doyu | 885a8cf | 2013-05-22 19:45:32 +0300 | [diff] [blame] | 918 | clocks = <&tegra_car TEGRA20_CLK_PLL_A>, |
| 919 | <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, |
| 920 | <&tegra_car TEGRA20_CLK_CDEV1>; |
Stephen Warren | f9cd2b3 | 2013-03-26 16:45:52 -0600 | [diff] [blame] | 921 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 922 | }; |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 923 | }; |