blob: e631636a0aa50be62b5c70b918e0c3e291c1c643 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/pci/setup-bus.c
3 *
4 * Extruded from code written by
5 * Dave Rusling (david.rusling@reo.mts.dec.com)
6 * David Mosberger (davidm@cs.arizona.edu)
7 * David Miller (davem@redhat.com)
8 *
9 * Support routines for initializing a PCI subsystem.
10 */
11
12/*
13 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
14 * PCI-PCI bridges cleanup, sorted resource allocation.
15 * Feb 2002, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
16 * Converted to allocation in 3 passes, which gives
17 * tighter packing. Prefetchable range support.
18 */
19
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/pci.h>
24#include <linux/errno.h>
25#include <linux/ioport.h>
26#include <linux/cache.h>
27#include <linux/slab.h>
Rui Wang584c5c42016-08-17 16:00:34 +080028#include <linux/acpi.h>
Chris Wright6faf17f2009-08-28 13:00:06 -070029#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
Bjorn Helgaas844393f2012-02-23 20:18:59 -070031unsigned int pci_flags;
Bjorn Helgaas47087702012-02-23 14:29:23 -070032
Yinghai Lubdc4abe2012-01-21 02:08:27 -080033struct pci_dev_resource {
34 struct list_head list;
Yinghai Lu2934a0d2012-01-21 02:08:26 -080035 struct resource *res;
36 struct pci_dev *dev;
Yinghai Lu568ddef2010-01-22 01:02:21 -080037 resource_size_t start;
38 resource_size_t end;
Ram Paic8adf9a2011-02-14 17:43:20 -080039 resource_size_t add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070040 resource_size_t min_align;
Yinghai Lu568ddef2010-01-22 01:02:21 -080041 unsigned long flags;
42};
43
Yinghai Lubffc56d2012-01-21 02:08:30 -080044static void free_list(struct list_head *head)
45{
46 struct pci_dev_resource *dev_res, *tmp;
47
48 list_for_each_entry_safe(dev_res, tmp, head, list) {
49 list_del(&dev_res->list);
50 kfree(dev_res);
51 }
52}
Ram Pai094732a2011-02-14 17:43:18 -080053
Ram Paic8adf9a2011-02-14 17:43:20 -080054/**
55 * add_to_list() - add a new resource tracker to the list
56 * @head: Head of the list
57 * @dev: device corresponding to which the resource
58 * belongs
59 * @res: The resource to be tracked
60 * @add_size: additional size to be optionally added
61 * to the resource
62 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -080063static int add_to_list(struct list_head *head,
Ram Paic8adf9a2011-02-14 17:43:20 -080064 struct pci_dev *dev, struct resource *res,
Ram Pai2bbc6942011-07-25 13:08:39 -070065 resource_size_t add_size, resource_size_t min_align)
Yinghai Lu568ddef2010-01-22 01:02:21 -080066{
Yinghai Lu764242a2012-01-21 02:08:28 -080067 struct pci_dev_resource *tmp;
Yinghai Lu568ddef2010-01-22 01:02:21 -080068
Yinghai Lubdc4abe2012-01-21 02:08:27 -080069 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
Yinghai Lu568ddef2010-01-22 01:02:21 -080070 if (!tmp) {
Ryan Desfosses3c78bc62014-04-18 20:13:49 -040071 pr_warn("add_to_list: kmalloc() failed!\n");
Yinghai Luef62dfe2012-01-21 02:08:18 -080072 return -ENOMEM;
Yinghai Lu568ddef2010-01-22 01:02:21 -080073 }
74
Yinghai Lu568ddef2010-01-22 01:02:21 -080075 tmp->res = res;
76 tmp->dev = dev;
77 tmp->start = res->start;
78 tmp->end = res->end;
79 tmp->flags = res->flags;
Ram Paic8adf9a2011-02-14 17:43:20 -080080 tmp->add_size = add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070081 tmp->min_align = min_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -080082
83 list_add(&tmp->list, head);
Yinghai Luef62dfe2012-01-21 02:08:18 -080084
85 return 0;
Yinghai Lu568ddef2010-01-22 01:02:21 -080086}
87
Yinghai Lub9b0bba2012-01-21 02:08:29 -080088static void remove_from_list(struct list_head *head,
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080089 struct resource *res)
90{
Yinghai Lub9b0bba2012-01-21 02:08:29 -080091 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080092
Yinghai Lub9b0bba2012-01-21 02:08:29 -080093 list_for_each_entry_safe(dev_res, tmp, head, list) {
94 if (dev_res->res == res) {
95 list_del(&dev_res->list);
96 kfree(dev_res);
Yinghai Lubdc4abe2012-01-21 02:08:27 -080097 break;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080098 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080099 }
100}
101
Wei Yangd74b9022015-03-25 16:23:51 +0800102static struct pci_dev_resource *res_to_dev_res(struct list_head *head,
103 struct resource *res)
Yinghai Lu1c372352012-01-21 02:08:19 -0800104{
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800105 struct pci_dev_resource *dev_res;
Yinghai Lu1c372352012-01-21 02:08:19 -0800106
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800107 list_for_each_entry(dev_res, head, list) {
108 if (dev_res->res == res) {
Yinghai Lub5924432012-01-21 02:08:31 -0800109 int idx = res - &dev_res->dev->resource[0];
110
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800111 dev_printk(KERN_DEBUG, &dev_res->dev->dev,
Wei Yangd74b9022015-03-25 16:23:51 +0800112 "res[%d]=%pR res_to_dev_res add_size %llx min_align %llx\n",
Yinghai Lub5924432012-01-21 02:08:31 -0800113 idx, dev_res->res,
Wei Yangd74b9022015-03-25 16:23:51 +0800114 (unsigned long long)dev_res->add_size,
115 (unsigned long long)dev_res->min_align);
Yinghai Lub5924432012-01-21 02:08:31 -0800116
Wei Yangd74b9022015-03-25 16:23:51 +0800117 return dev_res;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800118 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800119 }
Yinghai Lu1c372352012-01-21 02:08:19 -0800120
Wei Yangd74b9022015-03-25 16:23:51 +0800121 return NULL;
Yinghai Lu1c372352012-01-21 02:08:19 -0800122}
123
Wei Yangd74b9022015-03-25 16:23:51 +0800124static resource_size_t get_res_add_size(struct list_head *head,
125 struct resource *res)
126{
127 struct pci_dev_resource *dev_res;
128
129 dev_res = res_to_dev_res(head, res);
130 return dev_res ? dev_res->add_size : 0;
131}
132
133static resource_size_t get_res_add_align(struct list_head *head,
134 struct resource *res)
135{
136 struct pci_dev_resource *dev_res;
137
138 dev_res = res_to_dev_res(head, res);
139 return dev_res ? dev_res->min_align : 0;
140}
141
142
Yinghai Lu78c3b322012-01-21 02:08:25 -0800143/* Sort resources by alignment */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800144static void pdev_sort_resources(struct pci_dev *dev, struct list_head *head)
Yinghai Lu78c3b322012-01-21 02:08:25 -0800145{
146 int i;
147
148 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
149 struct resource *r;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800150 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800151 resource_size_t r_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800152 struct list_head *n;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800153
154 r = &dev->resource[i];
155
156 if (r->flags & IORESOURCE_PCI_FIXED)
157 continue;
158
159 if (!(r->flags) || r->parent)
160 continue;
161
162 r_align = pci_resource_alignment(dev, r);
163 if (!r_align) {
164 dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
165 i, r);
166 continue;
167 }
Yinghai Lu78c3b322012-01-21 02:08:25 -0800168
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800169 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
170 if (!tmp)
Ryan Desfosses227f0642014-04-18 20:13:50 -0400171 panic("pdev_sort_resources(): kmalloc() failed!\n");
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800172 tmp->res = r;
173 tmp->dev = dev;
174
175 /* fallback is smallest one or list is empty*/
176 n = head;
177 list_for_each_entry(dev_res, head, list) {
178 resource_size_t align;
179
180 align = pci_resource_alignment(dev_res->dev,
181 dev_res->res);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800182
183 if (r_align > align) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800184 n = &dev_res->list;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800185 break;
186 }
187 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800188 /* Insert it just before n*/
189 list_add_tail(&tmp->list, n);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800190 }
191}
192
Yinghai Lu6841ec62010-01-22 01:02:25 -0800193static void __dev_sort_resources(struct pci_dev *dev,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800194 struct list_head *head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195{
Yinghai Lu6841ec62010-01-22 01:02:25 -0800196 u16 class = dev->class >> 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197
Yinghai Lu6841ec62010-01-22 01:02:25 -0800198 /* Don't touch classless devices or host bridges or ioapics. */
199 if (class == PCI_CLASS_NOT_DEFINED || class == PCI_CLASS_BRIDGE_HOST)
200 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700201
Yinghai Lu6841ec62010-01-22 01:02:25 -0800202 /* Don't touch ioapic devices already enabled by firmware */
203 if (class == PCI_CLASS_SYSTEM_PIC) {
204 u16 command;
205 pci_read_config_word(dev, PCI_COMMAND, &command);
206 if (command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
207 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208 }
209
Yinghai Lu6841ec62010-01-22 01:02:25 -0800210 pdev_sort_resources(dev, head);
211}
212
Ram Paifc075e12011-02-14 17:43:19 -0800213static inline void reset_resource(struct resource *res)
214{
215 res->start = 0;
216 res->end = 0;
217 res->flags = 0;
218}
219
Ram Paic8adf9a2011-02-14 17:43:20 -0800220/**
Ram Pai9e8bf932011-07-25 13:08:42 -0700221 * reassign_resources_sorted() - satisfy any additional resource requests
Ram Paic8adf9a2011-02-14 17:43:20 -0800222 *
Ram Pai9e8bf932011-07-25 13:08:42 -0700223 * @realloc_head : head of the list tracking requests requiring additional
Ram Paic8adf9a2011-02-14 17:43:20 -0800224 * resources
225 * @head : head of the list tracking requests with allocated
226 * resources
227 *
Ram Pai9e8bf932011-07-25 13:08:42 -0700228 * Walk through each element of the realloc_head and try to procure
Ram Paic8adf9a2011-02-14 17:43:20 -0800229 * additional resources for the element, provided the element
230 * is in the head list.
231 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800232static void reassign_resources_sorted(struct list_head *realloc_head,
233 struct list_head *head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800234{
235 struct resource *res;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800236 struct pci_dev_resource *add_res, *tmp;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800237 struct pci_dev_resource *dev_res;
Wei Yangd74b9022015-03-25 16:23:51 +0800238 resource_size_t add_size, align;
Ram Paic8adf9a2011-02-14 17:43:20 -0800239 int idx;
240
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800241 list_for_each_entry_safe(add_res, tmp, realloc_head, list) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800242 bool found_match = false;
243
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800244 res = add_res->res;
Ram Paic8adf9a2011-02-14 17:43:20 -0800245 /* skip resource that has been reset */
246 if (!res->flags)
247 goto out;
248
249 /* skip this resource if not found in head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800250 list_for_each_entry(dev_res, head, list) {
251 if (dev_res->res == res) {
252 found_match = true;
253 break;
254 }
Ram Paic8adf9a2011-02-14 17:43:20 -0800255 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800256 if (!found_match)/* just skip */
257 continue;
Ram Paic8adf9a2011-02-14 17:43:20 -0800258
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800259 idx = res - &add_res->dev->resource[0];
260 add_size = add_res->add_size;
Wei Yangd74b9022015-03-25 16:23:51 +0800261 align = add_res->min_align;
Ram Pai2bbc6942011-07-25 13:08:39 -0700262 if (!resource_size(res)) {
Wei Yangd74b9022015-03-25 16:23:51 +0800263 res->start = align;
Ram Pai2bbc6942011-07-25 13:08:39 -0700264 res->end = res->start + add_size - 1;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800265 if (pci_assign_resource(add_res->dev, idx))
Ram Paic8adf9a2011-02-14 17:43:20 -0800266 reset_resource(res);
Ram Pai2bbc6942011-07-25 13:08:39 -0700267 } else {
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800268 res->flags |= add_res->flags &
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800269 (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800270 if (pci_reassign_resource(add_res->dev, idx,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800271 add_size, align))
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800272 dev_printk(KERN_DEBUG, &add_res->dev->dev,
Yinghai Lub5924432012-01-21 02:08:31 -0800273 "failed to add %llx res[%d]=%pR\n",
274 (unsigned long long)add_size,
275 idx, res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800276 }
277out:
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800278 list_del(&add_res->list);
279 kfree(add_res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800280 }
281}
282
283/**
284 * assign_requested_resources_sorted() - satisfy resource requests
285 *
286 * @head : head of the list tracking requests for resources
Wanpeng Li8356aad2012-06-15 21:15:49 +0800287 * @fail_head : head of the list tracking requests that could
Ram Paic8adf9a2011-02-14 17:43:20 -0800288 * not be allocated
289 *
290 * Satisfy resource requests of each element in the list. Add
291 * requests that could not satisfied to the failed_list.
292 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800293static void assign_requested_resources_sorted(struct list_head *head,
294 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800295{
296 struct resource *res;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800297 struct pci_dev_resource *dev_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -0800298 int idx;
299
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800300 list_for_each_entry(dev_res, head, list) {
301 res = dev_res->res;
302 idx = res - &dev_res->dev->resource[0];
303 if (resource_size(res) &&
304 pci_assign_resource(dev_res->dev, idx)) {
Yinghai Lua3cb9992013-01-21 13:20:43 -0800305 if (fail_head) {
Yinghai Lu9a928662010-02-28 15:49:39 -0800306 /*
307 * if the failed res is for ROM BAR, and it will
308 * be enabled later, don't add it to the list
309 */
310 if (!((idx == PCI_ROM_RESOURCE) &&
311 (!(res->flags & IORESOURCE_ROM_ENABLE))))
Yinghai Lu67cc7e22012-01-21 02:08:32 -0800312 add_to_list(fail_head,
313 dev_res->dev, res,
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700314 0 /* don't care */,
315 0 /* don't care */);
Yinghai Lu9a928662010-02-28 15:49:39 -0800316 }
Ram Paifc075e12011-02-14 17:43:19 -0800317 reset_resource(res);
Rajesh Shah542df5d2005-04-28 00:25:50 -0700318 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319 }
320}
321
Yinghai Luaa914f52013-07-25 06:31:38 -0700322static unsigned long pci_fail_res_type_mask(struct list_head *fail_head)
323{
324 struct pci_dev_resource *fail_res;
325 unsigned long mask = 0;
326
327 /* check failed type */
328 list_for_each_entry(fail_res, fail_head, list)
329 mask |= fail_res->flags;
330
331 /*
332 * one pref failed resource will set IORESOURCE_MEM,
333 * as we can allocate pref in non-pref range.
334 * Will release all assigned non-pref sibling resources
335 * according to that bit.
336 */
337 return mask & (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH);
338}
339
340static bool pci_need_to_release(unsigned long mask, struct resource *res)
341{
342 if (res->flags & IORESOURCE_IO)
343 return !!(mask & IORESOURCE_IO);
344
345 /* check pref at first */
346 if (res->flags & IORESOURCE_PREFETCH) {
347 if (mask & IORESOURCE_PREFETCH)
348 return true;
349 /* count pref if its parent is non-pref */
350 else if ((mask & IORESOURCE_MEM) &&
351 !(res->parent->flags & IORESOURCE_PREFETCH))
352 return true;
353 else
354 return false;
355 }
356
357 if (res->flags & IORESOURCE_MEM)
358 return !!(mask & IORESOURCE_MEM);
359
360 return false; /* should not get here */
361}
362
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800363static void __assign_resources_sorted(struct list_head *head,
364 struct list_head *realloc_head,
365 struct list_head *fail_head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800366{
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800367 /*
368 * Should not assign requested resources at first.
369 * they could be adjacent, so later reassign can not reallocate
370 * them one by one in parent resource window.
Masanari Iida367fa982012-07-23 22:39:51 +0900371 * Try to assign requested + add_size at beginning
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800372 * if could do that, could get out early.
373 * if could not do that, we still try to assign requested at first,
374 * then try to reassign add_size for some resources.
Yinghai Luaa914f52013-07-25 06:31:38 -0700375 *
376 * Separate three resource type checking if we need to release
377 * assigned resource after requested + add_size try.
378 * 1. if there is io port assign fail, will release assigned
379 * io port.
380 * 2. if there is pref mmio assign fail, release assigned
381 * pref mmio.
382 * if assigned pref mmio's parent is non-pref mmio and there
383 * is non-pref mmio assign fail, will release that assigned
384 * pref mmio.
385 * 3. if there is non-pref mmio assign fail or pref mmio
386 * assigned fail, will release assigned non-pref mmio.
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800387 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800388 LIST_HEAD(save_head);
389 LIST_HEAD(local_fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800390 struct pci_dev_resource *save_res;
Wei Yangd74b9022015-03-25 16:23:51 +0800391 struct pci_dev_resource *dev_res, *tmp_res, *dev_res2;
Yinghai Luaa914f52013-07-25 06:31:38 -0700392 unsigned long fail_type;
Wei Yangd74b9022015-03-25 16:23:51 +0800393 resource_size_t add_align, align;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800394
395 /* Check if optional add_size is there */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800396 if (!realloc_head || list_empty(realloc_head))
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800397 goto requested_and_reassign;
398
399 /* Save original start, end, flags etc at first */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800400 list_for_each_entry(dev_res, head, list) {
401 if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) {
Yinghai Lubffc56d2012-01-21 02:08:30 -0800402 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800403 goto requested_and_reassign;
404 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800405 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800406
407 /* Update res in head list with add_size in realloc_head list */
Wei Yangd74b9022015-03-25 16:23:51 +0800408 list_for_each_entry_safe(dev_res, tmp_res, head, list) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800409 dev_res->res->end += get_res_add_size(realloc_head,
410 dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800411
Wei Yangd74b9022015-03-25 16:23:51 +0800412 /*
413 * There are two kinds of additional resources in the list:
414 * 1. bridge resource -- IORESOURCE_STARTALIGN
415 * 2. SR-IOV resource -- IORESOURCE_SIZEALIGN
416 * Here just fix the additional alignment for bridge
417 */
418 if (!(dev_res->res->flags & IORESOURCE_STARTALIGN))
419 continue;
420
421 add_align = get_res_add_align(realloc_head, dev_res->res);
422
423 /*
424 * The "head" list is sorted by the alignment to make sure
425 * resources with bigger alignment will be assigned first.
426 * After we change the alignment of a dev_res in "head" list,
427 * we need to reorder the list by alignment to make it
428 * consistent.
429 */
430 if (add_align > dev_res->res->start) {
Yinghai Lu552bc942015-05-28 22:40:00 -0700431 resource_size_t r_size = resource_size(dev_res->res);
432
Wei Yangd74b9022015-03-25 16:23:51 +0800433 dev_res->res->start = add_align;
Yinghai Lu552bc942015-05-28 22:40:00 -0700434 dev_res->res->end = add_align + r_size - 1;
Wei Yangd74b9022015-03-25 16:23:51 +0800435
436 list_for_each_entry(dev_res2, head, list) {
437 align = pci_resource_alignment(dev_res2->dev,
438 dev_res2->res);
Wei Yanga6b65982015-05-19 14:24:17 +0800439 if (add_align > align) {
Wei Yangd74b9022015-03-25 16:23:51 +0800440 list_move_tail(&dev_res->list,
441 &dev_res2->list);
Wei Yanga6b65982015-05-19 14:24:17 +0800442 break;
443 }
Wei Yangd74b9022015-03-25 16:23:51 +0800444 }
Bogicevic Sasaff3ce482015-12-27 13:21:11 -0800445 }
Wei Yangd74b9022015-03-25 16:23:51 +0800446
447 }
448
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800449 /* Try updated head list with add_size added */
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800450 assign_requested_resources_sorted(head, &local_fail_head);
451
452 /* all assigned with add_size ? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800453 if (list_empty(&local_fail_head)) {
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800454 /* Remove head list from realloc_head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800455 list_for_each_entry(dev_res, head, list)
456 remove_from_list(realloc_head, dev_res->res);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800457 free_list(&save_head);
458 free_list(head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800459 return;
460 }
461
Yinghai Luaa914f52013-07-25 06:31:38 -0700462 /* check failed type */
463 fail_type = pci_fail_res_type_mask(&local_fail_head);
464 /* remove not need to be released assigned res from head list etc */
465 list_for_each_entry_safe(dev_res, tmp_res, head, list)
466 if (dev_res->res->parent &&
467 !pci_need_to_release(fail_type, dev_res->res)) {
468 /* remove it from realloc_head list */
469 remove_from_list(realloc_head, dev_res->res);
470 remove_from_list(&save_head, dev_res->res);
471 list_del(&dev_res->list);
472 kfree(dev_res);
473 }
474
Yinghai Lubffc56d2012-01-21 02:08:30 -0800475 free_list(&local_fail_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800476 /* Release assigned resource */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800477 list_for_each_entry(dev_res, head, list)
478 if (dev_res->res->parent)
479 release_resource(dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800480 /* Restore start/end/flags from saved list */
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800481 list_for_each_entry(save_res, &save_head, list) {
482 struct resource *res = save_res->res;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800483
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800484 res->start = save_res->start;
485 res->end = save_res->end;
486 res->flags = save_res->flags;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800487 }
Yinghai Lubffc56d2012-01-21 02:08:30 -0800488 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800489
490requested_and_reassign:
Ram Paic8adf9a2011-02-14 17:43:20 -0800491 /* Satisfy the must-have resource requests */
492 assign_requested_resources_sorted(head, fail_head);
493
Ram Pai0a2daa12011-07-25 13:08:41 -0700494 /* Try to satisfy any additional optional resource
Ram Paic8adf9a2011-02-14 17:43:20 -0800495 requests */
Ram Pai9e8bf932011-07-25 13:08:42 -0700496 if (realloc_head)
497 reassign_resources_sorted(realloc_head, head);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800498 free_list(head);
Ram Paic8adf9a2011-02-14 17:43:20 -0800499}
500
Yinghai Lu6841ec62010-01-22 01:02:25 -0800501static void pdev_assign_resources_sorted(struct pci_dev *dev,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800502 struct list_head *add_head,
503 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800504{
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800505 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800506
Yinghai Lu6841ec62010-01-22 01:02:25 -0800507 __dev_sort_resources(dev, &head);
Yinghai Lu8424d752012-01-21 02:08:21 -0800508 __assign_resources_sorted(&head, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800509
510}
511
512static void pbus_assign_resources_sorted(const struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800513 struct list_head *realloc_head,
514 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800515{
516 struct pci_dev *dev;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800517 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800518
Yinghai Lu6841ec62010-01-22 01:02:25 -0800519 list_for_each_entry(dev, &bus->devices, bus_list)
520 __dev_sort_resources(dev, &head);
521
Ram Pai9e8bf932011-07-25 13:08:42 -0700522 __assign_resources_sorted(&head, realloc_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800523}
524
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700525void pci_setup_cardbus(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700526{
527 struct pci_dev *bridge = bus->self;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600528 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529 struct pci_bus_region region;
530
Yinghai Lub918c622012-05-17 18:51:11 -0700531 dev_info(&bridge->dev, "CardBus bridge to %pR\n",
532 &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700533
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600534 res = bus->resource[0];
Yinghai Lufc279852013-12-09 22:54:40 -0800535 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600536 if (res->flags & IORESOURCE_IO) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537 /*
538 * The IO resource is allocated a range twice as large as it
539 * would normally need. This allows us to set both IO regs.
540 */
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600541 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700542 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
543 region.start);
544 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
545 region.end);
546 }
547
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600548 res = bus->resource[1];
Yinghai Lufc279852013-12-09 22:54:40 -0800549 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600550 if (res->flags & IORESOURCE_IO) {
551 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
553 region.start);
554 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
555 region.end);
556 }
557
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600558 res = bus->resource[2];
Yinghai Lufc279852013-12-09 22:54:40 -0800559 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600560 if (res->flags & IORESOURCE_MEM) {
561 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
563 region.start);
564 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
565 region.end);
566 }
567
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600568 res = bus->resource[3];
Yinghai Lufc279852013-12-09 22:54:40 -0800569 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600570 if (res->flags & IORESOURCE_MEM) {
571 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
573 region.start);
574 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
575 region.end);
576 }
577}
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700578EXPORT_SYMBOL(pci_setup_cardbus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579
580/* Initialize bridges with base/limit values we have collected.
581 PCI-to-PCI Bridge Architecture Specification rev. 1.1 (1998)
582 requires that if there is no I/O ports or memory behind the
583 bridge, corresponding range must be turned off by writing base
584 value greater than limit to the bridge's base/limit registers.
585
586 Note: care must be taken when updating I/O base/limit registers
587 of bridges which support 32-bit I/O. This update requires two
588 config space writes, so it's quite possible that an I/O window of
589 the bridge will have some undesirable address (e.g. 0) after the
590 first write. Ditto 64-bit prefetchable MMIO. */
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600591static void pci_setup_bridge_io(struct pci_dev *bridge)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700592{
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600593 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700594 struct pci_bus_region region;
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600595 unsigned long io_mask;
596 u8 io_base_lo, io_limit_lo;
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700597 u16 l;
598 u32 io_upper16;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700599
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600600 io_mask = PCI_IO_RANGE_MASK;
601 if (bridge->io_window_1k)
602 io_mask = PCI_IO_1K_RANGE_MASK;
603
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604 /* Set up the top and bottom of the PCI I/O segment for this bus. */
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600605 res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];
Yinghai Lufc279852013-12-09 22:54:40 -0800606 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600607 if (res->flags & IORESOURCE_IO) {
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700608 pci_read_config_word(bridge, PCI_IO_BASE, &l);
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600609 io_base_lo = (region.start >> 8) & io_mask;
610 io_limit_lo = (region.end >> 8) & io_mask;
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700611 l = ((u16) io_limit_lo << 8) | io_base_lo;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700612 /* Set up upper 16 bits of I/O base/limit. */
613 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600614 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800615 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616 /* Clear upper 16 bits of I/O base/limit. */
617 io_upper16 = 0;
618 l = 0x00f0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700619 }
620 /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
621 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
622 /* Update lower 16 bits of I/O base/limit. */
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700623 pci_write_config_word(bridge, PCI_IO_BASE, l);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624 /* Update upper 16 bits of I/O base/limit. */
625 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800626}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700627
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600628static void pci_setup_bridge_mmio(struct pci_dev *bridge)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800629{
Yinghai Lu7cc59972009-12-22 15:02:21 -0800630 struct resource *res;
631 struct pci_bus_region region;
632 u32 l;
633
634 /* Set up the top and bottom of the PCI Memory segment for this bus. */
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600635 res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];
Yinghai Lufc279852013-12-09 22:54:40 -0800636 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600637 if (res->flags & IORESOURCE_MEM) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700638 l = (region.start >> 16) & 0xfff0;
639 l |= region.end & 0xfff00000;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600640 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800641 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700642 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700643 }
644 pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800645}
646
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600647static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800648{
Yinghai Lu7cc59972009-12-22 15:02:21 -0800649 struct resource *res;
650 struct pci_bus_region region;
651 u32 l, bu, lu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652
653 /* Clear out the upper 32 bits of PREF limit.
654 If PCI_PREF_BASE_UPPER32 was non-zero, this temporarily
655 disables PREF range, which is ok. */
656 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);
657
658 /* Set up PREF base/limit. */
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100659 bu = lu = 0;
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600660 res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];
Yinghai Lufc279852013-12-09 22:54:40 -0800661 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600662 if (res->flags & IORESOURCE_PREFETCH) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700663 l = (region.start >> 16) & 0xfff0;
664 l |= region.end & 0xfff00000;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600665 if (res->flags & IORESOURCE_MEM_64) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700666 bu = upper_32_bits(region.start);
667 lu = upper_32_bits(region.end);
Yinghai Lu1f82de12009-04-23 20:48:32 -0700668 }
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600669 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800670 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700671 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672 }
673 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
674
Alex Williamson59353ea2009-11-30 14:51:44 -0700675 /* Set the upper 32 bits of PREF base & limit. */
676 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
677 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800678}
679
680static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type)
681{
682 struct pci_dev *bridge = bus->self;
683
Yinghai Lub918c622012-05-17 18:51:11 -0700684 dev_info(&bridge->dev, "PCI bridge to %pR\n",
685 &bus->busn_res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800686
687 if (type & IORESOURCE_IO)
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600688 pci_setup_bridge_io(bridge);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800689
690 if (type & IORESOURCE_MEM)
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600691 pci_setup_bridge_mmio(bridge);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800692
693 if (type & IORESOURCE_PREFETCH)
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600694 pci_setup_bridge_mmio_pref(bridge);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700695
696 pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);
697}
698
Gavin Shand366d282016-05-20 16:41:25 +1000699void __weak pcibios_setup_bridge(struct pci_bus *bus, unsigned long type)
700{
701}
702
Benjamin Herrenschmidte2444272011-09-11 14:08:38 -0300703void pci_setup_bridge(struct pci_bus *bus)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800704{
705 unsigned long type = IORESOURCE_IO | IORESOURCE_MEM |
706 IORESOURCE_PREFETCH;
707
Gavin Shand366d282016-05-20 16:41:25 +1000708 pcibios_setup_bridge(bus, type);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800709 __pci_setup_bridge(bus, type);
710}
711
Yinghai Lu8505e722015-01-15 16:21:49 -0600712
713int pci_claim_bridge_resource(struct pci_dev *bridge, int i)
714{
715 if (i < PCI_BRIDGE_RESOURCES || i > PCI_BRIDGE_RESOURCE_END)
716 return 0;
717
718 if (pci_claim_resource(bridge, i) == 0)
719 return 0; /* claimed the window */
720
721 if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI)
722 return 0;
723
724 if (!pci_bus_clip_resource(bridge, i))
725 return -EINVAL; /* clipping didn't change anything */
726
727 switch (i - PCI_BRIDGE_RESOURCES) {
728 case 0:
729 pci_setup_bridge_io(bridge);
730 break;
731 case 1:
732 pci_setup_bridge_mmio(bridge);
733 break;
734 case 2:
735 pci_setup_bridge_mmio_pref(bridge);
736 break;
737 default:
738 return -EINVAL;
739 }
740
741 if (pci_claim_resource(bridge, i) == 0)
742 return 0; /* claimed a smaller window */
743
744 return -EINVAL;
745}
746
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747/* Check whether the bridge supports optional I/O and
748 prefetchable memory ranges. If not, the respective
749 base/limit registers must be read-only and read as 0. */
Sam Ravnborg96bde062007-03-26 21:53:30 -0800750static void pci_bridge_check_ranges(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700751{
752 u16 io;
753 u32 pmem;
754 struct pci_dev *bridge = bus->self;
755 struct resource *b_res;
756
757 b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
758 b_res[1].flags |= IORESOURCE_MEM;
759
760 pci_read_config_word(bridge, PCI_IO_BASE, &io);
761 if (!io) {
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700762 pci_write_config_word(bridge, PCI_IO_BASE, 0xe0f0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700763 pci_read_config_word(bridge, PCI_IO_BASE, &io);
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700764 pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
765 }
766 if (io)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700767 b_res[0].flags |= IORESOURCE_IO;
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700768
Linus Torvalds1da177e2005-04-16 15:20:36 -0700769 /* DECchip 21050 pass 2 errata: the bridge may miss an address
770 disconnect boundary by one PCI data phase.
771 Workaround: do not use prefetching on this device. */
772 if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001)
773 return;
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700774
Linus Torvalds1da177e2005-04-16 15:20:36 -0700775 pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
776 if (!pmem) {
777 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE,
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700778 0xffe0fff0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779 pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
780 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, 0x0);
781 }
Yinghai Lu1f82de12009-04-23 20:48:32 -0700782 if (pmem) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700783 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
Yinghai Lu99586102010-01-22 01:02:28 -0800784 if ((pmem & PCI_PREF_RANGE_TYPE_MASK) ==
785 PCI_PREF_RANGE_TYPE_64) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700786 b_res[2].flags |= IORESOURCE_MEM_64;
Yinghai Lu99586102010-01-22 01:02:28 -0800787 b_res[2].flags |= PCI_PREF_RANGE_TYPE_64;
788 }
Yinghai Lu1f82de12009-04-23 20:48:32 -0700789 }
790
791 /* double check if bridge does support 64 bit pref */
792 if (b_res[2].flags & IORESOURCE_MEM_64) {
793 u32 mem_base_hi, tmp;
794 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32,
795 &mem_base_hi);
796 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
797 0xffffffff);
798 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp);
799 if (!tmp)
800 b_res[2].flags &= ~IORESOURCE_MEM_64;
801 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
802 mem_base_hi);
803 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700804}
805
806/* Helper function for sizing routines: find first available
807 bus resource of a given type. Note: we intentionally skip
808 the bus resources which have already been assigned (that is,
809 have non-NULL parent resource). */
Yinghai Lu5b285412014-05-19 17:01:55 -0600810static struct resource *find_free_bus_resource(struct pci_bus *bus,
811 unsigned long type_mask, unsigned long type)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812{
813 int i;
814 struct resource *r;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700815
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -0700816 pci_bus_for_each_resource(bus, r, i) {
Ivan Kokshaysky299de032005-06-15 18:59:27 +0400817 if (r == &ioport_resource || r == &iomem_resource)
818 continue;
Jesse Barnes55a10982009-10-27 09:39:18 -0700819 if (r && (r->flags & type_mask) == type && !r->parent)
820 return r;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700821 }
822 return NULL;
823}
824
Ram Pai13583b12011-02-14 17:43:17 -0800825static resource_size_t calculate_iosize(resource_size_t size,
826 resource_size_t min_size,
827 resource_size_t size1,
828 resource_size_t old_size,
829 resource_size_t align)
830{
831 if (size < min_size)
832 size = min_size;
Ryan Desfosses3c78bc62014-04-18 20:13:49 -0400833 if (old_size == 1)
Ram Pai13583b12011-02-14 17:43:17 -0800834 old_size = 0;
835 /* To be fixed in 2.5: we should have sort of HAVE_ISA
836 flag in the struct pci_bus. */
837#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
838 size = (size & 0xff) + ((size & ~0xffUL) << 2);
839#endif
840 size = ALIGN(size + size1, align);
841 if (size < old_size)
842 size = old_size;
843 return size;
844}
845
846static resource_size_t calculate_memsize(resource_size_t size,
847 resource_size_t min_size,
848 resource_size_t size1,
849 resource_size_t old_size,
850 resource_size_t align)
851{
852 if (size < min_size)
853 size = min_size;
Ryan Desfosses3c78bc62014-04-18 20:13:49 -0400854 if (old_size == 1)
Ram Pai13583b12011-02-14 17:43:17 -0800855 old_size = 0;
856 if (size < old_size)
857 size = old_size;
858 size = ALIGN(size + size1, align);
859 return size;
860}
861
Gavin Shanac5ad932012-09-11 16:59:45 -0600862resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus,
863 unsigned long type)
864{
865 return 1;
866}
867
868#define PCI_P2P_DEFAULT_MEM_ALIGN 0x100000 /* 1MiB */
869#define PCI_P2P_DEFAULT_IO_ALIGN 0x1000 /* 4KiB */
870#define PCI_P2P_DEFAULT_IO_ALIGN_1K 0x400 /* 1KiB */
871
872static resource_size_t window_alignment(struct pci_bus *bus,
873 unsigned long type)
874{
875 resource_size_t align = 1, arch_align;
876
877 if (type & IORESOURCE_MEM)
878 align = PCI_P2P_DEFAULT_MEM_ALIGN;
879 else if (type & IORESOURCE_IO) {
880 /*
881 * Per spec, I/O windows are 4K-aligned, but some
882 * bridges have an extension to support 1K alignment.
883 */
884 if (bus->self->io_window_1k)
885 align = PCI_P2P_DEFAULT_IO_ALIGN_1K;
886 else
887 align = PCI_P2P_DEFAULT_IO_ALIGN;
888 }
889
890 arch_align = pcibios_window_alignment(bus, type);
891 return max(align, arch_align);
892}
893
Ram Paic8adf9a2011-02-14 17:43:20 -0800894/**
895 * pbus_size_io() - size the io window of a given bus
896 *
897 * @bus : the bus
898 * @min_size : the minimum io window that must to be allocated
899 * @add_size : additional optional io window
Ram Pai9e8bf932011-07-25 13:08:42 -0700900 * @realloc_head : track the additional io window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -0800901 *
902 * Sizing the IO windows of the PCI-PCI bridge is trivial,
Yinghai Lufd591342012-07-09 19:55:29 -0600903 * since these windows have 1K or 4K granularity and the IO ranges
Ram Paic8adf9a2011-02-14 17:43:20 -0800904 * of non-bridge PCI devices are limited to 256 bytes.
905 * We must be careful with the ISA aliasing though.
906 */
907static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800908 resource_size_t add_size, struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700909{
910 struct pci_dev *dev;
Yinghai Lu5b285412014-05-19 17:01:55 -0600911 struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO,
912 IORESOURCE_IO);
Wei Yang11251a82013-08-02 17:31:05 +0800913 resource_size_t size = 0, size0 = 0, size1 = 0;
Yinghai Lube768912011-07-25 13:08:38 -0700914 resource_size_t children_add_size = 0;
Bjorn Helgaas2d1d6672013-08-05 16:15:10 -0600915 resource_size_t min_align, align;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700916
917 if (!b_res)
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700918 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700919
Bjorn Helgaas2d1d6672013-08-05 16:15:10 -0600920 min_align = window_alignment(bus, IORESOURCE_IO);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700921 list_for_each_entry(dev, &bus->devices, bus_list) {
922 int i;
923
924 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
925 struct resource *r = &dev->resource[i];
926 unsigned long r_size;
927
928 if (r->parent || !(r->flags & IORESOURCE_IO))
929 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +0800930 r_size = resource_size(r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700931
932 if (r_size < 0x400)
933 /* Might be re-aligned for ISA */
934 size += r_size;
935 else
936 size1 += r_size;
Yinghai Lube768912011-07-25 13:08:38 -0700937
Yinghai Lufd591342012-07-09 19:55:29 -0600938 align = pci_resource_alignment(dev, r);
939 if (align > min_align)
940 min_align = align;
941
Ram Pai9e8bf932011-07-25 13:08:42 -0700942 if (realloc_head)
943 children_add_size += get_res_add_size(realloc_head, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944 }
945 }
Yinghai Lufd591342012-07-09 19:55:29 -0600946
Ram Paic8adf9a2011-02-14 17:43:20 -0800947 size0 = calculate_iosize(size, min_size, size1,
Yinghai Lufd591342012-07-09 19:55:29 -0600948 resource_size(b_res), min_align);
Yinghai Lube768912011-07-25 13:08:38 -0700949 if (children_add_size > add_size)
950 add_size = children_add_size;
Ram Pai9e8bf932011-07-25 13:08:42 -0700951 size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
Yinghai Lua4ac9fe2012-01-21 02:08:17 -0800952 calculate_iosize(size, min_size, add_size + size1,
Yinghai Lufd591342012-07-09 19:55:29 -0600953 resource_size(b_res), min_align);
Ram Paic8adf9a2011-02-14 17:43:20 -0800954 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700955 if (b_res->start || b_res->end)
Ryan Desfosses227f0642014-04-18 20:13:50 -0400956 dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n",
957 b_res, &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700958 b_res->flags = 0;
959 return;
960 }
Yinghai Lufd591342012-07-09 19:55:29 -0600961
962 b_res->start = min_align;
Ram Paic8adf9a2011-02-14 17:43:20 -0800963 b_res->end = b_res->start + size0 - 1;
Ivan Kokshaysky88452562008-03-30 19:50:14 +0400964 b_res->flags |= IORESOURCE_STARTALIGN;
Yinghai Lub5924432012-01-21 02:08:31 -0800965 if (size1 > size0 && realloc_head) {
Yinghai Lufd591342012-07-09 19:55:29 -0600966 add_to_list(realloc_head, bus->self, b_res, size1-size0,
967 min_align);
Ryan Desfosses227f0642014-04-18 20:13:50 -0400968 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window %pR to %pR add_size %llx\n",
969 b_res, &bus->busn_res,
970 (unsigned long long)size1-size0);
Yinghai Lub5924432012-01-21 02:08:31 -0800971 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972}
973
Gavin Shanc1215042012-09-11 16:59:46 -0600974static inline resource_size_t calculate_mem_align(resource_size_t *aligns,
975 int max_order)
976{
977 resource_size_t align = 0;
978 resource_size_t min_align = 0;
979 int order;
980
981 for (order = 0; order <= max_order; order++) {
982 resource_size_t align1 = 1;
983
984 align1 <<= (order + 20);
985
986 if (!align)
987 min_align = align1;
988 else if (ALIGN(align + min_align, min_align) < align1)
989 min_align = align1 >> 1;
990 align += aligns[order];
991 }
992
993 return min_align;
994}
995
Ram Paic8adf9a2011-02-14 17:43:20 -0800996/**
997 * pbus_size_mem() - size the memory window of a given bus
998 *
999 * @bus : the bus
Wei Yang496f70c2013-08-02 17:31:04 +08001000 * @mask: mask the resource flag, then compare it with type
1001 * @type: the type of free resource from bridge
Yinghai Lu5b285412014-05-19 17:01:55 -06001002 * @type2: second match type
1003 * @type3: third match type
Ram Paic8adf9a2011-02-14 17:43:20 -08001004 * @min_size : the minimum memory window that must to be allocated
1005 * @add_size : additional optional memory window
Ram Pai9e8bf932011-07-25 13:08:42 -07001006 * @realloc_head : track the additional memory window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -08001007 *
1008 * Calculate the size of the bus and minimal alignment which
1009 * guarantees that all child resources fit in this size.
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001010 *
1011 * Returns -ENOSPC if there's no available bus resource of the desired type.
1012 * Otherwise, sets the bus resource start/end to indicate the required
1013 * size, adds things to realloc_head (if supplied), and returns 0.
Ram Paic8adf9a2011-02-14 17:43:20 -08001014 */
Eric W. Biederman28760482009-09-09 14:09:24 -07001015static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
Yinghai Lu5b285412014-05-19 17:01:55 -06001016 unsigned long type, unsigned long type2,
1017 unsigned long type3,
1018 resource_size_t min_size, resource_size_t add_size,
1019 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001020{
1021 struct pci_dev *dev;
Ram Paic8adf9a2011-02-14 17:43:20 -08001022 resource_size_t min_align, align, size, size0, size1;
Yinghai Lu096d4222014-07-03 13:46:17 -07001023 resource_size_t aligns[18]; /* Alignments from 1Mb to 128Gb */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001024 int order, max_order;
Yinghai Lu5b285412014-05-19 17:01:55 -06001025 struct resource *b_res = find_free_bus_resource(bus,
1026 mask | IORESOURCE_PREFETCH, type);
Yinghai Lube768912011-07-25 13:08:38 -07001027 resource_size_t children_add_size = 0;
Wei Yangd74b9022015-03-25 16:23:51 +08001028 resource_size_t children_add_align = 0;
1029 resource_size_t add_align = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001030
1031 if (!b_res)
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001032 return -ENOSPC;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001033
1034 memset(aligns, 0, sizeof(aligns));
1035 max_order = 0;
1036 size = 0;
1037
1038 list_for_each_entry(dev, &bus->devices, bus_list) {
1039 int i;
Yinghai Lu1f82de12009-04-23 20:48:32 -07001040
Linus Torvalds1da177e2005-04-16 15:20:36 -07001041 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
1042 struct resource *r = &dev->resource[i];
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +11001043 resource_size_t r_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001044
David Daneya2220d82015-10-29 17:35:39 -05001045 if (r->parent || (r->flags & IORESOURCE_PCI_FIXED) ||
1046 ((r->flags & mask) != type &&
1047 (r->flags & mask) != type2 &&
1048 (r->flags & mask) != type3))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001049 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +08001050 r_size = resource_size(r);
Yinghai Lu2aceefc2011-07-25 13:08:40 -07001051#ifdef CONFIG_PCI_IOV
1052 /* put SRIOV requested res to the optional list */
Ram Pai9e8bf932011-07-25 13:08:42 -07001053 if (realloc_head && i >= PCI_IOV_RESOURCES &&
Yinghai Lu2aceefc2011-07-25 13:08:40 -07001054 i <= PCI_IOV_RESOURCE_END) {
Wei Yangd74b9022015-03-25 16:23:51 +08001055 add_align = max(pci_resource_alignment(dev, r), add_align);
Yinghai Lu2aceefc2011-07-25 13:08:40 -07001056 r->end = r->start - 1;
Bjorn Helgaasf7625982013-11-14 11:28:18 -07001057 add_to_list(realloc_head, dev, r, r_size, 0/* don't care */);
Yinghai Lu2aceefc2011-07-25 13:08:40 -07001058 children_add_size += r_size;
1059 continue;
1060 }
1061#endif
Alan14c85302014-05-19 14:03:14 +01001062 /*
1063 * aligns[0] is for 1MB (since bridge memory
1064 * windows are always at least 1MB aligned), so
1065 * keep "order" from being negative for smaller
1066 * resources.
1067 */
Chris Wright6faf17f2009-08-28 13:00:06 -07001068 align = pci_resource_alignment(dev, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001069 order = __ffs(align) - 20;
Alan14c85302014-05-19 14:03:14 +01001070 if (order < 0)
1071 order = 0;
1072 if (order >= ARRAY_SIZE(aligns)) {
Ryan Desfosses227f0642014-04-18 20:13:50 -04001073 dev_warn(&dev->dev, "disabling BAR %d: %pR (bad alignment %#llx)\n",
1074 i, r, (unsigned long long) align);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001075 r->flags = 0;
1076 continue;
1077 }
1078 size += r_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001079 /* Exclude ranges with size > align from
1080 calculation of the alignment. */
1081 if (r_size == align)
1082 aligns[order] += align;
1083 if (order > max_order)
1084 max_order = order;
Yinghai Lube768912011-07-25 13:08:38 -07001085
Wei Yangd74b9022015-03-25 16:23:51 +08001086 if (realloc_head) {
Ram Pai9e8bf932011-07-25 13:08:42 -07001087 children_add_size += get_res_add_size(realloc_head, r);
Wei Yangd74b9022015-03-25 16:23:51 +08001088 children_add_align = get_res_add_align(realloc_head, r);
1089 add_align = max(add_align, children_add_align);
1090 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001091 }
1092 }
Jeremy Fitzhardinge8308c542008-09-11 01:31:50 -07001093
Gavin Shanc1215042012-09-11 16:59:46 -06001094 min_align = calculate_mem_align(aligns, max_order);
Wei Yang3ad94b02013-09-06 09:45:58 +08001095 min_align = max(min_align, window_alignment(bus, b_res->flags));
Linus Torvaldsb42282e2011-04-11 10:53:11 -07001096 size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align);
Wei Yangd74b9022015-03-25 16:23:51 +08001097 add_align = max(min_align, add_align);
Yinghai Lube768912011-07-25 13:08:38 -07001098 if (children_add_size > add_size)
1099 add_size = children_add_size;
Ram Pai9e8bf932011-07-25 13:08:42 -07001100 size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
Yinghai Lua4ac9fe2012-01-21 02:08:17 -08001101 calculate_memsize(size, min_size, add_size,
Wei Yangd74b9022015-03-25 16:23:51 +08001102 resource_size(b_res), add_align);
Ram Paic8adf9a2011-02-14 17:43:20 -08001103 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -07001104 if (b_res->start || b_res->end)
Ryan Desfosses227f0642014-04-18 20:13:50 -04001105 dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n",
1106 b_res, &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001107 b_res->flags = 0;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001108 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001109 }
1110 b_res->start = min_align;
Ram Paic8adf9a2011-02-14 17:43:20 -08001111 b_res->end = size0 + min_align - 1;
Yinghai Lu5b285412014-05-19 17:01:55 -06001112 b_res->flags |= IORESOURCE_STARTALIGN;
Yinghai Lub5924432012-01-21 02:08:31 -08001113 if (size1 > size0 && realloc_head) {
Wei Yangd74b9022015-03-25 16:23:51 +08001114 add_to_list(realloc_head, bus->self, b_res, size1-size0, add_align);
1115 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window %pR to %pR add_size %llx add_align %llx\n",
Ryan Desfosses227f0642014-04-18 20:13:50 -04001116 b_res, &bus->busn_res,
Wei Yangd74b9022015-03-25 16:23:51 +08001117 (unsigned long long) (size1 - size0),
1118 (unsigned long long) add_align);
Yinghai Lub5924432012-01-21 02:08:31 -08001119 }
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001120 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001121}
1122
Ram Pai0a2daa12011-07-25 13:08:41 -07001123unsigned long pci_cardbus_resource_alignment(struct resource *res)
1124{
1125 if (res->flags & IORESOURCE_IO)
1126 return pci_cardbus_io_size;
1127 if (res->flags & IORESOURCE_MEM)
1128 return pci_cardbus_mem_size;
1129 return 0;
1130}
1131
1132static void pci_bus_size_cardbus(struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001133 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001134{
1135 struct pci_dev *bridge = bus->self;
1136 struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
Yinghai Lu11848932012-02-10 15:33:47 -08001137 resource_size_t b_res_3_size = pci_cardbus_mem_size * 2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001138 u16 ctrl;
1139
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001140 if (b_res[0].parent)
1141 goto handle_b_res_1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001142 /*
1143 * Reserve some resources for CardBus. We reserve
1144 * a fixed amount of bus space for CardBus bridges.
1145 */
Yinghai Lu11848932012-02-10 15:33:47 -08001146 b_res[0].start = pci_cardbus_io_size;
1147 b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1;
1148 b_res[0].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
1149 if (realloc_head) {
1150 b_res[0].end -= pci_cardbus_io_size;
1151 add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,
1152 pci_cardbus_io_size);
1153 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001154
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001155handle_b_res_1:
1156 if (b_res[1].parent)
1157 goto handle_b_res_2;
Yinghai Lu11848932012-02-10 15:33:47 -08001158 b_res[1].start = pci_cardbus_io_size;
1159 b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1;
1160 b_res[1].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
1161 if (realloc_head) {
1162 b_res[1].end -= pci_cardbus_io_size;
1163 add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size,
1164 pci_cardbus_io_size);
1165 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001166
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001167handle_b_res_2:
Yinghai Ludcef0d02012-02-10 15:33:46 -08001168 /* MEM1 must not be pref mmio */
1169 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1170 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {
1171 ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
1172 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
1173 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1174 }
1175
Linus Torvalds1da177e2005-04-16 15:20:36 -07001176 /*
1177 * Check whether prefetchable memory is supported
1178 * by this bridge.
1179 */
1180 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1181 if (!(ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)) {
1182 ctrl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
1183 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
1184 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1185 }
1186
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001187 if (b_res[2].parent)
1188 goto handle_b_res_3;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001189 /*
1190 * If we have prefetchable memory support, allocate
1191 * two regions. Otherwise, allocate one region of
1192 * twice the size.
1193 */
1194 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
Yinghai Lu11848932012-02-10 15:33:47 -08001195 b_res[2].start = pci_cardbus_mem_size;
1196 b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1;
1197 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH |
1198 IORESOURCE_STARTALIGN;
1199 if (realloc_head) {
1200 b_res[2].end -= pci_cardbus_mem_size;
1201 add_to_list(realloc_head, bridge, b_res+2,
1202 pci_cardbus_mem_size, pci_cardbus_mem_size);
1203 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001204
Yinghai Lu11848932012-02-10 15:33:47 -08001205 /* reduce that to half */
1206 b_res_3_size = pci_cardbus_mem_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001207 }
Ram Pai0a2daa12011-07-25 13:08:41 -07001208
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001209handle_b_res_3:
1210 if (b_res[3].parent)
1211 goto handle_done;
Yinghai Lu11848932012-02-10 15:33:47 -08001212 b_res[3].start = pci_cardbus_mem_size;
1213 b_res[3].end = b_res[3].start + b_res_3_size - 1;
1214 b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN;
1215 if (realloc_head) {
1216 b_res[3].end -= b_res_3_size;
1217 add_to_list(realloc_head, bridge, b_res+3, b_res_3_size,
1218 pci_cardbus_mem_size);
1219 }
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001220
1221handle_done:
1222 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001223}
1224
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001225void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001226{
1227 struct pci_dev *dev;
Yinghai Lu5b285412014-05-19 17:01:55 -06001228 unsigned long mask, prefmask, type2 = 0, type3 = 0;
Ram Paic8adf9a2011-02-14 17:43:20 -08001229 resource_size_t additional_mem_size = 0, additional_io_size = 0;
Yinghai Lu5b285412014-05-19 17:01:55 -06001230 struct resource *b_res;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001231 int ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001232
1233 list_for_each_entry(dev, &bus->devices, bus_list) {
1234 struct pci_bus *b = dev->subordinate;
1235 if (!b)
1236 continue;
1237
1238 switch (dev->class >> 8) {
1239 case PCI_CLASS_BRIDGE_CARDBUS:
Ram Pai9e8bf932011-07-25 13:08:42 -07001240 pci_bus_size_cardbus(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001241 break;
1242
1243 case PCI_CLASS_BRIDGE_PCI:
1244 default:
Ram Pai9e8bf932011-07-25 13:08:42 -07001245 __pci_bus_size_bridges(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001246 break;
1247 }
1248 }
1249
1250 /* The root bus? */
Wei Yang2ba29e22013-09-06 09:45:56 +08001251 if (pci_is_root_bus(bus))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001252 return;
1253
1254 switch (bus->self->class >> 8) {
1255 case PCI_CLASS_BRIDGE_CARDBUS:
1256 /* don't size cardbuses yet. */
1257 break;
1258
1259 case PCI_CLASS_BRIDGE_PCI:
1260 pci_bridge_check_ranges(bus);
Eric W. Biederman28760482009-09-09 14:09:24 -07001261 if (bus->self->is_hotplug_bridge) {
Ram Paic8adf9a2011-02-14 17:43:20 -08001262 additional_io_size = pci_hotplug_io_size;
1263 additional_mem_size = pci_hotplug_mem_size;
Eric W. Biederman28760482009-09-09 14:09:24 -07001264 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001265 /* Fall through */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001266 default:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001267 pbus_size_io(bus, realloc_head ? 0 : additional_io_size,
1268 additional_io_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001269
1270 /*
1271 * If there's a 64-bit prefetchable MMIO window, compute
1272 * the size required to put all 64-bit prefetchable
1273 * resources in it.
1274 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001275 b_res = &bus->self->resource[PCI_BRIDGE_RESOURCES];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001276 mask = IORESOURCE_MEM;
1277 prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH;
Yinghai Lu5b285412014-05-19 17:01:55 -06001278 if (b_res[2].flags & IORESOURCE_MEM_64) {
1279 prefmask |= IORESOURCE_MEM_64;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001280 ret = pbus_size_mem(bus, prefmask, prefmask,
Yinghai Lu5b285412014-05-19 17:01:55 -06001281 prefmask, prefmask,
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001282 realloc_head ? 0 : additional_mem_size,
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001283 additional_mem_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001284
1285 /*
1286 * If successful, all non-prefetchable resources
1287 * and any 32-bit prefetchable resources will go in
1288 * the non-prefetchable window.
1289 */
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001290 if (ret == 0) {
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001291 mask = prefmask;
1292 type2 = prefmask & ~IORESOURCE_MEM_64;
1293 type3 = prefmask & ~IORESOURCE_PREFETCH;
Yinghai Lu5b285412014-05-19 17:01:55 -06001294 }
1295 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001296
1297 /*
1298 * If there is no 64-bit prefetchable window, compute the
1299 * size required to put all prefetchable resources in the
1300 * 32-bit prefetchable window (if there is one).
1301 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001302 if (!type2) {
1303 prefmask &= ~IORESOURCE_MEM_64;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001304 ret = pbus_size_mem(bus, prefmask, prefmask,
Yinghai Lu5b285412014-05-19 17:01:55 -06001305 prefmask, prefmask,
1306 realloc_head ? 0 : additional_mem_size,
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001307 additional_mem_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001308
1309 /*
1310 * If successful, only non-prefetchable resources
1311 * will go in the non-prefetchable window.
1312 */
1313 if (ret == 0)
Yinghai Lu5b285412014-05-19 17:01:55 -06001314 mask = prefmask;
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001315 else
Yinghai Lu5b285412014-05-19 17:01:55 -06001316 additional_mem_size += additional_mem_size;
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001317
Yinghai Lu5b285412014-05-19 17:01:55 -06001318 type2 = type3 = IORESOURCE_MEM;
1319 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001320
1321 /*
1322 * Compute the size required to put everything else in the
1323 * non-prefetchable window. This includes:
1324 *
1325 * - all non-prefetchable resources
1326 * - 32-bit prefetchable resources if there's a 64-bit
1327 * prefetchable window or no prefetchable window at all
1328 * - 64-bit prefetchable resources if there's no
1329 * prefetchable window at all
1330 *
1331 * Note that the strategy in __pci_assign_resource() must
1332 * match that used here. Specifically, we cannot put a
1333 * 32-bit prefetchable resource in a 64-bit prefetchable
1334 * window.
1335 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001336 pbus_size_mem(bus, mask, IORESOURCE_MEM, type2, type3,
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001337 realloc_head ? 0 : additional_mem_size,
1338 additional_mem_size, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001339 break;
1340 }
1341}
Ram Paic8adf9a2011-02-14 17:43:20 -08001342
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001343void pci_bus_size_bridges(struct pci_bus *bus)
Ram Paic8adf9a2011-02-14 17:43:20 -08001344{
1345 __pci_bus_size_bridges(bus, NULL);
1346}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001347EXPORT_SYMBOL(pci_bus_size_bridges);
1348
David Daneyd04d0112015-10-29 17:35:39 -05001349static void assign_fixed_resource_on_bus(struct pci_bus *b, struct resource *r)
1350{
1351 int i;
1352 struct resource *parent_r;
1353 unsigned long mask = IORESOURCE_IO | IORESOURCE_MEM |
1354 IORESOURCE_PREFETCH;
1355
1356 pci_bus_for_each_resource(b, parent_r, i) {
1357 if (!parent_r)
1358 continue;
1359
1360 if ((r->flags & mask) == (parent_r->flags & mask) &&
1361 resource_contains(parent_r, r))
1362 request_resource(parent_r, r);
1363 }
1364}
1365
1366/*
1367 * Try to assign any resources marked as IORESOURCE_PCI_FIXED, as they
1368 * are skipped by pbus_assign_resources_sorted().
1369 */
1370static void pdev_assign_fixed_resources(struct pci_dev *dev)
1371{
1372 int i;
1373
1374 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
1375 struct pci_bus *b;
1376 struct resource *r = &dev->resource[i];
1377
1378 if (r->parent || !(r->flags & IORESOURCE_PCI_FIXED) ||
1379 !(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
1380 continue;
1381
1382 b = dev->bus;
1383 while (b && !r->parent) {
1384 assign_fixed_resource_on_bus(b, r);
1385 b = b->parent;
1386 }
1387 }
1388}
1389
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001390void __pci_bus_assign_resources(const struct pci_bus *bus,
1391 struct list_head *realloc_head,
1392 struct list_head *fail_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001393{
1394 struct pci_bus *b;
1395 struct pci_dev *dev;
1396
Ram Pai9e8bf932011-07-25 13:08:42 -07001397 pbus_assign_resources_sorted(bus, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001398
Linus Torvalds1da177e2005-04-16 15:20:36 -07001399 list_for_each_entry(dev, &bus->devices, bus_list) {
David Daneyd04d0112015-10-29 17:35:39 -05001400 pdev_assign_fixed_resources(dev);
1401
Linus Torvalds1da177e2005-04-16 15:20:36 -07001402 b = dev->subordinate;
1403 if (!b)
1404 continue;
1405
Ram Pai9e8bf932011-07-25 13:08:42 -07001406 __pci_bus_assign_resources(b, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001407
1408 switch (dev->class >> 8) {
1409 case PCI_CLASS_BRIDGE_PCI:
Yinghai Lu6841ec62010-01-22 01:02:25 -08001410 if (!pci_is_enabled(dev))
1411 pci_setup_bridge(b);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001412 break;
1413
1414 case PCI_CLASS_BRIDGE_CARDBUS:
1415 pci_setup_cardbus(b);
1416 break;
1417
1418 default:
Ryan Desfosses227f0642014-04-18 20:13:50 -04001419 dev_info(&dev->dev, "not setting up bridge for bus %04x:%02x\n",
1420 pci_domain_nr(b), b->number);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001421 break;
1422 }
1423 }
1424}
Yinghai Lu568ddef2010-01-22 01:02:21 -08001425
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001426void pci_bus_assign_resources(const struct pci_bus *bus)
Yinghai Lu568ddef2010-01-22 01:02:21 -08001427{
Ram Paic8adf9a2011-02-14 17:43:20 -08001428 __pci_bus_assign_resources(bus, NULL, NULL);
Yinghai Lu568ddef2010-01-22 01:02:21 -08001429}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001430EXPORT_SYMBOL(pci_bus_assign_resources);
1431
Lorenzo Pieralisi765bf9b2016-06-08 12:04:47 +01001432static void pci_claim_device_resources(struct pci_dev *dev)
1433{
1434 int i;
1435
1436 for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) {
1437 struct resource *r = &dev->resource[i];
1438
1439 if (!r->flags || r->parent)
1440 continue;
1441
1442 pci_claim_resource(dev, i);
1443 }
1444}
1445
1446static void pci_claim_bridge_resources(struct pci_dev *dev)
1447{
1448 int i;
1449
1450 for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
1451 struct resource *r = &dev->resource[i];
1452
1453 if (!r->flags || r->parent)
1454 continue;
1455
1456 pci_claim_bridge_resource(dev, i);
1457 }
1458}
1459
1460static void pci_bus_allocate_dev_resources(struct pci_bus *b)
1461{
1462 struct pci_dev *dev;
1463 struct pci_bus *child;
1464
1465 list_for_each_entry(dev, &b->devices, bus_list) {
1466 pci_claim_device_resources(dev);
1467
1468 child = dev->subordinate;
1469 if (child)
1470 pci_bus_allocate_dev_resources(child);
1471 }
1472}
1473
1474static void pci_bus_allocate_resources(struct pci_bus *b)
1475{
1476 struct pci_bus *child;
1477
1478 /*
1479 * Carry out a depth-first search on the PCI bus
1480 * tree to allocate bridge apertures. Read the
1481 * programmed bridge bases and recursively claim
1482 * the respective bridge resources.
1483 */
1484 if (b->self) {
1485 pci_read_bridge_bases(b);
1486 pci_claim_bridge_resources(b->self);
1487 }
1488
1489 list_for_each_entry(child, &b->children, node)
1490 pci_bus_allocate_resources(child);
1491}
1492
1493void pci_bus_claim_resources(struct pci_bus *b)
1494{
1495 pci_bus_allocate_resources(b);
1496 pci_bus_allocate_dev_resources(b);
1497}
1498EXPORT_SYMBOL(pci_bus_claim_resources);
1499
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001500static void __pci_bridge_assign_resources(const struct pci_dev *bridge,
1501 struct list_head *add_head,
1502 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -08001503{
1504 struct pci_bus *b;
1505
Yinghai Lu8424d752012-01-21 02:08:21 -08001506 pdev_assign_resources_sorted((struct pci_dev *)bridge,
1507 add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001508
1509 b = bridge->subordinate;
1510 if (!b)
1511 return;
1512
Yinghai Lu8424d752012-01-21 02:08:21 -08001513 __pci_bus_assign_resources(b, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001514
1515 switch (bridge->class >> 8) {
1516 case PCI_CLASS_BRIDGE_PCI:
1517 pci_setup_bridge(b);
1518 break;
1519
1520 case PCI_CLASS_BRIDGE_CARDBUS:
1521 pci_setup_cardbus(b);
1522 break;
1523
1524 default:
Ryan Desfosses227f0642014-04-18 20:13:50 -04001525 dev_info(&bridge->dev, "not setting up bridge for bus %04x:%02x\n",
1526 pci_domain_nr(b), b->number);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001527 break;
1528 }
1529}
Yinghai Lu5009b462010-01-22 01:02:20 -08001530static void pci_bridge_release_resources(struct pci_bus *bus,
1531 unsigned long type)
1532{
Yinghai Lu5b285412014-05-19 17:01:55 -06001533 struct pci_dev *dev = bus->self;
Yinghai Lu5009b462010-01-22 01:02:20 -08001534 struct resource *r;
1535 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
Yinghai Lu5b285412014-05-19 17:01:55 -06001536 IORESOURCE_PREFETCH | IORESOURCE_MEM_64;
1537 unsigned old_flags = 0;
1538 struct resource *b_res;
1539 int idx = 1;
Yinghai Lu5009b462010-01-22 01:02:20 -08001540
Yinghai Lu5b285412014-05-19 17:01:55 -06001541 b_res = &dev->resource[PCI_BRIDGE_RESOURCES];
Yinghai Lu5009b462010-01-22 01:02:20 -08001542
Yinghai Lu5b285412014-05-19 17:01:55 -06001543 /*
1544 * 1. if there is io port assign fail, will release bridge
1545 * io port.
1546 * 2. if there is non pref mmio assign fail, release bridge
1547 * nonpref mmio.
1548 * 3. if there is 64bit pref mmio assign fail, and bridge pref
1549 * is 64bit, release bridge pref mmio.
1550 * 4. if there is pref mmio assign fail, and bridge pref is
1551 * 32bit mmio, release bridge pref mmio
1552 * 5. if there is pref mmio assign fail, and bridge pref is not
1553 * assigned, release bridge nonpref mmio.
1554 */
1555 if (type & IORESOURCE_IO)
1556 idx = 0;
1557 else if (!(type & IORESOURCE_PREFETCH))
1558 idx = 1;
1559 else if ((type & IORESOURCE_MEM_64) &&
1560 (b_res[2].flags & IORESOURCE_MEM_64))
1561 idx = 2;
1562 else if (!(b_res[2].flags & IORESOURCE_MEM_64) &&
1563 (b_res[2].flags & IORESOURCE_PREFETCH))
1564 idx = 2;
1565 else
1566 idx = 1;
1567
1568 r = &b_res[idx];
1569
1570 if (!r->parent)
1571 return;
1572
1573 /*
1574 * if there are children under that, we should release them
1575 * all
1576 */
1577 release_child_resources(r);
1578 if (!release_resource(r)) {
1579 type = old_flags = r->flags & type_mask;
1580 dev_printk(KERN_DEBUG, &dev->dev, "resource %d %pR released\n",
1581 PCI_BRIDGE_RESOURCES + idx, r);
1582 /* keep the old size */
1583 r->end = resource_size(r) - 1;
1584 r->start = 0;
1585 r->flags = 0;
1586
Yinghai Lu5009b462010-01-22 01:02:20 -08001587 /* avoiding touch the one without PREF */
1588 if (type & IORESOURCE_PREFETCH)
1589 type = IORESOURCE_PREFETCH;
1590 __pci_setup_bridge(bus, type);
Yinghai Lu5b285412014-05-19 17:01:55 -06001591 /* for next child res under same bridge */
1592 r->flags = old_flags;
Yinghai Lu5009b462010-01-22 01:02:20 -08001593 }
1594}
1595
1596enum release_type {
1597 leaf_only,
1598 whole_subtree,
1599};
1600/*
1601 * try to release pci bridge resources that is from leaf bridge,
1602 * so we can allocate big new one later
1603 */
Bjorn Helgaas10874f52014-04-14 16:11:40 -06001604static void pci_bus_release_bridge_resources(struct pci_bus *bus,
1605 unsigned long type,
1606 enum release_type rel_type)
Yinghai Lu5009b462010-01-22 01:02:20 -08001607{
1608 struct pci_dev *dev;
1609 bool is_leaf_bridge = true;
1610
1611 list_for_each_entry(dev, &bus->devices, bus_list) {
1612 struct pci_bus *b = dev->subordinate;
1613 if (!b)
1614 continue;
1615
1616 is_leaf_bridge = false;
1617
1618 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1619 continue;
1620
1621 if (rel_type == whole_subtree)
1622 pci_bus_release_bridge_resources(b, type,
1623 whole_subtree);
1624 }
1625
1626 if (pci_is_root_bus(bus))
1627 return;
1628
1629 if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1630 return;
1631
1632 if ((rel_type == whole_subtree) || is_leaf_bridge)
1633 pci_bridge_release_resources(bus, type);
1634}
1635
Yinghai Lu76fbc262008-06-23 20:33:06 +02001636static void pci_bus_dump_res(struct pci_bus *bus)
1637{
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001638 struct resource *res;
1639 int i;
Yinghai Lu76fbc262008-06-23 20:33:06 +02001640
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001641 pci_bus_for_each_resource(bus, res, i) {
Yinghai Lu7c9342b2009-12-22 15:02:24 -08001642 if (!res || !res->end || !res->flags)
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001643 continue;
Yinghai Lu76fbc262008-06-23 20:33:06 +02001644
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -06001645 dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res);
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001646 }
Yinghai Lu76fbc262008-06-23 20:33:06 +02001647}
1648
1649static void pci_bus_dump_resources(struct pci_bus *bus)
1650{
1651 struct pci_bus *b;
1652 struct pci_dev *dev;
1653
1654
1655 pci_bus_dump_res(bus);
1656
1657 list_for_each_entry(dev, &bus->devices, bus_list) {
1658 b = dev->subordinate;
1659 if (!b)
1660 continue;
1661
1662 pci_bus_dump_resources(b);
1663 }
1664}
1665
Yinghai Luff351472013-07-24 15:37:13 -06001666static int pci_bus_get_depth(struct pci_bus *bus)
Yinghai Luda7822e2011-05-12 17:11:37 -07001667{
1668 int depth = 0;
Wei Yangf2a230b2013-08-02 17:31:03 +08001669 struct pci_bus *child_bus;
Yinghai Luda7822e2011-05-12 17:11:37 -07001670
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001671 list_for_each_entry(child_bus, &bus->children, node) {
Yinghai Luda7822e2011-05-12 17:11:37 -07001672 int ret;
Yinghai Luda7822e2011-05-12 17:11:37 -07001673
Wei Yangf2a230b2013-08-02 17:31:03 +08001674 ret = pci_bus_get_depth(child_bus);
Yinghai Luda7822e2011-05-12 17:11:37 -07001675 if (ret + 1 > depth)
1676 depth = ret + 1;
1677 }
1678
1679 return depth;
1680}
Yinghai Luda7822e2011-05-12 17:11:37 -07001681
Yinghai Lub55438f2012-02-23 19:23:30 -08001682/*
1683 * -1: undefined, will auto detect later
1684 * 0: disabled by user
1685 * 1: disabled by auto detect
1686 * 2: enabled by user
1687 * 3: enabled by auto detect
1688 */
1689enum enable_type {
1690 undefined = -1,
1691 user_disabled,
1692 auto_disabled,
1693 user_enabled,
1694 auto_enabled,
1695};
1696
Yinghai Luff351472013-07-24 15:37:13 -06001697static enum enable_type pci_realloc_enable = undefined;
Yinghai Lub55438f2012-02-23 19:23:30 -08001698void __init pci_realloc_get_opt(char *str)
1699{
1700 if (!strncmp(str, "off", 3))
1701 pci_realloc_enable = user_disabled;
1702 else if (!strncmp(str, "on", 2))
1703 pci_realloc_enable = user_enabled;
1704}
Yinghai Luff351472013-07-24 15:37:13 -06001705static bool pci_realloc_enabled(enum enable_type enable)
Yinghai Lub55438f2012-02-23 19:23:30 -08001706{
Yinghai Lu967260c2013-07-22 14:37:15 -07001707 return enable >= user_enabled;
Yinghai Lub55438f2012-02-23 19:23:30 -08001708}
Ram Paif483d392011-07-07 11:19:10 -07001709
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001710#if defined(CONFIG_PCI_IOV) && defined(CONFIG_PCI_REALLOC_ENABLE_AUTO)
Yinghai Luff351472013-07-24 15:37:13 -06001711static int iov_resources_unassigned(struct pci_dev *dev, void *data)
Yinghai Lu223d96f2013-07-22 14:37:13 -07001712{
1713 int i;
1714 bool *unassigned = data;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001715
Yinghai Lu223d96f2013-07-22 14:37:13 -07001716 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) {
1717 struct resource *r = &dev->resource[i];
Yinghai Lufa216bf2013-07-22 14:37:14 -07001718 struct pci_bus_region region;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001719
Yinghai Lu223d96f2013-07-22 14:37:13 -07001720 /* Not assigned or rejected by kernel? */
Yinghai Lufa216bf2013-07-22 14:37:14 -07001721 if (!r->flags)
1722 continue;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001723
Yinghai Lufc279852013-12-09 22:54:40 -08001724 pcibios_resource_to_bus(dev->bus, &region, r);
Yinghai Lufa216bf2013-07-22 14:37:14 -07001725 if (!region.start) {
Yinghai Lu223d96f2013-07-22 14:37:13 -07001726 *unassigned = true;
1727 return 1; /* return early from pci_walk_bus() */
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001728 }
1729 }
Yinghai Lu223d96f2013-07-22 14:37:13 -07001730
1731 return 0;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001732}
1733
Yinghai Luff351472013-07-24 15:37:13 -06001734static enum enable_type pci_realloc_detect(struct pci_bus *bus,
Yinghai Lu967260c2013-07-22 14:37:15 -07001735 enum enable_type enable_local)
Yinghai Lu223d96f2013-07-22 14:37:13 -07001736{
1737 bool unassigned = false;
Yinghai Luda7822e2011-05-12 17:11:37 -07001738
Yinghai Lu967260c2013-07-22 14:37:15 -07001739 if (enable_local != undefined)
1740 return enable_local;
Yinghai Luda7822e2011-05-12 17:11:37 -07001741
Yinghai Lu967260c2013-07-22 14:37:15 -07001742 pci_walk_bus(bus, iov_resources_unassigned, &unassigned);
1743 if (unassigned)
1744 return auto_enabled;
1745
1746 return enable_local;
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001747}
Yinghai Lu223d96f2013-07-22 14:37:13 -07001748#else
Yinghai Luff351472013-07-24 15:37:13 -06001749static enum enable_type pci_realloc_detect(struct pci_bus *bus,
Yinghai Lu967260c2013-07-22 14:37:15 -07001750 enum enable_type enable_local)
1751{
1752 return enable_local;
1753}
Yinghai Lu223d96f2013-07-22 14:37:13 -07001754#endif
Yinghai Luda7822e2011-05-12 17:11:37 -07001755
1756/*
1757 * first try will not touch pci bridge res
Bjorn Helgaasf7625982013-11-14 11:28:18 -07001758 * second and later try will clear small leaf bridge res
1759 * will stop till to the max depth if can not find good one
Linus Torvalds1da177e2005-04-16 15:20:36 -07001760 */
Yinghai Lu39772032013-07-22 14:37:18 -07001761void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001762{
Ram Paic8adf9a2011-02-14 17:43:20 -08001763 LIST_HEAD(realloc_head); /* list of resources that
Yinghai Luda7822e2011-05-12 17:11:37 -07001764 want additional resources */
1765 struct list_head *add_list = NULL;
1766 int tried_times = 0;
1767 enum release_type rel_type = leaf_only;
1768 LIST_HEAD(fail_head);
1769 struct pci_dev_resource *fail_res;
1770 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
Yinghai Lu5b285412014-05-19 17:01:55 -06001771 IORESOURCE_PREFETCH | IORESOURCE_MEM_64;
Yinghai Luda7822e2011-05-12 17:11:37 -07001772 int pci_try_num = 1;
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001773 enum enable_type enable_local;
Yinghai Luda7822e2011-05-12 17:11:37 -07001774
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001775 /* don't realloc if asked to do so */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001776 enable_local = pci_realloc_detect(bus, pci_realloc_enable);
Yinghai Lu967260c2013-07-22 14:37:15 -07001777 if (pci_realloc_enabled(enable_local)) {
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001778 int max_depth = pci_bus_get_depth(bus);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001779
1780 pci_try_num = max_depth + 1;
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001781 dev_printk(KERN_DEBUG, &bus->dev,
1782 "max bus depth: %d pci_try_num: %d\n",
1783 max_depth, pci_try_num);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001784 }
Yinghai Luda7822e2011-05-12 17:11:37 -07001785
1786again:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001787 /*
1788 * last try will use add_list, otherwise will try good to have as
1789 * must have, so can realloc parent bridge resource
1790 */
1791 if (tried_times + 1 == pci_try_num)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001792 add_list = &realloc_head;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001793 /* Depth first, calculate sizes and alignments of all
1794 subordinate buses. */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001795 __pci_bus_size_bridges(bus, add_list);
Ram Paic8adf9a2011-02-14 17:43:20 -08001796
Linus Torvalds1da177e2005-04-16 15:20:36 -07001797 /* Depth last, allocate resources and update the hardware. */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001798 __pci_bus_assign_resources(bus, add_list, &fail_head);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001799 if (add_list)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001800 BUG_ON(!list_empty(add_list));
Yinghai Luda7822e2011-05-12 17:11:37 -07001801 tried_times++;
1802
1803 /* any device complain? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001804 if (list_empty(&fail_head))
Yinghai Lu928bea92013-07-22 14:37:17 -07001805 goto dump;
Ram Paif483d392011-07-07 11:19:10 -07001806
Yinghai Lu0c5be0c2012-02-23 19:23:29 -08001807 if (tried_times >= pci_try_num) {
Yinghai Lu967260c2013-07-22 14:37:15 -07001808 if (enable_local == undefined)
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001809 dev_info(&bus->dev, "Some PCI device resources are unassigned, try booting with pci=realloc\n");
Yinghai Lu967260c2013-07-22 14:37:15 -07001810 else if (enable_local == auto_enabled)
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001811 dev_info(&bus->dev, "Automatically enabled pci realloc, if you have problem, try booting with pci=realloc=off\n");
Yinghai Lueb572e72012-02-23 19:23:31 -08001812
Yinghai Lubffc56d2012-01-21 02:08:30 -08001813 free_list(&fail_head);
Yinghai Lu928bea92013-07-22 14:37:17 -07001814 goto dump;
Yinghai Luda7822e2011-05-12 17:11:37 -07001815 }
1816
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001817 dev_printk(KERN_DEBUG, &bus->dev,
1818 "No. %d try to assign unassigned res\n", tried_times + 1);
Yinghai Luda7822e2011-05-12 17:11:37 -07001819
1820 /* third times and later will not check if it is leaf */
1821 if ((tried_times + 1) > 2)
1822 rel_type = whole_subtree;
1823
1824 /*
1825 * Try to release leaf bridge's resources that doesn't fit resource of
1826 * child device under that bridge
1827 */
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001828 list_for_each_entry(fail_res, &fail_head, list)
1829 pci_bus_release_bridge_resources(fail_res->dev->bus,
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001830 fail_res->flags & type_mask,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001831 rel_type);
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001832
Yinghai Luda7822e2011-05-12 17:11:37 -07001833 /* restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001834 list_for_each_entry(fail_res, &fail_head, list) {
1835 struct resource *res = fail_res->res;
Logan Gunthorpe208ac812020-01-08 14:32:08 -07001836 int idx;
Yinghai Luda7822e2011-05-12 17:11:37 -07001837
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001838 res->start = fail_res->start;
1839 res->end = fail_res->end;
1840 res->flags = fail_res->flags;
Logan Gunthorpe208ac812020-01-08 14:32:08 -07001841
1842 if (pci_is_bridge(fail_res->dev)) {
1843 idx = res - &fail_res->dev->resource[0];
1844 if (idx >= PCI_BRIDGE_RESOURCES &&
1845 idx <= PCI_BRIDGE_RESOURCE_END)
1846 res->flags = 0;
1847 }
Yinghai Luda7822e2011-05-12 17:11:37 -07001848 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08001849 free_list(&fail_head);
Yinghai Luda7822e2011-05-12 17:11:37 -07001850
1851 goto again;
1852
Yinghai Lu928bea92013-07-22 14:37:17 -07001853dump:
Yinghai Lu76fbc262008-06-23 20:33:06 +02001854 /* dump the resource on buses */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001855 pci_bus_dump_resources(bus);
1856}
1857
1858void __init pci_assign_unassigned_resources(void)
1859{
1860 struct pci_bus *root_bus;
1861
Rui Wang584c5c42016-08-17 16:00:34 +08001862 list_for_each_entry(root_bus, &pci_root_buses, node) {
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001863 pci_assign_unassigned_root_bus_resources(root_bus);
Rui Wangd9c149d2016-09-10 23:40:45 +08001864
1865 /* Make sure the root bridge has a companion ACPI device: */
1866 if (ACPI_HANDLE(root_bus->bridge))
1867 acpi_ioapic_add(ACPI_HANDLE(root_bus->bridge));
Rui Wang584c5c42016-08-17 16:00:34 +08001868 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001869}
Yinghai Lu6841ec62010-01-22 01:02:25 -08001870
1871void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
1872{
1873 struct pci_bus *parent = bridge->subordinate;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001874 LIST_HEAD(add_list); /* list of resources that
Yinghai Lu8424d752012-01-21 02:08:21 -08001875 want additional resources */
Yinghai Lu32180e42010-01-22 01:02:27 -08001876 int tried_times = 0;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001877 LIST_HEAD(fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001878 struct pci_dev_resource *fail_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -08001879 int retval;
Yinghai Lu32180e42010-01-22 01:02:27 -08001880 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
Yinghai Lud61b0e82014-08-22 18:15:07 -07001881 IORESOURCE_PREFETCH | IORESOURCE_MEM_64;
Yinghai Lu6841ec62010-01-22 01:02:25 -08001882
Yinghai Lu32180e42010-01-22 01:02:27 -08001883again:
Yinghai Lu8424d752012-01-21 02:08:21 -08001884 __pci_bus_size_bridges(parent, &add_list);
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001885 __pci_bridge_assign_resources(bridge, &add_list, &fail_head);
1886 BUG_ON(!list_empty(&add_list));
Yinghai Lu32180e42010-01-22 01:02:27 -08001887 tried_times++;
1888
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001889 if (list_empty(&fail_head))
Yinghai Lu3f579c32010-05-21 14:35:06 -07001890 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08001891
1892 if (tried_times >= 2) {
1893 /* still fail, don't need to try more */
Yinghai Lubffc56d2012-01-21 02:08:30 -08001894 free_list(&fail_head);
Yinghai Lu3f579c32010-05-21 14:35:06 -07001895 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08001896 }
1897
1898 printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n",
1899 tried_times + 1);
1900
1901 /*
1902 * Try to release leaf bridge's resources that doesn't fit resource of
1903 * child device under that bridge
1904 */
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001905 list_for_each_entry(fail_res, &fail_head, list)
1906 pci_bus_release_bridge_resources(fail_res->dev->bus,
1907 fail_res->flags & type_mask,
Yinghai Lu32180e42010-01-22 01:02:27 -08001908 whole_subtree);
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001909
Yinghai Lu32180e42010-01-22 01:02:27 -08001910 /* restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001911 list_for_each_entry(fail_res, &fail_head, list) {
1912 struct resource *res = fail_res->res;
Logan Gunthorpe208ac812020-01-08 14:32:08 -07001913 int idx;
Yinghai Lu32180e42010-01-22 01:02:27 -08001914
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001915 res->start = fail_res->start;
1916 res->end = fail_res->end;
1917 res->flags = fail_res->flags;
Logan Gunthorpe208ac812020-01-08 14:32:08 -07001918
1919 if (pci_is_bridge(fail_res->dev)) {
1920 idx = res - &fail_res->dev->resource[0];
1921 if (idx >= PCI_BRIDGE_RESOURCES &&
1922 idx <= PCI_BRIDGE_RESOURCE_END)
1923 res->flags = 0;
1924 }
Yinghai Lu32180e42010-01-22 01:02:27 -08001925 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08001926 free_list(&fail_head);
Yinghai Lu32180e42010-01-22 01:02:27 -08001927
1928 goto again;
Yinghai Lu3f579c32010-05-21 14:35:06 -07001929
1930enable_all:
1931 retval = pci_reenable_device(bridge);
Bjorn Helgaas9fc9eea2013-04-12 11:35:40 -06001932 if (retval)
1933 dev_err(&bridge->dev, "Error reenabling bridge (%d)\n", retval);
Yinghai Lu3f579c32010-05-21 14:35:06 -07001934 pci_set_master(bridge);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001935}
1936EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);
Yinghai Lu9b030882012-01-21 02:08:23 -08001937
Yinghai Lu17787942012-10-30 14:31:10 -06001938void pci_assign_unassigned_bus_resources(struct pci_bus *bus)
Yinghai Lu9b030882012-01-21 02:08:23 -08001939{
Yinghai Lu9b030882012-01-21 02:08:23 -08001940 struct pci_dev *dev;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001941 LIST_HEAD(add_list); /* list of resources that
Yinghai Lu9b030882012-01-21 02:08:23 -08001942 want additional resources */
1943
Yinghai Lu9b030882012-01-21 02:08:23 -08001944 down_read(&pci_bus_sem);
1945 list_for_each_entry(dev, &bus->devices, bus_list)
Yijing Wang6788a512014-05-04 12:23:38 +08001946 if (pci_is_bridge(dev) && pci_has_subordinate(dev))
Yinghai Lu9b030882012-01-21 02:08:23 -08001947 __pci_bus_size_bridges(dev->subordinate,
1948 &add_list);
1949 up_read(&pci_bus_sem);
1950 __pci_bus_assign_resources(bus, &add_list, NULL);
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001951 BUG_ON(!list_empty(&add_list));
Yinghai Lu17787942012-10-30 14:31:10 -06001952}
Ray Juie6b29de2015-04-08 11:21:33 -07001953EXPORT_SYMBOL_GPL(pci_assign_unassigned_bus_resources);