blob: 1fe9fbdc9102109df80406820985ab84eb36278a [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020059
60#include "spectrum.h"
61#include "core.h"
62#include "reg.h"
63#include "port.h"
64#include "trap.h"
65#include "txheader.h"
66
67static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
68static const char mlxsw_sp_driver_version[] = "1.0";
69
70/* tx_hdr_version
71 * Tx header version.
72 * Must be set to 1.
73 */
74MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
75
76/* tx_hdr_ctl
77 * Packet control type.
78 * 0 - Ethernet control (e.g. EMADs, LACP)
79 * 1 - Ethernet data
80 */
81MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
82
83/* tx_hdr_proto
84 * Packet protocol type. Must be set to 1 (Ethernet).
85 */
86MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
87
88/* tx_hdr_rx_is_router
89 * Packet is sent from the router. Valid for data packets only.
90 */
91MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
92
93/* tx_hdr_fid_valid
94 * Indicates if the 'fid' field is valid and should be used for
95 * forwarding lookup. Valid for data packets only.
96 */
97MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
98
99/* tx_hdr_swid
100 * Switch partition ID. Must be set to 0.
101 */
102MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
103
104/* tx_hdr_control_tclass
105 * Indicates if the packet should use the control TClass and not one
106 * of the data TClasses.
107 */
108MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
109
110/* tx_hdr_etclass
111 * Egress TClass to be used on the egress device on the egress port.
112 */
113MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
114
115/* tx_hdr_port_mid
116 * Destination local port for unicast packets.
117 * Destination multicast ID for multicast packets.
118 *
119 * Control packets are directed to a specific egress port, while data
120 * packets are transmitted through the CPU port (0) into the switch partition,
121 * where forwarding rules are applied.
122 */
123MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
124
125/* tx_hdr_fid
126 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
127 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
128 * Valid for data packets only.
129 */
130MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
131
132/* tx_hdr_type
133 * 0 - Data packets
134 * 6 - Control packets
135 */
136MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
137
Yotam Gigi763b4b72016-07-21 12:03:17 +0200138static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
139
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200140static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
141 const struct mlxsw_tx_info *tx_info)
142{
143 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
144
145 memset(txhdr, 0, MLXSW_TXHDR_LEN);
146
147 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
148 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
149 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
150 mlxsw_tx_hdr_swid_set(txhdr, 0);
151 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
152 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
153 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
154}
155
156static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
157{
158 char spad_pl[MLXSW_REG_SPAD_LEN];
159 int err;
160
161 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
162 if (err)
163 return err;
164 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
165 return 0;
166}
167
Yotam Gigi763b4b72016-07-21 12:03:17 +0200168static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
169{
170 struct mlxsw_resources *resources;
171 int i;
172
173 resources = mlxsw_core_resources_get(mlxsw_sp->core);
174 if (!resources->max_span_valid)
175 return -EIO;
176
177 mlxsw_sp->span.entries_count = resources->max_span;
178 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
179 sizeof(struct mlxsw_sp_span_entry),
180 GFP_KERNEL);
181 if (!mlxsw_sp->span.entries)
182 return -ENOMEM;
183
184 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
185 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
186
187 return 0;
188}
189
190static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
191{
192 int i;
193
194 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
195 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
196
197 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
198 }
199 kfree(mlxsw_sp->span.entries);
200}
201
202static struct mlxsw_sp_span_entry *
203mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
204{
205 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
206 struct mlxsw_sp_span_entry *span_entry;
207 char mpat_pl[MLXSW_REG_MPAT_LEN];
208 u8 local_port = port->local_port;
209 int index;
210 int i;
211 int err;
212
213 /* find a free entry to use */
214 index = -1;
215 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
216 if (!mlxsw_sp->span.entries[i].used) {
217 index = i;
218 span_entry = &mlxsw_sp->span.entries[i];
219 break;
220 }
221 }
222 if (index < 0)
223 return NULL;
224
225 /* create a new port analayzer entry for local_port */
226 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
227 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
228 if (err)
229 return NULL;
230
231 span_entry->used = true;
232 span_entry->id = index;
233 span_entry->ref_count = 0;
234 span_entry->local_port = local_port;
235 return span_entry;
236}
237
238static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
239 struct mlxsw_sp_span_entry *span_entry)
240{
241 u8 local_port = span_entry->local_port;
242 char mpat_pl[MLXSW_REG_MPAT_LEN];
243 int pa_id = span_entry->id;
244
245 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
246 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
247 span_entry->used = false;
248}
249
250struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
251{
252 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
253 int i;
254
255 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
256 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
257
258 if (curr->used && curr->local_port == port->local_port)
259 return curr;
260 }
261 return NULL;
262}
263
264struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
265{
266 struct mlxsw_sp_span_entry *span_entry;
267
268 span_entry = mlxsw_sp_span_entry_find(port);
269 if (span_entry) {
270 span_entry->ref_count++;
271 return span_entry;
272 }
273
274 return mlxsw_sp_span_entry_create(port);
275}
276
277static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
278 struct mlxsw_sp_span_entry *span_entry)
279{
280 if (--span_entry->ref_count == 0)
281 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
282 return 0;
283}
284
285static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
286{
287 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
288 struct mlxsw_sp_span_inspected_port *p;
289 int i;
290
291 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
292 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
293
294 list_for_each_entry(p, &curr->bound_ports_list, list)
295 if (p->local_port == port->local_port &&
296 p->type == MLXSW_SP_SPAN_EGRESS)
297 return true;
298 }
299
300 return false;
301}
302
303static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
304{
305 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
306}
307
308static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
309{
310 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
311 char sbib_pl[MLXSW_REG_SBIB_LEN];
312 int err;
313
314 /* If port is egress mirrored, the shared buffer size should be
315 * updated according to the mtu value
316 */
317 if (mlxsw_sp_span_is_egress_mirror(port)) {
318 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
319 mlxsw_sp_span_mtu_to_buffsize(mtu));
320 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
321 if (err) {
322 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
323 return err;
324 }
325 }
326
327 return 0;
328}
329
330static struct mlxsw_sp_span_inspected_port *
331mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
332 struct mlxsw_sp_span_entry *span_entry)
333{
334 struct mlxsw_sp_span_inspected_port *p;
335
336 list_for_each_entry(p, &span_entry->bound_ports_list, list)
337 if (port->local_port == p->local_port)
338 return p;
339 return NULL;
340}
341
342static int
343mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
344 struct mlxsw_sp_span_entry *span_entry,
345 enum mlxsw_sp_span_type type)
346{
347 struct mlxsw_sp_span_inspected_port *inspected_port;
348 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
349 char mpar_pl[MLXSW_REG_MPAR_LEN];
350 char sbib_pl[MLXSW_REG_SBIB_LEN];
351 int pa_id = span_entry->id;
352 int err;
353
354 /* if it is an egress SPAN, bind a shared buffer to it */
355 if (type == MLXSW_SP_SPAN_EGRESS) {
356 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
357 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
358 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
359 if (err) {
360 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
361 return err;
362 }
363 }
364
365 /* bind the port to the SPAN entry */
366 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
367 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
368 if (err)
369 goto err_mpar_reg_write;
370
371 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
372 if (!inspected_port) {
373 err = -ENOMEM;
374 goto err_inspected_port_alloc;
375 }
376 inspected_port->local_port = port->local_port;
377 inspected_port->type = type;
378 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
379
380 return 0;
381
382err_mpar_reg_write:
383err_inspected_port_alloc:
384 if (type == MLXSW_SP_SPAN_EGRESS) {
385 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
386 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
387 }
388 return err;
389}
390
391static void
392mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
393 struct mlxsw_sp_span_entry *span_entry,
394 enum mlxsw_sp_span_type type)
395{
396 struct mlxsw_sp_span_inspected_port *inspected_port;
397 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
398 char mpar_pl[MLXSW_REG_MPAR_LEN];
399 char sbib_pl[MLXSW_REG_SBIB_LEN];
400 int pa_id = span_entry->id;
401
402 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
403 if (!inspected_port)
404 return;
405
406 /* remove the inspected port */
407 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
408 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
409
410 /* remove the SBIB buffer if it was egress SPAN */
411 if (type == MLXSW_SP_SPAN_EGRESS) {
412 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
413 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
414 }
415
416 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
417
418 list_del(&inspected_port->list);
419 kfree(inspected_port);
420}
421
422static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
423 struct mlxsw_sp_port *to,
424 enum mlxsw_sp_span_type type)
425{
426 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
427 struct mlxsw_sp_span_entry *span_entry;
428 int err;
429
430 span_entry = mlxsw_sp_span_entry_get(to);
431 if (!span_entry)
432 return -ENOENT;
433
434 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
435 span_entry->id);
436
437 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
438 if (err)
439 goto err_port_bind;
440
441 return 0;
442
443err_port_bind:
444 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
445 return err;
446}
447
448static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
449 struct mlxsw_sp_port *to,
450 enum mlxsw_sp_span_type type)
451{
452 struct mlxsw_sp_span_entry *span_entry;
453
454 span_entry = mlxsw_sp_span_entry_find(to);
455 if (!span_entry) {
456 netdev_err(from->dev, "no span entry found\n");
457 return;
458 }
459
460 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
461 span_entry->id);
462 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
463}
464
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200465static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
466 bool is_up)
467{
468 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
469 char paos_pl[MLXSW_REG_PAOS_LEN];
470
471 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
472 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
473 MLXSW_PORT_ADMIN_STATUS_DOWN);
474 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
475}
476
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200477static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
478 unsigned char *addr)
479{
480 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
481 char ppad_pl[MLXSW_REG_PPAD_LEN];
482
483 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
484 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
485 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
486}
487
488static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
489{
490 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
491 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
492
493 ether_addr_copy(addr, mlxsw_sp->base_mac);
494 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
495 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
496}
497
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200498static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
499{
500 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
501 char pmtu_pl[MLXSW_REG_PMTU_LEN];
502 int max_mtu;
503 int err;
504
505 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
506 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
507 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
508 if (err)
509 return err;
510 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
511
512 if (mtu > max_mtu)
513 return -EINVAL;
514
515 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
516 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
517}
518
Ido Schimmelbe945352016-06-09 09:51:39 +0200519static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
520 u8 swid)
521{
522 char pspa_pl[MLXSW_REG_PSPA_LEN];
523
524 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
525 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
526}
527
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200528static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
529{
530 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200531
Ido Schimmelbe945352016-06-09 09:51:39 +0200532 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
533 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200534}
535
536static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
537 bool enable)
538{
539 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
540 char svpe_pl[MLXSW_REG_SVPE_LEN];
541
542 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
543 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
544}
545
546int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
547 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
548 u16 vid)
549{
550 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
551 char svfa_pl[MLXSW_REG_SVFA_LEN];
552
553 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
554 fid, vid);
555 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
556}
557
558static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
559 u16 vid, bool learn_enable)
560{
561 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
562 char *spvmlr_pl;
563 int err;
564
565 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
566 if (!spvmlr_pl)
567 return -ENOMEM;
568 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
569 learn_enable);
570 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
571 kfree(spvmlr_pl);
572 return err;
573}
574
575static int
576mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
577{
578 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
579 char sspr_pl[MLXSW_REG_SSPR_LEN];
580
581 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
582 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
583}
584
Ido Schimmeld664b412016-06-09 09:51:40 +0200585static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
586 u8 local_port, u8 *p_module,
587 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200588{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200589 char pmlp_pl[MLXSW_REG_PMLP_LEN];
590 int err;
591
Ido Schimmel558c2d52016-02-26 17:32:29 +0100592 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200593 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
594 if (err)
595 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100596 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
597 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200598 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200599 return 0;
600}
601
Ido Schimmel18f1e702016-02-26 17:32:31 +0100602static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
603 u8 module, u8 width, u8 lane)
604{
605 char pmlp_pl[MLXSW_REG_PMLP_LEN];
606 int i;
607
608 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
609 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
610 for (i = 0; i < width; i++) {
611 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
612 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
613 }
614
615 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
616}
617
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100618static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
619{
620 char pmlp_pl[MLXSW_REG_PMLP_LEN];
621
622 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
623 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
625}
626
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200627static int mlxsw_sp_port_open(struct net_device *dev)
628{
629 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
630 int err;
631
632 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
633 if (err)
634 return err;
635 netif_start_queue(dev);
636 return 0;
637}
638
639static int mlxsw_sp_port_stop(struct net_device *dev)
640{
641 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
642
643 netif_stop_queue(dev);
644 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
645}
646
647static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
648 struct net_device *dev)
649{
650 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
651 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
652 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
653 const struct mlxsw_tx_info tx_info = {
654 .local_port = mlxsw_sp_port->local_port,
655 .is_emad = false,
656 };
657 u64 len;
658 int err;
659
Jiri Pirko307c2432016-04-08 19:11:22 +0200660 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200661 return NETDEV_TX_BUSY;
662
663 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
664 struct sk_buff *skb_orig = skb;
665
666 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
667 if (!skb) {
668 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
669 dev_kfree_skb_any(skb_orig);
670 return NETDEV_TX_OK;
671 }
672 }
673
674 if (eth_skb_pad(skb)) {
675 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
676 return NETDEV_TX_OK;
677 }
678
679 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200680 /* TX header is consumed by HW on the way so we shouldn't count its
681 * bytes as being sent.
682 */
683 len = skb->len - MLXSW_TXHDR_LEN;
684
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200685 /* Due to a race we might fail here because of a full queue. In that
686 * unlikely case we simply drop the packet.
687 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200688 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200689
690 if (!err) {
691 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
692 u64_stats_update_begin(&pcpu_stats->syncp);
693 pcpu_stats->tx_packets++;
694 pcpu_stats->tx_bytes += len;
695 u64_stats_update_end(&pcpu_stats->syncp);
696 } else {
697 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
698 dev_kfree_skb_any(skb);
699 }
700 return NETDEV_TX_OK;
701}
702
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100703static void mlxsw_sp_set_rx_mode(struct net_device *dev)
704{
705}
706
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200707static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
708{
709 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
710 struct sockaddr *addr = p;
711 int err;
712
713 if (!is_valid_ether_addr(addr->sa_data))
714 return -EADDRNOTAVAIL;
715
716 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
717 if (err)
718 return err;
719 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
720 return 0;
721}
722
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200723static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200724 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200725{
726 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
727
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200728 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
729 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200730
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200731 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200732 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200733 pg_size + delay, pg_size);
734 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200735 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200736}
737
738int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200739 u8 *prio_tc, bool pause_en,
740 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200741{
742 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200743 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
744 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200745 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200746 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200747
748 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
749 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
750 if (err)
751 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200752
753 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
754 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200755 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200756
757 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
758 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200759 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200760 configure = true;
761 break;
762 }
763 }
764
765 if (!configure)
766 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200767 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200768 }
769
Ido Schimmelff6551e2016-04-06 17:10:03 +0200770 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
771}
772
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200773static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200774 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200775{
776 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
777 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200778 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200779 u8 *prio_tc;
780
781 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200782 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200783
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200784 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200785 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200786}
787
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200788static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
789{
790 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200791 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200792 int err;
793
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200794 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200795 if (err)
796 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200797 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
798 if (err)
799 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200800 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
801 if (err)
802 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200803 dev->mtu = mtu;
804 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200805
806err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200807 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
808err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200809 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200810 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200811}
812
813static struct rtnl_link_stats64 *
814mlxsw_sp_port_get_stats64(struct net_device *dev,
815 struct rtnl_link_stats64 *stats)
816{
817 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
818 struct mlxsw_sp_port_pcpu_stats *p;
819 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
820 u32 tx_dropped = 0;
821 unsigned int start;
822 int i;
823
824 for_each_possible_cpu(i) {
825 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
826 do {
827 start = u64_stats_fetch_begin_irq(&p->syncp);
828 rx_packets = p->rx_packets;
829 rx_bytes = p->rx_bytes;
830 tx_packets = p->tx_packets;
831 tx_bytes = p->tx_bytes;
832 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
833
834 stats->rx_packets += rx_packets;
835 stats->rx_bytes += rx_bytes;
836 stats->tx_packets += tx_packets;
837 stats->tx_bytes += tx_bytes;
838 /* tx_dropped is u32, updated without syncp protection. */
839 tx_dropped += p->tx_dropped;
840 }
841 stats->tx_dropped = tx_dropped;
842 return stats;
843}
844
845int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
846 u16 vid_end, bool is_member, bool untagged)
847{
848 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
849 char *spvm_pl;
850 int err;
851
852 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
853 if (!spvm_pl)
854 return -ENOMEM;
855
856 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
857 vid_end, is_member, untagged);
858 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
859 kfree(spvm_pl);
860 return err;
861}
862
863static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
864{
865 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
866 u16 vid, last_visited_vid;
867 int err;
868
869 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
870 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
871 vid);
872 if (err) {
873 last_visited_vid = vid;
874 goto err_port_vid_to_fid_set;
875 }
876 }
877
878 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
879 if (err) {
880 last_visited_vid = VLAN_N_VID;
881 goto err_port_vid_to_fid_set;
882 }
883
884 return 0;
885
886err_port_vid_to_fid_set:
887 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
888 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
889 vid);
890 return err;
891}
892
893static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
894{
895 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
896 u16 vid;
897 int err;
898
899 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
900 if (err)
901 return err;
902
903 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
904 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
905 vid, vid);
906 if (err)
907 return err;
908 }
909
910 return 0;
911}
912
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100913static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +0200914mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100915{
916 struct mlxsw_sp_port *mlxsw_sp_vport;
917
918 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
919 if (!mlxsw_sp_vport)
920 return NULL;
921
922 /* dev will be set correctly after the VLAN device is linked
923 * with the real device. In case of bridge SELF invocation, dev
924 * will remain as is.
925 */
926 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
927 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
928 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
929 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +0100930 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
931 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +0200932 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100933
934 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
935
936 return mlxsw_sp_vport;
937}
938
939static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
940{
941 list_del(&mlxsw_sp_vport->vport.list);
942 kfree(mlxsw_sp_vport);
943}
944
Ido Schimmel05978482016-08-17 16:39:30 +0200945static int mlxsw_sp_port_add_vid(struct net_device *dev,
946 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200947{
948 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100949 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +0200950 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200951 int err;
952
953 /* VLAN 0 is added to HW filter when device goes up, but it is
954 * reserved in our case, so simply return.
955 */
956 if (!vid)
957 return 0;
958
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200959 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200960 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200961
Ido Schimmel0355b592016-06-20 23:04:13 +0200962 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200963 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +0200964 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200965
966 /* When adding the first VLAN interface on a bridged port we need to
967 * transition all the active 802.1Q bridge VLANs to use explicit
968 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
969 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100970 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200971 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200972 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100973 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200974 }
975
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100976 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200977 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200978 goto err_port_vid_learning_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200979
Ido Schimmel52697a92016-07-02 11:00:09 +0200980 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200981 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200982 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200983
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200984 return 0;
985
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200986err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100987 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200988err_port_vid_learning_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100989 if (list_is_singular(&mlxsw_sp_port->vports_list))
990 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
991err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100992 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200993 return err;
994}
995
Ido Schimmel32d863f2016-07-02 11:00:10 +0200996static int mlxsw_sp_port_kill_vid(struct net_device *dev,
997 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200998{
999 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001000 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001001 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001002
1003 /* VLAN 0 is removed from HW filter when device goes down, but
1004 * it is reserved in our case, so simply return.
1005 */
1006 if (!vid)
1007 return 0;
1008
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001009 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001010 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001011 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001012
Ido Schimmel7a355832016-08-17 16:39:28 +02001013 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001014
Ido Schimmel7a355832016-08-17 16:39:28 +02001015 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001016
Ido Schimmel1c800752016-06-20 23:04:20 +02001017 /* Drop FID reference. If this was the last reference the
1018 * resources will be freed.
1019 */
1020 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1021 if (f && !WARN_ON(!f->leave))
1022 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001023
1024 /* When removing the last VLAN interface on a bridged port we need to
1025 * transition all active 802.1Q bridge VLANs to use VID to FID
1026 * mappings and set port's mode to VLAN mode.
1027 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001028 if (list_is_singular(&mlxsw_sp_port->vports_list))
1029 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001030
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001031 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1032
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001033 return 0;
1034}
1035
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001036static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1037 size_t len)
1038{
1039 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001040 u8 module = mlxsw_sp_port->mapping.module;
1041 u8 width = mlxsw_sp_port->mapping.width;
1042 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001043 int err;
1044
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001045 if (!mlxsw_sp_port->split)
1046 err = snprintf(name, len, "p%d", module + 1);
1047 else
1048 err = snprintf(name, len, "p%ds%d", module + 1,
1049 lane / width);
1050
1051 if (err >= len)
1052 return -EINVAL;
1053
1054 return 0;
1055}
1056
Yotam Gigi763b4b72016-07-21 12:03:17 +02001057static struct mlxsw_sp_port_mall_tc_entry *
1058mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1059 unsigned long cookie) {
1060 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1061
1062 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1063 if (mall_tc_entry->cookie == cookie)
1064 return mall_tc_entry;
1065
1066 return NULL;
1067}
1068
1069static int
1070mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1071 struct tc_cls_matchall_offload *cls,
1072 const struct tc_action *a,
1073 bool ingress)
1074{
1075 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1076 struct net *net = dev_net(mlxsw_sp_port->dev);
1077 enum mlxsw_sp_span_type span_type;
1078 struct mlxsw_sp_port *to_port;
1079 struct net_device *to_dev;
1080 int ifindex;
1081 int err;
1082
1083 ifindex = tcf_mirred_ifindex(a);
1084 to_dev = __dev_get_by_index(net, ifindex);
1085 if (!to_dev) {
1086 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1087 return -EINVAL;
1088 }
1089
1090 if (!mlxsw_sp_port_dev_check(to_dev)) {
1091 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1092 return -ENOTSUPP;
1093 }
1094 to_port = netdev_priv(to_dev);
1095
1096 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1097 if (!mall_tc_entry)
1098 return -ENOMEM;
1099
1100 mall_tc_entry->cookie = cls->cookie;
1101 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1102 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1103 mall_tc_entry->mirror.ingress = ingress;
1104 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1105
1106 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1107 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1108 if (err)
1109 goto err_mirror_add;
1110 return 0;
1111
1112err_mirror_add:
1113 list_del(&mall_tc_entry->list);
1114 kfree(mall_tc_entry);
1115 return err;
1116}
1117
1118static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1119 __be16 protocol,
1120 struct tc_cls_matchall_offload *cls,
1121 bool ingress)
1122{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001123 const struct tc_action *a;
1124 int err;
1125
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001126 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001127 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1128 return -ENOTSUPP;
1129 }
1130
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001131 tc_for_each_action(a, cls->exts) {
1132 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1133 return -ENOTSUPP;
1134
Yotam Gigi763b4b72016-07-21 12:03:17 +02001135 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1136 a, ingress);
1137 if (err)
1138 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001139 }
1140
1141 return 0;
1142}
1143
1144static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1145 struct tc_cls_matchall_offload *cls)
1146{
1147 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1148 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1149 enum mlxsw_sp_span_type span_type;
1150 struct mlxsw_sp_port *to_port;
1151
1152 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1153 cls->cookie);
1154 if (!mall_tc_entry) {
1155 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1156 return;
1157 }
1158
1159 switch (mall_tc_entry->type) {
1160 case MLXSW_SP_PORT_MALL_MIRROR:
1161 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1162 span_type = mall_tc_entry->mirror.ingress ?
1163 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1164
1165 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1166 break;
1167 default:
1168 WARN_ON(1);
1169 }
1170
1171 list_del(&mall_tc_entry->list);
1172 kfree(mall_tc_entry);
1173}
1174
1175static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1176 __be16 proto, struct tc_to_netdev *tc)
1177{
1178 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1179 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1180
1181 if (tc->type == TC_SETUP_MATCHALL) {
1182 switch (tc->cls_mall->command) {
1183 case TC_CLSMATCHALL_REPLACE:
1184 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1185 proto,
1186 tc->cls_mall,
1187 ingress);
1188 case TC_CLSMATCHALL_DESTROY:
1189 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1190 tc->cls_mall);
1191 return 0;
1192 default:
1193 return -EINVAL;
1194 }
1195 }
1196
1197 return -ENOTSUPP;
1198}
1199
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001200static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1201 .ndo_open = mlxsw_sp_port_open,
1202 .ndo_stop = mlxsw_sp_port_stop,
1203 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001204 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001205 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001206 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1207 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1208 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1209 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1210 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001211 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1212 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001213 .ndo_fdb_add = switchdev_port_fdb_add,
1214 .ndo_fdb_del = switchdev_port_fdb_del,
1215 .ndo_fdb_dump = switchdev_port_fdb_dump,
1216 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1217 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1218 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001219 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001220};
1221
1222static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1223 struct ethtool_drvinfo *drvinfo)
1224{
1225 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1226 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1227
1228 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1229 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1230 sizeof(drvinfo->version));
1231 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1232 "%d.%d.%d",
1233 mlxsw_sp->bus_info->fw_rev.major,
1234 mlxsw_sp->bus_info->fw_rev.minor,
1235 mlxsw_sp->bus_info->fw_rev.subminor);
1236 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1237 sizeof(drvinfo->bus_info));
1238}
1239
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001240static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1241 struct ethtool_pauseparam *pause)
1242{
1243 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1244
1245 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1246 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1247}
1248
1249static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1250 struct ethtool_pauseparam *pause)
1251{
1252 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1253
1254 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1255 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1256 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1257
1258 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1259 pfcc_pl);
1260}
1261
1262static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1263 struct ethtool_pauseparam *pause)
1264{
1265 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1266 bool pause_en = pause->tx_pause || pause->rx_pause;
1267 int err;
1268
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001269 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1270 netdev_err(dev, "PFC already enabled on port\n");
1271 return -EINVAL;
1272 }
1273
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001274 if (pause->autoneg) {
1275 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1276 return -EINVAL;
1277 }
1278
1279 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1280 if (err) {
1281 netdev_err(dev, "Failed to configure port's headroom\n");
1282 return err;
1283 }
1284
1285 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1286 if (err) {
1287 netdev_err(dev, "Failed to set PAUSE parameters\n");
1288 goto err_port_pause_configure;
1289 }
1290
1291 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1292 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1293
1294 return 0;
1295
1296err_port_pause_configure:
1297 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1298 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1299 return err;
1300}
1301
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001302struct mlxsw_sp_port_hw_stats {
1303 char str[ETH_GSTRING_LEN];
1304 u64 (*getter)(char *payload);
1305};
1306
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001307static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001308 {
1309 .str = "a_frames_transmitted_ok",
1310 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1311 },
1312 {
1313 .str = "a_frames_received_ok",
1314 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1315 },
1316 {
1317 .str = "a_frame_check_sequence_errors",
1318 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1319 },
1320 {
1321 .str = "a_alignment_errors",
1322 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1323 },
1324 {
1325 .str = "a_octets_transmitted_ok",
1326 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1327 },
1328 {
1329 .str = "a_octets_received_ok",
1330 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1331 },
1332 {
1333 .str = "a_multicast_frames_xmitted_ok",
1334 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1335 },
1336 {
1337 .str = "a_broadcast_frames_xmitted_ok",
1338 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1339 },
1340 {
1341 .str = "a_multicast_frames_received_ok",
1342 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1343 },
1344 {
1345 .str = "a_broadcast_frames_received_ok",
1346 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1347 },
1348 {
1349 .str = "a_in_range_length_errors",
1350 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1351 },
1352 {
1353 .str = "a_out_of_range_length_field",
1354 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1355 },
1356 {
1357 .str = "a_frame_too_long_errors",
1358 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1359 },
1360 {
1361 .str = "a_symbol_error_during_carrier",
1362 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1363 },
1364 {
1365 .str = "a_mac_control_frames_transmitted",
1366 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1367 },
1368 {
1369 .str = "a_mac_control_frames_received",
1370 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1371 },
1372 {
1373 .str = "a_unsupported_opcodes_received",
1374 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1375 },
1376 {
1377 .str = "a_pause_mac_ctrl_frames_received",
1378 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1379 },
1380 {
1381 .str = "a_pause_mac_ctrl_frames_xmitted",
1382 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1383 },
1384};
1385
1386#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1387
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001388static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1389 {
1390 .str = "rx_octets_prio",
1391 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1392 },
1393 {
1394 .str = "rx_frames_prio",
1395 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1396 },
1397 {
1398 .str = "tx_octets_prio",
1399 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1400 },
1401 {
1402 .str = "tx_frames_prio",
1403 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1404 },
1405 {
1406 .str = "rx_pause_prio",
1407 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1408 },
1409 {
1410 .str = "rx_pause_duration_prio",
1411 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1412 },
1413 {
1414 .str = "tx_pause_prio",
1415 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1416 },
1417 {
1418 .str = "tx_pause_duration_prio",
1419 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1420 },
1421};
1422
1423#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1424
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001425static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1426{
1427 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1428
1429 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1430}
1431
1432static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1433 {
1434 .str = "tc_transmit_queue_tc",
1435 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1436 },
1437 {
1438 .str = "tc_no_buffer_discard_uc_tc",
1439 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1440 },
1441};
1442
1443#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1444
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001445#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001446 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1447 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001448 IEEE_8021QAZ_MAX_TCS)
1449
1450static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1451{
1452 int i;
1453
1454 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1455 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1456 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1457 *p += ETH_GSTRING_LEN;
1458 }
1459}
1460
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001461static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1462{
1463 int i;
1464
1465 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1466 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1467 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1468 *p += ETH_GSTRING_LEN;
1469 }
1470}
1471
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001472static void mlxsw_sp_port_get_strings(struct net_device *dev,
1473 u32 stringset, u8 *data)
1474{
1475 u8 *p = data;
1476 int i;
1477
1478 switch (stringset) {
1479 case ETH_SS_STATS:
1480 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1481 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1482 ETH_GSTRING_LEN);
1483 p += ETH_GSTRING_LEN;
1484 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001485
1486 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1487 mlxsw_sp_port_get_prio_strings(&p, i);
1488
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001489 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1490 mlxsw_sp_port_get_tc_strings(&p, i);
1491
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001492 break;
1493 }
1494}
1495
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001496static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1497 enum ethtool_phys_id_state state)
1498{
1499 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1500 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1501 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1502 bool active;
1503
1504 switch (state) {
1505 case ETHTOOL_ID_ACTIVE:
1506 active = true;
1507 break;
1508 case ETHTOOL_ID_INACTIVE:
1509 active = false;
1510 break;
1511 default:
1512 return -EOPNOTSUPP;
1513 }
1514
1515 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1516 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1517}
1518
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001519static int
1520mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1521 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1522{
1523 switch (grp) {
1524 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1525 *p_hw_stats = mlxsw_sp_port_hw_stats;
1526 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1527 break;
1528 case MLXSW_REG_PPCNT_PRIO_CNT:
1529 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1530 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1531 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001532 case MLXSW_REG_PPCNT_TC_CNT:
1533 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1534 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1535 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001536 default:
1537 WARN_ON(1);
1538 return -ENOTSUPP;
1539 }
1540 return 0;
1541}
1542
1543static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1544 enum mlxsw_reg_ppcnt_grp grp, int prio,
1545 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001546{
1547 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1548 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001549 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001550 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001551 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001552 int err;
1553
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001554 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1555 if (err)
1556 return;
1557 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001558 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001559 for (i = 0; i < len; i++)
1560 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1561}
1562
1563static void mlxsw_sp_port_get_stats(struct net_device *dev,
1564 struct ethtool_stats *stats, u64 *data)
1565{
1566 int i, data_index = 0;
1567
1568 /* IEEE 802.3 Counters */
1569 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1570 data, data_index);
1571 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1572
1573 /* Per-Priority Counters */
1574 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1575 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1576 data, data_index);
1577 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1578 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001579
1580 /* Per-TC Counters */
1581 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1582 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1583 data, data_index);
1584 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1585 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001586}
1587
1588static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1589{
1590 switch (sset) {
1591 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001592 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001593 default:
1594 return -EOPNOTSUPP;
1595 }
1596}
1597
1598struct mlxsw_sp_port_link_mode {
1599 u32 mask;
1600 u32 supported;
1601 u32 advertised;
1602 u32 speed;
1603};
1604
1605static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1606 {
1607 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1608 .supported = SUPPORTED_100baseT_Full,
1609 .advertised = ADVERTISED_100baseT_Full,
1610 .speed = 100,
1611 },
1612 {
1613 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1614 .speed = 100,
1615 },
1616 {
1617 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1618 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1619 .supported = SUPPORTED_1000baseKX_Full,
1620 .advertised = ADVERTISED_1000baseKX_Full,
1621 .speed = 1000,
1622 },
1623 {
1624 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1625 .supported = SUPPORTED_10000baseT_Full,
1626 .advertised = ADVERTISED_10000baseT_Full,
1627 .speed = 10000,
1628 },
1629 {
1630 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1631 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1632 .supported = SUPPORTED_10000baseKX4_Full,
1633 .advertised = ADVERTISED_10000baseKX4_Full,
1634 .speed = 10000,
1635 },
1636 {
1637 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1638 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1639 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1640 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1641 .supported = SUPPORTED_10000baseKR_Full,
1642 .advertised = ADVERTISED_10000baseKR_Full,
1643 .speed = 10000,
1644 },
1645 {
1646 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1647 .supported = SUPPORTED_20000baseKR2_Full,
1648 .advertised = ADVERTISED_20000baseKR2_Full,
1649 .speed = 20000,
1650 },
1651 {
1652 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1653 .supported = SUPPORTED_40000baseCR4_Full,
1654 .advertised = ADVERTISED_40000baseCR4_Full,
1655 .speed = 40000,
1656 },
1657 {
1658 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1659 .supported = SUPPORTED_40000baseKR4_Full,
1660 .advertised = ADVERTISED_40000baseKR4_Full,
1661 .speed = 40000,
1662 },
1663 {
1664 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1665 .supported = SUPPORTED_40000baseSR4_Full,
1666 .advertised = ADVERTISED_40000baseSR4_Full,
1667 .speed = 40000,
1668 },
1669 {
1670 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1671 .supported = SUPPORTED_40000baseLR4_Full,
1672 .advertised = ADVERTISED_40000baseLR4_Full,
1673 .speed = 40000,
1674 },
1675 {
1676 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1677 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1678 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1679 .speed = 25000,
1680 },
1681 {
1682 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1683 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1684 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1685 .speed = 50000,
1686 },
1687 {
1688 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1689 .supported = SUPPORTED_56000baseKR4_Full,
1690 .advertised = ADVERTISED_56000baseKR4_Full,
1691 .speed = 56000,
1692 },
1693 {
1694 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1695 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1696 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1697 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1698 .speed = 100000,
1699 },
1700};
1701
1702#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1703
1704static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1705{
1706 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1707 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1708 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1709 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1710 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1711 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1712 return SUPPORTED_FIBRE;
1713
1714 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1715 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1716 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1717 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1718 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1719 return SUPPORTED_Backplane;
1720 return 0;
1721}
1722
1723static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1724{
1725 u32 modes = 0;
1726 int i;
1727
1728 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1729 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1730 modes |= mlxsw_sp_port_link_mode[i].supported;
1731 }
1732 return modes;
1733}
1734
1735static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1736{
1737 u32 modes = 0;
1738 int i;
1739
1740 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1741 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1742 modes |= mlxsw_sp_port_link_mode[i].advertised;
1743 }
1744 return modes;
1745}
1746
1747static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1748 struct ethtool_cmd *cmd)
1749{
1750 u32 speed = SPEED_UNKNOWN;
1751 u8 duplex = DUPLEX_UNKNOWN;
1752 int i;
1753
1754 if (!carrier_ok)
1755 goto out;
1756
1757 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1758 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1759 speed = mlxsw_sp_port_link_mode[i].speed;
1760 duplex = DUPLEX_FULL;
1761 break;
1762 }
1763 }
1764out:
1765 ethtool_cmd_speed_set(cmd, speed);
1766 cmd->duplex = duplex;
1767}
1768
1769static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1770{
1771 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1772 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1773 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1774 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1775 return PORT_FIBRE;
1776
1777 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1778 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1779 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1780 return PORT_DA;
1781
1782 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1783 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1784 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1785 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1786 return PORT_NONE;
1787
1788 return PORT_OTHER;
1789}
1790
1791static int mlxsw_sp_port_get_settings(struct net_device *dev,
1792 struct ethtool_cmd *cmd)
1793{
1794 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1795 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1796 char ptys_pl[MLXSW_REG_PTYS_LEN];
1797 u32 eth_proto_cap;
1798 u32 eth_proto_admin;
1799 u32 eth_proto_oper;
1800 int err;
1801
1802 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1803 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1804 if (err) {
1805 netdev_err(dev, "Failed to get proto");
1806 return err;
1807 }
1808 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1809 &eth_proto_admin, &eth_proto_oper);
1810
1811 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1812 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
Ido Schimmelc3f15762016-07-15 11:14:59 +02001813 SUPPORTED_Pause | SUPPORTED_Asym_Pause |
1814 SUPPORTED_Autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001815 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1816 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1817 eth_proto_oper, cmd);
1818
1819 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1820 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1821 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1822
1823 cmd->transceiver = XCVR_INTERNAL;
1824 return 0;
1825}
1826
1827static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1828{
1829 u32 ptys_proto = 0;
1830 int i;
1831
1832 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1833 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1834 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1835 }
1836 return ptys_proto;
1837}
1838
1839static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1840{
1841 u32 ptys_proto = 0;
1842 int i;
1843
1844 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1845 if (speed == mlxsw_sp_port_link_mode[i].speed)
1846 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1847 }
1848 return ptys_proto;
1849}
1850
Ido Schimmel18f1e702016-02-26 17:32:31 +01001851static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1852{
1853 u32 ptys_proto = 0;
1854 int i;
1855
1856 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1857 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1858 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1859 }
1860 return ptys_proto;
1861}
1862
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001863static int mlxsw_sp_port_set_settings(struct net_device *dev,
1864 struct ethtool_cmd *cmd)
1865{
1866 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1867 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1868 char ptys_pl[MLXSW_REG_PTYS_LEN];
1869 u32 speed;
1870 u32 eth_proto_new;
1871 u32 eth_proto_cap;
1872 u32 eth_proto_admin;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001873 int err;
1874
1875 speed = ethtool_cmd_speed(cmd);
1876
1877 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1878 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1879 mlxsw_sp_to_ptys_speed(speed);
1880
1881 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1882 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1883 if (err) {
1884 netdev_err(dev, "Failed to get proto");
1885 return err;
1886 }
1887 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1888
1889 eth_proto_new = eth_proto_new & eth_proto_cap;
1890 if (!eth_proto_new) {
1891 netdev_err(dev, "Not supported proto admin requested");
1892 return -EINVAL;
1893 }
1894 if (eth_proto_new == eth_proto_admin)
1895 return 0;
1896
1897 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1898 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1899 if (err) {
1900 netdev_err(dev, "Failed to set proto admin");
1901 return err;
1902 }
1903
Ido Schimmel6277d462016-07-15 11:14:58 +02001904 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001905 return 0;
1906
1907 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1908 if (err) {
1909 netdev_err(dev, "Failed to set admin status");
1910 return err;
1911 }
1912
1913 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1914 if (err) {
1915 netdev_err(dev, "Failed to set admin status");
1916 return err;
1917 }
1918
1919 return 0;
1920}
1921
1922static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1923 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1924 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001925 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1926 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001927 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001928 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001929 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1930 .get_sset_count = mlxsw_sp_port_get_sset_count,
1931 .get_settings = mlxsw_sp_port_get_settings,
1932 .set_settings = mlxsw_sp_port_set_settings,
1933};
1934
Ido Schimmel18f1e702016-02-26 17:32:31 +01001935static int
1936mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1937{
1938 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1939 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1940 char ptys_pl[MLXSW_REG_PTYS_LEN];
1941 u32 eth_proto_admin;
1942
1943 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1944 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1945 eth_proto_admin);
1946 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1947}
1948
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001949int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1950 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1951 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02001952{
1953 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1954 char qeec_pl[MLXSW_REG_QEEC_LEN];
1955
1956 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1957 next_index);
1958 mlxsw_reg_qeec_de_set(qeec_pl, true);
1959 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1960 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1961 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1962}
1963
Ido Schimmelcc7cf512016-04-06 17:10:11 +02001964int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1965 enum mlxsw_reg_qeec_hr hr, u8 index,
1966 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02001967{
1968 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1969 char qeec_pl[MLXSW_REG_QEEC_LEN];
1970
1971 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1972 next_index);
1973 mlxsw_reg_qeec_mase_set(qeec_pl, true);
1974 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1975 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1976}
1977
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001978int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
1979 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02001980{
1981 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1982 char qtct_pl[MLXSW_REG_QTCT_LEN];
1983
1984 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
1985 tclass);
1986 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
1987}
1988
1989static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
1990{
1991 int err, i;
1992
1993 /* Setup the elements hierarcy, so that each TC is linked to
1994 * one subgroup, which are all member in the same group.
1995 */
1996 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1997 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
1998 0);
1999 if (err)
2000 return err;
2001 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2002 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2003 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2004 0, false, 0);
2005 if (err)
2006 return err;
2007 }
2008 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2009 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2010 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2011 false, 0);
2012 if (err)
2013 return err;
2014 }
2015
2016 /* Make sure the max shaper is disabled in all hierarcies that
2017 * support it.
2018 */
2019 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2020 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2021 MLXSW_REG_QEEC_MAS_DIS);
2022 if (err)
2023 return err;
2024 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2025 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2026 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2027 i, 0,
2028 MLXSW_REG_QEEC_MAS_DIS);
2029 if (err)
2030 return err;
2031 }
2032 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2033 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2034 MLXSW_REG_QEEC_HIERARCY_TC,
2035 i, i,
2036 MLXSW_REG_QEEC_MAS_DIS);
2037 if (err)
2038 return err;
2039 }
2040
2041 /* Map all priorities to traffic class 0. */
2042 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2043 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2044 if (err)
2045 return err;
2046 }
2047
2048 return 0;
2049}
2050
Ido Schimmel05978482016-08-17 16:39:30 +02002051static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2052{
2053 mlxsw_sp_port->pvid = 1;
2054
2055 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2056}
2057
2058static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2059{
2060 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2061}
2062
Ido Schimmelbe945352016-06-09 09:51:39 +02002063static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002064 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002065{
2066 struct mlxsw_sp_port *mlxsw_sp_port;
2067 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002068 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002069 int err;
2070
2071 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2072 if (!dev)
2073 return -ENOMEM;
2074 mlxsw_sp_port = netdev_priv(dev);
2075 mlxsw_sp_port->dev = dev;
2076 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2077 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002078 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002079 mlxsw_sp_port->mapping.module = module;
2080 mlxsw_sp_port->mapping.width = width;
2081 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002082 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2083 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2084 if (!mlxsw_sp_port->active_vlans) {
2085 err = -ENOMEM;
2086 goto err_port_active_vlans_alloc;
2087 }
Elad Razfc1273a2016-01-06 13:01:11 +01002088 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2089 if (!mlxsw_sp_port->untagged_vlans) {
2090 err = -ENOMEM;
2091 goto err_port_untagged_vlans_alloc;
2092 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002093 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002094 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002095
2096 mlxsw_sp_port->pcpu_stats =
2097 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2098 if (!mlxsw_sp_port->pcpu_stats) {
2099 err = -ENOMEM;
2100 goto err_alloc_stats;
2101 }
2102
2103 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2104 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2105
2106 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2107 if (err) {
2108 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2109 mlxsw_sp_port->local_port);
2110 goto err_dev_addr_init;
2111 }
2112
2113 netif_carrier_off(dev);
2114
2115 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002116 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2117 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002118
2119 /* Each packet needs to have a Tx header (metadata) on top all other
2120 * headers.
2121 */
2122 dev->hard_header_len += MLXSW_TXHDR_LEN;
2123
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002124 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2125 if (err) {
2126 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2127 mlxsw_sp_port->local_port);
2128 goto err_port_system_port_mapping_set;
2129 }
2130
2131 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2132 if (err) {
2133 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2134 mlxsw_sp_port->local_port);
2135 goto err_port_swid_set;
2136 }
2137
Ido Schimmel18f1e702016-02-26 17:32:31 +01002138 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2139 if (err) {
2140 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2141 mlxsw_sp_port->local_port);
2142 goto err_port_speed_by_width_set;
2143 }
2144
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002145 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2146 if (err) {
2147 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2148 mlxsw_sp_port->local_port);
2149 goto err_port_mtu_set;
2150 }
2151
2152 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2153 if (err)
2154 goto err_port_admin_status_set;
2155
2156 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2157 if (err) {
2158 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2159 mlxsw_sp_port->local_port);
2160 goto err_port_buffers_init;
2161 }
2162
Ido Schimmel90183b92016-04-06 17:10:08 +02002163 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2164 if (err) {
2165 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2166 mlxsw_sp_port->local_port);
2167 goto err_port_ets_init;
2168 }
2169
Ido Schimmelf00817d2016-04-06 17:10:09 +02002170 /* ETS and buffers must be initialized before DCB. */
2171 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2172 if (err) {
2173 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2174 mlxsw_sp_port->local_port);
2175 goto err_port_dcb_init;
2176 }
2177
Ido Schimmel05978482016-08-17 16:39:30 +02002178 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2179 if (err) {
2180 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2181 mlxsw_sp_port->local_port);
2182 goto err_port_pvid_vport_create;
2183 }
2184
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002185 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002186 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002187 err = register_netdev(dev);
2188 if (err) {
2189 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2190 mlxsw_sp_port->local_port);
2191 goto err_register_netdev;
2192 }
2193
Jiri Pirko932762b2016-04-08 19:11:21 +02002194 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2195 mlxsw_sp_port->local_port, dev,
2196 mlxsw_sp_port->split, module);
2197 if (err) {
2198 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2199 mlxsw_sp_port->local_port);
2200 goto err_core_port_init;
2201 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002202
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002203 return 0;
2204
Jiri Pirko932762b2016-04-08 19:11:21 +02002205err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002206 unregister_netdev(dev);
2207err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002208 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002209 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002210 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2211err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002212 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002213err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002214err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002215err_port_buffers_init:
2216err_port_admin_status_set:
2217err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002218err_port_speed_by_width_set:
Ido Schimmel05832722016-08-17 16:39:35 +02002219 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002220err_port_swid_set:
2221err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002222err_dev_addr_init:
2223 free_percpu(mlxsw_sp_port->pcpu_stats);
2224err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002225 kfree(mlxsw_sp_port->untagged_vlans);
2226err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002227 kfree(mlxsw_sp_port->active_vlans);
2228err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002229 free_netdev(dev);
2230 return err;
2231}
2232
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002233static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2234{
2235 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2236
2237 if (!mlxsw_sp_port)
2238 return;
Jiri Pirko932762b2016-04-08 19:11:21 +02002239 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002240 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002241 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002242 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002243 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002244 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002245 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2246 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002247 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002248 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002249 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002250 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002251 free_netdev(mlxsw_sp_port->dev);
2252}
2253
2254static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2255{
2256 int i;
2257
2258 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2259 mlxsw_sp_port_remove(mlxsw_sp, i);
2260 kfree(mlxsw_sp->ports);
2261}
2262
2263static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2264{
Ido Schimmeld664b412016-06-09 09:51:40 +02002265 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002266 size_t alloc_size;
2267 int i;
2268 int err;
2269
2270 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2271 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2272 if (!mlxsw_sp->ports)
2273 return -ENOMEM;
2274
2275 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002276 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002277 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002278 if (err)
2279 goto err_port_module_info_get;
2280 if (!width)
2281 continue;
2282 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002283 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2284 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002285 if (err)
2286 goto err_port_create;
2287 }
2288 return 0;
2289
2290err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002291err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002292 for (i--; i >= 1; i--)
2293 mlxsw_sp_port_remove(mlxsw_sp, i);
2294 kfree(mlxsw_sp->ports);
2295 return err;
2296}
2297
Ido Schimmel18f1e702016-02-26 17:32:31 +01002298static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2299{
2300 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2301
2302 return local_port - offset;
2303}
2304
Ido Schimmelbe945352016-06-09 09:51:39 +02002305static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2306 u8 module, unsigned int count)
2307{
2308 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2309 int err, i;
2310
2311 for (i = 0; i < count; i++) {
2312 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2313 width, i * width);
2314 if (err)
2315 goto err_port_module_map;
2316 }
2317
2318 for (i = 0; i < count; i++) {
2319 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2320 if (err)
2321 goto err_port_swid_set;
2322 }
2323
2324 for (i = 0; i < count; i++) {
2325 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002326 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002327 if (err)
2328 goto err_port_create;
2329 }
2330
2331 return 0;
2332
2333err_port_create:
2334 for (i--; i >= 0; i--)
2335 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2336 i = count;
2337err_port_swid_set:
2338 for (i--; i >= 0; i--)
2339 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2340 MLXSW_PORT_SWID_DISABLED_PORT);
2341 i = count;
2342err_port_module_map:
2343 for (i--; i >= 0; i--)
2344 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2345 return err;
2346}
2347
2348static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2349 u8 base_port, unsigned int count)
2350{
2351 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2352 int i;
2353
2354 /* Split by four means we need to re-create two ports, otherwise
2355 * only one.
2356 */
2357 count = count / 2;
2358
2359 for (i = 0; i < count; i++) {
2360 local_port = base_port + i * 2;
2361 module = mlxsw_sp->port_to_module[local_port];
2362
2363 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2364 0);
2365 }
2366
2367 for (i = 0; i < count; i++)
2368 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2369
2370 for (i = 0; i < count; i++) {
2371 local_port = base_port + i * 2;
2372 module = mlxsw_sp->port_to_module[local_port];
2373
2374 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002375 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002376 }
2377}
2378
Jiri Pirkob2f10572016-04-08 19:11:23 +02002379static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2380 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002381{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002382 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002383 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002384 u8 module, cur_width, base_port;
2385 int i;
2386 int err;
2387
2388 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2389 if (!mlxsw_sp_port) {
2390 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2391 local_port);
2392 return -EINVAL;
2393 }
2394
Ido Schimmeld664b412016-06-09 09:51:40 +02002395 module = mlxsw_sp_port->mapping.module;
2396 cur_width = mlxsw_sp_port->mapping.width;
2397
Ido Schimmel18f1e702016-02-26 17:32:31 +01002398 if (count != 2 && count != 4) {
2399 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2400 return -EINVAL;
2401 }
2402
Ido Schimmel18f1e702016-02-26 17:32:31 +01002403 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2404 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2405 return -EINVAL;
2406 }
2407
2408 /* Make sure we have enough slave (even) ports for the split. */
2409 if (count == 2) {
2410 base_port = local_port;
2411 if (mlxsw_sp->ports[base_port + 1]) {
2412 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2413 return -EINVAL;
2414 }
2415 } else {
2416 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2417 if (mlxsw_sp->ports[base_port + 1] ||
2418 mlxsw_sp->ports[base_port + 3]) {
2419 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2420 return -EINVAL;
2421 }
2422 }
2423
2424 for (i = 0; i < count; i++)
2425 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2426
Ido Schimmelbe945352016-06-09 09:51:39 +02002427 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2428 if (err) {
2429 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2430 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002431 }
2432
2433 return 0;
2434
Ido Schimmelbe945352016-06-09 09:51:39 +02002435err_port_split_create:
2436 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002437 return err;
2438}
2439
Jiri Pirkob2f10572016-04-08 19:11:23 +02002440static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002441{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002442 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002443 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002444 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002445 unsigned int count;
2446 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002447
2448 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2449 if (!mlxsw_sp_port) {
2450 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2451 local_port);
2452 return -EINVAL;
2453 }
2454
2455 if (!mlxsw_sp_port->split) {
2456 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2457 return -EINVAL;
2458 }
2459
Ido Schimmeld664b412016-06-09 09:51:40 +02002460 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002461 count = cur_width == 1 ? 4 : 2;
2462
2463 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2464
2465 /* Determine which ports to remove. */
2466 if (count == 2 && local_port >= base_port + 2)
2467 base_port = base_port + 2;
2468
2469 for (i = 0; i < count; i++)
2470 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2471
Ido Schimmelbe945352016-06-09 09:51:39 +02002472 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002473
2474 return 0;
2475}
2476
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002477static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2478 char *pude_pl, void *priv)
2479{
2480 struct mlxsw_sp *mlxsw_sp = priv;
2481 struct mlxsw_sp_port *mlxsw_sp_port;
2482 enum mlxsw_reg_pude_oper_status status;
2483 u8 local_port;
2484
2485 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2486 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002487 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002488 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002489
2490 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2491 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2492 netdev_info(mlxsw_sp_port->dev, "link up\n");
2493 netif_carrier_on(mlxsw_sp_port->dev);
2494 } else {
2495 netdev_info(mlxsw_sp_port->dev, "link down\n");
2496 netif_carrier_off(mlxsw_sp_port->dev);
2497 }
2498}
2499
2500static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2501 .func = mlxsw_sp_pude_event_func,
2502 .trap_id = MLXSW_TRAP_ID_PUDE,
2503};
2504
2505static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2506 enum mlxsw_event_trap_id trap_id)
2507{
2508 struct mlxsw_event_listener *el;
2509 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2510 int err;
2511
2512 switch (trap_id) {
2513 case MLXSW_TRAP_ID_PUDE:
2514 el = &mlxsw_sp_pude_event;
2515 break;
2516 }
2517 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2518 if (err)
2519 return err;
2520
2521 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2522 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2523 if (err)
2524 goto err_event_trap_set;
2525
2526 return 0;
2527
2528err_event_trap_set:
2529 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2530 return err;
2531}
2532
2533static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2534 enum mlxsw_event_trap_id trap_id)
2535{
2536 struct mlxsw_event_listener *el;
2537
2538 switch (trap_id) {
2539 case MLXSW_TRAP_ID_PUDE:
2540 el = &mlxsw_sp_pude_event;
2541 break;
2542 }
2543 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2544}
2545
2546static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2547 void *priv)
2548{
2549 struct mlxsw_sp *mlxsw_sp = priv;
2550 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2551 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2552
2553 if (unlikely(!mlxsw_sp_port)) {
2554 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2555 local_port);
2556 return;
2557 }
2558
2559 skb->dev = mlxsw_sp_port->dev;
2560
2561 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2562 u64_stats_update_begin(&pcpu_stats->syncp);
2563 pcpu_stats->rx_packets++;
2564 pcpu_stats->rx_bytes += skb->len;
2565 u64_stats_update_end(&pcpu_stats->syncp);
2566
2567 skb->protocol = eth_type_trans(skb, skb->dev);
2568 netif_receive_skb(skb);
2569}
2570
2571static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
2572 {
2573 .func = mlxsw_sp_rx_listener_func,
2574 .local_port = MLXSW_PORT_DONT_CARE,
2575 .trap_id = MLXSW_TRAP_ID_FDB_MC,
2576 },
2577 /* Traps for specific L2 packet types, not trapped as FDB MC */
2578 {
2579 .func = mlxsw_sp_rx_listener_func,
2580 .local_port = MLXSW_PORT_DONT_CARE,
2581 .trap_id = MLXSW_TRAP_ID_STP,
2582 },
2583 {
2584 .func = mlxsw_sp_rx_listener_func,
2585 .local_port = MLXSW_PORT_DONT_CARE,
2586 .trap_id = MLXSW_TRAP_ID_LACP,
2587 },
2588 {
2589 .func = mlxsw_sp_rx_listener_func,
2590 .local_port = MLXSW_PORT_DONT_CARE,
2591 .trap_id = MLXSW_TRAP_ID_EAPOL,
2592 },
2593 {
2594 .func = mlxsw_sp_rx_listener_func,
2595 .local_port = MLXSW_PORT_DONT_CARE,
2596 .trap_id = MLXSW_TRAP_ID_LLDP,
2597 },
2598 {
2599 .func = mlxsw_sp_rx_listener_func,
2600 .local_port = MLXSW_PORT_DONT_CARE,
2601 .trap_id = MLXSW_TRAP_ID_MMRP,
2602 },
2603 {
2604 .func = mlxsw_sp_rx_listener_func,
2605 .local_port = MLXSW_PORT_DONT_CARE,
2606 .trap_id = MLXSW_TRAP_ID_MVRP,
2607 },
2608 {
2609 .func = mlxsw_sp_rx_listener_func,
2610 .local_port = MLXSW_PORT_DONT_CARE,
2611 .trap_id = MLXSW_TRAP_ID_RPVST,
2612 },
2613 {
2614 .func = mlxsw_sp_rx_listener_func,
2615 .local_port = MLXSW_PORT_DONT_CARE,
2616 .trap_id = MLXSW_TRAP_ID_DHCP,
2617 },
2618 {
2619 .func = mlxsw_sp_rx_listener_func,
2620 .local_port = MLXSW_PORT_DONT_CARE,
2621 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
2622 },
2623 {
2624 .func = mlxsw_sp_rx_listener_func,
2625 .local_port = MLXSW_PORT_DONT_CARE,
2626 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
2627 },
2628 {
2629 .func = mlxsw_sp_rx_listener_func,
2630 .local_port = MLXSW_PORT_DONT_CARE,
2631 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
2632 },
2633 {
2634 .func = mlxsw_sp_rx_listener_func,
2635 .local_port = MLXSW_PORT_DONT_CARE,
2636 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
2637 },
2638 {
2639 .func = mlxsw_sp_rx_listener_func,
2640 .local_port = MLXSW_PORT_DONT_CARE,
2641 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
2642 },
Jiri Pirko7b27ce72016-07-02 11:00:20 +02002643 {
2644 .func = mlxsw_sp_rx_listener_func,
2645 .local_port = MLXSW_PORT_DONT_CARE,
2646 .trap_id = MLXSW_TRAP_ID_ARPBC,
2647 },
2648 {
2649 .func = mlxsw_sp_rx_listener_func,
2650 .local_port = MLXSW_PORT_DONT_CARE,
2651 .trap_id = MLXSW_TRAP_ID_ARPUC,
2652 },
2653 {
2654 .func = mlxsw_sp_rx_listener_func,
2655 .local_port = MLXSW_PORT_DONT_CARE,
Elad Razc20b8012016-08-17 16:39:32 +02002656 .trap_id = MLXSW_TRAP_ID_MTUERROR,
2657 },
2658 {
2659 .func = mlxsw_sp_rx_listener_func,
2660 .local_port = MLXSW_PORT_DONT_CARE,
2661 .trap_id = MLXSW_TRAP_ID_TTLERROR,
2662 },
2663 {
2664 .func = mlxsw_sp_rx_listener_func,
2665 .local_port = MLXSW_PORT_DONT_CARE,
Ido Schimmela94a6142016-08-17 16:39:33 +02002666 .trap_id = MLXSW_TRAP_ID_LBERROR,
2667 },
2668 {
2669 .func = mlxsw_sp_rx_listener_func,
2670 .local_port = MLXSW_PORT_DONT_CARE,
Elad Razc20b8012016-08-17 16:39:32 +02002671 .trap_id = MLXSW_TRAP_ID_OSPF,
2672 },
2673 {
2674 .func = mlxsw_sp_rx_listener_func,
2675 .local_port = MLXSW_PORT_DONT_CARE,
Jiri Pirko7b27ce72016-07-02 11:00:20 +02002676 .trap_id = MLXSW_TRAP_ID_IP2ME,
2677 },
2678 {
2679 .func = mlxsw_sp_rx_listener_func,
2680 .local_port = MLXSW_PORT_DONT_CARE,
2681 .trap_id = MLXSW_TRAP_ID_RTR_INGRESS0,
2682 },
2683 {
2684 .func = mlxsw_sp_rx_listener_func,
2685 .local_port = MLXSW_PORT_DONT_CARE,
2686 .trap_id = MLXSW_TRAP_ID_HOST_MISS_IPV4,
2687 },
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002688};
2689
2690static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2691{
2692 char htgt_pl[MLXSW_REG_HTGT_LEN];
2693 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2694 int i;
2695 int err;
2696
2697 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2698 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2699 if (err)
2700 return err;
2701
2702 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2703 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2704 if (err)
2705 return err;
2706
2707 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2708 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2709 &mlxsw_sp_rx_listener[i],
2710 mlxsw_sp);
2711 if (err)
2712 goto err_rx_listener_register;
2713
2714 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
2715 mlxsw_sp_rx_listener[i].trap_id);
2716 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2717 if (err)
2718 goto err_rx_trap_set;
2719 }
2720 return 0;
2721
2722err_rx_trap_set:
2723 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2724 &mlxsw_sp_rx_listener[i],
2725 mlxsw_sp);
2726err_rx_listener_register:
2727 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002728 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002729 mlxsw_sp_rx_listener[i].trap_id);
2730 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2731
2732 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2733 &mlxsw_sp_rx_listener[i],
2734 mlxsw_sp);
2735 }
2736 return err;
2737}
2738
2739static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2740{
2741 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2742 int i;
2743
2744 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002745 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002746 mlxsw_sp_rx_listener[i].trap_id);
2747 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2748
2749 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2750 &mlxsw_sp_rx_listener[i],
2751 mlxsw_sp);
2752 }
2753}
2754
2755static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2756 enum mlxsw_reg_sfgc_type type,
2757 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2758{
2759 enum mlxsw_flood_table_type table_type;
2760 enum mlxsw_sp_flood_table flood_table;
2761 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2762
Ido Schimmel19ae6122015-12-15 16:03:39 +01002763 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002764 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002765 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002766 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002767
2768 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2769 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2770 else
2771 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002772
2773 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2774 flood_table);
2775 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2776}
2777
2778static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2779{
2780 int type, err;
2781
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002782 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2783 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2784 continue;
2785
2786 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2787 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2788 if (err)
2789 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002790
2791 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2792 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2793 if (err)
2794 return err;
2795 }
2796
2797 return 0;
2798}
2799
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002800static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2801{
2802 char slcr_pl[MLXSW_REG_SLCR_LEN];
2803
2804 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2805 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2806 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2807 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2808 MLXSW_REG_SLCR_LAG_HASH_SIP |
2809 MLXSW_REG_SLCR_LAG_HASH_DIP |
2810 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2811 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2812 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2813 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2814}
2815
Jiri Pirkob2f10572016-04-08 19:11:23 +02002816static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002817 const struct mlxsw_bus_info *mlxsw_bus_info)
2818{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002819 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002820 int err;
2821
2822 mlxsw_sp->core = mlxsw_core;
2823 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002824 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002825 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002826 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002827
2828 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2829 if (err) {
2830 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2831 return err;
2832 }
2833
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002834 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2835 if (err) {
2836 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002837 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002838 }
2839
2840 err = mlxsw_sp_traps_init(mlxsw_sp);
2841 if (err) {
2842 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2843 goto err_rx_listener_register;
2844 }
2845
2846 err = mlxsw_sp_flood_init(mlxsw_sp);
2847 if (err) {
2848 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2849 goto err_flood_init;
2850 }
2851
2852 err = mlxsw_sp_buffers_init(mlxsw_sp);
2853 if (err) {
2854 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2855 goto err_buffers_init;
2856 }
2857
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002858 err = mlxsw_sp_lag_init(mlxsw_sp);
2859 if (err) {
2860 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2861 goto err_lag_init;
2862 }
2863
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002864 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2865 if (err) {
2866 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2867 goto err_switchdev_init;
2868 }
2869
Ido Schimmel464dce12016-07-02 11:00:15 +02002870 err = mlxsw_sp_router_init(mlxsw_sp);
2871 if (err) {
2872 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2873 goto err_router_init;
2874 }
2875
Yotam Gigi763b4b72016-07-21 12:03:17 +02002876 err = mlxsw_sp_span_init(mlxsw_sp);
2877 if (err) {
2878 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2879 goto err_span_init;
2880 }
2881
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002882 err = mlxsw_sp_ports_create(mlxsw_sp);
2883 if (err) {
2884 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2885 goto err_ports_create;
2886 }
2887
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002888 return 0;
2889
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002890err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02002891 mlxsw_sp_span_fini(mlxsw_sp);
2892err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02002893 mlxsw_sp_router_fini(mlxsw_sp);
2894err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002895 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002896err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002897err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02002898 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002899err_buffers_init:
2900err_flood_init:
2901 mlxsw_sp_traps_fini(mlxsw_sp);
2902err_rx_listener_register:
2903 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002904 return err;
2905}
2906
Jiri Pirkob2f10572016-04-08 19:11:23 +02002907static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002908{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002909 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002910 int i;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002911
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002912 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002913 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02002914 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002915 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02002916 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002917 mlxsw_sp_traps_fini(mlxsw_sp);
2918 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002919 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02002920 WARN_ON(!list_empty(&mlxsw_sp->fids));
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002921 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2922 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002923}
2924
2925static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2926 .used_max_vepa_channels = 1,
2927 .max_vepa_channels = 0,
2928 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002929 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002930 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002931 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002932 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01002933 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002934 .used_max_pgt = 1,
2935 .max_pgt = 0,
2936 .used_max_system_port = 1,
2937 .max_system_port = 64,
2938 .used_max_vlan_groups = 1,
2939 .max_vlan_groups = 127,
2940 .used_max_regions = 1,
2941 .max_regions = 400,
2942 .used_flood_tables = 1,
2943 .used_flood_mode = 1,
2944 .flood_mode = 3,
2945 .max_fid_offset_flood_tables = 2,
2946 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01002947 .max_fid_flood_tables = 2,
2948 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002949 .used_max_ib_mc = 1,
2950 .max_ib_mc = 0,
2951 .used_max_pkey = 1,
2952 .max_pkey = 0,
Jiri Pirkoc6022422016-07-05 11:27:46 +02002953 .used_kvd_sizes = 1,
2954 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2955 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2956 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002957 .swid_config = {
2958 {
2959 .used_type = 1,
2960 .type = MLXSW_PORT_SWID_TYPE_ETH,
2961 }
2962 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02002963 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002964};
2965
2966static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02002967 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2968 .owner = THIS_MODULE,
2969 .priv_size = sizeof(struct mlxsw_sp),
2970 .init = mlxsw_sp_init,
2971 .fini = mlxsw_sp_fini,
2972 .port_split = mlxsw_sp_port_split,
2973 .port_unsplit = mlxsw_sp_port_unsplit,
2974 .sb_pool_get = mlxsw_sp_sb_pool_get,
2975 .sb_pool_set = mlxsw_sp_sb_pool_set,
2976 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2977 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2978 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2979 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2980 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2981 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2982 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2983 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2984 .txhdr_construct = mlxsw_sp_txhdr_construct,
2985 .txhdr_len = MLXSW_TXHDR_LEN,
2986 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002987};
2988
Jiri Pirko7ce856a2016-07-04 08:23:12 +02002989static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2990{
2991 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2992}
2993
2994static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
2995{
2996 struct net_device *lower_dev;
2997 struct list_head *iter;
2998
2999 if (mlxsw_sp_port_dev_check(dev))
3000 return netdev_priv(dev);
3001
3002 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
3003 if (mlxsw_sp_port_dev_check(lower_dev))
3004 return netdev_priv(lower_dev);
3005 }
3006 return NULL;
3007}
3008
3009static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3010{
3011 struct mlxsw_sp_port *mlxsw_sp_port;
3012
3013 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3014 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3015}
3016
3017static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3018{
3019 struct net_device *lower_dev;
3020 struct list_head *iter;
3021
3022 if (mlxsw_sp_port_dev_check(dev))
3023 return netdev_priv(dev);
3024
3025 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
3026 if (mlxsw_sp_port_dev_check(lower_dev))
3027 return netdev_priv(lower_dev);
3028 }
3029 return NULL;
3030}
3031
3032struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3033{
3034 struct mlxsw_sp_port *mlxsw_sp_port;
3035
3036 rcu_read_lock();
3037 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3038 if (mlxsw_sp_port)
3039 dev_hold(mlxsw_sp_port->dev);
3040 rcu_read_unlock();
3041 return mlxsw_sp_port;
3042}
3043
3044void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3045{
3046 dev_put(mlxsw_sp_port->dev);
3047}
3048
Ido Schimmel99724c12016-07-04 08:23:14 +02003049static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3050 unsigned long event)
3051{
3052 switch (event) {
3053 case NETDEV_UP:
3054 if (!r)
3055 return true;
3056 r->ref_count++;
3057 return false;
3058 case NETDEV_DOWN:
3059 if (r && --r->ref_count == 0)
3060 return true;
3061 /* It is possible we already removed the RIF ourselves
3062 * if it was assigned to a netdev that is now a bridge
3063 * or LAG slave.
3064 */
3065 return false;
3066 }
3067
3068 return false;
3069}
3070
3071static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3072{
3073 int i;
3074
3075 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3076 if (!mlxsw_sp->rifs[i])
3077 return i;
3078
3079 return MLXSW_SP_RIF_MAX;
3080}
3081
3082static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3083 bool *p_lagged, u16 *p_system_port)
3084{
3085 u8 local_port = mlxsw_sp_vport->local_port;
3086
3087 *p_lagged = mlxsw_sp_vport->lagged;
3088 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3089}
3090
3091static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3092 struct net_device *l3_dev, u16 rif,
3093 bool create)
3094{
3095 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3096 bool lagged = mlxsw_sp_vport->lagged;
3097 char ritr_pl[MLXSW_REG_RITR_LEN];
3098 u16 system_port;
3099
3100 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3101 l3_dev->mtu, l3_dev->dev_addr);
3102
3103 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3104 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3105 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3106
3107 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3108}
3109
3110static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3111
3112static struct mlxsw_sp_fid *
3113mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3114{
3115 struct mlxsw_sp_fid *f;
3116
3117 f = kzalloc(sizeof(*f), GFP_KERNEL);
3118 if (!f)
3119 return NULL;
3120
3121 f->leave = mlxsw_sp_vport_rif_sp_leave;
3122 f->ref_count = 0;
3123 f->dev = l3_dev;
3124 f->fid = fid;
3125
3126 return f;
3127}
3128
3129static struct mlxsw_sp_rif *
3130mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3131{
3132 struct mlxsw_sp_rif *r;
3133
3134 r = kzalloc(sizeof(*r), GFP_KERNEL);
3135 if (!r)
3136 return NULL;
3137
3138 ether_addr_copy(r->addr, l3_dev->dev_addr);
3139 r->mtu = l3_dev->mtu;
3140 r->ref_count = 1;
3141 r->dev = l3_dev;
3142 r->rif = rif;
3143 r->f = f;
3144
3145 return r;
3146}
3147
3148static struct mlxsw_sp_rif *
3149mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3150 struct net_device *l3_dev)
3151{
3152 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3153 struct mlxsw_sp_fid *f;
3154 struct mlxsw_sp_rif *r;
3155 u16 fid, rif;
3156 int err;
3157
3158 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3159 if (rif == MLXSW_SP_RIF_MAX)
3160 return ERR_PTR(-ERANGE);
3161
3162 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3163 if (err)
3164 return ERR_PTR(err);
3165
3166 fid = mlxsw_sp_rif_sp_to_fid(rif);
3167 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3168 if (err)
3169 goto err_rif_fdb_op;
3170
3171 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3172 if (!f) {
3173 err = -ENOMEM;
3174 goto err_rfid_alloc;
3175 }
3176
3177 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3178 if (!r) {
3179 err = -ENOMEM;
3180 goto err_rif_alloc;
3181 }
3182
3183 f->r = r;
3184 mlxsw_sp->rifs[rif] = r;
3185
3186 return r;
3187
3188err_rif_alloc:
3189 kfree(f);
3190err_rfid_alloc:
3191 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3192err_rif_fdb_op:
3193 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3194 return ERR_PTR(err);
3195}
3196
3197static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3198 struct mlxsw_sp_rif *r)
3199{
3200 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3201 struct net_device *l3_dev = r->dev;
3202 struct mlxsw_sp_fid *f = r->f;
3203 u16 fid = f->fid;
3204 u16 rif = r->rif;
3205
3206 mlxsw_sp->rifs[rif] = NULL;
3207 f->r = NULL;
3208
3209 kfree(r);
3210
3211 kfree(f);
3212
3213 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3214
3215 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3216}
3217
3218static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3219 struct net_device *l3_dev)
3220{
3221 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3222 struct mlxsw_sp_rif *r;
3223
3224 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3225 if (!r) {
3226 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3227 if (IS_ERR(r))
3228 return PTR_ERR(r);
3229 }
3230
3231 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3232 r->f->ref_count++;
3233
3234 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3235
3236 return 0;
3237}
3238
3239static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3240{
3241 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3242
3243 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3244
3245 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3246 if (--f->ref_count == 0)
3247 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3248}
3249
3250static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3251 struct net_device *port_dev,
3252 unsigned long event, u16 vid)
3253{
3254 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3255 struct mlxsw_sp_port *mlxsw_sp_vport;
3256
3257 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3258 if (WARN_ON(!mlxsw_sp_vport))
3259 return -EINVAL;
3260
3261 switch (event) {
3262 case NETDEV_UP:
3263 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3264 case NETDEV_DOWN:
3265 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3266 break;
3267 }
3268
3269 return 0;
3270}
3271
3272static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3273 unsigned long event)
3274{
3275 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3276 return 0;
3277
3278 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3279}
3280
3281static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3282 struct net_device *lag_dev,
3283 unsigned long event, u16 vid)
3284{
3285 struct net_device *port_dev;
3286 struct list_head *iter;
3287 int err;
3288
3289 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3290 if (mlxsw_sp_port_dev_check(port_dev)) {
3291 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3292 event, vid);
3293 if (err)
3294 return err;
3295 }
3296 }
3297
3298 return 0;
3299}
3300
3301static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3302 unsigned long event)
3303{
3304 if (netif_is_bridge_port(lag_dev))
3305 return 0;
3306
3307 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3308}
3309
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003310static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3311 struct net_device *l3_dev)
3312{
3313 u16 fid;
3314
3315 if (is_vlan_dev(l3_dev))
3316 fid = vlan_dev_vlan_id(l3_dev);
3317 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3318 fid = 1;
3319 else
3320 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3321
3322 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3323}
3324
3325static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3326{
3327 if (mlxsw_sp_fid_is_vfid(fid))
3328 return MLXSW_REG_RITR_FID_IF;
3329 else
3330 return MLXSW_REG_RITR_VLAN_IF;
3331}
3332
3333static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3334 struct net_device *l3_dev,
3335 u16 fid, u16 rif,
3336 bool create)
3337{
3338 enum mlxsw_reg_ritr_if_type rif_type;
3339 char ritr_pl[MLXSW_REG_RITR_LEN];
3340
3341 rif_type = mlxsw_sp_rif_type_get(fid);
3342 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3343 l3_dev->dev_addr);
3344 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3345
3346 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3347}
3348
3349static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3350 struct net_device *l3_dev,
3351 struct mlxsw_sp_fid *f)
3352{
3353 struct mlxsw_sp_rif *r;
3354 u16 rif;
3355 int err;
3356
3357 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3358 if (rif == MLXSW_SP_RIF_MAX)
3359 return -ERANGE;
3360
3361 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3362 if (err)
3363 return err;
3364
3365 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3366 if (err)
3367 goto err_rif_fdb_op;
3368
3369 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3370 if (!r) {
3371 err = -ENOMEM;
3372 goto err_rif_alloc;
3373 }
3374
3375 f->r = r;
3376 mlxsw_sp->rifs[rif] = r;
3377
3378 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3379
3380 return 0;
3381
3382err_rif_alloc:
3383 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3384err_rif_fdb_op:
3385 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3386 return err;
3387}
3388
3389void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3390 struct mlxsw_sp_rif *r)
3391{
3392 struct net_device *l3_dev = r->dev;
3393 struct mlxsw_sp_fid *f = r->f;
3394 u16 rif = r->rif;
3395
3396 mlxsw_sp->rifs[rif] = NULL;
3397 f->r = NULL;
3398
3399 kfree(r);
3400
3401 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3402
3403 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3404
3405 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3406}
3407
3408static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3409 struct net_device *br_dev,
3410 unsigned long event)
3411{
3412 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3413 struct mlxsw_sp_fid *f;
3414
3415 /* FID can either be an actual FID if the L3 device is the
3416 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3417 * L3 device is a VLAN-unaware bridge and we get a vFID.
3418 */
3419 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3420 if (WARN_ON(!f))
3421 return -EINVAL;
3422
3423 switch (event) {
3424 case NETDEV_UP:
3425 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3426 case NETDEV_DOWN:
3427 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3428 break;
3429 }
3430
3431 return 0;
3432}
3433
Ido Schimmel99724c12016-07-04 08:23:14 +02003434static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3435 unsigned long event)
3436{
3437 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003438 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003439 u16 vid = vlan_dev_vlan_id(vlan_dev);
3440
3441 if (mlxsw_sp_port_dev_check(real_dev))
3442 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3443 vid);
3444 else if (netif_is_lag_master(real_dev))
3445 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3446 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003447 else if (netif_is_bridge_master(real_dev) &&
3448 mlxsw_sp->master_bridge.dev == real_dev)
3449 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3450 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003451
3452 return 0;
3453}
3454
3455static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3456 unsigned long event, void *ptr)
3457{
3458 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3459 struct net_device *dev = ifa->ifa_dev->dev;
3460 struct mlxsw_sp *mlxsw_sp;
3461 struct mlxsw_sp_rif *r;
3462 int err = 0;
3463
3464 mlxsw_sp = mlxsw_sp_lower_get(dev);
3465 if (!mlxsw_sp)
3466 goto out;
3467
3468 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3469 if (!mlxsw_sp_rif_should_config(r, event))
3470 goto out;
3471
3472 if (mlxsw_sp_port_dev_check(dev))
3473 err = mlxsw_sp_inetaddr_port_event(dev, event);
3474 else if (netif_is_lag_master(dev))
3475 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003476 else if (netif_is_bridge_master(dev))
3477 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003478 else if (is_vlan_dev(dev))
3479 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3480
3481out:
3482 return notifier_from_errno(err);
3483}
3484
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003485static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3486 const char *mac, int mtu)
3487{
3488 char ritr_pl[MLXSW_REG_RITR_LEN];
3489 int err;
3490
3491 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3492 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3493 if (err)
3494 return err;
3495
3496 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3497 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3498 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3499 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3500}
3501
3502static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3503{
3504 struct mlxsw_sp *mlxsw_sp;
3505 struct mlxsw_sp_rif *r;
3506 int err;
3507
3508 mlxsw_sp = mlxsw_sp_lower_get(dev);
3509 if (!mlxsw_sp)
3510 return 0;
3511
3512 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3513 if (!r)
3514 return 0;
3515
3516 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3517 if (err)
3518 return err;
3519
3520 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3521 if (err)
3522 goto err_rif_edit;
3523
3524 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3525 if (err)
3526 goto err_rif_fdb_op;
3527
3528 ether_addr_copy(r->addr, dev->dev_addr);
3529 r->mtu = dev->mtu;
3530
3531 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3532
3533 return 0;
3534
3535err_rif_fdb_op:
3536 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3537err_rif_edit:
3538 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3539 return err;
3540}
3541
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003542static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3543 u16 fid)
3544{
3545 if (mlxsw_sp_fid_is_vfid(fid))
3546 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3547 else
3548 return test_bit(fid, lag_port->active_vlans);
3549}
3550
3551static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3552 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003553{
3554 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003555 u8 local_port = mlxsw_sp_port->local_port;
3556 u16 lag_id = mlxsw_sp_port->lag_id;
3557 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003558
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003559 if (!mlxsw_sp_port->lagged)
3560 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003561
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003562 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3563 struct mlxsw_sp_port *lag_port;
3564
3565 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3566 if (!lag_port || lag_port->local_port == local_port)
3567 continue;
3568 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3569 count++;
3570 }
3571
3572 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003573}
3574
3575static int
3576mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3577 u16 fid)
3578{
3579 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3580 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3581
3582 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3583 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3584 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3585 mlxsw_sp_port->local_port);
3586
Ido Schimmel22305372016-06-20 23:04:21 +02003587 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3588 mlxsw_sp_port->local_port, fid);
3589
Ido Schimmel039c49a2016-01-27 15:20:18 +01003590 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3591}
3592
3593static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003594mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3595 u16 fid)
3596{
3597 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3598 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3599
3600 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3601 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3602 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3603
Ido Schimmel22305372016-06-20 23:04:21 +02003604 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3605 mlxsw_sp_port->lag_id, fid);
3606
Ido Schimmel039c49a2016-01-27 15:20:18 +01003607 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3608}
3609
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003610int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003611{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003612 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3613 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003614
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003615 if (mlxsw_sp_port->lagged)
3616 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003617 fid);
3618 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003619 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003620}
3621
Ido Schimmel701b1862016-07-04 08:23:16 +02003622static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3623{
3624 struct mlxsw_sp_fid *f, *tmp;
3625
3626 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3627 if (--f->ref_count == 0)
3628 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3629 else
3630 WARN_ON_ONCE(1);
3631}
3632
Ido Schimmel7117a572016-06-20 23:04:06 +02003633static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3634 struct net_device *br_dev)
3635{
3636 return !mlxsw_sp->master_bridge.dev ||
3637 mlxsw_sp->master_bridge.dev == br_dev;
3638}
3639
3640static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3641 struct net_device *br_dev)
3642{
3643 mlxsw_sp->master_bridge.dev = br_dev;
3644 mlxsw_sp->master_bridge.ref_count++;
3645}
3646
3647static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3648{
Ido Schimmel701b1862016-07-04 08:23:16 +02003649 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003650 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003651 /* It's possible upper VLAN devices are still holding
3652 * references to underlying FIDs. Drop the reference
3653 * and release the resources if it was the last one.
3654 * If it wasn't, then something bad happened.
3655 */
3656 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3657 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003658}
3659
3660static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3661 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003662{
3663 struct net_device *dev = mlxsw_sp_port->dev;
3664 int err;
3665
3666 /* When port is not bridged untagged packets are tagged with
3667 * PVID=VID=1, thereby creating an implicit VLAN interface in
3668 * the device. Remove it and let bridge code take care of its
3669 * own VLANs.
3670 */
3671 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003672 if (err)
3673 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003674
Ido Schimmel7117a572016-06-20 23:04:06 +02003675 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3676
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003677 mlxsw_sp_port->learning = 1;
3678 mlxsw_sp_port->learning_sync = 1;
3679 mlxsw_sp_port->uc_flood = 1;
3680 mlxsw_sp_port->bridged = 1;
3681
3682 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003683}
3684
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003685static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003686{
3687 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003688
Ido Schimmel28a01d22016-02-18 11:30:02 +01003689 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3690
Ido Schimmel7117a572016-06-20 23:04:06 +02003691 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3692
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003693 mlxsw_sp_port->learning = 0;
3694 mlxsw_sp_port->learning_sync = 0;
3695 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003696 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003697
3698 /* Add implicit VLAN interface in the device, so that untagged
3699 * packets will be classified to the default vFID.
3700 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003701 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003702}
3703
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003704static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003705{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003706 char sldr_pl[MLXSW_REG_SLDR_LEN];
3707
3708 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3709 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3710}
3711
3712static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3713{
3714 char sldr_pl[MLXSW_REG_SLDR_LEN];
3715
3716 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3717 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3718}
3719
3720static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3721 u16 lag_id, u8 port_index)
3722{
3723 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3724 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3725
3726 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3727 lag_id, port_index);
3728 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3729}
3730
3731static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3732 u16 lag_id)
3733{
3734 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3735 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3736
3737 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3738 lag_id);
3739 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3740}
3741
3742static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3743 u16 lag_id)
3744{
3745 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3746 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3747
3748 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3749 lag_id);
3750 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3751}
3752
3753static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3754 u16 lag_id)
3755{
3756 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3757 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3758
3759 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3760 lag_id);
3761 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3762}
3763
3764static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3765 struct net_device *lag_dev,
3766 u16 *p_lag_id)
3767{
3768 struct mlxsw_sp_upper *lag;
3769 int free_lag_id = -1;
3770 int i;
3771
3772 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3773 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3774 if (lag->ref_count) {
3775 if (lag->dev == lag_dev) {
3776 *p_lag_id = i;
3777 return 0;
3778 }
3779 } else if (free_lag_id < 0) {
3780 free_lag_id = i;
3781 }
3782 }
3783 if (free_lag_id < 0)
3784 return -EBUSY;
3785 *p_lag_id = free_lag_id;
3786 return 0;
3787}
3788
3789static bool
3790mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3791 struct net_device *lag_dev,
3792 struct netdev_lag_upper_info *lag_upper_info)
3793{
3794 u16 lag_id;
3795
3796 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3797 return false;
3798 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3799 return false;
3800 return true;
3801}
3802
3803static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3804 u16 lag_id, u8 *p_port_index)
3805{
3806 int i;
3807
3808 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3809 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3810 *p_port_index = i;
3811 return 0;
3812 }
3813 }
3814 return -EBUSY;
3815}
3816
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003817static void
3818mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3819 u16 lag_id)
3820{
3821 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003822 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003823
3824 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3825 if (WARN_ON(!mlxsw_sp_vport))
3826 return;
3827
Ido Schimmel11943ff2016-07-02 11:00:12 +02003828 /* If vPort is assigned a RIF, then leave it since it's no
3829 * longer valid.
3830 */
3831 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3832 if (f)
3833 f->leave(mlxsw_sp_vport);
3834
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003835 mlxsw_sp_vport->lag_id = lag_id;
3836 mlxsw_sp_vport->lagged = 1;
3837}
3838
3839static void
3840mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3841{
3842 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003843 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003844
3845 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3846 if (WARN_ON(!mlxsw_sp_vport))
3847 return;
3848
Ido Schimmel11943ff2016-07-02 11:00:12 +02003849 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3850 if (f)
3851 f->leave(mlxsw_sp_vport);
3852
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003853 mlxsw_sp_vport->lagged = 0;
3854}
3855
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003856static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3857 struct net_device *lag_dev)
3858{
3859 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3860 struct mlxsw_sp_upper *lag;
3861 u16 lag_id;
3862 u8 port_index;
3863 int err;
3864
3865 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3866 if (err)
3867 return err;
3868 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3869 if (!lag->ref_count) {
3870 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3871 if (err)
3872 return err;
3873 lag->dev = lag_dev;
3874 }
3875
3876 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3877 if (err)
3878 return err;
3879 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3880 if (err)
3881 goto err_col_port_add;
3882 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3883 if (err)
3884 goto err_col_port_enable;
3885
3886 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3887 mlxsw_sp_port->local_port);
3888 mlxsw_sp_port->lag_id = lag_id;
3889 mlxsw_sp_port->lagged = 1;
3890 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003891
3892 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3893
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003894 return 0;
3895
Ido Schimmel51554db2016-05-06 22:18:39 +02003896err_col_port_enable:
3897 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003898err_col_port_add:
3899 if (!lag->ref_count)
3900 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003901 return err;
3902}
3903
Ido Schimmel82e6db02016-06-20 23:04:04 +02003904static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3905 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003906{
3907 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003908 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02003909 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003910
3911 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003912 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003913 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3914 WARN_ON(lag->ref_count == 0);
3915
Ido Schimmel82e6db02016-06-20 23:04:04 +02003916 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3917 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003918
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003919 if (mlxsw_sp_port->bridged) {
3920 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003921 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003922 }
3923
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003924 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003925 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003926
3927 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3928 mlxsw_sp_port->local_port);
3929 mlxsw_sp_port->lagged = 0;
3930 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003931
3932 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003933}
3934
Jiri Pirko74581202015-12-03 12:12:30 +01003935static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3936 u16 lag_id)
3937{
3938 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3939 char sldr_pl[MLXSW_REG_SLDR_LEN];
3940
3941 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3942 mlxsw_sp_port->local_port);
3943 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3944}
3945
3946static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3947 u16 lag_id)
3948{
3949 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3950 char sldr_pl[MLXSW_REG_SLDR_LEN];
3951
3952 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3953 mlxsw_sp_port->local_port);
3954 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3955}
3956
3957static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3958 bool lag_tx_enabled)
3959{
3960 if (lag_tx_enabled)
3961 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3962 mlxsw_sp_port->lag_id);
3963 else
3964 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3965 mlxsw_sp_port->lag_id);
3966}
3967
3968static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3969 struct netdev_lag_lower_state_info *info)
3970{
3971 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3972}
3973
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003974static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3975 struct net_device *vlan_dev)
3976{
3977 struct mlxsw_sp_port *mlxsw_sp_vport;
3978 u16 vid = vlan_dev_vlan_id(vlan_dev);
3979
3980 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003981 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003982 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003983
3984 mlxsw_sp_vport->dev = vlan_dev;
3985
3986 return 0;
3987}
3988
Ido Schimmel82e6db02016-06-20 23:04:04 +02003989static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
3990 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003991{
3992 struct mlxsw_sp_port *mlxsw_sp_vport;
3993 u16 vid = vlan_dev_vlan_id(vlan_dev);
3994
3995 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003996 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02003997 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003998
3999 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004000}
4001
Jiri Pirko74581202015-12-03 12:12:30 +01004002static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4003 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004004{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004005 struct netdev_notifier_changeupper_info *info;
4006 struct mlxsw_sp_port *mlxsw_sp_port;
4007 struct net_device *upper_dev;
4008 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004009 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004010
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004011 mlxsw_sp_port = netdev_priv(dev);
4012 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4013 info = ptr;
4014
4015 switch (event) {
4016 case NETDEV_PRECHANGEUPPER:
4017 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004018 if (!is_vlan_dev(upper_dev) &&
4019 !netif_is_lag_master(upper_dev) &&
4020 !netif_is_bridge_master(upper_dev))
4021 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004022 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004023 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004024 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004025 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004026 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004027 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004028 if (netif_is_lag_master(upper_dev) &&
4029 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4030 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004031 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004032 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4033 return -EINVAL;
4034 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4035 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4036 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004037 break;
4038 case NETDEV_CHANGEUPPER:
4039 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004040 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004041 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004042 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4043 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004044 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004045 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4046 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004047 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004048 if (info->linking)
4049 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4050 upper_dev);
4051 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004052 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004053 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004054 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004055 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4056 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004057 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004058 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4059 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004060 } else {
4061 err = -EINVAL;
4062 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004063 }
4064 break;
4065 }
4066
Ido Schimmel80bedf12016-06-20 23:03:59 +02004067 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004068}
4069
Jiri Pirko74581202015-12-03 12:12:30 +01004070static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4071 unsigned long event, void *ptr)
4072{
4073 struct netdev_notifier_changelowerstate_info *info;
4074 struct mlxsw_sp_port *mlxsw_sp_port;
4075 int err;
4076
4077 mlxsw_sp_port = netdev_priv(dev);
4078 info = ptr;
4079
4080 switch (event) {
4081 case NETDEV_CHANGELOWERSTATE:
4082 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4083 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4084 info->lower_state_info);
4085 if (err)
4086 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4087 }
4088 break;
4089 }
4090
Ido Schimmel80bedf12016-06-20 23:03:59 +02004091 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004092}
4093
4094static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4095 unsigned long event, void *ptr)
4096{
4097 switch (event) {
4098 case NETDEV_PRECHANGEUPPER:
4099 case NETDEV_CHANGEUPPER:
4100 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4101 case NETDEV_CHANGELOWERSTATE:
4102 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4103 }
4104
Ido Schimmel80bedf12016-06-20 23:03:59 +02004105 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004106}
4107
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004108static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4109 unsigned long event, void *ptr)
4110{
4111 struct net_device *dev;
4112 struct list_head *iter;
4113 int ret;
4114
4115 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4116 if (mlxsw_sp_port_dev_check(dev)) {
4117 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004118 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004119 return ret;
4120 }
4121 }
4122
Ido Schimmel80bedf12016-06-20 23:03:59 +02004123 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004124}
4125
Ido Schimmel701b1862016-07-04 08:23:16 +02004126static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4127 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004128{
Ido Schimmel701b1862016-07-04 08:23:16 +02004129 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004130 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004131
Ido Schimmel701b1862016-07-04 08:23:16 +02004132 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4133 if (!f) {
4134 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4135 if (IS_ERR(f))
4136 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004137 }
4138
Ido Schimmel701b1862016-07-04 08:23:16 +02004139 f->ref_count++;
4140
4141 return 0;
4142}
4143
4144static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4145 struct net_device *vlan_dev)
4146{
4147 u16 fid = vlan_dev_vlan_id(vlan_dev);
4148 struct mlxsw_sp_fid *f;
4149
4150 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004151 if (f && f->r)
4152 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004153 if (f && --f->ref_count == 0)
4154 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4155}
4156
4157static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4158 unsigned long event, void *ptr)
4159{
4160 struct netdev_notifier_changeupper_info *info;
4161 struct net_device *upper_dev;
4162 struct mlxsw_sp *mlxsw_sp;
4163 int err;
4164
4165 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4166 if (!mlxsw_sp)
4167 return 0;
4168 if (br_dev != mlxsw_sp->master_bridge.dev)
4169 return 0;
4170
4171 info = ptr;
4172
4173 switch (event) {
4174 case NETDEV_CHANGEUPPER:
4175 upper_dev = info->upper_dev;
4176 if (!is_vlan_dev(upper_dev))
4177 break;
4178 if (info->linking) {
4179 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4180 upper_dev);
4181 if (err)
4182 return err;
4183 } else {
4184 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4185 }
4186 break;
4187 }
4188
4189 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004190}
4191
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004192static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004193{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004194 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004195 MLXSW_SP_VFID_MAX);
4196}
4197
4198static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4199{
4200 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4201
4202 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4203 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004204}
4205
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004206static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004207
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004208static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4209 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004210{
4211 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004212 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004213 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004214 int err;
4215
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004216 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004217 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004218 dev_err(dev, "No available vFIDs\n");
4219 return ERR_PTR(-ERANGE);
4220 }
4221
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004222 fid = mlxsw_sp_vfid_to_fid(vfid);
4223 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004224 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004225 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004226 return ERR_PTR(err);
4227 }
4228
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004229 f = kzalloc(sizeof(*f), GFP_KERNEL);
4230 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004231 goto err_allocate_vfid;
4232
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004233 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004234 f->fid = fid;
4235 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004236
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004237 list_add(&f->list, &mlxsw_sp->vfids.list);
4238 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004239
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004240 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004241
4242err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004243 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004244 return ERR_PTR(-ENOMEM);
4245}
4246
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004247static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4248 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004249{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004250 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004251 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004252
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004253 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004254 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004255
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004256 if (f->r)
4257 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004258
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004259 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004260
4261 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004262}
4263
Ido Schimmel99724c12016-07-04 08:23:14 +02004264static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4265 bool valid)
4266{
4267 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4268 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4269
4270 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4271 vid);
4272}
4273
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004274static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4275 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004276{
Ido Schimmel0355b592016-06-20 23:04:13 +02004277 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004278 int err;
4279
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004280 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004281 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004282 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004283 if (IS_ERR(f))
4284 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004285 }
4286
Ido Schimmel0355b592016-06-20 23:04:13 +02004287 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4288 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004289 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004290
Ido Schimmel0355b592016-06-20 23:04:13 +02004291 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4292 if (err)
4293 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004294
Ido Schimmel41b996c2016-06-20 23:04:17 +02004295 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004296 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004297
Ido Schimmel22305372016-06-20 23:04:21 +02004298 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4299
Ido Schimmel0355b592016-06-20 23:04:13 +02004300 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004301
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004302err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004303 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4304err_vport_flood_set:
4305 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004306 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004307 return err;
4308}
4309
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004310static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004311{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004312 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004313
Ido Schimmel22305372016-06-20 23:04:21 +02004314 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4315
Ido Schimmel0355b592016-06-20 23:04:13 +02004316 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4317
4318 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4319
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004320 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4321
Ido Schimmel41b996c2016-06-20 23:04:17 +02004322 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004323 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004324 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004325}
4326
4327static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4328 struct net_device *br_dev)
4329{
Ido Schimmel99724c12016-07-04 08:23:14 +02004330 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004331 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4332 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004333 int err;
4334
Ido Schimmel99724c12016-07-04 08:23:14 +02004335 if (f && !WARN_ON(!f->leave))
4336 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004337
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004338 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004339 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004340 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004341 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004342 }
4343
4344 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4345 if (err) {
4346 netdev_err(dev, "Failed to enable learning\n");
4347 goto err_port_vid_learning_set;
4348 }
4349
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004350 mlxsw_sp_vport->learning = 1;
4351 mlxsw_sp_vport->learning_sync = 1;
4352 mlxsw_sp_vport->uc_flood = 1;
4353 mlxsw_sp_vport->bridged = 1;
4354
4355 return 0;
4356
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004357err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004358 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004359 return err;
4360}
4361
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004362static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004363{
4364 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004365
4366 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4367
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004368 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004369
Ido Schimmel0355b592016-06-20 23:04:13 +02004370 mlxsw_sp_vport->learning = 0;
4371 mlxsw_sp_vport->learning_sync = 0;
4372 mlxsw_sp_vport->uc_flood = 0;
4373 mlxsw_sp_vport->bridged = 0;
4374}
4375
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004376static bool
4377mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4378 const struct net_device *br_dev)
4379{
4380 struct mlxsw_sp_port *mlxsw_sp_vport;
4381
4382 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4383 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004384 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004385
4386 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004387 return false;
4388 }
4389
4390 return true;
4391}
4392
4393static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4394 unsigned long event, void *ptr,
4395 u16 vid)
4396{
4397 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4398 struct netdev_notifier_changeupper_info *info = ptr;
4399 struct mlxsw_sp_port *mlxsw_sp_vport;
4400 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004401 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004402
4403 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4404
4405 switch (event) {
4406 case NETDEV_PRECHANGEUPPER:
4407 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004408 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004409 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004410 if (!info->linking)
4411 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004412 /* We can't have multiple VLAN interfaces configured on
4413 * the same port and being members in the same bridge.
4414 */
4415 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4416 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004417 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004418 break;
4419 case NETDEV_CHANGEUPPER:
4420 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004421 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004422 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004423 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004424 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4425 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004426 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004427 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004428 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004429 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004430 }
4431 }
4432
Ido Schimmel80bedf12016-06-20 23:03:59 +02004433 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004434}
4435
Ido Schimmel272c4472015-12-15 16:03:47 +01004436static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4437 unsigned long event, void *ptr,
4438 u16 vid)
4439{
4440 struct net_device *dev;
4441 struct list_head *iter;
4442 int ret;
4443
4444 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4445 if (mlxsw_sp_port_dev_check(dev)) {
4446 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4447 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004448 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004449 return ret;
4450 }
4451 }
4452
Ido Schimmel80bedf12016-06-20 23:03:59 +02004453 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004454}
4455
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004456static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4457 unsigned long event, void *ptr)
4458{
4459 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4460 u16 vid = vlan_dev_vlan_id(vlan_dev);
4461
Ido Schimmel272c4472015-12-15 16:03:47 +01004462 if (mlxsw_sp_port_dev_check(real_dev))
4463 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4464 vid);
4465 else if (netif_is_lag_master(real_dev))
4466 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4467 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004468
Ido Schimmel80bedf12016-06-20 23:03:59 +02004469 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004470}
4471
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004472static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4473 unsigned long event, void *ptr)
4474{
4475 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004476 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004477
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004478 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4479 err = mlxsw_sp_netdevice_router_port_event(dev);
4480 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004481 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4482 else if (netif_is_lag_master(dev))
4483 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004484 else if (netif_is_bridge_master(dev))
4485 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004486 else if (is_vlan_dev(dev))
4487 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004488
Ido Schimmel80bedf12016-06-20 23:03:59 +02004489 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004490}
4491
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004492static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4493 .notifier_call = mlxsw_sp_netdevice_event,
4494};
4495
Ido Schimmel99724c12016-07-04 08:23:14 +02004496static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4497 .notifier_call = mlxsw_sp_inetaddr_event,
4498 .priority = 10, /* Must be called before FIB notifier block */
4499};
4500
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004501static int __init mlxsw_sp_module_init(void)
4502{
4503 int err;
4504
4505 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004506 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004507 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4508 if (err)
4509 goto err_core_driver_register;
4510 return 0;
4511
4512err_core_driver_register:
4513 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4514 return err;
4515}
4516
4517static void __exit mlxsw_sp_module_exit(void)
4518{
4519 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Ido Schimmel99724c12016-07-04 08:23:14 +02004520 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004521 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4522}
4523
4524module_init(mlxsw_sp_module_init);
4525module_exit(mlxsw_sp_module_exit);
4526
4527MODULE_LICENSE("Dual BSD/GPL");
4528MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4529MODULE_DESCRIPTION("Mellanox Spectrum driver");
4530MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);