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Yuval Mintze712d522015-10-26 11:02:27 +02001/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
Alexander Duyckf9f082a2016-06-16 12:22:57 -070027#include <net/udp_tunnel.h>
Yuval Mintze712d522015-10-26 11:02:27 +020028#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
Ram Amranicee9fbd2016-10-01 21:59:56 +030039#include <linux/qed/qede_roce.h>
Yuval Mintze712d522015-10-26 11:02:27 +020040#include "qede.h"
41
Yuval Mintz5abd7e922016-02-24 16:52:50 +020042static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
Yuval Mintze712d522015-10-26 11:02:27 +020044
Yuval Mintz5abd7e922016-02-24 16:52:50 +020045MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
Yuval Mintze712d522015-10-26 11:02:27 +020046MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
Yuval Mintz0e7441d2016-02-24 16:52:45 +020056#define CHIP_NUM_57980S_10 0x1666
Yuval Mintze712d522015-10-26 11:02:27 +020057#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
Yuval Mintzfefb0202016-05-11 16:36:19 +030061#define CHIP_NUM_57980S_IOV 0x1664
Yuval Mintze712d522015-10-26 11:02:27 +020062
63#ifndef PCI_DEVICE_ID_NX2_57980E
64#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
65#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
66#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
67#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
68#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
69#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
Yuval Mintzfefb0202016-05-11 16:36:19 +030070#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
Yuval Mintze712d522015-10-26 11:02:27 +020071#endif
72
Yuval Mintzfefb0202016-05-11 16:36:19 +030073enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76};
77
Yuval Mintze712d522015-10-26 11:02:27 +020078static const struct pci_device_id qede_pci_tbl[] = {
Yuval Mintzfefb0202016-05-11 16:36:19 +030079 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020085#ifdef CONFIG_QED_SRIOV
Yuval Mintzfefb0202016-05-11 16:36:19 +030086 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020087#endif
Yuval Mintze712d522015-10-26 11:02:27 +020088 { 0 }
89};
90
91MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
92
93static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
94
95#define TX_TIMEOUT (5 * HZ)
96
97static void qede_remove(struct pci_dev *pdev);
Yuval Mintz29502192015-10-26 11:02:29 +020098static int qede_alloc_rx_buffer(struct qede_dev *edev,
99 struct qede_rx_queue *rxq);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200100static void qede_link_update(void *dev, struct qed_link_output *link);
Yuval Mintze712d522015-10-26 11:02:27 +0200101
Yuval Mintzfefb0202016-05-11 16:36:19 +0300102#ifdef CONFIG_QED_SRIOV
Moshe Shemesh79aab092016-09-22 12:11:15 +0300103static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
104 __be16 vlan_proto)
Yuval Mintz08feecd2016-05-11 16:36:20 +0300105{
106 struct qede_dev *edev = netdev_priv(ndev);
107
108 if (vlan > 4095) {
109 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
110 return -EINVAL;
111 }
112
Moshe Shemesh79aab092016-09-22 12:11:15 +0300113 if (vlan_proto != htons(ETH_P_8021Q))
114 return -EPROTONOSUPPORT;
115
Yuval Mintz08feecd2016-05-11 16:36:20 +0300116 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
117 vlan, vf);
118
119 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
120}
121
Yuval Mintzeff16962016-05-11 16:36:21 +0300122static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
123{
124 struct qede_dev *edev = netdev_priv(ndev);
125
126 DP_VERBOSE(edev, QED_MSG_IOV,
127 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
128 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
129
130 if (!is_valid_ether_addr(mac)) {
131 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
132 return -EINVAL;
133 }
134
135 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
136}
137
Yuval Mintzfefb0202016-05-11 16:36:19 +0300138static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
139{
140 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300141 struct qed_dev_info *qed_info = &edev->dev_info.common;
142 int rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300143
144 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
145
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300146 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
147
148 /* Enable/Disable Tx switching for PF */
149 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
150 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
151 struct qed_update_vport_params params;
152
153 memset(&params, 0, sizeof(params));
154 params.vport_id = 0;
155 params.update_tx_switching_flg = 1;
156 params.tx_switching_flg = num_vfs_param ? 1 : 0;
157 edev->ops->vport_update(edev->cdev, &params);
158 }
159
160 return rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300161}
162#endif
163
Yuval Mintze712d522015-10-26 11:02:27 +0200164static struct pci_driver qede_pci_driver = {
165 .name = "qede",
166 .id_table = qede_pci_tbl,
167 .probe = qede_probe,
168 .remove = qede_remove,
Yuval Mintzfefb0202016-05-11 16:36:19 +0300169#ifdef CONFIG_QED_SRIOV
170 .sriov_configure = qede_sriov_configure,
171#endif
Yuval Mintze712d522015-10-26 11:02:27 +0200172};
173
Yuval Mintzc3aaa402016-10-14 05:19:17 -0400174static void qede_force_mac(void *dev, u8 *mac, bool forced)
Yuval Mintzeff16962016-05-11 16:36:21 +0300175{
176 struct qede_dev *edev = dev;
177
Yuval Mintzc3aaa402016-10-14 05:19:17 -0400178 /* MAC hints take effect only if we haven't set one already */
179 if (is_valid_ether_addr(edev->ndev->dev_addr) && !forced)
180 return;
181
Yuval Mintzeff16962016-05-11 16:36:21 +0300182 ether_addr_copy(edev->ndev->dev_addr, mac);
183 ether_addr_copy(edev->primary_mac, mac);
184}
185
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200186static struct qed_eth_cb_ops qede_ll_ops = {
187 {
188 .link_update = qede_link_update,
189 },
Yuval Mintzeff16962016-05-11 16:36:21 +0300190 .force_mac = qede_force_mac,
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200191};
192
Yuval Mintz29502192015-10-26 11:02:29 +0200193static int qede_netdev_event(struct notifier_block *this, unsigned long event,
194 void *ptr)
195{
196 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
197 struct ethtool_drvinfo drvinfo;
198 struct qede_dev *edev;
199
Ram Amranicee9fbd2016-10-01 21:59:56 +0300200 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
Yuval Mintz29502192015-10-26 11:02:29 +0200201 goto done;
202
203 /* Check whether this is a qede device */
204 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
205 goto done;
206
207 memset(&drvinfo, 0, sizeof(drvinfo));
208 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
209 if (strcmp(drvinfo.driver, "qede"))
210 goto done;
211 edev = netdev_priv(ndev);
212
Ram Amranicee9fbd2016-10-01 21:59:56 +0300213 switch (event) {
214 case NETDEV_CHANGENAME:
215 /* Notify qed of the name change */
216 if (!edev->ops || !edev->ops->common)
217 goto done;
218 edev->ops->common->set_id(edev->cdev, edev->ndev->name, "qede");
219 break;
220 case NETDEV_CHANGEADDR:
221 edev = netdev_priv(ndev);
222 qede_roce_event_changeaddr(edev);
223 break;
224 }
Yuval Mintz29502192015-10-26 11:02:29 +0200225
226done:
227 return NOTIFY_DONE;
228}
229
230static struct notifier_block qede_netdev_notifier = {
231 .notifier_call = qede_netdev_event,
232};
233
Yuval Mintze712d522015-10-26 11:02:27 +0200234static
235int __init qede_init(void)
236{
237 int ret;
Yuval Mintze712d522015-10-26 11:02:27 +0200238
Yuval Mintz525ef5c2016-08-15 10:42:45 +0300239 pr_info("qede_init: %s\n", version);
Yuval Mintze712d522015-10-26 11:02:27 +0200240
Rahul Verma95114342016-04-10 12:42:59 +0300241 qed_ops = qed_get_eth_ops();
Yuval Mintze712d522015-10-26 11:02:27 +0200242 if (!qed_ops) {
243 pr_notice("Failed to get qed ethtool operations\n");
244 return -EINVAL;
245 }
246
Yuval Mintz29502192015-10-26 11:02:29 +0200247 /* Must register notifier before pci ops, since we might miss
248 * interface rename after pci probe and netdev registeration.
249 */
250 ret = register_netdevice_notifier(&qede_netdev_notifier);
251 if (ret) {
252 pr_notice("Failed to register netdevice_notifier\n");
253 qed_put_eth_ops();
254 return -EINVAL;
255 }
256
Yuval Mintze712d522015-10-26 11:02:27 +0200257 ret = pci_register_driver(&qede_pci_driver);
258 if (ret) {
259 pr_notice("Failed to register driver\n");
Yuval Mintz29502192015-10-26 11:02:29 +0200260 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200261 qed_put_eth_ops();
262 return -EINVAL;
263 }
264
265 return 0;
266}
267
268static void __exit qede_cleanup(void)
269{
Yuval Mintz525ef5c2016-08-15 10:42:45 +0300270 if (debug & QED_LOG_INFO_MASK)
271 pr_info("qede_cleanup called\n");
Yuval Mintze712d522015-10-26 11:02:27 +0200272
Yuval Mintz29502192015-10-26 11:02:29 +0200273 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200274 pci_unregister_driver(&qede_pci_driver);
275 qed_put_eth_ops();
276}
277
278module_init(qede_init);
279module_exit(qede_cleanup);
280
281/* -------------------------------------------------------------------------
Yuval Mintz29502192015-10-26 11:02:29 +0200282 * START OF FAST-PATH
283 * -------------------------------------------------------------------------
284 */
285
286/* Unmap the data and free skb */
287static int qede_free_tx_pkt(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300288 struct qede_tx_queue *txq, int *len)
Yuval Mintz29502192015-10-26 11:02:29 +0200289{
290 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
291 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
292 struct eth_tx_1st_bd *first_bd;
293 struct eth_tx_bd *tx_data_bd;
294 int bds_consumed = 0;
295 int nbds;
296 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
297 int i, split_bd_len = 0;
298
299 if (unlikely(!skb)) {
300 DP_ERR(edev,
301 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
302 idx, txq->sw_tx_cons, txq->sw_tx_prod);
303 return -1;
304 }
305
306 *len = skb->len;
307
308 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
309
310 bds_consumed++;
311
312 nbds = first_bd->data.nbds;
313
314 if (data_split) {
315 struct eth_tx_bd *split = (struct eth_tx_bd *)
316 qed_chain_consume(&txq->tx_pbl);
317 split_bd_len = BD_UNMAP_LEN(split);
318 bds_consumed++;
319 }
Manish Choprafabd5452016-10-21 04:43:45 -0400320 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
321 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +0200322
323 /* Unmap the data of the skb frags */
324 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
325 tx_data_bd = (struct eth_tx_bd *)
326 qed_chain_consume(&txq->tx_pbl);
327 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
328 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
329 }
330
331 while (bds_consumed++ < nbds)
332 qed_chain_consume(&txq->tx_pbl);
333
334 /* Free skb */
335 dev_kfree_skb_any(skb);
336 txq->sw_tx_ring[idx].skb = NULL;
337 txq->sw_tx_ring[idx].flags = 0;
338
339 return 0;
340}
341
342/* Unmap the data and free skb when mapping failed during start_xmit */
343static void qede_free_failed_tx_pkt(struct qede_dev *edev,
344 struct qede_tx_queue *txq,
345 struct eth_tx_1st_bd *first_bd,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300346 int nbd, bool data_split)
Yuval Mintz29502192015-10-26 11:02:29 +0200347{
348 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
349 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
350 struct eth_tx_bd *tx_data_bd;
351 int i, split_bd_len = 0;
352
353 /* Return prod to its position before this skb was handled */
354 qed_chain_set_prod(&txq->tx_pbl,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300355 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +0200356
357 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
358
359 if (data_split) {
360 struct eth_tx_bd *split = (struct eth_tx_bd *)
361 qed_chain_produce(&txq->tx_pbl);
362 split_bd_len = BD_UNMAP_LEN(split);
363 nbd--;
364 }
365
Manish Choprafabd5452016-10-21 04:43:45 -0400366 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
367 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +0200368
369 /* Unmap the data of the skb frags */
370 for (i = 0; i < nbd; i++) {
371 tx_data_bd = (struct eth_tx_bd *)
372 qed_chain_produce(&txq->tx_pbl);
373 if (tx_data_bd->nbytes)
374 dma_unmap_page(&edev->pdev->dev,
375 BD_UNMAP_ADDR(tx_data_bd),
376 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
377 }
378
379 /* Return again prod to its position before this skb was handled */
380 qed_chain_set_prod(&txq->tx_pbl,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300381 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +0200382
383 /* Free skb */
384 dev_kfree_skb_any(skb);
385 txq->sw_tx_ring[idx].skb = NULL;
386 txq->sw_tx_ring[idx].flags = 0;
387}
388
389static u32 qede_xmit_type(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300390 struct sk_buff *skb, int *ipv6_ext)
Yuval Mintz29502192015-10-26 11:02:29 +0200391{
392 u32 rc = XMIT_L4_CSUM;
393 __be16 l3_proto;
394
395 if (skb->ip_summed != CHECKSUM_PARTIAL)
396 return XMIT_PLAIN;
397
398 l3_proto = vlan_get_protocol(skb);
399 if (l3_proto == htons(ETH_P_IPV6) &&
400 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
401 *ipv6_ext = 1;
402
Manish Chopraa1502412016-10-14 05:19:18 -0400403 if (skb->encapsulation) {
Manish Chopra14db81d2016-04-14 01:38:33 -0400404 rc |= XMIT_ENC;
Manish Chopraa1502412016-10-14 05:19:18 -0400405 if (skb_is_gso(skb)) {
406 unsigned short gso_type = skb_shinfo(skb)->gso_type;
407
408 if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
409 (gso_type & SKB_GSO_GRE_CSUM))
410 rc |= XMIT_ENC_GSO_L4_CSUM;
411
412 rc |= XMIT_LSO;
413 return rc;
414 }
415 }
Manish Chopra14db81d2016-04-14 01:38:33 -0400416
Yuval Mintz29502192015-10-26 11:02:29 +0200417 if (skb_is_gso(skb))
418 rc |= XMIT_LSO;
419
420 return rc;
421}
422
423static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
424 struct eth_tx_2nd_bd *second_bd,
425 struct eth_tx_3rd_bd *third_bd)
426{
427 u8 l4_proto;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500428 u16 bd2_bits1 = 0, bd2_bits2 = 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200429
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500430 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200431
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500432 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
Yuval Mintz29502192015-10-26 11:02:29 +0200433 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
434 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
435
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500436 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
Yuval Mintz29502192015-10-26 11:02:29 +0200437 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
438
439 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
440 l4_proto = ipv6_hdr(skb)->nexthdr;
441 else
442 l4_proto = ip_hdr(skb)->protocol;
443
444 if (l4_proto == IPPROTO_UDP)
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500445 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200446
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500447 if (third_bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200448 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500449 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
450 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
451 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200452
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500453 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
Yuval Mintz29502192015-10-26 11:02:29 +0200454 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
455}
456
457static int map_frag_to_bd(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300458 skb_frag_t *frag, struct eth_tx_bd *bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200459{
460 dma_addr_t mapping;
461
462 /* Map skb non-linear frag data for DMA */
463 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300464 skb_frag_size(frag), DMA_TO_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +0200465 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
466 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
467 return -ENOMEM;
468 }
469
470 /* Setup the data pointer of the frag data */
471 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
472
473 return 0;
474}
475
Manish Chopra14db81d2016-04-14 01:38:33 -0400476static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
477{
478 if (is_encap_pkt)
479 return (skb_inner_transport_header(skb) +
480 inner_tcp_hdrlen(skb) - skb->data);
481 else
482 return (skb_transport_header(skb) +
483 tcp_hdrlen(skb) - skb->data);
484}
485
Yuval Mintzb1199b12016-02-24 16:52:46 +0200486/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
487#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
488static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
489 u8 xmit_type)
490{
491 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
492
493 if (xmit_type & XMIT_LSO) {
494 int hlen;
495
Manish Chopra14db81d2016-04-14 01:38:33 -0400496 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
Yuval Mintzb1199b12016-02-24 16:52:46 +0200497
498 /* linear payload would require its own BD */
499 if (skb_headlen(skb) > hlen)
500 allowed_frags--;
501 }
502
503 return (skb_shinfo(skb)->nr_frags > allowed_frags);
504}
505#endif
506
Manish Chopra312e0672016-06-30 02:35:20 -0400507static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
508{
509 /* wmb makes sure that the BDs data is updated before updating the
510 * producer, otherwise FW may read old data from the BDs.
511 */
512 wmb();
513 barrier();
514 writel(txq->tx_db.raw, txq->doorbell_addr);
515
516 /* mmiowb is needed to synchronize doorbell writes from more than one
517 * processor. It guarantees that the write arrives to the device before
518 * the queue lock is released and another start_xmit is called (possibly
519 * on another CPU). Without this barrier, the next doorbell can bypass
520 * this doorbell. This is applicable to IA64/Altix systems.
521 */
522 mmiowb();
523}
524
Yuval Mintz29502192015-10-26 11:02:29 +0200525/* Main transmit function */
Yuval Mintz1a635e42016-08-15 10:42:43 +0300526static netdev_tx_t qede_start_xmit(struct sk_buff *skb,
527 struct net_device *ndev)
Yuval Mintz29502192015-10-26 11:02:29 +0200528{
529 struct qede_dev *edev = netdev_priv(ndev);
530 struct netdev_queue *netdev_txq;
531 struct qede_tx_queue *txq;
532 struct eth_tx_1st_bd *first_bd;
533 struct eth_tx_2nd_bd *second_bd = NULL;
534 struct eth_tx_3rd_bd *third_bd = NULL;
535 struct eth_tx_bd *tx_data_bd = NULL;
536 u16 txq_index;
537 u8 nbd = 0;
538 dma_addr_t mapping;
539 int rc, frag_idx = 0, ipv6_ext = 0;
540 u8 xmit_type;
541 u16 idx;
542 u16 hlen;
Dan Carpenter810810f2016-05-05 16:21:30 +0300543 bool data_split = false;
Yuval Mintz29502192015-10-26 11:02:29 +0200544
545 /* Get tx-queue context and netdev index */
546 txq_index = skb_get_queue_mapping(skb);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -0400547 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +0200548 txq = QEDE_TX_QUEUE(edev, txq_index);
549 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
550
Yuval Mintz1a635e42016-08-15 10:42:43 +0300551 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
Yuval Mintz29502192015-10-26 11:02:29 +0200552
553 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
554
Yuval Mintzb1199b12016-02-24 16:52:46 +0200555#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
556 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
557 if (skb_linearize(skb)) {
558 DP_NOTICE(edev,
559 "SKB linearization failed - silently dropping this SKB\n");
560 dev_kfree_skb_any(skb);
561 return NETDEV_TX_OK;
562 }
563 }
564#endif
565
Yuval Mintz29502192015-10-26 11:02:29 +0200566 /* Fill the entry in the SW ring and the BDs in the FW ring */
567 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
568 txq->sw_tx_ring[idx].skb = skb;
569 first_bd = (struct eth_tx_1st_bd *)
570 qed_chain_produce(&txq->tx_pbl);
571 memset(first_bd, 0, sizeof(*first_bd));
572 first_bd->data.bd_flags.bitfields =
573 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
574
575 /* Map skb linear data for DMA and set in the first BD */
576 mapping = dma_map_single(&edev->pdev->dev, skb->data,
577 skb_headlen(skb), DMA_TO_DEVICE);
578 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
579 DP_NOTICE(edev, "SKB mapping failed\n");
580 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
Manish Chopra312e0672016-06-30 02:35:20 -0400581 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200582 return NETDEV_TX_OK;
583 }
584 nbd++;
585 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
586
587 /* In case there is IPv6 with extension headers or LSO we need 2nd and
588 * 3rd BDs.
589 */
590 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
591 second_bd = (struct eth_tx_2nd_bd *)
592 qed_chain_produce(&txq->tx_pbl);
593 memset(second_bd, 0, sizeof(*second_bd));
594
595 nbd++;
596 third_bd = (struct eth_tx_3rd_bd *)
597 qed_chain_produce(&txq->tx_pbl);
598 memset(third_bd, 0, sizeof(*third_bd));
599
600 nbd++;
601 /* We need to fill in additional data in second_bd... */
602 tx_data_bd = (struct eth_tx_bd *)second_bd;
603 }
604
605 if (skb_vlan_tag_present(skb)) {
606 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
607 first_bd->data.bd_flags.bitfields |=
608 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
609 }
610
611 /* Fill the parsing flags & params according to the requested offload */
612 if (xmit_type & XMIT_L4_CSUM) {
613 /* We don't re-calculate IP checksum as it is already done by
614 * the upper stack
615 */
616 first_bd->data.bd_flags.bitfields |=
617 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
618
Manish Chopra14db81d2016-04-14 01:38:33 -0400619 if (xmit_type & XMIT_ENC) {
620 first_bd->data.bd_flags.bitfields |=
621 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300622 first_bd->data.bitfields |=
623 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
Manish Chopra14db81d2016-04-14 01:38:33 -0400624 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500625
Yuval Mintzd8c2c7e2016-08-22 13:25:11 +0300626 /* Legacy FW had flipped behavior in regard to this bit -
627 * I.e., needed to set to prevent FW from touching encapsulated
628 * packets when it didn't need to.
629 */
630 if (unlikely(txq->is_legacy))
631 first_bd->data.bitfields ^=
632 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
633
Yuval Mintz29502192015-10-26 11:02:29 +0200634 /* If the packet is IPv6 with extension header, indicate that
635 * to FW and pass few params, since the device cracker doesn't
636 * support parsing IPv6 with extension header/s.
637 */
638 if (unlikely(ipv6_ext))
639 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
640 }
641
642 if (xmit_type & XMIT_LSO) {
643 first_bd->data.bd_flags.bitfields |=
644 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
645 third_bd->data.lso_mss =
646 cpu_to_le16(skb_shinfo(skb)->gso_size);
647
Manish Chopra14db81d2016-04-14 01:38:33 -0400648 if (unlikely(xmit_type & XMIT_ENC)) {
649 first_bd->data.bd_flags.bitfields |=
650 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
Manish Chopraa1502412016-10-14 05:19:18 -0400651
652 if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
653 u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
654
655 first_bd->data.bd_flags.bitfields |= 1 << tmp;
656 }
Manish Chopra14db81d2016-04-14 01:38:33 -0400657 hlen = qede_get_skb_hlen(skb, true);
658 } else {
659 first_bd->data.bd_flags.bitfields |=
660 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
661 hlen = qede_get_skb_hlen(skb, false);
662 }
Yuval Mintz29502192015-10-26 11:02:29 +0200663
664 /* @@@TBD - if will not be removed need to check */
665 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500666 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
Yuval Mintz29502192015-10-26 11:02:29 +0200667
668 /* Make life easier for FW guys who can't deal with header and
669 * data on same BD. If we need to split, use the second bd...
670 */
671 if (unlikely(skb_headlen(skb) > hlen)) {
672 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
673 "TSO split header size is %d (%x:%x)\n",
674 first_bd->nbytes, first_bd->addr.hi,
675 first_bd->addr.lo);
676
677 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
678 le32_to_cpu(first_bd->addr.lo)) +
679 hlen;
680
681 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
682 le16_to_cpu(first_bd->nbytes) -
683 hlen);
684
685 /* this marks the BD as one that has no
686 * individual mapping
687 */
688 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
689
690 first_bd->nbytes = cpu_to_le16(hlen);
691
692 tx_data_bd = (struct eth_tx_bd *)third_bd;
693 data_split = true;
694 }
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300695 } else {
696 first_bd->data.bitfields |=
697 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
698 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200699 }
700
701 /* Handle fragmented skb */
702 /* special handle for frags inside 2nd and 3rd bds.. */
703 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
704 rc = map_frag_to_bd(edev,
705 &skb_shinfo(skb)->frags[frag_idx],
706 tx_data_bd);
707 if (rc) {
708 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
709 data_split);
Manish Chopra312e0672016-06-30 02:35:20 -0400710 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200711 return NETDEV_TX_OK;
712 }
713
714 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
715 tx_data_bd = (struct eth_tx_bd *)third_bd;
716 else
717 tx_data_bd = NULL;
718
719 frag_idx++;
720 }
721
722 /* map last frags into 4th, 5th .... */
723 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
724 tx_data_bd = (struct eth_tx_bd *)
725 qed_chain_produce(&txq->tx_pbl);
726
727 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
728
729 rc = map_frag_to_bd(edev,
730 &skb_shinfo(skb)->frags[frag_idx],
731 tx_data_bd);
732 if (rc) {
733 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
734 data_split);
Manish Chopra312e0672016-06-30 02:35:20 -0400735 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200736 return NETDEV_TX_OK;
737 }
738 }
739
740 /* update the first BD with the actual num BDs */
741 first_bd->data.nbds = nbd;
742
743 netdev_tx_sent_queue(netdev_txq, skb->len);
744
745 skb_tx_timestamp(skb);
746
747 /* Advance packet producer only before sending the packet since mapping
748 * of pages may fail.
749 */
750 txq->sw_tx_prod++;
751
752 /* 'next page' entries are counted in the producer value */
753 txq->tx_db.data.bd_prod =
754 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
755
Yuval Mintz039a3922016-08-16 18:40:18 +0300756 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
Manish Chopra312e0672016-06-30 02:35:20 -0400757 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200758
759 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
760 < (MAX_SKB_FRAGS + 1))) {
Yuval Mintz039a3922016-08-16 18:40:18 +0300761 if (skb->xmit_more)
762 qede_update_tx_producer(txq);
763
Yuval Mintz29502192015-10-26 11:02:29 +0200764 netif_tx_stop_queue(netdev_txq);
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -0400765 txq->stopped_cnt++;
Yuval Mintz29502192015-10-26 11:02:29 +0200766 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
767 "Stop queue was called\n");
768 /* paired memory barrier is in qede_tx_int(), we have to keep
769 * ordering of set_bit() in netif_tx_stop_queue() and read of
770 * fp->bd_tx_cons
771 */
772 smp_mb();
773
774 if (qed_chain_get_elem_left(&txq->tx_pbl)
775 >= (MAX_SKB_FRAGS + 1) &&
776 (edev->state == QEDE_STATE_OPEN)) {
777 netif_tx_wake_queue(netdev_txq);
778 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
779 "Wake queue was called\n");
780 }
781 }
782
783 return NETDEV_TX_OK;
784}
785
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400786int qede_txq_has_work(struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +0200787{
788 u16 hw_bd_cons;
789
790 /* Tell compiler that consumer and producer can change */
791 barrier();
792 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
793 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
794 return 0;
795
796 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
797}
798
Yuval Mintz1a635e42016-08-15 10:42:43 +0300799static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +0200800{
801 struct netdev_queue *netdev_txq;
802 u16 hw_bd_cons;
803 unsigned int pkts_compl = 0, bytes_compl = 0;
804 int rc;
805
806 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
807
808 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
809 barrier();
810
811 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
812 int len = 0;
813
814 rc = qede_free_tx_pkt(edev, txq, &len);
815 if (rc) {
816 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
817 hw_bd_cons,
818 qed_chain_get_cons_idx(&txq->tx_pbl));
819 break;
820 }
821
822 bytes_compl += len;
823 pkts_compl++;
824 txq->sw_tx_cons++;
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -0400825 txq->xmit_pkts++;
Yuval Mintz29502192015-10-26 11:02:29 +0200826 }
827
828 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
829
830 /* Need to make the tx_bd_cons update visible to start_xmit()
831 * before checking for netif_tx_queue_stopped(). Without the
832 * memory barrier, there is a small possibility that
833 * start_xmit() will miss it and cause the queue to be stopped
834 * forever.
835 * On the other hand we need an rmb() here to ensure the proper
836 * ordering of bit testing in the following
837 * netif_tx_queue_stopped(txq) call.
838 */
839 smp_mb();
840
841 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
842 /* Taking tx_lock is needed to prevent reenabling the queue
843 * while it's empty. This could have happen if rx_action() gets
844 * suspended in qede_tx_int() after the condition before
845 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
846 *
847 * stops the queue->sees fresh tx_bd_cons->releases the queue->
848 * sends some packets consuming the whole queue again->
849 * stops the queue
850 */
851
852 __netif_tx_lock(netdev_txq, smp_processor_id());
853
854 if ((netif_tx_queue_stopped(netdev_txq)) &&
855 (edev->state == QEDE_STATE_OPEN) &&
856 (qed_chain_get_elem_left(&txq->tx_pbl)
857 >= (MAX_SKB_FRAGS + 1))) {
858 netif_tx_wake_queue(netdev_txq);
859 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
860 "Wake queue was called\n");
861 }
862
863 __netif_tx_unlock(netdev_txq);
864 }
865
866 return 0;
867}
868
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400869bool qede_has_rx_work(struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +0200870{
871 u16 hw_comp_cons, sw_comp_cons;
872
873 /* Tell compiler that status block fields can change */
874 barrier();
875
876 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
877 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
878
879 return hw_comp_cons != sw_comp_cons;
880}
881
882static bool qede_has_tx_work(struct qede_fastpath *fp)
883{
884 u8 tc;
885
886 for (tc = 0; tc < fp->edev->num_tc; tc++)
887 if (qede_txq_has_work(&fp->txqs[tc]))
888 return true;
889 return false;
890}
891
Manish Chopraf86af2d2016-04-20 03:03:27 -0400892static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
893{
894 qed_chain_consume(&rxq->rx_bd_ring);
895 rxq->sw_rx_cons++;
896}
897
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500898/* This function reuses the buffer(from an offset) from
899 * consumer index to producer index in the bd ring
Yuval Mintz29502192015-10-26 11:02:29 +0200900 */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500901static inline void qede_reuse_page(struct qede_dev *edev,
902 struct qede_rx_queue *rxq,
903 struct sw_rx_data *curr_cons)
Yuval Mintz29502192015-10-26 11:02:29 +0200904{
Yuval Mintz29502192015-10-26 11:02:29 +0200905 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500906 struct sw_rx_data *curr_prod;
907 dma_addr_t new_mapping;
Yuval Mintz29502192015-10-26 11:02:29 +0200908
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500909 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
910 *curr_prod = *curr_cons;
Yuval Mintz29502192015-10-26 11:02:29 +0200911
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500912 new_mapping = curr_prod->mapping + curr_prod->page_offset;
Yuval Mintz29502192015-10-26 11:02:29 +0200913
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500914 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
915 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
916
Yuval Mintz29502192015-10-26 11:02:29 +0200917 rxq->sw_rx_prod++;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500918 curr_cons->data = NULL;
919}
920
Manish Chopraf86af2d2016-04-20 03:03:27 -0400921/* In case of allocation failures reuse buffers
922 * from consumer index to produce buffers for firmware
923 */
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400924void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
925 struct qede_dev *edev, u8 count)
Manish Chopraf86af2d2016-04-20 03:03:27 -0400926{
927 struct sw_rx_data *curr_cons;
928
929 for (; count > 0; count--) {
930 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
931 qede_reuse_page(edev, rxq, curr_cons);
932 qede_rx_bd_ring_consume(rxq);
933 }
934}
935
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500936static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
937 struct qede_rx_queue *rxq,
938 struct sw_rx_data *curr_cons)
939{
940 /* Move to the next segment in the page */
941 curr_cons->page_offset += rxq->rx_buf_seg_size;
942
943 if (curr_cons->page_offset == PAGE_SIZE) {
Manish Chopraf86af2d2016-04-20 03:03:27 -0400944 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
945 /* Since we failed to allocate new buffer
946 * current buffer can be used again.
947 */
948 curr_cons->page_offset -= rxq->rx_buf_seg_size;
949
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500950 return -ENOMEM;
Manish Chopraf86af2d2016-04-20 03:03:27 -0400951 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500952
953 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
954 PAGE_SIZE, DMA_FROM_DEVICE);
955 } else {
956 /* Increment refcount of the page as we don't want
957 * network stack to take the ownership of the page
958 * which can be recycled multiple times by the driver.
959 */
Joonsoo Kim6d061f92016-05-19 17:10:46 -0700960 page_ref_inc(curr_cons->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500961 qede_reuse_page(edev, rxq, curr_cons);
962 }
963
964 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200965}
966
Sudarsana Reddy Kalluru837d4eb2016-10-21 04:43:41 -0400967void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +0200968{
969 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
970 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
971 struct eth_rx_prod_data rx_prods = {0};
972
973 /* Update producers */
974 rx_prods.bd_prod = cpu_to_le16(bd_prod);
975 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
976
977 /* Make sure that the BD and SGE data is updated before updating the
978 * producers since FW might read the BD/SGE right after the producer
979 * is updated.
980 */
981 wmb();
982
983 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
984 (u32 *)&rx_prods);
985
986 /* mmiowb is needed to synchronize doorbell writes from more than one
987 * processor. It guarantees that the write arrives to the device before
988 * the napi lock is released and another qede_poll is called (possibly
989 * on another CPU). Without this barrier, the next doorbell can bypass
990 * this doorbell. This is applicable to IA64/Altix systems.
991 */
992 mmiowb();
993}
994
995static u32 qede_get_rxhash(struct qede_dev *edev,
996 u8 bitfields,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300997 __le32 rss_hash, enum pkt_hash_types *rxhash_type)
Yuval Mintz29502192015-10-26 11:02:29 +0200998{
999 enum rss_hash_type htype;
1000
1001 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
1002
1003 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
1004 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
1005 (htype == RSS_HASH_TYPE_IPV6)) ?
1006 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
1007 return le32_to_cpu(rss_hash);
1008 }
1009 *rxhash_type = PKT_HASH_TYPE_NONE;
1010 return 0;
1011}
1012
1013static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
1014{
1015 skb_checksum_none_assert(skb);
1016
1017 if (csum_flag & QEDE_CSUM_UNNECESSARY)
1018 skb->ip_summed = CHECKSUM_UNNECESSARY;
Manish Chopra14db81d2016-04-14 01:38:33 -04001019
1020 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
1021 skb->csum_level = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02001022}
1023
1024static inline void qede_skb_receive(struct qede_dev *edev,
1025 struct qede_fastpath *fp,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001026 struct sk_buff *skb, u16 vlan_tag)
Yuval Mintz29502192015-10-26 11:02:29 +02001027{
1028 if (vlan_tag)
Yuval Mintz1a635e42016-08-15 10:42:43 +03001029 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
Yuval Mintz29502192015-10-26 11:02:29 +02001030
1031 napi_gro_receive(&fp->napi, skb);
1032}
1033
Manish Chopra55482ed2016-03-04 12:35:06 -05001034static void qede_set_gro_params(struct qede_dev *edev,
1035 struct sk_buff *skb,
1036 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1037{
1038 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1039
1040 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1041 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1042 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1043 else
1044 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1045
1046 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1047 cqe->header_len;
1048}
1049
1050static int qede_fill_frag_skb(struct qede_dev *edev,
1051 struct qede_rx_queue *rxq,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001052 u8 tpa_agg_index, u16 len_on_bd)
Manish Chopra55482ed2016-03-04 12:35:06 -05001053{
1054 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1055 NUM_RX_BDS_MAX];
1056 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1057 struct sk_buff *skb = tpa_info->skb;
1058
1059 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1060 goto out;
1061
1062 /* Add one frag and update the appropriate fields in the skb */
1063 skb_fill_page_desc(skb, tpa_info->frag_id++,
1064 current_bd->data, current_bd->page_offset,
1065 len_on_bd);
1066
1067 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001068 /* Incr page ref count to reuse on allocation failure
1069 * so that it doesn't get freed while freeing SKB.
1070 */
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001071 page_ref_inc(current_bd->data);
Manish Chopra55482ed2016-03-04 12:35:06 -05001072 goto out;
1073 }
1074
1075 qed_chain_consume(&rxq->rx_bd_ring);
1076 rxq->sw_rx_cons++;
1077
1078 skb->data_len += len_on_bd;
1079 skb->truesize += rxq->rx_buf_seg_size;
1080 skb->len += len_on_bd;
1081
1082 return 0;
1083
1084out:
Manish Chopraf86af2d2016-04-20 03:03:27 -04001085 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1086 qede_recycle_rx_bd_ring(rxq, edev, 1);
Manish Chopra55482ed2016-03-04 12:35:06 -05001087 return -ENOMEM;
1088}
1089
1090static void qede_tpa_start(struct qede_dev *edev,
1091 struct qede_rx_queue *rxq,
1092 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1093{
1094 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1095 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1096 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1097 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1098 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1099 struct sw_rx_data *sw_rx_data_cons;
1100 struct sw_rx_data *sw_rx_data_prod;
1101 enum pkt_hash_types rxhash_type;
1102 u32 rxhash;
1103
1104 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1105 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1106
1107 /* Use pre-allocated replacement buffer - we can't release the agg.
1108 * start until its over and we don't want to risk allocation failing
1109 * here, so re-allocate when aggregation will be over.
1110 */
Manish Chopra09ec8e72016-05-18 07:43:57 -04001111 sw_rx_data_prod->mapping = replace_buf->mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05001112
1113 sw_rx_data_prod->data = replace_buf->data;
1114 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1115 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1116 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1117
1118 rxq->sw_rx_prod++;
1119
1120 /* move partial skb from cons to pool (don't unmap yet)
1121 * save mapping, incase we drop the packet later on.
1122 */
1123 tpa_info->start_buf = *sw_rx_data_cons;
1124 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1125 le32_to_cpu(rx_bd_cons->addr.lo));
1126
1127 tpa_info->start_buf_mapping = mapping;
1128 rxq->sw_rx_cons++;
1129
1130 /* set tpa state to start only if we are able to allocate skb
1131 * for this aggregation, otherwise mark as error and aggregation will
1132 * be dropped
1133 */
1134 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1135 le16_to_cpu(cqe->len_on_first_bd));
1136 if (unlikely(!tpa_info->skb)) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001137 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
Manish Chopra55482ed2016-03-04 12:35:06 -05001138 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001139 goto cons_buf;
Manish Chopra55482ed2016-03-04 12:35:06 -05001140 }
1141
1142 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1143 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1144
1145 /* Start filling in the aggregation info */
1146 tpa_info->frag_id = 0;
1147 tpa_info->agg_state = QEDE_AGG_STATE_START;
1148
1149 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1150 cqe->rss_hash, &rxhash_type);
1151 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1152 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1153 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1154 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1155 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1156 else
1157 tpa_info->vlan_tag = 0;
1158
1159 /* This is needed in order to enable forwarding support */
1160 qede_set_gro_params(edev, tpa_info->skb, cqe);
1161
Manish Chopraf86af2d2016-04-20 03:03:27 -04001162cons_buf: /* We still need to handle bd_len_list to consume buffers */
Manish Chopra55482ed2016-03-04 12:35:06 -05001163 if (likely(cqe->ext_bd_len_list[0]))
1164 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1165 le16_to_cpu(cqe->ext_bd_len_list[0]));
1166
1167 if (unlikely(cqe->ext_bd_len_list[1])) {
1168 DP_ERR(edev,
1169 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1170 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1171 }
1172}
1173
Manish Chopra88f09bd2016-03-08 04:09:44 -05001174#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001175static void qede_gro_ip_csum(struct sk_buff *skb)
1176{
1177 const struct iphdr *iph = ip_hdr(skb);
1178 struct tcphdr *th;
1179
Manish Chopra55482ed2016-03-04 12:35:06 -05001180 skb_set_transport_header(skb, sizeof(struct iphdr));
1181 th = tcp_hdr(skb);
1182
1183 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1184 iph->saddr, iph->daddr, 0);
1185
1186 tcp_gro_complete(skb);
1187}
1188
1189static void qede_gro_ipv6_csum(struct sk_buff *skb)
1190{
1191 struct ipv6hdr *iph = ipv6_hdr(skb);
1192 struct tcphdr *th;
1193
Manish Chopra55482ed2016-03-04 12:35:06 -05001194 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1195 th = tcp_hdr(skb);
1196
1197 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1198 &iph->saddr, &iph->daddr, 0);
1199 tcp_gro_complete(skb);
1200}
Manish Chopra88f09bd2016-03-08 04:09:44 -05001201#endif
Manish Chopra55482ed2016-03-04 12:35:06 -05001202
1203static void qede_gro_receive(struct qede_dev *edev,
1204 struct qede_fastpath *fp,
1205 struct sk_buff *skb,
1206 u16 vlan_tag)
1207{
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001208 /* FW can send a single MTU sized packet from gro flow
1209 * due to aggregation timeout/last segment etc. which
1210 * is not expected to be a gro packet. If a skb has zero
1211 * frags then simply push it in the stack as non gso skb.
1212 */
1213 if (unlikely(!skb->data_len)) {
1214 skb_shinfo(skb)->gso_type = 0;
1215 skb_shinfo(skb)->gso_size = 0;
1216 goto send_skb;
1217 }
1218
Manish Chopra88f09bd2016-03-08 04:09:44 -05001219#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001220 if (skb_shinfo(skb)->gso_size) {
Manish Chopraaad94c02016-04-20 03:03:28 -04001221 skb_set_network_header(skb, 0);
1222
Manish Chopra55482ed2016-03-04 12:35:06 -05001223 switch (skb->protocol) {
1224 case htons(ETH_P_IP):
1225 qede_gro_ip_csum(skb);
1226 break;
1227 case htons(ETH_P_IPV6):
1228 qede_gro_ipv6_csum(skb);
1229 break;
1230 default:
1231 DP_ERR(edev,
1232 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1233 ntohs(skb->protocol));
1234 }
1235 }
Manish Chopra88f09bd2016-03-08 04:09:44 -05001236#endif
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001237
1238send_skb:
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001239 skb_record_rx_queue(skb, fp->rxq->rxq_id);
Manish Chopra55482ed2016-03-04 12:35:06 -05001240 qede_skb_receive(edev, fp, skb, vlan_tag);
1241}
1242
1243static inline void qede_tpa_cont(struct qede_dev *edev,
1244 struct qede_rx_queue *rxq,
1245 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1246{
1247 int i;
1248
1249 for (i = 0; cqe->len_list[i]; i++)
1250 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1251 le16_to_cpu(cqe->len_list[i]));
1252
1253 if (unlikely(i > 1))
1254 DP_ERR(edev,
1255 "Strange - TPA cont with more than a single len_list entry\n");
1256}
1257
1258static void qede_tpa_end(struct qede_dev *edev,
1259 struct qede_fastpath *fp,
1260 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1261{
1262 struct qede_rx_queue *rxq = fp->rxq;
1263 struct qede_agg_info *tpa_info;
1264 struct sk_buff *skb;
1265 int i;
1266
1267 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1268 skb = tpa_info->skb;
1269
1270 for (i = 0; cqe->len_list[i]; i++)
1271 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1272 le16_to_cpu(cqe->len_list[i]));
1273 if (unlikely(i > 1))
1274 DP_ERR(edev,
1275 "Strange - TPA emd with more than a single len_list entry\n");
1276
1277 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1278 goto err;
1279
1280 /* Sanity */
1281 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1282 DP_ERR(edev,
1283 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1284 cqe->num_of_bds, tpa_info->frag_id);
1285 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1286 DP_ERR(edev,
1287 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1288 le16_to_cpu(cqe->total_packet_len), skb->len);
1289
1290 memcpy(skb->data,
1291 page_address(tpa_info->start_buf.data) +
1292 tpa_info->start_cqe.placement_offset +
1293 tpa_info->start_buf.page_offset,
1294 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1295
1296 /* Recycle [mapped] start buffer for the next replacement */
1297 tpa_info->replace_buf = tpa_info->start_buf;
1298 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1299
1300 /* Finalize the SKB */
1301 skb->protocol = eth_type_trans(skb, edev->ndev);
1302 skb->ip_summed = CHECKSUM_UNNECESSARY;
1303
1304 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1305 * to skb_shinfo(skb)->gso_segs
1306 */
1307 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1308
1309 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1310
1311 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1312
1313 return;
1314err:
1315 /* The BD starting the aggregation is still mapped; Re-use it for
1316 * future aggregations [as replacement buffer]
1317 */
1318 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1319 sizeof(struct sw_rx_data));
1320 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1321 tpa_info->start_buf.data = NULL;
1322 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1323 dev_kfree_skb_any(tpa_info->skb);
1324 tpa_info->skb = NULL;
1325}
1326
Manish Chopra14db81d2016-04-14 01:38:33 -04001327static bool qede_tunn_exist(u16 flag)
1328{
1329 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1330 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1331}
1332
1333static u8 qede_check_tunn_csum(u16 flag)
1334{
1335 u16 csum_flag = 0;
1336 u8 tcsum = 0;
1337
1338 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1339 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1340 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1341 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1342
1343 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1344 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1345 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1346 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1347 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1348 }
1349
1350 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1351 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1352 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1353 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1354
1355 if (csum_flag & flag)
1356 return QEDE_CSUM_ERROR;
1357
1358 return QEDE_CSUM_UNNECESSARY | tcsum;
1359}
1360
1361static u8 qede_check_notunn_csum(u16 flag)
Yuval Mintz29502192015-10-26 11:02:29 +02001362{
1363 u16 csum_flag = 0;
1364 u8 csum = 0;
1365
Manish Chopra14db81d2016-04-14 01:38:33 -04001366 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1367 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
Yuval Mintz29502192015-10-26 11:02:29 +02001368 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1369 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1370 csum = QEDE_CSUM_UNNECESSARY;
1371 }
1372
1373 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1374 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1375
1376 if (csum_flag & flag)
1377 return QEDE_CSUM_ERROR;
1378
1379 return csum;
1380}
1381
Manish Chopra14db81d2016-04-14 01:38:33 -04001382static u8 qede_check_csum(u16 flag)
1383{
1384 if (!qede_tunn_exist(flag))
1385 return qede_check_notunn_csum(flag);
1386 else
1387 return qede_check_tunn_csum(flag);
1388}
1389
Manish Choprac72a6122016-06-30 02:35:18 -04001390static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1391 u16 flag)
1392{
1393 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1394
1395 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1396 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1397 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1398 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1399 return true;
1400
1401 return false;
1402}
1403
Yuval Mintz29502192015-10-26 11:02:29 +02001404static int qede_rx_int(struct qede_fastpath *fp, int budget)
1405{
1406 struct qede_dev *edev = fp->edev;
1407 struct qede_rx_queue *rxq = fp->rxq;
1408
1409 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1410 int rx_pkt = 0;
1411 u8 csum_flag;
1412
1413 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1414 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1415
1416 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1417 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1418 * read before it is written by FW, then FW writes CQE and SB, and then
1419 * the CPU reads the hw_comp_cons, it will use an old CQE.
1420 */
1421 rmb();
1422
1423 /* Loop to complete all indicated BDs */
1424 while (sw_comp_cons != hw_comp_cons) {
1425 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1426 enum pkt_hash_types rxhash_type;
1427 enum eth_rx_cqe_type cqe_type;
1428 struct sw_rx_data *sw_rx_data;
1429 union eth_rx_cqe *cqe;
1430 struct sk_buff *skb;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001431 struct page *data;
1432 __le16 flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001433 u16 len, pad;
1434 u32 rx_hash;
Yuval Mintz29502192015-10-26 11:02:29 +02001435
1436 /* Get the CQE from the completion ring */
1437 cqe = (union eth_rx_cqe *)
1438 qed_chain_consume(&rxq->rx_comp_ring);
1439 cqe_type = cqe->fast_path_regular.type;
1440
1441 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1442 edev->ops->eth_cqe_completion(
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001443 edev->cdev, fp->id,
Yuval Mintz29502192015-10-26 11:02:29 +02001444 (struct eth_slow_path_rx_cqe *)cqe);
1445 goto next_cqe;
1446 }
1447
Manish Chopra55482ed2016-03-04 12:35:06 -05001448 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1449 switch (cqe_type) {
1450 case ETH_RX_CQE_TYPE_TPA_START:
1451 qede_tpa_start(edev, rxq,
1452 &cqe->fast_path_tpa_start);
1453 goto next_cqe;
1454 case ETH_RX_CQE_TYPE_TPA_CONT:
1455 qede_tpa_cont(edev, rxq,
1456 &cqe->fast_path_tpa_cont);
1457 goto next_cqe;
1458 case ETH_RX_CQE_TYPE_TPA_END:
1459 qede_tpa_end(edev, fp,
1460 &cqe->fast_path_tpa_end);
1461 goto next_rx_only;
1462 default:
1463 break;
1464 }
1465 }
1466
Yuval Mintz29502192015-10-26 11:02:29 +02001467 /* Get the data from the SW ring */
1468 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1469 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1470 data = sw_rx_data->data;
1471
1472 fp_cqe = &cqe->fast_path_regular;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001473 len = le16_to_cpu(fp_cqe->len_on_first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +02001474 pad = fp_cqe->placement_offset;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001475 flags = cqe->fast_path_regular.pars_flags.flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001476
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001477 /* If this is an error packet then drop it */
1478 parse_flag = le16_to_cpu(flags);
Yuval Mintz29502192015-10-26 11:02:29 +02001479
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001480 csum_flag = qede_check_csum(parse_flag);
1481 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
Manish Choprac72a6122016-06-30 02:35:18 -04001482 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular,
1483 parse_flag)) {
1484 rxq->rx_ip_frags++;
1485 goto alloc_skb;
1486 }
1487
Yuval Mintz29502192015-10-26 11:02:29 +02001488 DP_NOTICE(edev,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001489 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1490 sw_comp_cons, parse_flag);
1491 rxq->rx_hw_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001492 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1493 goto next_cqe;
Yuval Mintz29502192015-10-26 11:02:29 +02001494 }
1495
Manish Choprac72a6122016-06-30 02:35:18 -04001496alloc_skb:
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001497 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1498 if (unlikely(!skb)) {
1499 DP_NOTICE(edev,
Yuval Mintz525ef5c2016-08-15 10:42:45 +03001500 "skb allocation failed, dropping incoming packet\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001501 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001502 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001503 goto next_cqe;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001504 }
Yuval Mintz29502192015-10-26 11:02:29 +02001505
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001506 /* Copy data into SKB */
Manish Chopra3d789992016-06-30 02:35:21 -04001507 if (len + pad <= edev->rx_copybreak) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001508 memcpy(skb_put(skb, len),
1509 page_address(data) + pad +
1510 sw_rx_data->page_offset, len);
1511 qede_reuse_page(edev, rxq, sw_rx_data);
1512 } else {
1513 struct skb_frag_struct *frag;
1514 unsigned int pull_len;
1515 unsigned char *va;
1516
1517 frag = &skb_shinfo(skb)->frags[0];
1518
1519 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1520 pad + sw_rx_data->page_offset,
1521 len, rxq->rx_buf_seg_size);
1522
1523 va = skb_frag_address(frag);
1524 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1525
1526 /* Align the pull_len to optimize memcpy */
1527 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1528
1529 skb_frag_size_sub(frag, pull_len);
1530 frag->page_offset += pull_len;
1531 skb->data_len -= pull_len;
1532 skb->tail += pull_len;
1533
1534 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1535 sw_rx_data))) {
1536 DP_ERR(edev, "Failed to allocate rx buffer\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001537 /* Incr page ref count to reuse on allocation
1538 * failure so that it doesn't get freed while
1539 * freeing SKB.
1540 */
1541
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001542 page_ref_inc(sw_rx_data->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001543 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001544 qede_recycle_rx_bd_ring(rxq, edev,
1545 fp_cqe->bd_num);
1546 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001547 goto next_cqe;
1548 }
1549 }
1550
Manish Chopraf86af2d2016-04-20 03:03:27 -04001551 qede_rx_bd_ring_consume(rxq);
1552
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001553 if (fp_cqe->bd_num != 1) {
1554 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1555 u8 num_frags;
1556
1557 pkt_len -= len;
1558
1559 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1560 num_frags--) {
1561 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1562 rxq->rx_buf_size : pkt_len;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001563 if (unlikely(!cur_size)) {
1564 DP_ERR(edev,
1565 "Still got %d BDs for mapping jumbo, but length became 0\n",
1566 num_frags);
1567 qede_recycle_rx_bd_ring(rxq, edev,
1568 num_frags);
1569 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001570 goto next_cqe;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001571 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001572
Manish Chopraf86af2d2016-04-20 03:03:27 -04001573 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1574 qede_recycle_rx_bd_ring(rxq, edev,
1575 num_frags);
1576 dev_kfree_skb_any(skb);
1577 goto next_cqe;
1578 }
1579
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001580 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1581 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
Manish Chopraf86af2d2016-04-20 03:03:27 -04001582 qede_rx_bd_ring_consume(rxq);
1583
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001584 dma_unmap_page(&edev->pdev->dev,
1585 sw_rx_data->mapping,
1586 PAGE_SIZE, DMA_FROM_DEVICE);
1587
1588 skb_fill_page_desc(skb,
1589 skb_shinfo(skb)->nr_frags++,
1590 sw_rx_data->data, 0,
1591 cur_size);
1592
1593 skb->truesize += PAGE_SIZE;
1594 skb->data_len += cur_size;
1595 skb->len += cur_size;
1596 pkt_len -= cur_size;
1597 }
1598
Manish Chopraf86af2d2016-04-20 03:03:27 -04001599 if (unlikely(pkt_len))
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001600 DP_ERR(edev,
1601 "Mapped all BDs of jumbo, but still have %d bytes\n",
1602 pkt_len);
1603 }
Yuval Mintz29502192015-10-26 11:02:29 +02001604
1605 skb->protocol = eth_type_trans(skb, edev->ndev);
1606
1607 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001608 fp_cqe->rss_hash, &rxhash_type);
Yuval Mintz29502192015-10-26 11:02:29 +02001609
1610 skb_set_hash(skb, rx_hash, rxhash_type);
1611
1612 qede_set_skb_csum(skb, csum_flag);
1613
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001614 skb_record_rx_queue(skb, fp->rxq->rxq_id);
Yuval Mintz29502192015-10-26 11:02:29 +02001615
1616 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
Manish Chopra55482ed2016-03-04 12:35:06 -05001617next_rx_only:
Yuval Mintz29502192015-10-26 11:02:29 +02001618 rx_pkt++;
1619
1620next_cqe: /* don't consume bd rx buffer */
1621 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1622 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1623 /* CR TPA - revisit how to handle budget in TPA perhaps
1624 * increase on "end"
1625 */
1626 if (rx_pkt == budget)
1627 break;
1628 } /* repeat while sw_comp_cons != hw_comp_cons... */
1629
1630 /* Update producers */
1631 qede_update_rx_prod(edev, rxq);
1632
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -04001633 rxq->rcv_pkts += rx_pkt;
1634
Yuval Mintz29502192015-10-26 11:02:29 +02001635 return rx_pkt;
1636}
1637
1638static int qede_poll(struct napi_struct *napi, int budget)
1639{
Yuval Mintz29502192015-10-26 11:02:29 +02001640 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
Manish Choprac7741692016-06-30 02:35:19 -04001641 napi);
Yuval Mintz29502192015-10-26 11:02:29 +02001642 struct qede_dev *edev = fp->edev;
Manish Choprac7741692016-06-30 02:35:19 -04001643 int rx_work_done = 0;
1644 u8 tc;
Yuval Mintz29502192015-10-26 11:02:29 +02001645
Manish Choprac7741692016-06-30 02:35:19 -04001646 for (tc = 0; tc < edev->num_tc; tc++)
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001647 if (likely(fp->type & QEDE_FASTPATH_TX) &&
1648 qede_txq_has_work(&fp->txqs[tc]))
Manish Choprac7741692016-06-30 02:35:19 -04001649 qede_tx_int(edev, &fp->txqs[tc]);
Yuval Mintz29502192015-10-26 11:02:29 +02001650
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001651 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
1652 qede_has_rx_work(fp->rxq)) ?
Manish Choprac7741692016-06-30 02:35:19 -04001653 qede_rx_int(fp, budget) : 0;
1654 if (rx_work_done < budget) {
1655 qed_sb_update_sb_idx(fp->sb_info);
1656 /* *_has_*_work() reads the status block,
1657 * thus we need to ensure that status block indices
1658 * have been actually read (qed_sb_update_sb_idx)
1659 * prior to this check (*_has_*_work) so that
1660 * we won't write the "newer" value of the status block
1661 * to HW (if there was a DMA right after
1662 * qede_has_rx_work and if there is no rmb, the memory
1663 * reading (qed_sb_update_sb_idx) may be postponed
1664 * to right before *_ack_sb). In this case there
1665 * will never be another interrupt until there is
1666 * another update of the status block, while there
1667 * is still unhandled work.
1668 */
1669 rmb();
Yuval Mintz29502192015-10-26 11:02:29 +02001670
1671 /* Fall out from the NAPI loop if needed */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001672 if (!((likely(fp->type & QEDE_FASTPATH_RX) &&
1673 qede_has_rx_work(fp->rxq)) ||
1674 (likely(fp->type & QEDE_FASTPATH_TX) &&
1675 qede_has_tx_work(fp)))) {
Manish Choprac7741692016-06-30 02:35:19 -04001676 napi_complete(napi);
Yuval Mintz29502192015-10-26 11:02:29 +02001677
Manish Choprac7741692016-06-30 02:35:19 -04001678 /* Update and reenable interrupts */
1679 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1680 1 /*update*/);
1681 } else {
1682 rx_work_done = budget;
Yuval Mintz29502192015-10-26 11:02:29 +02001683 }
1684 }
1685
Manish Choprac7741692016-06-30 02:35:19 -04001686 return rx_work_done;
Yuval Mintz29502192015-10-26 11:02:29 +02001687}
1688
1689static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1690{
1691 struct qede_fastpath *fp = fp_cookie;
1692
1693 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1694
1695 napi_schedule_irqoff(&fp->napi);
1696 return IRQ_HANDLED;
1697}
1698
1699/* -------------------------------------------------------------------------
1700 * END OF FAST-PATH
1701 * -------------------------------------------------------------------------
1702 */
1703
1704static int qede_open(struct net_device *ndev);
1705static int qede_close(struct net_device *ndev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001706static int qede_set_mac_addr(struct net_device *ndev, void *p);
1707static void qede_set_rx_mode(struct net_device *ndev);
1708static void qede_config_rx_mode(struct net_device *ndev);
1709
1710static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1711 enum qed_filter_xcast_params_type opcode,
1712 unsigned char mac[ETH_ALEN])
1713{
1714 struct qed_filter_params filter_cmd;
1715
1716 memset(&filter_cmd, 0, sizeof(filter_cmd));
1717 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1718 filter_cmd.filter.ucast.type = opcode;
1719 filter_cmd.filter.ucast.mac_valid = 1;
1720 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1721
1722 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1723}
1724
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001725static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1726 enum qed_filter_xcast_params_type opcode,
1727 u16 vid)
1728{
1729 struct qed_filter_params filter_cmd;
1730
1731 memset(&filter_cmd, 0, sizeof(filter_cmd));
1732 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1733 filter_cmd.filter.ucast.type = opcode;
1734 filter_cmd.filter.ucast.vlan_valid = 1;
1735 filter_cmd.filter.ucast.vlan = vid;
1736
1737 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1738}
1739
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001740void qede_fill_by_demand_stats(struct qede_dev *edev)
1741{
1742 struct qed_eth_stats stats;
1743
1744 edev->ops->get_vport_stats(edev->cdev, &stats);
1745 edev->stats.no_buff_discards = stats.no_buff_discards;
Sudarsana Reddy Kalluru1a5a3662016-08-16 10:51:01 -04001746 edev->stats.packet_too_big_discard = stats.packet_too_big_discard;
1747 edev->stats.ttl0_discard = stats.ttl0_discard;
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001748 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1749 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1750 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1751 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1752 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1753 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1754 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1755 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1756
1757 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1758 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1759 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1760 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1761 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1762 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1763 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1764 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1765 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1766 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1767 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1768 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1769
1770 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
Yuval Mintzd4967cf2016-04-22 08:41:01 +03001771 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1772 edev->stats.rx_128_to_255_byte_packets =
1773 stats.rx_128_to_255_byte_packets;
1774 edev->stats.rx_256_to_511_byte_packets =
1775 stats.rx_256_to_511_byte_packets;
1776 edev->stats.rx_512_to_1023_byte_packets =
1777 stats.rx_512_to_1023_byte_packets;
1778 edev->stats.rx_1024_to_1518_byte_packets =
1779 stats.rx_1024_to_1518_byte_packets;
1780 edev->stats.rx_1519_to_1522_byte_packets =
1781 stats.rx_1519_to_1522_byte_packets;
1782 edev->stats.rx_1519_to_2047_byte_packets =
1783 stats.rx_1519_to_2047_byte_packets;
1784 edev->stats.rx_2048_to_4095_byte_packets =
1785 stats.rx_2048_to_4095_byte_packets;
1786 edev->stats.rx_4096_to_9216_byte_packets =
1787 stats.rx_4096_to_9216_byte_packets;
1788 edev->stats.rx_9217_to_16383_byte_packets =
1789 stats.rx_9217_to_16383_byte_packets;
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001790 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1791 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1792 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1793 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1794 edev->stats.rx_align_errors = stats.rx_align_errors;
1795 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1796 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1797 edev->stats.rx_jabbers = stats.rx_jabbers;
1798 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1799 edev->stats.rx_fragments = stats.rx_fragments;
1800 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1801 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1802 edev->stats.tx_128_to_255_byte_packets =
1803 stats.tx_128_to_255_byte_packets;
1804 edev->stats.tx_256_to_511_byte_packets =
1805 stats.tx_256_to_511_byte_packets;
1806 edev->stats.tx_512_to_1023_byte_packets =
1807 stats.tx_512_to_1023_byte_packets;
1808 edev->stats.tx_1024_to_1518_byte_packets =
1809 stats.tx_1024_to_1518_byte_packets;
1810 edev->stats.tx_1519_to_2047_byte_packets =
1811 stats.tx_1519_to_2047_byte_packets;
1812 edev->stats.tx_2048_to_4095_byte_packets =
1813 stats.tx_2048_to_4095_byte_packets;
1814 edev->stats.tx_4096_to_9216_byte_packets =
1815 stats.tx_4096_to_9216_byte_packets;
1816 edev->stats.tx_9217_to_16383_byte_packets =
1817 stats.tx_9217_to_16383_byte_packets;
1818 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1819 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1820 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1821 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1822 edev->stats.brb_truncates = stats.brb_truncates;
1823 edev->stats.brb_discards = stats.brb_discards;
1824 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1825}
1826
Yuval Mintz1a635e42016-08-15 10:42:43 +03001827static
1828struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev,
1829 struct rtnl_link_stats64 *stats)
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001830{
1831 struct qede_dev *edev = netdev_priv(dev);
1832
1833 qede_fill_by_demand_stats(edev);
1834
1835 stats->rx_packets = edev->stats.rx_ucast_pkts +
1836 edev->stats.rx_mcast_pkts +
1837 edev->stats.rx_bcast_pkts;
1838 stats->tx_packets = edev->stats.tx_ucast_pkts +
1839 edev->stats.tx_mcast_pkts +
1840 edev->stats.tx_bcast_pkts;
1841
1842 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1843 edev->stats.rx_mcast_bytes +
1844 edev->stats.rx_bcast_bytes;
1845
1846 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1847 edev->stats.tx_mcast_bytes +
1848 edev->stats.tx_bcast_bytes;
1849
1850 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1851 stats->multicast = edev->stats.rx_mcast_pkts +
1852 edev->stats.rx_bcast_pkts;
1853
1854 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1855
1856 stats->collisions = edev->stats.tx_total_collisions;
1857 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1858 stats->rx_frame_errors = edev->stats.rx_align_errors;
1859
1860 return stats;
1861}
1862
Yuval Mintz733def62016-05-11 16:36:22 +03001863#ifdef CONFIG_QED_SRIOV
Yuval Mintz73390ac2016-05-11 16:36:24 +03001864static int qede_get_vf_config(struct net_device *dev, int vfidx,
1865 struct ifla_vf_info *ivi)
1866{
1867 struct qede_dev *edev = netdev_priv(dev);
1868
1869 if (!edev->ops)
1870 return -EINVAL;
1871
1872 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1873}
1874
Yuval Mintz733def62016-05-11 16:36:22 +03001875static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1876 int min_tx_rate, int max_tx_rate)
1877{
1878 struct qede_dev *edev = netdev_priv(dev);
1879
Yuval Mintzbe7b6d62016-05-26 11:01:17 +03001880 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
Yuval Mintz733def62016-05-11 16:36:22 +03001881 max_tx_rate);
1882}
1883
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001884static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1885{
1886 struct qede_dev *edev = netdev_priv(dev);
1887
1888 if (!edev->ops)
1889 return -EINVAL;
1890
1891 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1892}
1893
Yuval Mintz733def62016-05-11 16:36:22 +03001894static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1895 int link_state)
1896{
1897 struct qede_dev *edev = netdev_priv(dev);
1898
1899 if (!edev->ops)
1900 return -EINVAL;
1901
1902 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1903}
1904#endif
1905
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001906static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1907{
1908 struct qed_update_vport_params params;
1909 int rc;
1910
1911 /* Proceed only if action actually needs to be performed */
1912 if (edev->accept_any_vlan == action)
1913 return;
1914
1915 memset(&params, 0, sizeof(params));
1916
1917 params.vport_id = 0;
1918 params.accept_any_vlan = action;
1919 params.update_accept_any_vlan_flg = 1;
1920
1921 rc = edev->ops->vport_update(edev->cdev, &params);
1922 if (rc) {
1923 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1924 action ? "enable" : "disable");
1925 } else {
1926 DP_INFO(edev, "%s accept-any-vlan\n",
1927 action ? "enabled" : "disabled");
1928 edev->accept_any_vlan = action;
1929 }
1930}
1931
1932static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1933{
1934 struct qede_dev *edev = netdev_priv(dev);
1935 struct qede_vlan *vlan, *tmp;
1936 int rc;
1937
1938 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1939
1940 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1941 if (!vlan) {
1942 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1943 return -ENOMEM;
1944 }
1945 INIT_LIST_HEAD(&vlan->list);
1946 vlan->vid = vid;
1947 vlan->configured = false;
1948
1949 /* Verify vlan isn't already configured */
1950 list_for_each_entry(tmp, &edev->vlan_list, list) {
1951 if (tmp->vid == vlan->vid) {
1952 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1953 "vlan already configured\n");
1954 kfree(vlan);
1955 return -EEXIST;
1956 }
1957 }
1958
1959 /* If interface is down, cache this VLAN ID and return */
1960 if (edev->state != QEDE_STATE_OPEN) {
1961 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1962 "Interface is down, VLAN %d will be configured when interface is up\n",
1963 vid);
1964 if (vid != 0)
1965 edev->non_configured_vlans++;
1966 list_add(&vlan->list, &edev->vlan_list);
1967
1968 return 0;
1969 }
1970
1971 /* Check for the filter limit.
1972 * Note - vlan0 has a reserved filter and can be added without
1973 * worrying about quota
1974 */
1975 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1976 (vlan->vid == 0)) {
1977 rc = qede_set_ucast_rx_vlan(edev,
1978 QED_FILTER_XCAST_TYPE_ADD,
1979 vlan->vid);
1980 if (rc) {
1981 DP_ERR(edev, "Failed to configure VLAN %d\n",
1982 vlan->vid);
1983 kfree(vlan);
1984 return -EINVAL;
1985 }
1986 vlan->configured = true;
1987
1988 /* vlan0 filter isn't consuming out of our quota */
1989 if (vlan->vid != 0)
1990 edev->configured_vlans++;
1991 } else {
1992 /* Out of quota; Activate accept-any-VLAN mode */
1993 if (!edev->non_configured_vlans)
1994 qede_config_accept_any_vlan(edev, true);
1995
1996 edev->non_configured_vlans++;
1997 }
1998
1999 list_add(&vlan->list, &edev->vlan_list);
2000
2001 return 0;
2002}
2003
2004static void qede_del_vlan_from_list(struct qede_dev *edev,
2005 struct qede_vlan *vlan)
2006{
2007 /* vlan0 filter isn't consuming out of our quota */
2008 if (vlan->vid != 0) {
2009 if (vlan->configured)
2010 edev->configured_vlans--;
2011 else
2012 edev->non_configured_vlans--;
2013 }
2014
2015 list_del(&vlan->list);
2016 kfree(vlan);
2017}
2018
2019static int qede_configure_vlan_filters(struct qede_dev *edev)
2020{
2021 int rc = 0, real_rc = 0, accept_any_vlan = 0;
2022 struct qed_dev_eth_info *dev_info;
2023 struct qede_vlan *vlan = NULL;
2024
2025 if (list_empty(&edev->vlan_list))
2026 return 0;
2027
2028 dev_info = &edev->dev_info;
2029
2030 /* Configure non-configured vlans */
2031 list_for_each_entry(vlan, &edev->vlan_list, list) {
2032 if (vlan->configured)
2033 continue;
2034
2035 /* We have used all our credits, now enable accept_any_vlan */
2036 if ((vlan->vid != 0) &&
2037 (edev->configured_vlans == dev_info->num_vlan_filters)) {
2038 accept_any_vlan = 1;
2039 continue;
2040 }
2041
2042 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
2043
2044 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
2045 vlan->vid);
2046 if (rc) {
2047 DP_ERR(edev, "Failed to configure VLAN %u\n",
2048 vlan->vid);
2049 real_rc = rc;
2050 continue;
2051 }
2052
2053 vlan->configured = true;
2054 /* vlan0 filter doesn't consume our VLAN filter's quota */
2055 if (vlan->vid != 0) {
2056 edev->non_configured_vlans--;
2057 edev->configured_vlans++;
2058 }
2059 }
2060
2061 /* enable accept_any_vlan mode if we have more VLANs than credits,
2062 * or remove accept_any_vlan mode if we've actually removed
2063 * a non-configured vlan, and all remaining vlans are truly configured.
2064 */
2065
2066 if (accept_any_vlan)
2067 qede_config_accept_any_vlan(edev, true);
2068 else if (!edev->non_configured_vlans)
2069 qede_config_accept_any_vlan(edev, false);
2070
2071 return real_rc;
2072}
2073
2074static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2075{
2076 struct qede_dev *edev = netdev_priv(dev);
2077 struct qede_vlan *vlan = NULL;
2078 int rc;
2079
2080 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2081
2082 /* Find whether entry exists */
2083 list_for_each_entry(vlan, &edev->vlan_list, list)
2084 if (vlan->vid == vid)
2085 break;
2086
2087 if (!vlan || (vlan->vid != vid)) {
2088 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2089 "Vlan isn't configured\n");
2090 return 0;
2091 }
2092
2093 if (edev->state != QEDE_STATE_OPEN) {
2094 /* As interface is already down, we don't have a VPORT
2095 * instance to remove vlan filter. So just update vlan list
2096 */
2097 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2098 "Interface is down, removing VLAN from list only\n");
2099 qede_del_vlan_from_list(edev, vlan);
2100 return 0;
2101 }
2102
2103 /* Remove vlan */
Yuval Mintzc524e2f52016-07-27 14:45:19 +03002104 if (vlan->configured) {
2105 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL,
2106 vid);
2107 if (rc) {
2108 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2109 return -EINVAL;
2110 }
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002111 }
2112
2113 qede_del_vlan_from_list(edev, vlan);
2114
2115 /* We have removed a VLAN - try to see if we can
2116 * configure non-configured VLAN from the list.
2117 */
2118 rc = qede_configure_vlan_filters(edev);
2119
2120 return rc;
2121}
2122
2123static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2124{
2125 struct qede_vlan *vlan = NULL;
2126
2127 if (list_empty(&edev->vlan_list))
2128 return;
2129
2130 list_for_each_entry(vlan, &edev->vlan_list, list) {
2131 if (!vlan->configured)
2132 continue;
2133
2134 vlan->configured = false;
2135
2136 /* vlan0 filter isn't consuming out of our quota */
2137 if (vlan->vid != 0) {
2138 edev->non_configured_vlans++;
2139 edev->configured_vlans--;
2140 }
2141
2142 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002143 "marked vlan %d as non-configured\n", vlan->vid);
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002144 }
2145
2146 edev->accept_any_vlan = false;
2147}
2148
Baoyou Xie94384512016-09-08 16:43:23 +08002149static int qede_set_features(struct net_device *dev, netdev_features_t features)
Yuval Mintzce2b8852016-05-26 11:01:18 +03002150{
2151 struct qede_dev *edev = netdev_priv(dev);
2152 netdev_features_t changes = features ^ dev->features;
2153 bool need_reload = false;
2154
2155 /* No action needed if hardware GRO is disabled during driver load */
2156 if (changes & NETIF_F_GRO) {
2157 if (dev->features & NETIF_F_GRO)
2158 need_reload = !edev->gro_disable;
2159 else
2160 need_reload = edev->gro_disable;
2161 }
2162
2163 if (need_reload && netif_running(edev->ndev)) {
2164 dev->features = features;
2165 qede_reload(edev, NULL, NULL);
2166 return 1;
2167 }
2168
2169 return 0;
2170}
2171
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002172static void qede_udp_tunnel_add(struct net_device *dev,
2173 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002174{
2175 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002176 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002177
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002178 switch (ti->type) {
2179 case UDP_TUNNEL_TYPE_VXLAN:
2180 if (edev->vxlan_dst_port)
2181 return;
2182
2183 edev->vxlan_dst_port = t_port;
2184
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002185 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002186 t_port);
2187
2188 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2189 break;
2190 case UDP_TUNNEL_TYPE_GENEVE:
2191 if (edev->geneve_dst_port)
2192 return;
2193
2194 edev->geneve_dst_port = t_port;
2195
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002196 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002197 t_port);
2198 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2199 break;
2200 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002201 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002202 }
Manish Choprab18e1702016-04-14 01:38:30 -04002203
Manish Choprab18e1702016-04-14 01:38:30 -04002204 schedule_delayed_work(&edev->sp_task, 0);
2205}
2206
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002207static void qede_udp_tunnel_del(struct net_device *dev,
2208 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002209{
2210 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002211 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002212
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002213 switch (ti->type) {
2214 case UDP_TUNNEL_TYPE_VXLAN:
2215 if (t_port != edev->vxlan_dst_port)
2216 return;
2217
2218 edev->vxlan_dst_port = 0;
2219
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002220 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002221 t_port);
2222
2223 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2224 break;
2225 case UDP_TUNNEL_TYPE_GENEVE:
2226 if (t_port != edev->geneve_dst_port)
2227 return;
2228
2229 edev->geneve_dst_port = 0;
2230
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002231 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002232 t_port);
2233 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2234 break;
2235 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002236 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002237 }
Manish Choprab18e1702016-04-14 01:38:30 -04002238
Manish Choprab18e1702016-04-14 01:38:30 -04002239 schedule_delayed_work(&edev->sp_task, 0);
2240}
Manish Chopra9a109dd2016-04-14 01:38:31 -04002241
Manish Chopra25695852016-10-14 05:19:19 -04002242/* 8B udp header + 8B base tunnel header + 32B option length */
2243#define QEDE_MAX_TUN_HDR_LEN 48
2244
2245static netdev_features_t qede_features_check(struct sk_buff *skb,
2246 struct net_device *dev,
2247 netdev_features_t features)
2248{
2249 if (skb->encapsulation) {
2250 u8 l4_proto = 0;
2251
2252 switch (vlan_get_protocol(skb)) {
2253 case htons(ETH_P_IP):
2254 l4_proto = ip_hdr(skb)->protocol;
2255 break;
2256 case htons(ETH_P_IPV6):
2257 l4_proto = ipv6_hdr(skb)->nexthdr;
2258 break;
2259 default:
2260 return features;
2261 }
2262
2263 /* Disable offloads for geneve tunnels, as HW can't parse
2264 * the geneve header which has option length greater than 32B.
2265 */
2266 if ((l4_proto == IPPROTO_UDP) &&
2267 ((skb_inner_mac_header(skb) -
2268 skb_transport_header(skb)) > QEDE_MAX_TUN_HDR_LEN))
2269 return features & ~(NETIF_F_CSUM_MASK |
2270 NETIF_F_GSO_MASK);
2271 }
2272
2273 return features;
2274}
2275
Yuval Mintz29502192015-10-26 11:02:29 +02002276static const struct net_device_ops qede_netdev_ops = {
2277 .ndo_open = qede_open,
2278 .ndo_stop = qede_close,
2279 .ndo_start_xmit = qede_start_xmit,
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002280 .ndo_set_rx_mode = qede_set_rx_mode,
2281 .ndo_set_mac_address = qede_set_mac_addr,
Yuval Mintz29502192015-10-26 11:02:29 +02002282 .ndo_validate_addr = eth_validate_addr,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002283 .ndo_change_mtu = qede_change_mtu,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002284#ifdef CONFIG_QED_SRIOV
Yuval Mintzeff16962016-05-11 16:36:21 +03002285 .ndo_set_vf_mac = qede_set_vf_mac,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002286 .ndo_set_vf_vlan = qede_set_vf_vlan,
2287#endif
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002288 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2289 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
Yuval Mintzce2b8852016-05-26 11:01:18 +03002290 .ndo_set_features = qede_set_features,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002291 .ndo_get_stats64 = qede_get_stats64,
Yuval Mintz733def62016-05-11 16:36:22 +03002292#ifdef CONFIG_QED_SRIOV
2293 .ndo_set_vf_link_state = qede_set_vf_link_state,
Yuval Mintz6ddc7602016-05-11 16:36:23 +03002294 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
Yuval Mintz73390ac2016-05-11 16:36:24 +03002295 .ndo_get_vf_config = qede_get_vf_config,
Yuval Mintz733def62016-05-11 16:36:22 +03002296 .ndo_set_vf_rate = qede_set_vf_rate,
2297#endif
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002298 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
2299 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
Manish Chopra25695852016-10-14 05:19:19 -04002300 .ndo_features_check = qede_features_check,
Yuval Mintz29502192015-10-26 11:02:29 +02002301};
2302
2303/* -------------------------------------------------------------------------
Yuval Mintze712d522015-10-26 11:02:27 +02002304 * START OF PROBE / REMOVE
2305 * -------------------------------------------------------------------------
2306 */
2307
2308static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2309 struct pci_dev *pdev,
2310 struct qed_dev_eth_info *info,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002311 u32 dp_module, u8 dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02002312{
2313 struct net_device *ndev;
2314 struct qede_dev *edev;
2315
2316 ndev = alloc_etherdev_mqs(sizeof(*edev),
Yuval Mintz1a635e42016-08-15 10:42:43 +03002317 info->num_queues, info->num_queues);
Yuval Mintze712d522015-10-26 11:02:27 +02002318 if (!ndev) {
2319 pr_err("etherdev allocation failed\n");
2320 return NULL;
2321 }
2322
2323 edev = netdev_priv(ndev);
2324 edev->ndev = ndev;
2325 edev->cdev = cdev;
2326 edev->pdev = pdev;
2327 edev->dp_module = dp_module;
2328 edev->dp_level = dp_level;
2329 edev->ops = qed_ops;
Yuval Mintz29502192015-10-26 11:02:29 +02002330 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2331 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
Yuval Mintze712d522015-10-26 11:02:27 +02002332
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002333 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
2334 info->num_queues, info->num_queues);
2335
Yuval Mintze712d522015-10-26 11:02:27 +02002336 SET_NETDEV_DEV(ndev, &pdev->dev);
2337
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002338 memset(&edev->stats, 0, sizeof(edev->stats));
Yuval Mintze712d522015-10-26 11:02:27 +02002339 memcpy(&edev->dev_info, info, sizeof(*info));
2340
2341 edev->num_tc = edev->dev_info.num_tc;
2342
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002343 INIT_LIST_HEAD(&edev->vlan_list);
2344
Yuval Mintze712d522015-10-26 11:02:27 +02002345 return edev;
2346}
2347
2348static void qede_init_ndev(struct qede_dev *edev)
2349{
2350 struct net_device *ndev = edev->ndev;
2351 struct pci_dev *pdev = edev->pdev;
2352 u32 hw_features;
2353
2354 pci_set_drvdata(pdev, ndev);
2355
2356 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2357 ndev->base_addr = ndev->mem_start;
2358 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2359 ndev->irq = edev->dev_info.common.pci_irq;
2360
2361 ndev->watchdog_timeo = TX_TIMEOUT;
2362
Yuval Mintz29502192015-10-26 11:02:29 +02002363 ndev->netdev_ops = &qede_netdev_ops;
2364
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002365 qede_set_ethtool_ops(ndev);
2366
Yuval Mintz7b7e70f2016-10-14 05:19:20 -04002367 ndev->priv_flags = IFF_UNICAST_FLT;
2368
Yuval Mintze712d522015-10-26 11:02:27 +02002369 /* user-changeble features */
2370 hw_features = NETIF_F_GRO | NETIF_F_SG |
2371 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2372 NETIF_F_TSO | NETIF_F_TSO6;
2373
Manish Chopra14db81d2016-04-14 01:38:33 -04002374 /* Encap features*/
2375 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
Manish Chopraa1502412016-10-14 05:19:18 -04002376 NETIF_F_TSO_ECN | NETIF_F_GSO_UDP_TUNNEL_CSUM |
2377 NETIF_F_GSO_GRE_CSUM;
Manish Chopra14db81d2016-04-14 01:38:33 -04002378 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2379 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2380 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
Manish Chopraa1502412016-10-14 05:19:18 -04002381 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM |
2382 NETIF_F_GSO_UDP_TUNNEL_CSUM |
2383 NETIF_F_GSO_GRE_CSUM;
Manish Chopra14db81d2016-04-14 01:38:33 -04002384
Yuval Mintze712d522015-10-26 11:02:27 +02002385 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2386 NETIF_F_HIGHDMA;
2387 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2388 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002389 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
Yuval Mintze712d522015-10-26 11:02:27 +02002390
2391 ndev->hw_features = hw_features;
2392
Jarod Wilsoncaff2a82016-10-17 15:54:08 -04002393 /* MTU range: 46 - 9600 */
2394 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
2395 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
2396
Yuval Mintze712d522015-10-26 11:02:27 +02002397 /* Set network device HW mac */
2398 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02002399
2400 ndev->mtu = edev->dev_info.common.mtu;
Yuval Mintze712d522015-10-26 11:02:27 +02002401}
2402
2403/* This function converts from 32b param to two params of level and module
2404 * Input 32b decoding:
2405 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2406 * 'happy' flow, e.g. memory allocation failed.
2407 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2408 * and provide important parameters.
2409 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2410 * module. VERBOSE prints are for tracking the specific flow in low level.
2411 *
2412 * Notice that the level should be that of the lowest required logs.
2413 */
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002414void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02002415{
2416 *p_dp_level = QED_LEVEL_NOTICE;
2417 *p_dp_module = 0;
2418
2419 if (debug & QED_LOG_VERBOSE_MASK) {
2420 *p_dp_level = QED_LEVEL_VERBOSE;
2421 *p_dp_module = (debug & 0x3FFFFFFF);
2422 } else if (debug & QED_LOG_INFO_MASK) {
2423 *p_dp_level = QED_LEVEL_INFO;
2424 } else if (debug & QED_LOG_NOTICE_MASK) {
2425 *p_dp_level = QED_LEVEL_NOTICE;
2426 }
2427}
2428
Yuval Mintz29502192015-10-26 11:02:29 +02002429static void qede_free_fp_array(struct qede_dev *edev)
2430{
2431 if (edev->fp_array) {
2432 struct qede_fastpath *fp;
2433 int i;
2434
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002435 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02002436 fp = &edev->fp_array[i];
2437
2438 kfree(fp->sb_info);
2439 kfree(fp->rxq);
2440 kfree(fp->txqs);
2441 }
2442 kfree(edev->fp_array);
2443 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002444
2445 edev->num_queues = 0;
2446 edev->fp_num_tx = 0;
2447 edev->fp_num_rx = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002448}
2449
2450static int qede_alloc_fp_array(struct qede_dev *edev)
2451{
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002452 u8 fp_combined, fp_rx = edev->fp_num_rx;
Yuval Mintz29502192015-10-26 11:02:29 +02002453 struct qede_fastpath *fp;
2454 int i;
2455
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002456 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
Yuval Mintz29502192015-10-26 11:02:29 +02002457 sizeof(*edev->fp_array), GFP_KERNEL);
2458 if (!edev->fp_array) {
2459 DP_NOTICE(edev, "fp array allocation failed\n");
2460 goto err;
2461 }
2462
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002463 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
2464
2465 /* Allocate the FP elements for Rx queues followed by combined and then
2466 * the Tx. This ordering should be maintained so that the respective
2467 * queues (Rx or Tx) will be together in the fastpath array and the
2468 * associated ids will be sequential.
2469 */
2470 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02002471 fp = &edev->fp_array[i];
2472
2473 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2474 if (!fp->sb_info) {
2475 DP_NOTICE(edev, "sb info struct allocation failed\n");
2476 goto err;
2477 }
2478
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002479 if (fp_rx) {
2480 fp->type = QEDE_FASTPATH_RX;
2481 fp_rx--;
2482 } else if (fp_combined) {
2483 fp->type = QEDE_FASTPATH_COMBINED;
2484 fp_combined--;
2485 } else {
2486 fp->type = QEDE_FASTPATH_TX;
Yuval Mintz29502192015-10-26 11:02:29 +02002487 }
2488
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002489 if (fp->type & QEDE_FASTPATH_TX) {
2490 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs),
2491 GFP_KERNEL);
2492 if (!fp->txqs) {
2493 DP_NOTICE(edev,
2494 "TXQ array allocation failed\n");
2495 goto err;
2496 }
2497 }
2498
2499 if (fp->type & QEDE_FASTPATH_RX) {
2500 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2501 if (!fp->rxq) {
2502 DP_NOTICE(edev,
2503 "RXQ struct allocation failed\n");
2504 goto err;
2505 }
Yuval Mintz29502192015-10-26 11:02:29 +02002506 }
2507 }
2508
2509 return 0;
2510err:
2511 qede_free_fp_array(edev);
2512 return -ENOMEM;
2513}
2514
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002515static void qede_sp_task(struct work_struct *work)
2516{
2517 struct qede_dev *edev = container_of(work, struct qede_dev,
2518 sp_task.work);
Manish Choprab18e1702016-04-14 01:38:30 -04002519 struct qed_dev *cdev = edev->cdev;
2520
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002521 mutex_lock(&edev->qede_lock);
2522
2523 if (edev->state == QEDE_STATE_OPEN) {
2524 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2525 qede_config_rx_mode(edev->ndev);
2526 }
2527
Manish Choprab18e1702016-04-14 01:38:30 -04002528 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2529 struct qed_tunn_params tunn_params;
2530
2531 memset(&tunn_params, 0, sizeof(tunn_params));
2532 tunn_params.update_vxlan_port = 1;
2533 tunn_params.vxlan_port = edev->vxlan_dst_port;
2534 qed_ops->tunn_config(cdev, &tunn_params);
2535 }
2536
Manish Chopra9a109dd2016-04-14 01:38:31 -04002537 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2538 struct qed_tunn_params tunn_params;
2539
2540 memset(&tunn_params, 0, sizeof(tunn_params));
2541 tunn_params.update_geneve_port = 1;
2542 tunn_params.geneve_port = edev->geneve_dst_port;
2543 qed_ops->tunn_config(cdev, &tunn_params);
2544 }
2545
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002546 mutex_unlock(&edev->qede_lock);
2547}
2548
Yuval Mintze712d522015-10-26 11:02:27 +02002549static void qede_update_pf_params(struct qed_dev *cdev)
2550{
2551 struct qed_pf_params pf_params;
2552
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002553 /* 64 rx + 64 tx */
Yuval Mintze712d522015-10-26 11:02:27 +02002554 memset(&pf_params, 0, sizeof(struct qed_pf_params));
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002555 pf_params.eth_pf_params.num_cons = 128;
Yuval Mintze712d522015-10-26 11:02:27 +02002556 qed_ops->common->update_pf_params(cdev, &pf_params);
2557}
2558
2559enum qede_probe_mode {
2560 QEDE_PROBE_NORMAL,
2561};
2562
2563static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002564 bool is_vf, enum qede_probe_mode mode)
Yuval Mintze712d522015-10-26 11:02:27 +02002565{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002566 struct qed_probe_params probe_params;
Yuval Mintz1a635e42016-08-15 10:42:43 +03002567 struct qed_slowpath_params sp_params;
Yuval Mintze712d522015-10-26 11:02:27 +02002568 struct qed_dev_eth_info dev_info;
2569 struct qede_dev *edev;
2570 struct qed_dev *cdev;
2571 int rc;
2572
2573 if (unlikely(dp_level & QED_LEVEL_INFO))
2574 pr_notice("Starting qede probe\n");
2575
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002576 memset(&probe_params, 0, sizeof(probe_params));
2577 probe_params.protocol = QED_PROTOCOL_ETH;
2578 probe_params.dp_module = dp_module;
2579 probe_params.dp_level = dp_level;
2580 probe_params.is_vf = is_vf;
2581 cdev = qed_ops->common->probe(pdev, &probe_params);
Yuval Mintze712d522015-10-26 11:02:27 +02002582 if (!cdev) {
2583 rc = -ENODEV;
2584 goto err0;
2585 }
2586
2587 qede_update_pf_params(cdev);
2588
2589 /* Start the Slowpath-process */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002590 memset(&sp_params, 0, sizeof(sp_params));
2591 sp_params.int_mode = QED_INT_MODE_MSIX;
2592 sp_params.drv_major = QEDE_MAJOR_VERSION;
2593 sp_params.drv_minor = QEDE_MINOR_VERSION;
2594 sp_params.drv_rev = QEDE_REVISION_VERSION;
2595 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
2596 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2597 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
Yuval Mintze712d522015-10-26 11:02:27 +02002598 if (rc) {
2599 pr_notice("Cannot start slowpath\n");
2600 goto err1;
2601 }
2602
2603 /* Learn information crucial for qede to progress */
2604 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2605 if (rc)
2606 goto err2;
2607
2608 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2609 dp_level);
2610 if (!edev) {
2611 rc = -ENOMEM;
2612 goto err2;
2613 }
2614
Yuval Mintzfefb0202016-05-11 16:36:19 +03002615 if (is_vf)
2616 edev->flags |= QEDE_FLAG_IS_VF;
2617
Yuval Mintze712d522015-10-26 11:02:27 +02002618 qede_init_ndev(edev);
2619
Ram Amranicee9fbd2016-10-01 21:59:56 +03002620 rc = qede_roce_dev_add(edev);
2621 if (rc)
2622 goto err3;
2623
Yuval Mintz29502192015-10-26 11:02:29 +02002624 rc = register_netdev(edev->ndev);
2625 if (rc) {
2626 DP_NOTICE(edev, "Cannot register net-device\n");
Ram Amranicee9fbd2016-10-01 21:59:56 +03002627 goto err4;
Yuval Mintz29502192015-10-26 11:02:29 +02002628 }
2629
Yuval Mintze712d522015-10-26 11:02:27 +02002630 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2631
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002632 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2633
Sudarsana Reddy Kalluru489e45a2016-06-08 06:22:12 -04002634#ifdef CONFIG_DCB
Sudarsana Reddy Kalluru5fe118c2016-08-29 08:29:52 -04002635 if (!IS_VF(edev))
2636 qede_set_dcbnl_ops(edev->ndev);
Sudarsana Reddy Kalluru489e45a2016-06-08 06:22:12 -04002637#endif
2638
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002639 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2640 mutex_init(&edev->qede_lock);
Manish Chopra3d789992016-06-30 02:35:21 -04002641 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002642
Yuval Mintze712d522015-10-26 11:02:27 +02002643 DP_INFO(edev, "Ending successfully qede probe\n");
2644
2645 return 0;
2646
Ram Amranicee9fbd2016-10-01 21:59:56 +03002647err4:
2648 qede_roce_dev_remove(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02002649err3:
2650 free_netdev(edev->ndev);
Yuval Mintze712d522015-10-26 11:02:27 +02002651err2:
2652 qed_ops->common->slowpath_stop(cdev);
2653err1:
2654 qed_ops->common->remove(cdev);
2655err0:
2656 return rc;
2657}
2658
2659static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2660{
Yuval Mintzfefb0202016-05-11 16:36:19 +03002661 bool is_vf = false;
Yuval Mintze712d522015-10-26 11:02:27 +02002662 u32 dp_module = 0;
2663 u8 dp_level = 0;
2664
Yuval Mintzfefb0202016-05-11 16:36:19 +03002665 switch ((enum qede_pci_private)id->driver_data) {
2666 case QEDE_PRIVATE_VF:
2667 if (debug & QED_LOG_VERBOSE_MASK)
2668 dev_err(&pdev->dev, "Probing a VF\n");
2669 is_vf = true;
2670 break;
2671 default:
2672 if (debug & QED_LOG_VERBOSE_MASK)
2673 dev_err(&pdev->dev, "Probing a PF\n");
2674 }
2675
Yuval Mintze712d522015-10-26 11:02:27 +02002676 qede_config_debug(debug, &dp_module, &dp_level);
2677
Yuval Mintzfefb0202016-05-11 16:36:19 +03002678 return __qede_probe(pdev, dp_module, dp_level, is_vf,
Yuval Mintze712d522015-10-26 11:02:27 +02002679 QEDE_PROBE_NORMAL);
2680}
2681
2682enum qede_remove_mode {
2683 QEDE_REMOVE_NORMAL,
2684};
2685
2686static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2687{
2688 struct net_device *ndev = pci_get_drvdata(pdev);
2689 struct qede_dev *edev = netdev_priv(ndev);
2690 struct qed_dev *cdev = edev->cdev;
2691
2692 DP_INFO(edev, "Starting qede_remove\n");
2693
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002694 cancel_delayed_work_sync(&edev->sp_task);
Ram Amranicee9fbd2016-10-01 21:59:56 +03002695
Yuval Mintz29502192015-10-26 11:02:29 +02002696 unregister_netdev(ndev);
2697
Ram Amranicee9fbd2016-10-01 21:59:56 +03002698 qede_roce_dev_remove(edev);
2699
Yuval Mintze712d522015-10-26 11:02:27 +02002700 edev->ops->common->set_power_state(cdev, PCI_D0);
2701
2702 pci_set_drvdata(pdev, NULL);
2703
2704 free_netdev(ndev);
2705
2706 /* Use global ops since we've freed edev */
2707 qed_ops->common->slowpath_stop(cdev);
2708 qed_ops->common->remove(cdev);
2709
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002710 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
Yuval Mintze712d522015-10-26 11:02:27 +02002711}
2712
2713static void qede_remove(struct pci_dev *pdev)
2714{
2715 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2716}
Yuval Mintz29502192015-10-26 11:02:29 +02002717
2718/* -------------------------------------------------------------------------
2719 * START OF LOAD / UNLOAD
2720 * -------------------------------------------------------------------------
2721 */
2722
2723static int qede_set_num_queues(struct qede_dev *edev)
2724{
2725 int rc;
2726 u16 rss_num;
2727
2728 /* Setup queues according to possible resources*/
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002729 if (edev->req_queues)
2730 rss_num = edev->req_queues;
Sudarsana Kalluru8edf0492015-11-30 12:25:01 +02002731 else
2732 rss_num = netif_get_num_default_rss_queues() *
2733 edev->dev_info.common.num_hwfns;
Yuval Mintz29502192015-10-26 11:02:29 +02002734
2735 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2736
2737 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2738 if (rc > 0) {
2739 /* Managed to request interrupts for our queues */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002740 edev->num_queues = rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002741 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002742 QEDE_QUEUE_CNT(edev), rss_num);
Yuval Mintz29502192015-10-26 11:02:29 +02002743 rc = 0;
2744 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002745
2746 edev->fp_num_tx = edev->req_num_tx;
2747 edev->fp_num_rx = edev->req_num_rx;
2748
Yuval Mintz29502192015-10-26 11:02:29 +02002749 return rc;
2750}
2751
2752static void qede_free_mem_sb(struct qede_dev *edev,
2753 struct qed_sb_info *sb_info)
2754{
2755 if (sb_info->sb_virt)
2756 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2757 (void *)sb_info->sb_virt, sb_info->sb_phys);
2758}
2759
2760/* This function allocates fast-path status block memory */
2761static int qede_alloc_mem_sb(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002762 struct qed_sb_info *sb_info, u16 sb_id)
Yuval Mintz29502192015-10-26 11:02:29 +02002763{
2764 struct status_block *sb_virt;
2765 dma_addr_t sb_phys;
2766 int rc;
2767
2768 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002769 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
Yuval Mintz29502192015-10-26 11:02:29 +02002770 if (!sb_virt) {
2771 DP_ERR(edev, "Status block allocation failed\n");
2772 return -ENOMEM;
2773 }
2774
2775 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2776 sb_virt, sb_phys, sb_id,
2777 QED_SB_TYPE_L2_QUEUE);
2778 if (rc) {
2779 DP_ERR(edev, "Status block initialization failed\n");
2780 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2781 sb_virt, sb_phys);
2782 return rc;
2783 }
2784
2785 return 0;
2786}
2787
2788static void qede_free_rx_buffers(struct qede_dev *edev,
2789 struct qede_rx_queue *rxq)
2790{
2791 u16 i;
2792
2793 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2794 struct sw_rx_data *rx_buf;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002795 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002796
2797 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2798 data = rx_buf->data;
2799
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002800 dma_unmap_page(&edev->pdev->dev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002801 rx_buf->mapping, PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002802
2803 rx_buf->data = NULL;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002804 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002805 }
2806}
2807
Yuval Mintz1a635e42016-08-15 10:42:43 +03002808static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
2809{
Manish Chopra55482ed2016-03-04 12:35:06 -05002810 int i;
2811
2812 if (edev->gro_disable)
2813 return;
2814
2815 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2816 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2817 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2818
Manish Chopraf86af2d2016-04-20 03:03:27 -04002819 if (replace_buf->data) {
Manish Chopra55482ed2016-03-04 12:35:06 -05002820 dma_unmap_page(&edev->pdev->dev,
Manish Chopra09ec8e72016-05-18 07:43:57 -04002821 replace_buf->mapping,
Manish Chopra55482ed2016-03-04 12:35:06 -05002822 PAGE_SIZE, DMA_FROM_DEVICE);
2823 __free_page(replace_buf->data);
2824 }
2825 }
2826}
2827
Yuval Mintz1a635e42016-08-15 10:42:43 +03002828static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +02002829{
Manish Chopra55482ed2016-03-04 12:35:06 -05002830 qede_free_sge_mem(edev, rxq);
2831
Yuval Mintz29502192015-10-26 11:02:29 +02002832 /* Free rx buffers */
2833 qede_free_rx_buffers(edev, rxq);
2834
2835 /* Free the parallel SW ring */
2836 kfree(rxq->sw_rx_ring);
2837
2838 /* Free the real RQ ring used by FW */
2839 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2840 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2841}
2842
2843static int qede_alloc_rx_buffer(struct qede_dev *edev,
2844 struct qede_rx_queue *rxq)
2845{
2846 struct sw_rx_data *sw_rx_data;
2847 struct eth_rx_bd *rx_bd;
2848 dma_addr_t mapping;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002849 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002850
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002851 data = alloc_pages(GFP_ATOMIC, 0);
Yuval Mintz29502192015-10-26 11:02:29 +02002852 if (unlikely(!data)) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002853 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
Yuval Mintz29502192015-10-26 11:02:29 +02002854 return -ENOMEM;
2855 }
2856
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002857 /* Map the entire page as it would be used
2858 * for multiple RX buffer segment size mapping.
2859 */
2860 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2861 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002862 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002863 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002864 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2865 return -ENOMEM;
2866 }
2867
2868 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002869 sw_rx_data->page_offset = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002870 sw_rx_data->data = data;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002871 sw_rx_data->mapping = mapping;
Yuval Mintz29502192015-10-26 11:02:29 +02002872
2873 /* Advance PROD and get BD pointer */
2874 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2875 WARN_ON(!rx_bd);
2876 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2877 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2878
2879 rxq->sw_rx_prod++;
2880
2881 return 0;
2882}
2883
Yuval Mintz1a635e42016-08-15 10:42:43 +03002884static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
Manish Chopra55482ed2016-03-04 12:35:06 -05002885{
2886 dma_addr_t mapping;
2887 int i;
2888
2889 if (edev->gro_disable)
2890 return 0;
2891
2892 if (edev->ndev->mtu > PAGE_SIZE) {
2893 edev->gro_disable = 1;
2894 return 0;
2895 }
2896
2897 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2898 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2899 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2900
2901 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2902 if (unlikely(!replace_buf->data)) {
2903 DP_NOTICE(edev,
2904 "Failed to allocate TPA skb pool [replacement buffer]\n");
2905 goto err;
2906 }
2907
2908 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2909 rxq->rx_buf_size, DMA_FROM_DEVICE);
2910 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2911 DP_NOTICE(edev,
2912 "Failed to map TPA replacement buffer\n");
2913 goto err;
2914 }
2915
Manish Chopra09ec8e72016-05-18 07:43:57 -04002916 replace_buf->mapping = mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05002917 tpa_info->replace_buf.page_offset = 0;
2918
2919 tpa_info->replace_buf_mapping = mapping;
2920 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2921 }
2922
2923 return 0;
2924err:
2925 qede_free_sge_mem(edev, rxq);
2926 edev->gro_disable = 1;
2927 return -ENOMEM;
2928}
2929
Yuval Mintz29502192015-10-26 11:02:29 +02002930/* This function allocates all memory needed per Rx queue */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002931static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +02002932{
Manish Chopraf86af2d2016-04-20 03:03:27 -04002933 int i, rc, size;
Yuval Mintz29502192015-10-26 11:02:29 +02002934
2935 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2936
Yuval Mintz1a635e42016-08-15 10:42:43 +03002937 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
2938
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002939 if (rxq->rx_buf_size > PAGE_SIZE)
2940 rxq->rx_buf_size = PAGE_SIZE;
2941
2942 /* Segment size to spilt a page in multiple equal parts */
2943 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
Yuval Mintz29502192015-10-26 11:02:29 +02002944
2945 /* Allocate the parallel driver ring for Rx buffers */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002946 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
Yuval Mintz29502192015-10-26 11:02:29 +02002947 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2948 if (!rxq->sw_rx_ring) {
2949 DP_ERR(edev, "Rx buffers ring allocation failed\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04002950 rc = -ENOMEM;
Yuval Mintz29502192015-10-26 11:02:29 +02002951 goto err;
2952 }
2953
2954 /* Allocate FW Rx ring */
2955 rc = edev->ops->common->chain_alloc(edev->cdev,
2956 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2957 QED_CHAIN_MODE_NEXT_PTR,
Yuval Mintza91eb522016-06-03 14:35:32 +03002958 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002959 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002960 sizeof(struct eth_rx_bd),
2961 &rxq->rx_bd_ring);
2962
2963 if (rc)
2964 goto err;
2965
2966 /* Allocate FW completion ring */
2967 rc = edev->ops->common->chain_alloc(edev->cdev,
2968 QED_CHAIN_USE_TO_CONSUME,
2969 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03002970 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002971 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002972 sizeof(union eth_rx_cqe),
2973 &rxq->rx_comp_ring);
2974 if (rc)
2975 goto err;
2976
2977 /* Allocate buffers for the Rx ring */
2978 for (i = 0; i < rxq->num_rx_buffers; i++) {
2979 rc = qede_alloc_rx_buffer(edev, rxq);
Manish Chopraf86af2d2016-04-20 03:03:27 -04002980 if (rc) {
2981 DP_ERR(edev,
2982 "Rx buffers allocation failed at index %d\n", i);
2983 goto err;
2984 }
Yuval Mintz29502192015-10-26 11:02:29 +02002985 }
2986
Manish Chopraf86af2d2016-04-20 03:03:27 -04002987 rc = qede_alloc_sge_mem(edev, rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02002988err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04002989 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002990}
2991
Yuval Mintz1a635e42016-08-15 10:42:43 +03002992static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +02002993{
2994 /* Free the parallel SW ring */
2995 kfree(txq->sw_tx_ring);
2996
2997 /* Free the real RQ ring used by FW */
2998 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2999}
3000
3001/* This function allocates all memory needed per Tx queue */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003002static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +02003003{
3004 int size, rc;
3005 union eth_tx_bd_types *p_virt;
3006
3007 txq->num_tx_buffers = edev->q_num_tx_buffers;
3008
3009 /* Allocate the parallel driver ring for Tx buffers */
Mintz, Yuval087892d2016-10-29 17:04:35 +03003010 size = sizeof(*txq->sw_tx_ring) * TX_RING_SIZE;
Yuval Mintz29502192015-10-26 11:02:29 +02003011 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
3012 if (!txq->sw_tx_ring) {
3013 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
3014 goto err;
3015 }
3016
3017 rc = edev->ops->common->chain_alloc(edev->cdev,
3018 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
3019 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03003020 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval087892d2016-10-29 17:04:35 +03003021 TX_RING_SIZE,
Yuval Mintza91eb522016-06-03 14:35:32 +03003022 sizeof(*p_virt), &txq->tx_pbl);
Yuval Mintz29502192015-10-26 11:02:29 +02003023 if (rc)
3024 goto err;
3025
3026 return 0;
3027
3028err:
3029 qede_free_mem_txq(edev, txq);
3030 return -ENOMEM;
3031}
3032
3033/* This function frees all memory of a single fp */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003034static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
Yuval Mintz29502192015-10-26 11:02:29 +02003035{
3036 int tc;
3037
3038 qede_free_mem_sb(edev, fp->sb_info);
3039
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003040 if (fp->type & QEDE_FASTPATH_RX)
3041 qede_free_mem_rxq(edev, fp->rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02003042
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003043 if (fp->type & QEDE_FASTPATH_TX)
3044 for (tc = 0; tc < edev->num_tc; tc++)
3045 qede_free_mem_txq(edev, &fp->txqs[tc]);
Yuval Mintz29502192015-10-26 11:02:29 +02003046}
3047
3048/* This function allocates all memory needed for a single fp (i.e. an entity
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003049 * which contains status block, one rx queue and/or multiple per-TC tx queues.
Yuval Mintz29502192015-10-26 11:02:29 +02003050 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003051static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
Yuval Mintz29502192015-10-26 11:02:29 +02003052{
3053 int rc, tc;
3054
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003055 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
Yuval Mintz29502192015-10-26 11:02:29 +02003056 if (rc)
3057 goto err;
3058
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003059 if (fp->type & QEDE_FASTPATH_RX) {
3060 rc = qede_alloc_mem_rxq(edev, fp->rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02003061 if (rc)
3062 goto err;
3063 }
3064
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003065 if (fp->type & QEDE_FASTPATH_TX) {
3066 for (tc = 0; tc < edev->num_tc; tc++) {
3067 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
3068 if (rc)
3069 goto err;
3070 }
3071 }
3072
Yuval Mintz29502192015-10-26 11:02:29 +02003073 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003074err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04003075 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003076}
3077
3078static void qede_free_mem_load(struct qede_dev *edev)
3079{
3080 int i;
3081
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003082 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003083 struct qede_fastpath *fp = &edev->fp_array[i];
3084
3085 qede_free_mem_fp(edev, fp);
3086 }
3087}
3088
3089/* This function allocates all qede memory at NIC load. */
3090static int qede_alloc_mem_load(struct qede_dev *edev)
3091{
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003092 int rc = 0, queue_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003093
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003094 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
3095 struct qede_fastpath *fp = &edev->fp_array[queue_id];
Yuval Mintz29502192015-10-26 11:02:29 +02003096
3097 rc = qede_alloc_mem_fp(edev, fp);
Manish Chopraf86af2d2016-04-20 03:03:27 -04003098 if (rc) {
Yuval Mintz29502192015-10-26 11:02:29 +02003099 DP_ERR(edev,
Manish Chopraf86af2d2016-04-20 03:03:27 -04003100 "Failed to allocate memory for fastpath - rss id = %d\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003101 queue_id);
Manish Chopraf86af2d2016-04-20 03:03:27 -04003102 qede_free_mem_load(edev);
3103 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003104 }
Yuval Mintz29502192015-10-26 11:02:29 +02003105 }
3106
3107 return 0;
3108}
3109
3110/* This function inits fp content and resets the SB, RXQ and TXQ structures */
3111static void qede_init_fp(struct qede_dev *edev)
3112{
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003113 int queue_id, rxq_index = 0, txq_index = 0, tc;
Yuval Mintz29502192015-10-26 11:02:29 +02003114 struct qede_fastpath *fp;
3115
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003116 for_each_queue(queue_id) {
3117 fp = &edev->fp_array[queue_id];
Yuval Mintz29502192015-10-26 11:02:29 +02003118
3119 fp->edev = edev;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003120 fp->id = queue_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003121
3122 memset((void *)&fp->napi, 0, sizeof(fp->napi));
3123
3124 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
3125
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003126 if (fp->type & QEDE_FASTPATH_RX) {
3127 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
3128 fp->rxq->rxq_id = rxq_index++;
3129 }
Yuval Mintz29502192015-10-26 11:02:29 +02003130
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003131 if (fp->type & QEDE_FASTPATH_TX) {
3132 memset((void *)fp->txqs, 0,
3133 (edev->num_tc * sizeof(*fp->txqs)));
3134 for (tc = 0; tc < edev->num_tc; tc++) {
3135 fp->txqs[tc].index = txq_index +
3136 tc * QEDE_TSS_COUNT(edev);
3137 if (edev->dev_info.is_legacy)
3138 fp->txqs[tc].is_legacy = true;
3139 }
3140 txq_index++;
Yuval Mintz29502192015-10-26 11:02:29 +02003141 }
3142
3143 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003144 edev->ndev->name, queue_id);
Yuval Mintz29502192015-10-26 11:02:29 +02003145 }
Manish Chopra55482ed2016-03-04 12:35:06 -05003146
3147 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
Yuval Mintz29502192015-10-26 11:02:29 +02003148}
3149
3150static int qede_set_real_num_queues(struct qede_dev *edev)
3151{
3152 int rc = 0;
3153
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003154 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +02003155 if (rc) {
3156 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3157 return rc;
3158 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003159
3160 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +02003161 if (rc) {
3162 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3163 return rc;
3164 }
3165
3166 return 0;
3167}
3168
3169static void qede_napi_disable_remove(struct qede_dev *edev)
3170{
3171 int i;
3172
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003173 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003174 napi_disable(&edev->fp_array[i].napi);
3175
3176 netif_napi_del(&edev->fp_array[i].napi);
3177 }
3178}
3179
3180static void qede_napi_add_enable(struct qede_dev *edev)
3181{
3182 int i;
3183
3184 /* Add NAPI objects */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003185 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003186 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3187 qede_poll, NAPI_POLL_WEIGHT);
3188 napi_enable(&edev->fp_array[i].napi);
3189 }
3190}
3191
3192static void qede_sync_free_irqs(struct qede_dev *edev)
3193{
3194 int i;
3195
3196 for (i = 0; i < edev->int_info.used_cnt; i++) {
3197 if (edev->int_info.msix_cnt) {
3198 synchronize_irq(edev->int_info.msix[i].vector);
3199 free_irq(edev->int_info.msix[i].vector,
3200 &edev->fp_array[i]);
3201 } else {
3202 edev->ops->common->simd_handler_clean(edev->cdev, i);
3203 }
3204 }
3205
3206 edev->int_info.used_cnt = 0;
3207}
3208
3209static int qede_req_msix_irqs(struct qede_dev *edev)
3210{
3211 int i, rc;
3212
3213 /* Sanitize number of interrupts == number of prepared RSS queues */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003214 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
Yuval Mintz29502192015-10-26 11:02:29 +02003215 DP_ERR(edev,
3216 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003217 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
Yuval Mintz29502192015-10-26 11:02:29 +02003218 return -EINVAL;
3219 }
3220
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003221 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
Yuval Mintz29502192015-10-26 11:02:29 +02003222 rc = request_irq(edev->int_info.msix[i].vector,
3223 qede_msix_fp_int, 0, edev->fp_array[i].name,
3224 &edev->fp_array[i]);
3225 if (rc) {
3226 DP_ERR(edev, "Request fp %d irq failed\n", i);
3227 qede_sync_free_irqs(edev);
3228 return rc;
3229 }
3230 DP_VERBOSE(edev, NETIF_MSG_INTR,
3231 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3232 edev->fp_array[i].name, i,
3233 &edev->fp_array[i]);
3234 edev->int_info.used_cnt++;
3235 }
3236
3237 return 0;
3238}
3239
3240static void qede_simd_fp_handler(void *cookie)
3241{
3242 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3243
3244 napi_schedule_irqoff(&fp->napi);
3245}
3246
3247static int qede_setup_irqs(struct qede_dev *edev)
3248{
3249 int i, rc = 0;
3250
3251 /* Learn Interrupt configuration */
3252 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3253 if (rc)
3254 return rc;
3255
3256 if (edev->int_info.msix_cnt) {
3257 rc = qede_req_msix_irqs(edev);
3258 if (rc)
3259 return rc;
3260 edev->ndev->irq = edev->int_info.msix[0].vector;
3261 } else {
3262 const struct qed_common_ops *ops;
3263
3264 /* qed should learn receive the RSS ids and callbacks */
3265 ops = edev->ops->common;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003266 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
Yuval Mintz29502192015-10-26 11:02:29 +02003267 ops->simd_handler_config(edev->cdev,
3268 &edev->fp_array[i], i,
3269 qede_simd_fp_handler);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003270 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02003271 }
3272 return 0;
3273}
3274
3275static int qede_drain_txq(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03003276 struct qede_tx_queue *txq, bool allow_drain)
Yuval Mintz29502192015-10-26 11:02:29 +02003277{
3278 int rc, cnt = 1000;
3279
3280 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3281 if (!cnt) {
3282 if (allow_drain) {
3283 DP_NOTICE(edev,
3284 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3285 txq->index);
3286 rc = edev->ops->common->drain(edev->cdev);
3287 if (rc)
3288 return rc;
3289 return qede_drain_txq(edev, txq, false);
3290 }
3291 DP_NOTICE(edev,
3292 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3293 txq->index, txq->sw_tx_prod,
3294 txq->sw_tx_cons);
3295 return -ENODEV;
3296 }
3297 cnt--;
3298 usleep_range(1000, 2000);
3299 barrier();
3300 }
3301
3302 /* FW finished processing, wait for HW to transmit all tx packets */
3303 usleep_range(1000, 2000);
3304
3305 return 0;
3306}
3307
3308static int qede_stop_queues(struct qede_dev *edev)
3309{
3310 struct qed_update_vport_params vport_update_params;
3311 struct qed_dev *cdev = edev->cdev;
3312 int rc, tc, i;
3313
3314 /* Disable the vport */
3315 memset(&vport_update_params, 0, sizeof(vport_update_params));
3316 vport_update_params.vport_id = 0;
3317 vport_update_params.update_vport_active_flg = 1;
3318 vport_update_params.vport_active_flg = 0;
3319 vport_update_params.update_rss_flg = 0;
3320
3321 rc = edev->ops->vport_update(cdev, &vport_update_params);
3322 if (rc) {
3323 DP_ERR(edev, "Failed to update vport\n");
3324 return rc;
3325 }
3326
3327 /* Flush Tx queues. If needed, request drain from MCP */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003328 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003329 struct qede_fastpath *fp = &edev->fp_array[i];
3330
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003331 if (fp->type & QEDE_FASTPATH_TX) {
3332 for (tc = 0; tc < edev->num_tc; tc++) {
3333 struct qede_tx_queue *txq = &fp->txqs[tc];
Yuval Mintz29502192015-10-26 11:02:29 +02003334
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003335 rc = qede_drain_txq(edev, txq, true);
3336 if (rc)
3337 return rc;
3338 }
Yuval Mintz29502192015-10-26 11:02:29 +02003339 }
3340 }
3341
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003342 /* Stop all Queues in reverse order */
3343 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
Yuval Mintz29502192015-10-26 11:02:29 +02003344 struct qed_stop_rxq_params rx_params;
3345
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003346 /* Stop the Tx Queue(s) */
3347 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
3348 for (tc = 0; tc < edev->num_tc; tc++) {
3349 struct qed_stop_txq_params tx_params;
3350 u8 val;
Yuval Mintz29502192015-10-26 11:02:29 +02003351
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003352 tx_params.rss_id = i;
3353 val = edev->fp_array[i].txqs[tc].index;
3354 tx_params.tx_queue_id = val;
3355 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3356 if (rc) {
3357 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3358 tx_params.tx_queue_id);
3359 return rc;
3360 }
Yuval Mintz29502192015-10-26 11:02:29 +02003361 }
3362 }
3363
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003364 /* Stop the Rx Queue */
3365 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
3366 memset(&rx_params, 0, sizeof(rx_params));
3367 rx_params.rss_id = i;
3368 rx_params.rx_queue_id = edev->fp_array[i].rxq->rxq_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003369
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003370 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3371 if (rc) {
3372 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3373 return rc;
3374 }
Yuval Mintz29502192015-10-26 11:02:29 +02003375 }
3376 }
3377
3378 /* Stop the vport */
3379 rc = edev->ops->vport_stop(cdev, 0);
3380 if (rc)
3381 DP_ERR(edev, "Failed to stop VPORT\n");
3382
3383 return rc;
3384}
3385
Yuval Mintza0d26d52016-06-19 15:18:13 +03003386static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
Yuval Mintz29502192015-10-26 11:02:29 +02003387{
3388 int rc, tc, i;
Manish Chopra088c8612016-03-04 12:35:05 -05003389 int vlan_removal_en = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02003390 struct qed_dev *cdev = edev->cdev;
Yuval Mintz29502192015-10-26 11:02:29 +02003391 struct qed_update_vport_params vport_update_params;
3392 struct qed_queue_start_common_params q_params;
Yuval Mintzfefb0202016-05-11 16:36:19 +03003393 struct qed_dev_info *qed_info = &edev->dev_info.common;
Manish Chopra088c8612016-03-04 12:35:05 -05003394 struct qed_start_vport_params start = {0};
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003395 bool reset_rss_indir = false;
Yuval Mintz29502192015-10-26 11:02:29 +02003396
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003397 if (!edev->num_queues) {
Yuval Mintz29502192015-10-26 11:02:29 +02003398 DP_ERR(edev,
3399 "Cannot update V-VPORT as active as there are no Rx queues\n");
3400 return -EINVAL;
3401 }
3402
Manish Chopra55482ed2016-03-04 12:35:06 -05003403 start.gro_enable = !edev->gro_disable;
Manish Chopra088c8612016-03-04 12:35:05 -05003404 start.mtu = edev->ndev->mtu;
3405 start.vport_id = 0;
3406 start.drop_ttl0 = true;
3407 start.remove_inner_vlan = vlan_removal_en;
Yuval Mintz7f7a1442016-07-27 14:45:22 +03003408 start.clear_stats = clear_stats;
Manish Chopra088c8612016-03-04 12:35:05 -05003409
3410 rc = edev->ops->vport_start(cdev, &start);
Yuval Mintz29502192015-10-26 11:02:29 +02003411
3412 if (rc) {
3413 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3414 return rc;
3415 }
3416
3417 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3418 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
Manish Chopra088c8612016-03-04 12:35:05 -05003419 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
Yuval Mintz29502192015-10-26 11:02:29 +02003420
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003421 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003422 struct qede_fastpath *fp = &edev->fp_array[i];
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003423 dma_addr_t p_phys_table;
3424 u32 page_cnt;
Yuval Mintz29502192015-10-26 11:02:29 +02003425
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003426 if (fp->type & QEDE_FASTPATH_RX) {
3427 struct qede_rx_queue *rxq = fp->rxq;
3428 __le16 *val;
Yuval Mintz29502192015-10-26 11:02:29 +02003429
3430 memset(&q_params, 0, sizeof(q_params));
3431 q_params.rss_id = i;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003432 q_params.queue_id = rxq->rxq_id;
3433 q_params.vport_id = 0;
3434 q_params.sb = fp->sb_info->igu_sb_id;
3435 q_params.sb_idx = RX_PI;
3436
3437 p_phys_table =
3438 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
3439 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
3440
3441 rc = edev->ops->q_rx_start(cdev, &q_params,
3442 rxq->rx_buf_size,
3443 rxq->rx_bd_ring.p_phys_addr,
3444 p_phys_table,
3445 page_cnt,
3446 &rxq->hw_rxq_prod_addr);
3447 if (rc) {
3448 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
3449 rc);
3450 return rc;
3451 }
3452
3453 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
3454 rxq->hw_cons_ptr = val;
3455
3456 qede_update_rx_prod(edev, rxq);
3457 }
3458
3459 if (!(fp->type & QEDE_FASTPATH_TX))
3460 continue;
3461
3462 for (tc = 0; tc < edev->num_tc; tc++) {
3463 struct qede_tx_queue *txq = &fp->txqs[tc];
3464
3465 p_phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
3466 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
3467
3468 memset(&q_params, 0, sizeof(q_params));
3469 q_params.rss_id = i;
3470 q_params.queue_id = txq->index;
Yuval Mintz29502192015-10-26 11:02:29 +02003471 q_params.vport_id = 0;
3472 q_params.sb = fp->sb_info->igu_sb_id;
3473 q_params.sb_idx = TX_PI(tc);
3474
3475 rc = edev->ops->q_tx_start(cdev, &q_params,
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003476 p_phys_table, page_cnt,
Yuval Mintz29502192015-10-26 11:02:29 +02003477 &txq->doorbell_addr);
3478 if (rc) {
3479 DP_ERR(edev, "Start TXQ #%d failed %d\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003480 txq->index, rc);
Yuval Mintz29502192015-10-26 11:02:29 +02003481 return rc;
3482 }
3483
3484 txq->hw_cons_ptr =
3485 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3486 SET_FIELD(txq->tx_db.data.params,
3487 ETH_DB_DATA_DEST, DB_DEST_XCM);
3488 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3489 DB_AGG_CMD_SET);
3490 SET_FIELD(txq->tx_db.data.params,
3491 ETH_DB_DATA_AGG_VAL_SEL,
3492 DQ_XCM_ETH_TX_BD_PROD_CMD);
3493
3494 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3495 }
3496 }
3497
3498 /* Prepare and send the vport enable */
3499 memset(&vport_update_params, 0, sizeof(vport_update_params));
Manish Chopra088c8612016-03-04 12:35:05 -05003500 vport_update_params.vport_id = start.vport_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003501 vport_update_params.update_vport_active_flg = 1;
3502 vport_update_params.vport_active_flg = 1;
3503
Yuval Mintz831bfb0e2016-05-11 16:36:25 +03003504 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3505 qed_info->tx_switching) {
3506 vport_update_params.update_tx_switching_flg = 1;
3507 vport_update_params.tx_switching_flg = 1;
3508 }
3509
Yuval Mintz29502192015-10-26 11:02:29 +02003510 /* Fill struct with RSS params */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003511 if (QEDE_RSS_COUNT(edev) > 1) {
Yuval Mintz29502192015-10-26 11:02:29 +02003512 vport_update_params.update_rss_flg = 1;
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003513
3514 /* Need to validate current RSS config uses valid entries */
3515 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3516 if (edev->rss_params.rss_ind_table[i] >=
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003517 QEDE_RSS_COUNT(edev)) {
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003518 reset_rss_indir = true;
3519 break;
3520 }
3521 }
3522
3523 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3524 reset_rss_indir) {
3525 u16 val;
3526
3527 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3528 u16 indir_val;
3529
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003530 val = QEDE_RSS_COUNT(edev);
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003531 indir_val = ethtool_rxfh_indir_default(i, val);
3532 edev->rss_params.rss_ind_table[i] = indir_val;
3533 }
3534 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3535 }
3536
3537 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3538 netdev_rss_key_fill(edev->rss_params.rss_key,
3539 sizeof(edev->rss_params.rss_key));
3540 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3541 }
3542
3543 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3544 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3545 QED_RSS_IPV6 |
3546 QED_RSS_IPV4_TCP |
3547 QED_RSS_IPV6_TCP;
3548 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3549 }
3550
3551 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3552 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003553 } else {
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003554 memset(&vport_update_params.rss_params, 0,
3555 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003556 }
Yuval Mintz29502192015-10-26 11:02:29 +02003557
3558 rc = edev->ops->vport_update(cdev, &vport_update_params);
3559 if (rc) {
3560 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3561 return rc;
3562 }
3563
3564 return 0;
3565}
3566
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003567static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3568 enum qed_filter_xcast_params_type opcode,
3569 unsigned char *mac, int num_macs)
3570{
3571 struct qed_filter_params filter_cmd;
3572 int i;
3573
3574 memset(&filter_cmd, 0, sizeof(filter_cmd));
3575 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3576 filter_cmd.filter.mcast.type = opcode;
3577 filter_cmd.filter.mcast.num = num_macs;
3578
3579 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3580 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3581
3582 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3583}
3584
Yuval Mintz29502192015-10-26 11:02:29 +02003585enum qede_unload_mode {
3586 QEDE_UNLOAD_NORMAL,
3587};
3588
3589static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3590{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003591 struct qed_link_params link_params;
Yuval Mintz29502192015-10-26 11:02:29 +02003592 int rc;
3593
3594 DP_INFO(edev, "Starting qede unload\n");
3595
Ram Amranicee9fbd2016-10-01 21:59:56 +03003596 qede_roce_dev_event_close(edev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003597 mutex_lock(&edev->qede_lock);
3598 edev->state = QEDE_STATE_CLOSED;
3599
Yuval Mintz29502192015-10-26 11:02:29 +02003600 /* Close OS Tx */
3601 netif_tx_disable(edev->ndev);
3602 netif_carrier_off(edev->ndev);
3603
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003604 /* Reset the link */
3605 memset(&link_params, 0, sizeof(link_params));
3606 link_params.link_up = false;
3607 edev->ops->common->set_link(edev->cdev, &link_params);
Yuval Mintz29502192015-10-26 11:02:29 +02003608 rc = qede_stop_queues(edev);
3609 if (rc) {
3610 qede_sync_free_irqs(edev);
3611 goto out;
3612 }
3613
3614 DP_INFO(edev, "Stopped Queues\n");
3615
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003616 qede_vlan_mark_nonconfigured(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02003617 edev->ops->fastpath_stop(edev->cdev);
3618
3619 /* Release the interrupts */
3620 qede_sync_free_irqs(edev);
3621 edev->ops->common->set_fp_int(edev->cdev, 0);
3622
3623 qede_napi_disable_remove(edev);
3624
3625 qede_free_mem_load(edev);
3626 qede_free_fp_array(edev);
3627
3628out:
3629 mutex_unlock(&edev->qede_lock);
3630 DP_INFO(edev, "Ending qede unload\n");
3631}
3632
3633enum qede_load_mode {
3634 QEDE_LOAD_NORMAL,
Yuval Mintza0d26d52016-06-19 15:18:13 +03003635 QEDE_LOAD_RELOAD,
Yuval Mintz29502192015-10-26 11:02:29 +02003636};
3637
3638static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3639{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003640 struct qed_link_params link_params;
3641 struct qed_link_output link_output;
Yuval Mintz29502192015-10-26 11:02:29 +02003642 int rc;
3643
3644 DP_INFO(edev, "Starting qede load\n");
3645
3646 rc = qede_set_num_queues(edev);
3647 if (rc)
3648 goto err0;
3649
3650 rc = qede_alloc_fp_array(edev);
3651 if (rc)
3652 goto err0;
3653
3654 qede_init_fp(edev);
3655
3656 rc = qede_alloc_mem_load(edev);
3657 if (rc)
3658 goto err1;
3659 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003660 QEDE_QUEUE_CNT(edev), edev->num_tc);
Yuval Mintz29502192015-10-26 11:02:29 +02003661
3662 rc = qede_set_real_num_queues(edev);
3663 if (rc)
3664 goto err2;
3665
3666 qede_napi_add_enable(edev);
3667 DP_INFO(edev, "Napi added and enabled\n");
3668
3669 rc = qede_setup_irqs(edev);
3670 if (rc)
3671 goto err3;
3672 DP_INFO(edev, "Setup IRQs succeeded\n");
3673
Yuval Mintza0d26d52016-06-19 15:18:13 +03003674 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
Yuval Mintz29502192015-10-26 11:02:29 +02003675 if (rc)
3676 goto err4;
3677 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3678
3679 /* Add primary mac and set Rx filters */
3680 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3681
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003682 mutex_lock(&edev->qede_lock);
3683 edev->state = QEDE_STATE_OPEN;
3684 mutex_unlock(&edev->qede_lock);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003685
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003686 /* Program un-configured VLANs */
3687 qede_configure_vlan_filters(edev);
3688
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003689 /* Ask for link-up using current configuration */
3690 memset(&link_params, 0, sizeof(link_params));
3691 link_params.link_up = true;
3692 edev->ops->common->set_link(edev->cdev, &link_params);
3693
3694 /* Query whether link is already-up */
3695 memset(&link_output, 0, sizeof(link_output));
3696 edev->ops->common->get_link(edev->cdev, &link_output);
Ram Amranicee9fbd2016-10-01 21:59:56 +03003697 qede_roce_dev_event_open(edev);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003698 qede_link_update(edev, &link_output);
3699
Yuval Mintz29502192015-10-26 11:02:29 +02003700 DP_INFO(edev, "Ending successfully qede load\n");
3701
3702 return 0;
3703
3704err4:
3705 qede_sync_free_irqs(edev);
3706 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3707err3:
3708 qede_napi_disable_remove(edev);
3709err2:
3710 qede_free_mem_load(edev);
3711err1:
3712 edev->ops->common->set_fp_int(edev->cdev, 0);
3713 qede_free_fp_array(edev);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003714 edev->num_queues = 0;
3715 edev->fp_num_tx = 0;
3716 edev->fp_num_rx = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003717err0:
3718 return rc;
3719}
3720
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003721void qede_reload(struct qede_dev *edev,
3722 void (*func)(struct qede_dev *, union qede_reload_args *),
3723 union qede_reload_args *args)
3724{
3725 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3726 /* Call function handler to update parameters
3727 * needed for function load.
3728 */
3729 if (func)
3730 func(edev, args);
3731
Yuval Mintza0d26d52016-06-19 15:18:13 +03003732 qede_load(edev, QEDE_LOAD_RELOAD);
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003733
3734 mutex_lock(&edev->qede_lock);
3735 qede_config_rx_mode(edev->ndev);
3736 mutex_unlock(&edev->qede_lock);
3737}
3738
Yuval Mintz29502192015-10-26 11:02:29 +02003739/* called with rtnl_lock */
3740static int qede_open(struct net_device *ndev)
3741{
3742 struct qede_dev *edev = netdev_priv(ndev);
Manish Choprab18e1702016-04-14 01:38:30 -04003743 int rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003744
3745 netif_carrier_off(ndev);
3746
3747 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3748
Manish Choprab18e1702016-04-14 01:38:30 -04003749 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3750
3751 if (rc)
3752 return rc;
3753
Alexander Duyckf9f082a2016-06-16 12:22:57 -07003754 udp_tunnel_get_rx_info(ndev);
3755
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02003756 edev->ops->common->update_drv_state(edev->cdev, true);
3757
Manish Choprab18e1702016-04-14 01:38:30 -04003758 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003759}
3760
3761static int qede_close(struct net_device *ndev)
3762{
3763 struct qede_dev *edev = netdev_priv(ndev);
3764
3765 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3766
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02003767 edev->ops->common->update_drv_state(edev->cdev, false);
3768
Yuval Mintz29502192015-10-26 11:02:29 +02003769 return 0;
3770}
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003771
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003772static void qede_link_update(void *dev, struct qed_link_output *link)
3773{
3774 struct qede_dev *edev = dev;
3775
3776 if (!netif_running(edev->ndev)) {
3777 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3778 return;
3779 }
3780
3781 if (link->link_up) {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003782 if (!netif_carrier_ok(edev->ndev)) {
3783 DP_NOTICE(edev, "Link is up\n");
3784 netif_tx_start_all_queues(edev->ndev);
3785 netif_carrier_on(edev->ndev);
3786 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003787 } else {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003788 if (netif_carrier_ok(edev->ndev)) {
3789 DP_NOTICE(edev, "Link is down\n");
3790 netif_tx_disable(edev->ndev);
3791 netif_carrier_off(edev->ndev);
3792 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003793 }
3794}
3795
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003796static int qede_set_mac_addr(struct net_device *ndev, void *p)
3797{
3798 struct qede_dev *edev = netdev_priv(ndev);
3799 struct sockaddr *addr = p;
3800 int rc;
3801
3802 ASSERT_RTNL(); /* @@@TBD To be removed */
3803
3804 DP_INFO(edev, "Set_mac_addr called\n");
3805
3806 if (!is_valid_ether_addr(addr->sa_data)) {
3807 DP_NOTICE(edev, "The MAC address is not valid\n");
3808 return -EFAULT;
3809 }
3810
Yuval Mintzeff16962016-05-11 16:36:21 +03003811 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3812 DP_NOTICE(edev, "qed prevents setting MAC\n");
3813 return -EINVAL;
3814 }
3815
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003816 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3817
3818 if (!netif_running(ndev)) {
3819 DP_NOTICE(edev, "The device is currently down\n");
3820 return 0;
3821 }
3822
3823 /* Remove the previous primary mac */
3824 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3825 edev->primary_mac);
3826 if (rc)
3827 return rc;
3828
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02003829 edev->ops->common->update_mac(edev->cdev, addr->sa_data);
3830
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003831 /* Add MAC filter according to the new unicast HW MAC address */
3832 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3833 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3834 edev->primary_mac);
3835}
3836
3837static int
3838qede_configure_mcast_filtering(struct net_device *ndev,
3839 enum qed_filter_rx_mode_type *accept_flags)
3840{
3841 struct qede_dev *edev = netdev_priv(ndev);
3842 unsigned char *mc_macs, *temp;
3843 struct netdev_hw_addr *ha;
3844 int rc = 0, mc_count;
3845 size_t size;
3846
3847 size = 64 * ETH_ALEN;
3848
3849 mc_macs = kzalloc(size, GFP_KERNEL);
3850 if (!mc_macs) {
3851 DP_NOTICE(edev,
3852 "Failed to allocate memory for multicast MACs\n");
3853 rc = -ENOMEM;
3854 goto exit;
3855 }
3856
3857 temp = mc_macs;
3858
3859 /* Remove all previously configured MAC filters */
3860 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3861 mc_macs, 1);
3862 if (rc)
3863 goto exit;
3864
3865 netif_addr_lock_bh(ndev);
3866
3867 mc_count = netdev_mc_count(ndev);
3868 if (mc_count < 64) {
3869 netdev_for_each_mc_addr(ha, ndev) {
3870 ether_addr_copy(temp, ha->addr);
3871 temp += ETH_ALEN;
3872 }
3873 }
3874
3875 netif_addr_unlock_bh(ndev);
3876
3877 /* Check for all multicast @@@TBD resource allocation */
3878 if ((ndev->flags & IFF_ALLMULTI) ||
3879 (mc_count > 64)) {
3880 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3881 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3882 } else {
3883 /* Add all multicast MAC filters */
3884 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3885 mc_macs, mc_count);
3886 }
3887
3888exit:
3889 kfree(mc_macs);
3890 return rc;
3891}
3892
3893static void qede_set_rx_mode(struct net_device *ndev)
3894{
3895 struct qede_dev *edev = netdev_priv(ndev);
3896
3897 DP_INFO(edev, "qede_set_rx_mode called\n");
3898
3899 if (edev->state != QEDE_STATE_OPEN) {
3900 DP_INFO(edev,
3901 "qede_set_rx_mode called while interface is down\n");
3902 } else {
3903 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3904 schedule_delayed_work(&edev->sp_task, 0);
3905 }
3906}
3907
3908/* Must be called with qede_lock held */
3909static void qede_config_rx_mode(struct net_device *ndev)
3910{
3911 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3912 struct qede_dev *edev = netdev_priv(ndev);
3913 struct qed_filter_params rx_mode;
3914 unsigned char *uc_macs, *temp;
3915 struct netdev_hw_addr *ha;
3916 int rc, uc_count;
3917 size_t size;
3918
3919 netif_addr_lock_bh(ndev);
3920
3921 uc_count = netdev_uc_count(ndev);
3922 size = uc_count * ETH_ALEN;
3923
3924 uc_macs = kzalloc(size, GFP_ATOMIC);
3925 if (!uc_macs) {
3926 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3927 netif_addr_unlock_bh(ndev);
3928 return;
3929 }
3930
3931 temp = uc_macs;
3932 netdev_for_each_uc_addr(ha, ndev) {
3933 ether_addr_copy(temp, ha->addr);
3934 temp += ETH_ALEN;
3935 }
3936
3937 netif_addr_unlock_bh(ndev);
3938
3939 /* Configure the struct for the Rx mode */
3940 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3941 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3942
3943 /* Remove all previous unicast secondary macs and multicast macs
3944 * (configrue / leave the primary mac)
3945 */
3946 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3947 edev->primary_mac);
3948 if (rc)
3949 goto out;
3950
3951 /* Check for promiscuous */
3952 if ((ndev->flags & IFF_PROMISC) ||
Yuval Mintz7b7e70f2016-10-14 05:19:20 -04003953 (uc_count > edev->dev_info.num_mac_filters - 1)) {
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003954 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3955 } else {
3956 /* Add MAC filters according to the unicast secondary macs */
3957 int i;
3958
3959 temp = uc_macs;
3960 for (i = 0; i < uc_count; i++) {
3961 rc = qede_set_ucast_rx_mac(edev,
3962 QED_FILTER_XCAST_TYPE_ADD,
3963 temp);
3964 if (rc)
3965 goto out;
3966
3967 temp += ETH_ALEN;
3968 }
3969
3970 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3971 if (rc)
3972 goto out;
3973 }
3974
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003975 /* take care of VLAN mode */
3976 if (ndev->flags & IFF_PROMISC) {
3977 qede_config_accept_any_vlan(edev, true);
3978 } else if (!edev->non_configured_vlans) {
3979 /* It's possible that accept_any_vlan mode is set due to a
3980 * previous setting of IFF_PROMISC. If vlan credits are
3981 * sufficient, disable accept_any_vlan.
3982 */
3983 qede_config_accept_any_vlan(edev, false);
3984 }
3985
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003986 rx_mode.filter.accept_flags = accept_flags;
3987 edev->ops->filter_config(edev->cdev, &rx_mode);
3988out:
3989 kfree(uc_macs);
3990}