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Yuval Mintz32a47e72016-05-11 16:36:12 +03001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintz32a47e72016-05-11 16:36:12 +03003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintz32a47e72016-05-11 16:36:12 +030031 */
32
Yuval Mintzdacd88d2016-05-11 16:36:16 +030033#include <linux/etherdevice.h>
Yuval Mintz36558c32016-05-11 16:36:17 +030034#include <linux/crc32.h>
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +020035#include <linux/vmalloc.h>
Yuval Mintz0b55e272016-05-11 16:36:15 +030036#include <linux/qed/qed_iov_if.h>
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030037#include "qed_cxt.h"
38#include "qed_hsi.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030039#include "qed_hw.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030040#include "qed_init_ops.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030041#include "qed_int.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030042#include "qed_mcp.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030043#include "qed_reg_addr.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030044#include "qed_sp.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030045#include "qed_sriov.h"
46#include "qed_vf.h"
47
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030048/* IOV ramrods */
Yuval Mintz1fe614d2016-06-05 13:11:11 +030049static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf)
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030050{
51 struct vf_start_ramrod_data *p_ramrod = NULL;
52 struct qed_spq_entry *p_ent = NULL;
53 struct qed_sp_init_data init_data;
54 int rc = -EINVAL;
Yuval Mintz1fe614d2016-06-05 13:11:11 +030055 u8 fp_minor;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030056
57 /* Get SPQ entry */
58 memset(&init_data, 0, sizeof(init_data));
59 init_data.cid = qed_spq_get_cid(p_hwfn);
Yuval Mintz1fe614d2016-06-05 13:11:11 +030060 init_data.opaque_fid = p_vf->opaque_fid;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030061 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
62
63 rc = qed_sp_init_request(p_hwfn, &p_ent,
64 COMMON_RAMROD_VF_START,
65 PROTOCOLID_COMMON, &init_data);
66 if (rc)
67 return rc;
68
69 p_ramrod = &p_ent->ramrod.vf_start;
70
Yuval Mintz1fe614d2016-06-05 13:11:11 +030071 p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
72 p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030073
Yuval Mintz1fe614d2016-06-05 13:11:11 +030074 switch (p_hwfn->hw_info.personality) {
75 case QED_PCI_ETH:
76 p_ramrod->personality = PERSONALITY_ETH;
77 break;
78 case QED_PCI_ETH_ROCE:
79 p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
80 break;
81 default:
82 DP_NOTICE(p_hwfn, "Unknown VF personality %d\n",
83 p_hwfn->hw_info.personality);
84 return -EINVAL;
85 }
86
87 fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
Yuval Mintza044df82016-08-22 13:25:09 +030088 if (fp_minor > ETH_HSI_VER_MINOR &&
89 fp_minor != ETH_HSI_VER_NO_PKT_LEN_TUNN) {
Yuval Mintz1fe614d2016-06-05 13:11:11 +030090 DP_VERBOSE(p_hwfn,
91 QED_MSG_IOV,
92 "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n",
93 p_vf->abs_vf_id,
94 ETH_HSI_VER_MAJOR,
95 fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
96 fp_minor = ETH_HSI_VER_MINOR;
97 }
98
Yuval Mintz351a4ded2016-06-02 10:23:29 +030099 p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
Yuval Mintz1fe614d2016-06-05 13:11:11 +0300100 p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
101
102 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
103 "VF[%d] - Starting using HSI %02x.%02x\n",
104 p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300105
106 return qed_spq_post(p_hwfn, p_ent, NULL);
107}
108
Yuval Mintz0b55e272016-05-11 16:36:15 +0300109static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
110 u32 concrete_vfid, u16 opaque_vfid)
111{
112 struct vf_stop_ramrod_data *p_ramrod = NULL;
113 struct qed_spq_entry *p_ent = NULL;
114 struct qed_sp_init_data init_data;
115 int rc = -EINVAL;
116
117 /* Get SPQ entry */
118 memset(&init_data, 0, sizeof(init_data));
119 init_data.cid = qed_spq_get_cid(p_hwfn);
120 init_data.opaque_fid = opaque_vfid;
121 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
122
123 rc = qed_sp_init_request(p_hwfn, &p_ent,
124 COMMON_RAMROD_VF_STOP,
125 PROTOCOLID_COMMON, &init_data);
126 if (rc)
127 return rc;
128
129 p_ramrod = &p_ent->ramrod.vf_stop;
130
131 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
132
133 return qed_spq_post(p_hwfn, p_ent, NULL);
134}
135
Baoyou Xieba569472016-09-09 09:21:15 +0800136static bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400137 int rel_vf_id,
138 bool b_enabled_only, bool b_non_malicious)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300139{
140 if (!p_hwfn->pf_iov_info) {
141 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
142 return false;
143 }
144
145 if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
146 (rel_vf_id < 0))
147 return false;
148
149 if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
150 b_enabled_only)
151 return false;
152
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400153 if ((p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_malicious) &&
154 b_non_malicious)
155 return false;
156
Yuval Mintz32a47e72016-05-11 16:36:12 +0300157 return true;
158}
159
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300160static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
161 u16 relative_vf_id,
162 bool b_enabled_only)
163{
164 struct qed_vf_info *vf = NULL;
165
166 if (!p_hwfn->pf_iov_info) {
167 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
168 return NULL;
169 }
170
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400171 if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id,
172 b_enabled_only, false))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300173 vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
174 else
175 DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
176 relative_vf_id);
177
178 return vf;
179}
180
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200181enum qed_iov_validate_q_mode {
182 QED_IOV_VALIDATE_Q_NA,
183 QED_IOV_VALIDATE_Q_ENABLE,
184 QED_IOV_VALIDATE_Q_DISABLE,
185};
186
187static bool qed_iov_validate_queue_mode(struct qed_hwfn *p_hwfn,
188 struct qed_vf_info *p_vf,
189 u16 qid,
190 enum qed_iov_validate_q_mode mode,
191 bool b_is_tx)
Yuval Mintz41086462016-06-05 13:11:13 +0300192{
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200193 if (mode == QED_IOV_VALIDATE_Q_NA)
194 return true;
195
196 if ((b_is_tx && p_vf->vf_queues[qid].p_tx_cid) ||
197 (!b_is_tx && p_vf->vf_queues[qid].p_rx_cid))
198 return mode == QED_IOV_VALIDATE_Q_ENABLE;
199
200 /* In case we haven't found any valid cid, then its disabled */
201 return mode == QED_IOV_VALIDATE_Q_DISABLE;
202}
203
204static bool qed_iov_validate_rxq(struct qed_hwfn *p_hwfn,
205 struct qed_vf_info *p_vf,
206 u16 rx_qid,
207 enum qed_iov_validate_q_mode mode)
208{
209 if (rx_qid >= p_vf->num_rxqs) {
Yuval Mintz41086462016-06-05 13:11:13 +0300210 DP_VERBOSE(p_hwfn,
211 QED_MSG_IOV,
212 "VF[0x%02x] - can't touch Rx queue[%04x]; Only 0x%04x are allocated\n",
213 p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs);
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200214 return false;
215 }
216
217 return qed_iov_validate_queue_mode(p_hwfn, p_vf, rx_qid, mode, false);
Yuval Mintz41086462016-06-05 13:11:13 +0300218}
219
220static bool qed_iov_validate_txq(struct qed_hwfn *p_hwfn,
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200221 struct qed_vf_info *p_vf,
222 u16 tx_qid,
223 enum qed_iov_validate_q_mode mode)
Yuval Mintz41086462016-06-05 13:11:13 +0300224{
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200225 if (tx_qid >= p_vf->num_txqs) {
Yuval Mintz41086462016-06-05 13:11:13 +0300226 DP_VERBOSE(p_hwfn,
227 QED_MSG_IOV,
228 "VF[0x%02x] - can't touch Tx queue[%04x]; Only 0x%04x are allocated\n",
229 p_vf->abs_vf_id, tx_qid, p_vf->num_txqs);
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200230 return false;
231 }
232
233 return qed_iov_validate_queue_mode(p_hwfn, p_vf, tx_qid, mode, true);
Yuval Mintz41086462016-06-05 13:11:13 +0300234}
235
236static bool qed_iov_validate_sb(struct qed_hwfn *p_hwfn,
237 struct qed_vf_info *p_vf, u16 sb_idx)
238{
239 int i;
240
241 for (i = 0; i < p_vf->num_sbs; i++)
242 if (p_vf->igu_sbs[i] == sb_idx)
243 return true;
244
245 DP_VERBOSE(p_hwfn,
246 QED_MSG_IOV,
247 "VF[0%02x] - tried using sb_idx %04x which doesn't exist as one of its 0x%02x SBs\n",
248 p_vf->abs_vf_id, sb_idx, p_vf->num_sbs);
249
250 return false;
251}
252
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200253static bool qed_iov_validate_active_rxq(struct qed_hwfn *p_hwfn,
254 struct qed_vf_info *p_vf)
255{
256 u8 i;
257
258 for (i = 0; i < p_vf->num_rxqs; i++)
259 if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
260 QED_IOV_VALIDATE_Q_ENABLE,
261 false))
262 return true;
263
264 return false;
265}
266
267static bool qed_iov_validate_active_txq(struct qed_hwfn *p_hwfn,
268 struct qed_vf_info *p_vf)
269{
270 u8 i;
271
272 for (i = 0; i < p_vf->num_txqs; i++)
273 if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
274 QED_IOV_VALIDATE_Q_ENABLE,
275 true))
276 return true;
277
278 return false;
279}
280
Baoyou Xieba569472016-09-09 09:21:15 +0800281static int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
282 int vfid, struct qed_ptt *p_ptt)
Yuval Mintz36558c32016-05-11 16:36:17 +0300283{
284 struct qed_bulletin_content *p_bulletin;
285 int crc_size = sizeof(p_bulletin->crc);
286 struct qed_dmae_params params;
287 struct qed_vf_info *p_vf;
288
289 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
290 if (!p_vf)
291 return -EINVAL;
292
293 if (!p_vf->vf_bulletin)
294 return -EINVAL;
295
296 p_bulletin = p_vf->bulletin.p_virt;
297
298 /* Increment bulletin board version and compute crc */
299 p_bulletin->version++;
300 p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
301 p_vf->bulletin.size - crc_size);
302
303 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
304 "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
305 p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
306
307 /* propagate bulletin board via dmae to vm memory */
308 memset(&params, 0, sizeof(params));
309 params.flags = QED_DMAE_FLAG_VF_DST;
310 params.dst_vfid = p_vf->abs_vf_id;
311 return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
312 p_vf->vf_bulletin, p_vf->bulletin.size / 4,
313 &params);
314}
315
Yuval Mintz32a47e72016-05-11 16:36:12 +0300316static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
317{
318 struct qed_hw_sriov_info *iov = cdev->p_iov_info;
319 int pos = iov->pos;
320
321 DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
322 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
323
324 pci_read_config_word(cdev->pdev,
325 pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
326 pci_read_config_word(cdev->pdev,
327 pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
328
329 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
330 if (iov->num_vfs) {
331 DP_VERBOSE(cdev,
332 QED_MSG_IOV,
333 "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
334 iov->num_vfs = 0;
335 }
336
337 pci_read_config_word(cdev->pdev,
338 pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
339
340 pci_read_config_word(cdev->pdev,
341 pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
342
343 pci_read_config_word(cdev->pdev,
344 pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
345
346 pci_read_config_dword(cdev->pdev,
347 pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
348
349 pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
350
351 pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
352
353 DP_VERBOSE(cdev,
354 QED_MSG_IOV,
355 "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
356 iov->nres,
357 iov->cap,
358 iov->ctrl,
359 iov->total_vfs,
360 iov->initial_vfs,
361 iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
362
363 /* Some sanity checks */
364 if (iov->num_vfs > NUM_OF_VFS(cdev) ||
365 iov->total_vfs > NUM_OF_VFS(cdev)) {
366 /* This can happen only due to a bug. In this case we set
367 * num_vfs to zero to avoid memory corruption in the code that
368 * assumes max number of vfs
369 */
370 DP_NOTICE(cdev,
371 "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
372 iov->num_vfs);
373
374 iov->num_vfs = 0;
375 iov->total_vfs = 0;
376 }
377
378 return 0;
379}
380
Yuval Mintz32a47e72016-05-11 16:36:12 +0300381static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
382{
383 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
384 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
385 struct qed_bulletin_content *p_bulletin_virt;
386 dma_addr_t req_p, rply_p, bulletin_p;
387 union pfvf_tlvs *p_reply_virt_addr;
388 union vfpf_tlvs *p_req_virt_addr;
389 u8 idx = 0;
390
391 memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
392
393 p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
394 req_p = p_iov_info->mbx_msg_phys_addr;
395 p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
396 rply_p = p_iov_info->mbx_reply_phys_addr;
397 p_bulletin_virt = p_iov_info->p_bulletins;
398 bulletin_p = p_iov_info->bulletins_phys;
399 if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
400 DP_ERR(p_hwfn,
401 "qed_iov_setup_vfdb called without allocating mem first\n");
402 return;
403 }
404
405 for (idx = 0; idx < p_iov->total_vfs; idx++) {
406 struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
407 u32 concrete;
408
409 vf->vf_mbx.req_virt = p_req_virt_addr + idx;
410 vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
411 vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
412 vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
413
414 vf->state = VF_STOPPED;
415 vf->b_init = false;
416
417 vf->bulletin.phys = idx *
418 sizeof(struct qed_bulletin_content) +
419 bulletin_p;
420 vf->bulletin.p_virt = p_bulletin_virt + idx;
421 vf->bulletin.size = sizeof(struct qed_bulletin_content);
422
423 vf->relative_vf_id = idx;
424 vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
425 concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
426 vf->concrete_fid = concrete;
427 vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
428 (vf->abs_vf_id << 8);
429 vf->vport_id = idx + 1;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +0300430
431 vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS;
432 vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
Yuval Mintz32a47e72016-05-11 16:36:12 +0300433 }
434}
435
436static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
437{
438 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
439 void **p_v_addr;
440 u16 num_vfs = 0;
441
442 num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
443
444 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
445 "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
446
447 /* Allocate PF Mailbox buffer (per-VF) */
448 p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
449 p_v_addr = &p_iov_info->mbx_msg_virt_addr;
450 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
451 p_iov_info->mbx_msg_size,
452 &p_iov_info->mbx_msg_phys_addr,
453 GFP_KERNEL);
454 if (!*p_v_addr)
455 return -ENOMEM;
456
457 /* Allocate PF Mailbox Reply buffer (per-VF) */
458 p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
459 p_v_addr = &p_iov_info->mbx_reply_virt_addr;
460 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
461 p_iov_info->mbx_reply_size,
462 &p_iov_info->mbx_reply_phys_addr,
463 GFP_KERNEL);
464 if (!*p_v_addr)
465 return -ENOMEM;
466
467 p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
468 num_vfs;
469 p_v_addr = &p_iov_info->p_bulletins;
470 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
471 p_iov_info->bulletins_size,
472 &p_iov_info->bulletins_phys,
473 GFP_KERNEL);
474 if (!*p_v_addr)
475 return -ENOMEM;
476
477 DP_VERBOSE(p_hwfn,
478 QED_MSG_IOV,
479 "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
480 p_iov_info->mbx_msg_virt_addr,
481 (u64) p_iov_info->mbx_msg_phys_addr,
482 p_iov_info->mbx_reply_virt_addr,
483 (u64) p_iov_info->mbx_reply_phys_addr,
484 p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
485
486 return 0;
487}
488
489static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
490{
491 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
492
493 if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
494 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
495 p_iov_info->mbx_msg_size,
496 p_iov_info->mbx_msg_virt_addr,
497 p_iov_info->mbx_msg_phys_addr);
498
499 if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
500 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
501 p_iov_info->mbx_reply_size,
502 p_iov_info->mbx_reply_virt_addr,
503 p_iov_info->mbx_reply_phys_addr);
504
505 if (p_iov_info->p_bulletins)
506 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
507 p_iov_info->bulletins_size,
508 p_iov_info->p_bulletins,
509 p_iov_info->bulletins_phys);
510}
511
512int qed_iov_alloc(struct qed_hwfn *p_hwfn)
513{
514 struct qed_pf_iov *p_sriov;
515
516 if (!IS_PF_SRIOV(p_hwfn)) {
517 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
518 "No SR-IOV - no need for IOV db\n");
519 return 0;
520 }
521
522 p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700523 if (!p_sriov)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300524 return -ENOMEM;
Yuval Mintz32a47e72016-05-11 16:36:12 +0300525
526 p_hwfn->pf_iov_info = p_sriov;
527
528 return qed_iov_allocate_vfdb(p_hwfn);
529}
530
Mintz, Yuval1ee240e2017-06-01 15:29:11 +0300531void qed_iov_setup(struct qed_hwfn *p_hwfn)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300532{
533 if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
534 return;
535
536 qed_iov_setup_vfdb(p_hwfn);
Yuval Mintz32a47e72016-05-11 16:36:12 +0300537}
538
539void qed_iov_free(struct qed_hwfn *p_hwfn)
540{
541 if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
542 qed_iov_free_vfdb(p_hwfn);
543 kfree(p_hwfn->pf_iov_info);
544 }
545}
546
547void qed_iov_free_hw_info(struct qed_dev *cdev)
548{
549 kfree(cdev->p_iov_info);
550 cdev->p_iov_info = NULL;
551}
552
553int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
554{
555 struct qed_dev *cdev = p_hwfn->cdev;
556 int pos;
557 int rc;
558
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300559 if (IS_VF(p_hwfn->cdev))
560 return 0;
561
Yuval Mintz32a47e72016-05-11 16:36:12 +0300562 /* Learn the PCI configuration */
563 pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
564 PCI_EXT_CAP_ID_SRIOV);
565 if (!pos) {
566 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
567 return 0;
568 }
569
570 /* Allocate a new struct for IOV information */
571 cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700572 if (!cdev->p_iov_info)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300573 return -ENOMEM;
Joe Perches2591c282016-09-04 14:24:03 -0700574
Yuval Mintz32a47e72016-05-11 16:36:12 +0300575 cdev->p_iov_info->pos = pos;
576
577 rc = qed_iov_pci_cfg_info(cdev);
578 if (rc)
579 return rc;
580
581 /* We want PF IOV to be synonemous with the existance of p_iov_info;
582 * In case the capability is published but there are no VFs, simply
583 * de-allocate the struct.
584 */
585 if (!cdev->p_iov_info->total_vfs) {
586 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
587 "IOV capabilities, but no VFs are published\n");
588 kfree(cdev->p_iov_info);
589 cdev->p_iov_info = NULL;
590 return 0;
591 }
592
Mintz, Yuval9c79dda2017-03-14 16:23:54 +0200593 /* First VF index based on offset is tricky:
594 * - If ARI is supported [likely], offset - (16 - pf_id) would
595 * provide the number for eng0. 2nd engine Vfs would begin
596 * after the first engine's VFs.
597 * - If !ARI, VFs would start on next device.
598 * so offset - (256 - pf_id) would provide the number.
599 * Utilize the fact that (256 - pf_id) is achieved only by later
Joe Perches8ac1ed72017-05-08 15:57:56 -0700600 * to differentiate between the two.
Yuval Mintz32a47e72016-05-11 16:36:12 +0300601 */
Mintz, Yuval9c79dda2017-03-14 16:23:54 +0200602
603 if (p_hwfn->cdev->p_iov_info->offset < (256 - p_hwfn->abs_pf_id)) {
604 u32 first = p_hwfn->cdev->p_iov_info->offset +
605 p_hwfn->abs_pf_id - 16;
606
607 cdev->p_iov_info->first_vf_in_pf = first;
608
609 if (QED_PATH_ID(p_hwfn))
610 cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
611 } else {
612 u32 first = p_hwfn->cdev->p_iov_info->offset +
613 p_hwfn->abs_pf_id - 256;
614
615 cdev->p_iov_info->first_vf_in_pf = first;
616 }
Yuval Mintz32a47e72016-05-11 16:36:12 +0300617
618 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
619 "First VF in hwfn 0x%08x\n",
620 cdev->p_iov_info->first_vf_in_pf);
621
622 return 0;
623}
624
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400625bool _qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn,
626 int vfid, bool b_fail_malicious)
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300627{
628 /* Check PF supports sriov */
Yuval Mintzb0409fa2016-05-15 14:48:05 +0300629 if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
630 !IS_PF_SRIOV_ALLOC(p_hwfn))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300631 return false;
632
633 /* Check VF validity */
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400634 if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true, b_fail_malicious))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300635 return false;
636
637 return true;
638}
639
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400640bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
641{
642 return _qed_iov_pf_sanity_check(p_hwfn, vfid, true);
643}
644
Yuval Mintz0b55e272016-05-11 16:36:15 +0300645static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
646 u16 rel_vf_id, u8 to_disable)
647{
648 struct qed_vf_info *vf;
649 int i;
650
651 for_each_hwfn(cdev, i) {
652 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
653
654 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
655 if (!vf)
656 continue;
657
658 vf->to_disable = to_disable;
659 }
660}
661
Baoyou Xieba569472016-09-09 09:21:15 +0800662static void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
Yuval Mintz0b55e272016-05-11 16:36:15 +0300663{
664 u16 i;
665
666 if (!IS_QED_SRIOV(cdev))
667 return;
668
669 for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
670 qed_iov_set_vf_to_disable(cdev, i, to_disable);
671}
672
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300673static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
674 struct qed_ptt *p_ptt, u8 abs_vfid)
675{
676 qed_wr(p_hwfn, p_ptt,
677 PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
678 1 << (abs_vfid & 0x1f));
679}
680
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300681static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
682 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
683{
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300684 int i;
685
686 /* Set VF masks and configuration - pretend */
687 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
688
689 qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
690
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300691 /* unpretend */
692 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
693
694 /* iterate over all queues, clear sb consumer */
Yuval Mintzb2b897e2016-05-15 14:48:06 +0300695 for (i = 0; i < vf->num_sbs; i++)
696 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
697 vf->igu_sbs[i],
698 vf->opaque_fid, true);
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300699}
700
Yuval Mintz0b55e272016-05-11 16:36:15 +0300701static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
702 struct qed_ptt *p_ptt,
703 struct qed_vf_info *vf, bool enable)
704{
705 u32 igu_vf_conf;
706
707 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
708
709 igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
710
711 if (enable)
712 igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
713 else
714 igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
715
716 qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
717
718 /* unpretend */
719 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
720}
721
Mintz, Yuval88072fd2017-05-29 09:53:08 +0300722static int
723qed_iov_enable_vf_access_msix(struct qed_hwfn *p_hwfn,
724 struct qed_ptt *p_ptt, u8 abs_vf_id, u8 num_sbs)
725{
726 u8 current_max = 0;
727 int i;
728
729 /* For AH onward, configuration is per-PF. Find maximum of all
730 * the currently enabled child VFs, and set the number to be that.
731 */
732 if (!QED_IS_BB(p_hwfn->cdev)) {
733 qed_for_each_vf(p_hwfn, i) {
734 struct qed_vf_info *p_vf;
735
736 p_vf = qed_iov_get_vf_info(p_hwfn, (u16)i, true);
737 if (!p_vf)
738 continue;
739
740 current_max = max_t(u8, current_max, p_vf->num_sbs);
741 }
742 }
743
744 if (num_sbs > current_max)
745 return qed_mcp_config_vf_msix(p_hwfn, p_ptt,
746 abs_vf_id, num_sbs);
747
748 return 0;
749}
750
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300751static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
752 struct qed_ptt *p_ptt,
753 struct qed_vf_info *vf)
754{
755 u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
756 int rc;
757
Mintz, Yuval4e9b2a62017-03-19 13:08:13 +0200758 /* It's possible VF was previously considered malicious -
759 * clear the indication even if we're only going to disable VF.
760 */
761 vf->b_malicious = false;
762
Yuval Mintz0b55e272016-05-11 16:36:15 +0300763 if (vf->to_disable)
764 return 0;
765
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300766 DP_VERBOSE(p_hwfn,
767 QED_MSG_IOV,
768 "Enable internal access for vf %x [abs %x]\n",
769 vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
770
771 qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
772
Yuval Mintzb2b897e2016-05-15 14:48:06 +0300773 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
774
Mintz, Yuval88072fd2017-05-29 09:53:08 +0300775 rc = qed_iov_enable_vf_access_msix(p_hwfn, p_ptt,
776 vf->abs_vf_id, vf->num_sbs);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300777 if (rc)
778 return rc;
779
780 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
781
782 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
783 STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
784
785 qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
786 p_hwfn->hw_info.hw_mode);
787
788 /* unpretend */
789 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
790
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300791 vf->state = VF_FREE;
792
793 return rc;
794}
795
Yuval Mintz0b55e272016-05-11 16:36:15 +0300796/**
797 * @brief qed_iov_config_perm_table - configure the permission
798 * zone table.
799 * In E4, queue zone permission table size is 320x9. There
800 * are 320 VF queues for single engine device (256 for dual
801 * engine device), and each entry has the following format:
802 * {Valid, VF[7:0]}
803 * @param p_hwfn
804 * @param p_ptt
805 * @param vf
806 * @param enable
807 */
808static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
809 struct qed_ptt *p_ptt,
810 struct qed_vf_info *vf, u8 enable)
811{
812 u32 reg_addr, val;
813 u16 qzone_id = 0;
814 int qid;
815
816 for (qid = 0; qid < vf->num_rxqs; qid++) {
817 qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
818 &qzone_id);
819
820 reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
Yuval Mintz1a635e42016-08-15 10:42:43 +0300821 val = enable ? (vf->abs_vf_id | BIT(8)) : 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300822 qed_wr(p_hwfn, p_ptt, reg_addr, val);
823 }
824}
825
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300826static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
827 struct qed_ptt *p_ptt,
828 struct qed_vf_info *vf)
829{
830 /* Reset vf in IGU - interrupts are still disabled */
831 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
832
833 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
834
835 /* Permission Table */
836 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
837}
838
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300839static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
840 struct qed_ptt *p_ptt,
841 struct qed_vf_info *vf, u16 num_rx_queues)
842{
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300843 struct qed_igu_block *p_block;
844 struct cau_sb_entry sb_entry;
845 int qid = 0;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300846 u32 val = 0;
847
Mintz, Yuval726fdbe2017-06-01 15:29:06 +0300848 if (num_rx_queues > p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov)
849 num_rx_queues = p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov;
850 p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov -= num_rx_queues;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300851
852 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
853 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
854 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
855
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300856 for (qid = 0; qid < num_rx_queues; qid++) {
857 p_block = qed_get_igu_free_sb(p_hwfn, false);
858 vf->igu_sbs[qid] = p_block->igu_sb_id;
859 p_block->status &= ~QED_IGU_STATUS_FREE;
860 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300861
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300862 qed_wr(p_hwfn, p_ptt,
863 IGU_REG_MAPPING_MEMORY +
864 sizeof(u32) * p_block->igu_sb_id, val);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300865
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300866 /* Configure igu sb in CAU which were marked valid */
867 qed_init_cau_sb_entry(p_hwfn, &sb_entry,
868 p_hwfn->rel_pf_id, vf->abs_vf_id, 1);
869 qed_dmae_host2grc(p_hwfn, p_ptt,
870 (u64)(uintptr_t)&sb_entry,
871 CAU_REG_SB_VAR_MEMORY +
872 p_block->igu_sb_id * sizeof(u64), 2, 0);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300873 }
874
875 vf->num_sbs = (u8) num_rx_queues;
876
877 return vf->num_sbs;
878}
879
Yuval Mintz0b55e272016-05-11 16:36:15 +0300880static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
881 struct qed_ptt *p_ptt,
882 struct qed_vf_info *vf)
883{
884 struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
885 int idx, igu_id;
886 u32 addr, val;
887
888 /* Invalidate igu CAM lines and mark them as free */
889 for (idx = 0; idx < vf->num_sbs; idx++) {
890 igu_id = vf->igu_sbs[idx];
891 addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
892
893 val = qed_rd(p_hwfn, p_ptt, addr);
894 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
895 qed_wr(p_hwfn, p_ptt, addr, val);
896
Mintz, Yuvald749dd02017-06-01 15:29:03 +0300897 p_info->entry[igu_id].status |= QED_IGU_STATUS_FREE;
Mintz, Yuval726fdbe2017-06-01 15:29:06 +0300898 p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov++;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300899 }
900
901 vf->num_sbs = 0;
902}
903
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +0200904static void qed_iov_set_link(struct qed_hwfn *p_hwfn,
905 u16 vfid,
906 struct qed_mcp_link_params *params,
907 struct qed_mcp_link_state *link,
908 struct qed_mcp_link_capabilities *p_caps)
909{
910 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
911 vfid,
912 false);
913 struct qed_bulletin_content *p_bulletin;
914
915 if (!p_vf)
916 return;
917
918 p_bulletin = p_vf->bulletin.p_virt;
919 p_bulletin->req_autoneg = params->speed.autoneg;
920 p_bulletin->req_adv_speed = params->speed.advertised_speeds;
921 p_bulletin->req_forced_speed = params->speed.forced_speed;
922 p_bulletin->req_autoneg_pause = params->pause.autoneg;
923 p_bulletin->req_forced_rx = params->pause.forced_rx;
924 p_bulletin->req_forced_tx = params->pause.forced_tx;
925 p_bulletin->req_loopback = params->loopback_mode;
926
927 p_bulletin->link_up = link->link_up;
928 p_bulletin->speed = link->speed;
929 p_bulletin->full_duplex = link->full_duplex;
930 p_bulletin->autoneg = link->an;
931 p_bulletin->autoneg_complete = link->an_complete;
932 p_bulletin->parallel_detection = link->parallel_detection;
933 p_bulletin->pfc_enabled = link->pfc_enabled;
934 p_bulletin->partner_adv_speed = link->partner_adv_speed;
935 p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
936 p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
937 p_bulletin->partner_adv_pause = link->partner_adv_pause;
938 p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
939
940 p_bulletin->capability_speed = p_caps->speed_capabilities;
941}
942
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300943static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
944 struct qed_ptt *p_ptt,
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200945 struct qed_iov_vf_init_params *p_params)
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300946{
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +0200947 struct qed_mcp_link_capabilities link_caps;
948 struct qed_mcp_link_params link_params;
949 struct qed_mcp_link_state link_state;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300950 u8 num_of_vf_avaiable_chains = 0;
951 struct qed_vf_info *vf = NULL;
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200952 u16 qid, num_irqs;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300953 int rc = 0;
954 u32 cids;
955 u8 i;
956
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200957 vf = qed_iov_get_vf_info(p_hwfn, p_params->rel_vf_id, false);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300958 if (!vf) {
959 DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
960 return -EINVAL;
961 }
962
963 if (vf->b_init) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200964 DP_NOTICE(p_hwfn, "VF[%d] is already active.\n",
965 p_params->rel_vf_id);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300966 return -EINVAL;
967 }
968
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200969 /* Perform sanity checking on the requested queue_id */
970 for (i = 0; i < p_params->num_queues; i++) {
971 u16 min_vf_qzone = FEAT_NUM(p_hwfn, QED_PF_L2_QUE);
972 u16 max_vf_qzone = min_vf_qzone +
973 FEAT_NUM(p_hwfn, QED_VF_L2_QUE) - 1;
974
975 qid = p_params->req_rx_queue[i];
976 if (qid < min_vf_qzone || qid > max_vf_qzone) {
977 DP_NOTICE(p_hwfn,
978 "Can't enable Rx qid [%04x] for VF[%d]: qids [0x%04x,...,0x%04x] available\n",
979 qid,
980 p_params->rel_vf_id,
981 min_vf_qzone, max_vf_qzone);
982 return -EINVAL;
983 }
984
985 qid = p_params->req_tx_queue[i];
986 if (qid > max_vf_qzone) {
987 DP_NOTICE(p_hwfn,
988 "Can't enable Tx qid [%04x] for VF[%d]: max qid 0x%04x\n",
989 qid, p_params->rel_vf_id, max_vf_qzone);
990 return -EINVAL;
991 }
992
993 /* If client *really* wants, Tx qid can be shared with PF */
994 if (qid < min_vf_qzone)
995 DP_VERBOSE(p_hwfn,
996 QED_MSG_IOV,
997 "VF[%d] is using PF qid [0x%04x] for Txq[0x%02x]\n",
998 p_params->rel_vf_id, qid, i);
999 }
1000
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001001 /* Limit number of queues according to number of CIDs */
1002 qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
1003 DP_VERBOSE(p_hwfn,
1004 QED_MSG_IOV,
1005 "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001006 vf->relative_vf_id, p_params->num_queues, (u16)cids);
1007 num_irqs = min_t(u16, p_params->num_queues, ((u16)cids));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001008
1009 num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
1010 p_ptt,
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001011 vf, num_irqs);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001012 if (!num_of_vf_avaiable_chains) {
1013 DP_ERR(p_hwfn, "no available igu sbs\n");
1014 return -ENOMEM;
1015 }
1016
1017 /* Choose queue number and index ranges */
1018 vf->num_rxqs = num_of_vf_avaiable_chains;
1019 vf->num_txqs = num_of_vf_avaiable_chains;
1020
1021 for (i = 0; i < vf->num_rxqs; i++) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001022 struct qed_vf_q_info *p_queue = &vf->vf_queues[i];
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001023
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001024 p_queue->fw_rx_qid = p_params->req_rx_queue[i];
1025 p_queue->fw_tx_qid = p_params->req_tx_queue[i];
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001026
1027 /* CIDs are per-VF, so no problem having them 0-based. */
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001028 p_queue->fw_cid = i;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001029
1030 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001031 "VF[%d] - Q[%d] SB %04x, qid [Rx %04x Tx %04x] CID %04x\n",
1032 vf->relative_vf_id,
1033 i, vf->igu_sbs[i],
1034 p_queue->fw_rx_qid,
1035 p_queue->fw_tx_qid, p_queue->fw_cid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001036 }
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001037
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +02001038 /* Update the link configuration in bulletin */
1039 memcpy(&link_params, qed_mcp_get_link_params(p_hwfn),
1040 sizeof(link_params));
1041 memcpy(&link_state, qed_mcp_get_link_state(p_hwfn), sizeof(link_state));
1042 memcpy(&link_caps, qed_mcp_get_link_capabilities(p_hwfn),
1043 sizeof(link_caps));
1044 qed_iov_set_link(p_hwfn, p_params->rel_vf_id,
1045 &link_params, &link_state, &link_caps);
1046
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001047 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
1048 if (!rc) {
1049 vf->b_init = true;
1050
1051 if (IS_LEAD_HWFN(p_hwfn))
1052 p_hwfn->cdev->p_iov_info->num_vfs++;
1053 }
1054
1055 return rc;
1056}
1057
Yuval Mintz0b55e272016-05-11 16:36:15 +03001058static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
1059 struct qed_ptt *p_ptt, u16 rel_vf_id)
1060{
Manish Chopra079d20a2016-05-15 14:48:07 +03001061 struct qed_mcp_link_capabilities caps;
1062 struct qed_mcp_link_params params;
1063 struct qed_mcp_link_state link;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001064 struct qed_vf_info *vf = NULL;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001065
1066 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
1067 if (!vf) {
1068 DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
1069 return -EINVAL;
1070 }
1071
Yuval Mintz36558c32016-05-11 16:36:17 +03001072 if (vf->bulletin.p_virt)
1073 memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
1074
1075 memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
1076
Manish Chopra079d20a2016-05-15 14:48:07 +03001077 /* Get the link configuration back in bulletin so
1078 * that when VFs are re-enabled they get the actual
1079 * link configuration.
1080 */
1081 memcpy(&params, qed_mcp_get_link_params(p_hwfn), sizeof(params));
1082 memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link));
1083 memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps));
1084 qed_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
1085
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001086 /* Forget the VF's acquisition message */
1087 memset(&vf->acquire, 0, sizeof(vf->acquire));
Yuval Mintz0b55e272016-05-11 16:36:15 +03001088
1089 /* disablng interrupts and resetting permission table was done during
1090 * vf-close, however, we could get here without going through vf_close
1091 */
1092 /* Disable Interrupts for VF */
1093 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
1094
1095 /* Reset Permission table */
1096 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
1097
1098 vf->num_rxqs = 0;
1099 vf->num_txqs = 0;
1100 qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
1101
1102 if (vf->b_init) {
1103 vf->b_init = false;
1104
1105 if (IS_LEAD_HWFN(p_hwfn))
1106 p_hwfn->cdev->p_iov_info->num_vfs--;
1107 }
1108
1109 return 0;
1110}
1111
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001112static bool qed_iov_tlv_supported(u16 tlvtype)
1113{
1114 return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
1115}
1116
1117/* place a given tlv on the tlv buffer, continuing current tlv list */
1118void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
1119{
1120 struct channel_tlv *tl = (struct channel_tlv *)*offset;
1121
1122 tl->type = type;
1123 tl->length = length;
1124
1125 /* Offset should keep pointing to next TLV (the end of the last) */
1126 *offset += length;
1127
1128 /* Return a pointer to the start of the added tlv */
1129 return *offset - length;
1130}
1131
1132/* list the types and lengths of the tlvs on the buffer */
1133void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
1134{
1135 u16 i = 1, total_length = 0;
1136 struct channel_tlv *tlv;
1137
1138 do {
1139 tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
1140
1141 /* output tlv */
1142 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1143 "TLV number %d: type %d, length %d\n",
1144 i, tlv->type, tlv->length);
1145
1146 if (tlv->type == CHANNEL_TLV_LIST_END)
1147 return;
1148
1149 /* Validate entry - protect against malicious VFs */
1150 if (!tlv->length) {
1151 DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
1152 return;
1153 }
1154
1155 total_length += tlv->length;
1156
1157 if (total_length >= sizeof(struct tlv_buffer_size)) {
1158 DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
1159 return;
1160 }
1161
1162 i++;
1163 } while (1);
1164}
1165
1166static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
1167 struct qed_ptt *p_ptt,
1168 struct qed_vf_info *p_vf,
1169 u16 length, u8 status)
1170{
1171 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
1172 struct qed_dmae_params params;
1173 u8 eng_vf_id;
1174
1175 mbx->reply_virt->default_resp.hdr.status = status;
1176
1177 qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
1178
1179 eng_vf_id = p_vf->abs_vf_id;
1180
1181 memset(&params, 0, sizeof(struct qed_dmae_params));
1182 params.flags = QED_DMAE_FLAG_VF_DST;
1183 params.dst_vfid = eng_vf_id;
1184
1185 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
1186 mbx->req_virt->first_tlv.reply_address +
1187 sizeof(u64),
1188 (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
1189 &params);
1190
Mintz, Yuvald9194082017-03-19 13:08:14 +02001191 /* Once PF copies the rc to the VF, the latter can continue
1192 * and send an additional message. So we have to make sure the
1193 * channel would be re-set to ready prior to that.
1194 */
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001195 REG_WR(p_hwfn,
1196 GTT_BAR0_MAP_REG_USDM_RAM +
1197 USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
Mintz, Yuvald9194082017-03-19 13:08:14 +02001198
1199 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
1200 mbx->req_virt->first_tlv.reply_address,
1201 sizeof(u64) / 4, &params);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001202}
1203
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001204static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
1205 enum qed_iov_vport_update_flag flag)
1206{
1207 switch (flag) {
1208 case QED_IOV_VP_UPDATE_ACTIVATE:
1209 return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
Yuval Mintz17b235c2016-05-11 16:36:18 +03001210 case QED_IOV_VP_UPDATE_VLAN_STRIP:
1211 return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1212 case QED_IOV_VP_UPDATE_TX_SWITCH:
1213 return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001214 case QED_IOV_VP_UPDATE_MCAST:
1215 return CHANNEL_TLV_VPORT_UPDATE_MCAST;
1216 case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
1217 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1218 case QED_IOV_VP_UPDATE_RSS:
1219 return CHANNEL_TLV_VPORT_UPDATE_RSS;
Yuval Mintz17b235c2016-05-11 16:36:18 +03001220 case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
1221 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1222 case QED_IOV_VP_UPDATE_SGE_TPA:
1223 return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001224 default:
1225 return 0;
1226 }
1227}
1228
1229static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
1230 struct qed_vf_info *p_vf,
1231 struct qed_iov_vf_mbx *p_mbx,
1232 u8 status,
1233 u16 tlvs_mask, u16 tlvs_accepted)
1234{
1235 struct pfvf_def_resp_tlv *resp;
1236 u16 size, total_len, i;
1237
1238 memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
1239 p_mbx->offset = (u8 *)p_mbx->reply_virt;
1240 size = sizeof(struct pfvf_def_resp_tlv);
1241 total_len = size;
1242
1243 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
1244
1245 /* Prepare response for all extended tlvs if they are found by PF */
1246 for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
Yuval Mintz1a635e42016-08-15 10:42:43 +03001247 if (!(tlvs_mask & BIT(i)))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001248 continue;
1249
1250 resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
1251 qed_iov_vport_to_tlv(p_hwfn, i), size);
1252
Yuval Mintz1a635e42016-08-15 10:42:43 +03001253 if (tlvs_accepted & BIT(i))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001254 resp->hdr.status = status;
1255 else
1256 resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1257
1258 DP_VERBOSE(p_hwfn,
1259 QED_MSG_IOV,
1260 "VF[%d] - vport_update response: TLV %d, status %02x\n",
1261 p_vf->relative_vf_id,
1262 qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1263
1264 total_len += size;
1265 }
1266
1267 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1268 sizeof(struct channel_list_end_tlv));
1269
1270 return total_len;
1271}
1272
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001273static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
1274 struct qed_ptt *p_ptt,
1275 struct qed_vf_info *vf_info,
1276 u16 type, u16 length, u8 status)
1277{
1278 struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
1279
1280 mbx->offset = (u8 *)mbx->reply_virt;
1281
1282 qed_add_tlv(p_hwfn, &mbx->offset, type, length);
1283 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1284 sizeof(struct channel_list_end_tlv));
1285
1286 qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
1287}
1288
Baoyou Xieba569472016-09-09 09:21:15 +08001289static struct
1290qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
1291 u16 relative_vf_id,
1292 bool b_enabled_only)
Yuval Mintz0b55e272016-05-11 16:36:15 +03001293{
1294 struct qed_vf_info *vf = NULL;
1295
1296 vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
1297 if (!vf)
1298 return NULL;
1299
1300 return &vf->p_vf_info;
1301}
1302
Baoyou Xieba569472016-09-09 09:21:15 +08001303static void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
Yuval Mintz0b55e272016-05-11 16:36:15 +03001304{
1305 struct qed_public_vf_info *vf_info;
1306
1307 vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
1308
1309 if (!vf_info)
1310 return;
1311
1312 /* Clear the VF mac */
Shyam Saini0ee28e32017-01-17 07:35:04 +05301313 eth_zero_addr(vf_info->mac);
Mintz, Yuvalf990c822017-01-01 13:57:08 +02001314
1315 vf_info->rx_accept_mode = 0;
1316 vf_info->tx_accept_mode = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001317}
1318
1319static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
1320 struct qed_vf_info *p_vf)
1321{
1322 u32 i;
1323
1324 p_vf->vf_bulletin = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001325 p_vf->vport_instance = 0;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001326 p_vf->configured_features = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001327
1328 /* If VF previously requested less resources, go back to default */
1329 p_vf->num_rxqs = p_vf->num_sbs;
1330 p_vf->num_txqs = p_vf->num_sbs;
1331
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001332 p_vf->num_active_rxqs = 0;
1333
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001334 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
1335 struct qed_vf_q_info *p_queue = &p_vf->vf_queues[i];
1336
1337 if (p_queue->p_rx_cid) {
1338 qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
1339 p_queue->p_rx_cid = NULL;
1340 }
1341
1342 if (p_queue->p_tx_cid) {
1343 qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
1344 p_queue->p_tx_cid = NULL;
1345 }
1346 }
Yuval Mintz0b55e272016-05-11 16:36:15 +03001347
Yuval Mintz08feecd2016-05-11 16:36:20 +03001348 memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001349 memset(&p_vf->acquire, 0, sizeof(p_vf->acquire));
Yuval Mintz0b55e272016-05-11 16:36:15 +03001350 qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
1351}
1352
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001353static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn,
1354 struct qed_ptt *p_ptt,
1355 struct qed_vf_info *p_vf,
1356 struct vf_pf_resc_request *p_req,
1357 struct pf_vf_resc *p_resp)
1358{
1359 int i;
1360
1361 /* Queue related information */
1362 p_resp->num_rxqs = p_vf->num_rxqs;
1363 p_resp->num_txqs = p_vf->num_txqs;
1364 p_resp->num_sbs = p_vf->num_sbs;
1365
1366 for (i = 0; i < p_resp->num_sbs; i++) {
1367 p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
1368 p_resp->hw_sbs[i].sb_qid = 0;
1369 }
1370
1371 /* These fields are filled for backward compatibility.
1372 * Unused by modern vfs.
1373 */
1374 for (i = 0; i < p_resp->num_rxqs; i++) {
1375 qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
1376 (u16 *)&p_resp->hw_qid[i]);
1377 p_resp->cid[i] = p_vf->vf_queues[i].fw_cid;
1378 }
1379
1380 /* Filter related information */
1381 p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters,
1382 p_req->num_mac_filters);
1383 p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters,
1384 p_req->num_vlan_filters);
1385
1386 /* This isn't really needed/enforced, but some legacy VFs might depend
1387 * on the correct filling of this field.
1388 */
1389 p_resp->num_mc_filters = QED_MAX_MC_ADDRS;
1390
1391 /* Validate sufficient resources for VF */
1392 if (p_resp->num_rxqs < p_req->num_rxqs ||
1393 p_resp->num_txqs < p_req->num_txqs ||
1394 p_resp->num_sbs < p_req->num_sbs ||
1395 p_resp->num_mac_filters < p_req->num_mac_filters ||
1396 p_resp->num_vlan_filters < p_req->num_vlan_filters ||
1397 p_resp->num_mc_filters < p_req->num_mc_filters) {
1398 DP_VERBOSE(p_hwfn,
1399 QED_MSG_IOV,
1400 "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x]\n",
1401 p_vf->abs_vf_id,
1402 p_req->num_rxqs,
1403 p_resp->num_rxqs,
1404 p_req->num_rxqs,
1405 p_resp->num_txqs,
1406 p_req->num_sbs,
1407 p_resp->num_sbs,
1408 p_req->num_mac_filters,
1409 p_resp->num_mac_filters,
1410 p_req->num_vlan_filters,
1411 p_resp->num_vlan_filters,
1412 p_req->num_mc_filters, p_resp->num_mc_filters);
Yuval Mintza044df82016-08-22 13:25:09 +03001413
1414 /* Some legacy OSes are incapable of correctly handling this
1415 * failure.
1416 */
1417 if ((p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1418 ETH_HSI_VER_NO_PKT_LEN_TUNN) &&
1419 (p_vf->acquire.vfdev_info.os_type ==
1420 VFPF_ACQUIRE_OS_WINDOWS))
1421 return PFVF_STATUS_SUCCESS;
1422
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001423 return PFVF_STATUS_NO_RESOURCE;
1424 }
1425
1426 return PFVF_STATUS_SUCCESS;
1427}
1428
1429static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn,
1430 struct pfvf_stats_info *p_stats)
1431{
1432 p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
1433 offsetof(struct mstorm_vf_zone,
1434 non_trigger.eth_queue_stat);
1435 p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
1436 p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
1437 offsetof(struct ustorm_vf_zone,
1438 non_trigger.eth_queue_stat);
1439 p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
1440 p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
1441 offsetof(struct pstorm_vf_zone,
1442 non_trigger.eth_queue_stat);
1443 p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
1444 p_stats->tstats.address = 0;
1445 p_stats->tstats.len = 0;
1446}
1447
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001448static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
1449 struct qed_ptt *p_ptt,
1450 struct qed_vf_info *vf)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001451{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001452 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1453 struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
1454 struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
1455 struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001456 u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001457 struct pf_vf_resc *resc = &resp->resc;
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001458 int rc;
1459
1460 memset(resp, 0, sizeof(*resp));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001461
Yuval Mintz05fafbf2016-08-19 09:33:31 +03001462 /* Write the PF version so that VF would know which version
1463 * is supported - might be later overriden. This guarantees that
1464 * VF could recognize legacy PF based on lack of versions in reply.
1465 */
1466 pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
1467 pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
1468
Yuval Mintza044df82016-08-22 13:25:09 +03001469 if (vf->state != VF_FREE && vf->state != VF_STOPPED) {
1470 DP_VERBOSE(p_hwfn,
1471 QED_MSG_IOV,
1472 "VF[%d] sent ACQUIRE but is already in state %d - fail request\n",
1473 vf->abs_vf_id, vf->state);
1474 goto out;
1475 }
1476
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001477 /* Validate FW compatibility */
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001478 if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
Yuval Mintza044df82016-08-22 13:25:09 +03001479 if (req->vfdev_info.capabilities &
1480 VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
1481 struct vf_pf_vfdev_info *p_vfdev = &req->vfdev_info;
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001482
Yuval Mintza044df82016-08-22 13:25:09 +03001483 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1484 "VF[%d] is pre-fastpath HSI\n",
1485 vf->abs_vf_id);
1486 p_vfdev->eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
1487 p_vfdev->eth_fp_hsi_minor = ETH_HSI_VER_NO_PKT_LEN_TUNN;
1488 } else {
1489 DP_INFO(p_hwfn,
1490 "VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n",
1491 vf->abs_vf_id,
1492 req->vfdev_info.eth_fp_hsi_major,
1493 req->vfdev_info.eth_fp_hsi_minor,
1494 ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
1495
1496 goto out;
1497 }
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001498 }
1499
1500 /* On 100g PFs, prevent old VFs from loading */
1501 if ((p_hwfn->cdev->num_hwfns > 1) &&
1502 !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
1503 DP_INFO(p_hwfn,
1504 "VF[%d] is running an old driver that doesn't support 100g\n",
1505 vf->abs_vf_id);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001506 goto out;
1507 }
1508
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001509 /* Store the acquire message */
1510 memcpy(&vf->acquire, req, sizeof(vf->acquire));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001511
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001512 vf->opaque_fid = req->vfdev_info.opaque_fid;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001513
1514 vf->vf_bulletin = req->bulletin_addr;
1515 vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
1516 vf->bulletin.size : req->bulletin_size;
1517
1518 /* fill in pfdev info */
1519 pfdev_info->chip_num = p_hwfn->cdev->chip_num;
1520 pfdev_info->db_size = 0;
1521 pfdev_info->indices_per_sb = PIS_PER_SB;
1522
1523 pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
1524 PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
1525 if (p_hwfn->cdev->num_hwfns > 1)
1526 pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
1527
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001528 qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001529
1530 memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
1531
1532 pfdev_info->fw_major = FW_MAJOR_VERSION;
1533 pfdev_info->fw_minor = FW_MINOR_VERSION;
1534 pfdev_info->fw_rev = FW_REVISION_VERSION;
1535 pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
Yuval Mintza044df82016-08-22 13:25:09 +03001536
1537 /* Incorrect when legacy, but doesn't matter as legacy isn't reading
1538 * this field.
1539 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03001540 pfdev_info->minor_fp_hsi = min_t(u8, ETH_HSI_VER_MINOR,
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001541 req->vfdev_info.eth_fp_hsi_minor);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001542 pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
1543 qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
1544
1545 pfdev_info->dev_type = p_hwfn->cdev->type;
1546 pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
1547
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001548 /* Fill resources available to VF; Make sure there are enough to
1549 * satisfy the VF's request.
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001550 */
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001551 vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
1552 &req->resc_request, resc);
1553 if (vfpf_status != PFVF_STATUS_SUCCESS)
1554 goto out;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001555
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001556 /* Start the VF in FW */
1557 rc = qed_sp_vf_start(p_hwfn, vf);
1558 if (rc) {
1559 DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
1560 vfpf_status = PFVF_STATUS_FAILURE;
1561 goto out;
1562 }
1563
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001564 /* Fill agreed size of bulletin board in response */
1565 resp->bulletin_size = vf->bulletin.size;
Yuval Mintz36558c32016-05-11 16:36:17 +03001566 qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001567
1568 DP_VERBOSE(p_hwfn,
1569 QED_MSG_IOV,
1570 "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
1571 "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
1572 vf->abs_vf_id,
1573 resp->pfdev_info.chip_num,
1574 resp->pfdev_info.db_size,
1575 resp->pfdev_info.indices_per_sb,
1576 resp->pfdev_info.capabilities,
1577 resc->num_rxqs,
1578 resc->num_txqs,
1579 resc->num_sbs,
1580 resc->num_mac_filters,
1581 resc->num_vlan_filters);
1582 vf->state = VF_ACQUIRED;
1583
1584 /* Prepare Response */
1585out:
1586 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
1587 sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001588}
1589
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001590static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
1591 struct qed_vf_info *p_vf, bool val)
1592{
1593 struct qed_sp_vport_update_params params;
1594 int rc;
1595
1596 if (val == p_vf->spoof_chk) {
1597 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1598 "Spoofchk value[%d] is already configured\n", val);
1599 return 0;
1600 }
1601
1602 memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
1603 params.opaque_fid = p_vf->opaque_fid;
1604 params.vport_id = p_vf->vport_id;
1605 params.update_anti_spoofing_en_flg = 1;
1606 params.anti_spoofing_en = val;
1607
1608 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
Yuval Mintzcb1fa082016-07-27 14:45:20 +03001609 if (!rc) {
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001610 p_vf->spoof_chk = val;
1611 p_vf->req_spoofchk_val = p_vf->spoof_chk;
1612 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1613 "Spoofchk val[%d] configured\n", val);
1614 } else {
1615 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1616 "Spoofchk configuration[val:%d] failed for VF[%d]\n",
1617 val, p_vf->relative_vf_id);
1618 }
1619
1620 return rc;
1621}
1622
Yuval Mintz08feecd2016-05-11 16:36:20 +03001623static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
1624 struct qed_vf_info *p_vf)
1625{
1626 struct qed_filter_ucast filter;
1627 int rc = 0;
1628 int i;
1629
1630 memset(&filter, 0, sizeof(filter));
1631 filter.is_rx_filter = 1;
1632 filter.is_tx_filter = 1;
1633 filter.vport_to_add_to = p_vf->vport_id;
1634 filter.opcode = QED_FILTER_ADD;
1635
1636 /* Reconfigure vlans */
1637 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
1638 if (!p_vf->shadow_config.vlans[i].used)
1639 continue;
1640
1641 filter.type = QED_FILTER_VLAN;
1642 filter.vlan = p_vf->shadow_config.vlans[i].vid;
Yuval Mintz1a635e42016-08-15 10:42:43 +03001643 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
Yuval Mintz08feecd2016-05-11 16:36:20 +03001644 "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
1645 filter.vlan, p_vf->relative_vf_id);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001646 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1647 &filter, QED_SPQ_MODE_CB, NULL);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001648 if (rc) {
1649 DP_NOTICE(p_hwfn,
1650 "Failed to configure VLAN [%04x] to VF [%04x]\n",
1651 filter.vlan, p_vf->relative_vf_id);
1652 break;
1653 }
1654 }
1655
1656 return rc;
1657}
1658
1659static int
1660qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
1661 struct qed_vf_info *p_vf, u64 events)
1662{
1663 int rc = 0;
1664
Yuval Mintz1a635e42016-08-15 10:42:43 +03001665 if ((events & BIT(VLAN_ADDR_FORCED)) &&
Yuval Mintz08feecd2016-05-11 16:36:20 +03001666 !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
1667 rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
1668
1669 return rc;
1670}
1671
1672static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
1673 struct qed_vf_info *p_vf, u64 events)
1674{
1675 int rc = 0;
1676 struct qed_filter_ucast filter;
1677
1678 if (!p_vf->vport_instance)
1679 return -EINVAL;
1680
Yuval Mintz1a635e42016-08-15 10:42:43 +03001681 if (events & BIT(MAC_ADDR_FORCED)) {
Yuval Mintzeff16962016-05-11 16:36:21 +03001682 /* Since there's no way [currently] of removing the MAC,
1683 * we can always assume this means we need to force it.
1684 */
1685 memset(&filter, 0, sizeof(filter));
1686 filter.type = QED_FILTER_MAC;
1687 filter.opcode = QED_FILTER_REPLACE;
1688 filter.is_rx_filter = 1;
1689 filter.is_tx_filter = 1;
1690 filter.vport_to_add_to = p_vf->vport_id;
1691 ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
1692
1693 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1694 &filter, QED_SPQ_MODE_CB, NULL);
1695 if (rc) {
1696 DP_NOTICE(p_hwfn,
1697 "PF failed to configure MAC for VF\n");
1698 return rc;
1699 }
1700
1701 p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1702 }
1703
Yuval Mintz1a635e42016-08-15 10:42:43 +03001704 if (events & BIT(VLAN_ADDR_FORCED)) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03001705 struct qed_sp_vport_update_params vport_update;
1706 u8 removal;
1707 int i;
1708
1709 memset(&filter, 0, sizeof(filter));
1710 filter.type = QED_FILTER_VLAN;
1711 filter.is_rx_filter = 1;
1712 filter.is_tx_filter = 1;
1713 filter.vport_to_add_to = p_vf->vport_id;
1714 filter.vlan = p_vf->bulletin.p_virt->pvid;
1715 filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
1716 QED_FILTER_FLUSH;
1717
1718 /* Send the ramrod */
1719 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1720 &filter, QED_SPQ_MODE_CB, NULL);
1721 if (rc) {
1722 DP_NOTICE(p_hwfn,
1723 "PF failed to configure VLAN for VF\n");
1724 return rc;
1725 }
1726
1727 /* Update the default-vlan & silent vlan stripping */
1728 memset(&vport_update, 0, sizeof(vport_update));
1729 vport_update.opaque_fid = p_vf->opaque_fid;
1730 vport_update.vport_id = p_vf->vport_id;
1731 vport_update.update_default_vlan_enable_flg = 1;
1732 vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
1733 vport_update.update_default_vlan_flg = 1;
1734 vport_update.default_vlan = filter.vlan;
1735
1736 vport_update.update_inner_vlan_removal_flg = 1;
1737 removal = filter.vlan ? 1
1738 : p_vf->shadow_config.inner_vlan_removal;
1739 vport_update.inner_vlan_removal_flg = removal;
1740 vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
1741 rc = qed_sp_vport_update(p_hwfn,
1742 &vport_update,
1743 QED_SPQ_MODE_EBLOCK, NULL);
1744 if (rc) {
1745 DP_NOTICE(p_hwfn,
1746 "PF failed to configure VF vport for vlan\n");
1747 return rc;
1748 }
1749
1750 /* Update all the Rx queues */
1751 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001752 struct qed_queue_cid *p_cid;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001753
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001754 p_cid = p_vf->vf_queues[i].p_rx_cid;
1755 if (!p_cid)
Yuval Mintz08feecd2016-05-11 16:36:20 +03001756 continue;
1757
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001758 rc = qed_sp_eth_rx_queues_update(p_hwfn,
1759 (void **)&p_cid,
Yuval Mintz08feecd2016-05-11 16:36:20 +03001760 1, 0, 1,
1761 QED_SPQ_MODE_EBLOCK,
1762 NULL);
1763 if (rc) {
1764 DP_NOTICE(p_hwfn,
1765 "Failed to send Rx update fo queue[0x%04x]\n",
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001766 p_cid->rel.queue_id);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001767 return rc;
1768 }
1769 }
1770
1771 if (filter.vlan)
1772 p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
1773 else
Yuval Mintz1a635e42016-08-15 10:42:43 +03001774 p_vf->configured_features &= ~BIT(VLAN_ADDR_FORCED);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001775 }
1776
1777 /* If forced features are terminated, we need to configure the shadow
1778 * configuration back again.
1779 */
1780 if (events)
1781 qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
1782
1783 return rc;
1784}
1785
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001786static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
1787 struct qed_ptt *p_ptt,
1788 struct qed_vf_info *vf)
1789{
1790 struct qed_sp_vport_start_params params = { 0 };
1791 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1792 struct vfpf_vport_start_tlv *start;
1793 u8 status = PFVF_STATUS_SUCCESS;
1794 struct qed_vf_info *vf_info;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001795 u64 *p_bitmap;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001796 int sb_id;
1797 int rc;
1798
1799 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
1800 if (!vf_info) {
1801 DP_NOTICE(p_hwfn->cdev,
1802 "Failed to get VF info, invalid vfid [%d]\n",
1803 vf->relative_vf_id);
1804 return;
1805 }
1806
1807 vf->state = VF_ENABLED;
1808 start = &mbx->req_virt->start_vport;
1809
Mintz, Yuvalb801b152017-03-19 13:08:15 +02001810 qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1811
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001812 /* Initialize Status block in CAU */
1813 for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1814 if (!start->sb_addr[sb_id]) {
1815 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1816 "VF[%d] did not fill the address of SB %d\n",
1817 vf->relative_vf_id, sb_id);
1818 break;
1819 }
1820
1821 qed_int_cau_conf_sb(p_hwfn, p_ptt,
1822 start->sb_addr[sb_id],
Yuval Mintz1a635e42016-08-15 10:42:43 +03001823 vf->igu_sbs[sb_id], vf->abs_vf_id, 1);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001824 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001825
1826 vf->mtu = start->mtu;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001827 vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
1828
1829 /* Take into consideration configuration forced by hypervisor;
1830 * If none is configured, use the supplied VF values [for old
1831 * vfs that would still be fine, since they passed '0' as padding].
1832 */
1833 p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
Yuval Mintz1a635e42016-08-15 10:42:43 +03001834 if (!(*p_bitmap & BIT(VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03001835 u8 vf_req = start->only_untagged;
1836
1837 vf_info->bulletin.p_virt->default_only_untagged = vf_req;
1838 *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
1839 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001840
1841 params.tpa_mode = start->tpa_mode;
1842 params.remove_inner_vlan = start->inner_vlan_removal;
Yuval Mintz831bfb0e2016-05-11 16:36:25 +03001843 params.tx_switching = true;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001844
Yuval Mintz08feecd2016-05-11 16:36:20 +03001845 params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001846 params.drop_ttl0 = false;
1847 params.concrete_fid = vf->concrete_fid;
1848 params.opaque_fid = vf->opaque_fid;
1849 params.vport_id = vf->vport_id;
1850 params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1851 params.mtu = vf->mtu;
Yuval Mintz11a85d72016-08-22 13:25:10 +03001852 params.check_mac = true;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001853
1854 rc = qed_sp_eth_vport_start(p_hwfn, &params);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001855 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001856 DP_ERR(p_hwfn,
1857 "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
1858 status = PFVF_STATUS_FAILURE;
1859 } else {
1860 vf->vport_instance++;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001861
1862 /* Force configuration if needed on the newly opened vport */
1863 qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001864
1865 __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001866 }
1867 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1868 sizeof(struct pfvf_def_resp_tlv), status);
1869}
1870
1871static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
1872 struct qed_ptt *p_ptt,
1873 struct qed_vf_info *vf)
1874{
1875 u8 status = PFVF_STATUS_SUCCESS;
1876 int rc;
1877
1878 vf->vport_instance--;
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001879 vf->spoof_chk = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001880
Mintz, Yuvalf109c242017-03-19 13:08:16 +02001881 if ((qed_iov_validate_active_rxq(p_hwfn, vf)) ||
1882 (qed_iov_validate_active_txq(p_hwfn, vf))) {
1883 vf->b_malicious = true;
1884 DP_NOTICE(p_hwfn,
1885 "VF [%02x] - considered malicious; Unable to stop RX/TX queuess\n",
1886 vf->abs_vf_id);
1887 status = PFVF_STATUS_MALICIOUS;
1888 goto out;
1889 }
1890
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001891 rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001892 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001893 DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
1894 rc);
1895 status = PFVF_STATUS_FAILURE;
1896 }
1897
Yuval Mintz08feecd2016-05-11 16:36:20 +03001898 /* Forget the configuration on the vport */
1899 vf->configured_features = 0;
1900 memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
1901
Mintz, Yuvalf109c242017-03-19 13:08:16 +02001902out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001903 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
1904 sizeof(struct pfvf_def_resp_tlv), status);
1905}
1906
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001907static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
1908 struct qed_ptt *p_ptt,
Yuval Mintza044df82016-08-22 13:25:09 +03001909 struct qed_vf_info *vf,
1910 u8 status, bool b_legacy)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001911{
1912 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1913 struct pfvf_start_queue_resp_tlv *p_tlv;
1914 struct vfpf_start_rxq_tlv *req;
Yuval Mintza044df82016-08-22 13:25:09 +03001915 u16 length;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001916
1917 mbx->offset = (u8 *)mbx->reply_virt;
1918
Yuval Mintza044df82016-08-22 13:25:09 +03001919 /* Taking a bigger struct instead of adding a TLV to list was a
1920 * mistake, but one which we're now stuck with, as some older
1921 * clients assume the size of the previous response.
1922 */
1923 if (!b_legacy)
1924 length = sizeof(*p_tlv);
1925 else
1926 length = sizeof(struct pfvf_def_resp_tlv);
1927
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001928 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
Yuval Mintza044df82016-08-22 13:25:09 +03001929 length);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001930 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1931 sizeof(struct channel_list_end_tlv));
1932
1933 /* Update the TLV with the response */
Yuval Mintza044df82016-08-22 13:25:09 +03001934 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001935 req = &mbx->req_virt->start_rxq;
Yuval Mintz351a4ded2016-06-02 10:23:29 +03001936 p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
1937 offsetof(struct mstorm_vf_zone,
1938 non_trigger.eth_rx_queue_producers) +
1939 sizeof(struct eth_rx_prod_data) * req->rx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001940 }
1941
Yuval Mintza044df82016-08-22 13:25:09 +03001942 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001943}
1944
1945static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
1946 struct qed_ptt *p_ptt,
1947 struct qed_vf_info *vf)
1948{
1949 struct qed_queue_start_common_params params;
Mintz, Yuval39464972017-06-04 13:31:02 +03001950 struct qed_queue_cid_vf_params vf_params;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001951 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz41086462016-06-05 13:11:13 +03001952 u8 status = PFVF_STATUS_NO_RESOURCE;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001953 struct qed_vf_q_info *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001954 struct vfpf_start_rxq_tlv *req;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03001955 struct qed_sb_info sb_dummy;
Yuval Mintza044df82016-08-22 13:25:09 +03001956 bool b_legacy_vf = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001957 int rc;
1958
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001959 req = &mbx->req_virt->start_rxq;
Yuval Mintz41086462016-06-05 13:11:13 +03001960
Mintz, Yuvalf109c242017-03-19 13:08:16 +02001961 if (!qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid,
1962 QED_IOV_VALIDATE_Q_DISABLE) ||
Yuval Mintz41086462016-06-05 13:11:13 +03001963 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
1964 goto out;
1965
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001966 /* Acquire a new queue-cid */
1967 p_queue = &vf->vf_queues[req->rx_qid];
1968
Mintz, Yuval39464972017-06-04 13:31:02 +03001969 if (vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1970 ETH_HSI_VER_NO_PKT_LEN_TUNN)
1971 b_legacy_vf = true;
1972
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001973 memset(&params, 0, sizeof(params));
1974 params.queue_id = p_queue->fw_rx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001975 params.vport_id = vf->vport_id;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001976 params.stats_id = vf->abs_vf_id + 0x10;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03001977 /* Since IGU index is passed via sb_info, construct a dummy one */
1978 memset(&sb_dummy, 0, sizeof(sb_dummy));
1979 sb_dummy.igu_sb_id = req->hw_sb;
1980 params.p_sb = &sb_dummy;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001981 params.sb_idx = req->sb_index;
1982
Mintz, Yuval39464972017-06-04 13:31:02 +03001983 memset(&vf_params, 0, sizeof(vf_params));
1984 vf_params.vfid = vf->relative_vf_id;
1985 vf_params.vf_qid = (u8)req->rx_qid;
1986 vf_params.vf_legacy = b_legacy_vf;
1987 p_queue->p_rx_cid = qed_eth_queue_to_cid(p_hwfn, vf->opaque_fid,
1988 &params, &vf_params);
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001989 if (!p_queue->p_rx_cid)
1990 goto out;
1991
Yuval Mintza044df82016-08-22 13:25:09 +03001992 /* Legacy VFs have their Producers in a different location, which they
1993 * calculate on their own and clean the producer prior to this.
1994 */
Mintz, Yuval39464972017-06-04 13:31:02 +03001995 if (!b_legacy_vf)
Yuval Mintza044df82016-08-22 13:25:09 +03001996 REG_WR(p_hwfn,
1997 GTT_BAR0_MAP_REG_MSDM_RAM +
1998 MSTORM_ETH_VF_PRODS_OFFSET(vf->abs_vf_id, req->rx_qid),
1999 0);
Yuval Mintza044df82016-08-22 13:25:09 +03002000
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002001 rc = qed_eth_rxq_start_ramrod(p_hwfn,
2002 p_queue->p_rx_cid,
2003 req->bd_max_bytes,
2004 req->rxq_addr,
2005 req->cqe_pbl_addr, req->cqe_pbl_size);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002006 if (rc) {
2007 status = PFVF_STATUS_FAILURE;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002008 qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
2009 p_queue->p_rx_cid = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002010 } else {
Yuval Mintz41086462016-06-05 13:11:13 +03002011 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002012 vf->num_active_rxqs++;
2013 }
2014
Yuval Mintz41086462016-06-05 13:11:13 +03002015out:
Yuval Mintza044df82016-08-22 13:25:09 +03002016 qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status, b_legacy_vf);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002017}
2018
Chopra, Manisheaf3c0c2017-04-24 10:00:49 -07002019static void
2020qed_iov_pf_update_tun_response(struct pfvf_update_tunn_param_tlv *p_resp,
2021 struct qed_tunnel_info *p_tun,
2022 u16 tunn_feature_mask)
2023{
2024 p_resp->tunn_feature_mask = tunn_feature_mask;
2025 p_resp->vxlan_mode = p_tun->vxlan.b_mode_enabled;
2026 p_resp->l2geneve_mode = p_tun->l2_geneve.b_mode_enabled;
2027 p_resp->ipgeneve_mode = p_tun->ip_geneve.b_mode_enabled;
2028 p_resp->l2gre_mode = p_tun->l2_gre.b_mode_enabled;
2029 p_resp->ipgre_mode = p_tun->l2_gre.b_mode_enabled;
2030 p_resp->vxlan_clss = p_tun->vxlan.tun_cls;
2031 p_resp->l2gre_clss = p_tun->l2_gre.tun_cls;
2032 p_resp->ipgre_clss = p_tun->ip_gre.tun_cls;
2033 p_resp->l2geneve_clss = p_tun->l2_geneve.tun_cls;
2034 p_resp->ipgeneve_clss = p_tun->ip_geneve.tun_cls;
2035 p_resp->geneve_udp_port = p_tun->geneve_port.port;
2036 p_resp->vxlan_udp_port = p_tun->vxlan_port.port;
2037}
2038
2039static void
2040__qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
2041 struct qed_tunn_update_type *p_tun,
2042 enum qed_tunn_mode mask, u8 tun_cls)
2043{
2044 if (p_req->tun_mode_update_mask & BIT(mask)) {
2045 p_tun->b_update_mode = true;
2046
2047 if (p_req->tunn_mode & BIT(mask))
2048 p_tun->b_mode_enabled = true;
2049 }
2050
2051 p_tun->tun_cls = tun_cls;
2052}
2053
2054static void
2055qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
2056 struct qed_tunn_update_type *p_tun,
2057 struct qed_tunn_update_udp_port *p_port,
2058 enum qed_tunn_mode mask,
2059 u8 tun_cls, u8 update_port, u16 port)
2060{
2061 if (update_port) {
2062 p_port->b_update_port = true;
2063 p_port->port = port;
2064 }
2065
2066 __qed_iov_pf_update_tun_param(p_req, p_tun, mask, tun_cls);
2067}
2068
2069static bool
2070qed_iov_pf_validate_tunn_param(struct vfpf_update_tunn_param_tlv *p_req)
2071{
2072 bool b_update_requested = false;
2073
2074 if (p_req->tun_mode_update_mask || p_req->update_tun_cls ||
2075 p_req->update_geneve_port || p_req->update_vxlan_port)
2076 b_update_requested = true;
2077
2078 return b_update_requested;
2079}
2080
2081static void qed_pf_validate_tunn_mode(struct qed_tunn_update_type *tun, int *rc)
2082{
2083 if (tun->b_update_mode && !tun->b_mode_enabled) {
2084 tun->b_update_mode = false;
2085 *rc = -EINVAL;
2086 }
2087}
2088
2089static int
2090qed_pf_validate_modify_tunn_config(struct qed_hwfn *p_hwfn,
2091 u16 *tun_features, bool *update,
2092 struct qed_tunnel_info *tun_src)
2093{
2094 struct qed_eth_cb_ops *ops = p_hwfn->cdev->protocol_ops.eth;
2095 struct qed_tunnel_info *tun = &p_hwfn->cdev->tunnel;
2096 u16 bultn_vxlan_port, bultn_geneve_port;
2097 void *cookie = p_hwfn->cdev->ops_cookie;
2098 int i, rc = 0;
2099
2100 *tun_features = p_hwfn->cdev->tunn_feature_mask;
2101 bultn_vxlan_port = tun->vxlan_port.port;
2102 bultn_geneve_port = tun->geneve_port.port;
2103 qed_pf_validate_tunn_mode(&tun_src->vxlan, &rc);
2104 qed_pf_validate_tunn_mode(&tun_src->l2_geneve, &rc);
2105 qed_pf_validate_tunn_mode(&tun_src->ip_geneve, &rc);
2106 qed_pf_validate_tunn_mode(&tun_src->l2_gre, &rc);
2107 qed_pf_validate_tunn_mode(&tun_src->ip_gre, &rc);
2108
2109 if ((tun_src->b_update_rx_cls || tun_src->b_update_tx_cls) &&
2110 (tun_src->vxlan.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2111 tun_src->l2_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2112 tun_src->ip_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2113 tun_src->l2_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2114 tun_src->ip_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN)) {
2115 tun_src->b_update_rx_cls = false;
2116 tun_src->b_update_tx_cls = false;
2117 rc = -EINVAL;
2118 }
2119
2120 if (tun_src->vxlan_port.b_update_port) {
2121 if (tun_src->vxlan_port.port == tun->vxlan_port.port) {
2122 tun_src->vxlan_port.b_update_port = false;
2123 } else {
2124 *update = true;
2125 bultn_vxlan_port = tun_src->vxlan_port.port;
2126 }
2127 }
2128
2129 if (tun_src->geneve_port.b_update_port) {
2130 if (tun_src->geneve_port.port == tun->geneve_port.port) {
2131 tun_src->geneve_port.b_update_port = false;
2132 } else {
2133 *update = true;
2134 bultn_geneve_port = tun_src->geneve_port.port;
2135 }
2136 }
2137
2138 qed_for_each_vf(p_hwfn, i) {
2139 qed_iov_bulletin_set_udp_ports(p_hwfn, i, bultn_vxlan_port,
2140 bultn_geneve_port);
2141 }
2142
2143 qed_schedule_iov(p_hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
2144 ops->ports_update(cookie, bultn_vxlan_port, bultn_geneve_port);
2145
2146 return rc;
2147}
2148
2149static void qed_iov_vf_mbx_update_tunn_param(struct qed_hwfn *p_hwfn,
2150 struct qed_ptt *p_ptt,
2151 struct qed_vf_info *p_vf)
2152{
2153 struct qed_tunnel_info *p_tun = &p_hwfn->cdev->tunnel;
2154 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
2155 struct pfvf_update_tunn_param_tlv *p_resp;
2156 struct vfpf_update_tunn_param_tlv *p_req;
2157 u8 status = PFVF_STATUS_SUCCESS;
2158 bool b_update_required = false;
2159 struct qed_tunnel_info tunn;
2160 u16 tunn_feature_mask = 0;
2161 int i, rc = 0;
2162
2163 mbx->offset = (u8 *)mbx->reply_virt;
2164
2165 memset(&tunn, 0, sizeof(tunn));
2166 p_req = &mbx->req_virt->tunn_param_update;
2167
2168 if (!qed_iov_pf_validate_tunn_param(p_req)) {
2169 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2170 "No tunnel update requested by VF\n");
2171 status = PFVF_STATUS_FAILURE;
2172 goto send_resp;
2173 }
2174
2175 tunn.b_update_rx_cls = p_req->update_tun_cls;
2176 tunn.b_update_tx_cls = p_req->update_tun_cls;
2177
2178 qed_iov_pf_update_tun_param(p_req, &tunn.vxlan, &tunn.vxlan_port,
2179 QED_MODE_VXLAN_TUNN, p_req->vxlan_clss,
2180 p_req->update_vxlan_port,
2181 p_req->vxlan_port);
2182 qed_iov_pf_update_tun_param(p_req, &tunn.l2_geneve, &tunn.geneve_port,
2183 QED_MODE_L2GENEVE_TUNN,
2184 p_req->l2geneve_clss,
2185 p_req->update_geneve_port,
2186 p_req->geneve_port);
2187 __qed_iov_pf_update_tun_param(p_req, &tunn.ip_geneve,
2188 QED_MODE_IPGENEVE_TUNN,
2189 p_req->ipgeneve_clss);
2190 __qed_iov_pf_update_tun_param(p_req, &tunn.l2_gre,
2191 QED_MODE_L2GRE_TUNN, p_req->l2gre_clss);
2192 __qed_iov_pf_update_tun_param(p_req, &tunn.ip_gre,
2193 QED_MODE_IPGRE_TUNN, p_req->ipgre_clss);
2194
2195 /* If PF modifies VF's req then it should
2196 * still return an error in case of partial configuration
2197 * or modified configuration as opposed to requested one.
2198 */
2199 rc = qed_pf_validate_modify_tunn_config(p_hwfn, &tunn_feature_mask,
2200 &b_update_required, &tunn);
2201
2202 if (rc)
2203 status = PFVF_STATUS_FAILURE;
2204
2205 /* If QED client is willing to update anything ? */
2206 if (b_update_required) {
2207 u16 geneve_port;
2208
Manish Chopra4f646752017-05-23 09:41:20 +03002209 rc = qed_sp_pf_update_tunn_cfg(p_hwfn, p_ptt, &tunn,
Chopra, Manisheaf3c0c2017-04-24 10:00:49 -07002210 QED_SPQ_MODE_EBLOCK, NULL);
2211 if (rc)
2212 status = PFVF_STATUS_FAILURE;
2213
2214 geneve_port = p_tun->geneve_port.port;
2215 qed_for_each_vf(p_hwfn, i) {
2216 qed_iov_bulletin_set_udp_ports(p_hwfn, i,
2217 p_tun->vxlan_port.port,
2218 geneve_port);
2219 }
2220 }
2221
2222send_resp:
2223 p_resp = qed_add_tlv(p_hwfn, &mbx->offset,
2224 CHANNEL_TLV_UPDATE_TUNN_PARAM, sizeof(*p_resp));
2225
2226 qed_iov_pf_update_tun_response(p_resp, p_tun, tunn_feature_mask);
2227 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2228 sizeof(struct channel_list_end_tlv));
2229
2230 qed_iov_send_response(p_hwfn, p_ptt, p_vf, sizeof(*p_resp), status);
2231}
2232
Yuval Mintz5040acf2016-06-05 13:11:14 +03002233static void qed_iov_vf_mbx_start_txq_resp(struct qed_hwfn *p_hwfn,
2234 struct qed_ptt *p_ptt,
2235 struct qed_vf_info *p_vf, u8 status)
2236{
2237 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
2238 struct pfvf_start_queue_resp_tlv *p_tlv;
Yuval Mintza044df82016-08-22 13:25:09 +03002239 bool b_legacy = false;
2240 u16 length;
Yuval Mintz5040acf2016-06-05 13:11:14 +03002241
2242 mbx->offset = (u8 *)mbx->reply_virt;
2243
Yuval Mintza044df82016-08-22 13:25:09 +03002244 /* Taking a bigger struct instead of adding a TLV to list was a
2245 * mistake, but one which we're now stuck with, as some older
2246 * clients assume the size of the previous response.
2247 */
2248 if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
2249 ETH_HSI_VER_NO_PKT_LEN_TUNN)
2250 b_legacy = true;
2251
2252 if (!b_legacy)
2253 length = sizeof(*p_tlv);
2254 else
2255 length = sizeof(struct pfvf_def_resp_tlv);
2256
Yuval Mintz5040acf2016-06-05 13:11:14 +03002257 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ,
Yuval Mintza044df82016-08-22 13:25:09 +03002258 length);
Yuval Mintz5040acf2016-06-05 13:11:14 +03002259 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2260 sizeof(struct channel_list_end_tlv));
2261
2262 /* Update the TLV with the response */
Yuval Mintza044df82016-08-22 13:25:09 +03002263 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
Yuval Mintz5040acf2016-06-05 13:11:14 +03002264 u16 qid = mbx->req_virt->start_txq.tx_qid;
2265
Ram Amrani51ff1722016-10-01 21:59:57 +03002266 p_tlv->offset = qed_db_addr_vf(p_vf->vf_queues[qid].fw_cid,
2267 DQ_DEMS_LEGACY);
Yuval Mintz5040acf2016-06-05 13:11:14 +03002268 }
2269
Yuval Mintza044df82016-08-22 13:25:09 +03002270 qed_iov_send_response(p_hwfn, p_ptt, p_vf, length, status);
Yuval Mintz5040acf2016-06-05 13:11:14 +03002271}
2272
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002273static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
2274 struct qed_ptt *p_ptt,
2275 struct qed_vf_info *vf)
2276{
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002277 struct qed_queue_start_common_params params;
Mintz, Yuval39464972017-06-04 13:31:02 +03002278 struct qed_queue_cid_vf_params vf_params;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002279 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz41086462016-06-05 13:11:13 +03002280 u8 status = PFVF_STATUS_NO_RESOURCE;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002281 struct vfpf_start_txq_tlv *req;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002282 struct qed_vf_q_info *p_queue;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03002283 struct qed_sb_info sb_dummy;
Mintz, Yuval39464972017-06-04 13:31:02 +03002284 bool b_vf_legacy = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002285 int rc;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002286 u16 pq;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002287
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002288 memset(&params, 0, sizeof(params));
2289 req = &mbx->req_virt->start_txq;
Yuval Mintz41086462016-06-05 13:11:13 +03002290
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002291 if (!qed_iov_validate_txq(p_hwfn, vf, req->tx_qid,
2292 QED_IOV_VALIDATE_Q_DISABLE) ||
Yuval Mintz41086462016-06-05 13:11:13 +03002293 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
2294 goto out;
2295
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002296 /* Acquire a new queue-cid */
2297 p_queue = &vf->vf_queues[req->tx_qid];
2298
Mintz, Yuval39464972017-06-04 13:31:02 +03002299 if (vf->acquire.vfdev_info.eth_fp_hsi_minor ==
2300 ETH_HSI_VER_NO_PKT_LEN_TUNN)
2301 b_vf_legacy = true;
2302
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002303 params.queue_id = p_queue->fw_tx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002304 params.vport_id = vf->vport_id;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002305 params.stats_id = vf->abs_vf_id + 0x10;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03002306
2307 /* Since IGU index is passed via sb_info, construct a dummy one */
2308 memset(&sb_dummy, 0, sizeof(sb_dummy));
2309 sb_dummy.igu_sb_id = req->hw_sb;
2310 params.p_sb = &sb_dummy;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002311 params.sb_idx = req->sb_index;
2312
Mintz, Yuval39464972017-06-04 13:31:02 +03002313 memset(&vf_params, 0, sizeof(vf_params));
2314 vf_params.vfid = vf->relative_vf_id;
2315 vf_params.vf_qid = (u8)req->tx_qid;
2316 vf_params.vf_legacy = b_vf_legacy;
2317
2318 p_queue->p_tx_cid = qed_eth_queue_to_cid(p_hwfn,
2319 vf->opaque_fid,
2320 &params, &vf_params);
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002321 if (!p_queue->p_tx_cid)
2322 goto out;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002323
Ariel Eliorb5a9ee72017-04-03 12:21:09 +03002324 pq = qed_get_cm_pq_idx_vf(p_hwfn, vf->relative_vf_id);
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002325 rc = qed_eth_txq_start_ramrod(p_hwfn, p_queue->p_tx_cid,
2326 req->pbl_addr, req->pbl_size, pq);
Yuval Mintz41086462016-06-05 13:11:13 +03002327 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002328 status = PFVF_STATUS_FAILURE;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002329 qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
2330 p_queue->p_tx_cid = NULL;
Yuval Mintz41086462016-06-05 13:11:13 +03002331 } else {
2332 status = PFVF_STATUS_SUCCESS;
Yuval Mintz41086462016-06-05 13:11:13 +03002333 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002334
Yuval Mintz41086462016-06-05 13:11:13 +03002335out:
Yuval Mintz5040acf2016-06-05 13:11:14 +03002336 qed_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, status);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002337}
2338
2339static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
2340 struct qed_vf_info *vf,
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002341 u16 rxq_id, bool cqe_completion)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002342{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002343 struct qed_vf_q_info *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002344 int rc = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002345
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002346 if (!qed_iov_validate_rxq(p_hwfn, vf, rxq_id,
2347 QED_IOV_VALIDATE_Q_ENABLE)) {
2348 DP_VERBOSE(p_hwfn,
2349 QED_MSG_IOV,
2350 "VF[%d] Tried Closing Rx 0x%04x which is inactive\n",
2351 vf->relative_vf_id, rxq_id);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002352 return -EINVAL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002353 }
2354
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002355 p_queue = &vf->vf_queues[rxq_id];
2356
2357 rc = qed_eth_rx_queue_stop(p_hwfn,
2358 p_queue->p_rx_cid,
2359 false, cqe_completion);
2360 if (rc)
2361 return rc;
2362
2363 p_queue->p_rx_cid = NULL;
2364 vf->num_active_rxqs--;
2365
2366 return 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002367}
2368
2369static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002370 struct qed_vf_info *vf, u16 txq_id)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002371{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002372 struct qed_vf_q_info *p_queue;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002373 int rc = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002374
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002375 if (!qed_iov_validate_txq(p_hwfn, vf, txq_id,
2376 QED_IOV_VALIDATE_Q_ENABLE))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002377 return -EINVAL;
2378
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002379 p_queue = &vf->vf_queues[txq_id];
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002380
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002381 rc = qed_eth_tx_queue_stop(p_hwfn, p_queue->p_tx_cid);
2382 if (rc)
2383 return rc;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002384
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002385 p_queue->p_tx_cid = NULL;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002386
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002387 return 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002388}
2389
2390static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
2391 struct qed_ptt *p_ptt,
2392 struct qed_vf_info *vf)
2393{
2394 u16 length = sizeof(struct pfvf_def_resp_tlv);
2395 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002396 u8 status = PFVF_STATUS_FAILURE;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002397 struct vfpf_stop_rxqs_tlv *req;
2398 int rc;
2399
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002400 /* There has never been an official driver that used this interface
2401 * for stopping multiple queues, and it is now considered deprecated.
2402 * Validate this isn't used here.
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002403 */
2404 req = &mbx->req_virt->stop_rxqs;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002405 if (req->num_rxqs != 1) {
2406 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2407 "Odd; VF[%d] tried stopping multiple Rx queues\n",
2408 vf->relative_vf_id);
2409 status = PFVF_STATUS_NOT_SUPPORTED;
2410 goto out;
2411 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002412
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002413 rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
2414 req->cqe_completion);
2415 if (!rc)
2416 status = PFVF_STATUS_SUCCESS;
2417out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002418 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
2419 length, status);
2420}
2421
2422static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
2423 struct qed_ptt *p_ptt,
2424 struct qed_vf_info *vf)
2425{
2426 u16 length = sizeof(struct pfvf_def_resp_tlv);
2427 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002428 u8 status = PFVF_STATUS_FAILURE;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002429 struct vfpf_stop_txqs_tlv *req;
2430 int rc;
2431
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002432 /* There has never been an official driver that used this interface
2433 * for stopping multiple queues, and it is now considered deprecated.
2434 * Validate this isn't used here.
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002435 */
2436 req = &mbx->req_virt->stop_txqs;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002437 if (req->num_txqs != 1) {
2438 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2439 "Odd; VF[%d] tried stopping multiple Tx queues\n",
2440 vf->relative_vf_id);
2441 status = PFVF_STATUS_NOT_SUPPORTED;
2442 goto out;
2443 }
2444 rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid);
2445 if (!rc)
2446 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002447
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002448out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002449 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
2450 length, status);
2451}
2452
Yuval Mintz17b235c2016-05-11 16:36:18 +03002453static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
2454 struct qed_ptt *p_ptt,
2455 struct qed_vf_info *vf)
2456{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002457 struct qed_queue_cid *handlers[QED_MAX_VF_CHAINS_PER_PF];
Yuval Mintz17b235c2016-05-11 16:36:18 +03002458 u16 length = sizeof(struct pfvf_def_resp_tlv);
2459 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2460 struct vfpf_update_rxq_tlv *req;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002461 u8 status = PFVF_STATUS_FAILURE;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002462 u8 complete_event_flg;
2463 u8 complete_cqe_flg;
2464 u16 qid;
2465 int rc;
2466 u8 i;
2467
2468 req = &mbx->req_virt->update_rxq;
2469 complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
2470 complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
2471
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002472 /* Validate inputs */
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002473 for (i = req->rx_qid; i < req->rx_qid + req->num_rxqs; i++)
2474 if (!qed_iov_validate_rxq(p_hwfn, vf, i,
2475 QED_IOV_VALIDATE_Q_ENABLE)) {
2476 DP_INFO(p_hwfn, "VF[%d]: Incorrect Rxqs [%04x, %02x]\n",
2477 vf->relative_vf_id, req->rx_qid, req->num_rxqs);
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002478 goto out;
2479 }
2480
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002481 /* Prepare the handlers */
2482 for (i = 0; i < req->num_rxqs; i++) {
2483 qid = req->rx_qid + i;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002484 handlers[i] = vf->vf_queues[qid].p_rx_cid;
2485 }
2486
2487 rc = qed_sp_eth_rx_queues_update(p_hwfn, (void **)&handlers,
2488 req->num_rxqs,
2489 complete_cqe_flg,
2490 complete_event_flg,
2491 QED_SPQ_MODE_EBLOCK, NULL);
2492 if (rc)
2493 goto out;
2494
2495 status = PFVF_STATUS_SUCCESS;
2496out:
Yuval Mintz17b235c2016-05-11 16:36:18 +03002497 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
2498 length, status);
2499}
2500
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002501void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
2502 void *p_tlvs_list, u16 req_type)
2503{
2504 struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
2505 int len = 0;
2506
2507 do {
2508 if (!p_tlv->length) {
2509 DP_NOTICE(p_hwfn, "Zero length TLV found\n");
2510 return NULL;
2511 }
2512
2513 if (p_tlv->type == req_type) {
2514 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2515 "Extended tlv type %d, length %d found\n",
2516 p_tlv->type, p_tlv->length);
2517 return p_tlv;
2518 }
2519
2520 len += p_tlv->length;
2521 p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
2522
2523 if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
2524 DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
2525 return NULL;
2526 }
2527 } while (p_tlv->type != CHANNEL_TLV_LIST_END);
2528
2529 return NULL;
2530}
2531
2532static void
2533qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
2534 struct qed_sp_vport_update_params *p_data,
2535 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2536{
2537 struct vfpf_vport_update_activate_tlv *p_act_tlv;
2538 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
2539
2540 p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
2541 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2542 if (!p_act_tlv)
2543 return;
2544
2545 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
2546 p_data->vport_active_rx_flg = p_act_tlv->active_rx;
2547 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
2548 p_data->vport_active_tx_flg = p_act_tlv->active_tx;
2549 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
2550}
2551
2552static void
Yuval Mintz17b235c2016-05-11 16:36:18 +03002553qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
2554 struct qed_sp_vport_update_params *p_data,
2555 struct qed_vf_info *p_vf,
2556 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2557{
2558 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
2559 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
2560
2561 p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
2562 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2563 if (!p_vlan_tlv)
2564 return;
2565
Yuval Mintz08feecd2016-05-11 16:36:20 +03002566 p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
2567
2568 /* Ignore the VF request if we're forcing a vlan */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002569 if (!(p_vf->configured_features & BIT(VLAN_ADDR_FORCED))) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03002570 p_data->update_inner_vlan_removal_flg = 1;
2571 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
2572 }
Yuval Mintz17b235c2016-05-11 16:36:18 +03002573
2574 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
2575}
2576
2577static void
2578qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
2579 struct qed_sp_vport_update_params *p_data,
2580 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2581{
2582 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
2583 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
2584
2585 p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
2586 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2587 tlv);
2588 if (!p_tx_switch_tlv)
2589 return;
2590
2591 p_data->update_tx_switching_flg = 1;
2592 p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
2593 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
2594}
2595
2596static void
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002597qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
2598 struct qed_sp_vport_update_params *p_data,
2599 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2600{
2601 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
2602 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
2603
2604 p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
2605 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2606 if (!p_mcast_tlv)
2607 return;
2608
2609 p_data->update_approx_mcast_flg = 1;
2610 memcpy(p_data->bins, p_mcast_tlv->bins,
2611 sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
2612 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
2613}
2614
2615static void
2616qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
2617 struct qed_sp_vport_update_params *p_data,
2618 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2619{
2620 struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
2621 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
2622 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
2623
2624 p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
2625 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2626 if (!p_accept_tlv)
2627 return;
2628
2629 p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
2630 p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
2631 p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
2632 p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
2633 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
2634}
2635
2636static void
Yuval Mintz17b235c2016-05-11 16:36:18 +03002637qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
2638 struct qed_sp_vport_update_params *p_data,
2639 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2640{
2641 struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
2642 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
2643
2644 p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
2645 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2646 tlv);
2647 if (!p_accept_any_vlan)
2648 return;
2649
2650 p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
2651 p_data->update_accept_any_vlan_flg =
2652 p_accept_any_vlan->update_accept_any_vlan_flg;
2653 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
2654}
2655
2656static void
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002657qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
2658 struct qed_vf_info *vf,
2659 struct qed_sp_vport_update_params *p_data,
2660 struct qed_rss_params *p_rss,
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002661 struct qed_iov_vf_mbx *p_mbx,
2662 u16 *tlvs_mask, u16 *tlvs_accepted)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002663{
2664 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
2665 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002666 bool b_reject = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002667 u16 table_size;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002668 u16 i, q_idx;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002669
2670 p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
2671 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2672 if (!p_rss_tlv) {
2673 p_data->rss_params = NULL;
2674 return;
2675 }
2676
2677 memset(p_rss, 0, sizeof(struct qed_rss_params));
2678
2679 p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
2680 VFPF_UPDATE_RSS_CONFIG_FLAG);
2681 p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
2682 VFPF_UPDATE_RSS_CAPS_FLAG);
2683 p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
2684 VFPF_UPDATE_RSS_IND_TABLE_FLAG);
2685 p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
2686 VFPF_UPDATE_RSS_KEY_FLAG);
2687
2688 p_rss->rss_enable = p_rss_tlv->rss_enable;
2689 p_rss->rss_eng_id = vf->relative_vf_id + 1;
2690 p_rss->rss_caps = p_rss_tlv->rss_caps;
2691 p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002692 memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
2693
2694 table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
2695 (1 << p_rss_tlv->rss_table_size_log));
2696
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002697 for (i = 0; i < table_size; i++) {
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002698 q_idx = p_rss_tlv->rss_ind_table[i];
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002699 if (!qed_iov_validate_rxq(p_hwfn, vf, q_idx,
2700 QED_IOV_VALIDATE_Q_ENABLE)) {
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002701 DP_VERBOSE(p_hwfn,
2702 QED_MSG_IOV,
2703 "VF[%d]: Omitting RSS due to wrong queue %04x\n",
2704 vf->relative_vf_id, q_idx);
2705 b_reject = true;
2706 goto out;
2707 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002708
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002709 p_rss->rss_ind_table[i] = vf->vf_queues[q_idx].p_rx_cid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002710 }
2711
2712 p_data->rss_params = p_rss;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002713out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002714 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002715 if (!b_reject)
2716 *tlvs_accepted |= 1 << QED_IOV_VP_UPDATE_RSS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002717}
2718
Yuval Mintz17b235c2016-05-11 16:36:18 +03002719static void
2720qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
2721 struct qed_vf_info *vf,
2722 struct qed_sp_vport_update_params *p_data,
2723 struct qed_sge_tpa_params *p_sge_tpa,
2724 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2725{
2726 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
2727 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
2728
2729 p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
2730 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2731
2732 if (!p_sge_tpa_tlv) {
2733 p_data->sge_tpa_params = NULL;
2734 return;
2735 }
2736
2737 memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
2738
2739 p_sge_tpa->update_tpa_en_flg =
2740 !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
2741 p_sge_tpa->update_tpa_param_flg =
2742 !!(p_sge_tpa_tlv->update_sge_tpa_flags &
2743 VFPF_UPDATE_TPA_PARAM_FLAG);
2744
2745 p_sge_tpa->tpa_ipv4_en_flg =
2746 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
2747 p_sge_tpa->tpa_ipv6_en_flg =
2748 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
2749 p_sge_tpa->tpa_pkt_split_flg =
2750 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
2751 p_sge_tpa->tpa_hdr_data_split_flg =
2752 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
2753 p_sge_tpa->tpa_gro_consistent_flg =
2754 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
2755
2756 p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
2757 p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
2758 p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
2759 p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
2760 p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
2761
2762 p_data->sge_tpa_params = p_sge_tpa;
2763
2764 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
2765}
2766
Mintz, Yuvalf990c822017-01-01 13:57:08 +02002767static int qed_iov_pre_update_vport(struct qed_hwfn *hwfn,
2768 u8 vfid,
2769 struct qed_sp_vport_update_params *params,
2770 u16 *tlvs)
2771{
2772 u8 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
2773 struct qed_filter_accept_flags *flags = &params->accept_flags;
2774 struct qed_public_vf_info *vf_info;
2775
2776 /* Untrusted VFs can't even be trusted to know that fact.
2777 * Simply indicate everything is configured fine, and trace
2778 * configuration 'behind their back'.
2779 */
2780 if (!(*tlvs & BIT(QED_IOV_VP_UPDATE_ACCEPT_PARAM)))
2781 return 0;
2782
2783 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
2784
2785 if (flags->update_rx_mode_config) {
2786 vf_info->rx_accept_mode = flags->rx_accept_filter;
2787 if (!vf_info->is_trusted_configured)
2788 flags->rx_accept_filter &= ~mask;
2789 }
2790
2791 if (flags->update_tx_mode_config) {
2792 vf_info->tx_accept_mode = flags->tx_accept_filter;
2793 if (!vf_info->is_trusted_configured)
2794 flags->tx_accept_filter &= ~mask;
2795 }
2796
2797 return 0;
2798}
2799
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002800static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
2801 struct qed_ptt *p_ptt,
2802 struct qed_vf_info *vf)
2803{
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002804 struct qed_rss_params *p_rss_params = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002805 struct qed_sp_vport_update_params params;
2806 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002807 struct qed_sge_tpa_params sge_tpa_params;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002808 u16 tlvs_mask = 0, tlvs_accepted = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002809 u8 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002810 u16 length;
2811 int rc;
2812
Yuval Mintz41086462016-06-05 13:11:13 +03002813 /* Valiate PF can send such a request */
2814 if (!vf->vport_instance) {
2815 DP_VERBOSE(p_hwfn,
2816 QED_MSG_IOV,
2817 "No VPORT instance available for VF[%d], failing vport update\n",
2818 vf->abs_vf_id);
2819 status = PFVF_STATUS_FAILURE;
2820 goto out;
2821 }
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002822 p_rss_params = vzalloc(sizeof(*p_rss_params));
2823 if (p_rss_params == NULL) {
2824 status = PFVF_STATUS_FAILURE;
2825 goto out;
2826 }
Yuval Mintz41086462016-06-05 13:11:13 +03002827
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002828 memset(&params, 0, sizeof(params));
2829 params.opaque_fid = vf->opaque_fid;
2830 params.vport_id = vf->vport_id;
2831 params.rss_params = NULL;
2832
2833 /* Search for extended tlvs list and update values
2834 * from VF in struct qed_sp_vport_update_params.
2835 */
2836 qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintz17b235c2016-05-11 16:36:18 +03002837 qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
2838 qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002839 qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
2840 qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintz17b235c2016-05-11 16:36:18 +03002841 qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
2842 qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
2843 &sge_tpa_params, mbx, &tlvs_mask);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002844
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002845 tlvs_accepted = tlvs_mask;
2846
2847 /* Some of the extended TLVs need to be validated first; In that case,
2848 * they can update the mask without updating the accepted [so that
2849 * PF could communicate to VF it has rejected request].
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002850 */
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002851 qed_iov_vp_update_rss_param(p_hwfn, vf, &params, p_rss_params,
2852 mbx, &tlvs_mask, &tlvs_accepted);
2853
Mintz, Yuvalf990c822017-01-01 13:57:08 +02002854 if (qed_iov_pre_update_vport(p_hwfn, vf->relative_vf_id,
2855 &params, &tlvs_accepted)) {
2856 tlvs_accepted = 0;
2857 status = PFVF_STATUS_NOT_SUPPORTED;
2858 goto out;
2859 }
2860
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002861 if (!tlvs_accepted) {
2862 if (tlvs_mask)
2863 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2864 "Upper-layer prevents VF vport configuration\n");
2865 else
2866 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2867 "No feature tlvs found for vport update\n");
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002868 status = PFVF_STATUS_NOT_SUPPORTED;
2869 goto out;
2870 }
2871
2872 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
2873
2874 if (rc)
2875 status = PFVF_STATUS_FAILURE;
2876
2877out:
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002878 vfree(p_rss_params);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002879 length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002880 tlvs_mask, tlvs_accepted);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002881 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
2882}
2883
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002884static int qed_iov_vf_update_vlan_shadow(struct qed_hwfn *p_hwfn,
2885 struct qed_vf_info *p_vf,
2886 struct qed_filter_ucast *p_params)
Yuval Mintz08feecd2016-05-11 16:36:20 +03002887{
2888 int i;
2889
Yuval Mintz08feecd2016-05-11 16:36:20 +03002890 /* First remove entries and then add new ones */
2891 if (p_params->opcode == QED_FILTER_REMOVE) {
2892 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2893 if (p_vf->shadow_config.vlans[i].used &&
2894 p_vf->shadow_config.vlans[i].vid ==
2895 p_params->vlan) {
2896 p_vf->shadow_config.vlans[i].used = false;
2897 break;
2898 }
2899 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2900 DP_VERBOSE(p_hwfn,
2901 QED_MSG_IOV,
2902 "VF [%d] - Tries to remove a non-existing vlan\n",
2903 p_vf->relative_vf_id);
2904 return -EINVAL;
2905 }
2906 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2907 p_params->opcode == QED_FILTER_FLUSH) {
2908 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2909 p_vf->shadow_config.vlans[i].used = false;
2910 }
2911
2912 /* In forced mode, we're willing to remove entries - but we don't add
2913 * new ones.
2914 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002915 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED))
Yuval Mintz08feecd2016-05-11 16:36:20 +03002916 return 0;
2917
2918 if (p_params->opcode == QED_FILTER_ADD ||
2919 p_params->opcode == QED_FILTER_REPLACE) {
2920 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
2921 if (p_vf->shadow_config.vlans[i].used)
2922 continue;
2923
2924 p_vf->shadow_config.vlans[i].used = true;
2925 p_vf->shadow_config.vlans[i].vid = p_params->vlan;
2926 break;
2927 }
2928
2929 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2930 DP_VERBOSE(p_hwfn,
2931 QED_MSG_IOV,
2932 "VF [%d] - Tries to configure more than %d vlan filters\n",
2933 p_vf->relative_vf_id,
2934 QED_ETH_VF_NUM_VLAN_FILTERS + 1);
2935 return -EINVAL;
2936 }
2937 }
2938
2939 return 0;
2940}
2941
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002942static int qed_iov_vf_update_mac_shadow(struct qed_hwfn *p_hwfn,
2943 struct qed_vf_info *p_vf,
2944 struct qed_filter_ucast *p_params)
2945{
2946 int i;
2947
2948 /* If we're in forced-mode, we don't allow any change */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002949 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED))
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002950 return 0;
2951
2952 /* First remove entries and then add new ones */
2953 if (p_params->opcode == QED_FILTER_REMOVE) {
2954 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
2955 if (ether_addr_equal(p_vf->shadow_config.macs[i],
2956 p_params->mac)) {
Shyam Saini0ee28e32017-01-17 07:35:04 +05302957 eth_zero_addr(p_vf->shadow_config.macs[i]);
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002958 break;
2959 }
2960 }
2961
2962 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
2963 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2964 "MAC isn't configured\n");
2965 return -EINVAL;
2966 }
2967 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2968 p_params->opcode == QED_FILTER_FLUSH) {
2969 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++)
Shyam Saini0ee28e32017-01-17 07:35:04 +05302970 eth_zero_addr(p_vf->shadow_config.macs[i]);
Yuval Mintz8246d0b2016-06-05 13:11:15 +03002971 }
2972
2973 /* List the new MAC address */
2974 if (p_params->opcode != QED_FILTER_ADD &&
2975 p_params->opcode != QED_FILTER_REPLACE)
2976 return 0;
2977
2978 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
2979 if (is_zero_ether_addr(p_vf->shadow_config.macs[i])) {
2980 ether_addr_copy(p_vf->shadow_config.macs[i],
2981 p_params->mac);
2982 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2983 "Added MAC at %d entry in shadow\n", i);
2984 break;
2985 }
2986 }
2987
2988 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
2989 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No available place for MAC\n");
2990 return -EINVAL;
2991 }
2992
2993 return 0;
2994}
2995
2996static int
2997qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
2998 struct qed_vf_info *p_vf,
2999 struct qed_filter_ucast *p_params)
3000{
3001 int rc = 0;
3002
3003 if (p_params->type == QED_FILTER_MAC) {
3004 rc = qed_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params);
3005 if (rc)
3006 return rc;
3007 }
3008
3009 if (p_params->type == QED_FILTER_VLAN)
3010 rc = qed_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params);
3011
3012 return rc;
3013}
3014
Baoyou Xieba569472016-09-09 09:21:15 +08003015static int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
3016 int vfid, struct qed_filter_ucast *params)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003017{
3018 struct qed_public_vf_info *vf;
3019
3020 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
3021 if (!vf)
3022 return -EINVAL;
3023
3024 /* No real decision to make; Store the configured MAC */
3025 if (params->type == QED_FILTER_MAC ||
3026 params->type == QED_FILTER_MAC_VLAN)
3027 ether_addr_copy(vf->mac, params->mac);
3028
3029 return 0;
3030}
3031
3032static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
3033 struct qed_ptt *p_ptt,
3034 struct qed_vf_info *vf)
3035{
Yuval Mintz08feecd2016-05-11 16:36:20 +03003036 struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003037 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
3038 struct vfpf_ucast_filter_tlv *req;
3039 u8 status = PFVF_STATUS_SUCCESS;
3040 struct qed_filter_ucast params;
3041 int rc;
3042
3043 /* Prepare the unicast filter params */
3044 memset(&params, 0, sizeof(struct qed_filter_ucast));
3045 req = &mbx->req_virt->ucast_filter;
3046 params.opcode = (enum qed_filter_opcode)req->opcode;
3047 params.type = (enum qed_filter_ucast_type)req->type;
3048
3049 params.is_rx_filter = 1;
3050 params.is_tx_filter = 1;
3051 params.vport_to_remove_from = vf->vport_id;
3052 params.vport_to_add_to = vf->vport_id;
3053 memcpy(params.mac, req->mac, ETH_ALEN);
3054 params.vlan = req->vlan;
3055
3056 DP_VERBOSE(p_hwfn,
3057 QED_MSG_IOV,
3058 "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
3059 vf->abs_vf_id, params.opcode, params.type,
3060 params.is_rx_filter ? "RX" : "",
3061 params.is_tx_filter ? "TX" : "",
3062 params.vport_to_add_to,
3063 params.mac[0], params.mac[1],
3064 params.mac[2], params.mac[3],
3065 params.mac[4], params.mac[5], params.vlan);
3066
3067 if (!vf->vport_instance) {
3068 DP_VERBOSE(p_hwfn,
3069 QED_MSG_IOV,
3070 "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
3071 vf->abs_vf_id);
3072 status = PFVF_STATUS_FAILURE;
3073 goto out;
3074 }
3075
Yuval Mintz08feecd2016-05-11 16:36:20 +03003076 /* Update shadow copy of the VF configuration */
3077 if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
3078 status = PFVF_STATUS_FAILURE;
3079 goto out;
3080 }
3081
3082 /* Determine if the unicast filtering is acceptible by PF */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003083 if ((p_bulletin->valid_bitmap & BIT(VLAN_ADDR_FORCED)) &&
Yuval Mintz08feecd2016-05-11 16:36:20 +03003084 (params.type == QED_FILTER_VLAN ||
3085 params.type == QED_FILTER_MAC_VLAN)) {
3086 /* Once VLAN is forced or PVID is set, do not allow
3087 * to add/replace any further VLANs.
3088 */
3089 if (params.opcode == QED_FILTER_ADD ||
3090 params.opcode == QED_FILTER_REPLACE)
3091 status = PFVF_STATUS_FORCED;
3092 goto out;
3093 }
3094
Yuval Mintz1a635e42016-08-15 10:42:43 +03003095 if ((p_bulletin->valid_bitmap & BIT(MAC_ADDR_FORCED)) &&
Yuval Mintzeff16962016-05-11 16:36:21 +03003096 (params.type == QED_FILTER_MAC ||
3097 params.type == QED_FILTER_MAC_VLAN)) {
3098 if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
3099 (params.opcode != QED_FILTER_ADD &&
3100 params.opcode != QED_FILTER_REPLACE))
3101 status = PFVF_STATUS_FORCED;
3102 goto out;
3103 }
3104
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003105 rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
3106 if (rc) {
3107 status = PFVF_STATUS_FAILURE;
3108 goto out;
3109 }
3110
3111 rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
3112 QED_SPQ_MODE_CB, NULL);
3113 if (rc)
3114 status = PFVF_STATUS_FAILURE;
3115
3116out:
3117 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
3118 sizeof(struct pfvf_def_resp_tlv), status);
3119}
3120
Yuval Mintz0b55e272016-05-11 16:36:15 +03003121static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
3122 struct qed_ptt *p_ptt,
3123 struct qed_vf_info *vf)
3124{
3125 int i;
3126
3127 /* Reset the SBs */
3128 for (i = 0; i < vf->num_sbs; i++)
3129 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
3130 vf->igu_sbs[i],
3131 vf->opaque_fid, false);
3132
3133 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
3134 sizeof(struct pfvf_def_resp_tlv),
3135 PFVF_STATUS_SUCCESS);
3136}
3137
3138static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
3139 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
3140{
3141 u16 length = sizeof(struct pfvf_def_resp_tlv);
3142 u8 status = PFVF_STATUS_SUCCESS;
3143
3144 /* Disable Interrupts for VF */
3145 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
3146
3147 /* Reset Permission table */
3148 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
3149
3150 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
3151 length, status);
3152}
3153
3154static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
3155 struct qed_ptt *p_ptt,
3156 struct qed_vf_info *p_vf)
3157{
3158 u16 length = sizeof(struct pfvf_def_resp_tlv);
Yuval Mintz1fe614d2016-06-05 13:11:11 +03003159 u8 status = PFVF_STATUS_SUCCESS;
3160 int rc = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003161
3162 qed_iov_vf_cleanup(p_hwfn, p_vf);
3163
Yuval Mintz1fe614d2016-06-05 13:11:11 +03003164 if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
3165 /* Stopping the VF */
3166 rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
3167 p_vf->opaque_fid);
3168
3169 if (rc) {
3170 DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
3171 rc);
3172 status = PFVF_STATUS_FAILURE;
3173 }
3174
3175 p_vf->state = VF_STOPPED;
3176 }
3177
Yuval Mintz0b55e272016-05-11 16:36:15 +03003178 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
Yuval Mintz1fe614d2016-06-05 13:11:11 +03003179 length, status);
Yuval Mintz0b55e272016-05-11 16:36:15 +03003180}
3181
3182static int
3183qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
3184 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3185{
3186 int cnt;
3187 u32 val;
3188
3189 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
3190
3191 for (cnt = 0; cnt < 50; cnt++) {
3192 val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
3193 if (!val)
3194 break;
3195 msleep(20);
3196 }
3197 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
3198
3199 if (cnt == 50) {
3200 DP_ERR(p_hwfn,
3201 "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
3202 p_vf->abs_vf_id, val);
3203 return -EBUSY;
3204 }
3205
3206 return 0;
3207}
3208
3209static int
3210qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
3211 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3212{
3213 u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
3214 int i, cnt;
3215
3216 /* Read initial consumers & producers */
3217 for (i = 0; i < MAX_NUM_VOQS; i++) {
3218 u32 prod;
3219
3220 cons[i] = qed_rd(p_hwfn, p_ptt,
3221 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
3222 i * 0x40);
3223 prod = qed_rd(p_hwfn, p_ptt,
3224 PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
3225 i * 0x40);
3226 distance[i] = prod - cons[i];
3227 }
3228
3229 /* Wait for consumers to pass the producers */
3230 i = 0;
3231 for (cnt = 0; cnt < 50; cnt++) {
3232 for (; i < MAX_NUM_VOQS; i++) {
3233 u32 tmp;
3234
3235 tmp = qed_rd(p_hwfn, p_ptt,
3236 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
3237 i * 0x40);
3238 if (distance[i] > tmp - cons[i])
3239 break;
3240 }
3241
3242 if (i == MAX_NUM_VOQS)
3243 break;
3244
3245 msleep(20);
3246 }
3247
3248 if (cnt == 50) {
3249 DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
3250 p_vf->abs_vf_id, i);
3251 return -EBUSY;
3252 }
3253
3254 return 0;
3255}
3256
3257static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
3258 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3259{
3260 int rc;
3261
3262 rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
3263 if (rc)
3264 return rc;
3265
3266 rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
3267 if (rc)
3268 return rc;
3269
3270 return 0;
3271}
3272
3273static int
3274qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
3275 struct qed_ptt *p_ptt,
3276 u16 rel_vf_id, u32 *ack_vfs)
3277{
3278 struct qed_vf_info *p_vf;
3279 int rc = 0;
3280
3281 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
3282 if (!p_vf)
3283 return 0;
3284
3285 if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
3286 (1ULL << (rel_vf_id % 64))) {
3287 u16 vfid = p_vf->abs_vf_id;
3288
3289 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3290 "VF[%d] - Handling FLR\n", vfid);
3291
3292 qed_iov_vf_cleanup(p_hwfn, p_vf);
3293
3294 /* If VF isn't active, no need for anything but SW */
3295 if (!p_vf->b_init)
3296 goto cleanup;
3297
3298 rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
3299 if (rc)
3300 goto cleanup;
3301
3302 rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
3303 if (rc) {
3304 DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
3305 return rc;
3306 }
3307
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003308 /* Workaround to make VF-PF channel ready, as FW
3309 * doesn't do that as a part of FLR.
3310 */
3311 REG_WR(p_hwfn,
3312 GTT_BAR0_MAP_REG_USDM_RAM +
3313 USTORM_VF_PF_CHANNEL_READY_OFFSET(vfid), 1);
3314
Yuval Mintz0b55e272016-05-11 16:36:15 +03003315 /* VF_STOPPED has to be set only after final cleanup
3316 * but prior to re-enabling the VF.
3317 */
3318 p_vf->state = VF_STOPPED;
3319
3320 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
3321 if (rc) {
3322 DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
3323 vfid);
3324 return rc;
3325 }
3326cleanup:
3327 /* Mark VF for ack and clean pending state */
3328 if (p_vf->state == VF_RESET)
3329 p_vf->state = VF_STOPPED;
Yuval Mintz1a635e42016-08-15 10:42:43 +03003330 ack_vfs[vfid / 32] |= BIT((vfid % 32));
Yuval Mintz0b55e272016-05-11 16:36:15 +03003331 p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
3332 ~(1ULL << (rel_vf_id % 64));
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003333 p_vf->vf_mbx.b_pending_msg = false;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003334 }
3335
3336 return rc;
3337}
3338
Baoyou Xieba569472016-09-09 09:21:15 +08003339static int
3340qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003341{
3342 u32 ack_vfs[VF_MAX_STATIC / 32];
3343 int rc = 0;
3344 u16 i;
3345
3346 memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
3347
3348 /* Since BRB <-> PRS interface can't be tested as part of the flr
3349 * polling due to HW limitations, simply sleep a bit. And since
3350 * there's no need to wait per-vf, do it before looping.
3351 */
3352 msleep(100);
3353
3354 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
3355 qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
3356
3357 rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
3358 return rc;
3359}
3360
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003361bool qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003362{
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003363 bool found = false;
3364 u16 i;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003365
3366 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
3367 for (i = 0; i < (VF_MAX_STATIC / 32); i++)
3368 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3369 "[%08x,...,%08x]: %08x\n",
3370 i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
3371
3372 if (!p_hwfn->cdev->p_iov_info) {
3373 DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003374 return false;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003375 }
3376
3377 /* Mark VFs */
3378 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
3379 struct qed_vf_info *p_vf;
3380 u8 vfid;
3381
3382 p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
3383 if (!p_vf)
3384 continue;
3385
3386 vfid = p_vf->abs_vf_id;
Yuval Mintz1a635e42016-08-15 10:42:43 +03003387 if (BIT((vfid % 32)) & p_disabled_vfs[vfid / 32]) {
Yuval Mintz0b55e272016-05-11 16:36:15 +03003388 u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
3389 u16 rel_vf_id = p_vf->relative_vf_id;
3390
3391 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3392 "VF[%d] [rel %d] got FLR-ed\n",
3393 vfid, rel_vf_id);
3394
3395 p_vf->state = VF_RESET;
3396
3397 /* No need to lock here, since pending_flr should
3398 * only change here and before ACKing MFw. Since
3399 * MFW will not trigger an additional attention for
3400 * VF flr until ACKs, we're safe.
3401 */
3402 p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003403 found = true;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003404 }
3405 }
3406
3407 return found;
3408}
3409
Yuval Mintz73390ac2016-05-11 16:36:24 +03003410static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
3411 u16 vfid,
3412 struct qed_mcp_link_params *p_params,
3413 struct qed_mcp_link_state *p_link,
3414 struct qed_mcp_link_capabilities *p_caps)
3415{
3416 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
3417 vfid,
3418 false);
3419 struct qed_bulletin_content *p_bulletin;
3420
3421 if (!p_vf)
3422 return;
3423
3424 p_bulletin = p_vf->bulletin.p_virt;
3425
3426 if (p_params)
3427 __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
3428 if (p_link)
3429 __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
3430 if (p_caps)
3431 __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
3432}
3433
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003434static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
3435 struct qed_ptt *p_ptt, int vfid)
3436{
3437 struct qed_iov_vf_mbx *mbx;
3438 struct qed_vf_info *p_vf;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003439
3440 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3441 if (!p_vf)
3442 return;
3443
3444 mbx = &p_vf->vf_mbx;
3445
3446 /* qed_iov_process_mbx_request */
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003447 if (!mbx->b_pending_msg) {
3448 DP_NOTICE(p_hwfn,
3449 "VF[%02x]: Trying to process mailbox message when none is pending\n",
3450 p_vf->abs_vf_id);
3451 return;
3452 }
3453 mbx->b_pending_msg = false;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003454
3455 mbx->first_tlv = mbx->req_virt->first_tlv;
3456
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003457 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3458 "VF[%02x]: Processing mailbox message [type %04x]\n",
3459 p_vf->abs_vf_id, mbx->first_tlv.tl.type);
3460
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003461 /* check if tlv type is known */
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003462 if (qed_iov_tlv_supported(mbx->first_tlv.tl.type) &&
3463 !p_vf->b_malicious) {
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003464 switch (mbx->first_tlv.tl.type) {
3465 case CHANNEL_TLV_ACQUIRE:
3466 qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
3467 break;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003468 case CHANNEL_TLV_VPORT_START:
3469 qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
3470 break;
3471 case CHANNEL_TLV_VPORT_TEARDOWN:
3472 qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
3473 break;
3474 case CHANNEL_TLV_START_RXQ:
3475 qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
3476 break;
3477 case CHANNEL_TLV_START_TXQ:
3478 qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
3479 break;
3480 case CHANNEL_TLV_STOP_RXQS:
3481 qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
3482 break;
3483 case CHANNEL_TLV_STOP_TXQS:
3484 qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
3485 break;
Yuval Mintz17b235c2016-05-11 16:36:18 +03003486 case CHANNEL_TLV_UPDATE_RXQ:
3487 qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
3488 break;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003489 case CHANNEL_TLV_VPORT_UPDATE:
3490 qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
3491 break;
3492 case CHANNEL_TLV_UCAST_FILTER:
3493 qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
3494 break;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003495 case CHANNEL_TLV_CLOSE:
3496 qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
3497 break;
3498 case CHANNEL_TLV_INT_CLEANUP:
3499 qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
3500 break;
3501 case CHANNEL_TLV_RELEASE:
3502 qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
3503 break;
Chopra, Manisheaf3c0c2017-04-24 10:00:49 -07003504 case CHANNEL_TLV_UPDATE_TUNN_PARAM:
3505 qed_iov_vf_mbx_update_tunn_param(p_hwfn, p_ptt, p_vf);
3506 break;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003507 }
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003508 } else if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
3509 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3510 "VF [%02x] - considered malicious; Ignoring TLV [%04x]\n",
3511 p_vf->abs_vf_id, mbx->first_tlv.tl.type);
3512
3513 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3514 mbx->first_tlv.tl.type,
3515 sizeof(struct pfvf_def_resp_tlv),
3516 PFVF_STATUS_MALICIOUS);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003517 } else {
3518 /* unknown TLV - this may belong to a VF driver from the future
3519 * - a version written after this PF driver was written, which
3520 * supports features unknown as of yet. Too bad since we don't
3521 * support them. Or this may be because someone wrote a crappy
3522 * VF driver and is sending garbage over the channel.
3523 */
Yuval Mintz54fdd802016-06-05 13:11:16 +03003524 DP_NOTICE(p_hwfn,
3525 "VF[%02x]: unknown TLV. type %04x length %04x padding %08x reply address %llu\n",
3526 p_vf->abs_vf_id,
3527 mbx->first_tlv.tl.type,
3528 mbx->first_tlv.tl.length,
3529 mbx->first_tlv.padding, mbx->first_tlv.reply_address);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003530
Yuval Mintz54fdd802016-06-05 13:11:16 +03003531 /* Try replying in case reply address matches the acquisition's
3532 * posted address.
3533 */
3534 if (p_vf->acquire.first_tlv.reply_address &&
3535 (mbx->first_tlv.reply_address ==
3536 p_vf->acquire.first_tlv.reply_address)) {
3537 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3538 mbx->first_tlv.tl.type,
3539 sizeof(struct pfvf_def_resp_tlv),
3540 PFVF_STATUS_NOT_SUPPORTED);
3541 } else {
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003542 DP_VERBOSE(p_hwfn,
3543 QED_MSG_IOV,
Yuval Mintz54fdd802016-06-05 13:11:16 +03003544 "VF[%02x]: Can't respond to TLV - no valid reply address\n",
3545 p_vf->abs_vf_id);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003546 }
3547 }
3548}
3549
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003550void qed_iov_pf_get_pending_events(struct qed_hwfn *p_hwfn, u64 *events)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003551{
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003552 int i;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003553
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003554 memset(events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003555
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003556 qed_for_each_vf(p_hwfn, i) {
3557 struct qed_vf_info *p_vf;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003558
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003559 p_vf = &p_hwfn->pf_iov_info->vfs_array[i];
3560 if (p_vf->vf_mbx.b_pending_msg)
3561 events[i / 64] |= 1ULL << (i % 64);
3562 }
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003563}
3564
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003565static struct qed_vf_info *qed_sriov_get_vf_from_absid(struct qed_hwfn *p_hwfn,
3566 u16 abs_vfid)
3567{
3568 u8 min = (u8) p_hwfn->cdev->p_iov_info->first_vf_in_pf;
3569
3570 if (!_qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min, false)) {
3571 DP_VERBOSE(p_hwfn,
3572 QED_MSG_IOV,
3573 "Got indication for VF [abs 0x%08x] that cannot be handled by PF\n",
3574 abs_vfid);
3575 return NULL;
3576 }
3577
3578 return &p_hwfn->pf_iov_info->vfs_array[(u8) abs_vfid - min];
3579}
3580
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003581static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
3582 u16 abs_vfid, struct regpair *vf_msg)
3583{
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003584 struct qed_vf_info *p_vf = qed_sriov_get_vf_from_absid(p_hwfn,
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003585 abs_vfid);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003586
3587 if (!p_vf)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003588 return 0;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003589
3590 /* List the physical address of the request so that handler
3591 * could later on copy the message from it.
3592 */
3593 p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
3594
3595 /* Mark the event and schedule the workqueue */
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003596 p_vf->vf_mbx.b_pending_msg = true;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003597 qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
3598
3599 return 0;
3600}
3601
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003602static void qed_sriov_vfpf_malicious(struct qed_hwfn *p_hwfn,
3603 struct malicious_vf_eqe_data *p_data)
3604{
3605 struct qed_vf_info *p_vf;
3606
3607 p_vf = qed_sriov_get_vf_from_absid(p_hwfn, p_data->vf_id);
3608
3609 if (!p_vf)
3610 return;
3611
Mintz, Yuvale99a21c2017-03-19 13:08:19 +02003612 if (!p_vf->b_malicious) {
3613 DP_NOTICE(p_hwfn,
3614 "VF [%d] - Malicious behavior [%02x]\n",
3615 p_vf->abs_vf_id, p_data->err_id);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003616
Mintz, Yuvale99a21c2017-03-19 13:08:19 +02003617 p_vf->b_malicious = true;
3618 } else {
3619 DP_INFO(p_hwfn,
3620 "VF [%d] - Malicious behavior [%02x]\n",
3621 p_vf->abs_vf_id, p_data->err_id);
3622 }
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003623}
3624
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003625int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
3626 u8 opcode, __le16 echo, union event_ring_data *data)
3627{
3628 switch (opcode) {
3629 case COMMON_EVENT_VF_PF_CHANNEL:
3630 return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
3631 &data->vf_pf_channel.msg_addr);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003632 case COMMON_EVENT_MALICIOUS_VF:
3633 qed_sriov_vfpf_malicious(p_hwfn, &data->malicious_vf);
3634 return 0;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003635 default:
3636 DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
3637 opcode);
3638 return -EINVAL;
3639 }
3640}
3641
Yuval Mintz32a47e72016-05-11 16:36:12 +03003642u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
3643{
3644 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
3645 u16 i;
3646
3647 if (!p_iov)
3648 goto out;
3649
3650 for (i = rel_vf_id; i < p_iov->total_vfs; i++)
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003651 if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true, false))
Yuval Mintz32a47e72016-05-11 16:36:12 +03003652 return i;
3653
3654out:
3655 return MAX_NUM_VFS;
3656}
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003657
3658static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
3659 int vfid)
3660{
3661 struct qed_dmae_params params;
3662 struct qed_vf_info *vf_info;
3663
3664 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3665 if (!vf_info)
3666 return -EINVAL;
3667
3668 memset(&params, 0, sizeof(struct qed_dmae_params));
3669 params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
3670 params.src_vfid = vf_info->abs_vf_id;
3671
3672 if (qed_dmae_host2host(p_hwfn, ptt,
3673 vf_info->vf_mbx.pending_req,
3674 vf_info->vf_mbx.req_phys,
3675 sizeof(union vfpf_tlvs) / 4, &params)) {
3676 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3677 "Failed to copy message from VF 0x%02x\n", vfid);
3678
3679 return -EIO;
3680 }
3681
3682 return 0;
3683}
3684
Yuval Mintzeff16962016-05-11 16:36:21 +03003685static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
3686 u8 *mac, int vfid)
3687{
3688 struct qed_vf_info *vf_info;
3689 u64 feature;
3690
3691 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3692 if (!vf_info) {
3693 DP_NOTICE(p_hwfn->cdev,
3694 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3695 return;
3696 }
3697
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003698 if (vf_info->b_malicious) {
3699 DP_NOTICE(p_hwfn->cdev,
3700 "Can't set forced MAC to malicious VF [%d]\n", vfid);
3701 return;
3702 }
3703
Yuval Mintzeff16962016-05-11 16:36:21 +03003704 feature = 1 << MAC_ADDR_FORCED;
3705 memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
3706
3707 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3708 /* Forced MAC will disable MAC_ADDR */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003709 vf_info->bulletin.p_virt->valid_bitmap &= ~BIT(VFPF_BULLETIN_MAC_ADDR);
Yuval Mintzeff16962016-05-11 16:36:21 +03003710
3711 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3712}
3713
Baoyou Xieba569472016-09-09 09:21:15 +08003714static void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
3715 u16 pvid, int vfid)
Yuval Mintz08feecd2016-05-11 16:36:20 +03003716{
3717 struct qed_vf_info *vf_info;
3718 u64 feature;
3719
3720 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3721 if (!vf_info) {
3722 DP_NOTICE(p_hwfn->cdev,
3723 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3724 return;
3725 }
3726
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003727 if (vf_info->b_malicious) {
3728 DP_NOTICE(p_hwfn->cdev,
3729 "Can't set forced vlan to malicious VF [%d]\n", vfid);
3730 return;
3731 }
3732
Yuval Mintz08feecd2016-05-11 16:36:20 +03003733 feature = 1 << VLAN_ADDR_FORCED;
3734 vf_info->bulletin.p_virt->pvid = pvid;
3735 if (pvid)
3736 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3737 else
3738 vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
3739
3740 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3741}
3742
Chopra, Manish97379f12017-04-24 10:00:48 -07003743void qed_iov_bulletin_set_udp_ports(struct qed_hwfn *p_hwfn,
3744 int vfid, u16 vxlan_port, u16 geneve_port)
3745{
3746 struct qed_vf_info *vf_info;
3747
3748 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3749 if (!vf_info) {
3750 DP_NOTICE(p_hwfn->cdev,
3751 "Can not set udp ports, invalid vfid [%d]\n", vfid);
3752 return;
3753 }
3754
3755 if (vf_info->b_malicious) {
3756 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3757 "Can not set udp ports to malicious VF [%d]\n",
3758 vfid);
3759 return;
3760 }
3761
3762 vf_info->bulletin.p_virt->vxlan_udp_port = vxlan_port;
3763 vf_info->bulletin.p_virt->geneve_udp_port = geneve_port;
3764}
3765
Yuval Mintz6ddc7602016-05-11 16:36:23 +03003766static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
3767{
3768 struct qed_vf_info *p_vf_info;
3769
3770 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3771 if (!p_vf_info)
3772 return false;
3773
3774 return !!p_vf_info->vport_instance;
3775}
3776
Baoyou Xieba569472016-09-09 09:21:15 +08003777static bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003778{
3779 struct qed_vf_info *p_vf_info;
3780
3781 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3782 if (!p_vf_info)
3783 return true;
3784
3785 return p_vf_info->state == VF_STOPPED;
3786}
3787
Yuval Mintz73390ac2016-05-11 16:36:24 +03003788static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
3789{
3790 struct qed_vf_info *vf_info;
3791
3792 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3793 if (!vf_info)
3794 return false;
3795
3796 return vf_info->spoof_chk;
3797}
3798
Baoyou Xieba569472016-09-09 09:21:15 +08003799static int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
Yuval Mintz6ddc7602016-05-11 16:36:23 +03003800{
3801 struct qed_vf_info *vf;
3802 int rc = -EINVAL;
3803
3804 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3805 DP_NOTICE(p_hwfn,
3806 "SR-IOV sanity check failed, can't set spoofchk\n");
3807 goto out;
3808 }
3809
3810 vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3811 if (!vf)
3812 goto out;
3813
3814 if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
3815 /* After VF VPORT start PF will configure spoof check */
3816 vf->req_spoofchk_val = val;
3817 rc = 0;
3818 goto out;
3819 }
3820
3821 rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
3822
3823out:
3824 return rc;
3825}
3826
Yuval Mintzeff16962016-05-11 16:36:21 +03003827static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
3828 u16 rel_vf_id)
3829{
3830 struct qed_vf_info *p_vf;
3831
3832 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3833 if (!p_vf || !p_vf->bulletin.p_virt)
3834 return NULL;
3835
Yuval Mintz1a635e42016-08-15 10:42:43 +03003836 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED)))
Yuval Mintzeff16962016-05-11 16:36:21 +03003837 return NULL;
3838
3839 return p_vf->bulletin.p_virt->mac;
3840}
3841
Baoyou Xieba569472016-09-09 09:21:15 +08003842static u16
3843qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
Yuval Mintz08feecd2016-05-11 16:36:20 +03003844{
3845 struct qed_vf_info *p_vf;
3846
3847 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3848 if (!p_vf || !p_vf->bulletin.p_virt)
3849 return 0;
3850
Yuval Mintz1a635e42016-08-15 10:42:43 +03003851 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED)))
Yuval Mintz08feecd2016-05-11 16:36:20 +03003852 return 0;
3853
3854 return p_vf->bulletin.p_virt->pvid;
3855}
3856
Yuval Mintz733def62016-05-11 16:36:22 +03003857static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
3858 struct qed_ptt *p_ptt, int vfid, int val)
3859{
3860 struct qed_vf_info *vf;
3861 u8 abs_vp_id = 0;
3862 int rc;
3863
3864 vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3865 if (!vf)
3866 return -EINVAL;
3867
3868 rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
3869 if (rc)
3870 return rc;
3871
3872 return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
3873}
3874
Baoyou Xieba569472016-09-09 09:21:15 +08003875static int
3876qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
Yuval Mintz733def62016-05-11 16:36:22 +03003877{
3878 struct qed_vf_info *vf;
3879 u8 vport_id;
3880 int i;
3881
3882 for_each_hwfn(cdev, i) {
3883 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3884
3885 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3886 DP_NOTICE(p_hwfn,
3887 "SR-IOV sanity check failed, can't set min rate\n");
3888 return -EINVAL;
3889 }
3890 }
3891
3892 vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
3893 vport_id = vf->vport_id;
3894
3895 return qed_configure_vport_wfq(cdev, vport_id, rate);
3896}
3897
Yuval Mintz73390ac2016-05-11 16:36:24 +03003898static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
3899{
3900 struct qed_wfq_data *vf_vp_wfq;
3901 struct qed_vf_info *vf_info;
3902
3903 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3904 if (!vf_info)
3905 return 0;
3906
3907 vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
3908
3909 if (vf_vp_wfq->configured)
3910 return vf_vp_wfq->min_speed;
3911 else
3912 return 0;
3913}
3914
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003915/**
3916 * qed_schedule_iov - schedules IOV task for VF and PF
3917 * @hwfn: hardware function pointer
3918 * @flag: IOV flag for VF/PF
3919 */
3920void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
3921{
3922 smp_mb__before_atomic();
3923 set_bit(flag, &hwfn->iov_task_flags);
3924 smp_mb__after_atomic();
3925 DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3926 queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
3927}
3928
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003929void qed_vf_start_iov_wq(struct qed_dev *cdev)
3930{
3931 int i;
3932
3933 for_each_hwfn(cdev, i)
3934 queue_delayed_work(cdev->hwfns[i].iov_wq,
3935 &cdev->hwfns[i].iov_task, 0);
3936}
3937
Yuval Mintz0b55e272016-05-11 16:36:15 +03003938int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
3939{
3940 int i, j;
3941
3942 for_each_hwfn(cdev, i)
3943 if (cdev->hwfns[i].iov_wq)
3944 flush_workqueue(cdev->hwfns[i].iov_wq);
3945
3946 /* Mark VFs for disablement */
3947 qed_iov_set_vfs_to_disable(cdev, true);
3948
3949 if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
3950 pci_disable_sriov(cdev->pdev);
3951
3952 for_each_hwfn(cdev, i) {
3953 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3954 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3955
3956 /* Failure to acquire the ptt in 100g creates an odd error
3957 * where the first engine has already relased IOV.
3958 */
3959 if (!ptt) {
3960 DP_ERR(hwfn, "Failed to acquire ptt\n");
3961 return -EBUSY;
3962 }
3963
Yuval Mintz733def62016-05-11 16:36:22 +03003964 /* Clean WFQ db and configure equal weight for all vports */
3965 qed_clean_wfq_db(hwfn, ptt);
3966
Yuval Mintz0b55e272016-05-11 16:36:15 +03003967 qed_for_each_vf(hwfn, j) {
3968 int k;
3969
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003970 if (!qed_iov_is_valid_vfid(hwfn, j, true, false))
Yuval Mintz0b55e272016-05-11 16:36:15 +03003971 continue;
3972
3973 /* Wait until VF is disabled before releasing */
3974 for (k = 0; k < 100; k++) {
3975 if (!qed_iov_is_vf_stopped(hwfn, j))
3976 msleep(20);
3977 else
3978 break;
3979 }
3980
3981 if (k < 100)
3982 qed_iov_release_hw_for_vf(&cdev->hwfns[i],
3983 ptt, j);
3984 else
3985 DP_ERR(hwfn,
3986 "Timeout waiting for VF's FLR to end\n");
3987 }
3988
3989 qed_ptt_release(hwfn, ptt);
3990 }
3991
3992 qed_iov_set_vfs_to_disable(cdev, false);
3993
3994 return 0;
3995}
3996
Mintz, Yuval3da7a372016-11-29 16:47:06 +02003997static void qed_sriov_enable_qid_config(struct qed_hwfn *hwfn,
3998 u16 vfid,
3999 struct qed_iov_vf_init_params *params)
4000{
4001 u16 base, i;
4002
4003 /* Since we have an equal resource distribution per-VF, and we assume
4004 * PF has acquired the QED_PF_L2_QUE first queues, we start setting
4005 * sequentially from there.
4006 */
4007 base = FEAT_NUM(hwfn, QED_PF_L2_QUE) + vfid * params->num_queues;
4008
4009 params->rel_vf_id = vfid;
4010 for (i = 0; i < params->num_queues; i++) {
4011 params->req_rx_queue[i] = base + i;
4012 params->req_tx_queue[i] = base + i;
4013 }
4014}
4015
Yuval Mintz0b55e272016-05-11 16:36:15 +03004016static int qed_sriov_enable(struct qed_dev *cdev, int num)
4017{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004018 struct qed_iov_vf_init_params params;
Yuval Mintz0b55e272016-05-11 16:36:15 +03004019 int i, j, rc;
4020
4021 if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
4022 DP_NOTICE(cdev, "Can start at most %d VFs\n",
4023 RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
4024 return -EINVAL;
4025 }
4026
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004027 memset(&params, 0, sizeof(params));
4028
Yuval Mintz0b55e272016-05-11 16:36:15 +03004029 /* Initialize HW for VF access */
4030 for_each_hwfn(cdev, j) {
4031 struct qed_hwfn *hwfn = &cdev->hwfns[j];
4032 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
Mintz, Yuval5a1f9652016-10-31 07:14:26 +02004033
4034 /* Make sure not to use more than 16 queues per VF */
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004035 params.num_queues = min_t(int,
4036 FEAT_NUM(hwfn, QED_VF_L2_QUE) / num,
4037 16);
Yuval Mintz0b55e272016-05-11 16:36:15 +03004038
4039 if (!ptt) {
4040 DP_ERR(hwfn, "Failed to acquire ptt\n");
4041 rc = -EBUSY;
4042 goto err;
4043 }
4044
Yuval Mintz0b55e272016-05-11 16:36:15 +03004045 for (i = 0; i < num; i++) {
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004046 if (!qed_iov_is_valid_vfid(hwfn, i, false, true))
Yuval Mintz0b55e272016-05-11 16:36:15 +03004047 continue;
4048
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004049 qed_sriov_enable_qid_config(hwfn, i, &params);
4050 rc = qed_iov_init_hw_for_vf(hwfn, ptt, &params);
Yuval Mintz0b55e272016-05-11 16:36:15 +03004051 if (rc) {
4052 DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
4053 qed_ptt_release(hwfn, ptt);
4054 goto err;
4055 }
4056 }
4057
4058 qed_ptt_release(hwfn, ptt);
4059 }
4060
4061 /* Enable SRIOV PCIe functions */
4062 rc = pci_enable_sriov(cdev->pdev, num);
4063 if (rc) {
4064 DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
4065 goto err;
4066 }
4067
4068 return num;
4069
4070err:
4071 qed_sriov_disable(cdev, false);
4072 return rc;
4073}
4074
4075static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
4076{
4077 if (!IS_QED_SRIOV(cdev)) {
4078 DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
4079 return -EOPNOTSUPP;
4080 }
4081
4082 if (num_vfs_param)
4083 return qed_sriov_enable(cdev, num_vfs_param);
4084 else
4085 return qed_sriov_disable(cdev, true);
4086}
4087
Yuval Mintzeff16962016-05-11 16:36:21 +03004088static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
4089{
4090 int i;
4091
4092 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
4093 DP_VERBOSE(cdev, QED_MSG_IOV,
4094 "Cannot set a VF MAC; Sriov is not enabled\n");
4095 return -EINVAL;
4096 }
4097
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004098 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
Yuval Mintzeff16962016-05-11 16:36:21 +03004099 DP_VERBOSE(cdev, QED_MSG_IOV,
4100 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
4101 return -EINVAL;
4102 }
4103
4104 for_each_hwfn(cdev, i) {
4105 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4106 struct qed_public_vf_info *vf_info;
4107
4108 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
4109 if (!vf_info)
4110 continue;
4111
4112 /* Set the forced MAC, and schedule the IOV task */
4113 ether_addr_copy(vf_info->forced_mac, mac);
4114 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
4115 }
4116
4117 return 0;
4118}
4119
Yuval Mintz08feecd2016-05-11 16:36:20 +03004120static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
4121{
4122 int i;
4123
4124 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
4125 DP_VERBOSE(cdev, QED_MSG_IOV,
4126 "Cannot set a VF MAC; Sriov is not enabled\n");
4127 return -EINVAL;
4128 }
4129
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004130 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03004131 DP_VERBOSE(cdev, QED_MSG_IOV,
4132 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
4133 return -EINVAL;
4134 }
4135
4136 for_each_hwfn(cdev, i) {
4137 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4138 struct qed_public_vf_info *vf_info;
4139
4140 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
4141 if (!vf_info)
4142 continue;
4143
4144 /* Set the forced vlan, and schedule the IOV task */
4145 vf_info->forced_vlan = vid;
4146 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
4147 }
4148
4149 return 0;
4150}
4151
Yuval Mintz73390ac2016-05-11 16:36:24 +03004152static int qed_get_vf_config(struct qed_dev *cdev,
4153 int vf_id, struct ifla_vf_info *ivi)
4154{
4155 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
4156 struct qed_public_vf_info *vf_info;
4157 struct qed_mcp_link_state link;
4158 u32 tx_rate;
4159
4160 /* Sanitize request */
4161 if (IS_VF(cdev))
4162 return -EINVAL;
4163
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004164 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, false)) {
Yuval Mintz73390ac2016-05-11 16:36:24 +03004165 DP_VERBOSE(cdev, QED_MSG_IOV,
4166 "VF index [%d] isn't active\n", vf_id);
4167 return -EINVAL;
4168 }
4169
4170 vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
4171
4172 qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
4173
4174 /* Fill information about VF */
4175 ivi->vf = vf_id;
4176
4177 if (is_valid_ether_addr(vf_info->forced_mac))
4178 ether_addr_copy(ivi->mac, vf_info->forced_mac);
4179 else
4180 ether_addr_copy(ivi->mac, vf_info->mac);
4181
4182 ivi->vlan = vf_info->forced_vlan;
4183 ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
4184 ivi->linkstate = vf_info->link_state;
4185 tx_rate = vf_info->tx_rate;
4186 ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
4187 ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
4188
4189 return 0;
4190}
4191
Yuval Mintz36558c32016-05-11 16:36:17 +03004192void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
4193{
Mintz, Yuvale50728e2017-03-19 13:08:20 +02004194 struct qed_hwfn *lead_hwfn = QED_LEADING_HWFN(hwfn->cdev);
Yuval Mintz36558c32016-05-11 16:36:17 +03004195 struct qed_mcp_link_capabilities caps;
4196 struct qed_mcp_link_params params;
4197 struct qed_mcp_link_state link;
4198 int i;
4199
4200 if (!hwfn->pf_iov_info)
4201 return;
4202
4203 /* Update bulletin of all future possible VFs with link configuration */
4204 for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
Yuval Mintz733def62016-05-11 16:36:22 +03004205 struct qed_public_vf_info *vf_info;
4206
4207 vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
4208 if (!vf_info)
4209 continue;
4210
Mintz, Yuvale50728e2017-03-19 13:08:20 +02004211 /* Only hwfn0 is actually interested in the link speed.
4212 * But since only it would receive an MFW indication of link,
4213 * need to take configuration from it - otherwise things like
4214 * rate limiting for hwfn1 VF would not work.
4215 */
4216 memcpy(&params, qed_mcp_get_link_params(lead_hwfn),
4217 sizeof(params));
4218 memcpy(&link, qed_mcp_get_link_state(lead_hwfn), sizeof(link));
4219 memcpy(&caps, qed_mcp_get_link_capabilities(lead_hwfn),
Yuval Mintz36558c32016-05-11 16:36:17 +03004220 sizeof(caps));
4221
Yuval Mintz733def62016-05-11 16:36:22 +03004222 /* Modify link according to the VF's configured link state */
4223 switch (vf_info->link_state) {
4224 case IFLA_VF_LINK_STATE_DISABLE:
4225 link.link_up = false;
4226 break;
4227 case IFLA_VF_LINK_STATE_ENABLE:
4228 link.link_up = true;
4229 /* Set speed according to maximum supported by HW.
4230 * that is 40G for regular devices and 100G for CMT
4231 * mode devices.
4232 */
4233 link.speed = (hwfn->cdev->num_hwfns > 1) ?
4234 100000 : 40000;
4235 default:
4236 /* In auto mode pass PF link image to VF */
4237 break;
4238 }
4239
4240 if (link.link_up && vf_info->tx_rate) {
4241 struct qed_ptt *ptt;
4242 int rate;
4243
4244 rate = min_t(int, vf_info->tx_rate, link.speed);
4245
4246 ptt = qed_ptt_acquire(hwfn);
4247 if (!ptt) {
4248 DP_NOTICE(hwfn, "Failed to acquire PTT\n");
4249 return;
4250 }
4251
4252 if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
4253 vf_info->tx_rate = rate;
4254 link.speed = rate;
4255 }
4256
4257 qed_ptt_release(hwfn, ptt);
4258 }
4259
Yuval Mintz36558c32016-05-11 16:36:17 +03004260 qed_iov_set_link(hwfn, i, &params, &link, &caps);
4261 }
4262
4263 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4264}
4265
Yuval Mintz733def62016-05-11 16:36:22 +03004266static int qed_set_vf_link_state(struct qed_dev *cdev,
4267 int vf_id, int link_state)
4268{
4269 int i;
4270
4271 /* Sanitize request */
4272 if (IS_VF(cdev))
4273 return -EINVAL;
4274
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004275 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, true)) {
Yuval Mintz733def62016-05-11 16:36:22 +03004276 DP_VERBOSE(cdev, QED_MSG_IOV,
4277 "VF index [%d] isn't active\n", vf_id);
4278 return -EINVAL;
4279 }
4280
4281 /* Handle configuration of link state */
4282 for_each_hwfn(cdev, i) {
4283 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4284 struct qed_public_vf_info *vf;
4285
4286 vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
4287 if (!vf)
4288 continue;
4289
4290 if (vf->link_state == link_state)
4291 continue;
4292
4293 vf->link_state = link_state;
4294 qed_inform_vf_link_state(&cdev->hwfns[i]);
4295 }
4296
4297 return 0;
4298}
4299
Yuval Mintz6ddc7602016-05-11 16:36:23 +03004300static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
4301{
4302 int i, rc = -EINVAL;
4303
4304 for_each_hwfn(cdev, i) {
4305 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4306
4307 rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
4308 if (rc)
4309 break;
4310 }
4311
4312 return rc;
4313}
4314
Yuval Mintz733def62016-05-11 16:36:22 +03004315static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
4316{
4317 int i;
4318
4319 for_each_hwfn(cdev, i) {
4320 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4321 struct qed_public_vf_info *vf;
4322
4323 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
4324 DP_NOTICE(p_hwfn,
4325 "SR-IOV sanity check failed, can't set tx rate\n");
4326 return -EINVAL;
4327 }
4328
4329 vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
4330
4331 vf->tx_rate = rate;
4332
4333 qed_inform_vf_link_state(p_hwfn);
4334 }
4335
4336 return 0;
4337}
4338
4339static int qed_set_vf_rate(struct qed_dev *cdev,
4340 int vfid, u32 min_rate, u32 max_rate)
4341{
4342 int rc_min = 0, rc_max = 0;
4343
4344 if (max_rate)
4345 rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
4346
4347 if (min_rate)
4348 rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
4349
4350 if (rc_max | rc_min)
4351 return -EINVAL;
4352
4353 return 0;
4354}
4355
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004356static int qed_set_vf_trust(struct qed_dev *cdev, int vfid, bool trust)
4357{
4358 int i;
4359
4360 for_each_hwfn(cdev, i) {
4361 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4362 struct qed_public_vf_info *vf;
4363
4364 if (!qed_iov_pf_sanity_check(hwfn, vfid)) {
4365 DP_NOTICE(hwfn,
4366 "SR-IOV sanity check failed, can't set trust\n");
4367 return -EINVAL;
4368 }
4369
4370 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
4371
4372 if (vf->is_trusted_request == trust)
4373 return 0;
4374 vf->is_trusted_request = trust;
4375
4376 qed_schedule_iov(hwfn, QED_IOV_WQ_TRUST_FLAG);
4377 }
4378
4379 return 0;
4380}
4381
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004382static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
4383{
4384 u64 events[QED_VF_ARRAY_LENGTH];
4385 struct qed_ptt *ptt;
4386 int i;
4387
4388 ptt = qed_ptt_acquire(hwfn);
4389 if (!ptt) {
4390 DP_VERBOSE(hwfn, QED_MSG_IOV,
4391 "Can't acquire PTT; re-scheduling\n");
4392 qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
4393 return;
4394 }
4395
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02004396 qed_iov_pf_get_pending_events(hwfn, events);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004397
4398 DP_VERBOSE(hwfn, QED_MSG_IOV,
4399 "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
4400 events[0], events[1], events[2]);
4401
4402 qed_for_each_vf(hwfn, i) {
4403 /* Skip VFs with no pending messages */
4404 if (!(events[i / 64] & (1ULL << (i % 64))))
4405 continue;
4406
4407 DP_VERBOSE(hwfn, QED_MSG_IOV,
4408 "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
4409 i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4410
4411 /* Copy VF's message to PF's request buffer for that VF */
4412 if (qed_iov_copy_vf_msg(hwfn, ptt, i))
4413 continue;
4414
4415 qed_iov_process_mbx_req(hwfn, ptt, i);
4416 }
4417
4418 qed_ptt_release(hwfn, ptt);
4419}
4420
Yuval Mintz08feecd2016-05-11 16:36:20 +03004421static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
4422{
4423 int i;
4424
4425 qed_for_each_vf(hwfn, i) {
4426 struct qed_public_vf_info *info;
4427 bool update = false;
Yuval Mintzeff16962016-05-11 16:36:21 +03004428 u8 *mac;
Yuval Mintz08feecd2016-05-11 16:36:20 +03004429
4430 info = qed_iov_get_public_vf_info(hwfn, i, true);
4431 if (!info)
4432 continue;
4433
4434 /* Update data on bulletin board */
Yuval Mintzeff16962016-05-11 16:36:21 +03004435 mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
4436 if (is_valid_ether_addr(info->forced_mac) &&
4437 (!mac || !ether_addr_equal(mac, info->forced_mac))) {
4438 DP_VERBOSE(hwfn,
4439 QED_MSG_IOV,
4440 "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
4441 i,
4442 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4443
4444 /* Update bulletin board with forced MAC */
4445 qed_iov_bulletin_set_forced_mac(hwfn,
4446 info->forced_mac, i);
4447 update = true;
4448 }
Yuval Mintz08feecd2016-05-11 16:36:20 +03004449
4450 if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
4451 info->forced_vlan) {
4452 DP_VERBOSE(hwfn,
4453 QED_MSG_IOV,
4454 "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
4455 info->forced_vlan,
4456 i,
4457 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4458 qed_iov_bulletin_set_forced_vlan(hwfn,
4459 info->forced_vlan, i);
4460 update = true;
4461 }
4462
4463 if (update)
4464 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4465 }
4466}
4467
Yuval Mintz36558c32016-05-11 16:36:17 +03004468static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
4469{
4470 struct qed_ptt *ptt;
4471 int i;
4472
4473 ptt = qed_ptt_acquire(hwfn);
4474 if (!ptt) {
4475 DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
4476 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4477 return;
4478 }
4479
4480 qed_for_each_vf(hwfn, i)
4481 qed_iov_post_vf_bulletin(hwfn, i, ptt);
4482
4483 qed_ptt_release(hwfn, ptt);
4484}
4485
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004486static void qed_iov_handle_trust_change(struct qed_hwfn *hwfn)
4487{
4488 struct qed_sp_vport_update_params params;
4489 struct qed_filter_accept_flags *flags;
4490 struct qed_public_vf_info *vf_info;
4491 struct qed_vf_info *vf;
4492 u8 mask;
4493 int i;
4494
4495 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
4496 flags = &params.accept_flags;
4497
4498 qed_for_each_vf(hwfn, i) {
4499 /* Need to make sure current requested configuration didn't
4500 * flip so that we'll end up configuring something that's not
4501 * needed.
4502 */
4503 vf_info = qed_iov_get_public_vf_info(hwfn, i, true);
4504 if (vf_info->is_trusted_configured ==
4505 vf_info->is_trusted_request)
4506 continue;
4507 vf_info->is_trusted_configured = vf_info->is_trusted_request;
4508
4509 /* Validate that the VF has a configured vport */
4510 vf = qed_iov_get_vf_info(hwfn, i, true);
4511 if (!vf->vport_instance)
4512 continue;
4513
4514 memset(&params, 0, sizeof(params));
4515 params.opaque_fid = vf->opaque_fid;
4516 params.vport_id = vf->vport_id;
4517
4518 if (vf_info->rx_accept_mode & mask) {
4519 flags->update_rx_mode_config = 1;
4520 flags->rx_accept_filter = vf_info->rx_accept_mode;
4521 }
4522
4523 if (vf_info->tx_accept_mode & mask) {
4524 flags->update_tx_mode_config = 1;
4525 flags->tx_accept_filter = vf_info->tx_accept_mode;
4526 }
4527
4528 /* Remove if needed; Otherwise this would set the mask */
4529 if (!vf_info->is_trusted_configured) {
4530 flags->rx_accept_filter &= ~mask;
4531 flags->tx_accept_filter &= ~mask;
4532 }
4533
4534 if (flags->update_rx_mode_config ||
4535 flags->update_tx_mode_config)
4536 qed_sp_vport_update(hwfn, &params,
4537 QED_SPQ_MODE_EBLOCK, NULL);
4538 }
4539}
4540
Baoyou Xieba569472016-09-09 09:21:15 +08004541static void qed_iov_pf_task(struct work_struct *work)
4542
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004543{
4544 struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
4545 iov_task.work);
Yuval Mintz0b55e272016-05-11 16:36:15 +03004546 int rc;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004547
4548 if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
4549 return;
4550
Yuval Mintz0b55e272016-05-11 16:36:15 +03004551 if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
4552 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
4553
4554 if (!ptt) {
4555 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4556 return;
4557 }
4558
4559 rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
4560 if (rc)
4561 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4562
4563 qed_ptt_release(hwfn, ptt);
4564 }
4565
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004566 if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
4567 qed_handle_vf_msg(hwfn);
Yuval Mintz08feecd2016-05-11 16:36:20 +03004568
4569 if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
4570 &hwfn->iov_task_flags))
4571 qed_handle_pf_set_vf_unicast(hwfn);
4572
Yuval Mintz36558c32016-05-11 16:36:17 +03004573 if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
4574 &hwfn->iov_task_flags))
4575 qed_handle_bulletin_post(hwfn);
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004576
4577 if (test_and_clear_bit(QED_IOV_WQ_TRUST_FLAG, &hwfn->iov_task_flags))
4578 qed_iov_handle_trust_change(hwfn);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004579}
4580
4581void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
4582{
4583 int i;
4584
4585 for_each_hwfn(cdev, i) {
4586 if (!cdev->hwfns[i].iov_wq)
4587 continue;
4588
4589 if (schedule_first) {
4590 qed_schedule_iov(&cdev->hwfns[i],
4591 QED_IOV_WQ_STOP_WQ_FLAG);
4592 cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
4593 }
4594
4595 flush_workqueue(cdev->hwfns[i].iov_wq);
4596 destroy_workqueue(cdev->hwfns[i].iov_wq);
4597 }
4598}
4599
4600int qed_iov_wq_start(struct qed_dev *cdev)
4601{
4602 char name[NAME_SIZE];
4603 int i;
4604
4605 for_each_hwfn(cdev, i) {
4606 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4607
Yuval Mintz36558c32016-05-11 16:36:17 +03004608 /* PFs needs a dedicated workqueue only if they support IOV.
4609 * VFs always require one.
4610 */
4611 if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004612 continue;
4613
4614 snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
4615 cdev->pdev->bus->number,
4616 PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
4617
4618 p_hwfn->iov_wq = create_singlethread_workqueue(name);
4619 if (!p_hwfn->iov_wq) {
4620 DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
4621 return -ENOMEM;
4622 }
4623
Yuval Mintz36558c32016-05-11 16:36:17 +03004624 if (IS_PF(cdev))
4625 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
4626 else
4627 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004628 }
4629
4630 return 0;
4631}
Yuval Mintz0b55e272016-05-11 16:36:15 +03004632
4633const struct qed_iov_hv_ops qed_iov_ops_pass = {
4634 .configure = &qed_sriov_configure,
Yuval Mintzeff16962016-05-11 16:36:21 +03004635 .set_mac = &qed_sriov_pf_set_mac,
Yuval Mintz08feecd2016-05-11 16:36:20 +03004636 .set_vlan = &qed_sriov_pf_set_vlan,
Yuval Mintz73390ac2016-05-11 16:36:24 +03004637 .get_config = &qed_get_vf_config,
Yuval Mintz733def62016-05-11 16:36:22 +03004638 .set_link_state = &qed_set_vf_link_state,
Yuval Mintz6ddc7602016-05-11 16:36:23 +03004639 .set_spoof = &qed_spoof_configure,
Yuval Mintz733def62016-05-11 16:36:22 +03004640 .set_rate = &qed_set_vf_rate,
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004641 .set_trust = &qed_set_vf_trust,
Yuval Mintz0b55e272016-05-11 16:36:15 +03004642};