blob: 6e02c762a5573931a5cd61cab05cfcdc1b77c1cc [file] [log] [blame]
Laurent Pinchart4bf8e192013-06-19 13:54:11 +02001/*
2 * rcar_du_drv.c -- R-Car Display Unit DRM driver
3 *
Laurent Pinchart2427b302015-09-07 17:34:26 +03004 * Copyright (C) 2013-2015 Renesas Electronics Corporation
Laurent Pinchart4bf8e192013-06-19 13:54:11 +02005 *
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/clk.h>
15#include <linux/io.h>
16#include <linux/mm.h>
17#include <linux/module.h>
Laurent Pinchart96c02692014-01-21 15:57:26 +010018#include <linux/of_device.h>
Laurent Pinchart4bf8e192013-06-19 13:54:11 +020019#include <linux/platform_device.h>
20#include <linux/pm.h>
21#include <linux/slab.h>
Laurent Pinchart8d3f9b22015-02-23 01:02:15 +020022#include <linux/wait.h>
Laurent Pinchart4bf8e192013-06-19 13:54:11 +020023
24#include <drm/drmP.h>
Kieran Bingham7912dee2017-09-15 17:42:06 +010025#include <drm/drm_atomic_helper.h>
Laurent Pinchart4bf8e192013-06-19 13:54:11 +020026#include <drm/drm_crtc_helper.h>
Laurent Pinchart3864c6f2013-03-14 22:45:22 +010027#include <drm/drm_fb_cma_helper.h>
Laurent Pinchart4bf8e192013-06-19 13:54:11 +020028#include <drm/drm_gem_cma_helper.h>
29
Laurent Pinchart4bf8e192013-06-19 13:54:11 +020030#include "rcar_du_drv.h"
31#include "rcar_du_kms.h"
32#include "rcar_du_regs.h"
33
34/* -----------------------------------------------------------------------------
Laurent Pinchart96c02692014-01-21 15:57:26 +010035 * Device Information
36 */
37
Fabrizio Castro36a46da92017-10-13 16:22:20 +010038static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
39 .gen = 2,
40 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
41 | RCAR_DU_FEATURE_EXT_CTRL_REGS,
42 .num_crtcs = 2,
43 .routes = {
44 /*
45 * R8A7743 has one RGB output and one LVDS output
46 */
47 [RCAR_DU_OUTPUT_DPAD0] = {
48 .possible_crtcs = BIT(1) | BIT(0),
49 .port = 0,
50 },
51 [RCAR_DU_OUTPUT_LVDS0] = {
52 .possible_crtcs = BIT(0),
53 .port = 1,
54 },
55 },
56 .num_lvds = 1,
57};
58
Fabrizio Castrocdd90702017-10-13 16:22:22 +010059static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
60 .gen = 2,
61 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
62 | RCAR_DU_FEATURE_EXT_CTRL_REGS,
63 .num_crtcs = 2,
64 .routes = {
65 /*
66 * R8A7745 has two RGB outputs
67 */
68 [RCAR_DU_OUTPUT_DPAD0] = {
69 .possible_crtcs = BIT(0),
70 .port = 0,
71 },
72 [RCAR_DU_OUTPUT_DPAD1] = {
73 .possible_crtcs = BIT(1),
74 .port = 1,
75 },
76 },
77 .num_lvds = 0,
78};
79
Laurent Pinchart96c02692014-01-21 15:57:26 +010080static const struct rcar_du_device_info rcar_du_r8a7779_info = {
Laurent Pinchart2427b302015-09-07 17:34:26 +030081 .gen = 2,
Laurent Pinchart96c02692014-01-21 15:57:26 +010082 .features = 0,
83 .num_crtcs = 2,
84 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +030085 /*
86 * R8A7779 has two RGB outputs and one (currently unsupported)
Laurent Pinchart96c02692014-01-21 15:57:26 +010087 * TCON output.
88 */
89 [RCAR_DU_OUTPUT_DPAD0] = {
90 .possible_crtcs = BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +010091 .port = 0,
92 },
93 [RCAR_DU_OUTPUT_DPAD1] = {
94 .possible_crtcs = BIT(1) | BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +010095 .port = 1,
96 },
97 },
98 .num_lvds = 0,
99};
100
101static const struct rcar_du_device_info rcar_du_r8a7790_info = {
Laurent Pinchart2427b302015-09-07 17:34:26 +0300102 .gen = 2,
Laurent Pinchart0c1c8772014-12-09 00:21:12 +0200103 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
104 | RCAR_DU_FEATURE_EXT_CTRL_REGS,
Laurent Pinchart96c02692014-01-21 15:57:26 +0100105 .quirks = RCAR_DU_QUIRK_ALIGN_128B | RCAR_DU_QUIRK_LVDS_LANES,
106 .num_crtcs = 3,
107 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +0300108 /*
109 * R8A7790 has one RGB output, two LVDS outputs and one
Laurent Pinchart96c02692014-01-21 15:57:26 +0100110 * (currently unsupported) TCON output.
111 */
112 [RCAR_DU_OUTPUT_DPAD0] = {
113 .possible_crtcs = BIT(2) | BIT(1) | BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +0100114 .port = 0,
115 },
116 [RCAR_DU_OUTPUT_LVDS0] = {
117 .possible_crtcs = BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +0100118 .port = 1,
119 },
120 [RCAR_DU_OUTPUT_LVDS1] = {
121 .possible_crtcs = BIT(2) | BIT(1),
Laurent Pinchart96c02692014-01-21 15:57:26 +0100122 .port = 2,
123 },
124 },
125 .num_lvds = 2,
126};
127
Laurent Pinchartf1ceb84a2015-07-17 10:44:33 +0300128/* M2-W (r8a7791) and M2-N (r8a7793) are identical */
Laurent Pinchart96c02692014-01-21 15:57:26 +0100129static const struct rcar_du_device_info rcar_du_r8a7791_info = {
Laurent Pinchart2427b302015-09-07 17:34:26 +0300130 .gen = 2,
Laurent Pinchart0c1c8772014-12-09 00:21:12 +0200131 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
132 | RCAR_DU_FEATURE_EXT_CTRL_REGS,
Laurent Pinchart96c02692014-01-21 15:57:26 +0100133 .num_crtcs = 2,
134 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +0300135 /*
136 * R8A779[13] has one RGB output, one LVDS output and one
Laurent Pinchart96c02692014-01-21 15:57:26 +0100137 * (currently unsupported) TCON output.
138 */
139 [RCAR_DU_OUTPUT_DPAD0] = {
Laurent Pinchartf4f0fb72015-04-28 15:26:33 +0300140 .possible_crtcs = BIT(1) | BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +0100141 .port = 0,
142 },
143 [RCAR_DU_OUTPUT_LVDS0] = {
144 .possible_crtcs = BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +0100145 .port = 1,
146 },
147 },
148 .num_lvds = 1,
149};
150
Sergei Shtylyov73323dd2016-08-04 15:01:02 -0700151static const struct rcar_du_device_info rcar_du_r8a7792_info = {
152 .gen = 2,
153 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
154 | RCAR_DU_FEATURE_EXT_CTRL_REGS,
155 .num_crtcs = 2,
156 .routes = {
157 /* R8A7792 has two RGB outputs. */
158 [RCAR_DU_OUTPUT_DPAD0] = {
159 .possible_crtcs = BIT(0),
Sergei Shtylyov73323dd2016-08-04 15:01:02 -0700160 .port = 0,
161 },
162 [RCAR_DU_OUTPUT_DPAD1] = {
163 .possible_crtcs = BIT(1),
Sergei Shtylyov73323dd2016-08-04 15:01:02 -0700164 .port = 1,
165 },
166 },
167 .num_lvds = 0,
168};
169
Laurent Pinchart090425c2015-07-17 10:44:33 +0300170static const struct rcar_du_device_info rcar_du_r8a7794_info = {
Laurent Pinchart2427b302015-09-07 17:34:26 +0300171 .gen = 2,
Laurent Pinchart090425c2015-07-17 10:44:33 +0300172 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
173 | RCAR_DU_FEATURE_EXT_CTRL_REGS,
174 .num_crtcs = 2,
175 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +0300176 /*
177 * R8A7794 has two RGB outputs and one (currently unsupported)
Laurent Pinchart090425c2015-07-17 10:44:33 +0300178 * TCON output.
179 */
180 [RCAR_DU_OUTPUT_DPAD0] = {
181 .possible_crtcs = BIT(0),
Laurent Pinchart090425c2015-07-17 10:44:33 +0300182 .port = 0,
183 },
184 [RCAR_DU_OUTPUT_DPAD1] = {
185 .possible_crtcs = BIT(1),
Laurent Pinchart090425c2015-07-17 10:44:33 +0300186 .port = 1,
187 },
188 },
189 .num_lvds = 0,
190};
191
Laurent Pinchart2427b302015-09-07 17:34:26 +0300192static const struct rcar_du_device_info rcar_du_r8a7795_info = {
193 .gen = 3,
194 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
195 | RCAR_DU_FEATURE_EXT_CTRL_REGS
196 | RCAR_DU_FEATURE_VSP1_SOURCE,
197 .num_crtcs = 4,
198 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +0300199 /*
200 * R8A7795 has one RGB output, two HDMI outputs and one
Koji Matsuoka0dda563e2016-11-11 18:07:39 +0100201 * LVDS output.
Laurent Pinchart2427b302015-09-07 17:34:26 +0300202 */
203 [RCAR_DU_OUTPUT_DPAD0] = {
204 .possible_crtcs = BIT(3),
Laurent Pinchart2427b302015-09-07 17:34:26 +0300205 .port = 0,
206 },
Koji Matsuoka0dda563e2016-11-11 18:07:39 +0100207 [RCAR_DU_OUTPUT_HDMI0] = {
208 .possible_crtcs = BIT(1),
209 .port = 1,
210 },
211 [RCAR_DU_OUTPUT_HDMI1] = {
212 .possible_crtcs = BIT(2),
213 .port = 2,
214 },
Koji Matsuoka6bc2e152015-07-28 20:12:43 +0900215 [RCAR_DU_OUTPUT_LVDS0] = {
216 .possible_crtcs = BIT(0),
Koji Matsuoka6bc2e152015-07-28 20:12:43 +0900217 .port = 3,
218 },
Laurent Pinchart2427b302015-09-07 17:34:26 +0300219 },
Koji Matsuoka6bc2e152015-07-28 20:12:43 +0900220 .num_lvds = 1,
Koji Matsuokadc4aedb2016-11-11 18:07:41 +0100221 .dpll_ch = BIT(1) | BIT(2),
Laurent Pinchart2427b302015-09-07 17:34:26 +0300222};
223
Laurent Pinchart63b50532016-09-06 02:11:43 +0300224static const struct rcar_du_device_info rcar_du_r8a7796_info = {
225 .gen = 3,
226 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
227 | RCAR_DU_FEATURE_EXT_CTRL_REGS
228 | RCAR_DU_FEATURE_VSP1_SOURCE,
229 .num_crtcs = 3,
230 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +0300231 /*
Laurent Pinchart776c5d02017-06-19 23:34:40 +0300232 * R8A7796 has one RGB output, one LVDS output and one HDMI
233 * output.
Laurent Pinchart63b50532016-09-06 02:11:43 +0300234 */
235 [RCAR_DU_OUTPUT_DPAD0] = {
236 .possible_crtcs = BIT(2),
Laurent Pinchart63b50532016-09-06 02:11:43 +0300237 .port = 0,
238 },
Laurent Pinchart776c5d02017-06-19 23:34:40 +0300239 [RCAR_DU_OUTPUT_HDMI0] = {
240 .possible_crtcs = BIT(1),
241 .port = 1,
242 },
Laurent Pinchart63b50532016-09-06 02:11:43 +0300243 [RCAR_DU_OUTPUT_LVDS0] = {
244 .possible_crtcs = BIT(0),
Laurent Pinchart63b50532016-09-06 02:11:43 +0300245 .port = 2,
246 },
247 },
248 .num_lvds = 1,
Laurent Pinchart776c5d02017-06-19 23:34:40 +0300249 .dpll_ch = BIT(1),
Laurent Pinchart63b50532016-09-06 02:11:43 +0300250};
251
Laurent Pinchart96c02692014-01-21 15:57:26 +0100252static const struct of_device_id rcar_du_of_table[] = {
Fabrizio Castro36a46da92017-10-13 16:22:20 +0100253 { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info },
Fabrizio Castrocdd90702017-10-13 16:22:22 +0100254 { .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info },
Laurent Pinchart96c02692014-01-21 15:57:26 +0100255 { .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
256 { .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
257 { .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info },
Sergei Shtylyov73323dd2016-08-04 15:01:02 -0700258 { .compatible = "renesas,du-r8a7792", .data = &rcar_du_r8a7792_info },
Laurent Pinchartf1ceb84a2015-07-17 10:44:33 +0300259 { .compatible = "renesas,du-r8a7793", .data = &rcar_du_r8a7791_info },
Laurent Pinchart090425c2015-07-17 10:44:33 +0300260 { .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info },
Laurent Pinchart2427b302015-09-07 17:34:26 +0300261 { .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info },
Laurent Pinchart63b50532016-09-06 02:11:43 +0300262 { .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info },
Laurent Pinchart96c02692014-01-21 15:57:26 +0100263 { }
264};
265
266MODULE_DEVICE_TABLE(of, rcar_du_of_table);
267
268/* -----------------------------------------------------------------------------
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200269 * DRM operations
270 */
271
Laurent Pinchart3864c6f2013-03-14 22:45:22 +0100272static void rcar_du_lastclose(struct drm_device *dev)
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200273{
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200274 struct rcar_du_device *rcdu = dev->dev_private;
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200275
Laurent Pinchart3864c6f2013-03-14 22:45:22 +0100276 drm_fbdev_cma_restore_mode(rcdu->fbdev);
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200277}
278
Daniel Vetterd55f7e52017-03-08 15:12:56 +0100279DEFINE_DRM_GEM_CMA_FOPS(rcar_du_fops);
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200280
281static struct drm_driver rcar_du_driver = {
Laurent Pinchart6dbe6862015-02-26 21:22:10 +0200282 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME
283 | DRIVER_ATOMIC,
Laurent Pinchart3864c6f2013-03-14 22:45:22 +0100284 .lastclose = rcar_du_lastclose,
Daniel Vetter92e0f242016-05-30 19:53:02 +0200285 .gem_free_object_unlocked = drm_gem_cma_free_object,
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200286 .gem_vm_ops = &drm_gem_cma_vm_ops,
287 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
288 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Laurent Pinchartffb40402013-07-10 15:23:35 +0200289 .gem_prime_import = drm_gem_prime_import,
290 .gem_prime_export = drm_gem_prime_export,
291 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
292 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
293 .gem_prime_vmap = drm_gem_cma_prime_vmap,
294 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
295 .gem_prime_mmap = drm_gem_cma_prime_mmap,
Laurent Pinchart59e32642013-07-04 20:05:51 +0200296 .dumb_create = rcar_du_dumb_create,
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200297 .fops = &rcar_du_fops,
298 .name = "rcar-du",
299 .desc = "Renesas R-Car Display Unit",
300 .date = "20130110",
301 .major = 1,
302 .minor = 0,
303};
304
305/* -----------------------------------------------------------------------------
306 * Power management
307 */
308
Russell King396d7a22014-07-13 12:18:58 +0100309#ifdef CONFIG_PM_SLEEP
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200310static int rcar_du_pm_suspend(struct device *dev)
311{
312 struct rcar_du_device *rcdu = dev_get_drvdata(dev);
Kieran Bingham7912dee2017-09-15 17:42:06 +0100313 struct drm_atomic_state *state;
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200314
315 drm_kms_helper_poll_disable(rcdu->ddev);
Kieran Bingham7912dee2017-09-15 17:42:06 +0100316 drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, true);
317
318 state = drm_atomic_helper_suspend(rcdu->ddev);
319 if (IS_ERR(state)) {
320 drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, false);
321 drm_kms_helper_poll_enable(rcdu->ddev);
322 return PTR_ERR(state);
323 }
324
325 rcdu->suspend_state = state;
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200326
327 return 0;
328}
329
330static int rcar_du_pm_resume(struct device *dev)
331{
332 struct rcar_du_device *rcdu = dev_get_drvdata(dev);
333
Kieran Bingham7912dee2017-09-15 17:42:06 +0100334 drm_atomic_helper_resume(rcdu->ddev, rcdu->suspend_state);
335 drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, false);
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200336 drm_kms_helper_poll_enable(rcdu->ddev);
Kieran Bingham7912dee2017-09-15 17:42:06 +0100337
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200338 return 0;
339}
340#endif
341
342static const struct dev_pm_ops rcar_du_pm_ops = {
343 SET_SYSTEM_SLEEP_PM_OPS(rcar_du_pm_suspend, rcar_du_pm_resume)
344};
345
346/* -----------------------------------------------------------------------------
347 * Platform driver
348 */
349
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200350static int rcar_du_remove(struct platform_device *pdev)
351{
Daniel Vetter57a24cf2013-12-11 11:34:22 +0100352 struct rcar_du_device *rcdu = platform_get_drvdata(pdev);
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300353 struct drm_device *ddev = rcdu->ddev;
Daniel Vetter57a24cf2013-12-11 11:34:22 +0100354
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300355 drm_dev_unregister(ddev);
356
357 if (rcdu->fbdev)
358 drm_fbdev_cma_fini(rcdu->fbdev);
359
360 drm_kms_helper_poll_fini(ddev);
361 drm_mode_config_cleanup(ddev);
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300362
363 drm_dev_unref(ddev);
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200364
365 return 0;
366}
367
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300368static int rcar_du_probe(struct platform_device *pdev)
369{
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300370 struct rcar_du_device *rcdu;
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300371 struct drm_device *ddev;
372 struct resource *mem;
373 int ret;
374
Laurent Pinchart4f7b0d22016-10-19 00:51:35 +0300375 /* Allocate and initialize the R-Car device structure. */
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300376 rcdu = devm_kzalloc(&pdev->dev, sizeof(*rcdu), GFP_KERNEL);
377 if (rcdu == NULL)
378 return -ENOMEM;
379
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300380 rcdu->dev = &pdev->dev;
Wolfram Sang9e7d80e2016-10-16 10:01:47 +0200381 rcdu->info = of_device_get_match_data(rcdu->dev);
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300382
Laurent Pinchart4f7b0d22016-10-19 00:51:35 +0300383 platform_set_drvdata(pdev, rcdu);
384
385 /* I/O resources */
386 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
387 rcdu->mmio = devm_ioremap_resource(&pdev->dev, mem);
388 if (IS_ERR(rcdu->mmio))
389 return PTR_ERR(rcdu->mmio);
390
391 /* DRM/KMS objects */
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300392 ddev = drm_dev_alloc(&rcar_du_driver, &pdev->dev);
Tom Gundersen0f288602016-09-21 16:59:19 +0200393 if (IS_ERR(ddev))
394 return PTR_ERR(ddev);
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300395
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300396 rcdu->ddev = ddev;
397 ddev->dev_private = rcdu;
398
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300399 ret = rcar_du_modeset_init(rcdu);
400 if (ret < 0) {
Kuninori Morimotoccf49252016-05-25 00:41:18 +0000401 if (ret != -EPROBE_DEFER)
402 dev_err(&pdev->dev,
403 "failed to initialize DRM/KMS (%d)\n", ret);
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300404 goto error;
405 }
406
407 ddev->irq_enabled = 1;
408
Laurent Pinchartf3bafc12017-07-11 01:13:20 +0300409 /*
410 * Register the DRM device with the core and the connectors with
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300411 * sysfs.
412 */
413 ret = drm_dev_register(ddev, 0);
414 if (ret)
415 goto error;
416
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300417 DRM_INFO("Device %s probed\n", dev_name(&pdev->dev));
418
419 return 0;
420
421error:
422 rcar_du_remove(pdev);
423
424 return ret;
425}
426
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200427static struct platform_driver rcar_du_platform_driver = {
428 .probe = rcar_du_probe,
429 .remove = rcar_du_remove,
430 .driver = {
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200431 .name = "rcar-du",
432 .pm = &rcar_du_pm_ops,
Laurent Pinchart96c02692014-01-21 15:57:26 +0100433 .of_match_table = rcar_du_of_table,
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200434 },
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200435};
436
437module_platform_driver(rcar_du_platform_driver);
438
439MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
440MODULE_DESCRIPTION("Renesas R-Car Display Unit DRM Driver");
441MODULE_LICENSE("GPL");