Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Texas Instruments |
| 3 | * Author: Rob Clark <robdclark@gmail.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published by |
| 7 | * the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | /* LCDC DRM driver, based on da8xx-fb */ |
| 19 | |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 20 | #include <linux/component.h> |
Dave Gerlach | 416a07f | 2014-07-29 06:27:58 +0000 | [diff] [blame] | 21 | #include <linux/pinctrl/consumer.h> |
| 22 | #include <linux/suspend.h> |
Jyri Sarha | edc4330 | 2015-12-30 17:40:24 +0200 | [diff] [blame] | 23 | #include <drm/drm_atomic.h> |
| 24 | #include <drm/drm_atomic_helper.h> |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 25 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 26 | #include "tilcdc_drv.h" |
| 27 | #include "tilcdc_regs.h" |
| 28 | #include "tilcdc_tfp410.h" |
Rob Clark | 0d4bbaf | 2012-12-18 17:34:16 -0600 | [diff] [blame] | 29 | #include "tilcdc_panel.h" |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 30 | #include "tilcdc_external.h" |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 31 | |
| 32 | #include "drm_fb_helper.h" |
| 33 | |
| 34 | static LIST_HEAD(module_list); |
| 35 | |
Jyri Sarha | bcc5a6f | 2016-08-11 19:09:43 +0300 | [diff] [blame] | 36 | static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 }; |
| 37 | |
| 38 | static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565, |
| 39 | DRM_FORMAT_BGR888, |
| 40 | DRM_FORMAT_XBGR8888 }; |
| 41 | |
| 42 | static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565, |
| 43 | DRM_FORMAT_RGB888, |
| 44 | DRM_FORMAT_XRGB8888 }; |
| 45 | |
| 46 | static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565, |
| 47 | DRM_FORMAT_RGB888, |
| 48 | DRM_FORMAT_XRGB8888 }; |
| 49 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 50 | void tilcdc_module_init(struct tilcdc_module *mod, const char *name, |
| 51 | const struct tilcdc_module_ops *funcs) |
| 52 | { |
| 53 | mod->name = name; |
| 54 | mod->funcs = funcs; |
| 55 | INIT_LIST_HEAD(&mod->list); |
| 56 | list_add(&mod->list, &module_list); |
| 57 | } |
| 58 | |
| 59 | void tilcdc_module_cleanup(struct tilcdc_module *mod) |
| 60 | { |
| 61 | list_del(&mod->list); |
| 62 | } |
| 63 | |
| 64 | static struct of_device_id tilcdc_of_match[]; |
| 65 | |
| 66 | static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev, |
Ville Syrjälä | 1eb8345 | 2015-11-11 19:11:29 +0200 | [diff] [blame] | 67 | struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd) |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 68 | { |
| 69 | return drm_fb_cma_create(dev, file_priv, mode_cmd); |
| 70 | } |
| 71 | |
| 72 | static void tilcdc_fb_output_poll_changed(struct drm_device *dev) |
| 73 | { |
| 74 | struct tilcdc_drm_private *priv = dev->dev_private; |
Markus Elfring | c0844817 | 2014-11-19 17:05:20 +0100 | [diff] [blame] | 75 | drm_fbdev_cma_hotplug_event(priv->fbdev); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 76 | } |
| 77 | |
Wei Yongjun | 3045767 | 2016-09-10 12:32:57 +0000 | [diff] [blame] | 78 | static int tilcdc_atomic_check(struct drm_device *dev, |
| 79 | struct drm_atomic_state *state) |
Jyri Sarha | edc4330 | 2015-12-30 17:40:24 +0200 | [diff] [blame] | 80 | { |
| 81 | int ret; |
| 82 | |
| 83 | ret = drm_atomic_helper_check_modeset(dev, state); |
| 84 | if (ret) |
| 85 | return ret; |
| 86 | |
| 87 | ret = drm_atomic_helper_check_planes(dev, state); |
| 88 | if (ret) |
| 89 | return ret; |
| 90 | |
| 91 | /* |
| 92 | * tilcdc ->atomic_check can update ->mode_changed if pixel format |
| 93 | * changes, hence will we check modeset changes again. |
| 94 | */ |
| 95 | ret = drm_atomic_helper_check_modeset(dev, state); |
| 96 | if (ret) |
| 97 | return ret; |
| 98 | |
| 99 | return ret; |
| 100 | } |
| 101 | |
| 102 | static int tilcdc_commit(struct drm_device *dev, |
| 103 | struct drm_atomic_state *state, |
| 104 | bool async) |
| 105 | { |
| 106 | int ret; |
| 107 | |
| 108 | ret = drm_atomic_helper_prepare_planes(dev, state); |
| 109 | if (ret) |
| 110 | return ret; |
| 111 | |
| 112 | drm_atomic_helper_swap_state(state, true); |
| 113 | |
| 114 | /* |
| 115 | * Everything below can be run asynchronously without the need to grab |
| 116 | * any modeset locks at all under one condition: It must be guaranteed |
| 117 | * that the asynchronous work has either been cancelled (if the driver |
| 118 | * supports it, which at least requires that the framebuffers get |
| 119 | * cleaned up with drm_atomic_helper_cleanup_planes()) or completed |
| 120 | * before the new state gets committed on the software side with |
| 121 | * drm_atomic_helper_swap_state(). |
| 122 | * |
| 123 | * This scheme allows new atomic state updates to be prepared and |
| 124 | * checked in parallel to the asynchronous completion of the previous |
| 125 | * update. Which is important since compositors need to figure out the |
| 126 | * composition of the next frame right after having submitted the |
| 127 | * current layout. |
| 128 | */ |
| 129 | |
Jyri Sarha | 47bfd6c | 2016-06-22 16:27:54 +0300 | [diff] [blame] | 130 | /* Keep HW on while we commit the state. */ |
| 131 | pm_runtime_get_sync(dev->dev); |
| 132 | |
Jyri Sarha | edc4330 | 2015-12-30 17:40:24 +0200 | [diff] [blame] | 133 | drm_atomic_helper_commit_modeset_disables(dev, state); |
| 134 | |
Liu Ying | 2b58e98 | 2016-08-29 17:12:03 +0800 | [diff] [blame] | 135 | drm_atomic_helper_commit_planes(dev, state, 0); |
Jyri Sarha | edc4330 | 2015-12-30 17:40:24 +0200 | [diff] [blame] | 136 | |
| 137 | drm_atomic_helper_commit_modeset_enables(dev, state); |
| 138 | |
Jyri Sarha | 47bfd6c | 2016-06-22 16:27:54 +0300 | [diff] [blame] | 139 | /* Now HW should remain on if need becase the crtc is enabled */ |
| 140 | pm_runtime_put_sync(dev->dev); |
| 141 | |
Jyri Sarha | edc4330 | 2015-12-30 17:40:24 +0200 | [diff] [blame] | 142 | drm_atomic_helper_wait_for_vblanks(dev, state); |
| 143 | |
| 144 | drm_atomic_helper_cleanup_planes(dev, state); |
| 145 | |
Jyri Sarha | edc4330 | 2015-12-30 17:40:24 +0200 | [diff] [blame] | 146 | return 0; |
| 147 | } |
| 148 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 149 | static const struct drm_mode_config_funcs mode_config_funcs = { |
| 150 | .fb_create = tilcdc_fb_create, |
| 151 | .output_poll_changed = tilcdc_fb_output_poll_changed, |
Jyri Sarha | edc4330 | 2015-12-30 17:40:24 +0200 | [diff] [blame] | 152 | .atomic_check = tilcdc_atomic_check, |
| 153 | .atomic_commit = tilcdc_commit, |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 154 | }; |
| 155 | |
Jyri Sarha | 9963d36 | 2016-11-15 22:56:46 +0200 | [diff] [blame^] | 156 | static void modeset_init(struct drm_device *dev) |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 157 | { |
| 158 | struct tilcdc_drm_private *priv = dev->dev_private; |
| 159 | struct tilcdc_module *mod; |
| 160 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 161 | list_for_each_entry(mod, &module_list, list) { |
| 162 | DBG("loading module: %s", mod->name); |
| 163 | mod->funcs->modeset_init(mod, dev); |
| 164 | } |
| 165 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 166 | dev->mode_config.min_width = 0; |
| 167 | dev->mode_config.min_height = 0; |
| 168 | dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc); |
| 169 | dev->mode_config.max_height = 2048; |
| 170 | dev->mode_config.funcs = &mode_config_funcs; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 171 | } |
| 172 | |
| 173 | #ifdef CONFIG_CPU_FREQ |
| 174 | static int cpufreq_transition(struct notifier_block *nb, |
| 175 | unsigned long val, void *data) |
| 176 | { |
| 177 | struct tilcdc_drm_private *priv = container_of(nb, |
| 178 | struct tilcdc_drm_private, freq_transition); |
Jyri Sarha | a6b7eba | 2016-09-05 20:39:32 +0300 | [diff] [blame] | 179 | |
Jyri Sarha | 642e516 | 2016-09-06 16:19:54 +0300 | [diff] [blame] | 180 | if (val == CPUFREQ_POSTCHANGE) |
| 181 | tilcdc_crtc_update_clk(priv->crtc); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 182 | |
| 183 | return 0; |
| 184 | } |
| 185 | #endif |
| 186 | |
| 187 | /* |
| 188 | * DRM operations: |
| 189 | */ |
| 190 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 191 | static void tilcdc_fini(struct drm_device *dev) |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 192 | { |
| 193 | struct tilcdc_drm_private *priv = dev->dev_private; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 194 | |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 195 | if (priv->crtc) |
Jyri Sarha | 2d53a18 | 2016-10-25 12:27:31 +0300 | [diff] [blame] | 196 | tilcdc_crtc_shutdown(priv->crtc); |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 197 | |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 198 | if (priv->is_registered) |
| 199 | drm_dev_unregister(dev); |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 200 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 201 | drm_kms_helper_poll_fini(dev); |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 202 | |
| 203 | if (priv->fbdev) |
| 204 | drm_fbdev_cma_fini(priv->fbdev); |
| 205 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 206 | drm_irq_uninstall(dev); |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 207 | drm_mode_config_cleanup(dev); |
Jyri Sarha | ec9eab0 | 2016-10-31 17:34:22 +0200 | [diff] [blame] | 208 | tilcdc_remove_external_device(dev); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 209 | |
| 210 | #ifdef CONFIG_CPU_FREQ |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 211 | if (priv->freq_transition.notifier_call) |
| 212 | cpufreq_unregister_notifier(&priv->freq_transition, |
| 213 | CPUFREQ_TRANSITION_NOTIFIER); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 214 | #endif |
| 215 | |
| 216 | if (priv->clk) |
| 217 | clk_put(priv->clk); |
| 218 | |
| 219 | if (priv->mmio) |
| 220 | iounmap(priv->mmio); |
| 221 | |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 222 | if (priv->wq) { |
| 223 | flush_workqueue(priv->wq); |
| 224 | destroy_workqueue(priv->wq); |
| 225 | } |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 226 | |
| 227 | dev->dev_private = NULL; |
| 228 | |
| 229 | pm_runtime_disable(dev->dev); |
| 230 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 231 | drm_dev_unref(dev); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 232 | } |
| 233 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 234 | static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 235 | { |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 236 | struct drm_device *ddev; |
| 237 | struct platform_device *pdev = to_platform_device(dev); |
| 238 | struct device_node *node = dev->of_node; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 239 | struct tilcdc_drm_private *priv; |
| 240 | struct resource *res; |
Benoit Parrot | dc28aa0 | 2013-06-18 17:18:31 -0500 | [diff] [blame] | 241 | u32 bpp = 0; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 242 | int ret; |
| 243 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 244 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
Jyri Sarha | 514d1a1 | 2016-06-16 11:28:23 +0300 | [diff] [blame] | 245 | if (!priv) { |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 246 | dev_err(dev, "failed to allocate private data\n"); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 247 | return -ENOMEM; |
| 248 | } |
| 249 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 250 | ddev = drm_dev_alloc(ddrv, dev); |
| 251 | if (IS_ERR(ddev)) |
| 252 | return PTR_ERR(ddev); |
| 253 | |
| 254 | ddev->platformdev = pdev; |
| 255 | ddev->dev_private = priv; |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 256 | platform_set_drvdata(pdev, ddev); |
| 257 | drm_mode_config_init(ddev); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 258 | |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 259 | priv->is_componentized = |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 260 | tilcdc_get_external_components(dev, NULL) > 0; |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 261 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 262 | priv->wq = alloc_ordered_workqueue("tilcdc", 0); |
Ezequiel Garcia | b478e336b | 2014-09-02 09:51:15 -0300 | [diff] [blame] | 263 | if (!priv->wq) { |
| 264 | ret = -ENOMEM; |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 265 | goto init_failed; |
Ezequiel Garcia | b478e336b | 2014-09-02 09:51:15 -0300 | [diff] [blame] | 266 | } |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 267 | |
| 268 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 269 | if (!res) { |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 270 | dev_err(dev, "failed to get memory resource\n"); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 271 | ret = -EINVAL; |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 272 | goto init_failed; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 273 | } |
| 274 | |
| 275 | priv->mmio = ioremap_nocache(res->start, resource_size(res)); |
| 276 | if (!priv->mmio) { |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 277 | dev_err(dev, "failed to ioremap\n"); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 278 | ret = -ENOMEM; |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 279 | goto init_failed; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 280 | } |
| 281 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 282 | priv->clk = clk_get(dev, "fck"); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 283 | if (IS_ERR(priv->clk)) { |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 284 | dev_err(dev, "failed to get functional clock\n"); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 285 | ret = -ENODEV; |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 286 | goto init_failed; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 287 | } |
| 288 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 289 | #ifdef CONFIG_CPU_FREQ |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 290 | priv->freq_transition.notifier_call = cpufreq_transition; |
| 291 | ret = cpufreq_register_notifier(&priv->freq_transition, |
| 292 | CPUFREQ_TRANSITION_NOTIFIER); |
| 293 | if (ret) { |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 294 | dev_err(dev, "failed to register cpufreq notifier\n"); |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 295 | priv->freq_transition.notifier_call = NULL; |
| 296 | goto init_failed; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 297 | } |
| 298 | #endif |
| 299 | |
| 300 | if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth)) |
Darren Etheridge | 4e56434 | 2013-06-21 13:52:23 -0500 | [diff] [blame] | 301 | priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH; |
| 302 | |
| 303 | DBG("Maximum Bandwidth Value %d", priv->max_bandwidth); |
| 304 | |
| 305 | if (of_property_read_u32(node, "ti,max-width", &priv->max_width)) |
| 306 | priv->max_width = TILCDC_DEFAULT_MAX_WIDTH; |
| 307 | |
| 308 | DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width); |
| 309 | |
| 310 | if (of_property_read_u32(node, "ti,max-pixelclock", |
| 311 | &priv->max_pixelclock)) |
| 312 | priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK; |
| 313 | |
| 314 | DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 315 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 316 | pm_runtime_enable(dev); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 317 | |
| 318 | /* Determine LCD IP Version */ |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 319 | pm_runtime_get_sync(dev); |
| 320 | switch (tilcdc_read(ddev, LCDC_PID_REG)) { |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 321 | case 0x4c100102: |
| 322 | priv->rev = 1; |
| 323 | break; |
| 324 | case 0x4f200800: |
| 325 | case 0x4f201000: |
| 326 | priv->rev = 2; |
| 327 | break; |
| 328 | default: |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 329 | dev_warn(dev, "Unknown PID Reg value 0x%08x, " |
| 330 | "defaulting to LCD revision 1\n", |
| 331 | tilcdc_read(ddev, LCDC_PID_REG)); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 332 | priv->rev = 1; |
| 333 | break; |
| 334 | } |
| 335 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 336 | pm_runtime_put_sync(dev); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 337 | |
Jyri Sarha | bcc5a6f | 2016-08-11 19:09:43 +0300 | [diff] [blame] | 338 | if (priv->rev == 1) { |
| 339 | DBG("Revision 1 LCDC supports only RGB565 format"); |
| 340 | priv->pixelformats = tilcdc_rev1_formats; |
| 341 | priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats); |
Jyri Sarha | c566538 | 2016-08-13 21:08:20 +0300 | [diff] [blame] | 342 | bpp = 16; |
Jyri Sarha | bcc5a6f | 2016-08-11 19:09:43 +0300 | [diff] [blame] | 343 | } else { |
| 344 | const char *str = "\0"; |
| 345 | |
| 346 | of_property_read_string(node, "blue-and-red-wiring", &str); |
| 347 | if (0 == strcmp(str, "crossed")) { |
| 348 | DBG("Configured for crossed blue and red wires"); |
| 349 | priv->pixelformats = tilcdc_crossed_formats; |
| 350 | priv->num_pixelformats = |
| 351 | ARRAY_SIZE(tilcdc_crossed_formats); |
Jyri Sarha | c566538 | 2016-08-13 21:08:20 +0300 | [diff] [blame] | 352 | bpp = 32; /* Choose bpp with RGB support for fbdef */ |
Jyri Sarha | bcc5a6f | 2016-08-11 19:09:43 +0300 | [diff] [blame] | 353 | } else if (0 == strcmp(str, "straight")) { |
| 354 | DBG("Configured for straight blue and red wires"); |
| 355 | priv->pixelformats = tilcdc_straight_formats; |
| 356 | priv->num_pixelformats = |
| 357 | ARRAY_SIZE(tilcdc_straight_formats); |
Jyri Sarha | c566538 | 2016-08-13 21:08:20 +0300 | [diff] [blame] | 358 | bpp = 16; /* Choose bpp with RGB support for fbdef */ |
Jyri Sarha | bcc5a6f | 2016-08-11 19:09:43 +0300 | [diff] [blame] | 359 | } else { |
| 360 | DBG("Blue and red wiring '%s' unknown, use legacy mode", |
| 361 | str); |
| 362 | priv->pixelformats = tilcdc_legacy_formats; |
| 363 | priv->num_pixelformats = |
| 364 | ARRAY_SIZE(tilcdc_legacy_formats); |
Jyri Sarha | c566538 | 2016-08-13 21:08:20 +0300 | [diff] [blame] | 365 | bpp = 16; /* This is just a guess */ |
Jyri Sarha | bcc5a6f | 2016-08-11 19:09:43 +0300 | [diff] [blame] | 366 | } |
| 367 | } |
| 368 | |
Jyri Sarha | 9963d36 | 2016-11-15 22:56:46 +0200 | [diff] [blame^] | 369 | ret = tilcdc_crtc_create(ddev); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 370 | if (ret < 0) { |
Jyri Sarha | 9963d36 | 2016-11-15 22:56:46 +0200 | [diff] [blame^] | 371 | dev_err(dev, "failed to create crtc\n"); |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 372 | goto init_failed; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 373 | } |
Jyri Sarha | 9963d36 | 2016-11-15 22:56:46 +0200 | [diff] [blame^] | 374 | modeset_init(ddev); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 375 | |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 376 | if (priv->is_componentized) { |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 377 | ret = component_bind_all(dev, ddev); |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 378 | if (ret < 0) |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 379 | goto init_failed; |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 380 | |
Jyri Sarha | ec9eab0 | 2016-10-31 17:34:22 +0200 | [diff] [blame] | 381 | ret = tilcdc_add_component_encoder(ddev); |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 382 | if (ret < 0) |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 383 | goto init_failed; |
Jyri Sarha | ec9eab0 | 2016-10-31 17:34:22 +0200 | [diff] [blame] | 384 | } else { |
| 385 | ret = tilcdc_attach_external_device(ddev); |
| 386 | if (ret) |
| 387 | goto init_failed; |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 388 | } |
| 389 | |
Jyri Sarha | ec9eab0 | 2016-10-31 17:34:22 +0200 | [diff] [blame] | 390 | if (!priv->external_connector && |
| 391 | ((priv->num_encoders == 0) || (priv->num_connectors == 0))) { |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 392 | dev_err(dev, "no encoders/connectors found\n"); |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 393 | ret = -ENXIO; |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 394 | goto init_failed; |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 395 | } |
| 396 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 397 | ret = drm_vblank_init(ddev, 1); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 398 | if (ret < 0) { |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 399 | dev_err(dev, "failed to initialize vblank\n"); |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 400 | goto init_failed; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 401 | } |
| 402 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 403 | ret = drm_irq_install(ddev, platform_get_irq(pdev, 0)); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 404 | if (ret < 0) { |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 405 | dev_err(dev, "failed to install IRQ handler\n"); |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 406 | goto init_failed; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 407 | } |
| 408 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 409 | drm_mode_config_reset(ddev); |
Jyri Sarha | 522a76f | 2015-12-29 17:27:32 +0200 | [diff] [blame] | 410 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 411 | priv->fbdev = drm_fbdev_cma_init(ddev, bpp, |
| 412 | ddev->mode_config.num_crtc, |
| 413 | ddev->mode_config.num_connector); |
Ezequiel Garcia | b478e336b | 2014-09-02 09:51:15 -0300 | [diff] [blame] | 414 | if (IS_ERR(priv->fbdev)) { |
| 415 | ret = PTR_ERR(priv->fbdev); |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 416 | goto init_failed; |
Ezequiel Garcia | b478e336b | 2014-09-02 09:51:15 -0300 | [diff] [blame] | 417 | } |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 418 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 419 | drm_kms_helper_poll_init(ddev); |
| 420 | |
| 421 | ret = drm_dev_register(ddev, 0); |
| 422 | if (ret) |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 423 | goto init_failed; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 424 | |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 425 | priv->is_registered = true; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 426 | return 0; |
| 427 | |
Jyri Sarha | 9e79e06 | 2016-10-18 23:23:27 +0300 | [diff] [blame] | 428 | init_failed: |
| 429 | tilcdc_fini(ddev); |
Jyri Sarha | d0ec32c | 2016-02-23 12:44:27 +0200 | [diff] [blame] | 430 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 431 | return ret; |
| 432 | } |
| 433 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 434 | static void tilcdc_lastclose(struct drm_device *dev) |
| 435 | { |
| 436 | struct tilcdc_drm_private *priv = dev->dev_private; |
| 437 | drm_fbdev_cma_restore_mode(priv->fbdev); |
| 438 | } |
| 439 | |
Daniel Vetter | e9f0d76 | 2013-12-11 11:34:42 +0100 | [diff] [blame] | 440 | static irqreturn_t tilcdc_irq(int irq, void *arg) |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 441 | { |
| 442 | struct drm_device *dev = arg; |
| 443 | struct tilcdc_drm_private *priv = dev->dev_private; |
| 444 | return tilcdc_crtc_irq(priv->crtc); |
| 445 | } |
| 446 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 447 | static int tilcdc_enable_vblank(struct drm_device *dev, unsigned int pipe) |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 448 | { |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 449 | return 0; |
| 450 | } |
| 451 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 452 | static void tilcdc_disable_vblank(struct drm_device *dev, unsigned int pipe) |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 453 | { |
Tomi Valkeinen | 2b2080d7 | 2015-10-20 09:37:27 +0300 | [diff] [blame] | 454 | return; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 455 | } |
| 456 | |
Jyri Sarha | 514d1a1 | 2016-06-16 11:28:23 +0300 | [diff] [blame] | 457 | #if defined(CONFIG_DEBUG_FS) |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 458 | static const struct { |
| 459 | const char *name; |
| 460 | uint8_t rev; |
| 461 | uint8_t save; |
| 462 | uint32_t reg; |
Sachin Kamat | 3250145 | 2013-03-02 15:53:08 +0530 | [diff] [blame] | 463 | } registers[] = { |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 464 | #define REG(rev, save, reg) { #reg, rev, save, reg } |
| 465 | /* exists in revision 1: */ |
| 466 | REG(1, false, LCDC_PID_REG), |
| 467 | REG(1, true, LCDC_CTRL_REG), |
| 468 | REG(1, false, LCDC_STAT_REG), |
| 469 | REG(1, true, LCDC_RASTER_CTRL_REG), |
| 470 | REG(1, true, LCDC_RASTER_TIMING_0_REG), |
| 471 | REG(1, true, LCDC_RASTER_TIMING_1_REG), |
| 472 | REG(1, true, LCDC_RASTER_TIMING_2_REG), |
| 473 | REG(1, true, LCDC_DMA_CTRL_REG), |
| 474 | REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG), |
| 475 | REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG), |
| 476 | REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG), |
| 477 | REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG), |
| 478 | /* new in revision 2: */ |
| 479 | REG(2, false, LCDC_RAW_STAT_REG), |
| 480 | REG(2, false, LCDC_MASKED_STAT_REG), |
Jyri Sarha | f3a9994 | 2016-01-08 12:17:50 +0200 | [diff] [blame] | 481 | REG(2, true, LCDC_INT_ENABLE_SET_REG), |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 482 | REG(2, false, LCDC_INT_ENABLE_CLR_REG), |
| 483 | REG(2, false, LCDC_END_OF_INT_IND_REG), |
| 484 | REG(2, true, LCDC_CLK_ENABLE_REG), |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 485 | #undef REG |
| 486 | }; |
Jyri Sarha | 29ddd6e | 2015-07-02 16:26:12 +0300 | [diff] [blame] | 487 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 488 | #endif |
| 489 | |
| 490 | #ifdef CONFIG_DEBUG_FS |
| 491 | static int tilcdc_regs_show(struct seq_file *m, void *arg) |
| 492 | { |
| 493 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 494 | struct drm_device *dev = node->minor->dev; |
| 495 | struct tilcdc_drm_private *priv = dev->dev_private; |
| 496 | unsigned i; |
| 497 | |
| 498 | pm_runtime_get_sync(dev->dev); |
| 499 | |
| 500 | seq_printf(m, "revision: %d\n", priv->rev); |
| 501 | |
| 502 | for (i = 0; i < ARRAY_SIZE(registers); i++) |
| 503 | if (priv->rev >= registers[i].rev) |
| 504 | seq_printf(m, "%s:\t %08x\n", registers[i].name, |
| 505 | tilcdc_read(dev, registers[i].reg)); |
| 506 | |
| 507 | pm_runtime_put_sync(dev->dev); |
| 508 | |
| 509 | return 0; |
| 510 | } |
| 511 | |
| 512 | static int tilcdc_mm_show(struct seq_file *m, void *arg) |
| 513 | { |
| 514 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 515 | struct drm_device *dev = node->minor->dev; |
Daniel Vetter | b04a590 | 2013-12-11 14:24:46 +0100 | [diff] [blame] | 516 | return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 517 | } |
| 518 | |
| 519 | static struct drm_info_list tilcdc_debugfs_list[] = { |
| 520 | { "regs", tilcdc_regs_show, 0 }, |
| 521 | { "mm", tilcdc_mm_show, 0 }, |
| 522 | { "fb", drm_fb_cma_debugfs_show, 0 }, |
| 523 | }; |
| 524 | |
| 525 | static int tilcdc_debugfs_init(struct drm_minor *minor) |
| 526 | { |
| 527 | struct drm_device *dev = minor->dev; |
| 528 | struct tilcdc_module *mod; |
| 529 | int ret; |
| 530 | |
| 531 | ret = drm_debugfs_create_files(tilcdc_debugfs_list, |
| 532 | ARRAY_SIZE(tilcdc_debugfs_list), |
| 533 | minor->debugfs_root, minor); |
| 534 | |
| 535 | list_for_each_entry(mod, &module_list, list) |
| 536 | if (mod->funcs->debugfs_init) |
| 537 | mod->funcs->debugfs_init(mod, minor); |
| 538 | |
| 539 | if (ret) { |
| 540 | dev_err(dev->dev, "could not install tilcdc_debugfs_list\n"); |
| 541 | return ret; |
| 542 | } |
| 543 | |
| 544 | return ret; |
| 545 | } |
| 546 | |
| 547 | static void tilcdc_debugfs_cleanup(struct drm_minor *minor) |
| 548 | { |
| 549 | struct tilcdc_module *mod; |
| 550 | drm_debugfs_remove_files(tilcdc_debugfs_list, |
| 551 | ARRAY_SIZE(tilcdc_debugfs_list), minor); |
| 552 | |
| 553 | list_for_each_entry(mod, &module_list, list) |
| 554 | if (mod->funcs->debugfs_cleanup) |
| 555 | mod->funcs->debugfs_cleanup(mod, minor); |
| 556 | } |
| 557 | #endif |
| 558 | |
| 559 | static const struct file_operations fops = { |
| 560 | .owner = THIS_MODULE, |
| 561 | .open = drm_open, |
| 562 | .release = drm_release, |
| 563 | .unlocked_ioctl = drm_ioctl, |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 564 | .compat_ioctl = drm_compat_ioctl, |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 565 | .poll = drm_poll, |
| 566 | .read = drm_read, |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 567 | .llseek = no_llseek, |
| 568 | .mmap = drm_gem_cma_mmap, |
| 569 | }; |
| 570 | |
| 571 | static struct drm_driver tilcdc_driver = { |
Jyri Sarha | 9c15390 | 2015-06-23 14:31:17 +0300 | [diff] [blame] | 572 | .driver_features = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET | |
Jyri Sarha | 305198d | 2016-04-07 15:05:16 +0300 | [diff] [blame] | 573 | DRIVER_PRIME | DRIVER_ATOMIC), |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 574 | .lastclose = tilcdc_lastclose, |
| 575 | .irq_handler = tilcdc_irq, |
Ville Syrjälä | b44f840 | 2015-09-30 16:46:48 +0300 | [diff] [blame] | 576 | .get_vblank_counter = drm_vblank_no_hw_counter, |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 577 | .enable_vblank = tilcdc_enable_vblank, |
| 578 | .disable_vblank = tilcdc_disable_vblank, |
Daniel Vetter | aa0438c | 2016-05-30 19:53:05 +0200 | [diff] [blame] | 579 | .gem_free_object_unlocked = drm_gem_cma_free_object, |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 580 | .gem_vm_ops = &drm_gem_cma_vm_ops, |
| 581 | .dumb_create = drm_gem_cma_dumb_create, |
| 582 | .dumb_map_offset = drm_gem_cma_dumb_map_offset, |
Daniel Vetter | 43387b3 | 2013-07-16 09:12:04 +0200 | [diff] [blame] | 583 | .dumb_destroy = drm_gem_dumb_destroy, |
Jyri Sarha | 9c15390 | 2015-06-23 14:31:17 +0300 | [diff] [blame] | 584 | |
| 585 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
| 586 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, |
| 587 | .gem_prime_import = drm_gem_prime_import, |
| 588 | .gem_prime_export = drm_gem_prime_export, |
| 589 | .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, |
| 590 | .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, |
| 591 | .gem_prime_vmap = drm_gem_cma_prime_vmap, |
| 592 | .gem_prime_vunmap = drm_gem_cma_prime_vunmap, |
| 593 | .gem_prime_mmap = drm_gem_cma_prime_mmap, |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 594 | #ifdef CONFIG_DEBUG_FS |
| 595 | .debugfs_init = tilcdc_debugfs_init, |
| 596 | .debugfs_cleanup = tilcdc_debugfs_cleanup, |
| 597 | #endif |
| 598 | .fops = &fops, |
| 599 | .name = "tilcdc", |
| 600 | .desc = "TI LCD Controller DRM", |
| 601 | .date = "20121205", |
| 602 | .major = 1, |
| 603 | .minor = 0, |
| 604 | }; |
| 605 | |
| 606 | /* |
| 607 | * Power management: |
| 608 | */ |
| 609 | |
| 610 | #ifdef CONFIG_PM_SLEEP |
| 611 | static int tilcdc_pm_suspend(struct device *dev) |
| 612 | { |
| 613 | struct drm_device *ddev = dev_get_drvdata(dev); |
| 614 | struct tilcdc_drm_private *priv = ddev->dev_private; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 615 | |
Jyri Sarha | 514d1a1 | 2016-06-16 11:28:23 +0300 | [diff] [blame] | 616 | priv->saved_state = drm_atomic_helper_suspend(ddev); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 617 | |
Darren Etheridge | 85fd27f | 2014-09-19 01:42:57 +0000 | [diff] [blame] | 618 | /* Select sleep pin state */ |
| 619 | pinctrl_pm_select_sleep_state(dev); |
| 620 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 621 | return 0; |
| 622 | } |
| 623 | |
| 624 | static int tilcdc_pm_resume(struct device *dev) |
| 625 | { |
| 626 | struct drm_device *ddev = dev_get_drvdata(dev); |
| 627 | struct tilcdc_drm_private *priv = ddev->dev_private; |
Jyri Sarha | 514d1a1 | 2016-06-16 11:28:23 +0300 | [diff] [blame] | 628 | int ret = 0; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 629 | |
Dave Gerlach | 416a07f | 2014-07-29 06:27:58 +0000 | [diff] [blame] | 630 | /* Select default pin state */ |
| 631 | pinctrl_pm_select_default_state(dev); |
| 632 | |
Jyri Sarha | 514d1a1 | 2016-06-16 11:28:23 +0300 | [diff] [blame] | 633 | if (priv->saved_state) |
| 634 | ret = drm_atomic_helper_resume(ddev, priv->saved_state); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 635 | |
Jyri Sarha | 514d1a1 | 2016-06-16 11:28:23 +0300 | [diff] [blame] | 636 | return ret; |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 637 | } |
| 638 | #endif |
| 639 | |
| 640 | static const struct dev_pm_ops tilcdc_pm_ops = { |
| 641 | SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume) |
| 642 | }; |
| 643 | |
| 644 | /* |
| 645 | * Platform driver: |
| 646 | */ |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 647 | static int tilcdc_bind(struct device *dev) |
| 648 | { |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 649 | return tilcdc_init(&tilcdc_driver, dev); |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 650 | } |
| 651 | |
| 652 | static void tilcdc_unbind(struct device *dev) |
| 653 | { |
Jyri Sarha | 20a98ac | 2016-06-23 11:07:16 +0300 | [diff] [blame] | 654 | struct drm_device *ddev = dev_get_drvdata(dev); |
| 655 | |
| 656 | /* Check if a subcomponent has already triggered the unloading. */ |
| 657 | if (!ddev->dev_private) |
| 658 | return; |
| 659 | |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 660 | tilcdc_fini(dev_get_drvdata(dev)); |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 661 | } |
| 662 | |
| 663 | static const struct component_master_ops tilcdc_comp_ops = { |
| 664 | .bind = tilcdc_bind, |
| 665 | .unbind = tilcdc_unbind, |
| 666 | }; |
| 667 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 668 | static int tilcdc_pdev_probe(struct platform_device *pdev) |
| 669 | { |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 670 | struct component_match *match = NULL; |
| 671 | int ret; |
| 672 | |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 673 | /* bail out early if no DT data: */ |
| 674 | if (!pdev->dev.of_node) { |
| 675 | dev_err(&pdev->dev, "device-tree data is missing\n"); |
| 676 | return -ENXIO; |
| 677 | } |
| 678 | |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 679 | ret = tilcdc_get_external_components(&pdev->dev, &match); |
| 680 | if (ret < 0) |
| 681 | return ret; |
| 682 | else if (ret == 0) |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 683 | return tilcdc_init(&tilcdc_driver, &pdev->dev); |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 684 | else |
| 685 | return component_master_add_with_match(&pdev->dev, |
| 686 | &tilcdc_comp_ops, |
| 687 | match); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 688 | } |
| 689 | |
| 690 | static int tilcdc_pdev_remove(struct platform_device *pdev) |
| 691 | { |
Jyri Sarha | 20a98ac | 2016-06-23 11:07:16 +0300 | [diff] [blame] | 692 | int ret; |
Jyri Sarha | 103cd8b | 2015-02-10 14:13:23 +0200 | [diff] [blame] | 693 | |
Jyri Sarha | 20a98ac | 2016-06-23 11:07:16 +0300 | [diff] [blame] | 694 | ret = tilcdc_get_external_components(&pdev->dev, NULL); |
| 695 | if (ret < 0) |
| 696 | return ret; |
| 697 | else if (ret == 0) |
Jyri Sarha | 923310b | 2016-10-17 17:53:33 +0300 | [diff] [blame] | 698 | tilcdc_fini(platform_get_drvdata(pdev)); |
Jyri Sarha | 20a98ac | 2016-06-23 11:07:16 +0300 | [diff] [blame] | 699 | else |
| 700 | component_master_del(&pdev->dev, &tilcdc_comp_ops); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 701 | |
| 702 | return 0; |
| 703 | } |
| 704 | |
| 705 | static struct of_device_id tilcdc_of_match[] = { |
| 706 | { .compatible = "ti,am33xx-tilcdc", }, |
Bartosz Golaszewski | 507b72b | 2016-10-03 17:45:19 +0200 | [diff] [blame] | 707 | { .compatible = "ti,da850-tilcdc", }, |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 708 | { }, |
| 709 | }; |
| 710 | MODULE_DEVICE_TABLE(of, tilcdc_of_match); |
| 711 | |
| 712 | static struct platform_driver tilcdc_platform_driver = { |
| 713 | .probe = tilcdc_pdev_probe, |
| 714 | .remove = tilcdc_pdev_remove, |
| 715 | .driver = { |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 716 | .name = "tilcdc", |
| 717 | .pm = &tilcdc_pm_ops, |
| 718 | .of_match_table = tilcdc_of_match, |
| 719 | }, |
| 720 | }; |
| 721 | |
| 722 | static int __init tilcdc_drm_init(void) |
| 723 | { |
| 724 | DBG("init"); |
| 725 | tilcdc_tfp410_init(); |
Rob Clark | 0d4bbaf | 2012-12-18 17:34:16 -0600 | [diff] [blame] | 726 | tilcdc_panel_init(); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 727 | return platform_driver_register(&tilcdc_platform_driver); |
| 728 | } |
| 729 | |
| 730 | static void __exit tilcdc_drm_fini(void) |
| 731 | { |
| 732 | DBG("fini"); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 733 | platform_driver_unregister(&tilcdc_platform_driver); |
Guido Martínez | eb565a2 | 2014-06-17 11:17:08 -0300 | [diff] [blame] | 734 | tilcdc_panel_fini(); |
Guido Martínez | eb565a2 | 2014-06-17 11:17:08 -0300 | [diff] [blame] | 735 | tilcdc_tfp410_fini(); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 736 | } |
| 737 | |
Guido Martínez | 2023d84 | 2014-06-17 11:17:11 -0300 | [diff] [blame] | 738 | module_init(tilcdc_drm_init); |
Rob Clark | 16ea975 | 2013-01-08 15:04:28 -0600 | [diff] [blame] | 739 | module_exit(tilcdc_drm_fini); |
| 740 | |
| 741 | MODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); |
| 742 | MODULE_DESCRIPTION("TI LCD Controller DRM Driver"); |
| 743 | MODULE_LICENSE("GPL"); |