blob: 0b4a676999ca13a74982ccd90ca5ac0baf73452e [file] [log] [blame]
Salil76ad4f02017-08-02 16:59:45 +01001/*
2 * Copyright (c) 2016~2017 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#include <linux/dma-mapping.h>
11#include <linux/etherdevice.h>
12#include <linux/interrupt.h>
13#include <linux/if_vlan.h>
14#include <linux/ip.h>
15#include <linux/ipv6.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/skbuff.h>
19#include <linux/sctp.h>
20#include <linux/vermagic.h>
21#include <net/gre.h>
Yunsheng Lin30d240d2017-10-17 14:51:30 +080022#include <net/pkt_cls.h>
Salil76ad4f02017-08-02 16:59:45 +010023#include <net/vxlan.h>
24
25#include "hnae3.h"
26#include "hns3_enet.h"
27
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +080028static const char hns3_driver_name[] = "hns3";
Salil76ad4f02017-08-02 16:59:45 +010029const char hns3_driver_version[] = VERMAGIC_STRING;
30static const char hns3_driver_string[] =
31 "Hisilicon Ethernet Network Driver for Hip08 Family";
32static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
33static struct hnae3_client client;
34
35/* hns3_pci_tbl - PCI Device ID Table
36 *
37 * Last entry must be all 0s
38 *
39 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
40 * Class, Class Mask, private data (not used) }
41 */
42static const struct pci_device_id hns3_pci_tbl[] = {
43 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
44 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
Yunsheng Line92a0842017-09-20 18:52:50 +080045 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080046 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080047 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080048 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080049 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080050 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080051 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080052 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080053 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080054 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Salil Mehta424eb832017-12-14 18:03:06 +000055 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
56 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF), 0},
Salil76ad4f02017-08-02 16:59:45 +010057 /* required last entry */
58 {0, }
59};
60MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
61
62static irqreturn_t hns3_irq_handle(int irq, void *dev)
63{
64 struct hns3_enet_tqp_vector *tqp_vector = dev;
65
66 napi_schedule(&tqp_vector->napi);
67
68 return IRQ_HANDLED;
69}
70
71static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
72{
73 struct hns3_enet_tqp_vector *tqp_vectors;
74 unsigned int i;
75
76 for (i = 0; i < priv->vector_num; i++) {
77 tqp_vectors = &priv->tqp_vector[i];
78
79 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
80 continue;
81
82 /* release the irq resource */
83 free_irq(tqp_vectors->vector_irq, tqp_vectors);
84 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
85 }
86}
87
88static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
89{
90 struct hns3_enet_tqp_vector *tqp_vectors;
91 int txrx_int_idx = 0;
92 int rx_int_idx = 0;
93 int tx_int_idx = 0;
94 unsigned int i;
95 int ret;
96
97 for (i = 0; i < priv->vector_num; i++) {
98 tqp_vectors = &priv->tqp_vector[i];
99
100 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
101 continue;
102
103 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
104 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
105 "%s-%s-%d", priv->netdev->name, "TxRx",
106 txrx_int_idx++);
107 txrx_int_idx++;
108 } else if (tqp_vectors->rx_group.ring) {
109 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
110 "%s-%s-%d", priv->netdev->name, "Rx",
111 rx_int_idx++);
112 } else if (tqp_vectors->tx_group.ring) {
113 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
114 "%s-%s-%d", priv->netdev->name, "Tx",
115 tx_int_idx++);
116 } else {
117 /* Skip this unused q_vector */
118 continue;
119 }
120
121 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
122
123 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
124 tqp_vectors->name,
125 tqp_vectors);
126 if (ret) {
127 netdev_err(priv->netdev, "request irq(%d) fail\n",
128 tqp_vectors->vector_irq);
129 return ret;
130 }
131
132 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
133 }
134
135 return 0;
136}
137
138static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
139 u32 mask_en)
140{
141 writel(mask_en, tqp_vector->mask_addr);
142}
143
144static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
145{
146 napi_enable(&tqp_vector->napi);
147
148 /* enable vector */
149 hns3_mask_vector_irq(tqp_vector, 1);
150}
151
152static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
153{
154 /* disable vector */
155 hns3_mask_vector_irq(tqp_vector, 0);
156
157 disable_irq(tqp_vector->vector_irq);
158 napi_disable(&tqp_vector->napi);
159}
160
Fuyun Liang434776a2018-01-12 16:23:10 +0800161void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
162 u32 rl_value)
Salil76ad4f02017-08-02 16:59:45 +0100163{
Fuyun Liang434776a2018-01-12 16:23:10 +0800164 u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
165
Salil76ad4f02017-08-02 16:59:45 +0100166 /* this defines the configuration for RL (Interrupt Rate Limiter).
167 * Rl defines rate of interrupts i.e. number of interrupts-per-second
168 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
169 */
Fuyun Liang434776a2018-01-12 16:23:10 +0800170
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800171 if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
172 !tqp_vector->rx_group.coal.gl_adapt_enable)
Fuyun Liang434776a2018-01-12 16:23:10 +0800173 /* According to the hardware, the range of rl_reg is
174 * 0-59 and the unit is 4.
175 */
176 rl_reg |= HNS3_INT_RL_ENABLE_MASK;
177
178 writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
179}
180
181void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
182 u32 gl_value)
183{
184 u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
185
186 writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
187}
188
189void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
190 u32 gl_value)
191{
192 u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
193
194 writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
Salil76ad4f02017-08-02 16:59:45 +0100195}
196
Fuyun Liang5fd47892018-01-12 16:23:11 +0800197static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
198 struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +0100199{
Fuyun Liang5fd47892018-01-12 16:23:11 +0800200 struct hnae3_handle *h = priv->ae_handle;
201
Salil76ad4f02017-08-02 16:59:45 +0100202 /* initialize the configuration for interrupt coalescing.
203 * 1. GL (Interrupt Gap Limiter)
204 * 2. RL (Interrupt Rate Limiter)
205 */
206
Fuyun Liang5fd47892018-01-12 16:23:11 +0800207 /* Default: enable interrupt coalescing self-adaptive and GL */
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800208 tqp_vector->tx_group.coal.gl_adapt_enable = 1;
209 tqp_vector->rx_group.coal.gl_adapt_enable = 1;
Fuyun Liang5fd47892018-01-12 16:23:11 +0800210
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800211 tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
212 tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
Fuyun Liang5fd47892018-01-12 16:23:11 +0800213
Yunsheng Lindd38c722018-03-09 10:37:02 +0800214 /* Default: disable RL */
215 h->kinfo.int_rl_setting = 0;
216
Fuyun Liangcd9d1872018-03-21 15:49:25 +0800217 tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800218 tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
219 tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
Yunsheng Lindd38c722018-03-09 10:37:02 +0800220}
221
222static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
223 struct hns3_nic_priv *priv)
224{
225 struct hnae3_handle *h = priv->ae_handle;
226
Fuyun Liang5fd47892018-01-12 16:23:11 +0800227 hns3_set_vector_coalesce_tx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800228 tqp_vector->tx_group.coal.int_gl);
Fuyun Liang5fd47892018-01-12 16:23:11 +0800229 hns3_set_vector_coalesce_rx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800230 tqp_vector->rx_group.coal.int_gl);
Fuyun Liang5fd47892018-01-12 16:23:11 +0800231 hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
Salil76ad4f02017-08-02 16:59:45 +0100232}
233
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800234static int hns3_nic_set_real_num_queue(struct net_device *netdev)
235{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800236 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800237 struct hnae3_knic_private_info *kinfo = &h->kinfo;
238 unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
239 int ret;
240
241 ret = netif_set_real_num_tx_queues(netdev, queue_size);
242 if (ret) {
243 netdev_err(netdev,
244 "netif_set_real_num_tx_queues fail, ret=%d!\n",
245 ret);
246 return ret;
247 }
248
249 ret = netif_set_real_num_rx_queues(netdev, queue_size);
250 if (ret) {
251 netdev_err(netdev,
252 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
253 return ret;
254 }
255
256 return 0;
257}
258
Peng Li678335a12018-03-08 19:41:54 +0800259static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
260{
261 u16 free_tqps, max_rss_size, max_tqps;
262
263 h->ae_algo->ops->get_tqps_and_rss_info(h, &free_tqps, &max_rss_size);
264 max_tqps = h->kinfo.num_tc * max_rss_size;
265
266 return min_t(u16, max_tqps, (free_tqps + h->kinfo.num_tqps));
267}
268
Salil76ad4f02017-08-02 16:59:45 +0100269static int hns3_nic_net_up(struct net_device *netdev)
270{
271 struct hns3_nic_priv *priv = netdev_priv(netdev);
272 struct hnae3_handle *h = priv->ae_handle;
273 int i, j;
274 int ret;
275
276 /* get irq resource for all vectors */
277 ret = hns3_nic_init_irq(priv);
278 if (ret) {
279 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
280 return ret;
281 }
282
283 /* enable the vectors */
284 for (i = 0; i < priv->vector_num; i++)
285 hns3_vector_enable(&priv->tqp_vector[i]);
286
287 /* start the ae_dev */
288 ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
289 if (ret)
290 goto out_start_err;
291
Jian Shenb875cc32018-01-05 18:18:11 +0800292 clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
293
Salil76ad4f02017-08-02 16:59:45 +0100294 return 0;
295
296out_start_err:
297 for (j = i - 1; j >= 0; j--)
298 hns3_vector_disable(&priv->tqp_vector[j]);
299
300 hns3_nic_uninit_irq(priv);
301
302 return ret;
303}
304
305static int hns3_nic_net_open(struct net_device *netdev)
306{
Lipengf8fa222c2017-11-02 20:45:20 +0800307 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100308 int ret;
309
310 netif_carrier_off(netdev);
311
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800312 ret = hns3_nic_set_real_num_queue(netdev);
313 if (ret)
Salil76ad4f02017-08-02 16:59:45 +0100314 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100315
316 ret = hns3_nic_net_up(netdev);
317 if (ret) {
318 netdev_err(netdev,
319 "hns net up fail, ret=%d!\n", ret);
320 return ret;
321 }
322
Lipengf8fa222c2017-11-02 20:45:20 +0800323 priv->last_reset_time = jiffies;
Salil76ad4f02017-08-02 16:59:45 +0100324 return 0;
325}
326
327static void hns3_nic_net_down(struct net_device *netdev)
328{
329 struct hns3_nic_priv *priv = netdev_priv(netdev);
330 const struct hnae3_ae_ops *ops;
331 int i;
332
Jian Shenb875cc32018-01-05 18:18:11 +0800333 if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
334 return;
335
Salil76ad4f02017-08-02 16:59:45 +0100336 /* stop ae_dev */
337 ops = priv->ae_handle->ae_algo->ops;
338 if (ops->stop)
339 ops->stop(priv->ae_handle);
340
341 /* disable vectors */
342 for (i = 0; i < priv->vector_num; i++)
343 hns3_vector_disable(&priv->tqp_vector[i]);
344
345 /* free irq resources */
346 hns3_nic_uninit_irq(priv);
347}
348
349static int hns3_nic_net_stop(struct net_device *netdev)
350{
351 netif_tx_stop_all_queues(netdev);
352 netif_carrier_off(netdev);
353
354 hns3_nic_net_down(netdev);
355
356 return 0;
357}
358
Salil76ad4f02017-08-02 16:59:45 +0100359static int hns3_nic_uc_sync(struct net_device *netdev,
360 const unsigned char *addr)
361{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800362 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100363
364 if (h->ae_algo->ops->add_uc_addr)
365 return h->ae_algo->ops->add_uc_addr(h, addr);
366
367 return 0;
368}
369
370static int hns3_nic_uc_unsync(struct net_device *netdev,
371 const unsigned char *addr)
372{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800373 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100374
375 if (h->ae_algo->ops->rm_uc_addr)
376 return h->ae_algo->ops->rm_uc_addr(h, addr);
377
378 return 0;
379}
380
381static int hns3_nic_mc_sync(struct net_device *netdev,
382 const unsigned char *addr)
383{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800384 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100385
Dan Carpenter720a8472017-08-10 12:56:14 +0300386 if (h->ae_algo->ops->add_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100387 return h->ae_algo->ops->add_mc_addr(h, addr);
388
389 return 0;
390}
391
392static int hns3_nic_mc_unsync(struct net_device *netdev,
393 const unsigned char *addr)
394{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800395 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100396
Dan Carpenter720a8472017-08-10 12:56:14 +0300397 if (h->ae_algo->ops->rm_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100398 return h->ae_algo->ops->rm_mc_addr(h, addr);
399
400 return 0;
401}
402
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +0800403static void hns3_nic_set_rx_mode(struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +0100404{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800405 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100406
407 if (h->ae_algo->ops->set_promisc_mode) {
408 if (netdev->flags & IFF_PROMISC)
409 h->ae_algo->ops->set_promisc_mode(h, 1);
410 else
411 h->ae_algo->ops->set_promisc_mode(h, 0);
412 }
413 if (__dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync))
414 netdev_err(netdev, "sync uc address fail\n");
415 if (netdev->flags & IFF_MULTICAST)
416 if (__dev_mc_sync(netdev, hns3_nic_mc_sync, hns3_nic_mc_unsync))
417 netdev_err(netdev, "sync mc address fail\n");
418}
419
420static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
421 u16 *mss, u32 *type_cs_vlan_tso)
422{
423 u32 l4_offset, hdr_len;
424 union l3_hdr_info l3;
425 union l4_hdr_info l4;
426 u32 l4_paylen;
427 int ret;
428
429 if (!skb_is_gso(skb))
430 return 0;
431
432 ret = skb_cow_head(skb, 0);
433 if (ret)
434 return ret;
435
436 l3.hdr = skb_network_header(skb);
437 l4.hdr = skb_transport_header(skb);
438
439 /* Software should clear the IPv4's checksum field when tso is
440 * needed.
441 */
442 if (l3.v4->version == 4)
443 l3.v4->check = 0;
444
445 /* tunnel packet.*/
446 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
447 SKB_GSO_GRE_CSUM |
448 SKB_GSO_UDP_TUNNEL |
449 SKB_GSO_UDP_TUNNEL_CSUM)) {
450 if ((!(skb_shinfo(skb)->gso_type &
451 SKB_GSO_PARTIAL)) &&
452 (skb_shinfo(skb)->gso_type &
453 SKB_GSO_UDP_TUNNEL_CSUM)) {
454 /* Software should clear the udp's checksum
455 * field when tso is needed.
456 */
457 l4.udp->check = 0;
458 }
459 /* reset l3&l4 pointers from outer to inner headers */
460 l3.hdr = skb_inner_network_header(skb);
461 l4.hdr = skb_inner_transport_header(skb);
462
463 /* Software should clear the IPv4's checksum field when
464 * tso is needed.
465 */
466 if (l3.v4->version == 4)
467 l3.v4->check = 0;
468 }
469
470 /* normal or tunnel packet*/
471 l4_offset = l4.hdr - skb->data;
472 hdr_len = (l4.tcp->doff * 4) + l4_offset;
473
474 /* remove payload length from inner pseudo checksum when tso*/
475 l4_paylen = skb->len - l4_offset;
476 csum_replace_by_diff(&l4.tcp->check,
477 (__force __wsum)htonl(l4_paylen));
478
479 /* find the txbd field values */
480 *paylen = skb->len - hdr_len;
481 hnae_set_bit(*type_cs_vlan_tso,
482 HNS3_TXD_TSO_B, 1);
483
484 /* get MSS for TSO */
485 *mss = skb_shinfo(skb)->gso_size;
486
487 return 0;
488}
489
Salil1898d4e2017-08-18 12:31:39 +0100490static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
491 u8 *il4_proto)
Salil76ad4f02017-08-02 16:59:45 +0100492{
493 union {
494 struct iphdr *v4;
495 struct ipv6hdr *v6;
496 unsigned char *hdr;
497 } l3;
498 unsigned char *l4_hdr;
499 unsigned char *exthdr;
500 u8 l4_proto_tmp;
501 __be16 frag_off;
502
503 /* find outer header point */
504 l3.hdr = skb_network_header(skb);
505 l4_hdr = skb_inner_transport_header(skb);
506
507 if (skb->protocol == htons(ETH_P_IPV6)) {
508 exthdr = l3.hdr + sizeof(*l3.v6);
509 l4_proto_tmp = l3.v6->nexthdr;
510 if (l4_hdr != exthdr)
511 ipv6_skip_exthdr(skb, exthdr - skb->data,
512 &l4_proto_tmp, &frag_off);
513 } else if (skb->protocol == htons(ETH_P_IP)) {
514 l4_proto_tmp = l3.v4->protocol;
Salil1898d4e2017-08-18 12:31:39 +0100515 } else {
516 return -EINVAL;
Salil76ad4f02017-08-02 16:59:45 +0100517 }
518
519 *ol4_proto = l4_proto_tmp;
520
521 /* tunnel packet */
522 if (!skb->encapsulation) {
523 *il4_proto = 0;
Salil1898d4e2017-08-18 12:31:39 +0100524 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100525 }
526
527 /* find inner header point */
528 l3.hdr = skb_inner_network_header(skb);
529 l4_hdr = skb_inner_transport_header(skb);
530
531 if (l3.v6->version == 6) {
532 exthdr = l3.hdr + sizeof(*l3.v6);
533 l4_proto_tmp = l3.v6->nexthdr;
534 if (l4_hdr != exthdr)
535 ipv6_skip_exthdr(skb, exthdr - skb->data,
536 &l4_proto_tmp, &frag_off);
537 } else if (l3.v4->version == 4) {
538 l4_proto_tmp = l3.v4->protocol;
539 }
540
541 *il4_proto = l4_proto_tmp;
Salil1898d4e2017-08-18 12:31:39 +0100542
543 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100544}
545
546static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
547 u8 il4_proto, u32 *type_cs_vlan_tso,
548 u32 *ol_type_vlan_len_msec)
549{
550 union {
551 struct iphdr *v4;
552 struct ipv6hdr *v6;
553 unsigned char *hdr;
554 } l3;
555 union {
556 struct tcphdr *tcp;
557 struct udphdr *udp;
558 struct gre_base_hdr *gre;
559 unsigned char *hdr;
560 } l4;
561 unsigned char *l2_hdr;
562 u8 l4_proto = ol4_proto;
563 u32 ol2_len;
564 u32 ol3_len;
565 u32 ol4_len;
566 u32 l2_len;
567 u32 l3_len;
568
569 l3.hdr = skb_network_header(skb);
570 l4.hdr = skb_transport_header(skb);
571
572 /* compute L2 header size for normal packet, defined in 2 Bytes */
573 l2_len = l3.hdr - skb->data;
574 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
575 HNS3_TXD_L2LEN_S, l2_len >> 1);
576
577 /* tunnel packet*/
578 if (skb->encapsulation) {
579 /* compute OL2 header size, defined in 2 Bytes */
580 ol2_len = l2_len;
581 hnae_set_field(*ol_type_vlan_len_msec,
582 HNS3_TXD_L2LEN_M,
583 HNS3_TXD_L2LEN_S, ol2_len >> 1);
584
585 /* compute OL3 header size, defined in 4 Bytes */
586 ol3_len = l4.hdr - l3.hdr;
587 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_M,
588 HNS3_TXD_L3LEN_S, ol3_len >> 2);
589
590 /* MAC in UDP, MAC in GRE (0x6558)*/
591 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
592 /* switch MAC header ptr from outer to inner header.*/
593 l2_hdr = skb_inner_mac_header(skb);
594
595 /* compute OL4 header size, defined in 4 Bytes. */
596 ol4_len = l2_hdr - l4.hdr;
597 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_M,
598 HNS3_TXD_L4LEN_S, ol4_len >> 2);
599
600 /* switch IP header ptr from outer to inner header */
601 l3.hdr = skb_inner_network_header(skb);
602
603 /* compute inner l2 header size, defined in 2 Bytes. */
604 l2_len = l3.hdr - l2_hdr;
605 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
606 HNS3_TXD_L2LEN_S, l2_len >> 1);
607 } else {
608 /* skb packet types not supported by hardware,
609 * txbd len fild doesn't be filled.
610 */
611 return;
612 }
613
614 /* switch L4 header pointer from outer to inner */
615 l4.hdr = skb_inner_transport_header(skb);
616
617 l4_proto = il4_proto;
618 }
619
620 /* compute inner(/normal) L3 header size, defined in 4 Bytes */
621 l3_len = l4.hdr - l3.hdr;
622 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_M,
623 HNS3_TXD_L3LEN_S, l3_len >> 2);
624
625 /* compute inner(/normal) L4 header size, defined in 4 Bytes */
626 switch (l4_proto) {
627 case IPPROTO_TCP:
628 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
629 HNS3_TXD_L4LEN_S, l4.tcp->doff);
630 break;
631 case IPPROTO_SCTP:
632 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
633 HNS3_TXD_L4LEN_S, (sizeof(struct sctphdr) >> 2));
634 break;
635 case IPPROTO_UDP:
636 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
637 HNS3_TXD_L4LEN_S, (sizeof(struct udphdr) >> 2));
638 break;
639 default:
640 /* skb packet types not supported by hardware,
641 * txbd len fild doesn't be filled.
642 */
643 return;
644 }
645}
646
647static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
648 u8 il4_proto, u32 *type_cs_vlan_tso,
649 u32 *ol_type_vlan_len_msec)
650{
651 union {
652 struct iphdr *v4;
653 struct ipv6hdr *v6;
654 unsigned char *hdr;
655 } l3;
656 u32 l4_proto = ol4_proto;
657
658 l3.hdr = skb_network_header(skb);
659
660 /* define OL3 type and tunnel type(OL4).*/
661 if (skb->encapsulation) {
662 /* define outer network header type.*/
663 if (skb->protocol == htons(ETH_P_IP)) {
664 if (skb_is_gso(skb))
665 hnae_set_field(*ol_type_vlan_len_msec,
666 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
667 HNS3_OL3T_IPV4_CSUM);
668 else
669 hnae_set_field(*ol_type_vlan_len_msec,
670 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
671 HNS3_OL3T_IPV4_NO_CSUM);
672
673 } else if (skb->protocol == htons(ETH_P_IPV6)) {
674 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_M,
675 HNS3_TXD_OL3T_S, HNS3_OL3T_IPV6);
676 }
677
678 /* define tunnel type(OL4).*/
679 switch (l4_proto) {
680 case IPPROTO_UDP:
681 hnae_set_field(*ol_type_vlan_len_msec,
682 HNS3_TXD_TUNTYPE_M,
683 HNS3_TXD_TUNTYPE_S,
684 HNS3_TUN_MAC_IN_UDP);
685 break;
686 case IPPROTO_GRE:
687 hnae_set_field(*ol_type_vlan_len_msec,
688 HNS3_TXD_TUNTYPE_M,
689 HNS3_TXD_TUNTYPE_S,
690 HNS3_TUN_NVGRE);
691 break;
692 default:
693 /* drop the skb tunnel packet if hardware don't support,
694 * because hardware can't calculate csum when TSO.
695 */
696 if (skb_is_gso(skb))
697 return -EDOM;
698
699 /* the stack computes the IP header already,
700 * driver calculate l4 checksum when not TSO.
701 */
702 skb_checksum_help(skb);
703 return 0;
704 }
705
706 l3.hdr = skb_inner_network_header(skb);
707 l4_proto = il4_proto;
708 }
709
710 if (l3.v4->version == 4) {
711 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
712 HNS3_TXD_L3T_S, HNS3_L3T_IPV4);
713
714 /* the stack computes the IP header already, the only time we
715 * need the hardware to recompute it is in the case of TSO.
716 */
717 if (skb_is_gso(skb))
718 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
719
720 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
721 } else if (l3.v6->version == 6) {
722 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
723 HNS3_TXD_L3T_S, HNS3_L3T_IPV6);
724 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
725 }
726
727 switch (l4_proto) {
728 case IPPROTO_TCP:
729 hnae_set_field(*type_cs_vlan_tso,
730 HNS3_TXD_L4T_M,
731 HNS3_TXD_L4T_S,
732 HNS3_L4T_TCP);
733 break;
734 case IPPROTO_UDP:
735 hnae_set_field(*type_cs_vlan_tso,
736 HNS3_TXD_L4T_M,
737 HNS3_TXD_L4T_S,
738 HNS3_L4T_UDP);
739 break;
740 case IPPROTO_SCTP:
741 hnae_set_field(*type_cs_vlan_tso,
742 HNS3_TXD_L4T_M,
743 HNS3_TXD_L4T_S,
744 HNS3_L4T_SCTP);
745 break;
746 default:
747 /* drop the skb tunnel packet if hardware don't support,
748 * because hardware can't calculate csum when TSO.
749 */
750 if (skb_is_gso(skb))
751 return -EDOM;
752
753 /* the stack computes the IP header already,
754 * driver calculate l4 checksum when not TSO.
755 */
756 skb_checksum_help(skb);
757 return 0;
758 }
759
760 return 0;
761}
762
763static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
764{
765 /* Config bd buffer end */
766 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_BDTYPE_M,
767 HNS3_TXD_BDTYPE_M, 0);
768 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
769 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
Lipeng7036d262017-10-24 21:02:09 +0800770 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 0);
Salil76ad4f02017-08-02 16:59:45 +0100771}
772
Peng Li9699cff2017-12-22 12:21:48 +0800773static int hns3_fill_desc_vtags(struct sk_buff *skb,
774 struct hns3_enet_ring *tx_ring,
775 u32 *inner_vlan_flag,
776 u32 *out_vlan_flag,
777 u16 *inner_vtag,
778 u16 *out_vtag)
779{
780#define HNS3_TX_VLAN_PRIO_SHIFT 13
781
782 if (skb->protocol == htons(ETH_P_8021Q) &&
783 !(tx_ring->tqp->handle->kinfo.netdev->features &
784 NETIF_F_HW_VLAN_CTAG_TX)) {
785 /* When HW VLAN acceleration is turned off, and the stack
786 * sets the protocol to 802.1q, the driver just need to
787 * set the protocol to the encapsulated ethertype.
788 */
789 skb->protocol = vlan_get_protocol(skb);
790 return 0;
791 }
792
793 if (skb_vlan_tag_present(skb)) {
794 u16 vlan_tag;
795
796 vlan_tag = skb_vlan_tag_get(skb);
797 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
798
799 /* Based on hw strategy, use out_vtag in two layer tag case,
800 * and use inner_vtag in one tag case.
801 */
802 if (skb->protocol == htons(ETH_P_8021Q)) {
803 hnae_set_bit(*out_vlan_flag, HNS3_TXD_OVLAN_B, 1);
804 *out_vtag = vlan_tag;
805 } else {
806 hnae_set_bit(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
807 *inner_vtag = vlan_tag;
808 }
809 } else if (skb->protocol == htons(ETH_P_8021Q)) {
810 struct vlan_ethhdr *vhdr;
811 int rc;
812
813 rc = skb_cow_head(skb, 0);
814 if (rc < 0)
815 return rc;
816 vhdr = (struct vlan_ethhdr *)skb->data;
817 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
818 << HNS3_TX_VLAN_PRIO_SHIFT);
819 }
820
821 skb->protocol = vlan_get_protocol(skb);
822 return 0;
823}
824
Salil76ad4f02017-08-02 16:59:45 +0100825static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
826 int size, dma_addr_t dma, int frag_end,
827 enum hns_desc_type type)
828{
829 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
830 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
831 u32 ol_type_vlan_len_msec = 0;
832 u16 bdtp_fe_sc_vld_ra_ri = 0;
833 u32 type_cs_vlan_tso = 0;
834 struct sk_buff *skb;
Peng Li9699cff2017-12-22 12:21:48 +0800835 u16 inner_vtag = 0;
836 u16 out_vtag = 0;
Salil76ad4f02017-08-02 16:59:45 +0100837 u32 paylen = 0;
838 u16 mss = 0;
839 __be16 protocol;
840 u8 ol4_proto;
841 u8 il4_proto;
842 int ret;
843
844 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
845 desc_cb->priv = priv;
846 desc_cb->length = size;
847 desc_cb->dma = dma;
848 desc_cb->type = type;
849
850 /* now, fill the descriptor */
851 desc->addr = cpu_to_le64(dma);
852 desc->tx.send_size = cpu_to_le16((u16)size);
853 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
854 desc->tx.bdtp_fe_sc_vld_ra_ri = cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
855
856 if (type == DESC_TYPE_SKB) {
857 skb = (struct sk_buff *)priv;
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800858 paylen = skb->len;
Salil76ad4f02017-08-02 16:59:45 +0100859
Peng Li9699cff2017-12-22 12:21:48 +0800860 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
861 &ol_type_vlan_len_msec,
862 &inner_vtag, &out_vtag);
863 if (unlikely(ret))
864 return ret;
865
Salil76ad4f02017-08-02 16:59:45 +0100866 if (skb->ip_summed == CHECKSUM_PARTIAL) {
867 skb_reset_mac_len(skb);
868 protocol = skb->protocol;
869
Salil1898d4e2017-08-18 12:31:39 +0100870 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
871 if (ret)
872 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100873 hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
874 &type_cs_vlan_tso,
875 &ol_type_vlan_len_msec);
876 ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
877 &type_cs_vlan_tso,
878 &ol_type_vlan_len_msec);
879 if (ret)
880 return ret;
881
882 ret = hns3_set_tso(skb, &paylen, &mss,
883 &type_cs_vlan_tso);
884 if (ret)
885 return ret;
886 }
887
888 /* Set txbd */
889 desc->tx.ol_type_vlan_len_msec =
890 cpu_to_le32(ol_type_vlan_len_msec);
891 desc->tx.type_cs_vlan_tso_len =
892 cpu_to_le32(type_cs_vlan_tso);
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800893 desc->tx.paylen = cpu_to_le32(paylen);
Salil76ad4f02017-08-02 16:59:45 +0100894 desc->tx.mss = cpu_to_le16(mss);
Peng Li9699cff2017-12-22 12:21:48 +0800895 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
896 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
Salil76ad4f02017-08-02 16:59:45 +0100897 }
898
899 /* move ring pointer to next.*/
900 ring_ptr_move_fw(ring, next_to_use);
901
902 return 0;
903}
904
905static int hns3_fill_desc_tso(struct hns3_enet_ring *ring, void *priv,
906 int size, dma_addr_t dma, int frag_end,
907 enum hns_desc_type type)
908{
909 unsigned int frag_buf_num;
910 unsigned int k;
911 int sizeoflast;
912 int ret;
913
914 frag_buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
915 sizeoflast = size % HNS3_MAX_BD_SIZE;
916 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
917
918 /* When the frag size is bigger than hardware, split this frag */
919 for (k = 0; k < frag_buf_num; k++) {
920 ret = hns3_fill_desc(ring, priv,
921 (k == frag_buf_num - 1) ?
922 sizeoflast : HNS3_MAX_BD_SIZE,
923 dma + HNS3_MAX_BD_SIZE * k,
924 frag_end && (k == frag_buf_num - 1) ? 1 : 0,
925 (type == DESC_TYPE_SKB && !k) ?
926 DESC_TYPE_SKB : DESC_TYPE_PAGE);
927 if (ret)
928 return ret;
929 }
930
931 return 0;
932}
933
934static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum,
935 struct hns3_enet_ring *ring)
936{
937 struct sk_buff *skb = *out_skb;
938 struct skb_frag_struct *frag;
939 int bdnum_for_frag;
940 int frag_num;
941 int buf_num;
942 int size;
943 int i;
944
945 size = skb_headlen(skb);
946 buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
947
948 frag_num = skb_shinfo(skb)->nr_frags;
949 for (i = 0; i < frag_num; i++) {
950 frag = &skb_shinfo(skb)->frags[i];
951 size = skb_frag_size(frag);
952 bdnum_for_frag =
953 (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
954 if (bdnum_for_frag > HNS3_MAX_BD_PER_FRAG)
955 return -ENOMEM;
956
957 buf_num += bdnum_for_frag;
958 }
959
960 if (buf_num > ring_space(ring))
961 return -EBUSY;
962
963 *bnum = buf_num;
964 return 0;
965}
966
967static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum,
968 struct hns3_enet_ring *ring)
969{
970 struct sk_buff *skb = *out_skb;
971 int buf_num;
972
973 /* No. of segments (plus a header) */
974 buf_num = skb_shinfo(skb)->nr_frags + 1;
975
976 if (buf_num > ring_space(ring))
977 return -EBUSY;
978
979 *bnum = buf_num;
980
981 return 0;
982}
983
984static void hns_nic_dma_unmap(struct hns3_enet_ring *ring, int next_to_use_orig)
985{
986 struct device *dev = ring_to_dev(ring);
987 unsigned int i;
988
989 for (i = 0; i < ring->desc_num; i++) {
990 /* check if this is where we started */
991 if (ring->next_to_use == next_to_use_orig)
992 break;
993
994 /* unmap the descriptor dma address */
995 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
996 dma_unmap_single(dev,
997 ring->desc_cb[ring->next_to_use].dma,
998 ring->desc_cb[ring->next_to_use].length,
999 DMA_TO_DEVICE);
1000 else
1001 dma_unmap_page(dev,
1002 ring->desc_cb[ring->next_to_use].dma,
1003 ring->desc_cb[ring->next_to_use].length,
1004 DMA_TO_DEVICE);
1005
1006 /* rollback one */
1007 ring_ptr_move_bw(ring, next_to_use);
1008 }
1009}
1010
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08001011netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +01001012{
1013 struct hns3_nic_priv *priv = netdev_priv(netdev);
1014 struct hns3_nic_ring_data *ring_data =
1015 &tx_ring_data(priv, skb->queue_mapping);
1016 struct hns3_enet_ring *ring = ring_data->ring;
1017 struct device *dev = priv->dev;
1018 struct netdev_queue *dev_queue;
1019 struct skb_frag_struct *frag;
1020 int next_to_use_head;
1021 int next_to_use_frag;
1022 dma_addr_t dma;
1023 int buf_num;
1024 int seg_num;
1025 int size;
1026 int ret;
1027 int i;
1028
1029 /* Prefetch the data used later */
1030 prefetch(skb->data);
1031
1032 switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
1033 case -EBUSY:
1034 u64_stats_update_begin(&ring->syncp);
1035 ring->stats.tx_busy++;
1036 u64_stats_update_end(&ring->syncp);
1037
1038 goto out_net_tx_busy;
1039 case -ENOMEM:
1040 u64_stats_update_begin(&ring->syncp);
1041 ring->stats.sw_err_cnt++;
1042 u64_stats_update_end(&ring->syncp);
1043 netdev_err(netdev, "no memory to xmit!\n");
1044
1045 goto out_err_tx_ok;
1046 default:
1047 break;
1048 }
1049
1050 /* No. of segments (plus a header) */
1051 seg_num = skb_shinfo(skb)->nr_frags + 1;
1052 /* Fill the first part */
1053 size = skb_headlen(skb);
1054
1055 next_to_use_head = ring->next_to_use;
1056
1057 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1058 if (dma_mapping_error(dev, dma)) {
1059 netdev_err(netdev, "TX head DMA map failed\n");
1060 ring->stats.sw_err_cnt++;
1061 goto out_err_tx_ok;
1062 }
1063
1064 ret = priv->ops.fill_desc(ring, skb, size, dma, seg_num == 1 ? 1 : 0,
1065 DESC_TYPE_SKB);
1066 if (ret)
1067 goto head_dma_map_err;
1068
1069 next_to_use_frag = ring->next_to_use;
1070 /* Fill the fragments */
1071 for (i = 1; i < seg_num; i++) {
1072 frag = &skb_shinfo(skb)->frags[i - 1];
1073 size = skb_frag_size(frag);
1074 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1075 if (dma_mapping_error(dev, dma)) {
1076 netdev_err(netdev, "TX frag(%d) DMA map failed\n", i);
1077 ring->stats.sw_err_cnt++;
1078 goto frag_dma_map_err;
1079 }
1080 ret = priv->ops.fill_desc(ring, skb_frag_page(frag), size, dma,
1081 seg_num - 1 == i ? 1 : 0,
1082 DESC_TYPE_PAGE);
1083
1084 if (ret)
1085 goto frag_dma_map_err;
1086 }
1087
1088 /* Complete translate all packets */
1089 dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1090 netdev_tx_sent_queue(dev_queue, skb->len);
1091
1092 wmb(); /* Commit all data before submit */
1093
1094 hnae_queue_xmit(ring->tqp, buf_num);
1095
1096 return NETDEV_TX_OK;
1097
1098frag_dma_map_err:
1099 hns_nic_dma_unmap(ring, next_to_use_frag);
1100
1101head_dma_map_err:
1102 hns_nic_dma_unmap(ring, next_to_use_head);
1103
1104out_err_tx_ok:
1105 dev_kfree_skb_any(skb);
1106 return NETDEV_TX_OK;
1107
1108out_net_tx_busy:
1109 netif_stop_subqueue(netdev, ring_data->queue_index);
1110 smp_mb(); /* Commit all data before submit */
1111
1112 return NETDEV_TX_BUSY;
1113}
1114
1115static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1116{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001117 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001118 struct sockaddr *mac_addr = p;
1119 int ret;
1120
1121 if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1122 return -EADDRNOTAVAIL;
1123
Fuyun Liang590980552018-03-10 11:29:22 +08001124 ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
Salil76ad4f02017-08-02 16:59:45 +01001125 if (ret) {
1126 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1127 return ret;
1128 }
1129
1130 ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1131
1132 return 0;
1133}
1134
1135static int hns3_nic_set_features(struct net_device *netdev,
1136 netdev_features_t features)
1137{
Jian Shen181d4542018-01-12 16:23:16 +08001138 netdev_features_t changed = netdev->features ^ features;
Salil76ad4f02017-08-02 16:59:45 +01001139 struct hns3_nic_priv *priv = netdev_priv(netdev);
Peng Li052ece62017-12-22 12:21:47 +08001140 struct hnae3_handle *h = priv->ae_handle;
Peng Li052ece62017-12-22 12:21:47 +08001141 int ret;
Salil76ad4f02017-08-02 16:59:45 +01001142
Jian Shen181d4542018-01-12 16:23:16 +08001143 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) {
1144 if (features & (NETIF_F_TSO | NETIF_F_TSO6)) {
1145 priv->ops.fill_desc = hns3_fill_desc_tso;
1146 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
1147 } else {
1148 priv->ops.fill_desc = hns3_fill_desc;
1149 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
1150 }
Salil76ad4f02017-08-02 16:59:45 +01001151 }
1152
Jian Shenbd368412018-01-12 16:23:17 +08001153 if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1154 h->ae_algo->ops->enable_vlan_filter) {
Jian Shen181d4542018-01-12 16:23:16 +08001155 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
1156 h->ae_algo->ops->enable_vlan_filter(h, true);
1157 else
1158 h->ae_algo->ops->enable_vlan_filter(h, false);
1159 }
Jian Shen391b5e92018-01-05 18:18:05 +08001160
Jian Shenbd368412018-01-12 16:23:17 +08001161 if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1162 h->ae_algo->ops->enable_hw_strip_rxvtag) {
Peng Li052ece62017-12-22 12:21:47 +08001163 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1164 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, true);
1165 else
1166 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, false);
1167
1168 if (ret)
1169 return ret;
1170 }
1171
Salil76ad4f02017-08-02 16:59:45 +01001172 netdev->features = features;
1173 return 0;
1174}
1175
Peng Li6c88d9d2018-01-09 14:50:59 +08001176static void hns3_nic_get_stats64(struct net_device *netdev,
1177 struct rtnl_link_stats64 *stats)
Salil76ad4f02017-08-02 16:59:45 +01001178{
1179 struct hns3_nic_priv *priv = netdev_priv(netdev);
1180 int queue_num = priv->ae_handle->kinfo.num_tqps;
Jian Shenc5f65482018-01-05 18:18:10 +08001181 struct hnae3_handle *handle = priv->ae_handle;
Salil76ad4f02017-08-02 16:59:45 +01001182 struct hns3_enet_ring *ring;
1183 unsigned int start;
1184 unsigned int idx;
1185 u64 tx_bytes = 0;
1186 u64 rx_bytes = 0;
1187 u64 tx_pkts = 0;
1188 u64 rx_pkts = 0;
Jian Shend2a5dca2018-01-05 18:18:12 +08001189 u64 tx_drop = 0;
1190 u64 rx_drop = 0;
Salil76ad4f02017-08-02 16:59:45 +01001191
Jian Shenb875cc32018-01-05 18:18:11 +08001192 if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1193 return;
1194
Jian Shenc5f65482018-01-05 18:18:10 +08001195 handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1196
Salil76ad4f02017-08-02 16:59:45 +01001197 for (idx = 0; idx < queue_num; idx++) {
1198 /* fetch the tx stats */
1199 ring = priv->ring_data[idx].ring;
1200 do {
Salild36d36c2017-08-18 12:31:37 +01001201 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001202 tx_bytes += ring->stats.tx_bytes;
1203 tx_pkts += ring->stats.tx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001204 tx_drop += ring->stats.tx_busy;
1205 tx_drop += ring->stats.sw_err_cnt;
Salil76ad4f02017-08-02 16:59:45 +01001206 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1207
1208 /* fetch the rx stats */
1209 ring = priv->ring_data[idx + queue_num].ring;
1210 do {
Salild36d36c2017-08-18 12:31:37 +01001211 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001212 rx_bytes += ring->stats.rx_bytes;
1213 rx_pkts += ring->stats.rx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001214 rx_drop += ring->stats.non_vld_descs;
1215 rx_drop += ring->stats.err_pkt_len;
1216 rx_drop += ring->stats.l2_err;
Salil76ad4f02017-08-02 16:59:45 +01001217 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1218 }
1219
1220 stats->tx_bytes = tx_bytes;
1221 stats->tx_packets = tx_pkts;
1222 stats->rx_bytes = rx_bytes;
1223 stats->rx_packets = rx_pkts;
1224
1225 stats->rx_errors = netdev->stats.rx_errors;
1226 stats->multicast = netdev->stats.multicast;
1227 stats->rx_length_errors = netdev->stats.rx_length_errors;
1228 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
1229 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1230
1231 stats->tx_errors = netdev->stats.tx_errors;
Jian Shend2a5dca2018-01-05 18:18:12 +08001232 stats->rx_dropped = rx_drop + netdev->stats.rx_dropped;
1233 stats->tx_dropped = tx_drop + netdev->stats.tx_dropped;
Salil76ad4f02017-08-02 16:59:45 +01001234 stats->collisions = netdev->stats.collisions;
1235 stats->rx_over_errors = netdev->stats.rx_over_errors;
1236 stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1237 stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1238 stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1239 stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1240 stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1241 stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1242 stats->tx_window_errors = netdev->stats.tx_window_errors;
1243 stats->rx_compressed = netdev->stats.rx_compressed;
1244 stats->tx_compressed = netdev->stats.tx_compressed;
1245}
1246
1247static void hns3_add_tunnel_port(struct net_device *netdev, u16 port,
1248 enum hns3_udp_tnl_type type)
1249{
1250 struct hns3_nic_priv *priv = netdev_priv(netdev);
1251 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1252 struct hnae3_handle *h = priv->ae_handle;
1253
1254 if (udp_tnl->used && udp_tnl->dst_port == port) {
1255 udp_tnl->used++;
1256 return;
1257 }
1258
1259 if (udp_tnl->used) {
1260 netdev_warn(netdev,
1261 "UDP tunnel [%d], port [%d] offload\n", type, port);
1262 return;
1263 }
1264
1265 udp_tnl->dst_port = port;
1266 udp_tnl->used = 1;
1267 /* TBD send command to hardware to add port */
1268 if (h->ae_algo->ops->add_tunnel_udp)
1269 h->ae_algo->ops->add_tunnel_udp(h, port);
1270}
1271
1272static void hns3_del_tunnel_port(struct net_device *netdev, u16 port,
1273 enum hns3_udp_tnl_type type)
1274{
1275 struct hns3_nic_priv *priv = netdev_priv(netdev);
1276 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1277 struct hnae3_handle *h = priv->ae_handle;
1278
1279 if (!udp_tnl->used || udp_tnl->dst_port != port) {
1280 netdev_warn(netdev,
1281 "Invalid UDP tunnel port %d\n", port);
1282 return;
1283 }
1284
1285 udp_tnl->used--;
1286 if (udp_tnl->used)
1287 return;
1288
1289 udp_tnl->dst_port = 0;
1290 /* TBD send command to hardware to del port */
1291 if (h->ae_algo->ops->del_tunnel_udp)
Dan Carpenter9537e7c2017-08-10 12:54:59 +03001292 h->ae_algo->ops->del_tunnel_udp(h, port);
Salil76ad4f02017-08-02 16:59:45 +01001293}
1294
1295/* hns3_nic_udp_tunnel_add - Get notifiacetion about UDP tunnel ports
1296 * @netdev: This physical ports's netdev
1297 * @ti: Tunnel information
1298 */
1299static void hns3_nic_udp_tunnel_add(struct net_device *netdev,
1300 struct udp_tunnel_info *ti)
1301{
1302 u16 port_n = ntohs(ti->port);
1303
1304 switch (ti->type) {
1305 case UDP_TUNNEL_TYPE_VXLAN:
1306 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1307 break;
1308 case UDP_TUNNEL_TYPE_GENEVE:
1309 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1310 break;
1311 default:
1312 netdev_err(netdev, "unsupported tunnel type %d\n", ti->type);
1313 break;
1314 }
1315}
1316
1317static void hns3_nic_udp_tunnel_del(struct net_device *netdev,
1318 struct udp_tunnel_info *ti)
1319{
1320 u16 port_n = ntohs(ti->port);
1321
1322 switch (ti->type) {
1323 case UDP_TUNNEL_TYPE_VXLAN:
1324 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1325 break;
1326 case UDP_TUNNEL_TYPE_GENEVE:
1327 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1328 break;
1329 default:
1330 break;
1331 }
1332}
1333
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001334static int hns3_setup_tc(struct net_device *netdev, void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001335{
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001336 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001337 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001338 struct hnae3_knic_private_info *kinfo = &h->kinfo;
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001339 u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1340 u8 tc = mqprio_qopt->qopt.num_tc;
1341 u16 mode = mqprio_qopt->mode;
1342 u8 hw = mqprio_qopt->qopt.hw;
1343 bool if_running;
Salil76ad4f02017-08-02 16:59:45 +01001344 unsigned int i;
1345 int ret;
1346
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001347 if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1348 mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1349 return -EOPNOTSUPP;
1350
Salil76ad4f02017-08-02 16:59:45 +01001351 if (tc > HNAE3_MAX_TC)
1352 return -EINVAL;
1353
Salil76ad4f02017-08-02 16:59:45 +01001354 if (!netdev)
1355 return -EINVAL;
1356
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001357 if_running = netif_running(netdev);
1358 if (if_running) {
1359 hns3_nic_net_stop(netdev);
1360 msleep(100);
Salil76ad4f02017-08-02 16:59:45 +01001361 }
1362
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001363 ret = (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1364 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001365 if (ret)
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001366 goto out;
Salil76ad4f02017-08-02 16:59:45 +01001367
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001368 if (tc <= 1) {
1369 netdev_reset_tc(netdev);
1370 } else {
1371 ret = netdev_set_num_tc(netdev, tc);
1372 if (ret)
1373 goto out;
1374
1375 for (i = 0; i < HNAE3_MAX_TC; i++) {
1376 if (!kinfo->tc_info[i].enable)
1377 continue;
1378
Salil76ad4f02017-08-02 16:59:45 +01001379 netdev_set_tc_queue(netdev,
1380 kinfo->tc_info[i].tc,
1381 kinfo->tc_info[i].tqp_count,
1382 kinfo->tc_info[i].tqp_offset);
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001383 }
Salil76ad4f02017-08-02 16:59:45 +01001384 }
1385
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001386 ret = hns3_nic_set_real_num_queue(netdev);
1387
1388out:
1389 if (if_running)
1390 hns3_nic_net_open(netdev);
1391
1392 return ret;
Salil76ad4f02017-08-02 16:59:45 +01001393}
1394
Jiri Pirko2572ac52017-08-07 10:15:17 +02001395static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
Jiri Pirkode4784c2017-08-07 10:15:32 +02001396 void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001397{
Nogah Frankel575ed7d2017-11-06 07:23:42 +01001398 if (type != TC_SETUP_QDISC_MQPRIO)
Jiri Pirko38cf0422017-08-07 10:15:31 +02001399 return -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001400
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001401 return hns3_setup_tc(dev, type_data);
Salil76ad4f02017-08-02 16:59:45 +01001402}
1403
1404static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1405 __be16 proto, u16 vid)
1406{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001407 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin681ec392018-03-21 15:49:22 +08001408 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001409 int ret = -EIO;
1410
1411 if (h->ae_algo->ops->set_vlan_filter)
1412 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1413
Yunsheng Lin681ec392018-03-21 15:49:22 +08001414 if (!ret)
1415 set_bit(vid, priv->active_vlans);
1416
Salil76ad4f02017-08-02 16:59:45 +01001417 return ret;
1418}
1419
1420static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1421 __be16 proto, u16 vid)
1422{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001423 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin681ec392018-03-21 15:49:22 +08001424 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001425 int ret = -EIO;
1426
1427 if (h->ae_algo->ops->set_vlan_filter)
1428 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1429
Yunsheng Lin681ec392018-03-21 15:49:22 +08001430 if (!ret)
1431 clear_bit(vid, priv->active_vlans);
1432
Salil76ad4f02017-08-02 16:59:45 +01001433 return ret;
1434}
1435
Yunsheng Lin681ec392018-03-21 15:49:22 +08001436static void hns3_restore_vlan(struct net_device *netdev)
1437{
1438 struct hns3_nic_priv *priv = netdev_priv(netdev);
1439 u16 vid;
1440 int ret;
1441
1442 for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) {
1443 ret = hns3_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
1444 if (ret)
1445 netdev_warn(netdev, "Restore vlan: %d filter, ret:%d\n",
1446 vid, ret);
1447 }
1448}
1449
Salil76ad4f02017-08-02 16:59:45 +01001450static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1451 u8 qos, __be16 vlan_proto)
1452{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001453 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001454 int ret = -EIO;
1455
1456 if (h->ae_algo->ops->set_vf_vlan_filter)
1457 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1458 qos, vlan_proto);
1459
1460 return ret;
1461}
1462
Salila8e8b7f2017-08-21 17:05:24 +01001463static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1464{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001465 struct hnae3_handle *h = hns3_get_handle(netdev);
Salila8e8b7f2017-08-21 17:05:24 +01001466 bool if_running = netif_running(netdev);
1467 int ret;
1468
1469 if (!h->ae_algo->ops->set_mtu)
1470 return -EOPNOTSUPP;
1471
1472 /* if this was called with netdev up then bring netdevice down */
1473 if (if_running) {
1474 (void)hns3_nic_net_stop(netdev);
1475 msleep(100);
1476 }
1477
1478 ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1479 if (ret) {
1480 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1481 ret);
1482 return ret;
1483 }
1484
Fuyun Liang5bad95a2018-01-05 18:18:20 +08001485 netdev->mtu = new_mtu;
1486
Salila8e8b7f2017-08-21 17:05:24 +01001487 /* if the netdev was running earlier, bring it up again */
1488 if (if_running && hns3_nic_net_open(netdev))
1489 ret = -EINVAL;
1490
1491 return ret;
1492}
1493
Lipengf8fa222c2017-11-02 20:45:20 +08001494static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1495{
1496 struct hns3_nic_priv *priv = netdev_priv(ndev);
1497 struct hns3_enet_ring *tx_ring = NULL;
1498 int timeout_queue = 0;
1499 int hw_head, hw_tail;
1500 int i;
1501
1502 /* Find the stopped queue the same way the stack does */
1503 for (i = 0; i < ndev->real_num_tx_queues; i++) {
1504 struct netdev_queue *q;
1505 unsigned long trans_start;
1506
1507 q = netdev_get_tx_queue(ndev, i);
1508 trans_start = q->trans_start;
1509 if (netif_xmit_stopped(q) &&
1510 time_after(jiffies,
1511 (trans_start + ndev->watchdog_timeo))) {
1512 timeout_queue = i;
1513 break;
1514 }
1515 }
1516
1517 if (i == ndev->num_tx_queues) {
1518 netdev_info(ndev,
1519 "no netdev TX timeout queue found, timeout count: %llu\n",
1520 priv->tx_timeout_count);
1521 return false;
1522 }
1523
1524 tx_ring = priv->ring_data[timeout_queue].ring;
1525
1526 hw_head = readl_relaxed(tx_ring->tqp->io_base +
1527 HNS3_RING_TX_RING_HEAD_REG);
1528 hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1529 HNS3_RING_TX_RING_TAIL_REG);
1530 netdev_info(ndev,
1531 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, HW_HEAD: 0x%x, HW_TAIL: 0x%x, INT: 0x%x\n",
1532 priv->tx_timeout_count,
1533 timeout_queue,
1534 tx_ring->next_to_use,
1535 tx_ring->next_to_clean,
1536 hw_head,
1537 hw_tail,
1538 readl(tx_ring->tqp_vector->mask_addr));
1539
1540 return true;
1541}
1542
1543static void hns3_nic_net_timeout(struct net_device *ndev)
1544{
1545 struct hns3_nic_priv *priv = netdev_priv(ndev);
1546 unsigned long last_reset_time = priv->last_reset_time;
1547 struct hnae3_handle *h = priv->ae_handle;
1548
1549 if (!hns3_get_tx_timeo_queue_info(ndev))
1550 return;
1551
1552 priv->tx_timeout_count++;
1553
1554 /* This timeout is far away enough from last timeout,
1555 * if timeout again,set the reset type to PF reset
1556 */
1557 if (time_after(jiffies, (last_reset_time + 20 * HZ)))
1558 priv->reset_level = HNAE3_FUNC_RESET;
1559
1560 /* Don't do any new action before the next timeout */
1561 else if (time_before(jiffies, (last_reset_time + ndev->watchdog_timeo)))
1562 return;
1563
1564 priv->last_reset_time = jiffies;
1565
1566 if (h->ae_algo->ops->reset_event)
1567 h->ae_algo->ops->reset_event(h, priv->reset_level);
1568
1569 priv->reset_level++;
1570 if (priv->reset_level > HNAE3_GLOBAL_RESET)
1571 priv->reset_level = HNAE3_GLOBAL_RESET;
1572}
1573
Salil76ad4f02017-08-02 16:59:45 +01001574static const struct net_device_ops hns3_nic_netdev_ops = {
1575 .ndo_open = hns3_nic_net_open,
1576 .ndo_stop = hns3_nic_net_stop,
1577 .ndo_start_xmit = hns3_nic_net_xmit,
Lipengf8fa222c2017-11-02 20:45:20 +08001578 .ndo_tx_timeout = hns3_nic_net_timeout,
Salil76ad4f02017-08-02 16:59:45 +01001579 .ndo_set_mac_address = hns3_nic_net_set_mac_address,
Salila8e8b7f2017-08-21 17:05:24 +01001580 .ndo_change_mtu = hns3_nic_change_mtu,
Salil76ad4f02017-08-02 16:59:45 +01001581 .ndo_set_features = hns3_nic_set_features,
1582 .ndo_get_stats64 = hns3_nic_get_stats64,
1583 .ndo_setup_tc = hns3_nic_setup_tc,
1584 .ndo_set_rx_mode = hns3_nic_set_rx_mode,
1585 .ndo_udp_tunnel_add = hns3_nic_udp_tunnel_add,
1586 .ndo_udp_tunnel_del = hns3_nic_udp_tunnel_del,
1587 .ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid,
1588 .ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid,
1589 .ndo_set_vf_vlan = hns3_ndo_set_vf_vlan,
1590};
1591
1592/* hns3_probe - Device initialization routine
1593 * @pdev: PCI device information struct
1594 * @ent: entry in hns3_pci_tbl
1595 *
1596 * hns3_probe initializes a PF identified by a pci_dev structure.
1597 * The OS initialization, configuring of the PF private structure,
1598 * and a hardware reset occur.
1599 *
1600 * Returns 0 on success, negative on failure
1601 */
1602static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1603{
1604 struct hnae3_ae_dev *ae_dev;
1605 int ret;
1606
1607 ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1608 GFP_KERNEL);
1609 if (!ae_dev) {
1610 ret = -ENOMEM;
1611 return ret;
1612 }
1613
1614 ae_dev->pdev = pdev;
Yunsheng Line92a0842017-09-20 18:52:50 +08001615 ae_dev->flag = ent->driver_data;
Salil76ad4f02017-08-02 16:59:45 +01001616 ae_dev->dev_type = HNAE3_DEV_KNIC;
1617 pci_set_drvdata(pdev, ae_dev);
1618
1619 return hnae3_register_ae_dev(ae_dev);
1620}
1621
1622/* hns3_remove - Device removal routine
1623 * @pdev: PCI device information struct
1624 */
1625static void hns3_remove(struct pci_dev *pdev)
1626{
1627 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1628
1629 hnae3_unregister_ae_dev(ae_dev);
1630
1631 devm_kfree(&pdev->dev, ae_dev);
1632
1633 pci_set_drvdata(pdev, NULL);
1634}
1635
1636static struct pci_driver hns3_driver = {
1637 .name = hns3_driver_name,
1638 .id_table = hns3_pci_tbl,
1639 .probe = hns3_probe,
1640 .remove = hns3_remove,
1641};
1642
1643/* set default feature to hns3 */
1644static void hns3_set_default_feature(struct net_device *netdev)
1645{
Jian Shen391b5e92018-01-05 18:18:05 +08001646 struct hnae3_handle *h = hns3_get_handle(netdev);
1647
Salil76ad4f02017-08-02 16:59:45 +01001648 netdev->priv_flags |= IFF_UNICAST_FLT;
1649
1650 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1651 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1652 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1653 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1654 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1655
1656 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1657
1658 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
1659
1660 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1661 NETIF_F_HW_VLAN_CTAG_FILTER |
Peng Li052ece62017-12-22 12:21:47 +08001662 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
Salil76ad4f02017-08-02 16:59:45 +01001663 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1664 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1665 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1666 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1667
1668 netdev->vlan_features |=
1669 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
1670 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
1671 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1672 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1673 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1674
1675 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
Jian Shen30ba2ab2018-01-05 18:18:06 +08001676 NETIF_F_HW_VLAN_CTAG_TX |
Salil76ad4f02017-08-02 16:59:45 +01001677 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1678 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1679 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1680 NETIF_F_GSO_UDP_TUNNEL_CSUM;
Jian Shen391b5e92018-01-05 18:18:05 +08001681
1682 if (!(h->flags & HNAE3_SUPPORT_VF))
Jian Shen30ba2ab2018-01-05 18:18:06 +08001683 netdev->hw_features |=
1684 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX;
Salil76ad4f02017-08-02 16:59:45 +01001685}
1686
1687static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
1688 struct hns3_desc_cb *cb)
1689{
1690 unsigned int order = hnae_page_order(ring);
1691 struct page *p;
1692
1693 p = dev_alloc_pages(order);
1694 if (!p)
1695 return -ENOMEM;
1696
1697 cb->priv = p;
1698 cb->page_offset = 0;
1699 cb->reuse_flag = 0;
1700 cb->buf = page_address(p);
1701 cb->length = hnae_page_size(ring);
1702 cb->type = DESC_TYPE_PAGE;
1703
Salil76ad4f02017-08-02 16:59:45 +01001704 return 0;
1705}
1706
1707static void hns3_free_buffer(struct hns3_enet_ring *ring,
1708 struct hns3_desc_cb *cb)
1709{
1710 if (cb->type == DESC_TYPE_SKB)
1711 dev_kfree_skb_any((struct sk_buff *)cb->priv);
1712 else if (!HNAE3_IS_TX_RING(ring))
1713 put_page((struct page *)cb->priv);
1714 memset(cb, 0, sizeof(*cb));
1715}
1716
1717static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
1718{
1719 cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
1720 cb->length, ring_to_dma_dir(ring));
1721
1722 if (dma_mapping_error(ring_to_dev(ring), cb->dma))
1723 return -EIO;
1724
1725 return 0;
1726}
1727
1728static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
1729 struct hns3_desc_cb *cb)
1730{
1731 if (cb->type == DESC_TYPE_SKB)
1732 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
1733 ring_to_dma_dir(ring));
1734 else
1735 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
1736 ring_to_dma_dir(ring));
1737}
1738
1739static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
1740{
1741 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
1742 ring->desc[i].addr = 0;
1743}
1744
1745static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
1746{
1747 struct hns3_desc_cb *cb = &ring->desc_cb[i];
1748
1749 if (!ring->desc_cb[i].dma)
1750 return;
1751
1752 hns3_buffer_detach(ring, i);
1753 hns3_free_buffer(ring, cb);
1754}
1755
1756static void hns3_free_buffers(struct hns3_enet_ring *ring)
1757{
1758 int i;
1759
1760 for (i = 0; i < ring->desc_num; i++)
1761 hns3_free_buffer_detach(ring, i);
1762}
1763
1764/* free desc along with its attached buffer */
1765static void hns3_free_desc(struct hns3_enet_ring *ring)
1766{
1767 hns3_free_buffers(ring);
1768
1769 dma_unmap_single(ring_to_dev(ring), ring->desc_dma_addr,
1770 ring->desc_num * sizeof(ring->desc[0]),
1771 DMA_BIDIRECTIONAL);
1772 ring->desc_dma_addr = 0;
1773 kfree(ring->desc);
1774 ring->desc = NULL;
1775}
1776
1777static int hns3_alloc_desc(struct hns3_enet_ring *ring)
1778{
1779 int size = ring->desc_num * sizeof(ring->desc[0]);
1780
1781 ring->desc = kzalloc(size, GFP_KERNEL);
1782 if (!ring->desc)
1783 return -ENOMEM;
1784
1785 ring->desc_dma_addr = dma_map_single(ring_to_dev(ring), ring->desc,
1786 size, DMA_BIDIRECTIONAL);
1787 if (dma_mapping_error(ring_to_dev(ring), ring->desc_dma_addr)) {
1788 ring->desc_dma_addr = 0;
1789 kfree(ring->desc);
1790 ring->desc = NULL;
1791 return -ENOMEM;
1792 }
1793
1794 return 0;
1795}
1796
1797static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
1798 struct hns3_desc_cb *cb)
1799{
1800 int ret;
1801
1802 ret = hns3_alloc_buffer(ring, cb);
1803 if (ret)
1804 goto out;
1805
1806 ret = hns3_map_buffer(ring, cb);
1807 if (ret)
1808 goto out_with_buf;
1809
1810 return 0;
1811
1812out_with_buf:
Lipeng564883b2017-10-23 19:51:02 +08001813 hns3_free_buffer(ring, cb);
Salil76ad4f02017-08-02 16:59:45 +01001814out:
1815 return ret;
1816}
1817
1818static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
1819{
1820 int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
1821
1822 if (ret)
1823 return ret;
1824
1825 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1826
1827 return 0;
1828}
1829
1830/* Allocate memory for raw pkg, and map with dma */
1831static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
1832{
1833 int i, j, ret;
1834
1835 for (i = 0; i < ring->desc_num; i++) {
1836 ret = hns3_alloc_buffer_attach(ring, i);
1837 if (ret)
1838 goto out_buffer_fail;
1839 }
1840
1841 return 0;
1842
1843out_buffer_fail:
1844 for (j = i - 1; j >= 0; j--)
1845 hns3_free_buffer_detach(ring, j);
1846 return ret;
1847}
1848
1849/* detach a in-used buffer and replace with a reserved one */
1850static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
1851 struct hns3_desc_cb *res_cb)
1852{
Lipengb9077422017-10-23 19:51:01 +08001853 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
Salil76ad4f02017-08-02 16:59:45 +01001854 ring->desc_cb[i] = *res_cb;
1855 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1856}
1857
1858static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
1859{
1860 ring->desc_cb[i].reuse_flag = 0;
1861 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
1862 + ring->desc_cb[i].page_offset);
1863}
1864
1865static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
1866 int *pkts)
1867{
1868 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
1869
1870 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
1871 (*bytes) += desc_cb->length;
1872 /* desc_cb will be cleaned, after hnae_free_buffer_detach*/
1873 hns3_free_buffer_detach(ring, ring->next_to_clean);
1874
1875 ring_ptr_move_fw(ring, next_to_clean);
1876}
1877
1878static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
1879{
1880 int u = ring->next_to_use;
1881 int c = ring->next_to_clean;
1882
1883 if (unlikely(h > ring->desc_num))
1884 return 0;
1885
1886 return u > c ? (h > c && h <= u) : (h > c || h <= u);
1887}
1888
Lipeng24e750c2017-10-23 19:51:07 +08001889bool hns3_clean_tx_ring(struct hns3_enet_ring *ring, int budget)
Salil76ad4f02017-08-02 16:59:45 +01001890{
1891 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
1892 struct netdev_queue *dev_queue;
1893 int bytes, pkts;
1894 int head;
1895
1896 head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
1897 rmb(); /* Make sure head is ready before touch any data */
1898
1899 if (is_ring_empty(ring) || head == ring->next_to_clean)
Lipeng24e750c2017-10-23 19:51:07 +08001900 return true; /* no data to poll */
Salil76ad4f02017-08-02 16:59:45 +01001901
1902 if (!is_valid_clean_head(ring, head)) {
1903 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
1904 ring->next_to_use, ring->next_to_clean);
1905
1906 u64_stats_update_begin(&ring->syncp);
1907 ring->stats.io_err_cnt++;
1908 u64_stats_update_end(&ring->syncp);
Lipeng24e750c2017-10-23 19:51:07 +08001909 return true;
Salil76ad4f02017-08-02 16:59:45 +01001910 }
1911
1912 bytes = 0;
1913 pkts = 0;
1914 while (head != ring->next_to_clean && budget) {
1915 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
1916 /* Issue prefetch for next Tx descriptor */
1917 prefetch(&ring->desc_cb[ring->next_to_clean]);
1918 budget--;
1919 }
1920
1921 ring->tqp_vector->tx_group.total_bytes += bytes;
1922 ring->tqp_vector->tx_group.total_packets += pkts;
1923
1924 u64_stats_update_begin(&ring->syncp);
1925 ring->stats.tx_bytes += bytes;
1926 ring->stats.tx_pkts += pkts;
1927 u64_stats_update_end(&ring->syncp);
1928
1929 dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
1930 netdev_tx_completed_queue(dev_queue, pkts, bytes);
1931
1932 if (unlikely(pkts && netif_carrier_ok(netdev) &&
1933 (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
1934 /* Make sure that anybody stopping the queue after this
1935 * sees the new next_to_clean.
1936 */
1937 smp_mb();
1938 if (netif_tx_queue_stopped(dev_queue)) {
1939 netif_tx_wake_queue(dev_queue);
1940 ring->stats.restart_queue++;
1941 }
1942 }
1943
1944 return !!budget;
1945}
1946
1947static int hns3_desc_unused(struct hns3_enet_ring *ring)
1948{
1949 int ntc = ring->next_to_clean;
1950 int ntu = ring->next_to_use;
1951
1952 return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
1953}
1954
1955static void
1956hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
1957{
1958 struct hns3_desc_cb *desc_cb;
1959 struct hns3_desc_cb res_cbs;
1960 int i, ret;
1961
1962 for (i = 0; i < cleand_count; i++) {
1963 desc_cb = &ring->desc_cb[ring->next_to_use];
1964 if (desc_cb->reuse_flag) {
1965 u64_stats_update_begin(&ring->syncp);
1966 ring->stats.reuse_pg_cnt++;
1967 u64_stats_update_end(&ring->syncp);
1968
1969 hns3_reuse_buffer(ring, ring->next_to_use);
1970 } else {
1971 ret = hns3_reserve_buffer_map(ring, &res_cbs);
1972 if (ret) {
1973 u64_stats_update_begin(&ring->syncp);
1974 ring->stats.sw_err_cnt++;
1975 u64_stats_update_end(&ring->syncp);
1976
1977 netdev_err(ring->tqp->handle->kinfo.netdev,
1978 "hnae reserve buffer map failed.\n");
1979 break;
1980 }
1981 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
1982 }
1983
1984 ring_ptr_move_fw(ring, next_to_use);
1985 }
1986
1987 wmb(); /* Make all data has been write before submit */
1988 writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
1989}
1990
1991/* hns3_nic_get_headlen - determine size of header for LRO/GRO
1992 * @data: pointer to the start of the headers
1993 * @max: total length of section to find headers in
1994 *
1995 * This function is meant to determine the length of headers that will
1996 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1997 * motivation of doing this is to only perform one pull for IPv4 TCP
1998 * packets so that we can do basic things like calculating the gso_size
1999 * based on the average data per packet.
2000 */
2001static unsigned int hns3_nic_get_headlen(unsigned char *data, u32 flag,
2002 unsigned int max_size)
2003{
2004 unsigned char *network;
2005 u8 hlen;
2006
2007 /* This should never happen, but better safe than sorry */
2008 if (max_size < ETH_HLEN)
2009 return max_size;
2010
2011 /* Initialize network frame pointer */
2012 network = data;
2013
2014 /* Set first protocol and move network header forward */
2015 network += ETH_HLEN;
2016
2017 /* Handle any vlan tag if present */
2018 if (hnae_get_field(flag, HNS3_RXD_VLAN_M, HNS3_RXD_VLAN_S)
2019 == HNS3_RX_FLAG_VLAN_PRESENT) {
2020 if ((typeof(max_size))(network - data) > (max_size - VLAN_HLEN))
2021 return max_size;
2022
2023 network += VLAN_HLEN;
2024 }
2025
2026 /* Handle L3 protocols */
2027 if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
2028 == HNS3_RX_FLAG_L3ID_IPV4) {
2029 if ((typeof(max_size))(network - data) >
2030 (max_size - sizeof(struct iphdr)))
2031 return max_size;
2032
2033 /* Access ihl as a u8 to avoid unaligned access on ia64 */
2034 hlen = (network[0] & 0x0F) << 2;
2035
2036 /* Verify hlen meets minimum size requirements */
2037 if (hlen < sizeof(struct iphdr))
2038 return network - data;
2039
2040 /* Record next protocol if header is present */
2041 } else if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
2042 == HNS3_RX_FLAG_L3ID_IPV6) {
2043 if ((typeof(max_size))(network - data) >
2044 (max_size - sizeof(struct ipv6hdr)))
2045 return max_size;
2046
2047 /* Record next protocol */
2048 hlen = sizeof(struct ipv6hdr);
2049 } else {
2050 return network - data;
2051 }
2052
2053 /* Relocate pointer to start of L4 header */
2054 network += hlen;
2055
2056 /* Finally sort out TCP/UDP */
2057 if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2058 == HNS3_RX_FLAG_L4ID_TCP) {
2059 if ((typeof(max_size))(network - data) >
2060 (max_size - sizeof(struct tcphdr)))
2061 return max_size;
2062
2063 /* Access doff as a u8 to avoid unaligned access on ia64 */
2064 hlen = (network[12] & 0xF0) >> 2;
2065
2066 /* Verify hlen meets minimum size requirements */
2067 if (hlen < sizeof(struct tcphdr))
2068 return network - data;
2069
2070 network += hlen;
2071 } else if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2072 == HNS3_RX_FLAG_L4ID_UDP) {
2073 if ((typeof(max_size))(network - data) >
2074 (max_size - sizeof(struct udphdr)))
2075 return max_size;
2076
2077 network += sizeof(struct udphdr);
2078 }
2079
2080 /* If everything has gone correctly network should be the
2081 * data section of the packet and will be the end of the header.
2082 * If not then it probably represents the end of the last recognized
2083 * header.
2084 */
2085 if ((typeof(max_size))(network - data) < max_size)
2086 return network - data;
2087 else
2088 return max_size;
2089}
2090
2091static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2092 struct hns3_enet_ring *ring, int pull_len,
2093 struct hns3_desc_cb *desc_cb)
2094{
2095 struct hns3_desc *desc;
2096 int truesize, size;
2097 int last_offset;
2098 bool twobufs;
2099
2100 twobufs = ((PAGE_SIZE < 8192) &&
2101 hnae_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2102
2103 desc = &ring->desc[ring->next_to_clean];
2104 size = le16_to_cpu(desc->rx.size);
2105
Peng Lif8d291f2018-03-10 11:29:26 +08002106 truesize = hnae_buf_size(ring);
2107
2108 if (!twobufs)
Salil76ad4f02017-08-02 16:59:45 +01002109 last_offset = hnae_page_size(ring) - hnae_buf_size(ring);
Salil76ad4f02017-08-02 16:59:45 +01002110
2111 skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
Peng Lif8d291f2018-03-10 11:29:26 +08002112 size - pull_len, truesize);
Salil76ad4f02017-08-02 16:59:45 +01002113
2114 /* Avoid re-using remote pages,flag default unreuse */
2115 if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2116 return;
2117
2118 if (twobufs) {
2119 /* If we are only owner of page we can reuse it */
2120 if (likely(page_count(desc_cb->priv) == 1)) {
2121 /* Flip page offset to other buffer */
2122 desc_cb->page_offset ^= truesize;
2123
2124 desc_cb->reuse_flag = 1;
2125 /* bump ref count on page before it is given*/
2126 get_page(desc_cb->priv);
2127 }
2128 return;
2129 }
2130
2131 /* Move offset up to the next cache line */
2132 desc_cb->page_offset += truesize;
2133
2134 if (desc_cb->page_offset <= last_offset) {
2135 desc_cb->reuse_flag = 1;
2136 /* Bump ref count on page before it is given*/
2137 get_page(desc_cb->priv);
2138 }
2139}
2140
2141static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2142 struct hns3_desc *desc)
2143{
2144 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2145 int l3_type, l4_type;
2146 u32 bd_base_info;
2147 int ol4_type;
2148 u32 l234info;
2149
2150 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2151 l234info = le32_to_cpu(desc->rx.l234_info);
2152
2153 skb->ip_summed = CHECKSUM_NONE;
2154
2155 skb_checksum_none_assert(skb);
2156
2157 if (!(netdev->features & NETIF_F_RXCSUM))
2158 return;
2159
2160 /* check if hardware has done checksum */
2161 if (!hnae_get_bit(bd_base_info, HNS3_RXD_L3L4P_B))
2162 return;
2163
2164 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L3E_B) ||
2165 hnae_get_bit(l234info, HNS3_RXD_L4E_B) ||
2166 hnae_get_bit(l234info, HNS3_RXD_OL3E_B) ||
2167 hnae_get_bit(l234info, HNS3_RXD_OL4E_B))) {
2168 netdev_err(netdev, "L3/L4 error pkt\n");
2169 u64_stats_update_begin(&ring->syncp);
2170 ring->stats.l3l4_csum_err++;
2171 u64_stats_update_end(&ring->syncp);
2172
2173 return;
2174 }
2175
2176 l3_type = hnae_get_field(l234info, HNS3_RXD_L3ID_M,
2177 HNS3_RXD_L3ID_S);
2178 l4_type = hnae_get_field(l234info, HNS3_RXD_L4ID_M,
2179 HNS3_RXD_L4ID_S);
2180
2181 ol4_type = hnae_get_field(l234info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S);
2182 switch (ol4_type) {
2183 case HNS3_OL4_TYPE_MAC_IN_UDP:
2184 case HNS3_OL4_TYPE_NVGRE:
2185 skb->csum_level = 1;
2186 case HNS3_OL4_TYPE_NO_TUN:
2187 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2188 if (l3_type == HNS3_L3_TYPE_IPV4 ||
2189 (l3_type == HNS3_L3_TYPE_IPV6 &&
2190 (l4_type == HNS3_L4_TYPE_UDP ||
2191 l4_type == HNS3_L4_TYPE_TCP ||
2192 l4_type == HNS3_L4_TYPE_SCTP)))
2193 skb->ip_summed = CHECKSUM_UNNECESSARY;
2194 break;
2195 }
2196}
2197
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002198static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2199{
2200 napi_gro_receive(&ring->tqp_vector->napi, skb);
2201}
2202
Salil76ad4f02017-08-02 16:59:45 +01002203static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2204 struct sk_buff **out_skb, int *out_bnum)
2205{
2206 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2207 struct hns3_desc_cb *desc_cb;
2208 struct hns3_desc *desc;
2209 struct sk_buff *skb;
2210 unsigned char *va;
2211 u32 bd_base_info;
2212 int pull_len;
2213 u32 l234info;
2214 int length;
2215 int bnum;
2216
2217 desc = &ring->desc[ring->next_to_clean];
2218 desc_cb = &ring->desc_cb[ring->next_to_clean];
2219
2220 prefetch(desc);
2221
2222 length = le16_to_cpu(desc->rx.pkt_len);
2223 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2224 l234info = le32_to_cpu(desc->rx.l234_info);
2225
2226 /* Check valid BD */
2227 if (!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))
2228 return -EFAULT;
2229
2230 va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2231
2232 /* Prefetch first cache line of first page
2233 * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2234 * line size is 64B so need to prefetch twice to make it 128B. But in
2235 * actual we can have greater size of caches with 128B Level 1 cache
2236 * lines. In such a case, single fetch would suffice to cache in the
2237 * relevant part of the header.
2238 */
2239 prefetch(va);
2240#if L1_CACHE_BYTES < 128
2241 prefetch(va + L1_CACHE_BYTES);
2242#endif
2243
2244 skb = *out_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2245 HNS3_RX_HEAD_SIZE);
2246 if (unlikely(!skb)) {
2247 netdev_err(netdev, "alloc rx skb fail\n");
2248
2249 u64_stats_update_begin(&ring->syncp);
2250 ring->stats.sw_err_cnt++;
2251 u64_stats_update_end(&ring->syncp);
2252
2253 return -ENOMEM;
2254 }
2255
2256 prefetchw(skb->data);
2257
Peng Li9699cff2017-12-22 12:21:48 +08002258 /* Based on hw strategy, the tag offloaded will be stored at
2259 * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2260 * in one layer tag case.
2261 */
2262 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2263 u16 vlan_tag;
2264
2265 vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2266 if (!(vlan_tag & VLAN_VID_MASK))
2267 vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2268 if (vlan_tag & VLAN_VID_MASK)
2269 __vlan_hwaccel_put_tag(skb,
2270 htons(ETH_P_8021Q),
2271 vlan_tag);
2272 }
2273
Salil76ad4f02017-08-02 16:59:45 +01002274 bnum = 1;
2275 if (length <= HNS3_RX_HEAD_SIZE) {
2276 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2277
2278 /* We can reuse buffer as-is, just make sure it is local */
2279 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2280 desc_cb->reuse_flag = 1;
2281 else /* This page cannot be reused so discard it */
2282 put_page(desc_cb->priv);
2283
2284 ring_ptr_move_fw(ring, next_to_clean);
2285 } else {
2286 u64_stats_update_begin(&ring->syncp);
2287 ring->stats.seg_pkt_cnt++;
2288 u64_stats_update_end(&ring->syncp);
2289
2290 pull_len = hns3_nic_get_headlen(va, l234info,
2291 HNS3_RX_HEAD_SIZE);
2292 memcpy(__skb_put(skb, pull_len), va,
2293 ALIGN(pull_len, sizeof(long)));
2294
2295 hns3_nic_reuse_page(skb, 0, ring, pull_len, desc_cb);
2296 ring_ptr_move_fw(ring, next_to_clean);
2297
2298 while (!hnae_get_bit(bd_base_info, HNS3_RXD_FE_B)) {
2299 desc = &ring->desc[ring->next_to_clean];
2300 desc_cb = &ring->desc_cb[ring->next_to_clean];
2301 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2302 hns3_nic_reuse_page(skb, bnum, ring, 0, desc_cb);
2303 ring_ptr_move_fw(ring, next_to_clean);
2304 bnum++;
2305 }
2306 }
2307
2308 *out_bnum = bnum;
2309
2310 if (unlikely(!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))) {
2311 netdev_err(netdev, "no valid bd,%016llx,%016llx\n",
2312 ((u64 *)desc)[0], ((u64 *)desc)[1]);
2313 u64_stats_update_begin(&ring->syncp);
2314 ring->stats.non_vld_descs++;
2315 u64_stats_update_end(&ring->syncp);
2316
2317 dev_kfree_skb_any(skb);
2318 return -EINVAL;
2319 }
2320
2321 if (unlikely((!desc->rx.pkt_len) ||
2322 hnae_get_bit(l234info, HNS3_RXD_TRUNCAT_B))) {
2323 netdev_err(netdev, "truncated pkt\n");
2324 u64_stats_update_begin(&ring->syncp);
2325 ring->stats.err_pkt_len++;
2326 u64_stats_update_end(&ring->syncp);
2327
2328 dev_kfree_skb_any(skb);
2329 return -EFAULT;
2330 }
2331
2332 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L2E_B))) {
2333 netdev_err(netdev, "L2 error pkt\n");
2334 u64_stats_update_begin(&ring->syncp);
2335 ring->stats.l2_err++;
2336 u64_stats_update_end(&ring->syncp);
2337
2338 dev_kfree_skb_any(skb);
2339 return -EFAULT;
2340 }
2341
2342 u64_stats_update_begin(&ring->syncp);
2343 ring->stats.rx_pkts++;
2344 ring->stats.rx_bytes += skb->len;
2345 u64_stats_update_end(&ring->syncp);
2346
2347 ring->tqp_vector->rx_group.total_bytes += skb->len;
2348
2349 hns3_rx_checksum(ring, skb, desc);
2350 return 0;
2351}
2352
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002353int hns3_clean_rx_ring(
2354 struct hns3_enet_ring *ring, int budget,
2355 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
Salil76ad4f02017-08-02 16:59:45 +01002356{
2357#define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2358 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2359 int recv_pkts, recv_bds, clean_count, err;
2360 int unused_count = hns3_desc_unused(ring);
2361 struct sk_buff *skb = NULL;
2362 int num, bnum = 0;
2363
2364 num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2365 rmb(); /* Make sure num taken effect before the other data is touched */
2366
2367 recv_pkts = 0, recv_bds = 0, clean_count = 0;
2368 num -= unused_count;
2369
2370 while (recv_pkts < budget && recv_bds < num) {
2371 /* Reuse or realloc buffers */
2372 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2373 hns3_nic_alloc_rx_buffers(ring,
2374 clean_count + unused_count);
2375 clean_count = 0;
2376 unused_count = hns3_desc_unused(ring);
2377 }
2378
2379 /* Poll one pkt */
2380 err = hns3_handle_rx_bd(ring, &skb, &bnum);
2381 if (unlikely(!skb)) /* This fault cannot be repaired */
2382 goto out;
2383
2384 recv_bds += bnum;
2385 clean_count += bnum;
2386 if (unlikely(err)) { /* Do jump the err */
2387 recv_pkts++;
2388 continue;
2389 }
2390
2391 /* Do update ip stack process */
2392 skb->protocol = eth_type_trans(skb, netdev);
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002393 rx_fn(ring, skb);
Salil76ad4f02017-08-02 16:59:45 +01002394
2395 recv_pkts++;
2396 }
2397
2398out:
2399 /* Make all data has been write before submit */
2400 if (clean_count + unused_count > 0)
2401 hns3_nic_alloc_rx_buffers(ring,
2402 clean_count + unused_count);
2403
2404 return recv_pkts;
2405}
2406
2407static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2408{
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002409 struct hns3_enet_tqp_vector *tqp_vector =
2410 ring_group->ring->tqp_vector;
Salil76ad4f02017-08-02 16:59:45 +01002411 enum hns3_flow_level_range new_flow_level;
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002412 int packets_per_msecs;
2413 int bytes_per_msecs;
2414 u32 time_passed_ms;
Salil76ad4f02017-08-02 16:59:45 +01002415 u16 new_int_gl;
Salil76ad4f02017-08-02 16:59:45 +01002416
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002417 if (!ring_group->coal.int_gl || !tqp_vector->last_jiffies)
Salil76ad4f02017-08-02 16:59:45 +01002418 return false;
2419
2420 if (ring_group->total_packets == 0) {
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002421 ring_group->coal.int_gl = HNS3_INT_GL_50K;
2422 ring_group->coal.flow_level = HNS3_FLOW_LOW;
Salil76ad4f02017-08-02 16:59:45 +01002423 return true;
2424 }
2425
2426 /* Simple throttlerate management
2427 * 0-10MB/s lower (50000 ints/s)
2428 * 10-20MB/s middle (20000 ints/s)
2429 * 20-1249MB/s high (18000 ints/s)
2430 * > 40000pps ultra (8000 ints/s)
2431 */
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002432 new_flow_level = ring_group->coal.flow_level;
2433 new_int_gl = ring_group->coal.int_gl;
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002434 time_passed_ms =
2435 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
2436
2437 if (!time_passed_ms)
2438 return false;
2439
2440 do_div(ring_group->total_packets, time_passed_ms);
2441 packets_per_msecs = ring_group->total_packets;
2442
2443 do_div(ring_group->total_bytes, time_passed_ms);
2444 bytes_per_msecs = ring_group->total_bytes;
2445
2446#define HNS3_RX_LOW_BYTE_RATE 10000
2447#define HNS3_RX_MID_BYTE_RATE 20000
Salil76ad4f02017-08-02 16:59:45 +01002448
2449 switch (new_flow_level) {
2450 case HNS3_FLOW_LOW:
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002451 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
Salil76ad4f02017-08-02 16:59:45 +01002452 new_flow_level = HNS3_FLOW_MID;
2453 break;
2454 case HNS3_FLOW_MID:
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002455 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
Salil76ad4f02017-08-02 16:59:45 +01002456 new_flow_level = HNS3_FLOW_HIGH;
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002457 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
Salil76ad4f02017-08-02 16:59:45 +01002458 new_flow_level = HNS3_FLOW_LOW;
2459 break;
2460 case HNS3_FLOW_HIGH:
2461 case HNS3_FLOW_ULTRA:
2462 default:
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002463 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
Salil76ad4f02017-08-02 16:59:45 +01002464 new_flow_level = HNS3_FLOW_MID;
2465 break;
2466 }
2467
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002468#define HNS3_RX_ULTRA_PACKET_RATE 40
2469
2470 if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
2471 &tqp_vector->rx_group == ring_group)
Salil76ad4f02017-08-02 16:59:45 +01002472 new_flow_level = HNS3_FLOW_ULTRA;
2473
2474 switch (new_flow_level) {
2475 case HNS3_FLOW_LOW:
2476 new_int_gl = HNS3_INT_GL_50K;
2477 break;
2478 case HNS3_FLOW_MID:
2479 new_int_gl = HNS3_INT_GL_20K;
2480 break;
2481 case HNS3_FLOW_HIGH:
2482 new_int_gl = HNS3_INT_GL_18K;
2483 break;
2484 case HNS3_FLOW_ULTRA:
2485 new_int_gl = HNS3_INT_GL_8K;
2486 break;
2487 default:
2488 break;
2489 }
2490
2491 ring_group->total_bytes = 0;
2492 ring_group->total_packets = 0;
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002493 ring_group->coal.flow_level = new_flow_level;
2494 if (new_int_gl != ring_group->coal.int_gl) {
2495 ring_group->coal.int_gl = new_int_gl;
Salil76ad4f02017-08-02 16:59:45 +01002496 return true;
2497 }
2498 return false;
2499}
2500
2501static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
2502{
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002503 struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
2504 struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
2505 bool rx_update, tx_update;
Salil76ad4f02017-08-02 16:59:45 +01002506
Fuyun Liangcd9d1872018-03-21 15:49:25 +08002507 if (tqp_vector->int_adapt_down > 0) {
2508 tqp_vector->int_adapt_down--;
2509 return;
2510 }
2511
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002512 if (rx_group->coal.gl_adapt_enable) {
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002513 rx_update = hns3_get_new_int_gl(rx_group);
2514 if (rx_update)
2515 hns3_set_vector_coalesce_rx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002516 rx_group->coal.int_gl);
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002517 }
2518
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002519 if (tx_group->coal.gl_adapt_enable) {
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002520 tx_update = hns3_get_new_int_gl(&tqp_vector->tx_group);
2521 if (tx_update)
2522 hns3_set_vector_coalesce_tx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002523 tx_group->coal.int_gl);
Salil76ad4f02017-08-02 16:59:45 +01002524 }
Fuyun Liangcd9d1872018-03-21 15:49:25 +08002525
Fuyun Lianga95e1f82018-03-21 15:49:26 +08002526 tqp_vector->last_jiffies = jiffies;
Fuyun Liangcd9d1872018-03-21 15:49:25 +08002527 tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;
Salil76ad4f02017-08-02 16:59:45 +01002528}
2529
2530static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
2531{
2532 struct hns3_enet_ring *ring;
2533 int rx_pkt_total = 0;
2534
2535 struct hns3_enet_tqp_vector *tqp_vector =
2536 container_of(napi, struct hns3_enet_tqp_vector, napi);
2537 bool clean_complete = true;
2538 int rx_budget;
2539
2540 /* Since the actual Tx work is minimal, we can give the Tx a larger
2541 * budget and be more aggressive about cleaning up the Tx descriptors.
2542 */
2543 hns3_for_each_ring(ring, tqp_vector->tx_group) {
2544 if (!hns3_clean_tx_ring(ring, budget))
2545 clean_complete = false;
2546 }
2547
2548 /* make sure rx ring budget not smaller than 1 */
2549 rx_budget = max(budget / tqp_vector->num_tqps, 1);
2550
2551 hns3_for_each_ring(ring, tqp_vector->rx_group) {
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002552 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
2553 hns3_rx_skb);
Salil76ad4f02017-08-02 16:59:45 +01002554
2555 if (rx_cleaned >= rx_budget)
2556 clean_complete = false;
2557
2558 rx_pkt_total += rx_cleaned;
2559 }
2560
2561 tqp_vector->rx_group.total_packets += rx_pkt_total;
2562
2563 if (!clean_complete)
2564 return budget;
2565
2566 napi_complete(napi);
2567 hns3_update_new_int_gl(tqp_vector);
2568 hns3_mask_vector_irq(tqp_vector, 1);
2569
2570 return rx_pkt_total;
2571}
2572
2573static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2574 struct hnae3_ring_chain_node *head)
2575{
2576 struct pci_dev *pdev = tqp_vector->handle->pdev;
2577 struct hnae3_ring_chain_node *cur_chain = head;
2578 struct hnae3_ring_chain_node *chain;
2579 struct hns3_enet_ring *tx_ring;
2580 struct hns3_enet_ring *rx_ring;
2581
2582 tx_ring = tqp_vector->tx_group.ring;
2583 if (tx_ring) {
2584 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
2585 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2586 HNAE3_RING_TYPE_TX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002587 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2588 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
Salil76ad4f02017-08-02 16:59:45 +01002589
2590 cur_chain->next = NULL;
2591
2592 while (tx_ring->next) {
2593 tx_ring = tx_ring->next;
2594
2595 chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
2596 GFP_KERNEL);
2597 if (!chain)
2598 return -ENOMEM;
2599
2600 cur_chain->next = chain;
2601 chain->tqp_index = tx_ring->tqp->tqp_index;
2602 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2603 HNAE3_RING_TYPE_TX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002604 hnae_set_field(chain->int_gl_idx,
2605 HNAE3_RING_GL_IDX_M,
2606 HNAE3_RING_GL_IDX_S,
2607 HNAE3_RING_GL_TX);
Salil76ad4f02017-08-02 16:59:45 +01002608
2609 cur_chain = chain;
2610 }
2611 }
2612
2613 rx_ring = tqp_vector->rx_group.ring;
2614 if (!tx_ring && rx_ring) {
2615 cur_chain->next = NULL;
2616 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
2617 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2618 HNAE3_RING_TYPE_RX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002619 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2620 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
Salil76ad4f02017-08-02 16:59:45 +01002621
2622 rx_ring = rx_ring->next;
2623 }
2624
2625 while (rx_ring) {
2626 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
2627 if (!chain)
2628 return -ENOMEM;
2629
2630 cur_chain->next = chain;
2631 chain->tqp_index = rx_ring->tqp->tqp_index;
2632 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2633 HNAE3_RING_TYPE_RX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002634 hnae_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2635 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
2636
Salil76ad4f02017-08-02 16:59:45 +01002637 cur_chain = chain;
2638
2639 rx_ring = rx_ring->next;
2640 }
2641
2642 return 0;
2643}
2644
2645static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2646 struct hnae3_ring_chain_node *head)
2647{
2648 struct pci_dev *pdev = tqp_vector->handle->pdev;
2649 struct hnae3_ring_chain_node *chain_tmp, *chain;
2650
2651 chain = head->next;
2652
2653 while (chain) {
2654 chain_tmp = chain->next;
2655 devm_kfree(&pdev->dev, chain);
2656 chain = chain_tmp;
2657 }
2658}
2659
2660static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
2661 struct hns3_enet_ring *ring)
2662{
2663 ring->next = group->ring;
2664 group->ring = ring;
2665
2666 group->count++;
2667}
2668
2669static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
2670{
2671 struct hnae3_ring_chain_node vector_ring_chain;
2672 struct hnae3_handle *h = priv->ae_handle;
2673 struct hns3_enet_tqp_vector *tqp_vector;
Yunsheng Lindd38c722018-03-09 10:37:02 +08002674 int ret = 0;
2675 u16 i;
2676
2677 for (i = 0; i < priv->vector_num; i++) {
2678 tqp_vector = &priv->tqp_vector[i];
2679 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
2680 tqp_vector->num_tqps = 0;
2681 }
2682
2683 for (i = 0; i < h->kinfo.num_tqps; i++) {
2684 u16 vector_i = i % priv->vector_num;
2685 u16 tqp_num = h->kinfo.num_tqps;
2686
2687 tqp_vector = &priv->tqp_vector[vector_i];
2688
2689 hns3_add_ring_to_group(&tqp_vector->tx_group,
2690 priv->ring_data[i].ring);
2691
2692 hns3_add_ring_to_group(&tqp_vector->rx_group,
2693 priv->ring_data[i + tqp_num].ring);
2694
2695 priv->ring_data[i].ring->tqp_vector = tqp_vector;
2696 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
2697 tqp_vector->num_tqps++;
2698 }
2699
2700 for (i = 0; i < priv->vector_num; i++) {
2701 tqp_vector = &priv->tqp_vector[i];
2702
2703 tqp_vector->rx_group.total_bytes = 0;
2704 tqp_vector->rx_group.total_packets = 0;
2705 tqp_vector->tx_group.total_bytes = 0;
2706 tqp_vector->tx_group.total_packets = 0;
2707 tqp_vector->handle = h;
2708
2709 ret = hns3_get_vector_ring_chain(tqp_vector,
2710 &vector_ring_chain);
2711 if (ret)
2712 return ret;
2713
2714 ret = h->ae_algo->ops->map_ring_to_vector(h,
2715 tqp_vector->vector_irq, &vector_ring_chain);
2716
2717 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2718
2719 if (ret)
2720 return ret;
2721
2722 netif_napi_add(priv->netdev, &tqp_vector->napi,
2723 hns3_nic_common_poll, NAPI_POLL_WEIGHT);
2724 }
2725
2726 return 0;
2727}
2728
2729static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
2730{
2731 struct hnae3_handle *h = priv->ae_handle;
2732 struct hns3_enet_tqp_vector *tqp_vector;
Salil76ad4f02017-08-02 16:59:45 +01002733 struct hnae3_vector_info *vector;
2734 struct pci_dev *pdev = h->pdev;
2735 u16 tqp_num = h->kinfo.num_tqps;
2736 u16 vector_num;
2737 int ret = 0;
2738 u16 i;
2739
2740 /* RSS size, cpu online and vector_num should be the same */
2741 /* Should consider 2p/4p later */
2742 vector_num = min_t(u16, num_online_cpus(), tqp_num);
2743 vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
2744 GFP_KERNEL);
2745 if (!vector)
2746 return -ENOMEM;
2747
2748 vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
2749
2750 priv->vector_num = vector_num;
2751 priv->tqp_vector = (struct hns3_enet_tqp_vector *)
2752 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
2753 GFP_KERNEL);
Yunsheng Lindd38c722018-03-09 10:37:02 +08002754 if (!priv->tqp_vector) {
2755 ret = -ENOMEM;
2756 goto out;
Salil76ad4f02017-08-02 16:59:45 +01002757 }
2758
Yunsheng Lindd38c722018-03-09 10:37:02 +08002759 for (i = 0; i < priv->vector_num; i++) {
Salil76ad4f02017-08-02 16:59:45 +01002760 tqp_vector = &priv->tqp_vector[i];
Yunsheng Lindd38c722018-03-09 10:37:02 +08002761 tqp_vector->idx = i;
2762 tqp_vector->mask_addr = vector[i].io_addr;
2763 tqp_vector->vector_irq = vector[i].vector;
Fuyun Liang5fd47892018-01-12 16:23:11 +08002764 hns3_vector_gl_rl_init(tqp_vector, priv);
Salil76ad4f02017-08-02 16:59:45 +01002765 }
2766
2767out:
2768 devm_kfree(&pdev->dev, vector);
2769 return ret;
2770}
2771
Yunsheng Lindd38c722018-03-09 10:37:02 +08002772static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
2773{
2774 group->ring = NULL;
2775 group->count = 0;
2776}
2777
Salil76ad4f02017-08-02 16:59:45 +01002778static int hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
2779{
2780 struct hnae3_ring_chain_node vector_ring_chain;
2781 struct hnae3_handle *h = priv->ae_handle;
2782 struct hns3_enet_tqp_vector *tqp_vector;
Salil76ad4f02017-08-02 16:59:45 +01002783 int i, ret;
2784
2785 for (i = 0; i < priv->vector_num; i++) {
2786 tqp_vector = &priv->tqp_vector[i];
2787
2788 ret = hns3_get_vector_ring_chain(tqp_vector,
2789 &vector_ring_chain);
2790 if (ret)
2791 return ret;
2792
2793 ret = h->ae_algo->ops->unmap_ring_from_vector(h,
2794 tqp_vector->vector_irq, &vector_ring_chain);
2795 if (ret)
2796 return ret;
2797
Yunsheng Lin0d3e6632018-03-09 10:37:01 +08002798 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
2799 if (ret)
2800 return ret;
2801
Salil76ad4f02017-08-02 16:59:45 +01002802 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2803
2804 if (priv->tqp_vector[i].irq_init_flag == HNS3_VECTOR_INITED) {
2805 (void)irq_set_affinity_hint(
2806 priv->tqp_vector[i].vector_irq,
2807 NULL);
qumingguangae064e62017-11-02 20:45:22 +08002808 free_irq(priv->tqp_vector[i].vector_irq,
2809 &priv->tqp_vector[i]);
Salil76ad4f02017-08-02 16:59:45 +01002810 }
2811
2812 priv->ring_data[i].ring->irq_init_flag = HNS3_VECTOR_NOT_INITED;
Yunsheng Lindd38c722018-03-09 10:37:02 +08002813 hns3_clear_ring_group(&tqp_vector->rx_group);
2814 hns3_clear_ring_group(&tqp_vector->tx_group);
Salil76ad4f02017-08-02 16:59:45 +01002815 netif_napi_del(&priv->tqp_vector[i].napi);
2816 }
2817
Yunsheng Lindd38c722018-03-09 10:37:02 +08002818 return 0;
2819}
Salil76ad4f02017-08-02 16:59:45 +01002820
Yunsheng Lindd38c722018-03-09 10:37:02 +08002821static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
2822{
2823 struct hnae3_handle *h = priv->ae_handle;
2824 struct pci_dev *pdev = h->pdev;
2825 int i, ret;
2826
2827 for (i = 0; i < priv->vector_num; i++) {
2828 struct hns3_enet_tqp_vector *tqp_vector;
2829
2830 tqp_vector = &priv->tqp_vector[i];
2831 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
2832 if (ret)
2833 return ret;
2834 }
2835
2836 devm_kfree(&pdev->dev, priv->tqp_vector);
Salil76ad4f02017-08-02 16:59:45 +01002837 return 0;
2838}
2839
2840static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
2841 int ring_type)
2842{
2843 struct hns3_nic_ring_data *ring_data = priv->ring_data;
2844 int queue_num = priv->ae_handle->kinfo.num_tqps;
2845 struct pci_dev *pdev = priv->ae_handle->pdev;
2846 struct hns3_enet_ring *ring;
2847
2848 ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
2849 if (!ring)
2850 return -ENOMEM;
2851
2852 if (ring_type == HNAE3_RING_TYPE_TX) {
2853 ring_data[q->tqp_index].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002854 ring_data[q->tqp_index].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002855 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
2856 } else {
2857 ring_data[q->tqp_index + queue_num].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002858 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002859 ring->io_base = q->io_base;
2860 }
2861
2862 hnae_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
2863
Salil76ad4f02017-08-02 16:59:45 +01002864 ring->tqp = q;
2865 ring->desc = NULL;
2866 ring->desc_cb = NULL;
2867 ring->dev = priv->dev;
2868 ring->desc_dma_addr = 0;
2869 ring->buf_size = q->buf_size;
2870 ring->desc_num = q->desc_num;
2871 ring->next_to_use = 0;
2872 ring->next_to_clean = 0;
2873
2874 return 0;
2875}
2876
2877static int hns3_queue_to_ring(struct hnae3_queue *tqp,
2878 struct hns3_nic_priv *priv)
2879{
2880 int ret;
2881
2882 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
2883 if (ret)
2884 return ret;
2885
2886 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
2887 if (ret)
2888 return ret;
2889
2890 return 0;
2891}
2892
2893static int hns3_get_ring_config(struct hns3_nic_priv *priv)
2894{
2895 struct hnae3_handle *h = priv->ae_handle;
2896 struct pci_dev *pdev = h->pdev;
2897 int i, ret;
2898
2899 priv->ring_data = devm_kzalloc(&pdev->dev, h->kinfo.num_tqps *
2900 sizeof(*priv->ring_data) * 2,
2901 GFP_KERNEL);
2902 if (!priv->ring_data)
2903 return -ENOMEM;
2904
2905 for (i = 0; i < h->kinfo.num_tqps; i++) {
2906 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
2907 if (ret)
2908 goto err;
2909 }
2910
2911 return 0;
2912err:
2913 devm_kfree(&pdev->dev, priv->ring_data);
2914 return ret;
2915}
2916
Peng Li09f2af62017-12-22 12:21:41 +08002917static void hns3_put_ring_config(struct hns3_nic_priv *priv)
2918{
2919 struct hnae3_handle *h = priv->ae_handle;
2920 int i;
2921
2922 for (i = 0; i < h->kinfo.num_tqps; i++) {
2923 devm_kfree(priv->dev, priv->ring_data[i].ring);
2924 devm_kfree(priv->dev,
2925 priv->ring_data[i + h->kinfo.num_tqps].ring);
2926 }
2927 devm_kfree(priv->dev, priv->ring_data);
2928}
2929
Salil76ad4f02017-08-02 16:59:45 +01002930static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
2931{
2932 int ret;
2933
2934 if (ring->desc_num <= 0 || ring->buf_size <= 0)
2935 return -EINVAL;
2936
2937 ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
2938 GFP_KERNEL);
2939 if (!ring->desc_cb) {
2940 ret = -ENOMEM;
2941 goto out;
2942 }
2943
2944 ret = hns3_alloc_desc(ring);
2945 if (ret)
2946 goto out_with_desc_cb;
2947
2948 if (!HNAE3_IS_TX_RING(ring)) {
2949 ret = hns3_alloc_ring_buffers(ring);
2950 if (ret)
2951 goto out_with_desc;
2952 }
2953
2954 return 0;
2955
2956out_with_desc:
2957 hns3_free_desc(ring);
2958out_with_desc_cb:
2959 kfree(ring->desc_cb);
2960 ring->desc_cb = NULL;
2961out:
2962 return ret;
2963}
2964
2965static void hns3_fini_ring(struct hns3_enet_ring *ring)
2966{
2967 hns3_free_desc(ring);
2968 kfree(ring->desc_cb);
2969 ring->desc_cb = NULL;
2970 ring->next_to_clean = 0;
2971 ring->next_to_use = 0;
2972}
2973
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08002974static int hns3_buf_size2type(u32 buf_size)
Salil76ad4f02017-08-02 16:59:45 +01002975{
2976 int bd_size_type;
2977
2978 switch (buf_size) {
2979 case 512:
2980 bd_size_type = HNS3_BD_SIZE_512_TYPE;
2981 break;
2982 case 1024:
2983 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
2984 break;
2985 case 2048:
2986 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2987 break;
2988 case 4096:
2989 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
2990 break;
2991 default:
2992 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2993 }
2994
2995 return bd_size_type;
2996}
2997
2998static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
2999{
3000 dma_addr_t dma = ring->desc_dma_addr;
3001 struct hnae3_queue *q = ring->tqp;
3002
3003 if (!HNAE3_IS_TX_RING(ring)) {
3004 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
3005 (u32)dma);
3006 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3007 (u32)((dma >> 31) >> 1));
3008
3009 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3010 hns3_buf_size2type(ring->buf_size));
3011 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3012 ring->desc_num / 8 - 1);
3013
3014 } else {
3015 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3016 (u32)dma);
3017 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3018 (u32)((dma >> 31) >> 1));
3019
3020 hns3_write_dev(q, HNS3_RING_TX_RING_BD_LEN_REG,
3021 hns3_buf_size2type(ring->buf_size));
3022 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3023 ring->desc_num / 8 - 1);
3024 }
3025}
3026
Lipeng5668abd2017-10-10 16:42:04 +08003027int hns3_init_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01003028{
3029 struct hnae3_handle *h = priv->ae_handle;
3030 int ring_num = h->kinfo.num_tqps * 2;
3031 int i, j;
3032 int ret;
3033
3034 for (i = 0; i < ring_num; i++) {
3035 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3036 if (ret) {
3037 dev_err(priv->dev,
3038 "Alloc ring memory fail! ret=%d\n", ret);
3039 goto out_when_alloc_ring_memory;
3040 }
3041
3042 hns3_init_ring_hw(priv->ring_data[i].ring);
3043
3044 u64_stats_init(&priv->ring_data[i].ring->syncp);
3045 }
3046
3047 return 0;
3048
3049out_when_alloc_ring_memory:
3050 for (j = i - 1; j >= 0; j--)
Lipengee83f772017-10-10 16:42:03 +08003051 hns3_fini_ring(priv->ring_data[j].ring);
Salil76ad4f02017-08-02 16:59:45 +01003052
3053 return -ENOMEM;
3054}
3055
Lipeng5668abd2017-10-10 16:42:04 +08003056int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01003057{
3058 struct hnae3_handle *h = priv->ae_handle;
3059 int i;
3060
3061 for (i = 0; i < h->kinfo.num_tqps; i++) {
3062 if (h->ae_algo->ops->reset_queue)
3063 h->ae_algo->ops->reset_queue(h, i);
3064
3065 hns3_fini_ring(priv->ring_data[i].ring);
3066 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3067 }
Salil76ad4f02017-08-02 16:59:45 +01003068 return 0;
3069}
3070
3071/* Set mac addr if it is configured. or leave it to the AE driver */
3072static void hns3_init_mac_addr(struct net_device *netdev)
3073{
3074 struct hns3_nic_priv *priv = netdev_priv(netdev);
3075 struct hnae3_handle *h = priv->ae_handle;
3076 u8 mac_addr_temp[ETH_ALEN];
3077
3078 if (h->ae_algo->ops->get_mac_addr) {
3079 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3080 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3081 }
3082
3083 /* Check if the MAC address is valid, if not get a random one */
3084 if (!is_valid_ether_addr(netdev->dev_addr)) {
3085 eth_hw_addr_random(netdev);
3086 dev_warn(priv->dev, "using random MAC address %pM\n",
3087 netdev->dev_addr);
Salil76ad4f02017-08-02 16:59:45 +01003088 }
Lipeng139e8792017-09-19 17:17:13 +01003089
3090 if (h->ae_algo->ops->set_mac_addr)
Fuyun Liang590980552018-03-10 11:29:22 +08003091 h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
Lipeng139e8792017-09-19 17:17:13 +01003092
Salil76ad4f02017-08-02 16:59:45 +01003093}
3094
3095static void hns3_nic_set_priv_ops(struct net_device *netdev)
3096{
3097 struct hns3_nic_priv *priv = netdev_priv(netdev);
3098
3099 if ((netdev->features & NETIF_F_TSO) ||
3100 (netdev->features & NETIF_F_TSO6)) {
3101 priv->ops.fill_desc = hns3_fill_desc_tso;
3102 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
3103 } else {
3104 priv->ops.fill_desc = hns3_fill_desc;
3105 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
3106 }
3107}
3108
3109static int hns3_client_init(struct hnae3_handle *handle)
3110{
3111 struct pci_dev *pdev = handle->pdev;
3112 struct hns3_nic_priv *priv;
3113 struct net_device *netdev;
3114 int ret;
3115
3116 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv),
Peng Li678335a12018-03-08 19:41:54 +08003117 hns3_get_max_available_channels(handle));
Salil76ad4f02017-08-02 16:59:45 +01003118 if (!netdev)
3119 return -ENOMEM;
3120
3121 priv = netdev_priv(netdev);
3122 priv->dev = &pdev->dev;
3123 priv->netdev = netdev;
3124 priv->ae_handle = handle;
Lipengf8fa222c2017-11-02 20:45:20 +08003125 priv->last_reset_time = jiffies;
3126 priv->reset_level = HNAE3_FUNC_RESET;
3127 priv->tx_timeout_count = 0;
Salil76ad4f02017-08-02 16:59:45 +01003128
3129 handle->kinfo.netdev = netdev;
3130 handle->priv = (void *)priv;
3131
3132 hns3_init_mac_addr(netdev);
3133
3134 hns3_set_default_feature(netdev);
3135
3136 netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3137 netdev->priv_flags |= IFF_UNICAST_FLT;
3138 netdev->netdev_ops = &hns3_nic_netdev_ops;
3139 SET_NETDEV_DEV(netdev, &pdev->dev);
3140 hns3_ethtool_set_ops(netdev);
3141 hns3_nic_set_priv_ops(netdev);
3142
3143 /* Carrier off reporting is important to ethtool even BEFORE open */
3144 netif_carrier_off(netdev);
3145
3146 ret = hns3_get_ring_config(priv);
3147 if (ret) {
3148 ret = -ENOMEM;
3149 goto out_get_ring_cfg;
3150 }
3151
Yunsheng Lindd38c722018-03-09 10:37:02 +08003152 ret = hns3_nic_alloc_vector_data(priv);
3153 if (ret) {
3154 ret = -ENOMEM;
3155 goto out_alloc_vector_data;
3156 }
3157
Salil76ad4f02017-08-02 16:59:45 +01003158 ret = hns3_nic_init_vector_data(priv);
3159 if (ret) {
3160 ret = -ENOMEM;
3161 goto out_init_vector_data;
3162 }
3163
3164 ret = hns3_init_all_ring(priv);
3165 if (ret) {
3166 ret = -ENOMEM;
3167 goto out_init_ring_data;
3168 }
3169
3170 ret = register_netdev(netdev);
3171 if (ret) {
3172 dev_err(priv->dev, "probe register netdev fail!\n");
3173 goto out_reg_netdev_fail;
3174 }
3175
Yunsheng Lin986743d2017-09-27 09:45:30 +08003176 hns3_dcbnl_setup(handle);
3177
Salila8e8b7f2017-08-21 17:05:24 +01003178 /* MTU range: (ETH_MIN_MTU(kernel default) - 9706) */
3179 netdev->max_mtu = HNS3_MAX_MTU - (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
3180
Salil76ad4f02017-08-02 16:59:45 +01003181 return ret;
3182
3183out_reg_netdev_fail:
3184out_init_ring_data:
3185 (void)hns3_nic_uninit_vector_data(priv);
Salil76ad4f02017-08-02 16:59:45 +01003186out_init_vector_data:
Yunsheng Lindd38c722018-03-09 10:37:02 +08003187 hns3_nic_dealloc_vector_data(priv);
3188out_alloc_vector_data:
3189 priv->ring_data = NULL;
Salil76ad4f02017-08-02 16:59:45 +01003190out_get_ring_cfg:
3191 priv->ae_handle = NULL;
3192 free_netdev(netdev);
3193 return ret;
3194}
3195
3196static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3197{
3198 struct net_device *netdev = handle->kinfo.netdev;
3199 struct hns3_nic_priv *priv = netdev_priv(netdev);
3200 int ret;
3201
3202 if (netdev->reg_state != NETREG_UNINITIALIZED)
3203 unregister_netdev(netdev);
3204
3205 ret = hns3_nic_uninit_vector_data(priv);
3206 if (ret)
3207 netdev_err(netdev, "uninit vector error\n");
3208
Yunsheng Lindd38c722018-03-09 10:37:02 +08003209 ret = hns3_nic_dealloc_vector_data(priv);
3210 if (ret)
3211 netdev_err(netdev, "dealloc vector error\n");
3212
Salil76ad4f02017-08-02 16:59:45 +01003213 ret = hns3_uninit_all_ring(priv);
3214 if (ret)
3215 netdev_err(netdev, "uninit ring error\n");
3216
Yunsheng Linec777892018-03-09 10:37:00 +08003217 hns3_put_ring_config(priv);
3218
Salil76ad4f02017-08-02 16:59:45 +01003219 priv->ring_data = NULL;
3220
3221 free_netdev(netdev);
3222}
3223
3224static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3225{
3226 struct net_device *netdev = handle->kinfo.netdev;
3227
3228 if (!netdev)
3229 return;
3230
3231 if (linkup) {
3232 netif_carrier_on(netdev);
3233 netif_tx_wake_all_queues(netdev);
3234 netdev_info(netdev, "link up\n");
3235 } else {
3236 netif_carrier_off(netdev);
3237 netif_tx_stop_all_queues(netdev);
3238 netdev_info(netdev, "link down\n");
3239 }
3240}
3241
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003242static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3243{
3244 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3245 struct net_device *ndev = kinfo->netdev;
Colin Ian King075cfdd2017-09-29 20:51:23 +01003246 bool if_running;
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003247 int ret;
3248 u8 i;
3249
3250 if (tc > HNAE3_MAX_TC)
3251 return -EINVAL;
3252
3253 if (!ndev)
3254 return -ENODEV;
3255
Colin Ian King075cfdd2017-09-29 20:51:23 +01003256 if_running = netif_running(ndev);
3257
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003258 ret = netdev_set_num_tc(ndev, tc);
3259 if (ret)
3260 return ret;
3261
3262 if (if_running) {
3263 (void)hns3_nic_net_stop(ndev);
3264 msleep(100);
3265 }
3266
3267 ret = (kinfo->dcb_ops && kinfo->dcb_ops->map_update) ?
3268 kinfo->dcb_ops->map_update(handle) : -EOPNOTSUPP;
3269 if (ret)
3270 goto err_out;
3271
3272 if (tc <= 1) {
3273 netdev_reset_tc(ndev);
3274 goto out;
3275 }
3276
3277 for (i = 0; i < HNAE3_MAX_TC; i++) {
3278 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3279
3280 if (tc_info->enable)
3281 netdev_set_tc_queue(ndev,
3282 tc_info->tc,
3283 tc_info->tqp_count,
3284 tc_info->tqp_offset);
3285 }
3286
3287 for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
3288 netdev_set_prio_tc_map(ndev, i,
3289 kinfo->prio_tc[i]);
3290 }
3291
3292out:
3293 ret = hns3_nic_set_real_num_queue(ndev);
3294
3295err_out:
3296 if (if_running)
3297 (void)hns3_nic_net_open(ndev);
3298
3299 return ret;
3300}
3301
Lipengbb6b94a2017-11-02 20:45:21 +08003302static void hns3_recover_hw_addr(struct net_device *ndev)
3303{
3304 struct netdev_hw_addr_list *list;
3305 struct netdev_hw_addr *ha, *tmp;
3306
3307 /* go through and sync uc_addr entries to the device */
3308 list = &ndev->uc;
3309 list_for_each_entry_safe(ha, tmp, &list->list, list)
3310 hns3_nic_uc_sync(ndev, ha->addr);
3311
3312 /* go through and sync mc_addr entries to the device */
3313 list = &ndev->mc;
3314 list_for_each_entry_safe(ha, tmp, &list->list, list)
3315 hns3_nic_mc_sync(ndev, ha->addr);
3316}
3317
3318static void hns3_drop_skb_data(struct hns3_enet_ring *ring, struct sk_buff *skb)
3319{
3320 dev_kfree_skb_any(skb);
3321}
3322
3323static void hns3_clear_all_ring(struct hnae3_handle *h)
3324{
3325 struct net_device *ndev = h->kinfo.netdev;
3326 struct hns3_nic_priv *priv = netdev_priv(ndev);
3327 u32 i;
3328
3329 for (i = 0; i < h->kinfo.num_tqps; i++) {
3330 struct netdev_queue *dev_queue;
3331 struct hns3_enet_ring *ring;
3332
3333 ring = priv->ring_data[i].ring;
3334 hns3_clean_tx_ring(ring, ring->desc_num);
3335 dev_queue = netdev_get_tx_queue(ndev,
3336 priv->ring_data[i].queue_index);
3337 netdev_tx_reset_queue(dev_queue);
3338
3339 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3340 hns3_clean_rx_ring(ring, ring->desc_num, hns3_drop_skb_data);
3341 }
3342}
3343
3344static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
3345{
3346 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3347 struct net_device *ndev = kinfo->netdev;
3348
3349 if (!netif_running(ndev))
3350 return -EIO;
3351
3352 return hns3_nic_net_stop(ndev);
3353}
3354
3355static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
3356{
3357 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3358 struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
3359 int ret = 0;
3360
3361 if (netif_running(kinfo->netdev)) {
3362 ret = hns3_nic_net_up(kinfo->netdev);
3363 if (ret) {
3364 netdev_err(kinfo->netdev,
3365 "hns net up fail, ret=%d!\n", ret);
3366 return ret;
3367 }
3368
3369 priv->last_reset_time = jiffies;
3370 }
3371
3372 return ret;
3373}
3374
3375static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
3376{
3377 struct net_device *netdev = handle->kinfo.netdev;
3378 struct hns3_nic_priv *priv = netdev_priv(netdev);
3379 int ret;
3380
3381 priv->reset_level = 1;
3382 hns3_init_mac_addr(netdev);
3383 hns3_nic_set_rx_mode(netdev);
3384 hns3_recover_hw_addr(netdev);
3385
Yunsheng Lin681ec392018-03-21 15:49:22 +08003386 /* Hardware table is only clear when pf resets */
3387 if (!(handle->flags & HNAE3_SUPPORT_VF))
3388 hns3_restore_vlan(netdev);
3389
Lipengbb6b94a2017-11-02 20:45:21 +08003390 /* Carrier off reporting is important to ethtool even BEFORE open */
3391 netif_carrier_off(netdev);
3392
3393 ret = hns3_get_ring_config(priv);
3394 if (ret)
3395 return ret;
3396
3397 ret = hns3_nic_init_vector_data(priv);
3398 if (ret)
3399 return ret;
3400
3401 ret = hns3_init_all_ring(priv);
3402 if (ret) {
3403 hns3_nic_uninit_vector_data(priv);
3404 priv->ring_data = NULL;
3405 }
3406
3407 return ret;
3408}
3409
3410static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
3411{
3412 struct net_device *netdev = handle->kinfo.netdev;
3413 struct hns3_nic_priv *priv = netdev_priv(netdev);
3414 int ret;
3415
3416 hns3_clear_all_ring(handle);
3417
3418 ret = hns3_nic_uninit_vector_data(priv);
3419 if (ret) {
3420 netdev_err(netdev, "uninit vector error\n");
3421 return ret;
3422 }
3423
3424 ret = hns3_uninit_all_ring(priv);
3425 if (ret)
3426 netdev_err(netdev, "uninit ring error\n");
3427
Yunsheng Linec777892018-03-09 10:37:00 +08003428 hns3_put_ring_config(priv);
3429
Lipengbb6b94a2017-11-02 20:45:21 +08003430 priv->ring_data = NULL;
3431
3432 return ret;
3433}
3434
3435static int hns3_reset_notify(struct hnae3_handle *handle,
3436 enum hnae3_reset_notify_type type)
3437{
3438 int ret = 0;
3439
3440 switch (type) {
3441 case HNAE3_UP_CLIENT:
Salil Mehtae1586242018-01-19 15:20:53 +00003442 ret = hns3_reset_notify_up_enet(handle);
3443 break;
Lipengbb6b94a2017-11-02 20:45:21 +08003444 case HNAE3_DOWN_CLIENT:
3445 ret = hns3_reset_notify_down_enet(handle);
3446 break;
3447 case HNAE3_INIT_CLIENT:
3448 ret = hns3_reset_notify_init_enet(handle);
3449 break;
3450 case HNAE3_UNINIT_CLIENT:
3451 ret = hns3_reset_notify_uninit_enet(handle);
3452 break;
3453 default:
3454 break;
3455 }
3456
3457 return ret;
3458}
3459
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003460static void hns3_restore_coal(struct hns3_nic_priv *priv,
3461 struct hns3_enet_coalesce *tx,
3462 struct hns3_enet_coalesce *rx)
3463{
3464 u16 vector_num = priv->vector_num;
3465 int i;
3466
3467 for (i = 0; i < vector_num; i++) {
3468 memcpy(&priv->tqp_vector[i].tx_group.coal, tx,
3469 sizeof(struct hns3_enet_coalesce));
3470 memcpy(&priv->tqp_vector[i].rx_group.coal, rx,
3471 sizeof(struct hns3_enet_coalesce));
3472 }
3473}
3474
3475static int hns3_modify_tqp_num(struct net_device *netdev, u16 new_tqp_num,
3476 struct hns3_enet_coalesce *tx,
3477 struct hns3_enet_coalesce *rx)
Peng Li09f2af62017-12-22 12:21:41 +08003478{
3479 struct hns3_nic_priv *priv = netdev_priv(netdev);
3480 struct hnae3_handle *h = hns3_get_handle(netdev);
3481 int ret;
3482
3483 ret = h->ae_algo->ops->set_channels(h, new_tqp_num);
3484 if (ret)
3485 return ret;
3486
3487 ret = hns3_get_ring_config(priv);
3488 if (ret)
3489 return ret;
3490
Yunsheng Lindd38c722018-03-09 10:37:02 +08003491 ret = hns3_nic_alloc_vector_data(priv);
3492 if (ret)
3493 goto err_alloc_vector;
3494
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003495 hns3_restore_coal(priv, tx, rx);
3496
Peng Li09f2af62017-12-22 12:21:41 +08003497 ret = hns3_nic_init_vector_data(priv);
3498 if (ret)
3499 goto err_uninit_vector;
3500
3501 ret = hns3_init_all_ring(priv);
3502 if (ret)
3503 goto err_put_ring;
3504
3505 return 0;
3506
3507err_put_ring:
3508 hns3_put_ring_config(priv);
3509err_uninit_vector:
3510 hns3_nic_uninit_vector_data(priv);
Yunsheng Lindd38c722018-03-09 10:37:02 +08003511err_alloc_vector:
3512 hns3_nic_dealloc_vector_data(priv);
Peng Li09f2af62017-12-22 12:21:41 +08003513 return ret;
3514}
3515
3516static int hns3_adjust_tqps_num(u8 num_tc, u32 new_tqp_num)
3517{
3518 return (new_tqp_num / num_tc) * num_tc;
3519}
3520
3521int hns3_set_channels(struct net_device *netdev,
3522 struct ethtool_channels *ch)
3523{
3524 struct hns3_nic_priv *priv = netdev_priv(netdev);
3525 struct hnae3_handle *h = hns3_get_handle(netdev);
3526 struct hnae3_knic_private_info *kinfo = &h->kinfo;
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003527 struct hns3_enet_coalesce tx_coal, rx_coal;
Peng Li09f2af62017-12-22 12:21:41 +08003528 bool if_running = netif_running(netdev);
3529 u32 new_tqp_num = ch->combined_count;
3530 u16 org_tqp_num;
3531 int ret;
3532
3533 if (ch->rx_count || ch->tx_count)
3534 return -EINVAL;
3535
Peng Li678335a12018-03-08 19:41:54 +08003536 if (new_tqp_num > hns3_get_max_available_channels(h) ||
Peng Li09f2af62017-12-22 12:21:41 +08003537 new_tqp_num < kinfo->num_tc) {
3538 dev_err(&netdev->dev,
3539 "Change tqps fail, the tqp range is from %d to %d",
3540 kinfo->num_tc,
Peng Li678335a12018-03-08 19:41:54 +08003541 hns3_get_max_available_channels(h));
Peng Li09f2af62017-12-22 12:21:41 +08003542 return -EINVAL;
3543 }
3544
3545 new_tqp_num = hns3_adjust_tqps_num(kinfo->num_tc, new_tqp_num);
3546 if (kinfo->num_tqps == new_tqp_num)
3547 return 0;
3548
3549 if (if_running)
Fuyun Liang20e4bf982018-03-10 11:29:24 +08003550 hns3_nic_net_stop(netdev);
Peng Li09f2af62017-12-22 12:21:41 +08003551
3552 hns3_clear_all_ring(h);
3553
3554 ret = hns3_nic_uninit_vector_data(priv);
3555 if (ret) {
3556 dev_err(&netdev->dev,
3557 "Unbind vector with tqp fail, nothing is changed");
3558 goto open_netdev;
3559 }
3560
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003561 /* Changing the tqp num may also change the vector num,
3562 * ethtool only support setting and querying one coal
3563 * configuation for now, so save the vector 0' coal
3564 * configuation here in order to restore it.
3565 */
3566 memcpy(&tx_coal, &priv->tqp_vector[0].tx_group.coal,
3567 sizeof(struct hns3_enet_coalesce));
3568 memcpy(&rx_coal, &priv->tqp_vector[0].rx_group.coal,
3569 sizeof(struct hns3_enet_coalesce));
3570
Yunsheng Lindd38c722018-03-09 10:37:02 +08003571 hns3_nic_dealloc_vector_data(priv);
3572
Peng Li09f2af62017-12-22 12:21:41 +08003573 hns3_uninit_all_ring(priv);
Yunsheng Linec777892018-03-09 10:37:00 +08003574 hns3_put_ring_config(priv);
Peng Li09f2af62017-12-22 12:21:41 +08003575
3576 org_tqp_num = h->kinfo.num_tqps;
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003577 ret = hns3_modify_tqp_num(netdev, new_tqp_num, &tx_coal, &rx_coal);
Peng Li09f2af62017-12-22 12:21:41 +08003578 if (ret) {
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003579 ret = hns3_modify_tqp_num(netdev, org_tqp_num,
3580 &tx_coal, &rx_coal);
Peng Li09f2af62017-12-22 12:21:41 +08003581 if (ret) {
3582 /* If revert to old tqp failed, fatal error occurred */
3583 dev_err(&netdev->dev,
3584 "Revert to old tqp num fail, ret=%d", ret);
3585 return ret;
3586 }
3587 dev_info(&netdev->dev,
3588 "Change tqp num fail, Revert to old tqp num");
3589 }
3590
3591open_netdev:
3592 if (if_running)
Fuyun Liang20e4bf982018-03-10 11:29:24 +08003593 hns3_nic_net_open(netdev);
Peng Li09f2af62017-12-22 12:21:41 +08003594
3595 return ret;
3596}
3597
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08003598static const struct hnae3_client_ops client_ops = {
Salil76ad4f02017-08-02 16:59:45 +01003599 .init_instance = hns3_client_init,
3600 .uninit_instance = hns3_client_uninit,
3601 .link_status_change = hns3_link_status_change,
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003602 .setup_tc = hns3_client_setup_tc,
Lipengbb6b94a2017-11-02 20:45:21 +08003603 .reset_notify = hns3_reset_notify,
Salil76ad4f02017-08-02 16:59:45 +01003604};
3605
3606/* hns3_init_module - Driver registration routine
3607 * hns3_init_module is the first routine called when the driver is
3608 * loaded. All it does is register with the PCI subsystem.
3609 */
3610static int __init hns3_init_module(void)
3611{
3612 int ret;
3613
3614 pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
3615 pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
3616
3617 client.type = HNAE3_CLIENT_KNIC;
3618 snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
3619 hns3_driver_name);
3620
3621 client.ops = &client_ops;
3622
3623 ret = hnae3_register_client(&client);
3624 if (ret)
3625 return ret;
3626
3627 ret = pci_register_driver(&hns3_driver);
3628 if (ret)
3629 hnae3_unregister_client(&client);
3630
3631 return ret;
3632}
3633module_init(hns3_init_module);
3634
3635/* hns3_exit_module - Driver exit cleanup routine
3636 * hns3_exit_module is called just before the driver is removed
3637 * from memory.
3638 */
3639static void __exit hns3_exit_module(void)
3640{
3641 pci_unregister_driver(&hns3_driver);
3642 hnae3_unregister_client(&client);
3643}
3644module_exit(hns3_exit_module);
3645
3646MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
3647MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
3648MODULE_LICENSE("GPL");
3649MODULE_ALIAS("pci:hns-nic");