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Andy Fleming00db8182005-07-30 19:31:23 -04001/*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
Michael Stapelberg3871c382013-03-11 13:56:45 +000010 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
Andy Fleming00db8182005-07-30 19:31:23 -040012 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
Andy Fleming00db8182005-07-30 19:31:23 -040018#include <linux/kernel.h>
Andy Fleming00db8182005-07-30 19:31:23 -040019#include <linux/string.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010020#include <linux/ctype.h>
Andy Fleming00db8182005-07-30 19:31:23 -040021#include <linux/errno.h>
22#include <linux/unistd.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010023#include <linux/hwmon.h>
Andy Fleming00db8182005-07-30 19:31:23 -040024#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mm.h>
32#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -040033#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +100036#include <linux/marvell_phy.h>
David Daneycf41a512010-11-19 12:13:18 +000037#include <linux/of.h>
Andy Fleming00db8182005-07-30 19:31:23 -040038
Avinash Kumareea3b202013-09-30 09:36:44 +053039#include <linux/io.h>
Andy Fleming00db8182005-07-30 19:31:23 -040040#include <asm/irq.h>
Avinash Kumareea3b202013-09-30 09:36:44 +053041#include <linux/uaccess.h>
Andy Fleming00db8182005-07-30 19:31:23 -040042
David Daney27d916d2010-11-19 11:58:52 +000043#define MII_MARVELL_PHY_PAGE 22
Andrew Lunn52295662017-05-25 21:42:08 +020044#define MII_MARVELL_COPPER_PAGE 0x00
45#define MII_MARVELL_FIBER_PAGE 0x01
46#define MII_MARVELL_MSCR_PAGE 0x02
47#define MII_MARVELL_LED_PAGE 0x03
48#define MII_MARVELL_MISC_TEST_PAGE 0x06
49#define MII_MARVELL_WOL_PAGE 0x11
David Daney27d916d2010-11-19 11:58:52 +000050
Andy Fleming00db8182005-07-30 19:31:23 -040051#define MII_M1011_IEVENT 0x13
52#define MII_M1011_IEVENT_CLEAR 0x0000
53
54#define MII_M1011_IMASK 0x12
55#define MII_M1011_IMASK_INIT 0x6400
56#define MII_M1011_IMASK_CLEAR 0x0000
57
Andrew Lunnfecd5e92017-07-30 22:41:49 +020058#define MII_M1011_PHY_SCR 0x10
59#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60#define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
Andrew Lunn6ef05eb2017-07-30 22:41:50 +020061#define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
Andrew Lunnfecd5e92017-07-30 22:41:49 +020062#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
Andy Fleming76884672007-02-09 18:13:58 -060065
Andy Fleming76884672007-02-09 18:13:58 -060066#define MII_M1111_PHY_LED_CONTROL 0x18
67#define MII_M1111_PHY_LED_DIRECT 0x4100
68#define MII_M1111_PHY_LED_COMBINE 0x411c
Kim Phillips895ee682007-06-05 18:46:47 +080069#define MII_M1111_PHY_EXT_CR 0x14
Andrew Lunn61111592017-07-30 22:41:46 +020070#define MII_M1111_RGMII_RX_DELAY BIT(7)
71#define MII_M1111_RGMII_TX_DELAY BIT(1)
Kim Phillips895ee682007-06-05 18:46:47 +080072#define MII_M1111_PHY_EXT_SR 0x1b
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030073
74#define MII_M1111_HWCFG_MODE_MASK 0xf
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030075#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
Kapil Juneja4117b5b2007-05-11 18:25:18 -050076#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
Andrew Lunn865b813a2017-07-30 22:41:47 +020077#define MII_M1111_HWCFG_MODE_RTBI 0x7
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +000078#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
Andrew Lunn865b813a2017-07-30 22:41:47 +020079#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030082
Cyril Chemparathyc477d042010-08-02 09:44:53 +000083#define MII_88E1121_PHY_MSCR_REG 21
84#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
Russell King424ca4c2018-01-02 10:58:48 +000086#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
Cyril Chemparathyc477d042010-08-02 09:44:53 +000087
Andrew Lunn0b046802017-01-20 01:37:49 +010088#define MII_88E1121_MISC_TEST 0x1a
89#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
95
96#define MII_88E1510_TEMP_SENSOR 0x1b
97#define MII_88E1510_TEMP_SENSOR_MASK 0xff
98
Andrew Lunnfee2d542018-01-09 22:42:09 +010099#define MII_88E6390_MISC_TEST 0x1b
100#define MII_88E6390_MISC_TEST_SAMPLE_1S 0
101#define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
102#define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
103#define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
104#define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
105
106#define MII_88E6390_TEMP_SENSOR 0x1c
107#define MII_88E6390_TEMP_SENSOR_MASK 0xff
108#define MII_88E6390_TEMP_SENSOR_SAMPLES 10
109
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700110#define MII_88E1318S_PHY_MSCR1_REG 16
111#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700112
Michael Stapelberg3871c382013-03-11 13:56:45 +0000113/* Copper Specific Interrupt Enable Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200114#define MII_88E1318S_PHY_CSIER 0x12
Michael Stapelberg3871c382013-03-11 13:56:45 +0000115/* WOL Event Interrupt Enable */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200116#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000117
118/* LED Timer Control Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200119#define MII_88E1318S_PHY_LED_TCR 0x12
120#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
121#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
122#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000123
124/* Magic Packet MAC address registers */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200125#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
126#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
127#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
Michael Stapelberg3871c382013-03-11 13:56:45 +0000128
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200129#define MII_88E1318S_PHY_WOL_CTRL 0x10
130#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
131#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000132
Sergei Poselenov140bc922009-04-07 02:01:41 +0000133#define MII_88E1121_PHY_LED_CTRL 16
Sergei Poselenov140bc922009-04-07 02:01:41 +0000134#define MII_88E1121_PHY_LED_DEF 0x0030
Sergei Poselenov140bc922009-04-07 02:01:41 +0000135
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300136#define MII_M1011_PHY_STATUS 0x11
137#define MII_M1011_PHY_STATUS_1000 0x8000
138#define MII_M1011_PHY_STATUS_100 0x4000
139#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
140#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
141#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
142#define MII_M1011_PHY_STATUS_LINK 0x0400
143
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200144#define MII_88E3016_PHY_SPEC_CTRL 0x10
145#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
146#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
Andy Fleming76884672007-02-09 18:13:58 -0600147
Stefan Roese930b37e2016-02-18 10:59:07 +0100148#define MII_88E1510_GEN_CTRL_REG_1 0x14
149#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
150#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
151#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
152
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200153#define LPA_FIBER_1000HALF 0x40
154#define LPA_FIBER_1000FULL 0x20
155
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200156#define LPA_PAUSE_FIBER 0x180
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200157#define LPA_PAUSE_ASYM_FIBER 0x100
158
159#define ADVERTISE_FIBER_1000HALF 0x40
160#define ADVERTISE_FIBER_1000FULL 0x20
161
162#define ADVERTISE_PAUSE_FIBER 0x180
163#define ADVERTISE_PAUSE_ASYM_FIBER 0x100
164
165#define REGISTER_LINK_STATUS 0x400
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200166#define NB_FIBER_STATS 1
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200167
Andy Fleming00db8182005-07-30 19:31:23 -0400168MODULE_DESCRIPTION("Marvell PHY driver");
169MODULE_AUTHOR("Andy Fleming");
170MODULE_LICENSE("GPL");
171
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100172struct marvell_hw_stat {
173 const char *string;
174 u8 page;
175 u8 reg;
176 u8 bits;
177};
178
179static struct marvell_hw_stat marvell_hw_stats[] = {
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200180 { "phy_receive_errors_copper", 0, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100181 { "phy_idle_errors", 0, 10, 8 },
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200182 { "phy_receive_errors_fiber", 1, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100183};
184
185struct marvell_priv {
186 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
Andrew Lunn0b046802017-01-20 01:37:49 +0100187 char *hwmon_name;
188 struct device *hwmon_dev;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100189};
190
Russell King424ca4c2018-01-02 10:58:48 +0000191static int marvell_read_page(struct phy_device *phydev)
Andrew Lunn6427bb22017-05-17 03:26:03 +0200192{
Russell King424ca4c2018-01-02 10:58:48 +0000193 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
194}
195
196static int marvell_write_page(struct phy_device *phydev, int page)
197{
198 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
Andrew Lunn6427bb22017-05-17 03:26:03 +0200199}
200
201static int marvell_set_page(struct phy_device *phydev, int page)
202{
203 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
204}
205
Andy Fleming00db8182005-07-30 19:31:23 -0400206static int marvell_ack_interrupt(struct phy_device *phydev)
207{
208 int err;
209
210 /* Clear the interrupts by reading the reg */
211 err = phy_read(phydev, MII_M1011_IEVENT);
212
213 if (err < 0)
214 return err;
215
216 return 0;
217}
218
219static int marvell_config_intr(struct phy_device *phydev)
220{
221 int err;
222
Andy Fleming76884672007-02-09 18:13:58 -0600223 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
Andrew Lunn23beb382017-05-17 03:26:04 +0200224 err = phy_write(phydev, MII_M1011_IMASK,
225 MII_M1011_IMASK_INIT);
Andy Fleming00db8182005-07-30 19:31:23 -0400226 else
Andrew Lunn23beb382017-05-17 03:26:04 +0200227 err = phy_write(phydev, MII_M1011_IMASK,
228 MII_M1011_IMASK_CLEAR);
Andy Fleming00db8182005-07-30 19:31:23 -0400229
230 return err;
231}
232
David Thomson239aa552015-07-10 16:28:25 +1200233static int marvell_set_polarity(struct phy_device *phydev, int polarity)
234{
235 int reg;
236 int err;
237 int val;
238
239 /* get the current settings */
240 reg = phy_read(phydev, MII_M1011_PHY_SCR);
241 if (reg < 0)
242 return reg;
243
244 val = reg;
245 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
246 switch (polarity) {
247 case ETH_TP_MDI:
248 val |= MII_M1011_PHY_SCR_MDI;
249 break;
250 case ETH_TP_MDI_X:
251 val |= MII_M1011_PHY_SCR_MDI_X;
252 break;
253 case ETH_TP_MDI_AUTO:
254 case ETH_TP_MDI_INVALID:
255 default:
256 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
257 break;
258 }
259
260 if (val != reg) {
261 /* Set the new polarity value in the register */
262 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
263 if (err)
264 return err;
265 }
266
267 return 0;
268}
269
Andrew Lunn6ef05eb2017-07-30 22:41:50 +0200270static int marvell_set_downshift(struct phy_device *phydev, bool enable,
271 u8 retries)
272{
273 int reg;
274
275 reg = phy_read(phydev, MII_M1011_PHY_SCR);
276 if (reg < 0)
277 return reg;
278
279 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
280 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
281 if (enable)
282 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
283
284 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
285}
286
Andy Fleming00db8182005-07-30 19:31:23 -0400287static int marvell_config_aneg(struct phy_device *phydev)
288{
289 int err;
290
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530291 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Andy Fleming76884672007-02-09 18:13:58 -0600292 if (err < 0)
293 return err;
294
295 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
296 MII_M1111_PHY_LED_DIRECT);
297 if (err < 0)
298 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400299
300 err = genphy_config_aneg(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000301 if (err < 0)
302 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400303
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000304 if (phydev->autoneg != AUTONEG_ENABLE) {
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200305 /* A write to speed/duplex bits (that is performed by
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000306 * genphy_config_aneg() call above) must be followed by
307 * a software reset. Otherwise, the write has no effect.
308 */
Andrew Lunn34386342017-07-30 22:41:45 +0200309 err = genphy_soft_reset(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000310 if (err < 0)
311 return err;
312 }
313
314 return 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400315}
316
Andrew Lunnf2899782017-05-23 17:49:13 +0200317static int m88e1101_config_aneg(struct phy_device *phydev)
318{
319 int err;
320
321 /* This Marvell PHY has an errata which requires
322 * that certain registers get written in order
323 * to restart autonegotiation
324 */
Andrew Lunn34386342017-07-30 22:41:45 +0200325 err = genphy_soft_reset(phydev);
Andrew Lunnf2899782017-05-23 17:49:13 +0200326 if (err < 0)
327 return err;
328
329 err = phy_write(phydev, 0x1d, 0x1f);
330 if (err < 0)
331 return err;
332
333 err = phy_write(phydev, 0x1e, 0x200c);
334 if (err < 0)
335 return err;
336
337 err = phy_write(phydev, 0x1d, 0x5);
338 if (err < 0)
339 return err;
340
341 err = phy_write(phydev, 0x1e, 0);
342 if (err < 0)
343 return err;
344
345 err = phy_write(phydev, 0x1e, 0x100);
346 if (err < 0)
347 return err;
348
349 return marvell_config_aneg(phydev);
350}
351
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530352static int m88e1111_config_aneg(struct phy_device *phydev)
353{
354 int err;
355
356 /* The Marvell PHY has an errata which requires
357 * that certain registers get written in order
358 * to restart autonegotiation
359 */
Andrew Lunn34386342017-07-30 22:41:45 +0200360 err = genphy_soft_reset(phydev);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530361
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530362 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530363 if (err < 0)
364 return err;
365
366 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
367 MII_M1111_PHY_LED_DIRECT);
368 if (err < 0)
369 return err;
370
371 err = genphy_config_aneg(phydev);
372 if (err < 0)
373 return err;
374
375 if (phydev->autoneg != AUTONEG_ENABLE) {
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530376 /* A write to speed/duplex bits (that is performed by
377 * genphy_config_aneg() call above) must be followed by
378 * a software reset. Otherwise, the write has no effect.
379 */
Andrew Lunn34386342017-07-30 22:41:45 +0200380 err = genphy_soft_reset(phydev);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530381 if (err < 0)
382 return err;
383 }
384
385 return 0;
386}
387
David Daneycf41a512010-11-19 12:13:18 +0000388#ifdef CONFIG_OF_MDIO
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200389/* Set and/or override some configuration registers based on the
David Daneycf41a512010-11-19 12:13:18 +0000390 * marvell,reg-init property stored in the of_node for the phydev.
391 *
392 * marvell,reg-init = <reg-page reg mask value>,...;
393 *
394 * There may be one or more sets of <reg-page reg mask value>:
395 *
396 * reg-page: which register bank to use.
397 * reg: the register.
398 * mask: if non-zero, ANDed with existing register value.
399 * value: ORed with the masked value and written to the regiser.
400 *
401 */
402static int marvell_of_reg_init(struct phy_device *phydev)
403{
404 const __be32 *paddr;
Russell King424ca4c2018-01-02 10:58:48 +0000405 int len, i, saved_page, current_page, ret = 0;
David Daneycf41a512010-11-19 12:13:18 +0000406
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100407 if (!phydev->mdio.dev.of_node)
David Daneycf41a512010-11-19 12:13:18 +0000408 return 0;
409
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100410 paddr = of_get_property(phydev->mdio.dev.of_node,
411 "marvell,reg-init", &len);
David Daneycf41a512010-11-19 12:13:18 +0000412 if (!paddr || len < (4 * sizeof(*paddr)))
413 return 0;
414
Russell King424ca4c2018-01-02 10:58:48 +0000415 saved_page = phy_save_page(phydev);
David Daneycf41a512010-11-19 12:13:18 +0000416 if (saved_page < 0)
Russell King424ca4c2018-01-02 10:58:48 +0000417 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000418 current_page = saved_page;
419
David Daneycf41a512010-11-19 12:13:18 +0000420 len /= sizeof(*paddr);
421 for (i = 0; i < len - 3; i += 4) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200422 u16 page = be32_to_cpup(paddr + i);
David Daneycf41a512010-11-19 12:13:18 +0000423 u16 reg = be32_to_cpup(paddr + i + 1);
424 u16 mask = be32_to_cpup(paddr + i + 2);
425 u16 val_bits = be32_to_cpup(paddr + i + 3);
426 int val;
427
Andrew Lunn6427bb22017-05-17 03:26:03 +0200428 if (page != current_page) {
429 current_page = page;
Russell King424ca4c2018-01-02 10:58:48 +0000430 ret = marvell_write_page(phydev, page);
David Daneycf41a512010-11-19 12:13:18 +0000431 if (ret < 0)
432 goto err;
433 }
434
435 val = 0;
436 if (mask) {
Russell King424ca4c2018-01-02 10:58:48 +0000437 val = __phy_read(phydev, reg);
David Daneycf41a512010-11-19 12:13:18 +0000438 if (val < 0) {
439 ret = val;
440 goto err;
441 }
442 val &= mask;
443 }
444 val |= val_bits;
445
Russell King424ca4c2018-01-02 10:58:48 +0000446 ret = __phy_write(phydev, reg, val);
David Daneycf41a512010-11-19 12:13:18 +0000447 if (ret < 0)
448 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000449 }
450err:
Russell King424ca4c2018-01-02 10:58:48 +0000451 return phy_restore_page(phydev, saved_page, ret);
David Daneycf41a512010-11-19 12:13:18 +0000452}
453#else
454static int marvell_of_reg_init(struct phy_device *phydev)
455{
456 return 0;
457}
458#endif /* CONFIG_OF_MDIO */
459
Andrew Lunn864dc722017-07-30 22:41:48 +0200460static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
Sergei Poselenov140bc922009-04-07 02:01:41 +0000461{
Russell King424ca4c2018-01-02 10:58:48 +0000462 int mscr;
Andrew Lunn864dc722017-07-30 22:41:48 +0200463
464 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
Russell King424ca4c2018-01-02 10:58:48 +0000465 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
466 MII_88E1121_PHY_MSCR_TX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200467 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
Russell King424ca4c2018-01-02 10:58:48 +0000468 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200469 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
Russell King424ca4c2018-01-02 10:58:48 +0000470 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
471 else
472 mscr = 0;
Andrew Lunn864dc722017-07-30 22:41:48 +0200473
Russell King424ca4c2018-01-02 10:58:48 +0000474 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
475 MII_88E1121_PHY_MSCR_REG,
476 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
Andrew Lunn864dc722017-07-30 22:41:48 +0200477}
478
479static int m88e1121_config_aneg(struct phy_device *phydev)
480{
481 int err = 0;
482
483 if (phy_interface_is_rgmii(phydev)) {
484 err = m88e1121_config_aneg_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000485 if (err < 0)
Andrew Lunn864dc722017-07-30 22:41:48 +0200486 return err;
487 }
488
Andrew Lunn34386342017-07-30 22:41:45 +0200489 err = genphy_soft_reset(phydev);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000490 if (err < 0)
491 return err;
492
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200493 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000494 if (err < 0)
495 return err;
496
Clemens Gruberfdecf362016-06-11 17:21:26 +0200497 return genphy_config_aneg(phydev);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000498}
499
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700500static int m88e1318_config_aneg(struct phy_device *phydev)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700501{
Russell King424ca4c2018-01-02 10:58:48 +0000502 int err;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700503
Russell King424ca4c2018-01-02 10:58:48 +0000504 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
505 MII_88E1318S_PHY_MSCR1_REG,
506 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700507 if (err < 0)
508 return err;
509
510 return m88e1121_config_aneg(phydev);
511}
512
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200513/**
514 * ethtool_adv_to_fiber_adv_t
515 * @ethadv: the ethtool advertisement settings
516 *
517 * A small helper function that translates ethtool advertisement
518 * settings to phy autonegotiation advertisements for the
519 * MII_ADV register for fiber link.
520 */
521static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
522{
523 u32 result = 0;
524
525 if (ethadv & ADVERTISED_1000baseT_Half)
526 result |= ADVERTISE_FIBER_1000HALF;
527 if (ethadv & ADVERTISED_1000baseT_Full)
528 result |= ADVERTISE_FIBER_1000FULL;
529
530 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
531 result |= LPA_PAUSE_ASYM_FIBER;
532 else if (ethadv & ADVERTISE_PAUSE_CAP)
533 result |= (ADVERTISE_PAUSE_FIBER
534 & (~ADVERTISE_PAUSE_ASYM_FIBER));
535
536 return result;
537}
538
539/**
540 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
541 * @phydev: target phy_device struct
542 *
543 * Description: If auto-negotiation is enabled, we configure the
544 * advertising, and then restart auto-negotiation. If it is not
545 * enabled, then we write the BMCR. Adapted for fiber link in
546 * some Marvell's devices.
547 */
548static int marvell_config_aneg_fiber(struct phy_device *phydev)
549{
550 int changed = 0;
551 int err;
552 int adv, oldadv;
553 u32 advertise;
554
555 if (phydev->autoneg != AUTONEG_ENABLE)
556 return genphy_setup_forced(phydev);
557
558 /* Only allow advertising what this PHY supports */
559 phydev->advertising &= phydev->supported;
560 advertise = phydev->advertising;
561
562 /* Setup fiber advertisement */
563 adv = phy_read(phydev, MII_ADVERTISE);
564 if (adv < 0)
565 return adv;
566
567 oldadv = adv;
568 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
569 | LPA_PAUSE_FIBER);
570 adv |= ethtool_adv_to_fiber_adv_t(advertise);
571
572 if (adv != oldadv) {
573 err = phy_write(phydev, MII_ADVERTISE, adv);
574 if (err < 0)
575 return err;
576
577 changed = 1;
578 }
579
580 if (changed == 0) {
581 /* Advertisement hasn't changed, but maybe aneg was never on to
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200582 * begin with? Or maybe phy was isolated?
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200583 */
584 int ctl = phy_read(phydev, MII_BMCR);
585
586 if (ctl < 0)
587 return ctl;
588
589 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
590 changed = 1; /* do restart aneg */
591 }
592
593 /* Only restart aneg if we are advertising something different
594 * than we were before.
595 */
596 if (changed > 0)
597 changed = genphy_restart_aneg(phydev);
598
599 return changed;
600}
601
Michal Simek10e24caa2013-05-30 20:08:27 +0000602static int m88e1510_config_aneg(struct phy_device *phydev)
603{
604 int err;
605
Andrew Lunn52295662017-05-25 21:42:08 +0200606 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200607 if (err < 0)
608 goto error;
609
610 /* Configure the copper link first */
Michal Simek10e24caa2013-05-30 20:08:27 +0000611 err = m88e1318_config_aneg(phydev);
612 if (err < 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200613 goto error;
Michal Simek10e24caa2013-05-30 20:08:27 +0000614
Russell Kingde9c4e02017-12-13 09:22:03 +0000615 /* Do not touch the fiber page if we're in copper->sgmii mode */
616 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
617 return 0;
618
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200619 /* Then the fiber link */
Andrew Lunn52295662017-05-25 21:42:08 +0200620 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200621 if (err < 0)
622 goto error;
623
624 err = marvell_config_aneg_fiber(phydev);
625 if (err < 0)
626 goto error;
627
Andrew Lunn52295662017-05-25 21:42:08 +0200628 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200629
630error:
Andrew Lunn52295662017-05-25 21:42:08 +0200631 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200632 return err;
Clemens Gruber79be1a12016-02-15 23:46:45 +0100633}
634
635static int marvell_config_init(struct phy_device *phydev)
636{
637 /* Set registers from marvell,reg-init DT property */
Michal Simek10e24caa2013-05-30 20:08:27 +0000638 return marvell_of_reg_init(phydev);
639}
640
Michal Simek3da09a52013-05-30 20:08:26 +0000641static int m88e1116r_config_init(struct phy_device *phydev)
642{
Michal Simek3da09a52013-05-30 20:08:26 +0000643 int err;
644
Andrew Lunn34386342017-07-30 22:41:45 +0200645 err = genphy_soft_reset(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000646 if (err < 0)
647 return err;
648
649 mdelay(500);
650
Andrew Lunn52295662017-05-25 21:42:08 +0200651 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Michal Simek3da09a52013-05-30 20:08:26 +0000652 if (err < 0)
653 return err;
654
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200655 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
656 if (err < 0)
657 return err;
658
Andrew Lunn6ef05eb2017-07-30 22:41:50 +0200659 err = marvell_set_downshift(phydev, true, 8);
Michal Simek3da09a52013-05-30 20:08:26 +0000660 if (err < 0)
661 return err;
662
Andrew Lunn14fc0ab2017-10-31 20:31:28 +0100663 if (phy_interface_is_rgmii(phydev)) {
664 err = m88e1121_config_aneg_rgmii_delays(phydev);
665 if (err < 0)
666 return err;
667 }
Michal Simek3da09a52013-05-30 20:08:26 +0000668
Andrew Lunn34386342017-07-30 22:41:45 +0200669 err = genphy_soft_reset(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000670 if (err < 0)
671 return err;
672
Clemens Gruber79be1a12016-02-15 23:46:45 +0100673 return marvell_config_init(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000674}
675
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200676static int m88e3016_config_init(struct phy_device *phydev)
677{
Russell Kingfea23fb2018-01-02 10:58:58 +0000678 int ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200679
680 /* Enable Scrambler and Auto-Crossover */
Russell Kingfea23fb2018-01-02 10:58:58 +0000681 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +0000682 MII_88E3016_DISABLE_SCRAMBLER,
Russell Kingfea23fb2018-01-02 10:58:58 +0000683 MII_88E3016_AUTO_MDIX_CROSSOVER);
684 if (ret < 0)
685 return ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200686
Clemens Gruber79be1a12016-02-15 23:46:45 +0100687 return marvell_config_init(phydev);
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200688}
689
Andrew Lunn865b813a2017-07-30 22:41:47 +0200690static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
691 u16 mode,
692 int fibre_copper_auto)
693{
Andrew Lunn865b813a2017-07-30 22:41:47 +0200694 if (fibre_copper_auto)
Russell Kingfea23fb2018-01-02 10:58:58 +0000695 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
Andrew Lunn865b813a2017-07-30 22:41:47 +0200696
Russell Kingfea23fb2018-01-02 10:58:58 +0000697 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
Russell Kingf1028522018-01-05 16:07:10 +0000698 MII_M1111_HWCFG_MODE_MASK |
699 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
700 MII_M1111_HWCFG_FIBER_COPPER_RES,
Russell Kingfea23fb2018-01-02 10:58:58 +0000701 mode);
Andrew Lunn865b813a2017-07-30 22:41:47 +0200702}
703
Andrew Lunn61111592017-07-30 22:41:46 +0200704static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
Kim Phillips895ee682007-06-05 18:46:47 +0800705{
Russell Kingfea23fb2018-01-02 10:58:58 +0000706 int delay;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200707
708 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000709 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200710 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000711 delay = MII_M1111_RGMII_RX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200712 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000713 delay = MII_M1111_RGMII_TX_DELAY;
714 } else {
715 delay = 0;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200716 }
717
Russell Kingfea23fb2018-01-02 10:58:58 +0000718 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
Russell Kingf1028522018-01-05 16:07:10 +0000719 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
Russell Kingfea23fb2018-01-02 10:58:58 +0000720 delay);
Andrew Lunn61111592017-07-30 22:41:46 +0200721}
722
723static int m88e1111_config_init_rgmii(struct phy_device *phydev)
724{
725 int temp;
726 int err;
727
728 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200729 if (err < 0)
730 return err;
731
732 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
733 if (temp < 0)
734 return temp;
735
736 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
737
738 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
739 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
740 else
741 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
742
743 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
744}
745
746static int m88e1111_config_init_sgmii(struct phy_device *phydev)
747{
748 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200749
Andrew Lunn865b813a2017-07-30 22:41:47 +0200750 err = m88e1111_config_init_hwcfg_mode(
751 phydev,
752 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
753 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200754 if (err < 0)
755 return err;
756
757 /* make sure copper is selected */
Andrew Lunn52295662017-05-25 21:42:08 +0200758 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200759}
760
761static int m88e1111_config_init_rtbi(struct phy_device *phydev)
762{
Andrew Lunn61111592017-07-30 22:41:46 +0200763 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200764
Andrew Lunn61111592017-07-30 22:41:46 +0200765 err = m88e1111_config_init_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000766 if (err < 0)
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200767 return err;
768
Andrew Lunn865b813a2017-07-30 22:41:47 +0200769 err = m88e1111_config_init_hwcfg_mode(
770 phydev,
771 MII_M1111_HWCFG_MODE_RTBI,
772 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200773 if (err < 0)
774 return err;
775
776 /* soft reset */
Andrew Lunn34386342017-07-30 22:41:45 +0200777 err = genphy_soft_reset(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200778 if (err < 0)
779 return err;
780
Andrew Lunn865b813a2017-07-30 22:41:47 +0200781 return m88e1111_config_init_hwcfg_mode(
782 phydev,
783 MII_M1111_HWCFG_MODE_RTBI,
784 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200785}
786
787static int m88e1111_config_init(struct phy_device *phydev)
788{
789 int err;
790
Florian Fainelli32a64162015-05-26 12:19:59 -0700791 if (phy_interface_is_rgmii(phydev)) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200792 err = m88e1111_config_init_rgmii(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000793 if (err < 0)
Kim Phillips895ee682007-06-05 18:46:47 +0800794 return err;
795 }
796
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500797 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200798 err = m88e1111_config_init_sgmii(phydev);
Madalin Bucur07151bc2015-08-07 17:07:50 +0800799 if (err < 0)
800 return err;
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500801 }
802
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000803 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200804 err = m88e1111_config_init_rtbi(phydev);
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000805 if (err < 0)
806 return err;
807 }
808
David Daneycf41a512010-11-19 12:13:18 +0000809 err = marvell_of_reg_init(phydev);
810 if (err < 0)
811 return err;
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000812
Andrew Lunn34386342017-07-30 22:41:45 +0200813 return genphy_soft_reset(phydev);
Kim Phillips895ee682007-06-05 18:46:47 +0800814}
815
Clemens Gruberfdecf362016-06-11 17:21:26 +0200816static int m88e1121_config_init(struct phy_device *phydev)
817{
Russell King424ca4c2018-01-02 10:58:48 +0000818 int err;
Clemens Gruberfdecf362016-06-11 17:21:26 +0200819
820 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
Russell King424ca4c2018-01-02 10:58:48 +0000821 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
822 MII_88E1121_PHY_LED_CTRL,
823 MII_88E1121_PHY_LED_DEF);
Clemens Gruberfdecf362016-06-11 17:21:26 +0200824 if (err < 0)
825 return err;
826
Clemens Gruberfdecf362016-06-11 17:21:26 +0200827 /* Set marvell,reg-init configuration from device tree */
828 return marvell_config_init(phydev);
829}
830
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200831static int m88e1318_config_init(struct phy_device *phydev)
832{
833 if (phy_interrupt_is_valid(phydev)) {
834 int err = phy_modify_paged(
835 phydev, MII_MARVELL_LED_PAGE,
836 MII_88E1318S_PHY_LED_TCR,
837 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
838 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
839 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
840 if (err < 0)
841 return err;
842 }
843
844 return m88e1121_config_init(phydev);
845}
846
Clemens Gruber407353e2016-02-23 20:16:58 +0100847static int m88e1510_config_init(struct phy_device *phydev)
848{
849 int err;
Clemens Gruber407353e2016-02-23 20:16:58 +0100850
851 /* SGMII-to-Copper mode initialization */
852 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Russell King6623c0f2017-12-15 16:10:20 +0000853 u32 pause;
854
Clemens Gruber407353e2016-02-23 20:16:58 +0100855 /* Select page 18 */
Andrew Lunn6427bb22017-05-17 03:26:03 +0200856 err = marvell_set_page(phydev, 18);
Clemens Gruber407353e2016-02-23 20:16:58 +0100857 if (err < 0)
858 return err;
859
860 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
Russell Kingfea23fb2018-01-02 10:58:58 +0000861 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
Russell Kingf1028522018-01-05 16:07:10 +0000862 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
Russell Kingfea23fb2018-01-02 10:58:58 +0000863 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
Clemens Gruber407353e2016-02-23 20:16:58 +0100864 if (err < 0)
865 return err;
866
867 /* PHY reset is necessary after changing MODE[2:0] */
Russell Kingfea23fb2018-01-02 10:58:58 +0000868 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
869 MII_88E1510_GEN_CTRL_REG_1_RESET);
Clemens Gruber407353e2016-02-23 20:16:58 +0100870 if (err < 0)
871 return err;
872
873 /* Reset page selection */
Andrew Lunn52295662017-05-25 21:42:08 +0200874 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Clemens Gruber407353e2016-02-23 20:16:58 +0100875 if (err < 0)
876 return err;
Russell King6623c0f2017-12-15 16:10:20 +0000877
878 /* There appears to be a bug in the 88e1512 when used in
Colin Ian Kingcc1122b2018-03-01 10:23:03 +0000879 * SGMII to copper mode, where the AN advertisement register
Russell King6623c0f2017-12-15 16:10:20 +0000880 * clears the pause bits each time a negotiation occurs.
881 * This means we can never be truely sure what was advertised,
882 * so disable Pause support.
883 */
884 pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause;
885 phydev->supported &= ~pause;
886 phydev->advertising &= ~pause;
Clemens Gruber407353e2016-02-23 20:16:58 +0100887 }
888
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200889 return m88e1318_config_init(phydev);
Clemens Gruber407353e2016-02-23 20:16:58 +0100890}
891
Ron Madrid605f1962008-11-06 09:05:26 +0000892static int m88e1118_config_aneg(struct phy_device *phydev)
893{
894 int err;
895
Andrew Lunn34386342017-07-30 22:41:45 +0200896 err = genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +0000897 if (err < 0)
898 return err;
899
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200900 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Ron Madrid605f1962008-11-06 09:05:26 +0000901 if (err < 0)
902 return err;
903
904 err = genphy_config_aneg(phydev);
905 return 0;
906}
907
908static int m88e1118_config_init(struct phy_device *phydev)
909{
910 int err;
911
912 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200913 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000914 if (err < 0)
915 return err;
916
917 /* Enable 1000 Mbit */
918 err = phy_write(phydev, 0x15, 0x1070);
919 if (err < 0)
920 return err;
921
922 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200923 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000924 if (err < 0)
925 return err;
926
927 /* Adjust LED Control */
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +1000928 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
929 err = phy_write(phydev, 0x10, 0x1100);
930 else
931 err = phy_write(phydev, 0x10, 0x021e);
Ron Madrid605f1962008-11-06 09:05:26 +0000932 if (err < 0)
933 return err;
934
David Daneycf41a512010-11-19 12:13:18 +0000935 err = marvell_of_reg_init(phydev);
936 if (err < 0)
937 return err;
938
Ron Madrid605f1962008-11-06 09:05:26 +0000939 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +0200940 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000941 if (err < 0)
942 return err;
943
Andrew Lunn34386342017-07-30 22:41:45 +0200944 return genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +0000945}
946
David Daney90600732010-11-19 11:58:53 +0000947static int m88e1149_config_init(struct phy_device *phydev)
948{
949 int err;
950
951 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200952 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
David Daney90600732010-11-19 11:58:53 +0000953 if (err < 0)
954 return err;
955
956 /* Enable 1000 Mbit */
957 err = phy_write(phydev, 0x15, 0x1048);
958 if (err < 0)
959 return err;
960
David Daneycf41a512010-11-19 12:13:18 +0000961 err = marvell_of_reg_init(phydev);
962 if (err < 0)
963 return err;
964
David Daney90600732010-11-19 11:58:53 +0000965 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +0200966 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
David Daney90600732010-11-19 11:58:53 +0000967 if (err < 0)
968 return err;
969
Andrew Lunn34386342017-07-30 22:41:45 +0200970 return genphy_soft_reset(phydev);
David Daney90600732010-11-19 11:58:53 +0000971}
972
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200973static int m88e1145_config_init_rgmii(struct phy_device *phydev)
974{
975 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200976
Andrew Lunn61111592017-07-30 22:41:46 +0200977 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200978 if (err < 0)
979 return err;
980
981 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
982 err = phy_write(phydev, 0x1d, 0x0012);
983 if (err < 0)
984 return err;
985
Russell Kingf1028522018-01-05 16:07:10 +0000986 err = phy_modify(phydev, 0x1e, 0x0fc0,
Russell Kingfea23fb2018-01-02 10:58:58 +0000987 2 << 9 | /* 36 ohm */
988 2 << 6); /* 39 ohm */
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200989 if (err < 0)
990 return err;
991
992 err = phy_write(phydev, 0x1d, 0x3);
993 if (err < 0)
994 return err;
995
996 err = phy_write(phydev, 0x1e, 0x8000);
997 }
998 return err;
999}
1000
1001static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1002{
Andrew Lunn865b813a2017-07-30 22:41:47 +02001003 return m88e1111_config_init_hwcfg_mode(
1004 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1005 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001006}
1007
Andy Fleming76884672007-02-09 18:13:58 -06001008static int m88e1145_config_init(struct phy_device *phydev)
1009{
1010 int err;
1011
1012 /* Take care of errata E0 & E1 */
1013 err = phy_write(phydev, 0x1d, 0x001b);
1014 if (err < 0)
1015 return err;
1016
1017 err = phy_write(phydev, 0x1e, 0x418f);
1018 if (err < 0)
1019 return err;
1020
1021 err = phy_write(phydev, 0x1d, 0x0016);
1022 if (err < 0)
1023 return err;
1024
1025 err = phy_write(phydev, 0x1e, 0xa2da);
1026 if (err < 0)
1027 return err;
1028
Kim Phillips895ee682007-06-05 18:46:47 +08001029 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001030 err = m88e1145_config_init_rgmii(phydev);
Andy Fleming76884672007-02-09 18:13:58 -06001031 if (err < 0)
1032 return err;
Andy Fleming76884672007-02-09 18:13:58 -06001033 }
1034
Viet Nga Daob0224172014-10-23 19:41:53 -07001035 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001036 err = m88e1145_config_init_sgmii(phydev);
Viet Nga Daob0224172014-10-23 19:41:53 -07001037 if (err < 0)
1038 return err;
1039 }
1040
David Daneycf41a512010-11-19 12:13:18 +00001041 err = marvell_of_reg_init(phydev);
1042 if (err < 0)
1043 return err;
1044
Andy Fleming76884672007-02-09 18:13:58 -06001045 return 0;
1046}
Andy Fleming00db8182005-07-30 19:31:23 -04001047
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001048/**
1049 * fiber_lpa_to_ethtool_lpa_t
1050 * @lpa: value of the MII_LPA register for fiber link
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001051 *
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001052 * A small helper function that translates MII_LPA
1053 * bits to ethtool LP advertisement settings.
1054 */
1055static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1056{
1057 u32 result = 0;
1058
1059 if (lpa & LPA_FIBER_1000HALF)
1060 result |= ADVERTISED_1000baseT_Half;
1061 if (lpa & LPA_FIBER_1000FULL)
1062 result |= ADVERTISED_1000baseT_Full;
1063
1064 return result;
1065}
1066
1067/**
1068 * marvell_update_link - update link status in real time in @phydev
1069 * @phydev: target phy_device struct
1070 *
1071 * Description: Update the value in phydev->link to reflect the
1072 * current link value.
1073 */
1074static int marvell_update_link(struct phy_device *phydev, int fiber)
1075{
1076 int status;
1077
1078 /* Use the generic register for copper link, or specific
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001079 * register for fiber case
1080 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001081 if (fiber) {
1082 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1083 if (status < 0)
1084 return status;
1085
1086 if ((status & REGISTER_LINK_STATUS) == 0)
1087 phydev->link = 0;
1088 else
1089 phydev->link = 1;
1090 } else {
1091 return genphy_update_link(phydev);
1092 }
1093
1094 return 0;
1095}
1096
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001097static int marvell_read_status_page_an(struct phy_device *phydev,
1098 int fiber)
1099{
1100 int status;
1101 int lpa;
1102 int lpagb;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001103
1104 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1105 if (status < 0)
1106 return status;
1107
1108 lpa = phy_read(phydev, MII_LPA);
1109 if (lpa < 0)
1110 return lpa;
1111
1112 lpagb = phy_read(phydev, MII_STAT1000);
1113 if (lpagb < 0)
1114 return lpagb;
1115
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001116 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1117 phydev->duplex = DUPLEX_FULL;
1118 else
1119 phydev->duplex = DUPLEX_HALF;
1120
1121 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1122 phydev->pause = 0;
1123 phydev->asym_pause = 0;
1124
1125 switch (status) {
1126 case MII_M1011_PHY_STATUS_1000:
1127 phydev->speed = SPEED_1000;
1128 break;
1129
1130 case MII_M1011_PHY_STATUS_100:
1131 phydev->speed = SPEED_100;
1132 break;
1133
1134 default:
1135 phydev->speed = SPEED_10;
1136 break;
1137 }
1138
1139 if (!fiber) {
1140 phydev->lp_advertising =
1141 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1142 mii_lpa_to_ethtool_lpa_t(lpa);
1143
1144 if (phydev->duplex == DUPLEX_FULL) {
1145 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1146 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1147 }
1148 } else {
1149 /* The fiber link is only 1000M capable */
1150 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1151
1152 if (phydev->duplex == DUPLEX_FULL) {
1153 if (!(lpa & LPA_PAUSE_FIBER)) {
1154 phydev->pause = 0;
1155 phydev->asym_pause = 0;
1156 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1157 phydev->pause = 1;
1158 phydev->asym_pause = 1;
1159 } else {
1160 phydev->pause = 1;
1161 phydev->asym_pause = 0;
1162 }
1163 }
1164 }
1165 return 0;
1166}
1167
1168static int marvell_read_status_page_fixed(struct phy_device *phydev)
1169{
1170 int bmcr = phy_read(phydev, MII_BMCR);
1171
1172 if (bmcr < 0)
1173 return bmcr;
1174
1175 if (bmcr & BMCR_FULLDPLX)
1176 phydev->duplex = DUPLEX_FULL;
1177 else
1178 phydev->duplex = DUPLEX_HALF;
1179
1180 if (bmcr & BMCR_SPEED1000)
1181 phydev->speed = SPEED_1000;
1182 else if (bmcr & BMCR_SPEED100)
1183 phydev->speed = SPEED_100;
1184 else
1185 phydev->speed = SPEED_10;
1186
1187 phydev->pause = 0;
1188 phydev->asym_pause = 0;
1189 phydev->lp_advertising = 0;
1190
1191 return 0;
1192}
1193
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001194/* marvell_read_status_page
1195 *
Jeff Garzikf0c88f92008-03-25 23:53:24 -04001196 * Description:
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001197 * Check the link, then figure out the current state
1198 * by comparing what we advertise with what the link partner
1199 * advertises. Start by checking the gigabit possibilities,
1200 * then move on to 10/100.
1201 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001202static int marvell_read_status_page(struct phy_device *phydev, int page)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001203{
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001204 int fiber;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001205 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001206
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001207 /* Detect and update the link, but return if there
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001208 * was an error
1209 */
Andrew Lunn52295662017-05-25 21:42:08 +02001210 if (page == MII_MARVELL_FIBER_PAGE)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001211 fiber = 1;
1212 else
1213 fiber = 0;
1214
1215 err = marvell_update_link(phydev, fiber);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001216 if (err)
1217 return err;
1218
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001219 if (phydev->autoneg == AUTONEG_ENABLE)
1220 err = marvell_read_status_page_an(phydev, fiber);
1221 else
1222 err = marvell_read_status_page_fixed(phydev);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001223
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001224 return err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001225}
1226
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001227/* marvell_read_status
1228 *
1229 * Some Marvell's phys have two modes: fiber and copper.
1230 * Both need status checked.
1231 * Description:
1232 * First, check the fiber link and status.
1233 * If the fiber link is down, check the copper link and status which
1234 * will be the default value if both link are down.
1235 */
1236static int marvell_read_status(struct phy_device *phydev)
1237{
1238 int err;
1239
1240 /* Check the fiber mode first */
Russell Kinga13c06522017-01-10 23:13:45 +00001241 if (phydev->supported & SUPPORTED_FIBRE &&
1242 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
Andrew Lunn52295662017-05-25 21:42:08 +02001243 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001244 if (err < 0)
1245 goto error;
1246
Andrew Lunn52295662017-05-25 21:42:08 +02001247 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001248 if (err < 0)
1249 goto error;
1250
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001251 /* If the fiber link is up, it is the selected and
1252 * used link. In this case, we need to stay in the
1253 * fiber page. Please to be careful about that, avoid
1254 * to restore Copper page in other functions which
1255 * could break the behaviour for some fiber phy like
1256 * 88E1512.
1257 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001258 if (phydev->link)
1259 return 0;
1260
1261 /* If fiber link is down, check and save copper mode state */
Andrew Lunn52295662017-05-25 21:42:08 +02001262 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001263 if (err < 0)
1264 goto error;
1265 }
1266
Andrew Lunn52295662017-05-25 21:42:08 +02001267 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001268
1269error:
Andrew Lunn52295662017-05-25 21:42:08 +02001270 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001271 return err;
1272}
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001273
1274/* marvell_suspend
1275 *
1276 * Some Marvell's phys have two modes: fiber and copper.
1277 * Both need to be suspended
1278 */
1279static int marvell_suspend(struct phy_device *phydev)
1280{
1281 int err;
1282
1283 /* Suspend the fiber mode first */
1284 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001285 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001286 if (err < 0)
1287 goto error;
1288
1289 /* With the page set, use the generic suspend */
1290 err = genphy_suspend(phydev);
1291 if (err < 0)
1292 goto error;
1293
1294 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001295 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001296 if (err < 0)
1297 goto error;
1298 }
1299
1300 /* With the page set, use the generic suspend */
1301 return genphy_suspend(phydev);
1302
1303error:
Andrew Lunn52295662017-05-25 21:42:08 +02001304 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001305 return err;
1306}
1307
1308/* marvell_resume
1309 *
1310 * Some Marvell's phys have two modes: fiber and copper.
1311 * Both need to be resumed
1312 */
1313static int marvell_resume(struct phy_device *phydev)
1314{
1315 int err;
1316
1317 /* Resume the fiber mode first */
1318 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001319 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001320 if (err < 0)
1321 goto error;
1322
1323 /* With the page set, use the generic resume */
1324 err = genphy_resume(phydev);
1325 if (err < 0)
1326 goto error;
1327
1328 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001329 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001330 if (err < 0)
1331 goto error;
1332 }
1333
1334 /* With the page set, use the generic resume */
1335 return genphy_resume(phydev);
1336
1337error:
Andrew Lunn52295662017-05-25 21:42:08 +02001338 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001339 return err;
1340}
1341
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001342static int marvell_aneg_done(struct phy_device *phydev)
1343{
1344 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
Andrew Lunne69d9ed2017-05-17 03:26:00 +02001345
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001346 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1347}
1348
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00001349static int m88e1121_did_interrupt(struct phy_device *phydev)
1350{
1351 int imask;
1352
1353 imask = phy_read(phydev, MII_M1011_IEVENT);
1354
1355 if (imask & MII_M1011_IMASK_INIT)
1356 return 1;
1357
1358 return 0;
1359}
1360
Andrew Lunn23beb382017-05-17 03:26:04 +02001361static void m88e1318_get_wol(struct phy_device *phydev,
1362 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001363{
Russell King424ca4c2018-01-02 10:58:48 +00001364 int oldpage, ret = 0;
1365
Michael Stapelberg3871c382013-03-11 13:56:45 +00001366 wol->supported = WAKE_MAGIC;
1367 wol->wolopts = 0;
1368
Russell King424ca4c2018-01-02 10:58:48 +00001369 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1370 if (oldpage < 0)
1371 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001372
Russell King424ca4c2018-01-02 10:58:48 +00001373 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1374 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001375 wol->wolopts |= WAKE_MAGIC;
1376
Russell King424ca4c2018-01-02 10:58:48 +00001377error:
1378 phy_restore_page(phydev, oldpage, ret);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001379}
1380
Andrew Lunn23beb382017-05-17 03:26:04 +02001381static int m88e1318_set_wol(struct phy_device *phydev,
1382 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001383{
Russell King424ca4c2018-01-02 10:58:48 +00001384 int err = 0, oldpage;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001385
Russell King424ca4c2018-01-02 10:58:48 +00001386 oldpage = phy_save_page(phydev);
1387 if (oldpage < 0)
1388 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001389
1390 if (wol->wolopts & WAKE_MAGIC) {
1391 /* Explicitly switch to page 0x00, just to be sure */
Russell King424ca4c2018-01-02 10:58:48 +00001392 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001393 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001394 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001395
Jingju Houb6a930f2018-04-23 15:22:49 +08001396 /* If WOL event happened once, the LED[2] interrupt pin
1397 * will not be cleared unless we reading the interrupt status
1398 * register. If interrupts are in use, the normal interrupt
1399 * handling will clear the WOL event. Clear the WOL event
1400 * before enabling it if !phy_interrupt_is_valid()
1401 */
1402 if (!phy_interrupt_is_valid(phydev))
1403 phy_read(phydev, MII_M1011_IEVENT);
1404
Michael Stapelberg3871c382013-03-11 13:56:45 +00001405 /* Enable the WOL interrupt */
Russell King424ca4c2018-01-02 10:58:48 +00001406 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1407 MII_88E1318S_PHY_CSIER_WOL_EIE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001408 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001409 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001410
Russell King424ca4c2018-01-02 10:58:48 +00001411 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001412 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001413 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001414
1415 /* Setup LED[2] as interrupt pin (active low) */
Russell King424ca4c2018-01-02 10:58:48 +00001416 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
Russell Kingf1028522018-01-05 16:07:10 +00001417 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
Russell King424ca4c2018-01-02 10:58:48 +00001418 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1419 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001420 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001421 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001422
Russell King424ca4c2018-01-02 10:58:48 +00001423 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001424 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001425 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001426
1427 /* Store the device address for the magic packet */
Russell King424ca4c2018-01-02 10:58:48 +00001428 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001429 ((phydev->attached_dev->dev_addr[5] << 8) |
1430 phydev->attached_dev->dev_addr[4]));
1431 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001432 goto error;
1433 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001434 ((phydev->attached_dev->dev_addr[3] << 8) |
1435 phydev->attached_dev->dev_addr[2]));
1436 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001437 goto error;
1438 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001439 ((phydev->attached_dev->dev_addr[1] << 8) |
1440 phydev->attached_dev->dev_addr[0]));
1441 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001442 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001443
1444 /* Clear WOL status and enable magic packet matching */
Russell King424ca4c2018-01-02 10:58:48 +00001445 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1446 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1447 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001448 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001449 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001450 } else {
Russell King424ca4c2018-01-02 10:58:48 +00001451 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001452 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001453 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001454
1455 /* Clear WOL status and disable magic packet matching */
Russell King424ca4c2018-01-02 10:58:48 +00001456 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +00001457 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
Russell King424ca4c2018-01-02 10:58:48 +00001458 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001459 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001460 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001461 }
1462
Russell King424ca4c2018-01-02 10:58:48 +00001463error:
1464 return phy_restore_page(phydev, oldpage, err);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001465}
1466
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001467static int marvell_get_sset_count(struct phy_device *phydev)
1468{
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +02001469 if (phydev->supported & SUPPORTED_FIBRE)
1470 return ARRAY_SIZE(marvell_hw_stats);
1471 else
1472 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001473}
1474
1475static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1476{
1477 int i;
1478
1479 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
Florian Fainelli98409b22018-03-02 15:08:37 -08001480 strlcpy(data + i * ETH_GSTRING_LEN,
1481 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001482 }
1483}
1484
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001485static u64 marvell_get_stat(struct phy_device *phydev, int i)
1486{
1487 struct marvell_hw_stat stat = marvell_hw_stats[i];
1488 struct marvell_priv *priv = phydev->priv;
Russell King424ca4c2018-01-02 10:58:48 +00001489 int val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001490 u64 ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001491
Russell King424ca4c2018-01-02 10:58:48 +00001492 val = phy_read_paged(phydev, stat.page, stat.reg);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001493 if (val < 0) {
Jisheng Zhang6c3442f2018-04-27 16:18:58 +08001494 ret = U64_MAX;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001495 } else {
1496 val = val & ((1 << stat.bits) - 1);
1497 priv->stats[i] += val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001498 ret = priv->stats[i];
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001499 }
1500
Andrew Lunn321b4d42016-02-20 00:35:29 +01001501 return ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001502}
1503
1504static void marvell_get_stats(struct phy_device *phydev,
1505 struct ethtool_stats *stats, u64 *data)
1506{
1507 int i;
1508
1509 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1510 data[i] = marvell_get_stat(phydev, i);
1511}
1512
Andrew Lunn0b046802017-01-20 01:37:49 +01001513#ifdef CONFIG_HWMON
1514static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1515{
Andrew Lunn975b3882017-05-25 21:42:06 +02001516 int oldpage;
Russell King424ca4c2018-01-02 10:58:48 +00001517 int ret = 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001518 int val;
1519
1520 *temp = 0;
1521
Russell King424ca4c2018-01-02 10:58:48 +00001522 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1523 if (oldpage < 0)
1524 goto error;
Andrew Lunn975b3882017-05-25 21:42:06 +02001525
Andrew Lunn0b046802017-01-20 01:37:49 +01001526 /* Enable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00001527 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001528 if (ret < 0)
1529 goto error;
1530
Russell King424ca4c2018-01-02 10:58:48 +00001531 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1532 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01001533 if (ret < 0)
1534 goto error;
1535
1536 /* Wait for temperature to stabilize */
1537 usleep_range(10000, 12000);
1538
Russell King424ca4c2018-01-02 10:58:48 +00001539 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001540 if (val < 0) {
1541 ret = val;
1542 goto error;
1543 }
1544
1545 /* Disable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00001546 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1547 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01001548 if (ret < 0)
1549 goto error;
1550
1551 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1552
1553error:
Russell King424ca4c2018-01-02 10:58:48 +00001554 return phy_restore_page(phydev, oldpage, ret);
Andrew Lunn0b046802017-01-20 01:37:49 +01001555}
1556
1557static int m88e1121_hwmon_read(struct device *dev,
1558 enum hwmon_sensor_types type,
1559 u32 attr, int channel, long *temp)
1560{
1561 struct phy_device *phydev = dev_get_drvdata(dev);
1562 int err;
1563
1564 switch (attr) {
1565 case hwmon_temp_input:
1566 err = m88e1121_get_temp(phydev, temp);
1567 break;
1568 default:
1569 return -EOPNOTSUPP;
1570 }
1571
1572 return err;
1573}
1574
1575static umode_t m88e1121_hwmon_is_visible(const void *data,
1576 enum hwmon_sensor_types type,
1577 u32 attr, int channel)
1578{
1579 if (type != hwmon_temp)
1580 return 0;
1581
1582 switch (attr) {
1583 case hwmon_temp_input:
1584 return 0444;
1585 default:
1586 return 0;
1587 }
1588}
1589
1590static u32 m88e1121_hwmon_chip_config[] = {
1591 HWMON_C_REGISTER_TZ,
1592 0
1593};
1594
1595static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1596 .type = hwmon_chip,
1597 .config = m88e1121_hwmon_chip_config,
1598};
1599
1600static u32 m88e1121_hwmon_temp_config[] = {
1601 HWMON_T_INPUT,
1602 0
1603};
1604
1605static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1606 .type = hwmon_temp,
1607 .config = m88e1121_hwmon_temp_config,
1608};
1609
1610static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1611 &m88e1121_hwmon_chip,
1612 &m88e1121_hwmon_temp,
1613 NULL
1614};
1615
1616static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1617 .is_visible = m88e1121_hwmon_is_visible,
1618 .read = m88e1121_hwmon_read,
1619};
1620
1621static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1622 .ops = &m88e1121_hwmon_hwmon_ops,
1623 .info = m88e1121_hwmon_info,
1624};
1625
1626static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1627{
1628 int ret;
1629
1630 *temp = 0;
1631
Russell King424ca4c2018-01-02 10:58:48 +00001632 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1633 MII_88E1510_TEMP_SENSOR);
Andrew Lunn0b046802017-01-20 01:37:49 +01001634 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001635 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01001636
1637 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1638
Russell King424ca4c2018-01-02 10:58:48 +00001639 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001640}
1641
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001642static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001643{
1644 int ret;
1645
1646 *temp = 0;
1647
Russell King424ca4c2018-01-02 10:58:48 +00001648 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1649 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001650 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001651 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01001652
1653 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1654 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1655 /* convert to mC */
1656 *temp *= 1000;
1657
Russell King424ca4c2018-01-02 10:58:48 +00001658 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001659}
1660
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001661static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001662{
Andrew Lunn0b046802017-01-20 01:37:49 +01001663 temp = temp / 1000;
1664 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
Andrew Lunn0b046802017-01-20 01:37:49 +01001665
Russell King424ca4c2018-01-02 10:58:48 +00001666 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1667 MII_88E1121_MISC_TEST,
1668 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1669 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
Andrew Lunn0b046802017-01-20 01:37:49 +01001670}
1671
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001672static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
Andrew Lunn0b046802017-01-20 01:37:49 +01001673{
1674 int ret;
1675
1676 *alarm = false;
1677
Russell King424ca4c2018-01-02 10:58:48 +00001678 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1679 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001680 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001681 return ret;
1682
Andrew Lunn0b046802017-01-20 01:37:49 +01001683 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1684
Russell King424ca4c2018-01-02 10:58:48 +00001685 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001686}
1687
1688static int m88e1510_hwmon_read(struct device *dev,
1689 enum hwmon_sensor_types type,
1690 u32 attr, int channel, long *temp)
1691{
1692 struct phy_device *phydev = dev_get_drvdata(dev);
1693 int err;
1694
1695 switch (attr) {
1696 case hwmon_temp_input:
1697 err = m88e1510_get_temp(phydev, temp);
1698 break;
1699 case hwmon_temp_crit:
1700 err = m88e1510_get_temp_critical(phydev, temp);
1701 break;
1702 case hwmon_temp_max_alarm:
1703 err = m88e1510_get_temp_alarm(phydev, temp);
1704 break;
1705 default:
1706 return -EOPNOTSUPP;
1707 }
1708
1709 return err;
1710}
1711
1712static int m88e1510_hwmon_write(struct device *dev,
1713 enum hwmon_sensor_types type,
1714 u32 attr, int channel, long temp)
1715{
1716 struct phy_device *phydev = dev_get_drvdata(dev);
1717 int err;
1718
1719 switch (attr) {
1720 case hwmon_temp_crit:
1721 err = m88e1510_set_temp_critical(phydev, temp);
1722 break;
1723 default:
1724 return -EOPNOTSUPP;
1725 }
1726 return err;
1727}
1728
1729static umode_t m88e1510_hwmon_is_visible(const void *data,
1730 enum hwmon_sensor_types type,
1731 u32 attr, int channel)
1732{
1733 if (type != hwmon_temp)
1734 return 0;
1735
1736 switch (attr) {
1737 case hwmon_temp_input:
1738 case hwmon_temp_max_alarm:
1739 return 0444;
1740 case hwmon_temp_crit:
1741 return 0644;
1742 default:
1743 return 0;
1744 }
1745}
1746
1747static u32 m88e1510_hwmon_temp_config[] = {
1748 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1749 0
1750};
1751
1752static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1753 .type = hwmon_temp,
1754 .config = m88e1510_hwmon_temp_config,
1755};
1756
1757static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1758 &m88e1121_hwmon_chip,
1759 &m88e1510_hwmon_temp,
1760 NULL
1761};
1762
1763static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1764 .is_visible = m88e1510_hwmon_is_visible,
1765 .read = m88e1510_hwmon_read,
1766 .write = m88e1510_hwmon_write,
1767};
1768
1769static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1770 .ops = &m88e1510_hwmon_hwmon_ops,
1771 .info = m88e1510_hwmon_info,
1772};
1773
Andrew Lunnfee2d542018-01-09 22:42:09 +01001774static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1775{
1776 int sum = 0;
1777 int oldpage;
1778 int ret = 0;
1779 int i;
1780
1781 *temp = 0;
1782
1783 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1784 if (oldpage < 0)
1785 goto error;
1786
1787 /* Enable temperature sensor */
1788 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1789 if (ret < 0)
1790 goto error;
1791
1792 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1793 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1794 MII_88E6390_MISC_TEST_SAMPLE_1S;
1795
1796 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1797 if (ret < 0)
1798 goto error;
1799
1800 /* Wait for temperature to stabilize */
1801 usleep_range(10000, 12000);
1802
1803 /* Reading the temperature sense has an errata. You need to read
1804 * a number of times and take an average.
1805 */
1806 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1807 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1808 if (ret < 0)
1809 goto error;
1810 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1811 }
1812
1813 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1814 *temp = (sum - 75) * 1000;
1815
1816 /* Disable temperature sensor */
1817 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1818 if (ret < 0)
1819 goto error;
1820
1821 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1822 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1823
1824 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1825
1826error:
1827 phy_restore_page(phydev, oldpage, ret);
1828
1829 return ret;
1830}
1831
1832static int m88e6390_hwmon_read(struct device *dev,
1833 enum hwmon_sensor_types type,
1834 u32 attr, int channel, long *temp)
1835{
1836 struct phy_device *phydev = dev_get_drvdata(dev);
1837 int err;
1838
1839 switch (attr) {
1840 case hwmon_temp_input:
1841 err = m88e6390_get_temp(phydev, temp);
1842 break;
1843 default:
1844 return -EOPNOTSUPP;
1845 }
1846
1847 return err;
1848}
1849
1850static umode_t m88e6390_hwmon_is_visible(const void *data,
1851 enum hwmon_sensor_types type,
1852 u32 attr, int channel)
1853{
1854 if (type != hwmon_temp)
1855 return 0;
1856
1857 switch (attr) {
1858 case hwmon_temp_input:
1859 return 0444;
1860 default:
1861 return 0;
1862 }
1863}
1864
1865static u32 m88e6390_hwmon_temp_config[] = {
1866 HWMON_T_INPUT,
1867 0
1868};
1869
1870static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1871 .type = hwmon_temp,
1872 .config = m88e6390_hwmon_temp_config,
1873};
1874
1875static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1876 &m88e1121_hwmon_chip,
1877 &m88e6390_hwmon_temp,
1878 NULL
1879};
1880
1881static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
1882 .is_visible = m88e6390_hwmon_is_visible,
1883 .read = m88e6390_hwmon_read,
1884};
1885
1886static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
1887 .ops = &m88e6390_hwmon_hwmon_ops,
1888 .info = m88e6390_hwmon_info,
1889};
1890
Andrew Lunn0b046802017-01-20 01:37:49 +01001891static int marvell_hwmon_name(struct phy_device *phydev)
1892{
1893 struct marvell_priv *priv = phydev->priv;
1894 struct device *dev = &phydev->mdio.dev;
1895 const char *devname = dev_name(dev);
1896 size_t len = strlen(devname);
1897 int i, j;
1898
1899 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1900 if (!priv->hwmon_name)
1901 return -ENOMEM;
1902
1903 for (i = j = 0; i < len && devname[i]; i++) {
1904 if (isalnum(devname[i]))
1905 priv->hwmon_name[j++] = devname[i];
1906 }
1907
1908 return 0;
1909}
1910
1911static int marvell_hwmon_probe(struct phy_device *phydev,
1912 const struct hwmon_chip_info *chip)
1913{
1914 struct marvell_priv *priv = phydev->priv;
1915 struct device *dev = &phydev->mdio.dev;
1916 int err;
1917
1918 err = marvell_hwmon_name(phydev);
1919 if (err)
1920 return err;
1921
1922 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1923 dev, priv->hwmon_name, phydev, chip, NULL);
1924
1925 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1926}
1927
1928static int m88e1121_hwmon_probe(struct phy_device *phydev)
1929{
1930 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1931}
1932
1933static int m88e1510_hwmon_probe(struct phy_device *phydev)
1934{
1935 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1936}
Andrew Lunnfee2d542018-01-09 22:42:09 +01001937
1938static int m88e6390_hwmon_probe(struct phy_device *phydev)
1939{
1940 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
1941}
Andrew Lunn0b046802017-01-20 01:37:49 +01001942#else
1943static int m88e1121_hwmon_probe(struct phy_device *phydev)
1944{
1945 return 0;
1946}
1947
1948static int m88e1510_hwmon_probe(struct phy_device *phydev)
1949{
1950 return 0;
1951}
Andrew Lunnfee2d542018-01-09 22:42:09 +01001952
1953static int m88e6390_hwmon_probe(struct phy_device *phydev)
1954{
1955 return 0;
1956}
Andrew Lunn0b046802017-01-20 01:37:49 +01001957#endif
1958
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001959static int marvell_probe(struct phy_device *phydev)
1960{
1961 struct marvell_priv *priv;
1962
Andrew Lunne5a03bf2016-01-06 20:11:16 +01001963 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001964 if (!priv)
1965 return -ENOMEM;
1966
1967 phydev->priv = priv;
1968
1969 return 0;
1970}
1971
Andrew Lunn0b046802017-01-20 01:37:49 +01001972static int m88e1121_probe(struct phy_device *phydev)
1973{
1974 int err;
1975
1976 err = marvell_probe(phydev);
1977 if (err)
1978 return err;
1979
1980 return m88e1121_hwmon_probe(phydev);
1981}
1982
1983static int m88e1510_probe(struct phy_device *phydev)
1984{
1985 int err;
1986
1987 err = marvell_probe(phydev);
1988 if (err)
1989 return err;
1990
1991 return m88e1510_hwmon_probe(phydev);
1992}
1993
Andrew Lunnfee2d542018-01-09 22:42:09 +01001994static int m88e6390_probe(struct phy_device *phydev)
1995{
1996 int err;
1997
1998 err = marvell_probe(phydev);
1999 if (err)
2000 return err;
2001
2002 return m88e6390_hwmon_probe(phydev);
2003}
2004
Olof Johanssone5479232007-07-03 16:23:46 -05002005static struct phy_driver marvell_drivers[] = {
2006 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002007 .phy_id = MARVELL_PHY_ID_88E1101,
2008 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002009 .name = "Marvell 88E1101",
2010 .features = PHY_GBIT_FEATURES,
2011 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002012 .probe = marvell_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002013 .config_init = &marvell_config_init,
Andrew Lunnf2899782017-05-23 17:49:13 +02002014 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05002015 .ack_interrupt = &marvell_ack_interrupt,
2016 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002017 .resume = &genphy_resume,
2018 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002019 .read_page = marvell_read_page,
2020 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002021 .get_sset_count = marvell_get_sset_count,
2022 .get_strings = marvell_get_strings,
2023 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002024 },
2025 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002026 .phy_id = MARVELL_PHY_ID_88E1112,
2027 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johansson85cfb532007-07-03 16:24:32 -05002028 .name = "Marvell 88E1112",
2029 .features = PHY_GBIT_FEATURES,
2030 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002031 .probe = marvell_probe,
Olof Johansson85cfb532007-07-03 16:24:32 -05002032 .config_init = &m88e1111_config_init,
2033 .config_aneg = &marvell_config_aneg,
Olof Johansson85cfb532007-07-03 16:24:32 -05002034 .ack_interrupt = &marvell_ack_interrupt,
2035 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002036 .resume = &genphy_resume,
2037 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002038 .read_page = marvell_read_page,
2039 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002040 .get_sset_count = marvell_get_sset_count,
2041 .get_strings = marvell_get_strings,
2042 .get_stats = marvell_get_stats,
Olof Johansson85cfb532007-07-03 16:24:32 -05002043 },
2044 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002045 .phy_id = MARVELL_PHY_ID_88E1111,
2046 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002047 .name = "Marvell 88E1111",
2048 .features = PHY_GBIT_FEATURES,
2049 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002050 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002051 .config_init = &m88e1111_config_init,
Harini Katakam3ec0a0f2016-06-27 13:09:59 +05302052 .config_aneg = &m88e1111_config_aneg,
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03002053 .read_status = &marvell_read_status,
Olof Johanssone5479232007-07-03 16:23:46 -05002054 .ack_interrupt = &marvell_ack_interrupt,
2055 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002056 .resume = &genphy_resume,
2057 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002058 .read_page = marvell_read_page,
2059 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002060 .get_sset_count = marvell_get_sset_count,
2061 .get_strings = marvell_get_strings,
2062 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002063 },
2064 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002065 .phy_id = MARVELL_PHY_ID_88E1118,
2066 .phy_id_mask = MARVELL_PHY_ID_MASK,
Ron Madrid605f1962008-11-06 09:05:26 +00002067 .name = "Marvell 88E1118",
2068 .features = PHY_GBIT_FEATURES,
2069 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002070 .probe = marvell_probe,
Ron Madrid605f1962008-11-06 09:05:26 +00002071 .config_init = &m88e1118_config_init,
2072 .config_aneg = &m88e1118_config_aneg,
Ron Madrid605f1962008-11-06 09:05:26 +00002073 .ack_interrupt = &marvell_ack_interrupt,
2074 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002075 .resume = &genphy_resume,
2076 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002077 .read_page = marvell_read_page,
2078 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002079 .get_sset_count = marvell_get_sset_count,
2080 .get_strings = marvell_get_strings,
2081 .get_stats = marvell_get_stats,
Ron Madrid605f1962008-11-06 09:05:26 +00002082 },
2083 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002084 .phy_id = MARVELL_PHY_ID_88E1121R,
2085 .phy_id_mask = MARVELL_PHY_ID_MASK,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002086 .name = "Marvell 88E1121R",
2087 .features = PHY_GBIT_FEATURES,
2088 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002089 .probe = &m88e1121_probe,
Clemens Gruberfdecf362016-06-11 17:21:26 +02002090 .config_init = &m88e1121_config_init,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002091 .config_aneg = &m88e1121_config_aneg,
2092 .read_status = &marvell_read_status,
2093 .ack_interrupt = &marvell_ack_interrupt,
2094 .config_intr = &marvell_config_intr,
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00002095 .did_interrupt = &m88e1121_did_interrupt,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002096 .resume = &genphy_resume,
2097 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002098 .read_page = marvell_read_page,
2099 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002100 .get_sset_count = marvell_get_sset_count,
2101 .get_strings = marvell_get_strings,
2102 .get_stats = marvell_get_stats,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002103 },
2104 {
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002105 .phy_id = MARVELL_PHY_ID_88E1318S,
Linus Torvalds6ba74012010-08-04 11:47:58 -07002106 .phy_id_mask = MARVELL_PHY_ID_MASK,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002107 .name = "Marvell 88E1318S",
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002108 .features = PHY_GBIT_FEATURES,
2109 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002110 .probe = marvell_probe,
Esben Haabendaldd9a1222018-04-05 22:40:29 +02002111 .config_init = &m88e1318_config_init,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002112 .config_aneg = &m88e1318_config_aneg,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002113 .read_status = &marvell_read_status,
2114 .ack_interrupt = &marvell_ack_interrupt,
2115 .config_intr = &marvell_config_intr,
2116 .did_interrupt = &m88e1121_did_interrupt,
Michael Stapelberg3871c382013-03-11 13:56:45 +00002117 .get_wol = &m88e1318_get_wol,
2118 .set_wol = &m88e1318_set_wol,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002119 .resume = &genphy_resume,
2120 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002121 .read_page = marvell_read_page,
2122 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002123 .get_sset_count = marvell_get_sset_count,
2124 .get_strings = marvell_get_strings,
2125 .get_stats = marvell_get_stats,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002126 },
2127 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002128 .phy_id = MARVELL_PHY_ID_88E1145,
2129 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002130 .name = "Marvell 88E1145",
2131 .features = PHY_GBIT_FEATURES,
2132 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002133 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002134 .config_init = &m88e1145_config_init,
Zhao Qiangc5058732017-12-18 10:26:43 +08002135 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05002136 .read_status = &genphy_read_status,
2137 .ack_interrupt = &marvell_ack_interrupt,
2138 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002139 .resume = &genphy_resume,
2140 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002141 .read_page = marvell_read_page,
2142 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002143 .get_sset_count = marvell_get_sset_count,
2144 .get_strings = marvell_get_strings,
2145 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002146 },
2147 {
David Daney90600732010-11-19 11:58:53 +00002148 .phy_id = MARVELL_PHY_ID_88E1149R,
2149 .phy_id_mask = MARVELL_PHY_ID_MASK,
2150 .name = "Marvell 88E1149R",
2151 .features = PHY_GBIT_FEATURES,
2152 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002153 .probe = marvell_probe,
David Daney90600732010-11-19 11:58:53 +00002154 .config_init = &m88e1149_config_init,
2155 .config_aneg = &m88e1118_config_aneg,
David Daney90600732010-11-19 11:58:53 +00002156 .ack_interrupt = &marvell_ack_interrupt,
2157 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002158 .resume = &genphy_resume,
2159 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002160 .read_page = marvell_read_page,
2161 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002162 .get_sset_count = marvell_get_sset_count,
2163 .get_strings = marvell_get_strings,
2164 .get_stats = marvell_get_stats,
David Daney90600732010-11-19 11:58:53 +00002165 },
2166 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002167 .phy_id = MARVELL_PHY_ID_88E1240,
2168 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002169 .name = "Marvell 88E1240",
2170 .features = PHY_GBIT_FEATURES,
2171 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002172 .probe = marvell_probe,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002173 .config_init = &m88e1111_config_init,
2174 .config_aneg = &marvell_config_aneg,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002175 .ack_interrupt = &marvell_ack_interrupt,
2176 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002177 .resume = &genphy_resume,
2178 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002179 .read_page = marvell_read_page,
2180 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002181 .get_sset_count = marvell_get_sset_count,
2182 .get_strings = marvell_get_strings,
2183 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002184 },
Michal Simek3da09a52013-05-30 20:08:26 +00002185 {
2186 .phy_id = MARVELL_PHY_ID_88E1116R,
2187 .phy_id_mask = MARVELL_PHY_ID_MASK,
2188 .name = "Marvell 88E1116R",
2189 .features = PHY_GBIT_FEATURES,
2190 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002191 .probe = marvell_probe,
Michal Simek3da09a52013-05-30 20:08:26 +00002192 .config_init = &m88e1116r_config_init,
Michal Simek3da09a52013-05-30 20:08:26 +00002193 .ack_interrupt = &marvell_ack_interrupt,
2194 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002195 .resume = &genphy_resume,
2196 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002197 .read_page = marvell_read_page,
2198 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002199 .get_sset_count = marvell_get_sset_count,
2200 .get_strings = marvell_get_strings,
2201 .get_stats = marvell_get_stats,
Michal Simek3da09a52013-05-30 20:08:26 +00002202 },
Michal Simek10e24caa2013-05-30 20:08:27 +00002203 {
2204 .phy_id = MARVELL_PHY_ID_88E1510,
2205 .phy_id_mask = MARVELL_PHY_ID_MASK,
2206 .name = "Marvell 88E1510",
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02002207 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
Arnd Bergmann18702412017-01-23 13:18:41 +01002208 .flags = PHY_HAS_INTERRUPT,
Andrew Lunn0b046802017-01-20 01:37:49 +01002209 .probe = &m88e1510_probe,
Stefan Roese930b37e2016-02-18 10:59:07 +01002210 .config_init = &m88e1510_config_init,
Michal Simek10e24caa2013-05-30 20:08:27 +00002211 .config_aneg = &m88e1510_config_aneg,
2212 .read_status = &marvell_read_status,
2213 .ack_interrupt = &marvell_ack_interrupt,
2214 .config_intr = &marvell_config_intr,
2215 .did_interrupt = &m88e1121_did_interrupt,
Jingju Houf39aac72017-01-22 18:20:56 +08002216 .get_wol = &m88e1318_get_wol,
2217 .set_wol = &m88e1318_set_wol,
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02002218 .resume = &marvell_resume,
2219 .suspend = &marvell_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002220 .read_page = marvell_read_page,
2221 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002222 .get_sset_count = marvell_get_sset_count,
2223 .get_strings = marvell_get_strings,
2224 .get_stats = marvell_get_stats,
Lin Yun Shengf0f9b4e2017-06-30 17:44:15 +08002225 .set_loopback = genphy_loopback,
Michal Simek10e24caa2013-05-30 20:08:27 +00002226 },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002227 {
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002228 .phy_id = MARVELL_PHY_ID_88E1540,
2229 .phy_id_mask = MARVELL_PHY_ID_MASK,
2230 .name = "Marvell 88E1540",
2231 .features = PHY_GBIT_FEATURES,
2232 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002233 .probe = m88e1510_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002234 .config_init = &marvell_config_init,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002235 .config_aneg = &m88e1510_config_aneg,
2236 .read_status = &marvell_read_status,
2237 .ack_interrupt = &marvell_ack_interrupt,
2238 .config_intr = &marvell_config_intr,
2239 .did_interrupt = &m88e1121_did_interrupt,
2240 .resume = &genphy_resume,
2241 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002242 .read_page = marvell_read_page,
2243 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002244 .get_sset_count = marvell_get_sset_count,
2245 .get_strings = marvell_get_strings,
2246 .get_stats = marvell_get_stats,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002247 },
2248 {
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002249 .phy_id = MARVELL_PHY_ID_88E1545,
2250 .phy_id_mask = MARVELL_PHY_ID_MASK,
2251 .name = "Marvell 88E1545",
2252 .probe = m88e1510_probe,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002253 .features = PHY_GBIT_FEATURES,
2254 .flags = PHY_HAS_INTERRUPT,
2255 .config_init = &marvell_config_init,
2256 .config_aneg = &m88e1510_config_aneg,
2257 .read_status = &marvell_read_status,
2258 .ack_interrupt = &marvell_ack_interrupt,
2259 .config_intr = &marvell_config_intr,
2260 .did_interrupt = &m88e1121_did_interrupt,
2261 .resume = &genphy_resume,
2262 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002263 .read_page = marvell_read_page,
2264 .write_page = marvell_write_page,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002265 .get_sset_count = marvell_get_sset_count,
2266 .get_strings = marvell_get_strings,
2267 .get_stats = marvell_get_stats,
2268 },
2269 {
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002270 .phy_id = MARVELL_PHY_ID_88E3016,
2271 .phy_id_mask = MARVELL_PHY_ID_MASK,
2272 .name = "Marvell 88E3016",
2273 .features = PHY_BASIC_FEATURES,
2274 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002275 .probe = marvell_probe,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002276 .config_init = &m88e3016_config_init,
2277 .aneg_done = &marvell_aneg_done,
2278 .read_status = &marvell_read_status,
2279 .ack_interrupt = &marvell_ack_interrupt,
2280 .config_intr = &marvell_config_intr,
2281 .did_interrupt = &m88e1121_did_interrupt,
2282 .resume = &genphy_resume,
2283 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002284 .read_page = marvell_read_page,
2285 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002286 .get_sset_count = marvell_get_sset_count,
2287 .get_strings = marvell_get_strings,
2288 .get_stats = marvell_get_stats,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002289 },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002290 {
2291 .phy_id = MARVELL_PHY_ID_88E6390,
2292 .phy_id_mask = MARVELL_PHY_ID_MASK,
2293 .name = "Marvell 88E6390",
2294 .features = PHY_GBIT_FEATURES,
2295 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnfee2d542018-01-09 22:42:09 +01002296 .probe = m88e6390_probe,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002297 .config_init = &marvell_config_init,
2298 .config_aneg = &m88e1510_config_aneg,
2299 .read_status = &marvell_read_status,
2300 .ack_interrupt = &marvell_ack_interrupt,
2301 .config_intr = &marvell_config_intr,
2302 .did_interrupt = &m88e1121_did_interrupt,
2303 .resume = &genphy_resume,
2304 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002305 .read_page = marvell_read_page,
2306 .write_page = marvell_write_page,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002307 .get_sset_count = marvell_get_sset_count,
2308 .get_strings = marvell_get_strings,
2309 .get_stats = marvell_get_stats,
2310 },
Andy Fleming00db8182005-07-30 19:31:23 -04002311};
2312
Johan Hovold50fd7152014-11-11 19:45:59 +01002313module_phy_driver(marvell_drivers);
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002314
Uwe Kleine-Königcf93c942010-10-03 23:43:32 +00002315static struct mdio_device_id __maybe_unused marvell_tbl[] = {
Michal Simekf5e1cab2013-05-30 20:08:25 +00002316 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2317 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2318 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2319 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2320 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2321 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2322 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2323 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2324 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
Michal Simek3da09a52013-05-30 20:08:26 +00002325 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
Michal Simek10e24caa2013-05-30 20:08:27 +00002326 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002327 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002328 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002329 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002330 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002331 { }
2332};
2333
2334MODULE_DEVICE_TABLE(mdio, marvell_tbl);