blob: 20feaa34b0633f30585ce8e5978a3cdd3d899c0e [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080032#include "drmP.h"
33#include "drm.h"
34#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080035#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010036#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drm.h"
38#include "i915_drv.h"
39#include "intel_sdvo_regs.h"
40
Zhenyu Wang14571b42010-03-30 14:06:33 +080041#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010044#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080045
46#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040047 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080048
49#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000050#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080051#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010052#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010053#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080054
Jesse Barnes79e53942008-11-07 14:24:08 -080055
Chris Wilson2e88e402010-08-07 11:01:27 +010056static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080057 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64};
65
66#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
Chris Wilsonea5b2132010-08-04 13:50:23 +010068struct intel_sdvo {
69 struct intel_encoder base;
70
Chris Wilsonf899fc62010-07-20 15:44:45 -070071 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070072 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073
Chris Wilsone957d772010-09-24 12:52:03 +010074 struct i2c_adapter ddc;
75
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010077 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080078
Jesse Barnese2f0ba92009-02-02 15:11:52 -080079 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080081
Jesse Barnese2f0ba92009-02-02 15:11:52 -080082 /*
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
85 */
Jesse Barnes79e53942008-11-07 14:24:08 -080086 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080087
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080089 int pixel_clock_min, pixel_clock_max;
90
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080091 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
Simon Farnsworthcc68c812011-09-21 17:13:30 +010097 /*
98 * Hotplug activation bits for this device
99 */
100 uint8_t hotplug_active[2];
101
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800102 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 */
106 uint32_t color_range;
107
108 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
Daniel Vettereef4eac2012-03-23 23:43:35 +0100117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
Zhao Yakuice6feab2009-08-24 13:50:26 +0800120 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100121 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800129
Ma Ling7086c872009-05-13 11:20:06 +0800130 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100131 * This is set if we detect output of sdvo device as LVDS and
132 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800133 */
134 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800135
136 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800137 * This is sdvo fixed pannel mode pointer
138 */
139 struct drm_display_mode *sdvo_lvds_fixed_mode;
140
Eric Anholtc751ce42010-03-25 11:48:48 -0700141 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800142 uint8_t ddc_bus;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800143};
144
145struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100146 struct intel_connector base;
147
Zhenyu Wang14571b42010-03-30 14:06:33 +0800148 /* Mark the type of connector */
149 uint16_t output_flag;
150
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100151 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100152
Zhenyu Wang14571b42010-03-30 14:06:33 +0800153 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100154 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800155 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100156 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800157
Zhao Yakuib9219c52009-09-10 15:45:46 +0800158 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100159 struct drm_property *left;
160 struct drm_property *right;
161 struct drm_property *top;
162 struct drm_property *bottom;
163 struct drm_property *hpos;
164 struct drm_property *vpos;
165 struct drm_property *contrast;
166 struct drm_property *saturation;
167 struct drm_property *hue;
168 struct drm_property *sharpness;
169 struct drm_property *flicker_filter;
170 struct drm_property *flicker_filter_adaptive;
171 struct drm_property *flicker_filter_2d;
172 struct drm_property *tv_chroma_filter;
173 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100174 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800175
176 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100177 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800178
179 /* Add variable to record current setting for the above property */
180 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100181
Zhao Yakuib9219c52009-09-10 15:45:46 +0800182 /* this is to get the range of margin.*/
183 u32 max_hscan, max_vscan;
184 u32 max_hpos, cur_hpos;
185 u32 max_vpos, cur_vpos;
186 u32 cur_brightness, max_brightness;
187 u32 cur_contrast, max_contrast;
188 u32 cur_saturation, max_saturation;
189 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100190 u32 cur_sharpness, max_sharpness;
191 u32 cur_flicker_filter, max_flicker_filter;
192 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
193 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
194 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
195 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100196 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800197};
198
Chris Wilson890f3352010-09-14 16:46:59 +0100199static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100200{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100201 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100202}
203
Chris Wilsondf0e9242010-09-09 16:20:55 +0100204static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
205{
206 return container_of(intel_attached_encoder(connector),
207 struct intel_sdvo, base);
208}
209
Chris Wilson615fb932010-08-04 13:50:24 +0100210static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
211{
212 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
213}
214
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800215static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100216intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100217static bool
218intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
219 struct intel_sdvo_connector *intel_sdvo_connector,
220 int type);
221static bool
222intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800224
Jesse Barnes79e53942008-11-07 14:24:08 -0800225/**
226 * Writes the SDVOB or SDVOC with the given value, but always writes both
227 * SDVOB and SDVOC to work around apparent hardware issues (according to
228 * comments in the BIOS).
229 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100230static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800231{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100232 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800233 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800234 u32 bval = val, cval = val;
235 int i;
236
Chris Wilsonea5b2132010-08-04 13:50:23 +0100237 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
238 I915_WRITE(intel_sdvo->sdvo_reg, val);
239 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800240 return;
241 }
242
Chris Wilsonea5b2132010-08-04 13:50:23 +0100243 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800244 cval = I915_READ(SDVOC);
245 } else {
246 bval = I915_READ(SDVOB);
247 }
248 /*
249 * Write the registers twice for luck. Sometimes,
250 * writing them only once doesn't appear to 'stick'.
251 * The BIOS does this too. Yay, magic
252 */
253 for (i = 0; i < 2; i++)
254 {
255 I915_WRITE(SDVOB, bval);
256 I915_READ(SDVOB);
257 I915_WRITE(SDVOC, cval);
258 I915_READ(SDVOC);
259 }
260}
261
Chris Wilson32aad862010-08-04 13:50:25 +0100262static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800263{
Jesse Barnes79e53942008-11-07 14:24:08 -0800264 struct i2c_msg msgs[] = {
265 {
Chris Wilsone957d772010-09-24 12:52:03 +0100266 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800267 .flags = 0,
268 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100269 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800270 },
271 {
Chris Wilsone957d772010-09-24 12:52:03 +0100272 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800273 .flags = I2C_M_RD,
274 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100275 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800276 }
277 };
Chris Wilson32aad862010-08-04 13:50:25 +0100278 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800279
Chris Wilsonf899fc62010-07-20 15:44:45 -0700280 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800281 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800282
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800283 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800284 return false;
285}
286
Jesse Barnes79e53942008-11-07 14:24:08 -0800287#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100289static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800290 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100291 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800292} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100336
Akshay Joshi0206e352011-08-16 15:34:10 -0400337 /* Add the op code for SDVO enhancements */
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100382
Akshay Joshi0206e352011-08-16 15:34:10 -0400383 /* HDMI op code */
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800404};
405
Daniel Vettereef4eac2012-03-23 23:43:35 +0100406#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800407
Chris Wilsonea5b2132010-08-04 13:50:23 +0100408static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100409 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800410{
Jesse Barnes79e53942008-11-07 14:24:08 -0800411 int i;
412
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800413 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100414 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800415 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800416 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800417 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800418 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400419 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800420 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800421 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800422 break;
423 }
424 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400425 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800426 DRM_LOG_KMS("(%02X)", cmd);
427 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800428}
Jesse Barnes79e53942008-11-07 14:24:08 -0800429
Jesse Barnes79e53942008-11-07 14:24:08 -0800430static const char *cmd_status_names[] = {
431 "Power on",
432 "Success",
433 "Not supported",
434 "Invalid arg",
435 "Pending",
436 "Target not specified",
437 "Scaling not supported"
438};
439
Chris Wilsone957d772010-09-24 12:52:03 +0100440static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
441 const void *args, int args_len)
442{
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700443 u8 *buf, status;
444 struct i2c_msg *msgs;
445 int i, ret = true;
446
Alan Cox0274df32012-07-25 13:51:04 +0100447 /* Would be simpler to allocate both in one go ? */
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700448 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
449 if (!buf)
450 return false;
451
452 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
Alan Cox0274df32012-07-25 13:51:04 +0100453 if (!msgs) {
454 kfree(buf);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700455 return false;
Alan Cox0274df32012-07-25 13:51:04 +0100456 }
Chris Wilsone957d772010-09-24 12:52:03 +0100457
458 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
459
460 for (i = 0; i < args_len; i++) {
461 msgs[i].addr = intel_sdvo->slave_addr;
462 msgs[i].flags = 0;
463 msgs[i].len = 2;
464 msgs[i].buf = buf + 2 *i;
465 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
466 buf[2*i + 1] = ((u8*)args)[i];
467 }
468 msgs[i].addr = intel_sdvo->slave_addr;
469 msgs[i].flags = 0;
470 msgs[i].len = 2;
471 msgs[i].buf = buf + 2*i;
472 buf[2*i + 0] = SDVO_I2C_OPCODE;
473 buf[2*i + 1] = cmd;
474
475 /* the following two are to read the response */
476 status = SDVO_I2C_CMD_STATUS;
477 msgs[i+1].addr = intel_sdvo->slave_addr;
478 msgs[i+1].flags = 0;
479 msgs[i+1].len = 1;
480 msgs[i+1].buf = &status;
481
482 msgs[i+2].addr = intel_sdvo->slave_addr;
483 msgs[i+2].flags = I2C_M_RD;
484 msgs[i+2].len = 1;
485 msgs[i+2].buf = &status;
486
487 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
488 if (ret < 0) {
489 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700490 ret = false;
491 goto out;
Chris Wilsone957d772010-09-24 12:52:03 +0100492 }
493 if (ret != i+3) {
494 /* failure in I2C transfer */
495 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700496 ret = false;
Chris Wilsone957d772010-09-24 12:52:03 +0100497 }
498
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700499out:
500 kfree(msgs);
501 kfree(buf);
502 return ret;
Chris Wilsone957d772010-09-24 12:52:03 +0100503}
504
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100505static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
506 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800507{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100508 u8 retry = 5;
509 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800510 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800511
Chris Wilsond121a5d2011-01-25 15:00:01 +0000512 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
513
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100514 /*
515 * The documentation states that all commands will be
516 * processed within 15µs, and that we need only poll
517 * the status byte a maximum of 3 times in order for the
518 * command to be complete.
519 *
520 * Check 5 times in case the hardware failed to read the docs.
521 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000522 if (!intel_sdvo_read_byte(intel_sdvo,
523 SDVO_I2C_CMD_STATUS,
524 &status))
525 goto log_fail;
526
527 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
528 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100529 if (!intel_sdvo_read_byte(intel_sdvo,
530 SDVO_I2C_CMD_STATUS,
531 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000532 goto log_fail;
533 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100534
Jesse Barnes79e53942008-11-07 14:24:08 -0800535 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800536 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800537 else
yakui_zhao342dc382009-06-02 14:12:00 +0800538 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800539
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100540 if (status != SDVO_CMD_STATUS_SUCCESS)
541 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800542
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100543 /* Read the command response */
544 for (i = 0; i < response_len; i++) {
545 if (!intel_sdvo_read_byte(intel_sdvo,
546 SDVO_I2C_RETURN_0 + i,
547 &((u8 *)response)[i]))
548 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100549 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800550 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100551 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100552 return true;
553
554log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000555 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100556 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800557}
558
Hannes Ederb358d0a2008-12-18 21:18:47 +0100559static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800560{
561 if (mode->clock >= 100000)
562 return 1;
563 else if (mode->clock >= 50000)
564 return 2;
565 else
566 return 4;
567}
568
Chris Wilsone957d772010-09-24 12:52:03 +0100569static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
570 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800571{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000572 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100573 return intel_sdvo_write_cmd(intel_sdvo,
574 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
575 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800576}
577
Chris Wilson32aad862010-08-04 13:50:25 +0100578static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
579{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000580 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
581 return false;
582
583 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100584}
585
586static bool
587intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
588{
589 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
590 return false;
591
592 return intel_sdvo_read_response(intel_sdvo, value, len);
593}
594
595static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800596{
597 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100598 return intel_sdvo_set_value(intel_sdvo,
599 SDVO_CMD_SET_TARGET_INPUT,
600 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800601}
602
603/**
604 * Return whether each input is trained.
605 *
606 * This function is making an assumption about the layout of the response,
607 * which should be checked against the docs.
608 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100609static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800610{
611 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800612
Chris Wilson1a3665c2011-01-25 13:59:37 +0000613 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100614 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
615 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800616 return false;
617
618 *input_1 = response.input0_trained;
619 *input_2 = response.input1_trained;
620 return true;
621}
622
Chris Wilsonea5b2132010-08-04 13:50:23 +0100623static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800624 u16 outputs)
625{
Chris Wilson32aad862010-08-04 13:50:25 +0100626 return intel_sdvo_set_value(intel_sdvo,
627 SDVO_CMD_SET_ACTIVE_OUTPUTS,
628 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800629}
630
Chris Wilsonea5b2132010-08-04 13:50:23 +0100631static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800632 int mode)
633{
Chris Wilson32aad862010-08-04 13:50:25 +0100634 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800635
636 switch (mode) {
637 case DRM_MODE_DPMS_ON:
638 state = SDVO_ENCODER_STATE_ON;
639 break;
640 case DRM_MODE_DPMS_STANDBY:
641 state = SDVO_ENCODER_STATE_STANDBY;
642 break;
643 case DRM_MODE_DPMS_SUSPEND:
644 state = SDVO_ENCODER_STATE_SUSPEND;
645 break;
646 case DRM_MODE_DPMS_OFF:
647 state = SDVO_ENCODER_STATE_OFF;
648 break;
649 }
650
Chris Wilson32aad862010-08-04 13:50:25 +0100651 return intel_sdvo_set_value(intel_sdvo,
652 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800653}
654
Chris Wilsonea5b2132010-08-04 13:50:23 +0100655static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800656 int *clock_min,
657 int *clock_max)
658{
659 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800660
Chris Wilson1a3665c2011-01-25 13:59:37 +0000661 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100662 if (!intel_sdvo_get_value(intel_sdvo,
663 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
664 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800665 return false;
666
667 /* Convert the values from units of 10 kHz to kHz. */
668 *clock_min = clocks.min * 10;
669 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800670 return true;
671}
672
Chris Wilsonea5b2132010-08-04 13:50:23 +0100673static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800674 u16 outputs)
675{
Chris Wilson32aad862010-08-04 13:50:25 +0100676 return intel_sdvo_set_value(intel_sdvo,
677 SDVO_CMD_SET_TARGET_OUTPUT,
678 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800679}
680
Chris Wilsonea5b2132010-08-04 13:50:23 +0100681static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800682 struct intel_sdvo_dtd *dtd)
683{
Chris Wilson32aad862010-08-04 13:50:25 +0100684 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
685 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800686}
687
Chris Wilsonea5b2132010-08-04 13:50:23 +0100688static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800689 struct intel_sdvo_dtd *dtd)
690{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100691 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800692 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
693}
694
Chris Wilsonea5b2132010-08-04 13:50:23 +0100695static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800696 struct intel_sdvo_dtd *dtd)
697{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100698 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800699 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
700}
701
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800702static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100703intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800704 uint16_t clock,
705 uint16_t width,
706 uint16_t height)
707{
708 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800709
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800710 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800711 args.clock = clock;
712 args.width = width;
713 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800714 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800715
Chris Wilsonea5b2132010-08-04 13:50:23 +0100716 if (intel_sdvo->is_lvds &&
717 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
718 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800719 args.scaled = 1;
720
Chris Wilson32aad862010-08-04 13:50:25 +0100721 return intel_sdvo_set_value(intel_sdvo,
722 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
723 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800724}
725
Chris Wilsonea5b2132010-08-04 13:50:23 +0100726static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800727 struct intel_sdvo_dtd *dtd)
728{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000729 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
730 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100731 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
732 &dtd->part1, sizeof(dtd->part1)) &&
733 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
734 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800735}
Jesse Barnes79e53942008-11-07 14:24:08 -0800736
Chris Wilsonea5b2132010-08-04 13:50:23 +0100737static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800738{
Chris Wilson32aad862010-08-04 13:50:25 +0100739 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800740}
741
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800742static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100743 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800744{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800745 uint16_t width, height;
746 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
747 uint16_t h_sync_offset, v_sync_offset;
Daniel Vetter66518192012-04-01 19:16:18 +0200748 int mode_clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800749
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200750 width = mode->hdisplay;
751 height = mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800752
753 /* do some mode translations */
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200754 h_blank_len = mode->htotal - mode->hdisplay;
755 h_sync_len = mode->hsync_end - mode->hsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800756
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200757 v_blank_len = mode->vtotal - mode->vdisplay;
758 v_sync_len = mode->vsync_end - mode->vsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800759
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200760 h_sync_offset = mode->hsync_start - mode->hdisplay;
761 v_sync_offset = mode->vsync_start - mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800762
Daniel Vetter66518192012-04-01 19:16:18 +0200763 mode_clock = mode->clock;
764 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
765 mode_clock /= 10;
766 dtd->part1.clock = mode_clock;
767
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800768 dtd->part1.h_active = width & 0xff;
769 dtd->part1.h_blank = h_blank_len & 0xff;
770 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800771 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800772 dtd->part1.v_active = height & 0xff;
773 dtd->part1.v_blank = v_blank_len & 0xff;
774 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800775 ((v_blank_len >> 8) & 0xf);
776
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800777 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800778 dtd->part2.h_sync_width = h_sync_len & 0xff;
779 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800780 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800781 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800782 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
783 ((v_sync_len & 0x30) >> 4);
784
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800785 dtd->part2.dtd_flags = 0x18;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200786 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
787 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800788 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200789 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800790 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200791 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800792
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800793 dtd->part2.sdvo_flags = 0;
794 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
795 dtd->part2.reserved = 0;
796}
Jesse Barnes79e53942008-11-07 14:24:08 -0800797
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800798static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100799 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800800{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800801 mode->hdisplay = dtd->part1.h_active;
802 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
803 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800804 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800805 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
806 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
807 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
808 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
809
810 mode->vdisplay = dtd->part1.v_active;
811 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
812 mode->vsync_start = mode->vdisplay;
813 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800814 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800815 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
816 mode->vsync_end = mode->vsync_start +
817 (dtd->part2.v_sync_off_width & 0xf);
818 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
819 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
820 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
821
822 mode->clock = dtd->part1.clock * 10;
823
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800824 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200825 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
826 mode->flags |= DRM_MODE_FLAG_INTERLACE;
827 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800828 mode->flags |= DRM_MODE_FLAG_PHSYNC;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200829 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800830 mode->flags |= DRM_MODE_FLAG_PVSYNC;
831}
832
Chris Wilsone27d8532010-10-22 09:15:22 +0100833static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800834{
Chris Wilsone27d8532010-10-22 09:15:22 +0100835 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800836
Chris Wilson1a3665c2011-01-25 13:59:37 +0000837 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100838 return intel_sdvo_get_value(intel_sdvo,
839 SDVO_CMD_GET_SUPP_ENCODE,
840 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800841}
842
Chris Wilsonea5b2132010-08-04 13:50:23 +0100843static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700844 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800845{
Chris Wilson32aad862010-08-04 13:50:25 +0100846 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800847}
848
Chris Wilsonea5b2132010-08-04 13:50:23 +0100849static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800850 uint8_t mode)
851{
Chris Wilson32aad862010-08-04 13:50:25 +0100852 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800853}
854
855#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100856static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800857{
858 int i, j;
859 uint8_t set_buf_index[2];
860 uint8_t av_split;
861 uint8_t buf_size;
862 uint8_t buf[48];
863 uint8_t *pos;
864
Chris Wilson32aad862010-08-04 13:50:25 +0100865 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800866
867 for (i = 0; i <= av_split; i++) {
868 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700869 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800870 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700871 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
872 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800873
874 pos = buf;
875 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700876 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800877 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700878 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800879 pos += 8;
880 }
881 }
882}
883#endif
884
David Härdeman3c17fe42010-09-24 21:44:32 +0200885static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800886{
887 struct dip_infoframe avi_if = {
888 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200889 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800890 .len = DIP_LEN_AVI,
891 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200892 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
893 uint8_t set_buf_index[2] = { 1, 0 };
Daniel Vetter81014b92012-05-12 20:22:00 +0200894 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
895 uint64_t *data = (uint64_t *)sdvo_data;
David Härdeman3c17fe42010-09-24 21:44:32 +0200896 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800897
David Härdeman3c17fe42010-09-24 21:44:32 +0200898 intel_dip_infoframe_csum(&avi_if);
899
Daniel Vetter81014b92012-05-12 20:22:00 +0200900 /* sdvo spec says that the ecc is handled by the hw, and it looks like
901 * we must not send the ecc field, either. */
902 memcpy(sdvo_data, &avi_if, 3);
903 sdvo_data[3] = avi_if.checksum;
904 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
905
Chris Wilsond121a5d2011-01-25 15:00:01 +0000906 if (!intel_sdvo_set_value(intel_sdvo,
907 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200908 set_buf_index, 2))
909 return false;
910
Daniel Vetter81014b92012-05-12 20:22:00 +0200911 for (i = 0; i < sizeof(sdvo_data); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000912 if (!intel_sdvo_set_value(intel_sdvo,
913 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200914 data, 8))
915 return false;
916 data++;
917 }
918
Chris Wilsond121a5d2011-01-25 15:00:01 +0000919 return intel_sdvo_set_value(intel_sdvo,
920 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200921 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800922}
923
Chris Wilson32aad862010-08-04 13:50:25 +0100924static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800925{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800926 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100927 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800928
Chris Wilson40039752010-08-04 13:50:26 +0100929 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800930 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100931 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800932
Chris Wilson32aad862010-08-04 13:50:25 +0100933 BUILD_BUG_ON(sizeof(format) != 6);
934 return intel_sdvo_set_value(intel_sdvo,
935 SDVO_CMD_SET_TV_FORMAT,
936 &format, sizeof(format));
937}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800938
Chris Wilson32aad862010-08-04 13:50:25 +0100939static bool
940intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200941 const struct drm_display_mode *mode)
Chris Wilson32aad862010-08-04 13:50:25 +0100942{
943 struct intel_sdvo_dtd output_dtd;
944
945 if (!intel_sdvo_set_target_output(intel_sdvo,
946 intel_sdvo->attached_output))
947 return false;
948
949 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
950 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
951 return false;
952
953 return true;
954}
955
Daniel Vetterc9a29692012-04-10 13:55:47 +0200956/* Asks the sdvo controller for the preferred input mode given the output mode.
957 * Unfortunately we have to set up the full output mode to do that. */
Chris Wilson32aad862010-08-04 13:50:25 +0100958static bool
Daniel Vetterc9a29692012-04-10 13:55:47 +0200959intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200960 const struct drm_display_mode *mode,
Daniel Vetterc9a29692012-04-10 13:55:47 +0200961 struct drm_display_mode *adjusted_mode)
Chris Wilson32aad862010-08-04 13:50:25 +0100962{
Daniel Vetterc9a29692012-04-10 13:55:47 +0200963 struct intel_sdvo_dtd input_dtd;
964
Chris Wilson32aad862010-08-04 13:50:25 +0100965 /* Reset the input timing to the screen. Assume always input 0. */
966 if (!intel_sdvo_set_target_input(intel_sdvo))
967 return false;
968
969 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
970 mode->clock / 10,
971 mode->hdisplay,
972 mode->vdisplay))
973 return false;
974
975 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Daniel Vetterc9a29692012-04-10 13:55:47 +0200976 &input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100977 return false;
978
Daniel Vetterc9a29692012-04-10 13:55:47 +0200979 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100980
Chris Wilson32aad862010-08-04 13:50:25 +0100981 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800982}
983
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800984static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200985 const struct drm_display_mode *mode,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800986 struct drm_display_mode *adjusted_mode)
987{
Chris Wilson890f3352010-09-14 16:46:59 +0100988 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100989 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800990
Chris Wilson32aad862010-08-04 13:50:25 +0100991 /* We need to construct preferred input timings based on our
992 * output timings. To do that, we have to set the output
993 * timings, even though this isn't really the right place in
994 * the sequence to do it. Oh well.
995 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100996 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100997 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800998 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100999
Daniel Vetterc9a29692012-04-10 13:55:47 +02001000 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1001 mode,
1002 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001003 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +01001004 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +01001005 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001006 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001007
Daniel Vetterc9a29692012-04-10 13:55:47 +02001008 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1009 mode,
1010 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001011 }
Chris Wilson32aad862010-08-04 13:50:25 +01001012
1013 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +01001014 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +01001015 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001016 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1017 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +01001018
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001019 return true;
1020}
1021
1022static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1023 struct drm_display_mode *mode,
1024 struct drm_display_mode *adjusted_mode)
1025{
1026 struct drm_device *dev = encoder->dev;
1027 struct drm_i915_private *dev_priv = dev->dev_private;
1028 struct drm_crtc *crtc = encoder->crtc;
1029 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +01001030 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001031 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001032 struct intel_sdvo_in_out_map in_out;
Daniel Vetter66518192012-04-01 19:16:18 +02001033 struct intel_sdvo_dtd input_dtd, output_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001034 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1035 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001036
1037 if (!mode)
1038 return;
1039
1040 /* First, set the input mapping for the first input to our controlled
1041 * output. This is only correct if we're a single-input device, in
1042 * which case the first input is the output from the appropriate SDVO
1043 * channel on the motherboard. In a two-input device, the first input
1044 * will be SDVOB and the second SDVOC.
1045 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001046 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001047 in_out.in1 = 0;
1048
Pavel Roskinc74696b2010-09-02 14:46:34 -04001049 intel_sdvo_set_value(intel_sdvo,
1050 SDVO_CMD_SET_IN_OUT_MAP,
1051 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001052
Chris Wilson6c9547f2010-08-25 10:05:17 +01001053 /* Set the output timings to the screen */
1054 if (!intel_sdvo_set_target_output(intel_sdvo,
1055 intel_sdvo->attached_output))
1056 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001057
Daniel Vetter66518192012-04-01 19:16:18 +02001058 /* lvds has a special fixed output timing. */
1059 if (intel_sdvo->is_lvds)
1060 intel_sdvo_get_dtd_from_mode(&output_dtd,
1061 intel_sdvo->sdvo_lvds_fixed_mode);
1062 else
1063 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001064 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1065 DRM_INFO("Setting output timings on %s failed\n",
1066 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001067
1068 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001069 if (!intel_sdvo_set_target_input(intel_sdvo))
1070 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001071
Chris Wilson97aaf912011-01-04 20:10:52 +00001072 if (intel_sdvo->has_hdmi_monitor) {
1073 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1074 intel_sdvo_set_colorimetry(intel_sdvo,
1075 SDVO_COLORIMETRY_RGB256);
1076 intel_sdvo_set_avi_infoframe(intel_sdvo);
1077 } else
1078 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001079
Chris Wilson6c9547f2010-08-25 10:05:17 +01001080 if (intel_sdvo->is_tv &&
1081 !intel_sdvo_set_tv_format(intel_sdvo))
1082 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001083
Daniel Vetter66518192012-04-01 19:16:18 +02001084 /* We have tried to get input timing in mode_fixup, and filled into
1085 * adjusted_mode.
1086 */
1087 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001088 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1089 DRM_INFO("Setting input timings on %s failed\n",
1090 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001091
Chris Wilson6c9547f2010-08-25 10:05:17 +01001092 switch (pixel_multiplier) {
1093 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001094 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1095 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1096 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001097 }
Chris Wilson32aad862010-08-04 13:50:25 +01001098 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1099 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001100
1101 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001102 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001103 /* The real mode polarity is set by the SDVO commands, using
1104 * struct intel_sdvo_dtd. */
1105 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Chris Wilsone953fd72011-02-21 22:23:52 +00001106 if (intel_sdvo->is_hdmi)
1107 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001108 if (INTEL_INFO(dev)->gen < 5)
1109 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001110 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001111 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001112 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001113 case SDVOB:
1114 sdvox &= SDVOB_PRESERVE_MASK;
1115 break;
1116 case SDVOC:
1117 sdvox &= SDVOC_PRESERVE_MASK;
1118 break;
1119 }
1120 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1121 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001122
1123 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1124 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1125 else
1126 sdvox |= TRANSCODER(intel_crtc->pipe);
1127
Chris Wilsonda79de92010-11-22 11:12:46 +00001128 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001129 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001130
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001131 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001132 /* done in crtc_mode_set as the dpll_md reg must be written early */
1133 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1134 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001135 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001136 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001137 }
1138
Chris Wilson6714afb2010-12-17 04:10:51 +00001139 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1140 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001141 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001142 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001143}
1144
Daniel Vetterce22c322012-07-01 15:31:04 +02001145static void intel_disable_sdvo(struct intel_encoder *encoder)
1146{
1147 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1148 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1149 u32 temp;
1150
1151 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1152 if (0)
1153 intel_sdvo_set_encoder_power_state(intel_sdvo,
1154 DRM_MODE_DPMS_OFF);
1155
1156 temp = I915_READ(intel_sdvo->sdvo_reg);
1157 if ((temp & SDVO_ENABLE) != 0) {
1158 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1159 }
1160}
1161
1162static void intel_enable_sdvo(struct intel_encoder *encoder)
1163{
1164 struct drm_device *dev = encoder->base.dev;
1165 struct drm_i915_private *dev_priv = dev->dev_private;
1166 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1167 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1168 u32 temp;
1169 bool input1, input2;
1170 int i;
1171 u8 status;
1172
1173 temp = I915_READ(intel_sdvo->sdvo_reg);
1174 if ((temp & SDVO_ENABLE) == 0)
1175 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1176 for (i = 0; i < 2; i++)
1177 intel_wait_for_vblank(dev, intel_crtc->pipe);
1178
1179 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1180 /* Warn if the device reported failure to sync.
1181 * A lot of SDVO devices fail to notify of sync, but it's
1182 * a given it the status is a success, we succeeded.
1183 */
1184 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1185 DRM_DEBUG_KMS("First %s output reported failure to "
1186 "sync\n", SDVO_NAME(intel_sdvo));
1187 }
1188
1189 if (0)
1190 intel_sdvo_set_encoder_power_state(intel_sdvo,
1191 DRM_MODE_DPMS_ON);
1192 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1193}
1194
Jesse Barnes79e53942008-11-07 14:24:08 -08001195static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1196{
1197 struct drm_device *dev = encoder->dev;
1198 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001199 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001200 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001201 u32 temp;
1202
1203 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001204 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001205 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001206 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001207
1208 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001209 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001210 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001211 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001212 }
1213 }
1214 } else {
1215 bool input1, input2;
1216 int i;
1217 u8 status;
1218
Chris Wilsonea5b2132010-08-04 13:50:23 +01001219 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001220 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001221 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001222 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001223 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001224
Chris Wilson32aad862010-08-04 13:50:25 +01001225 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001226 /* Warn if the device reported failure to sync.
1227 * A lot of SDVO devices fail to notify of sync, but it's
1228 * a given it the status is a success, we succeeded.
1229 */
1230 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001231 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001232 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001233 }
1234
1235 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001236 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1237 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001238 }
1239 return;
1240}
1241
Jesse Barnes79e53942008-11-07 14:24:08 -08001242static int intel_sdvo_mode_valid(struct drm_connector *connector,
1243 struct drm_display_mode *mode)
1244{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001245 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001246
1247 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1248 return MODE_NO_DBLESCAN;
1249
Chris Wilsonea5b2132010-08-04 13:50:23 +01001250 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001251 return MODE_CLOCK_LOW;
1252
Chris Wilsonea5b2132010-08-04 13:50:23 +01001253 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001254 return MODE_CLOCK_HIGH;
1255
Chris Wilson85454232010-08-08 14:28:23 +01001256 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001257 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001258 return MODE_PANEL;
1259
Chris Wilsonea5b2132010-08-04 13:50:23 +01001260 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001261 return MODE_PANEL;
1262 }
1263
Jesse Barnes79e53942008-11-07 14:24:08 -08001264 return MODE_OK;
1265}
1266
Chris Wilsonea5b2132010-08-04 13:50:23 +01001267static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001268{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001269 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001270 if (!intel_sdvo_get_value(intel_sdvo,
1271 SDVO_CMD_GET_DEVICE_CAPS,
1272 caps, sizeof(*caps)))
1273 return false;
1274
1275 DRM_DEBUG_KMS("SDVO capabilities:\n"
1276 " vendor_id: %d\n"
1277 " device_id: %d\n"
1278 " device_rev_id: %d\n"
1279 " sdvo_version_major: %d\n"
1280 " sdvo_version_minor: %d\n"
1281 " sdvo_inputs_mask: %d\n"
1282 " smooth_scaling: %d\n"
1283 " sharp_scaling: %d\n"
1284 " up_scaling: %d\n"
1285 " down_scaling: %d\n"
1286 " stall_support: %d\n"
1287 " output_flags: %d\n",
1288 caps->vendor_id,
1289 caps->device_id,
1290 caps->device_rev_id,
1291 caps->sdvo_version_major,
1292 caps->sdvo_version_minor,
1293 caps->sdvo_inputs_mask,
1294 caps->smooth_scaling,
1295 caps->sharp_scaling,
1296 caps->up_scaling,
1297 caps->down_scaling,
1298 caps->stall_support,
1299 caps->output_flags);
1300
1301 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001302}
1303
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001304static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001305{
Daniel Vetter768b1072012-05-04 11:29:56 +02001306 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -08001307 u8 response[2];
Jesse Barnes79e53942008-11-07 14:24:08 -08001308
Daniel Vetter768b1072012-05-04 11:29:56 +02001309 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1310 * on the line. */
1311 if (IS_I945G(dev) || IS_I945GM(dev))
1312 return false;
1313
Chris Wilson32aad862010-08-04 13:50:25 +01001314 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1315 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001316}
1317
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001318static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001319{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001320 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001321
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001322 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001323}
1324
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001325static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001326intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001327{
Chris Wilsonbc652122011-01-25 13:28:29 +00001328 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001329 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001330}
1331
Chris Wilsonf899fc62010-07-20 15:44:45 -07001332static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001333intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001334{
Chris Wilsone957d772010-09-24 12:52:03 +01001335 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1336 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001337}
1338
Chris Wilsonff482d82010-09-15 10:40:38 +01001339/* Mac mini hack -- use the same DDC as the analog connector */
1340static struct edid *
1341intel_sdvo_get_analog_edid(struct drm_connector *connector)
1342{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001343 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001344
Chris Wilson0c1dab82010-11-23 22:37:01 +00001345 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001346 intel_gmbus_get_adapter(dev_priv,
1347 dev_priv->crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001348}
1349
Ben Widawskyc43b5632012-04-16 14:07:40 -07001350static enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001351intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001352{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001353 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001354 enum drm_connector_status status;
1355 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001356
Chris Wilsone957d772010-09-24 12:52:03 +01001357 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001358
Chris Wilsonea5b2132010-08-04 13:50:23 +01001359 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001360 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001361
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001362 /*
1363 * Don't use the 1 as the argument of DDC bus switch to get
1364 * the EDID. It is used for SDVO SPD ROM.
1365 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001366 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001367 intel_sdvo->ddc_bus = ddc;
1368 edid = intel_sdvo_get_edid(connector);
1369 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001370 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001371 }
Chris Wilsone957d772010-09-24 12:52:03 +01001372 /*
1373 * If we found the EDID on the other bus,
1374 * assume that is the correct DDC bus.
1375 */
1376 if (edid == NULL)
1377 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001378 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001379
1380 /*
1381 * When there is no edid and no monitor is connected with VGA
1382 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001383 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001384 if (edid == NULL)
1385 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001386
Chris Wilson2f551c82010-09-15 10:42:50 +01001387 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001388 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001389 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001390 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1391 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001392 if (intel_sdvo->is_hdmi) {
1393 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1394 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1395 }
Chris Wilson139467432011-02-09 20:01:16 +00001396 } else
1397 status = connector_status_disconnected;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001398 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001399 kfree(edid);
1400 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001401
1402 if (status == connector_status_connected) {
1403 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001404 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1405 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001406 }
1407
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001408 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001409}
1410
Chris Wilson52220082011-06-20 14:45:50 +01001411static bool
1412intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1413 struct edid *edid)
1414{
1415 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1416 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1417
1418 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1419 connector_is_digital, monitor_is_digital);
1420 return connector_is_digital == monitor_is_digital;
1421}
1422
Chris Wilson7b334fc2010-09-09 23:51:02 +01001423static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001424intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001425{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001426 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001427 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001428 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001429 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001430
Chris Wilson32aad862010-08-04 13:50:25 +01001431 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001432 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001433 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001434
1435 /* add 30ms delay when the output type might be TV */
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01001436 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
Daniel Vetter6c982372012-05-24 21:26:49 +02001437 msleep(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001438
Chris Wilson32aad862010-08-04 13:50:25 +01001439 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1440 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001441
Chris Wilsone957d772010-09-24 12:52:03 +01001442 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1443 response & 0xff, response >> 8,
1444 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001445
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001446 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001447 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001448
Chris Wilsonea5b2132010-08-04 13:50:23 +01001449 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001450
Chris Wilson97aaf912011-01-04 20:10:52 +00001451 intel_sdvo->has_hdmi_monitor = false;
1452 intel_sdvo->has_hdmi_audio = false;
1453
Chris Wilson615fb932010-08-04 13:50:24 +01001454 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001455 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001456 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001457 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001458 else {
1459 struct edid *edid;
1460
1461 /* if we have an edid check it matches the connection */
1462 edid = intel_sdvo_get_edid(connector);
1463 if (edid == NULL)
1464 edid = intel_sdvo_get_analog_edid(connector);
1465 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001466 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1467 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001468 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001469 else
1470 ret = connector_status_disconnected;
1471
Chris Wilson139467432011-02-09 20:01:16 +00001472 connector->display_info.raw_edid = NULL;
1473 kfree(edid);
1474 } else
1475 ret = connector_status_connected;
1476 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001477
1478 /* May update encoder flag for like clock for SDVO TV, etc.*/
1479 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001480 intel_sdvo->is_tv = false;
1481 intel_sdvo->is_lvds = false;
1482 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001483
1484 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001485 intel_sdvo->is_tv = true;
1486 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001487 }
1488 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001489 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001490 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001491
1492 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001493}
1494
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001495static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001496{
Chris Wilsonff482d82010-09-15 10:40:38 +01001497 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001498
1499 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001500 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001501
Keith Packard57cdaf92009-09-04 13:07:54 +08001502 /*
1503 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1504 * link between analog and digital outputs. So, if the regular SDVO
1505 * DDC fails, check to see if the analog output is disconnected, in
1506 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001507 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001508 if (edid == NULL)
1509 edid = intel_sdvo_get_analog_edid(connector);
1510
Chris Wilsonff482d82010-09-15 10:40:38 +01001511 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001512 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1513 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001514 drm_mode_connector_update_edid_property(connector, edid);
1515 drm_add_edid_modes(connector, edid);
1516 }
Chris Wilson139467432011-02-09 20:01:16 +00001517
Chris Wilsonff482d82010-09-15 10:40:38 +01001518 connector->display_info.raw_edid = NULL;
1519 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001520 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001521}
1522
1523/*
1524 * Set of SDVO TV modes.
1525 * Note! This is in reply order (see loop in get_tv_modes).
1526 * XXX: all 60Hz refresh?
1527 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001528static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001529 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1530 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001531 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001532 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1533 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001534 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001535 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1536 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001537 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001538 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1539 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001540 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001541 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1542 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001543 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001544 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1545 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001546 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001547 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1548 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001549 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001550 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1551 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001552 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001553 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1554 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001555 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001556 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1557 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001558 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001559 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1560 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001561 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001562 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1563 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001564 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001565 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1566 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001567 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001568 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1569 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001570 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001571 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1572 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001573 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001574 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1575 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001576 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001577 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1578 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001579 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001580 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1581 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001582 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001583 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1584 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001585 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1586};
1587
1588static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1589{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001590 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001591 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001592 uint32_t reply = 0, format_map = 0;
1593 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001594
1595 /* Read the list of supported input resolutions for the selected TV
1596 * format.
1597 */
Chris Wilson40039752010-08-04 13:50:26 +01001598 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001599 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001600 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001601
Chris Wilson32aad862010-08-04 13:50:25 +01001602 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1603 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001604
Chris Wilson32aad862010-08-04 13:50:25 +01001605 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001606 if (!intel_sdvo_write_cmd(intel_sdvo,
1607 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001608 &tv_res, sizeof(tv_res)))
1609 return;
1610 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001611 return;
1612
1613 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001614 if (reply & (1 << i)) {
1615 struct drm_display_mode *nmode;
1616 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001617 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001618 if (nmode)
1619 drm_mode_probed_add(connector, nmode);
1620 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001621}
1622
Ma Ling7086c872009-05-13 11:20:06 +08001623static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1624{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001625 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001626 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001627 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001628
1629 /*
1630 * Attempt to get the mode list from DDC.
1631 * Assume that the preferred modes are
1632 * arranged in priority order.
1633 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001634 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001635 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001636 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001637
1638 /* Fetch modes from VBT */
1639 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001640 newmode = drm_mode_duplicate(connector->dev,
1641 dev_priv->sdvo_lvds_vbt_mode);
1642 if (newmode != NULL) {
1643 /* Guarantee the mode is preferred */
1644 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1645 DRM_MODE_TYPE_DRIVER);
1646 drm_mode_probed_add(connector, newmode);
1647 }
1648 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001649
1650end:
1651 list_for_each_entry(newmode, &connector->probed_modes, head) {
1652 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001653 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001654 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001655
Chris Wilson85454232010-08-08 14:28:23 +01001656 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001657 break;
1658 }
1659 }
1660
Ma Ling7086c872009-05-13 11:20:06 +08001661}
1662
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001663static int intel_sdvo_get_modes(struct drm_connector *connector)
1664{
Chris Wilson615fb932010-08-04 13:50:24 +01001665 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001666
Chris Wilson615fb932010-08-04 13:50:24 +01001667 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001668 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001669 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001670 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001671 else
1672 intel_sdvo_get_ddc_modes(connector);
1673
Chris Wilson32aad862010-08-04 13:50:25 +01001674 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001675}
1676
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001677static void
1678intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001679{
Chris Wilson615fb932010-08-04 13:50:24 +01001680 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001681 struct drm_device *dev = connector->dev;
1682
Chris Wilsonc5521702010-08-04 13:50:28 +01001683 if (intel_sdvo_connector->left)
1684 drm_property_destroy(dev, intel_sdvo_connector->left);
1685 if (intel_sdvo_connector->right)
1686 drm_property_destroy(dev, intel_sdvo_connector->right);
1687 if (intel_sdvo_connector->top)
1688 drm_property_destroy(dev, intel_sdvo_connector->top);
1689 if (intel_sdvo_connector->bottom)
1690 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1691 if (intel_sdvo_connector->hpos)
1692 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1693 if (intel_sdvo_connector->vpos)
1694 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1695 if (intel_sdvo_connector->saturation)
1696 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1697 if (intel_sdvo_connector->contrast)
1698 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1699 if (intel_sdvo_connector->hue)
1700 drm_property_destroy(dev, intel_sdvo_connector->hue);
1701 if (intel_sdvo_connector->sharpness)
1702 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1703 if (intel_sdvo_connector->flicker_filter)
1704 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1705 if (intel_sdvo_connector->flicker_filter_2d)
1706 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1707 if (intel_sdvo_connector->flicker_filter_adaptive)
1708 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1709 if (intel_sdvo_connector->tv_luma_filter)
1710 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1711 if (intel_sdvo_connector->tv_chroma_filter)
1712 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001713 if (intel_sdvo_connector->dot_crawl)
1714 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001715 if (intel_sdvo_connector->brightness)
1716 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001717}
1718
Jesse Barnes79e53942008-11-07 14:24:08 -08001719static void intel_sdvo_destroy(struct drm_connector *connector)
1720{
Chris Wilson615fb932010-08-04 13:50:24 +01001721 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001722
Chris Wilsonc5521702010-08-04 13:50:28 +01001723 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001724 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001725 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001726
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001727 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001728 drm_sysfs_connector_remove(connector);
1729 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001730 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001731}
1732
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001733static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1734{
1735 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1736 struct edid *edid;
1737 bool has_audio = false;
1738
1739 if (!intel_sdvo->is_hdmi)
1740 return false;
1741
1742 edid = intel_sdvo_get_edid(connector);
1743 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1744 has_audio = drm_detect_monitor_audio(edid);
1745
1746 return has_audio;
1747}
1748
Zhao Yakuice6feab2009-08-24 13:50:26 +08001749static int
1750intel_sdvo_set_property(struct drm_connector *connector,
1751 struct drm_property *property,
1752 uint64_t val)
1753{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001754 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001755 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001756 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001757 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001758 uint8_t cmd;
1759 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001760
1761 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001762 if (ret)
1763 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001764
Chris Wilson3f43c482011-05-12 22:17:24 +01001765 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001766 int i = val;
1767 bool has_audio;
1768
1769 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001770 return 0;
1771
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001772 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001773
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001774 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001775 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1776 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001777 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001778
1779 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001780 return 0;
1781
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001782 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001783 goto done;
1784 }
1785
Chris Wilsone953fd72011-02-21 22:23:52 +00001786 if (property == dev_priv->broadcast_rgb_property) {
1787 if (val == !!intel_sdvo->color_range)
1788 return 0;
1789
1790 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001791 goto done;
1792 }
1793
Chris Wilsonc5521702010-08-04 13:50:28 +01001794#define CHECK_PROPERTY(name, NAME) \
1795 if (intel_sdvo_connector->name == property) { \
1796 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1797 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1798 cmd = SDVO_CMD_SET_##NAME; \
1799 intel_sdvo_connector->cur_##name = temp_value; \
1800 goto set_value; \
1801 }
1802
1803 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001804 if (val >= TV_FORMAT_NUM)
1805 return -EINVAL;
1806
Chris Wilson40039752010-08-04 13:50:26 +01001807 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001808 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001809 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001810
Chris Wilson40039752010-08-04 13:50:26 +01001811 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001812 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001813 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001814 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001815 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001816 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001817 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001818 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001819 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001820
Chris Wilson615fb932010-08-04 13:50:24 +01001821 intel_sdvo_connector->left_margin = temp_value;
1822 intel_sdvo_connector->right_margin = temp_value;
1823 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001824 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001825 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001826 goto set_value;
1827 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001828 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001829 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001830 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001831 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001832
Chris Wilson615fb932010-08-04 13:50:24 +01001833 intel_sdvo_connector->left_margin = temp_value;
1834 intel_sdvo_connector->right_margin = temp_value;
1835 temp_value = intel_sdvo_connector->max_hscan -
1836 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001837 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001838 goto set_value;
1839 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001840 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001841 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001842 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001843 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001844
Chris Wilson615fb932010-08-04 13:50:24 +01001845 intel_sdvo_connector->top_margin = temp_value;
1846 intel_sdvo_connector->bottom_margin = temp_value;
1847 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001848 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001849 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001850 goto set_value;
1851 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001852 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001853 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001854 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001855 return 0;
1856
Chris Wilson615fb932010-08-04 13:50:24 +01001857 intel_sdvo_connector->top_margin = temp_value;
1858 intel_sdvo_connector->bottom_margin = temp_value;
1859 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001860 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001861 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001862 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001863 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001864 CHECK_PROPERTY(hpos, HPOS)
1865 CHECK_PROPERTY(vpos, VPOS)
1866 CHECK_PROPERTY(saturation, SATURATION)
1867 CHECK_PROPERTY(contrast, CONTRAST)
1868 CHECK_PROPERTY(hue, HUE)
1869 CHECK_PROPERTY(brightness, BRIGHTNESS)
1870 CHECK_PROPERTY(sharpness, SHARPNESS)
1871 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1872 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1873 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1874 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1875 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001876 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001877 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001878
1879 return -EINVAL; /* unknown property */
1880
1881set_value:
1882 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1883 return -EIO;
1884
1885
1886done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001887 if (intel_sdvo->base.base.crtc) {
1888 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001889 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001890 crtc->y, crtc->fb);
1891 }
1892
Chris Wilson32aad862010-08-04 13:50:25 +01001893 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001894#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001895}
1896
Jesse Barnes79e53942008-11-07 14:24:08 -08001897static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1898 .dpms = intel_sdvo_dpms,
1899 .mode_fixup = intel_sdvo_mode_fixup,
Daniel Vetterce22c322012-07-01 15:31:04 +02001900 .prepare = intel_encoder_noop,
Jesse Barnes79e53942008-11-07 14:24:08 -08001901 .mode_set = intel_sdvo_mode_set,
Daniel Vetterce22c322012-07-01 15:31:04 +02001902 .commit = intel_encoder_noop,
1903 .disable = intel_encoder_disable
Jesse Barnes79e53942008-11-07 14:24:08 -08001904};
1905
1906static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001907 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001908 .detect = intel_sdvo_detect,
1909 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001910 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001911 .destroy = intel_sdvo_destroy,
1912};
1913
1914static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1915 .get_modes = intel_sdvo_get_modes,
1916 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001917 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001918};
1919
Hannes Ederb358d0a2008-12-18 21:18:47 +01001920static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001921{
Chris Wilson890f3352010-09-14 16:46:59 +01001922 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001923
Chris Wilsonea5b2132010-08-04 13:50:23 +01001924 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001925 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001926 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001927
Chris Wilsone957d772010-09-24 12:52:03 +01001928 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001929 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001930}
1931
1932static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1933 .destroy = intel_sdvo_enc_destroy,
1934};
1935
Chris Wilsonb66d8422010-08-12 15:26:41 +01001936static void
1937intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1938{
1939 uint16_t mask = 0;
1940 unsigned int num_bits;
1941
1942 /* Make a mask of outputs less than or equal to our own priority in the
1943 * list.
1944 */
1945 switch (sdvo->controlled_output) {
1946 case SDVO_OUTPUT_LVDS1:
1947 mask |= SDVO_OUTPUT_LVDS1;
1948 case SDVO_OUTPUT_LVDS0:
1949 mask |= SDVO_OUTPUT_LVDS0;
1950 case SDVO_OUTPUT_TMDS1:
1951 mask |= SDVO_OUTPUT_TMDS1;
1952 case SDVO_OUTPUT_TMDS0:
1953 mask |= SDVO_OUTPUT_TMDS0;
1954 case SDVO_OUTPUT_RGB1:
1955 mask |= SDVO_OUTPUT_RGB1;
1956 case SDVO_OUTPUT_RGB0:
1957 mask |= SDVO_OUTPUT_RGB0;
1958 break;
1959 }
1960
1961 /* Count bits to find what number we are in the priority list. */
1962 mask &= sdvo->caps.output_flags;
1963 num_bits = hweight16(mask);
1964 /* If more than 3 outputs, default to DDC bus 3 for now. */
1965 if (num_bits > 3)
1966 num_bits = 3;
1967
1968 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1969 sdvo->ddc_bus = 1 << num_bits;
1970}
Jesse Barnes79e53942008-11-07 14:24:08 -08001971
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001972/**
1973 * Choose the appropriate DDC bus for control bus switch command for this
1974 * SDVO output based on the controlled output.
1975 *
1976 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1977 * outputs, then LVDS outputs.
1978 */
1979static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001980intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001981 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001982{
Adam Jacksonb1083332010-04-23 16:07:40 -04001983 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001984
Daniel Vettereef4eac2012-03-23 23:43:35 +01001985 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04001986 mapping = &(dev_priv->sdvo_mappings[0]);
1987 else
1988 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001989
Chris Wilsonb66d8422010-08-12 15:26:41 +01001990 if (mapping->initialized)
1991 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1992 else
1993 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001994}
1995
Chris Wilsone957d772010-09-24 12:52:03 +01001996static void
1997intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1998 struct intel_sdvo *sdvo, u32 reg)
1999{
2000 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04002001 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01002002
Daniel Vettereef4eac2012-03-23 23:43:35 +01002003 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01002004 mapping = &dev_priv->sdvo_mappings[0];
2005 else
2006 mapping = &dev_priv->sdvo_mappings[1];
2007
2008 pin = GMBUS_PORT_DPB;
Adam Jackson46eb3032011-06-16 16:36:23 -04002009 if (mapping->initialized)
Chris Wilsone957d772010-09-24 12:52:03 +01002010 pin = mapping->i2c_pin;
Chris Wilsone957d772010-09-24 12:52:03 +01002011
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08002012 if (intel_gmbus_is_port_valid(pin)) {
2013 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
Adam Jacksond5090b92011-06-16 16:36:28 -04002014 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
Chris Wilson63abf3e2010-12-08 16:48:21 +00002015 intel_gmbus_force_bit(sdvo->i2c, true);
Adam Jackson46eb3032011-06-16 16:36:23 -04002016 } else {
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08002017 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
Adam Jackson46eb3032011-06-16 16:36:23 -04002018 }
Chris Wilsone957d772010-09-24 12:52:03 +01002019}
2020
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002021static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01002022intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002023{
Chris Wilson97aaf912011-01-04 20:10:52 +00002024 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002025}
2026
yakui_zhao714605e2009-05-31 17:18:07 +08002027static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01002028intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08002029{
2030 struct drm_i915_private *dev_priv = dev->dev_private;
2031 struct sdvo_device_mapping *my_mapping, *other_mapping;
2032
Daniel Vettereef4eac2012-03-23 23:43:35 +01002033 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08002034 my_mapping = &dev_priv->sdvo_mappings[0];
2035 other_mapping = &dev_priv->sdvo_mappings[1];
2036 } else {
2037 my_mapping = &dev_priv->sdvo_mappings[1];
2038 other_mapping = &dev_priv->sdvo_mappings[0];
2039 }
2040
2041 /* If the BIOS described our SDVO device, take advantage of it. */
2042 if (my_mapping->slave_addr)
2043 return my_mapping->slave_addr;
2044
2045 /* If the BIOS only described a different SDVO device, use the
2046 * address that it isn't using.
2047 */
2048 if (other_mapping->slave_addr) {
2049 if (other_mapping->slave_addr == 0x70)
2050 return 0x72;
2051 else
2052 return 0x70;
2053 }
2054
2055 /* No SDVO device info is found for another DVO port,
2056 * so use mapping assumption we had before BIOS parsing.
2057 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01002058 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08002059 return 0x70;
2060 else
2061 return 0x72;
2062}
2063
Zhenyu Wang14571b42010-03-30 14:06:33 +08002064static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01002065intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2066 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002067{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002068 drm_connector_init(encoder->base.base.dev,
2069 &connector->base.base,
2070 &intel_sdvo_connector_funcs,
2071 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002072
Chris Wilsondf0e9242010-09-09 16:20:55 +01002073 drm_connector_helper_add(&connector->base.base,
2074 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002075
Peter Ross8f4839e2012-01-28 14:49:25 +01002076 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01002077 connector->base.base.doublescan_allowed = 0;
2078 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002079
Chris Wilsondf0e9242010-09-09 16:20:55 +01002080 intel_connector_attach_encoder(&connector->base, &encoder->base);
2081 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002082}
2083
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002084static void
2085intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2086{
2087 struct drm_device *dev = connector->base.base.dev;
2088
Chris Wilson3f43c482011-05-12 22:17:24 +01002089 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00002090 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2091 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002092}
2093
Zhenyu Wang14571b42010-03-30 14:06:33 +08002094static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002095intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002096{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002097 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002098 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002099 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002100 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002101 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002102
Chris Wilson615fb932010-08-04 13:50:24 +01002103 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2104 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002105 return false;
2106
Zhenyu Wang14571b42010-03-30 14:06:33 +08002107 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002108 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002109 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002110 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002111 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002112 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002113 }
2114
Chris Wilson615fb932010-08-04 13:50:24 +01002115 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002116 connector = &intel_connector->base;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002117 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2118 connector->polled = DRM_CONNECTOR_POLL_HPD;
2119 intel_sdvo->hotplug_active[0] |= 1 << device;
2120 /* Some SDVO devices have one-shot hotplug interrupts.
2121 * Ensure that they get re-enabled when an interrupt happens.
2122 */
2123 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2124 intel_sdvo_enable_hotplug(intel_encoder);
2125 }
2126 else
2127 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002128 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2129 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2130
Chris Wilsone27d8532010-10-22 09:15:22 +01002131 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002132 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002133 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002134 }
Daniel Vetter66a92782012-07-12 20:08:18 +02002135 intel_sdvo->base.cloneable = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002136
Chris Wilsondf0e9242010-09-09 16:20:55 +01002137 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002138 if (intel_sdvo->is_hdmi)
2139 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002140
2141 return true;
2142}
2143
2144static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002145intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002146{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002147 struct drm_encoder *encoder = &intel_sdvo->base.base;
2148 struct drm_connector *connector;
2149 struct intel_connector *intel_connector;
2150 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002151
Chris Wilson615fb932010-08-04 13:50:24 +01002152 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2153 if (!intel_sdvo_connector)
2154 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002155
Chris Wilson615fb932010-08-04 13:50:24 +01002156 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002157 connector = &intel_connector->base;
2158 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2159 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002160
Chris Wilson4ef69c72010-09-09 15:14:28 +01002161 intel_sdvo->controlled_output |= type;
2162 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002163
Chris Wilson4ef69c72010-09-09 15:14:28 +01002164 intel_sdvo->is_tv = true;
2165 intel_sdvo->base.needs_tv_clock = true;
Daniel Vetter66a92782012-07-12 20:08:18 +02002166 intel_sdvo->base.cloneable = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002167
Chris Wilsondf0e9242010-09-09 16:20:55 +01002168 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002169
Chris Wilson4ef69c72010-09-09 15:14:28 +01002170 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002171 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002172
Chris Wilson4ef69c72010-09-09 15:14:28 +01002173 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002174 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002175
Chris Wilson4ef69c72010-09-09 15:14:28 +01002176 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002177
2178err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002179 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002180 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002181}
2182
2183static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002184intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002185{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002186 struct drm_encoder *encoder = &intel_sdvo->base.base;
2187 struct drm_connector *connector;
2188 struct intel_connector *intel_connector;
2189 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002190
Chris Wilson615fb932010-08-04 13:50:24 +01002191 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2192 if (!intel_sdvo_connector)
2193 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002194
Chris Wilson615fb932010-08-04 13:50:24 +01002195 intel_connector = &intel_sdvo_connector->base;
2196 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002197 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2198 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2199 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002200
Chris Wilson4ef69c72010-09-09 15:14:28 +01002201 if (device == 0) {
2202 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2203 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2204 } else if (device == 1) {
2205 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2206 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2207 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002208
Daniel Vetter66a92782012-07-12 20:08:18 +02002209 intel_sdvo->base.cloneable = true;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002210
Chris Wilsondf0e9242010-09-09 16:20:55 +01002211 intel_sdvo_connector_init(intel_sdvo_connector,
2212 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002213 return true;
2214}
2215
2216static bool
2217intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2218{
2219 struct drm_encoder *encoder = &intel_sdvo->base.base;
2220 struct drm_connector *connector;
2221 struct intel_connector *intel_connector;
2222 struct intel_sdvo_connector *intel_sdvo_connector;
2223
2224 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2225 if (!intel_sdvo_connector)
2226 return false;
2227
2228 intel_connector = &intel_sdvo_connector->base;
2229 connector = &intel_connector->base;
2230 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2231 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2232
2233 if (device == 0) {
2234 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2235 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2236 } else if (device == 1) {
2237 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2238 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2239 }
2240
Daniel Vetter66a92782012-07-12 20:08:18 +02002241 /* SDVO LVDS is cloneable because the SDVO encoder does the upscaling,
2242 * as opposed to native LVDS, where we upscale with the panel-fitter
2243 * (and hence only the native LVDS resolution could be cloned). */
2244 intel_sdvo->base.cloneable = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002245
Chris Wilsondf0e9242010-09-09 16:20:55 +01002246 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002247 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002248 goto err;
2249
2250 return true;
2251
2252err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002253 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002254 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002255}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002256
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002257static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002258intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002259{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002260 intel_sdvo->is_tv = false;
2261 intel_sdvo->base.needs_tv_clock = false;
2262 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002263
Zhenyu Wang14571b42010-03-30 14:06:33 +08002264 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002265
Zhenyu Wang14571b42010-03-30 14:06:33 +08002266 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002267 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002268 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002269
Zhenyu Wang14571b42010-03-30 14:06:33 +08002270 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002271 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002272 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002273
Zhenyu Wang14571b42010-03-30 14:06:33 +08002274 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002275 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002276 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002277 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002278
Zhenyu Wang14571b42010-03-30 14:06:33 +08002279 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002280 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002281 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002282
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002283 if (flags & SDVO_OUTPUT_YPRPB0)
2284 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2285 return false;
2286
Zhenyu Wang14571b42010-03-30 14:06:33 +08002287 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002288 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002289 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002290
Zhenyu Wang14571b42010-03-30 14:06:33 +08002291 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002292 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002293 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002294
Zhenyu Wang14571b42010-03-30 14:06:33 +08002295 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002296 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002297 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002298
Zhenyu Wang14571b42010-03-30 14:06:33 +08002299 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002300 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002301 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002302
Zhenyu Wang14571b42010-03-30 14:06:33 +08002303 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002304 unsigned char bytes[2];
2305
Chris Wilsonea5b2132010-08-04 13:50:23 +01002306 intel_sdvo->controlled_output = 0;
2307 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002308 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002309 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002310 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002311 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002312 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002313 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002314
Zhenyu Wang14571b42010-03-30 14:06:33 +08002315 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002316}
2317
Chris Wilson32aad862010-08-04 13:50:25 +01002318static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2319 struct intel_sdvo_connector *intel_sdvo_connector,
2320 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002321{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002322 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002323 struct intel_sdvo_tv_format format;
2324 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002325
Chris Wilson32aad862010-08-04 13:50:25 +01002326 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2327 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002328
Chris Wilson1a3665c2011-01-25 13:59:37 +00002329 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002330 if (!intel_sdvo_get_value(intel_sdvo,
2331 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2332 &format, sizeof(format)))
2333 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002334
Chris Wilson32aad862010-08-04 13:50:25 +01002335 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002336
2337 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002338 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002339
Chris Wilson615fb932010-08-04 13:50:24 +01002340 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002341 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002342 if (format_map & (1 << i))
2343 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002344
2345
Chris Wilsonc5521702010-08-04 13:50:28 +01002346 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002347 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2348 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002349 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002350 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002351
Chris Wilson615fb932010-08-04 13:50:24 +01002352 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002353 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002354 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002355 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002356
Chris Wilson40039752010-08-04 13:50:26 +01002357 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002358 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002359 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002360 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002361
2362}
2363
Chris Wilsonc5521702010-08-04 13:50:28 +01002364#define ENHANCEMENT(name, NAME) do { \
2365 if (enhancements.name) { \
2366 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2367 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2368 return false; \
2369 intel_sdvo_connector->max_##name = data_value[0]; \
2370 intel_sdvo_connector->cur_##name = response; \
2371 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002372 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002373 if (!intel_sdvo_connector->name) return false; \
Chris Wilsonc5521702010-08-04 13:50:28 +01002374 drm_connector_attach_property(connector, \
2375 intel_sdvo_connector->name, \
2376 intel_sdvo_connector->cur_##name); \
2377 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2378 data_value[0], data_value[1], response); \
2379 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002380} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002381
2382static bool
2383intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2384 struct intel_sdvo_connector *intel_sdvo_connector,
2385 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002386{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002387 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002388 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002389 uint16_t response, data_value[2];
2390
Chris Wilsonc5521702010-08-04 13:50:28 +01002391 /* when horizontal overscan is supported, Add the left/right property */
2392 if (enhancements.overscan_h) {
2393 if (!intel_sdvo_get_value(intel_sdvo,
2394 SDVO_CMD_GET_MAX_OVERSCAN_H,
2395 &data_value, 4))
2396 return false;
2397
2398 if (!intel_sdvo_get_value(intel_sdvo,
2399 SDVO_CMD_GET_OVERSCAN_H,
2400 &response, 2))
2401 return false;
2402
2403 intel_sdvo_connector->max_hscan = data_value[0];
2404 intel_sdvo_connector->left_margin = data_value[0] - response;
2405 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2406 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002407 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002408 if (!intel_sdvo_connector->left)
2409 return false;
2410
Chris Wilsonc5521702010-08-04 13:50:28 +01002411 drm_connector_attach_property(connector,
2412 intel_sdvo_connector->left,
2413 intel_sdvo_connector->left_margin);
2414
2415 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002416 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002417 if (!intel_sdvo_connector->right)
2418 return false;
2419
Chris Wilsonc5521702010-08-04 13:50:28 +01002420 drm_connector_attach_property(connector,
2421 intel_sdvo_connector->right,
2422 intel_sdvo_connector->right_margin);
2423 DRM_DEBUG_KMS("h_overscan: max %d, "
2424 "default %d, current %d\n",
2425 data_value[0], data_value[1], response);
2426 }
2427
2428 if (enhancements.overscan_v) {
2429 if (!intel_sdvo_get_value(intel_sdvo,
2430 SDVO_CMD_GET_MAX_OVERSCAN_V,
2431 &data_value, 4))
2432 return false;
2433
2434 if (!intel_sdvo_get_value(intel_sdvo,
2435 SDVO_CMD_GET_OVERSCAN_V,
2436 &response, 2))
2437 return false;
2438
2439 intel_sdvo_connector->max_vscan = data_value[0];
2440 intel_sdvo_connector->top_margin = data_value[0] - response;
2441 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2442 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002443 drm_property_create_range(dev, 0,
2444 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002445 if (!intel_sdvo_connector->top)
2446 return false;
2447
Chris Wilsonc5521702010-08-04 13:50:28 +01002448 drm_connector_attach_property(connector,
2449 intel_sdvo_connector->top,
2450 intel_sdvo_connector->top_margin);
2451
2452 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002453 drm_property_create_range(dev, 0,
2454 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002455 if (!intel_sdvo_connector->bottom)
2456 return false;
2457
Chris Wilsonc5521702010-08-04 13:50:28 +01002458 drm_connector_attach_property(connector,
2459 intel_sdvo_connector->bottom,
2460 intel_sdvo_connector->bottom_margin);
2461 DRM_DEBUG_KMS("v_overscan: max %d, "
2462 "default %d, current %d\n",
2463 data_value[0], data_value[1], response);
2464 }
2465
2466 ENHANCEMENT(hpos, HPOS);
2467 ENHANCEMENT(vpos, VPOS);
2468 ENHANCEMENT(saturation, SATURATION);
2469 ENHANCEMENT(contrast, CONTRAST);
2470 ENHANCEMENT(hue, HUE);
2471 ENHANCEMENT(sharpness, SHARPNESS);
2472 ENHANCEMENT(brightness, BRIGHTNESS);
2473 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2474 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2475 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2476 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2477 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2478
Chris Wilsone0442182010-08-04 13:50:29 +01002479 if (enhancements.dot_crawl) {
2480 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2481 return false;
2482
2483 intel_sdvo_connector->max_dot_crawl = 1;
2484 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2485 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002486 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002487 if (!intel_sdvo_connector->dot_crawl)
2488 return false;
2489
Chris Wilsone0442182010-08-04 13:50:29 +01002490 drm_connector_attach_property(connector,
2491 intel_sdvo_connector->dot_crawl,
2492 intel_sdvo_connector->cur_dot_crawl);
2493 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2494 }
2495
Chris Wilsonc5521702010-08-04 13:50:28 +01002496 return true;
2497}
2498
2499static bool
2500intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2501 struct intel_sdvo_connector *intel_sdvo_connector,
2502 struct intel_sdvo_enhancements_reply enhancements)
2503{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002504 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002505 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2506 uint16_t response, data_value[2];
2507
2508 ENHANCEMENT(brightness, BRIGHTNESS);
2509
2510 return true;
2511}
2512#undef ENHANCEMENT
2513
2514static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2515 struct intel_sdvo_connector *intel_sdvo_connector)
2516{
2517 union {
2518 struct intel_sdvo_enhancements_reply reply;
2519 uint16_t response;
2520 } enhancements;
2521
Chris Wilson1a3665c2011-01-25 13:59:37 +00002522 BUILD_BUG_ON(sizeof(enhancements) != 2);
2523
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002524 enhancements.response = 0;
2525 intel_sdvo_get_value(intel_sdvo,
2526 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2527 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002528 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002529 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002530 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002531 }
Chris Wilson32aad862010-08-04 13:50:25 +01002532
Chris Wilsonc5521702010-08-04 13:50:28 +01002533 if (IS_TV(intel_sdvo_connector))
2534 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002535 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002536 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2537 else
2538 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002539}
Chris Wilson32aad862010-08-04 13:50:25 +01002540
Chris Wilsone957d772010-09-24 12:52:03 +01002541static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2542 struct i2c_msg *msgs,
2543 int num)
2544{
2545 struct intel_sdvo *sdvo = adapter->algo_data;
2546
2547 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2548 return -EIO;
2549
2550 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2551}
2552
2553static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2554{
2555 struct intel_sdvo *sdvo = adapter->algo_data;
2556 return sdvo->i2c->algo->functionality(sdvo->i2c);
2557}
2558
2559static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2560 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2561 .functionality = intel_sdvo_ddc_proxy_func
2562};
2563
2564static bool
2565intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2566 struct drm_device *dev)
2567{
2568 sdvo->ddc.owner = THIS_MODULE;
2569 sdvo->ddc.class = I2C_CLASS_DDC;
2570 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2571 sdvo->ddc.dev.parent = &dev->pdev->dev;
2572 sdvo->ddc.algo_data = sdvo;
2573 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2574
2575 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002576}
2577
Daniel Vettereef4eac2012-03-23 23:43:35 +01002578bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002579{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002580 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002581 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002582 struct intel_sdvo *intel_sdvo;
Chris Wilson084b6122012-05-11 18:01:33 +01002583 u32 hotplug_mask;
Jesse Barnes79e53942008-11-07 14:24:08 -08002584 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002585
Chris Wilsonea5b2132010-08-04 13:50:23 +01002586 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2587 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002588 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002589
Chris Wilson56184e32011-05-17 14:03:50 +01002590 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002591 intel_sdvo->is_sdvob = is_sdvob;
2592 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002593 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Chris Wilsone957d772010-09-24 12:52:03 +01002594 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2595 kfree(intel_sdvo);
2596 return false;
2597 }
2598
Chris Wilson56184e32011-05-17 14:03:50 +01002599 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002600 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002601 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002602 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002603
Jesse Barnes79e53942008-11-07 14:24:08 -08002604 /* Read the regs to test if we can talk to the device */
2605 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002606 u8 byte;
2607
2608 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002609 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2610 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002611 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002612 }
2613 }
2614
Chris Wilson084b6122012-05-11 18:01:33 +01002615 hotplug_mask = 0;
2616 if (IS_G4X(dev)) {
2617 hotplug_mask = intel_sdvo->is_sdvob ?
2618 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2619 } else if (IS_GEN4(dev)) {
2620 hotplug_mask = intel_sdvo->is_sdvob ?
2621 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2622 } else {
2623 hotplug_mask = intel_sdvo->is_sdvob ?
2624 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2625 }
2626 dev_priv->hotplug_supported_mask |= hotplug_mask;
Ma Ling619ac3b2009-05-18 16:12:46 +08002627
Chris Wilson4ef69c72010-09-09 15:14:28 +01002628 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002629
Daniel Vetterce22c322012-07-01 15:31:04 +02002630 intel_encoder->disable = intel_disable_sdvo;
2631 intel_encoder->enable = intel_enable_sdvo;
2632
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002633 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002634 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002635 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002636
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002637 /* Set up hotplug command - note paranoia about contents of reply.
2638 * We assume that the hardware is in a sane state, and only touch
2639 * the bits we think we understand.
2640 */
2641 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2642 &intel_sdvo->hotplug_active, 2);
2643 intel_sdvo->hotplug_active[0] &= ~0x3;
2644
Chris Wilsonea5b2132010-08-04 13:50:23 +01002645 if (intel_sdvo_output_setup(intel_sdvo,
2646 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002647 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2648 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002649 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002650 }
2651
Chris Wilsonea5b2132010-08-04 13:50:23 +01002652 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002653
Jesse Barnes79e53942008-11-07 14:24:08 -08002654 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002655 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002656 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002657
Chris Wilson32aad862010-08-04 13:50:25 +01002658 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2659 &intel_sdvo->pixel_clock_min,
2660 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002661 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002662
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002663 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002664 "clock range %dMHz - %dMHz, "
2665 "input 1: %c, input 2: %c, "
2666 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002667 SDVO_NAME(intel_sdvo),
2668 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2669 intel_sdvo->caps.device_rev_id,
2670 intel_sdvo->pixel_clock_min / 1000,
2671 intel_sdvo->pixel_clock_max / 1000,
2672 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2673 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002674 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002675 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002676 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002677 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002678 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002679 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002680
Chris Wilsonf899fc62010-07-20 15:44:45 -07002681err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002682 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002683 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002684 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002685
Eric Anholt7d573822009-01-02 13:33:00 -08002686 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002687}