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Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001/*
2 * Copyright (C) 2015 Microchip Technology
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17#include <linux/version.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/ethtool.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000022#include <linux/usb.h>
23#include <linux/crc32.h>
24#include <linux/signal.h>
25#include <linux/slab.h>
26#include <linux/if_vlan.h>
27#include <linux/uaccess.h>
28#include <linux/list.h>
29#include <linux/ip.h>
30#include <linux/ipv6.h>
31#include <linux/mdio.h>
Andrew Lunnc6e970a2017-03-28 23:45:06 +020032#include <linux/phy.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000033#include <net/ip6_checksum.h>
Woojung Huhcc89c322016-11-01 20:02:00 +000034#include <linux/interrupt.h>
35#include <linux/irqdomain.h>
36#include <linux/irq.h>
37#include <linux/irqchip/chained_irq.h>
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +000038#include <linux/microchipphy.h>
Raghuram Chary J89b36fb2018-04-28 11:33:14 +053039#include <linux/phy_fixed.h>
Phil Elwell1827b062018-04-19 17:59:39 +010040#include <linux/of_mdio.h>
Phil Elwell760db292018-04-19 17:59:38 +010041#include <linux/of_net.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000042#include "lan78xx.h"
43
44#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
45#define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices"
46#define DRIVER_NAME "lan78xx"
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000047
48#define TX_TIMEOUT_JIFFIES (5 * HZ)
49#define THROTTLE_JIFFIES (HZ / 8)
50#define UNLINK_TIMEOUT_MS 3
51
52#define RX_MAX_QUEUE_MEMORY (60 * 1518)
53
54#define SS_USB_PKT_SIZE (1024)
55#define HS_USB_PKT_SIZE (512)
56#define FS_USB_PKT_SIZE (64)
57
58#define MAX_RX_FIFO_SIZE (12 * 1024)
59#define MAX_TX_FIFO_SIZE (12 * 1024)
60#define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE)
61#define DEFAULT_BULK_IN_DELAY (0x0800)
62#define MAX_SINGLE_PACKET_SIZE (9000)
63#define DEFAULT_TX_CSUM_ENABLE (true)
64#define DEFAULT_RX_CSUM_ENABLE (true)
65#define DEFAULT_TSO_CSUM_ENABLE (true)
66#define DEFAULT_VLAN_FILTER_ENABLE (true)
Dave Stevensonec21ecf2018-06-25 15:07:14 +010067#define DEFAULT_VLAN_RX_OFFLOAD (true)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000068#define TX_OVERHEAD (8)
69#define RXW_PADDING 2
70
71#define LAN78XX_USB_VENDOR_ID (0x0424)
72#define LAN7800_USB_PRODUCT_ID (0x7800)
73#define LAN7850_USB_PRODUCT_ID (0x7850)
Woojung Huh02dc1f32016-12-07 20:26:25 +000074#define LAN7801_USB_PRODUCT_ID (0x7801)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000075#define LAN78XX_EEPROM_MAGIC (0x78A5)
76#define LAN78XX_OTP_MAGIC (0x78F3)
77
78#define MII_READ 1
79#define MII_WRITE 0
80
81#define EEPROM_INDICATOR (0xA5)
82#define EEPROM_MAC_OFFSET (0x01)
83#define MAX_EEPROM_SIZE 512
84#define OTP_INDICATOR_1 (0xF3)
85#define OTP_INDICATOR_2 (0xF7)
86
87#define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \
88 WAKE_MCAST | WAKE_BCAST | \
89 WAKE_ARP | WAKE_MAGIC)
90
91/* USB related defines */
92#define BULK_IN_PIPE 1
93#define BULK_OUT_PIPE 2
94
95/* default autosuspend delay (mSec)*/
96#define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000)
97
Woojung Huh20ff5562016-03-16 22:10:40 +000098/* statistic update interval (mSec) */
99#define STAT_UPDATE_TIMER (1 * 1000)
100
Woojung Huhcc89c322016-11-01 20:02:00 +0000101/* defines interrupts from interrupt EP */
102#define MAX_INT_EP (32)
103#define INT_EP_INTEP (31)
104#define INT_EP_OTP_WR_DONE (28)
105#define INT_EP_EEE_TX_LPI_START (26)
106#define INT_EP_EEE_TX_LPI_STOP (25)
107#define INT_EP_EEE_RX_LPI (24)
108#define INT_EP_MAC_RESET_TIMEOUT (23)
109#define INT_EP_RDFO (22)
110#define INT_EP_TXE (21)
111#define INT_EP_USB_STATUS (20)
112#define INT_EP_TX_DIS (19)
113#define INT_EP_RX_DIS (18)
114#define INT_EP_PHY (17)
115#define INT_EP_DP (16)
116#define INT_EP_MAC_ERR (15)
117#define INT_EP_TDFU (14)
118#define INT_EP_TDFO (13)
119#define INT_EP_UTX (12)
120#define INT_EP_GPIO_11 (11)
121#define INT_EP_GPIO_10 (10)
122#define INT_EP_GPIO_9 (9)
123#define INT_EP_GPIO_8 (8)
124#define INT_EP_GPIO_7 (7)
125#define INT_EP_GPIO_6 (6)
126#define INT_EP_GPIO_5 (5)
127#define INT_EP_GPIO_4 (4)
128#define INT_EP_GPIO_3 (3)
129#define INT_EP_GPIO_2 (2)
130#define INT_EP_GPIO_1 (1)
131#define INT_EP_GPIO_0 (0)
132
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000133static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = {
134 "RX FCS Errors",
135 "RX Alignment Errors",
136 "Rx Fragment Errors",
137 "RX Jabber Errors",
138 "RX Undersize Frame Errors",
139 "RX Oversize Frame Errors",
140 "RX Dropped Frames",
141 "RX Unicast Byte Count",
142 "RX Broadcast Byte Count",
143 "RX Multicast Byte Count",
144 "RX Unicast Frames",
145 "RX Broadcast Frames",
146 "RX Multicast Frames",
147 "RX Pause Frames",
148 "RX 64 Byte Frames",
149 "RX 65 - 127 Byte Frames",
150 "RX 128 - 255 Byte Frames",
151 "RX 256 - 511 Bytes Frames",
152 "RX 512 - 1023 Byte Frames",
153 "RX 1024 - 1518 Byte Frames",
154 "RX Greater 1518 Byte Frames",
155 "EEE RX LPI Transitions",
156 "EEE RX LPI Time",
157 "TX FCS Errors",
158 "TX Excess Deferral Errors",
159 "TX Carrier Errors",
160 "TX Bad Byte Count",
161 "TX Single Collisions",
162 "TX Multiple Collisions",
163 "TX Excessive Collision",
164 "TX Late Collisions",
165 "TX Unicast Byte Count",
166 "TX Broadcast Byte Count",
167 "TX Multicast Byte Count",
168 "TX Unicast Frames",
169 "TX Broadcast Frames",
170 "TX Multicast Frames",
171 "TX Pause Frames",
172 "TX 64 Byte Frames",
173 "TX 65 - 127 Byte Frames",
174 "TX 128 - 255 Byte Frames",
175 "TX 256 - 511 Bytes Frames",
176 "TX 512 - 1023 Byte Frames",
177 "TX 1024 - 1518 Byte Frames",
178 "TX Greater 1518 Byte Frames",
179 "EEE TX LPI Transitions",
180 "EEE TX LPI Time",
181};
182
183struct lan78xx_statstage {
184 u32 rx_fcs_errors;
185 u32 rx_alignment_errors;
186 u32 rx_fragment_errors;
187 u32 rx_jabber_errors;
188 u32 rx_undersize_frame_errors;
189 u32 rx_oversize_frame_errors;
190 u32 rx_dropped_frames;
191 u32 rx_unicast_byte_count;
192 u32 rx_broadcast_byte_count;
193 u32 rx_multicast_byte_count;
194 u32 rx_unicast_frames;
195 u32 rx_broadcast_frames;
196 u32 rx_multicast_frames;
197 u32 rx_pause_frames;
198 u32 rx_64_byte_frames;
199 u32 rx_65_127_byte_frames;
200 u32 rx_128_255_byte_frames;
201 u32 rx_256_511_bytes_frames;
202 u32 rx_512_1023_byte_frames;
203 u32 rx_1024_1518_byte_frames;
204 u32 rx_greater_1518_byte_frames;
205 u32 eee_rx_lpi_transitions;
206 u32 eee_rx_lpi_time;
207 u32 tx_fcs_errors;
208 u32 tx_excess_deferral_errors;
209 u32 tx_carrier_errors;
210 u32 tx_bad_byte_count;
211 u32 tx_single_collisions;
212 u32 tx_multiple_collisions;
213 u32 tx_excessive_collision;
214 u32 tx_late_collisions;
215 u32 tx_unicast_byte_count;
216 u32 tx_broadcast_byte_count;
217 u32 tx_multicast_byte_count;
218 u32 tx_unicast_frames;
219 u32 tx_broadcast_frames;
220 u32 tx_multicast_frames;
221 u32 tx_pause_frames;
222 u32 tx_64_byte_frames;
223 u32 tx_65_127_byte_frames;
224 u32 tx_128_255_byte_frames;
225 u32 tx_256_511_bytes_frames;
226 u32 tx_512_1023_byte_frames;
227 u32 tx_1024_1518_byte_frames;
228 u32 tx_greater_1518_byte_frames;
229 u32 eee_tx_lpi_transitions;
230 u32 eee_tx_lpi_time;
231};
232
Woojung Huh20ff5562016-03-16 22:10:40 +0000233struct lan78xx_statstage64 {
234 u64 rx_fcs_errors;
235 u64 rx_alignment_errors;
236 u64 rx_fragment_errors;
237 u64 rx_jabber_errors;
238 u64 rx_undersize_frame_errors;
239 u64 rx_oversize_frame_errors;
240 u64 rx_dropped_frames;
241 u64 rx_unicast_byte_count;
242 u64 rx_broadcast_byte_count;
243 u64 rx_multicast_byte_count;
244 u64 rx_unicast_frames;
245 u64 rx_broadcast_frames;
246 u64 rx_multicast_frames;
247 u64 rx_pause_frames;
248 u64 rx_64_byte_frames;
249 u64 rx_65_127_byte_frames;
250 u64 rx_128_255_byte_frames;
251 u64 rx_256_511_bytes_frames;
252 u64 rx_512_1023_byte_frames;
253 u64 rx_1024_1518_byte_frames;
254 u64 rx_greater_1518_byte_frames;
255 u64 eee_rx_lpi_transitions;
256 u64 eee_rx_lpi_time;
257 u64 tx_fcs_errors;
258 u64 tx_excess_deferral_errors;
259 u64 tx_carrier_errors;
260 u64 tx_bad_byte_count;
261 u64 tx_single_collisions;
262 u64 tx_multiple_collisions;
263 u64 tx_excessive_collision;
264 u64 tx_late_collisions;
265 u64 tx_unicast_byte_count;
266 u64 tx_broadcast_byte_count;
267 u64 tx_multicast_byte_count;
268 u64 tx_unicast_frames;
269 u64 tx_broadcast_frames;
270 u64 tx_multicast_frames;
271 u64 tx_pause_frames;
272 u64 tx_64_byte_frames;
273 u64 tx_65_127_byte_frames;
274 u64 tx_128_255_byte_frames;
275 u64 tx_256_511_bytes_frames;
276 u64 tx_512_1023_byte_frames;
277 u64 tx_1024_1518_byte_frames;
278 u64 tx_greater_1518_byte_frames;
279 u64 eee_tx_lpi_transitions;
280 u64 eee_tx_lpi_time;
281};
282
Raghuram Chary J49621862018-04-20 11:43:50 +0530283static u32 lan78xx_regs[] = {
284 ID_REV,
285 INT_STS,
286 HW_CFG,
287 PMT_CTL,
288 E2P_CMD,
289 E2P_DATA,
290 USB_STATUS,
291 VLAN_TYPE,
292 MAC_CR,
293 MAC_RX,
294 MAC_TX,
295 FLOW,
296 ERR_STS,
297 MII_ACC,
298 MII_DATA,
299 EEE_TX_LPI_REQ_DLY,
300 EEE_TW_TX_SYS,
301 EEE_TX_LPI_REM_DLY,
302 WUCSR
303};
304
305#define PHY_REG_SIZE (32 * sizeof(u32))
306
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000307struct lan78xx_net;
308
309struct lan78xx_priv {
310 struct lan78xx_net *dev;
311 u32 rfe_ctl;
312 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicat hash table */
313 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */
314 u32 vlan_table[DP_SEL_VHF_VLAN_LEN];
315 struct mutex dataport_mutex; /* for dataport access */
316 spinlock_t rfe_ctl_lock; /* for rfe register access */
317 struct work_struct set_multicast;
318 struct work_struct set_vlan;
319 u32 wol;
320};
321
322enum skb_state {
323 illegal = 0,
324 tx_start,
325 tx_done,
326 rx_start,
327 rx_done,
328 rx_cleanup,
329 unlink_start
330};
331
332struct skb_data { /* skb->cb is one of these */
333 struct urb *urb;
334 struct lan78xx_net *dev;
335 enum skb_state state;
336 size_t length;
Woojung Huh74d79a22016-04-25 22:22:32 +0000337 int num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000338};
339
340struct usb_context {
341 struct usb_ctrlrequest req;
342 struct lan78xx_net *dev;
343};
344
345#define EVENT_TX_HALT 0
346#define EVENT_RX_HALT 1
347#define EVENT_RX_MEMORY 2
348#define EVENT_STS_SPLIT 3
349#define EVENT_LINK_RESET 4
350#define EVENT_RX_PAUSED 5
351#define EVENT_DEV_WAKING 6
352#define EVENT_DEV_ASLEEP 7
353#define EVENT_DEV_OPEN 8
Woojung Huh20ff5562016-03-16 22:10:40 +0000354#define EVENT_STAT_UPDATE 9
355
356struct statstage {
357 struct mutex access_lock; /* for stats access */
358 struct lan78xx_statstage saved;
359 struct lan78xx_statstage rollover_count;
360 struct lan78xx_statstage rollover_max;
361 struct lan78xx_statstage64 curr_stat;
362};
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000363
Woojung Huhcc89c322016-11-01 20:02:00 +0000364struct irq_domain_data {
365 struct irq_domain *irqdomain;
366 unsigned int phyirq;
367 struct irq_chip *irqchip;
368 irq_flow_handler_t irq_handler;
369 u32 irqenable;
370 struct mutex irq_lock; /* for irq bus access */
371};
372
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000373struct lan78xx_net {
374 struct net_device *net;
375 struct usb_device *udev;
376 struct usb_interface *intf;
377 void *driver_priv;
378
379 int rx_qlen;
380 int tx_qlen;
381 struct sk_buff_head rxq;
382 struct sk_buff_head txq;
383 struct sk_buff_head done;
384 struct sk_buff_head rxq_pause;
385 struct sk_buff_head txq_pend;
386
387 struct tasklet_struct bh;
388 struct delayed_work wq;
389
390 struct usb_host_endpoint *ep_blkin;
391 struct usb_host_endpoint *ep_blkout;
392 struct usb_host_endpoint *ep_intr;
393
394 int msg_enable;
395
396 struct urb *urb_intr;
397 struct usb_anchor deferred;
398
399 struct mutex phy_mutex; /* for phy access */
400 unsigned pipe_in, pipe_out, pipe_intr;
401
402 u32 hard_mtu; /* count any extra framing */
403 size_t rx_urb_size; /* size for rx urbs */
404
405 unsigned long flags;
406
407 wait_queue_head_t *wait;
408 unsigned char suspend_count;
409
410 unsigned maxpacket;
411 struct timer_list delay;
Woojung Huh20ff5562016-03-16 22:10:40 +0000412 struct timer_list stat_monitor;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000413
414 unsigned long data[5];
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000415
416 int link_on;
417 u8 mdix_ctrl;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000418
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000419 u32 chipid;
420 u32 chiprev;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000421 struct mii_bus *mdiobus;
Woojung Huh02dc1f32016-12-07 20:26:25 +0000422 phy_interface_t interface;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +0000423
424 int fc_autoneg;
425 u8 fc_request_control;
Woojung Huh20ff5562016-03-16 22:10:40 +0000426
427 int delta;
428 struct statstage stats;
Woojung Huhcc89c322016-11-01 20:02:00 +0000429
430 struct irq_domain_data domain_data;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000431};
432
Woojung Huh02dc1f32016-12-07 20:26:25 +0000433/* define external phy id */
434#define PHY_LAN8835 (0x0007C130)
435#define PHY_KSZ9031RNX (0x00221620)
436
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000437/* use ethtool to change the level for any given device */
438static int msg_level = -1;
439module_param(msg_level, int, 0);
440MODULE_PARM_DESC(msg_level, "Override default message level");
441
442static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
443{
444 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
445 int ret;
446
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000447 if (!buf)
448 return -ENOMEM;
449
450 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
451 USB_VENDOR_REQUEST_READ_REGISTER,
452 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
453 0, index, buf, 4, USB_CTRL_GET_TIMEOUT);
454 if (likely(ret >= 0)) {
455 le32_to_cpus(buf);
456 *data = *buf;
457 } else {
458 netdev_warn(dev->net,
459 "Failed to read register index 0x%08x. ret = %d",
460 index, ret);
461 }
462
463 kfree(buf);
464
465 return ret;
466}
467
468static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)
469{
470 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
471 int ret;
472
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000473 if (!buf)
474 return -ENOMEM;
475
476 *buf = data;
477 cpu_to_le32s(buf);
478
479 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
480 USB_VENDOR_REQUEST_WRITE_REGISTER,
481 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
482 0, index, buf, 4, USB_CTRL_SET_TIMEOUT);
483 if (unlikely(ret < 0)) {
484 netdev_warn(dev->net,
485 "Failed to write register index 0x%08x. ret = %d",
486 index, ret);
487 }
488
489 kfree(buf);
490
491 return ret;
492}
493
494static int lan78xx_read_stats(struct lan78xx_net *dev,
495 struct lan78xx_statstage *data)
496{
497 int ret = 0;
498 int i;
499 struct lan78xx_statstage *stats;
500 u32 *src;
501 u32 *dst;
502
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000503 stats = kmalloc(sizeof(*stats), GFP_KERNEL);
504 if (!stats)
505 return -ENOMEM;
506
507 ret = usb_control_msg(dev->udev,
508 usb_rcvctrlpipe(dev->udev, 0),
509 USB_VENDOR_REQUEST_GET_STATS,
510 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
511 0,
512 0,
513 (void *)stats,
514 sizeof(*stats),
515 USB_CTRL_SET_TIMEOUT);
516 if (likely(ret >= 0)) {
517 src = (u32 *)stats;
518 dst = (u32 *)data;
519 for (i = 0; i < sizeof(*stats)/sizeof(u32); i++) {
520 le32_to_cpus(&src[i]);
521 dst[i] = src[i];
522 }
523 } else {
524 netdev_warn(dev->net,
525 "Failed to read stat ret = 0x%x", ret);
526 }
527
528 kfree(stats);
529
530 return ret;
531}
532
Woojung Huh20ff5562016-03-16 22:10:40 +0000533#define check_counter_rollover(struct1, dev_stats, member) { \
534 if (struct1->member < dev_stats.saved.member) \
535 dev_stats.rollover_count.member++; \
536 }
537
538static void lan78xx_check_stat_rollover(struct lan78xx_net *dev,
539 struct lan78xx_statstage *stats)
540{
541 check_counter_rollover(stats, dev->stats, rx_fcs_errors);
542 check_counter_rollover(stats, dev->stats, rx_alignment_errors);
543 check_counter_rollover(stats, dev->stats, rx_fragment_errors);
544 check_counter_rollover(stats, dev->stats, rx_jabber_errors);
545 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors);
546 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors);
547 check_counter_rollover(stats, dev->stats, rx_dropped_frames);
548 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count);
549 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count);
550 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count);
551 check_counter_rollover(stats, dev->stats, rx_unicast_frames);
552 check_counter_rollover(stats, dev->stats, rx_broadcast_frames);
553 check_counter_rollover(stats, dev->stats, rx_multicast_frames);
554 check_counter_rollover(stats, dev->stats, rx_pause_frames);
555 check_counter_rollover(stats, dev->stats, rx_64_byte_frames);
556 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames);
557 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames);
558 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames);
559 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames);
560 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames);
561 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames);
562 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions);
563 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time);
564 check_counter_rollover(stats, dev->stats, tx_fcs_errors);
565 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors);
566 check_counter_rollover(stats, dev->stats, tx_carrier_errors);
567 check_counter_rollover(stats, dev->stats, tx_bad_byte_count);
568 check_counter_rollover(stats, dev->stats, tx_single_collisions);
569 check_counter_rollover(stats, dev->stats, tx_multiple_collisions);
570 check_counter_rollover(stats, dev->stats, tx_excessive_collision);
571 check_counter_rollover(stats, dev->stats, tx_late_collisions);
572 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count);
573 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count);
574 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count);
575 check_counter_rollover(stats, dev->stats, tx_unicast_frames);
576 check_counter_rollover(stats, dev->stats, tx_broadcast_frames);
577 check_counter_rollover(stats, dev->stats, tx_multicast_frames);
578 check_counter_rollover(stats, dev->stats, tx_pause_frames);
579 check_counter_rollover(stats, dev->stats, tx_64_byte_frames);
580 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames);
581 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames);
582 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames);
583 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames);
584 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames);
585 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames);
586 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions);
587 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time);
588
589 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage));
590}
591
592static void lan78xx_update_stats(struct lan78xx_net *dev)
593{
594 u32 *p, *count, *max;
595 u64 *data;
596 int i;
597 struct lan78xx_statstage lan78xx_stats;
598
599 if (usb_autopm_get_interface(dev->intf) < 0)
600 return;
601
602 p = (u32 *)&lan78xx_stats;
603 count = (u32 *)&dev->stats.rollover_count;
604 max = (u32 *)&dev->stats.rollover_max;
605 data = (u64 *)&dev->stats.curr_stat;
606
607 mutex_lock(&dev->stats.access_lock);
608
609 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0)
610 lan78xx_check_stat_rollover(dev, &lan78xx_stats);
611
612 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++)
613 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1));
614
615 mutex_unlock(&dev->stats.access_lock);
616
617 usb_autopm_put_interface(dev->intf);
618}
619
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000620/* Loop until the read is completed with timeout called with phy_mutex held */
621static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)
622{
623 unsigned long start_time = jiffies;
624 u32 val;
625 int ret;
626
627 do {
628 ret = lan78xx_read_reg(dev, MII_ACC, &val);
629 if (unlikely(ret < 0))
630 return -EIO;
631
632 if (!(val & MII_ACC_MII_BUSY_))
633 return 0;
634 } while (!time_after(jiffies, start_time + HZ));
635
636 return -EIO;
637}
638
639static inline u32 mii_access(int id, int index, int read)
640{
641 u32 ret;
642
643 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_;
644 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_;
645 if (read)
646 ret |= MII_ACC_MII_READ_;
647 else
648 ret |= MII_ACC_MII_WRITE_;
649 ret |= MII_ACC_MII_BUSY_;
650
651 return ret;
652}
653
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000654static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
655{
656 unsigned long start_time = jiffies;
657 u32 val;
658 int ret;
659
660 do {
661 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
662 if (unlikely(ret < 0))
663 return -EIO;
664
665 if (!(val & E2P_CMD_EPC_BUSY_) ||
666 (val & E2P_CMD_EPC_TIMEOUT_))
667 break;
668 usleep_range(40, 100);
669 } while (!time_after(jiffies, start_time + HZ));
670
671 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
672 netdev_warn(dev->net, "EEPROM read operation timeout");
673 return -EIO;
674 }
675
676 return 0;
677}
678
679static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
680{
681 unsigned long start_time = jiffies;
682 u32 val;
683 int ret;
684
685 do {
686 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
687 if (unlikely(ret < 0))
688 return -EIO;
689
690 if (!(val & E2P_CMD_EPC_BUSY_))
691 return 0;
692
693 usleep_range(40, 100);
694 } while (!time_after(jiffies, start_time + HZ));
695
696 netdev_warn(dev->net, "EEPROM is busy");
697 return -EIO;
698}
699
700static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
701 u32 length, u8 *data)
702{
703 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000704 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000705 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000706 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000707
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000708 /* depends on chip, some EEPROM pins are muxed with LED function.
709 * disable & restore LED function to access EEPROM.
710 */
711 ret = lan78xx_read_reg(dev, HW_CFG, &val);
712 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000713 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000714 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
715 ret = lan78xx_write_reg(dev, HW_CFG, val);
716 }
717
718 retval = lan78xx_eeprom_confirm_not_busy(dev);
719 if (retval)
720 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000721
722 for (i = 0; i < length; i++) {
723 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
724 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
725 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000726 if (unlikely(ret < 0)) {
727 retval = -EIO;
728 goto exit;
729 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000730
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000731 retval = lan78xx_wait_eeprom(dev);
732 if (retval < 0)
733 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000734
735 ret = lan78xx_read_reg(dev, E2P_DATA, &val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000736 if (unlikely(ret < 0)) {
737 retval = -EIO;
738 goto exit;
739 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000740
741 data[i] = val & 0xFF;
742 offset++;
743 }
744
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000745 retval = 0;
746exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000747 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000748 ret = lan78xx_write_reg(dev, HW_CFG, saved);
749
750 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000751}
752
753static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
754 u32 length, u8 *data)
755{
756 u8 sig;
757 int ret;
758
759 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
760 if ((ret == 0) && (sig == EEPROM_INDICATOR))
761 ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
762 else
763 ret = -EINVAL;
764
765 return ret;
766}
767
768static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
769 u32 length, u8 *data)
770{
771 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000772 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000773 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000774 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000775
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000776 /* depends on chip, some EEPROM pins are muxed with LED function.
777 * disable & restore LED function to access EEPROM.
778 */
779 ret = lan78xx_read_reg(dev, HW_CFG, &val);
780 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000781 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000782 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
783 ret = lan78xx_write_reg(dev, HW_CFG, val);
784 }
785
786 retval = lan78xx_eeprom_confirm_not_busy(dev);
787 if (retval)
788 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000789
790 /* Issue write/erase enable command */
791 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
792 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000793 if (unlikely(ret < 0)) {
794 retval = -EIO;
795 goto exit;
796 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000797
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000798 retval = lan78xx_wait_eeprom(dev);
799 if (retval < 0)
800 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000801
802 for (i = 0; i < length; i++) {
803 /* Fill data register */
804 val = data[i];
805 ret = lan78xx_write_reg(dev, E2P_DATA, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000806 if (ret < 0) {
807 retval = -EIO;
808 goto exit;
809 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000810
811 /* Send "write" command */
812 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
813 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
814 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000815 if (ret < 0) {
816 retval = -EIO;
817 goto exit;
818 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000819
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000820 retval = lan78xx_wait_eeprom(dev);
821 if (retval < 0)
822 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000823
824 offset++;
825 }
826
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000827 retval = 0;
828exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000829 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000830 ret = lan78xx_write_reg(dev, HW_CFG, saved);
831
832 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000833}
834
835static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
836 u32 length, u8 *data)
837{
838 int i;
839 int ret;
840 u32 buf;
841 unsigned long timeout;
842
843 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
844
845 if (buf & OTP_PWR_DN_PWRDN_N_) {
846 /* clear it and wait to be cleared */
847 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
848
849 timeout = jiffies + HZ;
850 do {
851 usleep_range(1, 10);
852 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
853 if (time_after(jiffies, timeout)) {
854 netdev_warn(dev->net,
855 "timeout on OTP_PWR_DN");
856 return -EIO;
857 }
858 } while (buf & OTP_PWR_DN_PWRDN_N_);
859 }
860
861 for (i = 0; i < length; i++) {
862 ret = lan78xx_write_reg(dev, OTP_ADDR1,
863 ((offset + i) >> 8) & OTP_ADDR1_15_11);
864 ret = lan78xx_write_reg(dev, OTP_ADDR2,
865 ((offset + i) & OTP_ADDR2_10_3));
866
867 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
868 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
869
870 timeout = jiffies + HZ;
871 do {
872 udelay(1);
873 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
874 if (time_after(jiffies, timeout)) {
875 netdev_warn(dev->net,
876 "timeout on OTP_STATUS");
877 return -EIO;
878 }
879 } while (buf & OTP_STATUS_BUSY_);
880
881 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
882
883 data[i] = (u8)(buf & 0xFF);
884 }
885
886 return 0;
887}
888
Woojung.Huh@microchip.com9fb60662016-01-05 17:29:59 +0000889static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
890 u32 length, u8 *data)
891{
892 int i;
893 int ret;
894 u32 buf;
895 unsigned long timeout;
896
897 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
898
899 if (buf & OTP_PWR_DN_PWRDN_N_) {
900 /* clear it and wait to be cleared */
901 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
902
903 timeout = jiffies + HZ;
904 do {
905 udelay(1);
906 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
907 if (time_after(jiffies, timeout)) {
908 netdev_warn(dev->net,
909 "timeout on OTP_PWR_DN completion");
910 return -EIO;
911 }
912 } while (buf & OTP_PWR_DN_PWRDN_N_);
913 }
914
915 /* set to BYTE program mode */
916 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
917
918 for (i = 0; i < length; i++) {
919 ret = lan78xx_write_reg(dev, OTP_ADDR1,
920 ((offset + i) >> 8) & OTP_ADDR1_15_11);
921 ret = lan78xx_write_reg(dev, OTP_ADDR2,
922 ((offset + i) & OTP_ADDR2_10_3));
923 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
924 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
925 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
926
927 timeout = jiffies + HZ;
928 do {
929 udelay(1);
930 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
931 if (time_after(jiffies, timeout)) {
932 netdev_warn(dev->net,
933 "Timeout on OTP_STATUS completion");
934 return -EIO;
935 }
936 } while (buf & OTP_STATUS_BUSY_);
937 }
938
939 return 0;
940}
941
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000942static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset,
943 u32 length, u8 *data)
944{
945 u8 sig;
946 int ret;
947
948 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig);
949
950 if (ret == 0) {
951 if (sig == OTP_INDICATOR_1)
952 offset = offset;
953 else if (sig == OTP_INDICATOR_2)
954 offset += 0x100;
955 else
956 ret = -EINVAL;
Phil Elwell4bfc3382018-04-11 10:59:17 +0100957 if (!ret)
958 ret = lan78xx_read_raw_otp(dev, offset, length, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000959 }
960
961 return ret;
962}
963
964static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)
965{
966 int i, ret;
967
968 for (i = 0; i < 100; i++) {
969 u32 dp_sel;
970
971 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
972 if (unlikely(ret < 0))
973 return -EIO;
974
975 if (dp_sel & DP_SEL_DPRDY_)
976 return 0;
977
978 usleep_range(40, 100);
979 }
980
981 netdev_warn(dev->net, "lan78xx_dataport_wait_not_busy timed out");
982
983 return -EIO;
984}
985
986static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,
987 u32 addr, u32 length, u32 *buf)
988{
989 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
990 u32 dp_sel;
991 int i, ret;
992
993 if (usb_autopm_get_interface(dev->intf) < 0)
994 return 0;
995
996 mutex_lock(&pdata->dataport_mutex);
997
998 ret = lan78xx_dataport_wait_not_busy(dev);
999 if (ret < 0)
1000 goto done;
1001
1002 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
1003
1004 dp_sel &= ~DP_SEL_RSEL_MASK_;
1005 dp_sel |= ram_select;
1006 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);
1007
1008 for (i = 0; i < length; i++) {
1009 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);
1010
1011 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);
1012
1013 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);
1014
1015 ret = lan78xx_dataport_wait_not_busy(dev);
1016 if (ret < 0)
1017 goto done;
1018 }
1019
1020done:
1021 mutex_unlock(&pdata->dataport_mutex);
1022 usb_autopm_put_interface(dev->intf);
1023
1024 return ret;
1025}
1026
1027static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata,
1028 int index, u8 addr[ETH_ALEN])
1029{
1030 u32 temp;
1031
1032 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) {
1033 temp = addr[3];
1034 temp = addr[2] | (temp << 8);
1035 temp = addr[1] | (temp << 8);
1036 temp = addr[0] | (temp << 8);
1037 pdata->pfilter_table[index][1] = temp;
1038 temp = addr[5];
1039 temp = addr[4] | (temp << 8);
1040 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_;
1041 pdata->pfilter_table[index][0] = temp;
1042 }
1043}
1044
1045/* returns hash bit number for given MAC address */
1046static inline u32 lan78xx_hash(char addr[ETH_ALEN])
1047{
1048 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
1049}
1050
1051static void lan78xx_deferred_multicast_write(struct work_struct *param)
1052{
1053 struct lan78xx_priv *pdata =
1054 container_of(param, struct lan78xx_priv, set_multicast);
1055 struct lan78xx_net *dev = pdata->dev;
1056 int i;
1057 int ret;
1058
1059 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
1060 pdata->rfe_ctl);
1061
1062 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,
1063 DP_SEL_VHF_HASH_LEN, pdata->mchash_table);
1064
1065 for (i = 1; i < NUM_OF_MAF; i++) {
1066 ret = lan78xx_write_reg(dev, MAF_HI(i), 0);
1067 ret = lan78xx_write_reg(dev, MAF_LO(i),
1068 pdata->pfilter_table[i][1]);
1069 ret = lan78xx_write_reg(dev, MAF_HI(i),
1070 pdata->pfilter_table[i][0]);
1071 }
1072
1073 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1074}
1075
1076static void lan78xx_set_multicast(struct net_device *netdev)
1077{
1078 struct lan78xx_net *dev = netdev_priv(netdev);
1079 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1080 unsigned long flags;
1081 int i;
1082
1083 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
1084
1085 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ |
1086 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1087
1088 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
1089 pdata->mchash_table[i] = 0;
1090 /* pfilter_table[0] has own HW address */
1091 for (i = 1; i < NUM_OF_MAF; i++) {
1092 pdata->pfilter_table[i][0] =
1093 pdata->pfilter_table[i][1] = 0;
1094 }
1095
1096 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_;
1097
1098 if (dev->net->flags & IFF_PROMISC) {
1099 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
1100 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_;
1101 } else {
1102 if (dev->net->flags & IFF_ALLMULTI) {
1103 netif_dbg(dev, drv, dev->net,
1104 "receive all multicast enabled");
1105 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_;
1106 }
1107 }
1108
1109 if (netdev_mc_count(dev->net)) {
1110 struct netdev_hw_addr *ha;
1111 int i;
1112
1113 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
1114
1115 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_;
1116
1117 i = 1;
1118 netdev_for_each_mc_addr(ha, netdev) {
1119 /* set first 32 into Perfect Filter */
1120 if (i < 33) {
1121 lan78xx_set_addr_filter(pdata, i, ha->addr);
1122 } else {
1123 u32 bitnum = lan78xx_hash(ha->addr);
1124
1125 pdata->mchash_table[bitnum / 32] |=
1126 (1 << (bitnum % 32));
1127 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_;
1128 }
1129 i++;
1130 }
1131 }
1132
1133 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
1134
1135 /* defer register writes to a sleepable context */
1136 schedule_work(&pdata->set_multicast);
1137}
1138
1139static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,
1140 u16 lcladv, u16 rmtadv)
1141{
1142 u32 flow = 0, fct_flow = 0;
1143 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001144 u8 cap;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001145
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001146 if (dev->fc_autoneg)
1147 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1148 else
1149 cap = dev->fc_request_control;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001150
1151 if (cap & FLOW_CTRL_TX)
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001152 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001153
1154 if (cap & FLOW_CTRL_RX)
1155 flow |= FLOW_CR_RX_FCEN_;
1156
1157 if (dev->udev->speed == USB_SPEED_SUPER)
1158 fct_flow = 0x817;
1159 else if (dev->udev->speed == USB_SPEED_HIGH)
1160 fct_flow = 0x211;
1161
1162 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
1163 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1164 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1165
1166 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);
1167
1168 /* threshold value should be set before enabling flow */
1169 ret = lan78xx_write_reg(dev, FLOW, flow);
1170
1171 return 0;
1172}
1173
1174static int lan78xx_link_reset(struct lan78xx_net *dev)
1175{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001176 struct phy_device *phydev = dev->net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001177 struct ethtool_link_ksettings ecmd;
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001178 int ladv, radv, ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001179 u32 buf;
1180
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001181 /* clear LAN78xx interrupt status */
1182 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);
1183 if (unlikely(ret < 0))
1184 return -EIO;
1185
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001186 phy_read_status(phydev);
1187
1188 if (!phydev->link && dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001189 dev->link_on = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001190
1191 /* reset MAC */
1192 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1193 if (unlikely(ret < 0))
1194 return -EIO;
1195 buf |= MAC_CR_RST_;
1196 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1197 if (unlikely(ret < 0))
1198 return -EIO;
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00001199
Woojung Huh20ff5562016-03-16 22:10:40 +00001200 del_timer(&dev->stat_monitor);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001201 } else if (phydev->link && !dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001202 dev->link_on = true;
1203
Philippe Reynes6e765102016-10-09 12:07:04 +02001204 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001205
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001206 if (dev->udev->speed == USB_SPEED_SUPER) {
Philippe Reynes6e765102016-10-09 12:07:04 +02001207 if (ecmd.base.speed == 1000) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001208 /* disable U2 */
1209 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1210 buf &= ~USB_CFG1_DEV_U2_INIT_EN_;
1211 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1212 /* enable U1 */
1213 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1214 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1215 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1216 } else {
1217 /* enable U1 & U2 */
1218 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1219 buf |= USB_CFG1_DEV_U2_INIT_EN_;
1220 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1221 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1222 }
1223 }
1224
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001225 ladv = phy_read(phydev, MII_ADVERTISE);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001226 if (ladv < 0)
1227 return ladv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001228
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001229 radv = phy_read(phydev, MII_LPA);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001230 if (radv < 0)
1231 return radv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001232
1233 netif_dbg(dev, link, dev->net,
1234 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",
Philippe Reynes6e765102016-10-09 12:07:04 +02001235 ecmd.base.speed, ecmd.base.duplex, ladv, radv);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001236
Philippe Reynes6e765102016-10-09 12:07:04 +02001237 ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv,
1238 radv);
Woojung Huh20ff5562016-03-16 22:10:40 +00001239
1240 if (!timer_pending(&dev->stat_monitor)) {
1241 dev->delta = 1;
1242 mod_timer(&dev->stat_monitor,
1243 jiffies + STAT_UPDATE_TIMER);
1244 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001245 }
1246
1247 return ret;
1248}
1249
1250/* some work can't be done in tasklets, so we use keventd
1251 *
1252 * NOTE: annoying asymmetry: if it's active, schedule_work() fails,
1253 * but tasklet_schedule() doesn't. hope the failure is rare.
1254 */
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08001255static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001256{
1257 set_bit(work, &dev->flags);
1258 if (!schedule_delayed_work(&dev->wq, 0))
1259 netdev_err(dev->net, "kevent %d may have been dropped\n", work);
1260}
1261
1262static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)
1263{
1264 u32 intdata;
1265
1266 if (urb->actual_length != 4) {
1267 netdev_warn(dev->net,
1268 "unexpected urb length %d", urb->actual_length);
1269 return;
1270 }
1271
1272 memcpy(&intdata, urb->transfer_buffer, 4);
1273 le32_to_cpus(&intdata);
1274
1275 if (intdata & INT_ENP_PHY_INT) {
1276 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata);
Woojung Huhcc89c322016-11-01 20:02:00 +00001277 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
1278
1279 if (dev->domain_data.phyirq > 0)
1280 generic_handle_irq(dev->domain_data.phyirq);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001281 } else
1282 netdev_warn(dev->net,
1283 "unexpected interrupt: 0x%08x\n", intdata);
1284}
1285
1286static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev)
1287{
1288 return MAX_EEPROM_SIZE;
1289}
1290
1291static int lan78xx_ethtool_get_eeprom(struct net_device *netdev,
1292 struct ethtool_eeprom *ee, u8 *data)
1293{
1294 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301295 int ret;
1296
1297 ret = usb_autopm_get_interface(dev->intf);
1298 if (ret)
1299 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001300
1301 ee->magic = LAN78XX_EEPROM_MAGIC;
1302
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301303 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data);
1304
1305 usb_autopm_put_interface(dev->intf);
1306
1307 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001308}
1309
1310static int lan78xx_ethtool_set_eeprom(struct net_device *netdev,
1311 struct ethtool_eeprom *ee, u8 *data)
1312{
1313 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301314 int ret;
1315
1316 ret = usb_autopm_get_interface(dev->intf);
1317 if (ret)
1318 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001319
Nisar Sayedc0776822017-09-21 02:36:37 +05301320 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure
1321 * to load data from EEPROM
1322 */
1323 if (ee->magic == LAN78XX_EEPROM_MAGIC)
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301324 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001325 else if ((ee->magic == LAN78XX_OTP_MAGIC) &&
1326 (ee->offset == 0) &&
1327 (ee->len == 512) &&
1328 (data[0] == OTP_INDICATOR_1))
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301329 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001330
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301331 usb_autopm_put_interface(dev->intf);
1332
1333 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001334}
1335
1336static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,
1337 u8 *data)
1338{
1339 if (stringset == ETH_SS_STATS)
1340 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));
1341}
1342
1343static int lan78xx_get_sset_count(struct net_device *netdev, int sset)
1344{
1345 if (sset == ETH_SS_STATS)
1346 return ARRAY_SIZE(lan78xx_gstrings);
1347 else
1348 return -EOPNOTSUPP;
1349}
1350
1351static void lan78xx_get_stats(struct net_device *netdev,
1352 struct ethtool_stats *stats, u64 *data)
1353{
1354 struct lan78xx_net *dev = netdev_priv(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001355
Woojung Huh20ff5562016-03-16 22:10:40 +00001356 lan78xx_update_stats(dev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001357
Woojung Huh20ff5562016-03-16 22:10:40 +00001358 mutex_lock(&dev->stats.access_lock);
1359 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat));
1360 mutex_unlock(&dev->stats.access_lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001361}
1362
1363static void lan78xx_get_wol(struct net_device *netdev,
1364 struct ethtool_wolinfo *wol)
1365{
1366 struct lan78xx_net *dev = netdev_priv(netdev);
1367 int ret;
1368 u32 buf;
1369 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1370
1371 if (usb_autopm_get_interface(dev->intf) < 0)
1372 return;
1373
1374 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
1375 if (unlikely(ret < 0)) {
1376 wol->supported = 0;
1377 wol->wolopts = 0;
1378 } else {
1379 if (buf & USB_CFG_RMT_WKP_) {
1380 wol->supported = WAKE_ALL;
1381 wol->wolopts = pdata->wol;
1382 } else {
1383 wol->supported = 0;
1384 wol->wolopts = 0;
1385 }
1386 }
1387
1388 usb_autopm_put_interface(dev->intf);
1389}
1390
1391static int lan78xx_set_wol(struct net_device *netdev,
1392 struct ethtool_wolinfo *wol)
1393{
1394 struct lan78xx_net *dev = netdev_priv(netdev);
1395 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1396 int ret;
1397
1398 ret = usb_autopm_get_interface(dev->intf);
1399 if (ret < 0)
1400 return ret;
1401
1402 pdata->wol = 0;
1403 if (wol->wolopts & WAKE_UCAST)
1404 pdata->wol |= WAKE_UCAST;
1405 if (wol->wolopts & WAKE_MCAST)
1406 pdata->wol |= WAKE_MCAST;
1407 if (wol->wolopts & WAKE_BCAST)
1408 pdata->wol |= WAKE_BCAST;
1409 if (wol->wolopts & WAKE_MAGIC)
1410 pdata->wol |= WAKE_MAGIC;
1411 if (wol->wolopts & WAKE_PHY)
1412 pdata->wol |= WAKE_PHY;
1413 if (wol->wolopts & WAKE_ARP)
1414 pdata->wol |= WAKE_ARP;
1415
1416 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts);
1417
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001418 phy_ethtool_set_wol(netdev->phydev, wol);
1419
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001420 usb_autopm_put_interface(dev->intf);
1421
1422 return ret;
1423}
1424
1425static int lan78xx_get_eee(struct net_device *net, struct ethtool_eee *edata)
1426{
1427 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001428 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001429 int ret;
1430 u32 buf;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001431
1432 ret = usb_autopm_get_interface(dev->intf);
1433 if (ret < 0)
1434 return ret;
1435
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001436 ret = phy_ethtool_get_eee(phydev, edata);
1437 if (ret < 0)
1438 goto exit;
1439
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001440 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1441 if (buf & MAC_CR_EEE_EN_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001442 edata->eee_enabled = true;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001443 edata->eee_active = !!(edata->advertised &
1444 edata->lp_advertised);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001445 edata->tx_lpi_enabled = true;
1446 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
1447 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf);
1448 edata->tx_lpi_timer = buf;
1449 } else {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001450 edata->eee_enabled = false;
1451 edata->eee_active = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001452 edata->tx_lpi_enabled = false;
1453 edata->tx_lpi_timer = 0;
1454 }
1455
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001456 ret = 0;
1457exit:
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001458 usb_autopm_put_interface(dev->intf);
1459
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001460 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001461}
1462
1463static int lan78xx_set_eee(struct net_device *net, struct ethtool_eee *edata)
1464{
1465 struct lan78xx_net *dev = netdev_priv(net);
1466 int ret;
1467 u32 buf;
1468
1469 ret = usb_autopm_get_interface(dev->intf);
1470 if (ret < 0)
1471 return ret;
1472
1473 if (edata->eee_enabled) {
1474 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1475 buf |= MAC_CR_EEE_EN_;
1476 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1477
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001478 phy_ethtool_set_eee(net->phydev, edata);
1479
1480 buf = (u32)edata->tx_lpi_timer;
1481 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001482 } else {
1483 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1484 buf &= ~MAC_CR_EEE_EN_;
1485 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1486 }
1487
1488 usb_autopm_put_interface(dev->intf);
1489
1490 return 0;
1491}
1492
1493static u32 lan78xx_get_link(struct net_device *net)
1494{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001495 phy_read_status(net->phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001496
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001497 return net->phydev->link;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001498}
1499
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001500static void lan78xx_get_drvinfo(struct net_device *net,
1501 struct ethtool_drvinfo *info)
1502{
1503 struct lan78xx_net *dev = netdev_priv(net);
1504
1505 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001506 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info));
1507}
1508
1509static u32 lan78xx_get_msglevel(struct net_device *net)
1510{
1511 struct lan78xx_net *dev = netdev_priv(net);
1512
1513 return dev->msg_enable;
1514}
1515
1516static void lan78xx_set_msglevel(struct net_device *net, u32 level)
1517{
1518 struct lan78xx_net *dev = netdev_priv(net);
1519
1520 dev->msg_enable = level;
1521}
1522
Philippe Reynes6e765102016-10-09 12:07:04 +02001523static int lan78xx_get_link_ksettings(struct net_device *net,
1524 struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001525{
1526 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001527 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001528 int ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001529
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001530 ret = usb_autopm_get_interface(dev->intf);
1531 if (ret < 0)
1532 return ret;
1533
yuval.shaia@oracle.com55141742017-06-13 10:09:46 +03001534 phy_ethtool_ksettings_get(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001535
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001536 usb_autopm_put_interface(dev->intf);
1537
1538 return ret;
1539}
1540
Philippe Reynes6e765102016-10-09 12:07:04 +02001541static int lan78xx_set_link_ksettings(struct net_device *net,
1542 const struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001543{
1544 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001545 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001546 int ret = 0;
1547 int temp;
1548
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001549 ret = usb_autopm_get_interface(dev->intf);
1550 if (ret < 0)
1551 return ret;
1552
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001553 /* change speed & duplex */
Philippe Reynes6e765102016-10-09 12:07:04 +02001554 ret = phy_ethtool_ksettings_set(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001555
Philippe Reynes6e765102016-10-09 12:07:04 +02001556 if (!cmd->base.autoneg) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001557 /* force link down */
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001558 temp = phy_read(phydev, MII_BMCR);
1559 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001560 mdelay(1);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001561 phy_write(phydev, MII_BMCR, temp);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001562 }
1563
1564 usb_autopm_put_interface(dev->intf);
1565
1566 return ret;
1567}
1568
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001569static void lan78xx_get_pause(struct net_device *net,
1570 struct ethtool_pauseparam *pause)
1571{
1572 struct lan78xx_net *dev = netdev_priv(net);
1573 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001574 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001575
Philippe Reynes6e765102016-10-09 12:07:04 +02001576 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001577
1578 pause->autoneg = dev->fc_autoneg;
1579
1580 if (dev->fc_request_control & FLOW_CTRL_TX)
1581 pause->tx_pause = 1;
1582
1583 if (dev->fc_request_control & FLOW_CTRL_RX)
1584 pause->rx_pause = 1;
1585}
1586
1587static int lan78xx_set_pause(struct net_device *net,
1588 struct ethtool_pauseparam *pause)
1589{
1590 struct lan78xx_net *dev = netdev_priv(net);
1591 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001592 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001593 int ret;
1594
Philippe Reynes6e765102016-10-09 12:07:04 +02001595 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001596
Philippe Reynes6e765102016-10-09 12:07:04 +02001597 if (pause->autoneg && !ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001598 ret = -EINVAL;
1599 goto exit;
1600 }
1601
1602 dev->fc_request_control = 0;
1603 if (pause->rx_pause)
1604 dev->fc_request_control |= FLOW_CTRL_RX;
1605
1606 if (pause->tx_pause)
1607 dev->fc_request_control |= FLOW_CTRL_TX;
1608
Philippe Reynes6e765102016-10-09 12:07:04 +02001609 if (ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001610 u32 mii_adv;
Philippe Reynes6e765102016-10-09 12:07:04 +02001611 u32 advertising;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001612
Philippe Reynes6e765102016-10-09 12:07:04 +02001613 ethtool_convert_link_mode_to_legacy_u32(
1614 &advertising, ecmd.link_modes.advertising);
1615
1616 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001617 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
Philippe Reynes6e765102016-10-09 12:07:04 +02001618 advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
1619
1620 ethtool_convert_legacy_u32_to_link_mode(
1621 ecmd.link_modes.advertising, advertising);
1622
1623 phy_ethtool_ksettings_set(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001624 }
1625
1626 dev->fc_autoneg = pause->autoneg;
1627
1628 ret = 0;
1629exit:
1630 return ret;
1631}
1632
Raghuram Chary J49621862018-04-20 11:43:50 +05301633static int lan78xx_get_regs_len(struct net_device *netdev)
1634{
1635 if (!netdev->phydev)
1636 return (sizeof(lan78xx_regs));
1637 else
1638 return (sizeof(lan78xx_regs) + PHY_REG_SIZE);
1639}
1640
1641static void
1642lan78xx_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1643 void *buf)
1644{
1645 u32 *data = buf;
1646 int i, j;
1647 struct lan78xx_net *dev = netdev_priv(netdev);
1648
1649 /* Read Device/MAC registers */
1650 for (i = 0; i < (sizeof(lan78xx_regs) / sizeof(u32)); i++)
1651 lan78xx_read_reg(dev, lan78xx_regs[i], &data[i]);
1652
1653 if (!netdev->phydev)
1654 return;
1655
1656 /* Read PHY registers */
1657 for (j = 0; j < 32; i++, j++)
1658 data[i] = phy_read(netdev->phydev, j);
1659}
1660
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001661static const struct ethtool_ops lan78xx_ethtool_ops = {
1662 .get_link = lan78xx_get_link,
Florian Fainelli860ce4b2016-11-15 10:06:44 -08001663 .nway_reset = phy_ethtool_nway_reset,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001664 .get_drvinfo = lan78xx_get_drvinfo,
1665 .get_msglevel = lan78xx_get_msglevel,
1666 .set_msglevel = lan78xx_set_msglevel,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001667 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len,
1668 .get_eeprom = lan78xx_ethtool_get_eeprom,
1669 .set_eeprom = lan78xx_ethtool_set_eeprom,
1670 .get_ethtool_stats = lan78xx_get_stats,
1671 .get_sset_count = lan78xx_get_sset_count,
1672 .get_strings = lan78xx_get_strings,
1673 .get_wol = lan78xx_get_wol,
1674 .set_wol = lan78xx_set_wol,
1675 .get_eee = lan78xx_get_eee,
1676 .set_eee = lan78xx_set_eee,
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001677 .get_pauseparam = lan78xx_get_pause,
1678 .set_pauseparam = lan78xx_set_pause,
Philippe Reynes6e765102016-10-09 12:07:04 +02001679 .get_link_ksettings = lan78xx_get_link_ksettings,
1680 .set_link_ksettings = lan78xx_set_link_ksettings,
Raghuram Chary J49621862018-04-20 11:43:50 +05301681 .get_regs_len = lan78xx_get_regs_len,
1682 .get_regs = lan78xx_get_regs,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001683};
1684
1685static int lan78xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1686{
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001687 if (!netif_running(netdev))
1688 return -EINVAL;
1689
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001690 return phy_mii_ioctl(netdev->phydev, rq, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001691}
1692
1693static void lan78xx_init_mac_address(struct lan78xx_net *dev)
1694{
1695 u32 addr_lo, addr_hi;
1696 int ret;
1697 u8 addr[6];
1698
1699 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo);
1700 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi);
1701
1702 addr[0] = addr_lo & 0xFF;
1703 addr[1] = (addr_lo >> 8) & 0xFF;
1704 addr[2] = (addr_lo >> 16) & 0xFF;
1705 addr[3] = (addr_lo >> 24) & 0xFF;
1706 addr[4] = addr_hi & 0xFF;
1707 addr[5] = (addr_hi >> 8) & 0xFF;
1708
1709 if (!is_valid_ether_addr(addr)) {
Phil Elwell760db292018-04-19 17:59:38 +01001710 if (!eth_platform_get_mac_address(&dev->udev->dev, addr)) {
1711 /* valid address present in Device Tree */
1712 netif_dbg(dev, ifup, dev->net,
1713 "MAC address read from Device Tree");
1714 } else if (((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET,
1715 ETH_ALEN, addr) == 0) ||
1716 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET,
1717 ETH_ALEN, addr) == 0)) &&
1718 is_valid_ether_addr(addr)) {
1719 /* eeprom values are valid so use them */
1720 netif_dbg(dev, ifup, dev->net,
1721 "MAC address read from EEPROM");
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001722 } else {
1723 /* generate random MAC */
1724 random_ether_addr(addr);
1725 netif_dbg(dev, ifup, dev->net,
1726 "MAC address set to random addr");
1727 }
Phil Elwell760db292018-04-19 17:59:38 +01001728
1729 addr_lo = addr[0] | (addr[1] << 8) |
1730 (addr[2] << 16) | (addr[3] << 24);
1731 addr_hi = addr[4] | (addr[5] << 8);
1732
1733 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
1734 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001735 }
1736
1737 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
1738 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
1739
1740 ether_addr_copy(dev->net->dev_addr, addr);
1741}
1742
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001743/* MDIO read and write wrappers for phylib */
1744static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001745{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001746 struct lan78xx_net *dev = bus->priv;
1747 u32 val, addr;
1748 int ret;
1749
1750 ret = usb_autopm_get_interface(dev->intf);
1751 if (ret < 0)
1752 return ret;
1753
1754 mutex_lock(&dev->phy_mutex);
1755
1756 /* confirm MII not busy */
1757 ret = lan78xx_phy_wait_not_busy(dev);
1758 if (ret < 0)
1759 goto done;
1760
1761 /* set the address, index & direction (read from PHY) */
1762 addr = mii_access(phy_id, idx, MII_READ);
1763 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1764
1765 ret = lan78xx_phy_wait_not_busy(dev);
1766 if (ret < 0)
1767 goto done;
1768
1769 ret = lan78xx_read_reg(dev, MII_DATA, &val);
1770
1771 ret = (int)(val & 0xFFFF);
1772
1773done:
1774 mutex_unlock(&dev->phy_mutex);
1775 usb_autopm_put_interface(dev->intf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001776
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001777 return ret;
1778}
1779
1780static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
1781 u16 regval)
1782{
1783 struct lan78xx_net *dev = bus->priv;
1784 u32 val, addr;
1785 int ret;
1786
1787 ret = usb_autopm_get_interface(dev->intf);
1788 if (ret < 0)
1789 return ret;
1790
1791 mutex_lock(&dev->phy_mutex);
1792
1793 /* confirm MII not busy */
1794 ret = lan78xx_phy_wait_not_busy(dev);
1795 if (ret < 0)
1796 goto done;
1797
1798 val = (u32)regval;
1799 ret = lan78xx_write_reg(dev, MII_DATA, val);
1800
1801 /* set the address, index & direction (write to PHY) */
1802 addr = mii_access(phy_id, idx, MII_WRITE);
1803 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1804
1805 ret = lan78xx_phy_wait_not_busy(dev);
1806 if (ret < 0)
1807 goto done;
1808
1809done:
1810 mutex_unlock(&dev->phy_mutex);
1811 usb_autopm_put_interface(dev->intf);
1812 return 0;
1813}
1814
1815static int lan78xx_mdio_init(struct lan78xx_net *dev)
1816{
Phil Elwell1827b062018-04-19 17:59:39 +01001817 struct device_node *node;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001818 int ret;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001819
1820 dev->mdiobus = mdiobus_alloc();
1821 if (!dev->mdiobus) {
1822 netdev_err(dev->net, "can't allocate MDIO bus\n");
1823 return -ENOMEM;
1824 }
1825
1826 dev->mdiobus->priv = (void *)dev;
1827 dev->mdiobus->read = lan78xx_mdiobus_read;
1828 dev->mdiobus->write = lan78xx_mdiobus_write;
1829 dev->mdiobus->name = "lan78xx-mdiobus";
1830
1831 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
1832 dev->udev->bus->busnum, dev->udev->devnum);
1833
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00001834 switch (dev->chipid) {
1835 case ID_REV_CHIP_ID_7800_:
1836 case ID_REV_CHIP_ID_7850_:
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001837 /* set to internal PHY id */
1838 dev->mdiobus->phy_mask = ~(1 << 1);
1839 break;
Woojung Huh02dc1f32016-12-07 20:26:25 +00001840 case ID_REV_CHIP_ID_7801_:
1841 /* scan thru PHYAD[2..0] */
1842 dev->mdiobus->phy_mask = ~(0xFF);
1843 break;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001844 }
1845
Phil Elwell1827b062018-04-19 17:59:39 +01001846 node = of_get_child_by_name(dev->udev->dev.of_node, "mdio");
Florian Fainelli00e798c2018-05-15 16:56:19 -07001847 ret = of_mdiobus_register(dev->mdiobus, node);
1848 if (node)
Phil Elwell1827b062018-04-19 17:59:39 +01001849 of_node_put(node);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001850 if (ret) {
1851 netdev_err(dev->net, "can't register MDIO bus\n");
Andrew Lunne7f4dc32016-01-06 20:11:15 +01001852 goto exit1;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001853 }
1854
1855 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id);
1856 return 0;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001857exit1:
1858 mdiobus_free(dev->mdiobus);
1859 return ret;
1860}
1861
1862static void lan78xx_remove_mdio(struct lan78xx_net *dev)
1863{
1864 mdiobus_unregister(dev->mdiobus);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001865 mdiobus_free(dev->mdiobus);
1866}
1867
1868static void lan78xx_link_status_change(struct net_device *net)
1869{
Woojung Huh14437e32016-04-25 22:22:36 +00001870 struct phy_device *phydev = net->phydev;
1871 int ret, temp;
1872
1873 /* At forced 100 F/H mode, chip may fail to set mode correctly
1874 * when cable is switched between long(~50+m) and short one.
1875 * As workaround, set to 10 before setting to 100
1876 * at forced 100 F/H mode.
1877 */
1878 if (!phydev->autoneg && (phydev->speed == 100)) {
1879 /* disable phy interrupt */
1880 temp = phy_read(phydev, LAN88XX_INT_MASK);
1881 temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
1882 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1883
1884 temp = phy_read(phydev, MII_BMCR);
1885 temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
1886 phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
1887 temp |= BMCR_SPEED100;
1888 phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
1889
1890 /* clear pending interrupt generated while workaround */
1891 temp = phy_read(phydev, LAN88XX_INT_STS);
1892
1893 /* enable phy interrupt back */
1894 temp = phy_read(phydev, LAN88XX_INT_MASK);
1895 temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
1896 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1897 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001898}
1899
Woojung Huhcc89c322016-11-01 20:02:00 +00001900static int irq_map(struct irq_domain *d, unsigned int irq,
1901 irq_hw_number_t hwirq)
1902{
1903 struct irq_domain_data *data = d->host_data;
1904
1905 irq_set_chip_data(irq, data);
1906 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler);
1907 irq_set_noprobe(irq);
1908
1909 return 0;
1910}
1911
1912static void irq_unmap(struct irq_domain *d, unsigned int irq)
1913{
1914 irq_set_chip_and_handler(irq, NULL, NULL);
1915 irq_set_chip_data(irq, NULL);
1916}
1917
1918static const struct irq_domain_ops chip_domain_ops = {
1919 .map = irq_map,
1920 .unmap = irq_unmap,
1921};
1922
1923static void lan78xx_irq_mask(struct irq_data *irqd)
1924{
1925 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1926
1927 data->irqenable &= ~BIT(irqd_to_hwirq(irqd));
1928}
1929
1930static void lan78xx_irq_unmask(struct irq_data *irqd)
1931{
1932 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1933
1934 data->irqenable |= BIT(irqd_to_hwirq(irqd));
1935}
1936
1937static void lan78xx_irq_bus_lock(struct irq_data *irqd)
1938{
1939 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1940
1941 mutex_lock(&data->irq_lock);
1942}
1943
1944static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd)
1945{
1946 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1947 struct lan78xx_net *dev =
1948 container_of(data, struct lan78xx_net, domain_data);
1949 u32 buf;
1950 int ret;
1951
1952 /* call register access here because irq_bus_lock & irq_bus_sync_unlock
1953 * are only two callbacks executed in non-atomic contex.
1954 */
1955 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1956 if (buf != data->irqenable)
1957 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable);
1958
1959 mutex_unlock(&data->irq_lock);
1960}
1961
1962static struct irq_chip lan78xx_irqchip = {
1963 .name = "lan78xx-irqs",
1964 .irq_mask = lan78xx_irq_mask,
1965 .irq_unmask = lan78xx_irq_unmask,
1966 .irq_bus_lock = lan78xx_irq_bus_lock,
1967 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock,
1968};
1969
1970static int lan78xx_setup_irq_domain(struct lan78xx_net *dev)
1971{
1972 struct device_node *of_node;
1973 struct irq_domain *irqdomain;
1974 unsigned int irqmap = 0;
1975 u32 buf;
1976 int ret = 0;
1977
1978 of_node = dev->udev->dev.parent->of_node;
1979
1980 mutex_init(&dev->domain_data.irq_lock);
1981
1982 lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1983 dev->domain_data.irqenable = buf;
1984
1985 dev->domain_data.irqchip = &lan78xx_irqchip;
1986 dev->domain_data.irq_handler = handle_simple_irq;
1987
1988 irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0,
1989 &chip_domain_ops, &dev->domain_data);
1990 if (irqdomain) {
1991 /* create mapping for PHY interrupt */
1992 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY);
1993 if (!irqmap) {
1994 irq_domain_remove(irqdomain);
1995
1996 irqdomain = NULL;
1997 ret = -EINVAL;
1998 }
1999 } else {
2000 ret = -EINVAL;
2001 }
2002
2003 dev->domain_data.irqdomain = irqdomain;
2004 dev->domain_data.phyirq = irqmap;
2005
2006 return ret;
2007}
2008
2009static void lan78xx_remove_irq_domain(struct lan78xx_net *dev)
2010{
2011 if (dev->domain_data.phyirq > 0) {
2012 irq_dispose_mapping(dev->domain_data.phyirq);
2013
2014 if (dev->domain_data.irqdomain)
2015 irq_domain_remove(dev->domain_data.irqdomain);
2016 }
2017 dev->domain_data.phyirq = 0;
2018 dev->domain_data.irqdomain = NULL;
2019}
2020
Woojung Huh02dc1f32016-12-07 20:26:25 +00002021static int lan8835_fixup(struct phy_device *phydev)
2022{
2023 int buf;
2024 int ret;
2025 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
2026
2027 /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */
Russell King5f613672017-03-21 16:36:48 +00002028 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002029 buf &= ~0x1800;
2030 buf |= 0x0800;
Russell King5f613672017-03-21 16:36:48 +00002031 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002032
2033 /* RGMII MAC TXC Delay Enable */
2034 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
2035 MAC_RGMII_ID_TXC_DELAY_EN_);
2036
2037 /* RGMII TX DLL Tune Adjust */
2038 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
2039
2040 dev->interface = PHY_INTERFACE_MODE_RGMII_TXID;
2041
2042 return 1;
2043}
2044
2045static int ksz9031rnx_fixup(struct phy_device *phydev)
2046{
2047 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
2048
2049 /* Micrel9301RNX PHY configuration */
2050 /* RGMII Control Signal Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002051 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002052 /* RGMII RX Data Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002053 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002054 /* RGMII RX Clock Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002055 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002056
2057 dev->interface = PHY_INTERFACE_MODE_RGMII_RXID;
2058
2059 return 1;
2060}
2061
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302062static struct phy_device *lan7801_phy_init(struct lan78xx_net *dev)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002063{
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302064 u32 buf;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002065 int ret;
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302066 struct fixed_phy_status fphy_status = {
2067 .link = 1,
2068 .speed = SPEED_1000,
2069 .duplex = DUPLEX_FULL,
2070 };
Colin Ian King3b51cc72018-02-01 17:10:18 +00002071 struct phy_device *phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002072
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002073 phydev = phy_find_first(dev->mdiobus);
2074 if (!phydev) {
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302075 netdev_dbg(dev->net, "PHY Not Found!! Registering Fixed PHY\n");
2076 phydev = fixed_phy_register(PHY_POLL, &fphy_status, -1,
2077 NULL);
2078 if (IS_ERR(phydev)) {
2079 netdev_err(dev->net, "No PHY/fixed_PHY found\n");
2080 return NULL;
2081 }
2082 netdev_dbg(dev->net, "Registered FIXED PHY\n");
2083 dev->interface = PHY_INTERFACE_MODE_RGMII;
2084 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
2085 MAC_RGMII_ID_TXC_DELAY_EN_);
2086 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
2087 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2088 buf |= HW_CFG_CLK125_EN_;
2089 buf |= HW_CFG_REFCLK25_EN_;
2090 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2091 } else {
Woojung Huh02dc1f32016-12-07 20:26:25 +00002092 if (!phydev->drv) {
2093 netdev_err(dev->net, "no PHY driver found\n");
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302094 return NULL;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002095 }
Woojung Huh02dc1f32016-12-07 20:26:25 +00002096 dev->interface = PHY_INTERFACE_MODE_RGMII;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002097 /* external PHY fixup for KSZ9031RNX */
2098 ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0,
2099 ksz9031rnx_fixup);
2100 if (ret < 0) {
Raghuram Chary J7670ed72018-04-28 11:33:16 +05302101 netdev_err(dev->net, "Failed to register fixup for PHY_KSZ9031RNX\n");
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302102 return NULL;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002103 }
2104 /* external PHY fixup for LAN8835 */
2105 ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0,
2106 lan8835_fixup);
2107 if (ret < 0) {
Raghuram Chary J7670ed72018-04-28 11:33:16 +05302108 netdev_err(dev->net, "Failed to register fixup for PHY_LAN8835\n");
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302109 return NULL;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002110 }
2111 /* add more external PHY fixup here if needed */
2112
2113 phydev->is_internal = false;
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302114 }
2115 return phydev;
2116}
2117
2118static int lan78xx_phy_init(struct lan78xx_net *dev)
2119{
2120 int ret;
2121 u32 mii_adv;
2122 struct phy_device *phydev;
2123
2124 switch (dev->chipid) {
2125 case ID_REV_CHIP_ID_7801_:
2126 phydev = lan7801_phy_init(dev);
2127 if (!phydev) {
2128 netdev_err(dev->net, "lan7801: PHY Init Failed");
2129 return -EIO;
2130 }
2131 break;
2132
2133 case ID_REV_CHIP_ID_7800_:
2134 case ID_REV_CHIP_ID_7850_:
2135 phydev = phy_find_first(dev->mdiobus);
2136 if (!phydev) {
2137 netdev_err(dev->net, "no PHY found\n");
2138 return -EIO;
2139 }
2140 phydev->is_internal = true;
2141 dev->interface = PHY_INTERFACE_MODE_GMII;
2142 break;
2143
2144 default:
2145 netdev_err(dev->net, "Unknown CHIP ID found\n");
2146 return -EIO;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002147 }
2148
Woojung Huhcc89c322016-11-01 20:02:00 +00002149 /* if phyirq is not set, use polling mode in phylib */
2150 if (dev->domain_data.phyirq > 0)
2151 phydev->irq = dev->domain_data.phyirq;
2152 else
2153 phydev->irq = 0;
2154 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq);
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00002155
Woojung Huhf6e3ef32016-11-17 22:10:02 +00002156 /* set to AUTOMDIX */
2157 phydev->mdix = ETH_TP_MDI_AUTO;
2158
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002159 ret = phy_connect_direct(dev->net, phydev,
2160 lan78xx_link_status_change,
Woojung Huh02dc1f32016-12-07 20:26:25 +00002161 dev->interface);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002162 if (ret) {
2163 netdev_err(dev->net, "can't attach PHY to %s\n",
2164 dev->mdiobus->id);
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302165 if (dev->chipid == ID_REV_CHIP_ID_7801_) {
2166 if (phy_is_pseudo_fixed_link(phydev)) {
2167 fixed_phy_unregister(phydev);
2168 } else {
2169 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX,
2170 0xfffffff0);
2171 phy_unregister_fixup_for_uid(PHY_LAN8835,
2172 0xfffffff0);
2173 }
2174 }
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002175 return -EIO;
2176 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002177
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002178 /* MAC doesn't support 1000T Half */
2179 phydev->supported &= ~SUPPORTED_1000baseT_Half;
Woojung.Huh@microchip.come270b2d2016-02-25 23:33:09 +00002180
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002181 /* support both flow controls */
2182 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
2183 phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
2184 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
2185 phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
2186
Phil Elwell1827b062018-04-19 17:59:39 +01002187 if (phydev->mdio.dev.of_node) {
2188 u32 reg;
2189 int len;
2190
2191 len = of_property_count_elems_of_size(phydev->mdio.dev.of_node,
2192 "microchip,led-modes",
2193 sizeof(u32));
2194 if (len >= 0) {
2195 /* Ensure the appropriate LEDs are enabled */
2196 lan78xx_read_reg(dev, HW_CFG, &reg);
2197 reg &= ~(HW_CFG_LED0_EN_ |
2198 HW_CFG_LED1_EN_ |
2199 HW_CFG_LED2_EN_ |
2200 HW_CFG_LED3_EN_);
2201 reg |= (len > 0) * HW_CFG_LED0_EN_ |
2202 (len > 1) * HW_CFG_LED1_EN_ |
2203 (len > 2) * HW_CFG_LED2_EN_ |
2204 (len > 3) * HW_CFG_LED3_EN_;
2205 lan78xx_write_reg(dev, HW_CFG, reg);
2206 }
2207 }
2208
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002209 genphy_config_aneg(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002210
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002211 dev->fc_autoneg = phydev->autoneg;
2212
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002213 return 0;
2214}
2215
2216static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)
2217{
2218 int ret = 0;
2219 u32 buf;
2220 bool rxenabled;
2221
2222 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2223
2224 rxenabled = ((buf & MAC_RX_RXEN_) != 0);
2225
2226 if (rxenabled) {
2227 buf &= ~MAC_RX_RXEN_;
2228 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2229 }
2230
2231 /* add 4 to size for FCS */
2232 buf &= ~MAC_RX_MAX_SIZE_MASK_;
2233 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
2234
2235 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2236
2237 if (rxenabled) {
2238 buf |= MAC_RX_RXEN_;
2239 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2240 }
2241
2242 return 0;
2243}
2244
2245static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q)
2246{
2247 struct sk_buff *skb;
2248 unsigned long flags;
2249 int count = 0;
2250
2251 spin_lock_irqsave(&q->lock, flags);
2252 while (!skb_queue_empty(q)) {
2253 struct skb_data *entry;
2254 struct urb *urb;
2255 int ret;
2256
2257 skb_queue_walk(q, skb) {
2258 entry = (struct skb_data *)skb->cb;
2259 if (entry->state != unlink_start)
2260 goto found;
2261 }
2262 break;
2263found:
2264 entry->state = unlink_start;
2265 urb = entry->urb;
2266
2267 /* Get reference count of the URB to avoid it to be
2268 * freed during usb_unlink_urb, which may trigger
2269 * use-after-free problem inside usb_unlink_urb since
2270 * usb_unlink_urb is always racing with .complete
2271 * handler(include defer_bh).
2272 */
2273 usb_get_urb(urb);
2274 spin_unlock_irqrestore(&q->lock, flags);
2275 /* during some PM-driven resume scenarios,
2276 * these (async) unlinks complete immediately
2277 */
2278 ret = usb_unlink_urb(urb);
2279 if (ret != -EINPROGRESS && ret != 0)
2280 netdev_dbg(dev->net, "unlink urb err, %d\n", ret);
2281 else
2282 count++;
2283 usb_put_urb(urb);
2284 spin_lock_irqsave(&q->lock, flags);
2285 }
2286 spin_unlock_irqrestore(&q->lock, flags);
2287 return count;
2288}
2289
2290static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)
2291{
2292 struct lan78xx_net *dev = netdev_priv(netdev);
2293 int ll_mtu = new_mtu + netdev->hard_header_len;
2294 int old_hard_mtu = dev->hard_mtu;
2295 int old_rx_urb_size = dev->rx_urb_size;
2296 int ret;
2297
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002298 /* no second zero-length packet read wanted after mtu-sized packets */
2299 if ((ll_mtu % dev->maxpacket) == 0)
2300 return -EDOM;
2301
Dave Stevenson2259b7a2018-06-25 15:07:12 +01002302 ret = lan78xx_set_rx_max_frame_length(dev, new_mtu + VLAN_ETH_HLEN);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002303
2304 netdev->mtu = new_mtu;
2305
2306 dev->hard_mtu = netdev->mtu + netdev->hard_header_len;
2307 if (dev->rx_urb_size == old_hard_mtu) {
2308 dev->rx_urb_size = dev->hard_mtu;
2309 if (dev->rx_urb_size > old_rx_urb_size) {
2310 if (netif_running(dev->net)) {
2311 unlink_urbs(dev, &dev->rxq);
2312 tasklet_schedule(&dev->bh);
2313 }
2314 }
2315 }
2316
2317 return 0;
2318}
2319
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002320static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002321{
2322 struct lan78xx_net *dev = netdev_priv(netdev);
2323 struct sockaddr *addr = p;
2324 u32 addr_lo, addr_hi;
2325 int ret;
2326
2327 if (netif_running(netdev))
2328 return -EBUSY;
2329
2330 if (!is_valid_ether_addr(addr->sa_data))
2331 return -EADDRNOTAVAIL;
2332
2333 ether_addr_copy(netdev->dev_addr, addr->sa_data);
2334
2335 addr_lo = netdev->dev_addr[0] |
2336 netdev->dev_addr[1] << 8 |
2337 netdev->dev_addr[2] << 16 |
2338 netdev->dev_addr[3] << 24;
2339 addr_hi = netdev->dev_addr[4] |
2340 netdev->dev_addr[5] << 8;
2341
2342 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
2343 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
2344
2345 return 0;
2346}
2347
2348/* Enable or disable Rx checksum offload engine */
2349static int lan78xx_set_features(struct net_device *netdev,
2350 netdev_features_t features)
2351{
2352 struct lan78xx_net *dev = netdev_priv(netdev);
2353 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2354 unsigned long flags;
2355 int ret;
2356
2357 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
2358
2359 if (features & NETIF_F_RXCSUM) {
2360 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_;
2361 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_;
2362 } else {
2363 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_);
2364 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_);
2365 }
2366
Dave Stevensonec21ecf2018-06-25 15:07:14 +01002367 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2368 pdata->rfe_ctl |= RFE_CTL_VLAN_STRIP_;
2369 else
2370 pdata->rfe_ctl &= ~RFE_CTL_VLAN_STRIP_;
2371
Dave Stevenson4a273272018-06-25 15:07:13 +01002372 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002373 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_;
2374 else
2375 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_;
2376
2377 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
2378
2379 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2380
2381 return 0;
2382}
2383
2384static void lan78xx_deferred_vlan_write(struct work_struct *param)
2385{
2386 struct lan78xx_priv *pdata =
2387 container_of(param, struct lan78xx_priv, set_vlan);
2388 struct lan78xx_net *dev = pdata->dev;
2389
2390 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0,
2391 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table);
2392}
2393
2394static int lan78xx_vlan_rx_add_vid(struct net_device *netdev,
2395 __be16 proto, u16 vid)
2396{
2397 struct lan78xx_net *dev = netdev_priv(netdev);
2398 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2399 u16 vid_bit_index;
2400 u16 vid_dword_index;
2401
2402 vid_dword_index = (vid >> 5) & 0x7F;
2403 vid_bit_index = vid & 0x1F;
2404
2405 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index);
2406
2407 /* defer register writes to a sleepable context */
2408 schedule_work(&pdata->set_vlan);
2409
2410 return 0;
2411}
2412
2413static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,
2414 __be16 proto, u16 vid)
2415{
2416 struct lan78xx_net *dev = netdev_priv(netdev);
2417 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2418 u16 vid_bit_index;
2419 u16 vid_dword_index;
2420
2421 vid_dword_index = (vid >> 5) & 0x7F;
2422 vid_bit_index = vid & 0x1F;
2423
2424 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index);
2425
2426 /* defer register writes to a sleepable context */
2427 schedule_work(&pdata->set_vlan);
2428
2429 return 0;
2430}
2431
2432static void lan78xx_init_ltm(struct lan78xx_net *dev)
2433{
2434 int ret;
2435 u32 buf;
2436 u32 regs[6] = { 0 };
2437
2438 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
2439 if (buf & USB_CFG1_LTM_ENABLE_) {
2440 u8 temp[2];
2441 /* Get values from EEPROM first */
2442 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) {
2443 if (temp[0] == 24) {
2444 ret = lan78xx_read_raw_eeprom(dev,
2445 temp[1] * 2,
2446 24,
2447 (u8 *)regs);
2448 if (ret < 0)
2449 return;
2450 }
2451 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {
2452 if (temp[0] == 24) {
2453 ret = lan78xx_read_raw_otp(dev,
2454 temp[1] * 2,
2455 24,
2456 (u8 *)regs);
2457 if (ret < 0)
2458 return;
2459 }
2460 }
2461 }
2462
2463 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);
2464 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);
2465 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);
2466 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);
2467 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);
2468 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);
2469}
2470
2471static int lan78xx_reset(struct lan78xx_net *dev)
2472{
2473 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2474 u32 buf;
2475 int ret = 0;
2476 unsigned long timeout;
Raghuram Chary Je69647a2018-03-23 15:48:08 +05302477 u8 sig;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002478
2479 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2480 buf |= HW_CFG_LRST_;
2481 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2482
2483 timeout = jiffies + HZ;
2484 do {
2485 mdelay(1);
2486 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2487 if (time_after(jiffies, timeout)) {
2488 netdev_warn(dev->net,
2489 "timeout on completion of LiteReset");
2490 return -EIO;
2491 }
2492 } while (buf & HW_CFG_LRST_);
2493
2494 lan78xx_init_mac_address(dev);
2495
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002496 /* save DEVID for later usage */
2497 ret = lan78xx_read_reg(dev, ID_REV, &buf);
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00002498 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16;
2499 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002500
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002501 /* Respond to the IN token with a NAK */
2502 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2503 buf |= USB_CFG_BIR_;
2504 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2505
2506 /* Init LTM */
2507 lan78xx_init_ltm(dev);
2508
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002509 if (dev->udev->speed == USB_SPEED_SUPER) {
2510 buf = DEFAULT_BURST_CAP_SIZE / SS_USB_PKT_SIZE;
2511 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2512 dev->rx_qlen = 4;
2513 dev->tx_qlen = 4;
2514 } else if (dev->udev->speed == USB_SPEED_HIGH) {
2515 buf = DEFAULT_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
2516 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2517 dev->rx_qlen = RX_MAX_QUEUE_MEMORY / dev->rx_urb_size;
2518 dev->tx_qlen = RX_MAX_QUEUE_MEMORY / dev->hard_mtu;
2519 } else {
2520 buf = DEFAULT_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
2521 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2522 dev->rx_qlen = 4;
Yuiko Oshinoa5b13792018-01-15 13:24:28 -05002523 dev->tx_qlen = 4;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002524 }
2525
2526 ret = lan78xx_write_reg(dev, BURST_CAP, buf);
2527 ret = lan78xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
2528
2529 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2530 buf |= HW_CFG_MEF_;
2531 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2532
2533 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2534 buf |= USB_CFG_BCE_;
2535 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2536
2537 /* set FIFO sizes */
2538 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
2539 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf);
2540
2541 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
2542 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf);
2543
2544 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
2545 ret = lan78xx_write_reg(dev, FLOW, 0);
2546 ret = lan78xx_write_reg(dev, FCT_FLOW, 0);
2547
2548 /* Don't need rfe_ctl_lock during initialisation */
2549 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
2550 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_;
2551 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2552
2553 /* Enable or disable checksum offload engines */
2554 lan78xx_set_features(dev->net, dev->net->features);
2555
2556 lan78xx_set_multicast(dev->net);
2557
2558 /* reset PHY */
2559 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2560 buf |= PMT_CTL_PHY_RST_;
2561 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
2562
2563 timeout = jiffies + HZ;
2564 do {
2565 mdelay(1);
2566 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2567 if (time_after(jiffies, timeout)) {
2568 netdev_warn(dev->net, "timeout waiting for PHY Reset");
2569 return -EIO;
2570 }
Woojung.Huh@microchip.com6c595b02015-09-16 23:40:39 +00002571 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002572
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002573 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002574 /* LAN7801 only has RGMII mode */
2575 if (dev->chipid == ID_REV_CHIP_ID_7801_)
2576 buf &= ~MAC_CR_GMII_EN_;
Raghuram Chary Je69647a2018-03-23 15:48:08 +05302577
2578 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
2579 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
2580 if (!ret && sig != EEPROM_INDICATOR) {
2581 /* Implies there is no external eeprom. Set mac speed */
2582 netdev_info(dev->net, "No External EEPROM. Setting MAC Speed\n");
2583 buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
2584 }
2585 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002586 ret = lan78xx_write_reg(dev, MAC_CR, buf);
2587
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002588 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
2589 buf |= MAC_TX_TXEN_;
2590 ret = lan78xx_write_reg(dev, MAC_TX, buf);
2591
2592 ret = lan78xx_read_reg(dev, FCT_TX_CTL, &buf);
2593 buf |= FCT_TX_CTL_EN_;
2594 ret = lan78xx_write_reg(dev, FCT_TX_CTL, buf);
2595
Dave Stevenson2259b7a2018-06-25 15:07:12 +01002596 ret = lan78xx_set_rx_max_frame_length(dev,
2597 dev->net->mtu + VLAN_ETH_HLEN);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002598
2599 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2600 buf |= MAC_RX_RXEN_;
2601 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2602
2603 ret = lan78xx_read_reg(dev, FCT_RX_CTL, &buf);
2604 buf |= FCT_RX_CTL_EN_;
2605 ret = lan78xx_write_reg(dev, FCT_RX_CTL, buf);
2606
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002607 return 0;
2608}
2609
Woojung Huh20ff5562016-03-16 22:10:40 +00002610static void lan78xx_init_stats(struct lan78xx_net *dev)
2611{
2612 u32 *p;
2613 int i;
2614
2615 /* initialize for stats update
2616 * some counters are 20bits and some are 32bits
2617 */
2618 p = (u32 *)&dev->stats.rollover_max;
2619 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++)
2620 p[i] = 0xFFFFF;
2621
2622 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF;
2623 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF;
2624 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF;
2625 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF;
2626 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF;
2627 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF;
2628 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF;
2629 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF;
2630 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
2631 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
2632
Phil Elwellfed56072018-04-11 12:02:47 +01002633 set_bit(EVENT_STAT_UPDATE, &dev->flags);
Woojung Huh20ff5562016-03-16 22:10:40 +00002634}
2635
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002636static int lan78xx_open(struct net_device *net)
2637{
2638 struct lan78xx_net *dev = netdev_priv(net);
2639 int ret;
2640
2641 ret = usb_autopm_get_interface(dev->intf);
2642 if (ret < 0)
2643 goto out;
2644
Alexander Graf92571a12018-04-04 00:19:35 +02002645 phy_start(net->phydev);
2646
2647 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002648
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002649 /* for Link Check */
2650 if (dev->urb_intr) {
2651 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL);
2652 if (ret < 0) {
2653 netif_err(dev, ifup, dev->net,
2654 "intr submit %d\n", ret);
2655 goto done;
2656 }
2657 }
2658
Woojung Huh20ff5562016-03-16 22:10:40 +00002659 lan78xx_init_stats(dev);
2660
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002661 set_bit(EVENT_DEV_OPEN, &dev->flags);
2662
2663 netif_start_queue(net);
2664
2665 dev->link_on = false;
2666
2667 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
2668done:
2669 usb_autopm_put_interface(dev->intf);
2670
2671out:
2672 return ret;
2673}
2674
2675static void lan78xx_terminate_urbs(struct lan78xx_net *dev)
2676{
2677 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup);
2678 DECLARE_WAITQUEUE(wait, current);
2679 int temp;
2680
2681 /* ensure there are no more active urbs */
2682 add_wait_queue(&unlink_wakeup, &wait);
2683 set_current_state(TASK_UNINTERRUPTIBLE);
2684 dev->wait = &unlink_wakeup;
2685 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq);
2686
2687 /* maybe wait for deletions to finish. */
2688 while (!skb_queue_empty(&dev->rxq) &&
2689 !skb_queue_empty(&dev->txq) &&
2690 !skb_queue_empty(&dev->done)) {
2691 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS));
2692 set_current_state(TASK_UNINTERRUPTIBLE);
2693 netif_dbg(dev, ifdown, dev->net,
2694 "waited for %d urb completions\n", temp);
2695 }
2696 set_current_state(TASK_RUNNING);
2697 dev->wait = NULL;
2698 remove_wait_queue(&unlink_wakeup, &wait);
2699}
2700
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002701static int lan78xx_stop(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002702{
2703 struct lan78xx_net *dev = netdev_priv(net);
2704
Woojung Huh20ff5562016-03-16 22:10:40 +00002705 if (timer_pending(&dev->stat_monitor))
2706 del_timer_sync(&dev->stat_monitor);
2707
Alexander Graf92571a12018-04-04 00:19:35 +02002708 if (net->phydev)
2709 phy_stop(net->phydev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002710
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002711 clear_bit(EVENT_DEV_OPEN, &dev->flags);
2712 netif_stop_queue(net);
2713
2714 netif_info(dev, ifdown, dev->net,
2715 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",
2716 net->stats.rx_packets, net->stats.tx_packets,
2717 net->stats.rx_errors, net->stats.tx_errors);
2718
2719 lan78xx_terminate_urbs(dev);
2720
2721 usb_kill_urb(dev->urb_intr);
2722
2723 skb_queue_purge(&dev->rxq_pause);
2724
2725 /* deferred work (task, timer, softirq) must also stop.
2726 * can't flush_scheduled_work() until we drop rtnl (later),
2727 * else workers could deadlock; so make workers a NOP.
2728 */
2729 dev->flags = 0;
2730 cancel_delayed_work_sync(&dev->wq);
2731 tasklet_kill(&dev->bh);
2732
2733 usb_autopm_put_interface(dev->intf);
2734
2735 return 0;
2736}
2737
2738static int lan78xx_linearize(struct sk_buff *skb)
2739{
2740 return skb_linearize(skb);
2741}
2742
2743static struct sk_buff *lan78xx_tx_prep(struct lan78xx_net *dev,
2744 struct sk_buff *skb, gfp_t flags)
2745{
2746 u32 tx_cmd_a, tx_cmd_b;
2747
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002748 if (skb_cow_head(skb, TX_OVERHEAD)) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002749 dev_kfree_skb_any(skb);
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002750 return NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002751 }
2752
2753 if (lan78xx_linearize(skb) < 0)
2754 return NULL;
2755
2756 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_;
2757
2758 if (skb->ip_summed == CHECKSUM_PARTIAL)
2759 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_;
2760
2761 tx_cmd_b = 0;
2762 if (skb_is_gso(skb)) {
2763 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_);
2764
2765 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_;
2766
2767 tx_cmd_a |= TX_CMD_A_LSO_;
2768 }
2769
2770 if (skb_vlan_tag_present(skb)) {
2771 tx_cmd_a |= TX_CMD_A_IVTG_;
2772 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_;
2773 }
2774
2775 skb_push(skb, 4);
2776 cpu_to_le32s(&tx_cmd_b);
2777 memcpy(skb->data, &tx_cmd_b, 4);
2778
2779 skb_push(skb, 4);
2780 cpu_to_le32s(&tx_cmd_a);
2781 memcpy(skb->data, &tx_cmd_a, 4);
2782
2783 return skb;
2784}
2785
2786static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb,
2787 struct sk_buff_head *list, enum skb_state state)
2788{
2789 unsigned long flags;
2790 enum skb_state old_state;
2791 struct skb_data *entry = (struct skb_data *)skb->cb;
2792
2793 spin_lock_irqsave(&list->lock, flags);
2794 old_state = entry->state;
2795 entry->state = state;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002796
2797 __skb_unlink(skb, list);
2798 spin_unlock(&list->lock);
2799 spin_lock(&dev->done.lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002800
2801 __skb_queue_tail(&dev->done, skb);
2802 if (skb_queue_len(&dev->done) == 1)
2803 tasklet_schedule(&dev->bh);
2804 spin_unlock_irqrestore(&dev->done.lock, flags);
2805
2806 return old_state;
2807}
2808
2809static void tx_complete(struct urb *urb)
2810{
2811 struct sk_buff *skb = (struct sk_buff *)urb->context;
2812 struct skb_data *entry = (struct skb_data *)skb->cb;
2813 struct lan78xx_net *dev = entry->dev;
2814
2815 if (urb->status == 0) {
Woojung Huh74d79a22016-04-25 22:22:32 +00002816 dev->net->stats.tx_packets += entry->num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002817 dev->net->stats.tx_bytes += entry->length;
2818 } else {
2819 dev->net->stats.tx_errors++;
2820
2821 switch (urb->status) {
2822 case -EPIPE:
2823 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
2824 break;
2825
2826 /* software-driven interface shutdown */
2827 case -ECONNRESET:
2828 case -ESHUTDOWN:
2829 break;
2830
2831 case -EPROTO:
2832 case -ETIME:
2833 case -EILSEQ:
2834 netif_stop_queue(dev->net);
2835 break;
2836 default:
2837 netif_dbg(dev, tx_err, dev->net,
2838 "tx err %d\n", entry->urb->status);
2839 break;
2840 }
2841 }
2842
2843 usb_autopm_put_interface_async(dev->intf);
2844
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002845 defer_bh(dev, skb, &dev->txq, tx_done);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002846}
2847
2848static void lan78xx_queue_skb(struct sk_buff_head *list,
2849 struct sk_buff *newsk, enum skb_state state)
2850{
2851 struct skb_data *entry = (struct skb_data *)newsk->cb;
2852
2853 __skb_queue_tail(list, newsk);
2854 entry->state = state;
2855}
2856
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002857static netdev_tx_t
2858lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002859{
2860 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002861 struct sk_buff *skb2 = NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002862
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002863 if (skb) {
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002864 skb_tx_timestamp(skb);
2865 skb2 = lan78xx_tx_prep(dev, skb, GFP_ATOMIC);
2866 }
2867
2868 if (skb2) {
2869 skb_queue_tail(&dev->txq_pend, skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002870
Woojung.Huh@microchip.com4b2a4a92016-01-27 22:57:54 +00002871 /* throttle TX patch at slower than SUPER SPEED USB */
2872 if ((dev->udev->speed < USB_SPEED_SUPER) &&
2873 (skb_queue_len(&dev->txq_pend) > 10))
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002874 netif_stop_queue(net);
2875 } else {
2876 netif_dbg(dev, tx_err, dev->net,
2877 "lan78xx_tx_prep return NULL\n");
2878 dev->net->stats.tx_errors++;
2879 dev->net->stats.tx_dropped++;
2880 }
2881
2882 tasklet_schedule(&dev->bh);
2883
2884 return NETDEV_TX_OK;
2885}
2886
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002887static int
2888lan78xx_get_endpoints(struct lan78xx_net *dev, struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002889{
2890 int tmp;
2891 struct usb_host_interface *alt = NULL;
2892 struct usb_host_endpoint *in = NULL, *out = NULL;
2893 struct usb_host_endpoint *status = NULL;
2894
2895 for (tmp = 0; tmp < intf->num_altsetting; tmp++) {
2896 unsigned ep;
2897
2898 in = NULL;
2899 out = NULL;
2900 status = NULL;
2901 alt = intf->altsetting + tmp;
2902
2903 for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) {
2904 struct usb_host_endpoint *e;
2905 int intr = 0;
2906
2907 e = alt->endpoint + ep;
2908 switch (e->desc.bmAttributes) {
2909 case USB_ENDPOINT_XFER_INT:
2910 if (!usb_endpoint_dir_in(&e->desc))
2911 continue;
2912 intr = 1;
2913 /* FALLTHROUGH */
2914 case USB_ENDPOINT_XFER_BULK:
2915 break;
2916 default:
2917 continue;
2918 }
2919 if (usb_endpoint_dir_in(&e->desc)) {
2920 if (!intr && !in)
2921 in = e;
2922 else if (intr && !status)
2923 status = e;
2924 } else {
2925 if (!out)
2926 out = e;
2927 }
2928 }
2929 if (in && out)
2930 break;
2931 }
2932 if (!alt || !in || !out)
2933 return -EINVAL;
2934
2935 dev->pipe_in = usb_rcvbulkpipe(dev->udev,
2936 in->desc.bEndpointAddress &
2937 USB_ENDPOINT_NUMBER_MASK);
2938 dev->pipe_out = usb_sndbulkpipe(dev->udev,
2939 out->desc.bEndpointAddress &
2940 USB_ENDPOINT_NUMBER_MASK);
2941 dev->ep_intr = status;
2942
2943 return 0;
2944}
2945
2946static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2947{
2948 struct lan78xx_priv *pdata = NULL;
2949 int ret;
2950 int i;
2951
2952 ret = lan78xx_get_endpoints(dev, intf);
2953
2954 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2955
2956 pdata = (struct lan78xx_priv *)(dev->data[0]);
2957 if (!pdata) {
2958 netdev_warn(dev->net, "Unable to allocate lan78xx_priv");
2959 return -ENOMEM;
2960 }
2961
2962 pdata->dev = dev;
2963
2964 spin_lock_init(&pdata->rfe_ctl_lock);
2965 mutex_init(&pdata->dataport_mutex);
2966
2967 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write);
2968
2969 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++)
2970 pdata->vlan_table[i] = 0;
2971
2972 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write);
2973
2974 dev->net->features = 0;
2975
2976 if (DEFAULT_TX_CSUM_ENABLE)
2977 dev->net->features |= NETIF_F_HW_CSUM;
2978
2979 if (DEFAULT_RX_CSUM_ENABLE)
2980 dev->net->features |= NETIF_F_RXCSUM;
2981
2982 if (DEFAULT_TSO_CSUM_ENABLE)
2983 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG;
2984
Dave Stevensonec21ecf2018-06-25 15:07:14 +01002985 if (DEFAULT_VLAN_RX_OFFLOAD)
2986 dev->net->features |= NETIF_F_HW_VLAN_CTAG_RX;
2987
Dave Stevenson4a273272018-06-25 15:07:13 +01002988 if (DEFAULT_VLAN_FILTER_ENABLE)
2989 dev->net->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2990
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002991 dev->net->hw_features = dev->net->features;
2992
Woojung Huhcc89c322016-11-01 20:02:00 +00002993 ret = lan78xx_setup_irq_domain(dev);
2994 if (ret < 0) {
2995 netdev_warn(dev->net,
2996 "lan78xx_setup_irq_domain() failed : %d", ret);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302997 goto out1;
Woojung Huhcc89c322016-11-01 20:02:00 +00002998 }
2999
Nisar Sayed0573f942017-08-01 10:24:33 +00003000 dev->net->hard_header_len += TX_OVERHEAD;
3001 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
3002
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003003 /* Init all registers */
3004 ret = lan78xx_reset(dev);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05303005 if (ret) {
3006 netdev_warn(dev->net, "Registers INIT FAILED....");
3007 goto out2;
3008 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003009
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003010 ret = lan78xx_mdio_init(dev);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05303011 if (ret) {
3012 netdev_warn(dev->net, "MDIO INIT FAILED.....");
3013 goto out2;
3014 }
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00003015
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003016 dev->net->flags |= IFF_MULTICAST;
3017
3018 pdata->wol = WAKE_MAGIC;
3019
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003020 return ret;
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05303021
3022out2:
3023 lan78xx_remove_irq_domain(dev);
3024
3025out1:
3026 netdev_warn(dev->net, "Bind routine FAILED");
3027 cancel_work_sync(&pdata->set_multicast);
3028 cancel_work_sync(&pdata->set_vlan);
3029 kfree(pdata);
3030 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003031}
3032
3033static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf)
3034{
3035 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3036
Woojung Huhcc89c322016-11-01 20:02:00 +00003037 lan78xx_remove_irq_domain(dev);
3038
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00003039 lan78xx_remove_mdio(dev);
3040
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003041 if (pdata) {
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05303042 cancel_work_sync(&pdata->set_multicast);
3043 cancel_work_sync(&pdata->set_vlan);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003044 netif_dbg(dev, ifdown, dev->net, "free pdata");
3045 kfree(pdata);
3046 pdata = NULL;
3047 dev->data[0] = 0;
3048 }
3049}
3050
3051static void lan78xx_rx_csum_offload(struct lan78xx_net *dev,
3052 struct sk_buff *skb,
3053 u32 rx_cmd_a, u32 rx_cmd_b)
3054{
3055 if (!(dev->net->features & NETIF_F_RXCSUM) ||
3056 unlikely(rx_cmd_a & RX_CMD_A_ICSM_)) {
3057 skb->ip_summed = CHECKSUM_NONE;
3058 } else {
3059 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_));
3060 skb->ip_summed = CHECKSUM_COMPLETE;
3061 }
3062}
3063
Dave Stevensonec21ecf2018-06-25 15:07:14 +01003064static void lan78xx_rx_vlan_offload(struct lan78xx_net *dev,
3065 struct sk_buff *skb,
3066 u32 rx_cmd_a, u32 rx_cmd_b)
3067{
3068 if ((dev->net->features & NETIF_F_HW_VLAN_CTAG_RX) &&
3069 (rx_cmd_a & RX_CMD_A_FVTG_))
3070 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
3071 (rx_cmd_b & 0xffff));
3072}
3073
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003074static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003075{
3076 int status;
3077
3078 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) {
3079 skb_queue_tail(&dev->rxq_pause, skb);
3080 return;
3081 }
3082
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003083 dev->net->stats.rx_packets++;
3084 dev->net->stats.rx_bytes += skb->len;
3085
Woojung Huh74d79a22016-04-25 22:22:32 +00003086 skb->protocol = eth_type_trans(skb, dev->net);
3087
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003088 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
3089 skb->len + sizeof(struct ethhdr), skb->protocol);
3090 memset(skb->cb, 0, sizeof(struct skb_data));
3091
3092 if (skb_defer_rx_timestamp(skb))
3093 return;
3094
3095 status = netif_rx(skb);
3096 if (status != NET_RX_SUCCESS)
3097 netif_dbg(dev, rx_err, dev->net,
3098 "netif_rx status %d\n", status);
3099}
3100
3101static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb)
3102{
3103 if (skb->len < dev->net->hard_header_len)
3104 return 0;
3105
3106 while (skb->len > 0) {
3107 u32 rx_cmd_a, rx_cmd_b, align_count, size;
3108 u16 rx_cmd_c;
3109 struct sk_buff *skb2;
3110 unsigned char *packet;
3111
3112 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
3113 le32_to_cpus(&rx_cmd_a);
3114 skb_pull(skb, sizeof(rx_cmd_a));
3115
3116 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
3117 le32_to_cpus(&rx_cmd_b);
3118 skb_pull(skb, sizeof(rx_cmd_b));
3119
3120 memcpy(&rx_cmd_c, skb->data, sizeof(rx_cmd_c));
3121 le16_to_cpus(&rx_cmd_c);
3122 skb_pull(skb, sizeof(rx_cmd_c));
3123
3124 packet = skb->data;
3125
3126 /* get the packet length */
3127 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
3128 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
3129
3130 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) {
3131 netif_dbg(dev, rx_err, dev->net,
3132 "Error rx_cmd_a=0x%08x", rx_cmd_a);
3133 } else {
3134 /* last frame in this batch */
3135 if (skb->len == size) {
3136 lan78xx_rx_csum_offload(dev, skb,
3137 rx_cmd_a, rx_cmd_b);
Dave Stevensonec21ecf2018-06-25 15:07:14 +01003138 lan78xx_rx_vlan_offload(dev, skb,
3139 rx_cmd_a, rx_cmd_b);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003140
3141 skb_trim(skb, skb->len - 4); /* remove fcs */
3142 skb->truesize = size + sizeof(struct sk_buff);
3143
3144 return 1;
3145 }
3146
3147 skb2 = skb_clone(skb, GFP_ATOMIC);
3148 if (unlikely(!skb2)) {
3149 netdev_warn(dev->net, "Error allocating skb");
3150 return 0;
3151 }
3152
3153 skb2->len = size;
3154 skb2->data = packet;
3155 skb_set_tail_pointer(skb2, size);
3156
3157 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
Dave Stevensonec21ecf2018-06-25 15:07:14 +01003158 lan78xx_rx_vlan_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003159
3160 skb_trim(skb2, skb2->len - 4); /* remove fcs */
3161 skb2->truesize = size + sizeof(struct sk_buff);
3162
3163 lan78xx_skb_return(dev, skb2);
3164 }
3165
3166 skb_pull(skb, size);
3167
3168 /* padding bytes before the next frame starts */
3169 if (skb->len)
3170 skb_pull(skb, align_count);
3171 }
3172
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003173 return 1;
3174}
3175
3176static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb)
3177{
3178 if (!lan78xx_rx(dev, skb)) {
3179 dev->net->stats.rx_errors++;
3180 goto done;
3181 }
3182
3183 if (skb->len) {
3184 lan78xx_skb_return(dev, skb);
3185 return;
3186 }
3187
3188 netif_dbg(dev, rx_err, dev->net, "drop\n");
3189 dev->net->stats.rx_errors++;
3190done:
3191 skb_queue_tail(&dev->done, skb);
3192}
3193
3194static void rx_complete(struct urb *urb);
3195
3196static int rx_submit(struct lan78xx_net *dev, struct urb *urb, gfp_t flags)
3197{
3198 struct sk_buff *skb;
3199 struct skb_data *entry;
3200 unsigned long lockflags;
3201 size_t size = dev->rx_urb_size;
3202 int ret = 0;
3203
3204 skb = netdev_alloc_skb_ip_align(dev->net, size);
3205 if (!skb) {
3206 usb_free_urb(urb);
3207 return -ENOMEM;
3208 }
3209
3210 entry = (struct skb_data *)skb->cb;
3211 entry->urb = urb;
3212 entry->dev = dev;
3213 entry->length = 0;
3214
3215 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in,
3216 skb->data, size, rx_complete, skb);
3217
3218 spin_lock_irqsave(&dev->rxq.lock, lockflags);
3219
3220 if (netif_device_present(dev->net) &&
3221 netif_running(dev->net) &&
3222 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3223 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3224 ret = usb_submit_urb(urb, GFP_ATOMIC);
3225 switch (ret) {
3226 case 0:
3227 lan78xx_queue_skb(&dev->rxq, skb, rx_start);
3228 break;
3229 case -EPIPE:
3230 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3231 break;
3232 case -ENODEV:
3233 netif_dbg(dev, ifdown, dev->net, "device gone\n");
3234 netif_device_detach(dev->net);
3235 break;
3236 case -EHOSTUNREACH:
3237 ret = -ENOLINK;
3238 break;
3239 default:
3240 netif_dbg(dev, rx_err, dev->net,
3241 "rx submit, %d\n", ret);
3242 tasklet_schedule(&dev->bh);
3243 }
3244 } else {
3245 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
3246 ret = -ENOLINK;
3247 }
3248 spin_unlock_irqrestore(&dev->rxq.lock, lockflags);
3249 if (ret) {
3250 dev_kfree_skb_any(skb);
3251 usb_free_urb(urb);
3252 }
3253 return ret;
3254}
3255
3256static void rx_complete(struct urb *urb)
3257{
3258 struct sk_buff *skb = (struct sk_buff *)urb->context;
3259 struct skb_data *entry = (struct skb_data *)skb->cb;
3260 struct lan78xx_net *dev = entry->dev;
3261 int urb_status = urb->status;
3262 enum skb_state state;
3263
3264 skb_put(skb, urb->actual_length);
3265 state = rx_done;
3266 entry->urb = NULL;
3267
3268 switch (urb_status) {
3269 case 0:
3270 if (skb->len < dev->net->hard_header_len) {
3271 state = rx_cleanup;
3272 dev->net->stats.rx_errors++;
3273 dev->net->stats.rx_length_errors++;
3274 netif_dbg(dev, rx_err, dev->net,
3275 "rx length %d\n", skb->len);
3276 }
3277 usb_mark_last_busy(dev->udev);
3278 break;
3279 case -EPIPE:
3280 dev->net->stats.rx_errors++;
3281 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3282 /* FALLTHROUGH */
3283 case -ECONNRESET: /* async unlink */
3284 case -ESHUTDOWN: /* hardware gone */
3285 netif_dbg(dev, ifdown, dev->net,
3286 "rx shutdown, code %d\n", urb_status);
3287 state = rx_cleanup;
3288 entry->urb = urb;
3289 urb = NULL;
3290 break;
3291 case -EPROTO:
3292 case -ETIME:
3293 case -EILSEQ:
3294 dev->net->stats.rx_errors++;
3295 state = rx_cleanup;
3296 entry->urb = urb;
3297 urb = NULL;
3298 break;
3299
3300 /* data overrun ... flush fifo? */
3301 case -EOVERFLOW:
3302 dev->net->stats.rx_over_errors++;
3303 /* FALLTHROUGH */
3304
3305 default:
3306 state = rx_cleanup;
3307 dev->net->stats.rx_errors++;
3308 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status);
3309 break;
3310 }
3311
3312 state = defer_bh(dev, skb, &dev->rxq, state);
3313
3314 if (urb) {
3315 if (netif_running(dev->net) &&
3316 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3317 state != unlink_start) {
3318 rx_submit(dev, urb, GFP_ATOMIC);
3319 return;
3320 }
3321 usb_free_urb(urb);
3322 }
3323 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
3324}
3325
3326static void lan78xx_tx_bh(struct lan78xx_net *dev)
3327{
3328 int length;
3329 struct urb *urb = NULL;
3330 struct skb_data *entry;
3331 unsigned long flags;
3332 struct sk_buff_head *tqp = &dev->txq_pend;
3333 struct sk_buff *skb, *skb2;
3334 int ret;
3335 int count, pos;
3336 int skb_totallen, pkt_cnt;
3337
3338 skb_totallen = 0;
3339 pkt_cnt = 0;
Woojung Huh74d79a22016-04-25 22:22:32 +00003340 count = 0;
3341 length = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003342 for (skb = tqp->next; pkt_cnt < tqp->qlen; skb = skb->next) {
3343 if (skb_is_gso(skb)) {
3344 if (pkt_cnt) {
3345 /* handle previous packets first */
3346 break;
3347 }
Woojung Huh74d79a22016-04-25 22:22:32 +00003348 count = 1;
3349 length = skb->len - TX_OVERHEAD;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003350 skb2 = skb_dequeue(tqp);
3351 goto gso_skb;
3352 }
3353
3354 if ((skb_totallen + skb->len) > MAX_SINGLE_PACKET_SIZE)
3355 break;
3356 skb_totallen = skb->len + roundup(skb_totallen, sizeof(u32));
3357 pkt_cnt++;
3358 }
3359
3360 /* copy to a single skb */
3361 skb = alloc_skb(skb_totallen, GFP_ATOMIC);
3362 if (!skb)
3363 goto drop;
3364
3365 skb_put(skb, skb_totallen);
3366
3367 for (count = pos = 0; count < pkt_cnt; count++) {
3368 skb2 = skb_dequeue(tqp);
3369 if (skb2) {
Woojung Huh74d79a22016-04-25 22:22:32 +00003370 length += (skb2->len - TX_OVERHEAD);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003371 memcpy(skb->data + pos, skb2->data, skb2->len);
3372 pos += roundup(skb2->len, sizeof(u32));
3373 dev_kfree_skb(skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003374 }
3375 }
3376
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003377gso_skb:
3378 urb = usb_alloc_urb(0, GFP_ATOMIC);
Wolfram Sangd7c4e842016-08-11 23:05:27 +02003379 if (!urb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003380 goto drop;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003381
3382 entry = (struct skb_data *)skb->cb;
3383 entry->urb = urb;
3384 entry->dev = dev;
3385 entry->length = length;
Woojung Huh74d79a22016-04-25 22:22:32 +00003386 entry->num_of_packet = count;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003387
3388 spin_lock_irqsave(&dev->txq.lock, flags);
3389 ret = usb_autopm_get_interface_async(dev->intf);
3390 if (ret < 0) {
3391 spin_unlock_irqrestore(&dev->txq.lock, flags);
3392 goto drop;
3393 }
3394
3395 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_out,
3396 skb->data, skb->len, tx_complete, skb);
3397
3398 if (length % dev->maxpacket == 0) {
3399 /* send USB_ZERO_PACKET */
3400 urb->transfer_flags |= URB_ZERO_PACKET;
3401 }
3402
3403#ifdef CONFIG_PM
3404 /* if this triggers the device is still a sleep */
3405 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3406 /* transmission will be done in resume */
3407 usb_anchor_urb(urb, &dev->deferred);
3408 /* no use to process more packets */
3409 netif_stop_queue(dev->net);
3410 usb_put_urb(urb);
3411 spin_unlock_irqrestore(&dev->txq.lock, flags);
3412 netdev_dbg(dev->net, "Delaying transmission for resumption\n");
3413 return;
3414 }
3415#endif
3416
3417 ret = usb_submit_urb(urb, GFP_ATOMIC);
3418 switch (ret) {
3419 case 0:
Florian Westphal860e9532016-05-03 16:33:13 +02003420 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003421 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3422 if (skb_queue_len(&dev->txq) >= dev->tx_qlen)
3423 netif_stop_queue(dev->net);
3424 break;
3425 case -EPIPE:
3426 netif_stop_queue(dev->net);
3427 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
3428 usb_autopm_put_interface_async(dev->intf);
3429 break;
3430 default:
3431 usb_autopm_put_interface_async(dev->intf);
3432 netif_dbg(dev, tx_err, dev->net,
3433 "tx: submit urb err %d\n", ret);
3434 break;
3435 }
3436
3437 spin_unlock_irqrestore(&dev->txq.lock, flags);
3438
3439 if (ret) {
3440 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", ret);
3441drop:
3442 dev->net->stats.tx_dropped++;
3443 if (skb)
3444 dev_kfree_skb_any(skb);
3445 usb_free_urb(urb);
3446 } else
3447 netif_dbg(dev, tx_queued, dev->net,
3448 "> tx, len %d, type 0x%x\n", length, skb->protocol);
3449}
3450
3451static void lan78xx_rx_bh(struct lan78xx_net *dev)
3452{
3453 struct urb *urb;
3454 int i;
3455
3456 if (skb_queue_len(&dev->rxq) < dev->rx_qlen) {
3457 for (i = 0; i < 10; i++) {
3458 if (skb_queue_len(&dev->rxq) >= dev->rx_qlen)
3459 break;
3460 urb = usb_alloc_urb(0, GFP_ATOMIC);
3461 if (urb)
3462 if (rx_submit(dev, urb, GFP_ATOMIC) == -ENOLINK)
3463 return;
3464 }
3465
3466 if (skb_queue_len(&dev->rxq) < dev->rx_qlen)
3467 tasklet_schedule(&dev->bh);
3468 }
3469 if (skb_queue_len(&dev->txq) < dev->tx_qlen)
3470 netif_wake_queue(dev->net);
3471}
3472
3473static void lan78xx_bh(unsigned long param)
3474{
3475 struct lan78xx_net *dev = (struct lan78xx_net *)param;
3476 struct sk_buff *skb;
3477 struct skb_data *entry;
3478
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003479 while ((skb = skb_dequeue(&dev->done))) {
3480 entry = (struct skb_data *)(skb->cb);
3481 switch (entry->state) {
3482 case rx_done:
3483 entry->state = rx_cleanup;
3484 rx_process(dev, skb);
3485 continue;
3486 case tx_done:
3487 usb_free_urb(entry->urb);
3488 dev_kfree_skb(skb);
3489 continue;
3490 case rx_cleanup:
3491 usb_free_urb(entry->urb);
3492 dev_kfree_skb(skb);
3493 continue;
3494 default:
3495 netdev_dbg(dev->net, "skb state %d\n", entry->state);
3496 return;
3497 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003498 }
3499
3500 if (netif_device_present(dev->net) && netif_running(dev->net)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003501 /* reset update timer delta */
3502 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) {
3503 dev->delta = 1;
3504 mod_timer(&dev->stat_monitor,
3505 jiffies + STAT_UPDATE_TIMER);
3506 }
3507
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003508 if (!skb_queue_empty(&dev->txq_pend))
3509 lan78xx_tx_bh(dev);
3510
3511 if (!timer_pending(&dev->delay) &&
3512 !test_bit(EVENT_RX_HALT, &dev->flags))
3513 lan78xx_rx_bh(dev);
3514 }
3515}
3516
3517static void lan78xx_delayedwork(struct work_struct *work)
3518{
3519 int status;
3520 struct lan78xx_net *dev;
3521
3522 dev = container_of(work, struct lan78xx_net, wq.work);
3523
3524 if (test_bit(EVENT_TX_HALT, &dev->flags)) {
3525 unlink_urbs(dev, &dev->txq);
3526 status = usb_autopm_get_interface(dev->intf);
3527 if (status < 0)
3528 goto fail_pipe;
3529 status = usb_clear_halt(dev->udev, dev->pipe_out);
3530 usb_autopm_put_interface(dev->intf);
3531 if (status < 0 &&
3532 status != -EPIPE &&
3533 status != -ESHUTDOWN) {
3534 if (netif_msg_tx_err(dev))
3535fail_pipe:
3536 netdev_err(dev->net,
3537 "can't clear tx halt, status %d\n",
3538 status);
3539 } else {
3540 clear_bit(EVENT_TX_HALT, &dev->flags);
3541 if (status != -ESHUTDOWN)
3542 netif_wake_queue(dev->net);
3543 }
3544 }
3545 if (test_bit(EVENT_RX_HALT, &dev->flags)) {
3546 unlink_urbs(dev, &dev->rxq);
3547 status = usb_autopm_get_interface(dev->intf);
3548 if (status < 0)
3549 goto fail_halt;
3550 status = usb_clear_halt(dev->udev, dev->pipe_in);
3551 usb_autopm_put_interface(dev->intf);
3552 if (status < 0 &&
3553 status != -EPIPE &&
3554 status != -ESHUTDOWN) {
3555 if (netif_msg_rx_err(dev))
3556fail_halt:
3557 netdev_err(dev->net,
3558 "can't clear rx halt, status %d\n",
3559 status);
3560 } else {
3561 clear_bit(EVENT_RX_HALT, &dev->flags);
3562 tasklet_schedule(&dev->bh);
3563 }
3564 }
3565
3566 if (test_bit(EVENT_LINK_RESET, &dev->flags)) {
3567 int ret = 0;
3568
3569 clear_bit(EVENT_LINK_RESET, &dev->flags);
3570 status = usb_autopm_get_interface(dev->intf);
3571 if (status < 0)
3572 goto skip_reset;
3573 if (lan78xx_link_reset(dev) < 0) {
3574 usb_autopm_put_interface(dev->intf);
3575skip_reset:
3576 netdev_info(dev->net, "link reset failed (%d)\n",
3577 ret);
3578 } else {
3579 usb_autopm_put_interface(dev->intf);
3580 }
3581 }
Woojung Huh20ff5562016-03-16 22:10:40 +00003582
3583 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) {
3584 lan78xx_update_stats(dev);
3585
3586 clear_bit(EVENT_STAT_UPDATE, &dev->flags);
3587
3588 mod_timer(&dev->stat_monitor,
3589 jiffies + (STAT_UPDATE_TIMER * dev->delta));
3590
3591 dev->delta = min((dev->delta * 2), 50);
3592 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003593}
3594
3595static void intr_complete(struct urb *urb)
3596{
3597 struct lan78xx_net *dev = urb->context;
3598 int status = urb->status;
3599
3600 switch (status) {
3601 /* success */
3602 case 0:
3603 lan78xx_status(dev, urb);
3604 break;
3605
3606 /* software-driven interface shutdown */
3607 case -ENOENT: /* urb killed */
3608 case -ESHUTDOWN: /* hardware gone */
3609 netif_dbg(dev, ifdown, dev->net,
3610 "intr shutdown, code %d\n", status);
3611 return;
3612
3613 /* NOTE: not throttling like RX/TX, since this endpoint
3614 * already polls infrequently
3615 */
3616 default:
3617 netdev_dbg(dev->net, "intr status %d\n", status);
3618 break;
3619 }
3620
3621 if (!netif_running(dev->net))
3622 return;
3623
3624 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length);
3625 status = usb_submit_urb(urb, GFP_ATOMIC);
3626 if (status != 0)
3627 netif_err(dev, timer, dev->net,
3628 "intr resubmit --> %d\n", status);
3629}
3630
3631static void lan78xx_disconnect(struct usb_interface *intf)
3632{
3633 struct lan78xx_net *dev;
3634 struct usb_device *udev;
3635 struct net_device *net;
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05303636 struct phy_device *phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003637
3638 dev = usb_get_intfdata(intf);
3639 usb_set_intfdata(intf, NULL);
3640 if (!dev)
3641 return;
3642
3643 udev = interface_to_usbdev(intf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003644 net = dev->net;
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05303645 phydev = net->phydev;
Alexander Graf92571a12018-04-04 00:19:35 +02003646
3647 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
3648 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
3649
3650 phy_disconnect(net->phydev);
3651
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05303652 if (phy_is_pseudo_fixed_link(phydev))
3653 fixed_phy_unregister(phydev);
3654
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003655 unregister_netdev(net);
3656
3657 cancel_delayed_work_sync(&dev->wq);
3658
3659 usb_scuttle_anchored_urbs(&dev->deferred);
3660
3661 lan78xx_unbind(dev, intf);
3662
3663 usb_kill_urb(dev->urb_intr);
3664 usb_free_urb(dev->urb_intr);
3665
3666 free_netdev(net);
3667 usb_put_dev(udev);
3668}
3669
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003670static void lan78xx_tx_timeout(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003671{
3672 struct lan78xx_net *dev = netdev_priv(net);
3673
3674 unlink_urbs(dev, &dev->txq);
3675 tasklet_schedule(&dev->bh);
3676}
3677
3678static const struct net_device_ops lan78xx_netdev_ops = {
3679 .ndo_open = lan78xx_open,
3680 .ndo_stop = lan78xx_stop,
3681 .ndo_start_xmit = lan78xx_start_xmit,
3682 .ndo_tx_timeout = lan78xx_tx_timeout,
3683 .ndo_change_mtu = lan78xx_change_mtu,
3684 .ndo_set_mac_address = lan78xx_set_mac_addr,
3685 .ndo_validate_addr = eth_validate_addr,
3686 .ndo_do_ioctl = lan78xx_ioctl,
3687 .ndo_set_rx_mode = lan78xx_set_multicast,
3688 .ndo_set_features = lan78xx_set_features,
3689 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid,
3690 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid,
3691};
3692
Kees Cookd28bb962017-10-16 17:29:32 -07003693static void lan78xx_stat_monitor(struct timer_list *t)
Woojung Huh20ff5562016-03-16 22:10:40 +00003694{
Kees Cookd28bb962017-10-16 17:29:32 -07003695 struct lan78xx_net *dev = from_timer(dev, t, stat_monitor);
Woojung Huh20ff5562016-03-16 22:10:40 +00003696
3697 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
3698}
3699
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003700static int lan78xx_probe(struct usb_interface *intf,
3701 const struct usb_device_id *id)
3702{
3703 struct lan78xx_net *dev;
3704 struct net_device *netdev;
3705 struct usb_device *udev;
3706 int ret;
3707 unsigned maxp;
3708 unsigned period;
3709 u8 *buf = NULL;
3710
3711 udev = interface_to_usbdev(intf);
3712 udev = usb_get_dev(udev);
3713
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003714 netdev = alloc_etherdev(sizeof(struct lan78xx_net));
3715 if (!netdev) {
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003716 dev_err(&intf->dev, "Error: OOM\n");
3717 ret = -ENOMEM;
3718 goto out1;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003719 }
3720
3721 /* netdev_printk() needs this */
3722 SET_NETDEV_DEV(netdev, &intf->dev);
3723
3724 dev = netdev_priv(netdev);
3725 dev->udev = udev;
3726 dev->intf = intf;
3727 dev->net = netdev;
3728 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV
3729 | NETIF_MSG_PROBE | NETIF_MSG_LINK);
3730
3731 skb_queue_head_init(&dev->rxq);
3732 skb_queue_head_init(&dev->txq);
3733 skb_queue_head_init(&dev->done);
3734 skb_queue_head_init(&dev->rxq_pause);
3735 skb_queue_head_init(&dev->txq_pend);
3736 mutex_init(&dev->phy_mutex);
3737
3738 tasklet_init(&dev->bh, lan78xx_bh, (unsigned long)dev);
3739 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork);
3740 init_usb_anchor(&dev->deferred);
3741
3742 netdev->netdev_ops = &lan78xx_netdev_ops;
3743 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES;
3744 netdev->ethtool_ops = &lan78xx_ethtool_ops;
3745
Woojung Huh20ff5562016-03-16 22:10:40 +00003746 dev->delta = 1;
Kees Cookd28bb962017-10-16 17:29:32 -07003747 timer_setup(&dev->stat_monitor, lan78xx_stat_monitor, 0);
Woojung Huh20ff5562016-03-16 22:10:40 +00003748
3749 mutex_init(&dev->stats.access_lock);
3750
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003751 ret = lan78xx_bind(dev, intf);
3752 if (ret < 0)
3753 goto out2;
3754 strcpy(netdev->name, "eth%d");
3755
3756 if (netdev->mtu > (dev->hard_mtu - netdev->hard_header_len))
3757 netdev->mtu = dev->hard_mtu - netdev->hard_header_len;
3758
Jarod Wilsonf77f0ae2016-10-20 13:55:17 -04003759 /* MTU range: 68 - 9000 */
3760 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;
3761
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003762 dev->ep_blkin = (intf->cur_altsetting)->endpoint + 0;
3763 dev->ep_blkout = (intf->cur_altsetting)->endpoint + 1;
3764 dev->ep_intr = (intf->cur_altsetting)->endpoint + 2;
3765
3766 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3767 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3768
3769 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3770 dev->ep_intr->desc.bEndpointAddress &
3771 USB_ENDPOINT_NUMBER_MASK);
3772 period = dev->ep_intr->desc.bInterval;
3773
3774 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3775 buf = kmalloc(maxp, GFP_KERNEL);
3776 if (buf) {
3777 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
3778 if (!dev->urb_intr) {
Pan Bian51920832016-12-03 19:24:48 +08003779 ret = -ENOMEM;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003780 kfree(buf);
3781 goto out3;
3782 } else {
3783 usb_fill_int_urb(dev->urb_intr, dev->udev,
3784 dev->pipe_intr, buf, maxp,
3785 intr_complete, dev, period);
3786 }
3787 }
3788
3789 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out, 1);
3790
3791 /* driver requires remote-wakeup capability during autosuspend. */
3792 intf->needs_remote_wakeup = 1;
3793
3794 ret = register_netdev(netdev);
3795 if (ret != 0) {
3796 netif_err(dev, probe, netdev, "couldn't register the device\n");
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003797 goto out3;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003798 }
3799
3800 usb_set_intfdata(intf, dev);
3801
3802 ret = device_set_wakeup_enable(&udev->dev, true);
3803
3804 /* Default delay of 2sec has more overhead than advantage.
3805 * Set to 10sec as default.
3806 */
3807 pm_runtime_set_autosuspend_delay(&udev->dev,
3808 DEFAULT_AUTOSUSPEND_DELAY);
3809
Alexander Graf92571a12018-04-04 00:19:35 +02003810 ret = lan78xx_phy_init(dev);
3811 if (ret < 0)
3812 goto out4;
3813
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003814 return 0;
3815
Alexander Graf92571a12018-04-04 00:19:35 +02003816out4:
3817 unregister_netdev(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003818out3:
3819 lan78xx_unbind(dev, intf);
3820out2:
3821 free_netdev(netdev);
3822out1:
3823 usb_put_dev(udev);
3824
3825 return ret;
3826}
3827
3828static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len)
3829{
3830 const u16 crc16poly = 0x8005;
3831 int i;
3832 u16 bit, crc, msb;
3833 u8 data;
3834
3835 crc = 0xFFFF;
3836 for (i = 0; i < len; i++) {
3837 data = *buf++;
3838 for (bit = 0; bit < 8; bit++) {
3839 msb = crc >> 15;
3840 crc <<= 1;
3841
3842 if (msb ^ (u16)(data & 1)) {
3843 crc ^= crc16poly;
3844 crc |= (u16)0x0001U;
3845 }
3846 data >>= 1;
3847 }
3848 }
3849
3850 return crc;
3851}
3852
3853static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol)
3854{
3855 u32 buf;
3856 int ret;
3857 int mask_index;
3858 u16 crc;
3859 u32 temp_wucsr;
3860 u32 temp_pmt_ctl;
3861 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3862 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3863 const u8 arp_type[2] = { 0x08, 0x06 };
3864
3865 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3866 buf &= ~MAC_TX_TXEN_;
3867 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3868 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3869 buf &= ~MAC_RX_RXEN_;
3870 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3871
3872 ret = lan78xx_write_reg(dev, WUCSR, 0);
3873 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3874 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3875
3876 temp_wucsr = 0;
3877
3878 temp_pmt_ctl = 0;
3879 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl);
3880 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_;
3881 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_;
3882
3883 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++)
3884 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0);
3885
3886 mask_index = 0;
3887 if (wol & WAKE_PHY) {
3888 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_;
3889
3890 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3891 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3892 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3893 }
3894 if (wol & WAKE_MAGIC) {
3895 temp_wucsr |= WUCSR_MPEN_;
3896
3897 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3898 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3899 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_;
3900 }
3901 if (wol & WAKE_BCAST) {
3902 temp_wucsr |= WUCSR_BCST_EN_;
3903
3904 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3905 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3906 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3907 }
3908 if (wol & WAKE_MCAST) {
3909 temp_wucsr |= WUCSR_WAKE_EN_;
3910
3911 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */
3912 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3);
3913 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3914 WUF_CFGX_EN_ |
3915 WUF_CFGX_TYPE_MCAST_ |
3916 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3917 (crc & WUF_CFGX_CRC16_MASK_));
3918
3919 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7);
3920 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3921 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3922 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3923 mask_index++;
3924
3925 /* for IPv6 Multicast */
3926 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2);
3927 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3928 WUF_CFGX_EN_ |
3929 WUF_CFGX_TYPE_MCAST_ |
3930 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3931 (crc & WUF_CFGX_CRC16_MASK_));
3932
3933 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3);
3934 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3935 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3936 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3937 mask_index++;
3938
3939 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3940 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3941 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3942 }
3943 if (wol & WAKE_UCAST) {
3944 temp_wucsr |= WUCSR_PFDA_EN_;
3945
3946 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3947 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3948 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3949 }
3950 if (wol & WAKE_ARP) {
3951 temp_wucsr |= WUCSR_WAKE_EN_;
3952
3953 /* set WUF_CFG & WUF_MASK
3954 * for packettype (offset 12,13) = ARP (0x0806)
3955 */
3956 crc = lan78xx_wakeframe_crc16(arp_type, 2);
3957 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3958 WUF_CFGX_EN_ |
3959 WUF_CFGX_TYPE_ALL_ |
3960 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3961 (crc & WUF_CFGX_CRC16_MASK_));
3962
3963 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000);
3964 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3965 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3966 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3967 mask_index++;
3968
3969 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3970 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3971 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3972 }
3973
3974 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
3975
3976 /* when multiple WOL bits are set */
3977 if (hweight_long((unsigned long)wol) > 1) {
3978 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3979 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3980 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3981 }
3982 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl);
3983
3984 /* clear WUPS */
3985 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3986 buf |= PMT_CTL_WUPS_MASK_;
3987 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3988
3989 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3990 buf |= MAC_RX_RXEN_;
3991 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3992
3993 return 0;
3994}
3995
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003996static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003997{
3998 struct lan78xx_net *dev = usb_get_intfdata(intf);
3999 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
4000 u32 buf;
4001 int ret;
4002 int event;
4003
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004004 event = message.event;
4005
4006 if (!dev->suspend_count++) {
4007 spin_lock_irq(&dev->txq.lock);
4008 /* don't autosuspend while transmitting */
4009 if ((skb_queue_len(&dev->txq) ||
4010 skb_queue_len(&dev->txq_pend)) &&
4011 PMSG_IS_AUTO(message)) {
4012 spin_unlock_irq(&dev->txq.lock);
4013 ret = -EBUSY;
4014 goto out;
4015 } else {
4016 set_bit(EVENT_DEV_ASLEEP, &dev->flags);
4017 spin_unlock_irq(&dev->txq.lock);
4018 }
4019
4020 /* stop TX & RX */
4021 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4022 buf &= ~MAC_TX_TXEN_;
4023 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4024 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4025 buf &= ~MAC_RX_RXEN_;
4026 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4027
4028 /* empty out the rx and queues */
4029 netif_device_detach(dev->net);
4030 lan78xx_terminate_urbs(dev);
4031 usb_kill_urb(dev->urb_intr);
4032
4033 /* reattach */
4034 netif_device_attach(dev->net);
4035 }
4036
4037 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00004038 del_timer(&dev->stat_monitor);
4039
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004040 if (PMSG_IS_AUTO(message)) {
4041 /* auto suspend (selective suspend) */
4042 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4043 buf &= ~MAC_TX_TXEN_;
4044 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4045 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4046 buf &= ~MAC_RX_RXEN_;
4047 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4048
4049 ret = lan78xx_write_reg(dev, WUCSR, 0);
4050 ret = lan78xx_write_reg(dev, WUCSR2, 0);
4051 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
4052
4053 /* set goodframe wakeup */
4054 ret = lan78xx_read_reg(dev, WUCSR, &buf);
4055
4056 buf |= WUCSR_RFE_WAKE_EN_;
4057 buf |= WUCSR_STORE_WAKE_;
4058
4059 ret = lan78xx_write_reg(dev, WUCSR, buf);
4060
4061 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
4062
4063 buf &= ~PMT_CTL_RES_CLR_WKP_EN_;
4064 buf |= PMT_CTL_RES_CLR_WKP_STS_;
4065
4066 buf |= PMT_CTL_PHY_WAKE_EN_;
4067 buf |= PMT_CTL_WOL_EN_;
4068 buf &= ~PMT_CTL_SUS_MODE_MASK_;
4069 buf |= PMT_CTL_SUS_MODE_3_;
4070
4071 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
4072
4073 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
4074
4075 buf |= PMT_CTL_WUPS_MASK_;
4076
4077 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
4078
4079 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4080 buf |= MAC_RX_RXEN_;
4081 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4082 } else {
4083 lan78xx_set_suspend(dev, pdata->wol);
4084 }
4085 }
4086
Woojung.Huh@microchip.com49d28b562015-09-25 21:13:48 +00004087 ret = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004088out:
4089 return ret;
4090}
4091
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08004092static int lan78xx_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004093{
4094 struct lan78xx_net *dev = usb_get_intfdata(intf);
4095 struct sk_buff *skb;
4096 struct urb *res;
4097 int ret;
4098 u32 buf;
4099
Woojung Huh20ff5562016-03-16 22:10:40 +00004100 if (!timer_pending(&dev->stat_monitor)) {
4101 dev->delta = 1;
4102 mod_timer(&dev->stat_monitor,
4103 jiffies + STAT_UPDATE_TIMER);
4104 }
4105
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004106 if (!--dev->suspend_count) {
4107 /* resume interrupt URBs */
4108 if (dev->urb_intr && test_bit(EVENT_DEV_OPEN, &dev->flags))
4109 usb_submit_urb(dev->urb_intr, GFP_NOIO);
4110
4111 spin_lock_irq(&dev->txq.lock);
4112 while ((res = usb_get_from_anchor(&dev->deferred))) {
4113 skb = (struct sk_buff *)res->context;
4114 ret = usb_submit_urb(res, GFP_ATOMIC);
4115 if (ret < 0) {
4116 dev_kfree_skb_any(skb);
4117 usb_free_urb(res);
4118 usb_autopm_put_interface_async(dev->intf);
4119 } else {
Florian Westphal860e9532016-05-03 16:33:13 +02004120 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004121 lan78xx_queue_skb(&dev->txq, skb, tx_start);
4122 }
4123 }
4124
4125 clear_bit(EVENT_DEV_ASLEEP, &dev->flags);
4126 spin_unlock_irq(&dev->txq.lock);
4127
4128 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) {
4129 if (!(skb_queue_len(&dev->txq) >= dev->tx_qlen))
4130 netif_start_queue(dev->net);
4131 tasklet_schedule(&dev->bh);
4132 }
4133 }
4134
4135 ret = lan78xx_write_reg(dev, WUCSR2, 0);
4136 ret = lan78xx_write_reg(dev, WUCSR, 0);
4137 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
4138
4139 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ |
4140 WUCSR2_ARP_RCD_ |
4141 WUCSR2_IPV6_TCPSYN_RCD_ |
4142 WUCSR2_IPV4_TCPSYN_RCD_);
4143
4144 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
4145 WUCSR_EEE_RX_WAKE_ |
4146 WUCSR_PFDA_FR_ |
4147 WUCSR_RFE_WAKE_FR_ |
4148 WUCSR_WUFR_ |
4149 WUCSR_MPR_ |
4150 WUCSR_BCST_FR_);
4151
4152 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4153 buf |= MAC_TX_TXEN_;
4154 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4155
4156 return 0;
4157}
4158
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08004159static int lan78xx_reset_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004160{
4161 struct lan78xx_net *dev = usb_get_intfdata(intf);
4162
4163 lan78xx_reset(dev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00004164
Alexander Graf92571a12018-04-04 00:19:35 +02004165 phy_start(dev->net->phydev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00004166
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004167 return lan78xx_resume(intf);
4168}
4169
4170static const struct usb_device_id products[] = {
4171 {
4172 /* LAN7800 USB Gigabit Ethernet Device */
4173 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID),
4174 },
4175 {
4176 /* LAN7850 USB Gigabit Ethernet Device */
4177 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID),
4178 },
Woojung Huh02dc1f32016-12-07 20:26:25 +00004179 {
4180 /* LAN7801 USB Gigabit Ethernet Device */
4181 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID),
4182 },
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004183 {},
4184};
4185MODULE_DEVICE_TABLE(usb, products);
4186
4187static struct usb_driver lan78xx_driver = {
4188 .name = DRIVER_NAME,
4189 .id_table = products,
4190 .probe = lan78xx_probe,
4191 .disconnect = lan78xx_disconnect,
4192 .suspend = lan78xx_suspend,
4193 .resume = lan78xx_resume,
4194 .reset_resume = lan78xx_reset_resume,
4195 .supports_autosuspend = 1,
4196 .disable_hub_initiated_lpm = 1,
4197};
4198
4199module_usb_driver(lan78xx_driver);
4200
4201MODULE_AUTHOR(DRIVER_AUTHOR);
4202MODULE_DESCRIPTION(DRIVER_DESC);
4203MODULE_LICENSE("GPL");