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Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010029#include <linux/i2c/twl.h>
Steve Sakomancc175572008-10-30 21:35:26 -070030#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
34#include <sound/soc-dapm.h>
35#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020036#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070037
38#include "twl4030.h"
39
40/*
41 * twl4030 register cache & default register settings
42 */
43static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
44 0x00, /* this register not used */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030045 0x00, /* REG_CODEC_MODE (0x1) */
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +030046 0x00, /* REG_OPTION (0x2) */
Steve Sakomancc175572008-10-30 21:35:26 -070047 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
Peter Ujfalusi979bb1f2010-05-26 11:38:16 +030049 0x00, /* REG_ANAMICL (0x5) */
Grazvydas Ignotas5920b452008-12-02 20:48:58 +020050 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
Steve Sakomancc175572008-10-30 21:35:26 -070052 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030054 0x0f, /* REG_ATXL1PGA (0xA) */
55 0x0f, /* REG_ATXR1PGA (0xB) */
56 0x0f, /* REG_AVTXL2PGA (0xC) */
57 0x0f, /* REG_AVTXR2PGA (0xD) */
Peter Ujfalusic42a59e2010-02-09 15:24:04 +020058 0x00, /* REG_AUDIO_IF (0xE) */
Steve Sakomancc175572008-10-30 21:35:26 -070059 0x00, /* REG_VOICE_IF (0xF) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030060 0x3f, /* REG_ARXR1PGA (0x10) */
61 0x3f, /* REG_ARXL1PGA (0x11) */
62 0x3f, /* REG_ARXR2PGA (0x12) */
63 0x3f, /* REG_ARXL2PGA (0x13) */
64 0x25, /* REG_VRXPGA (0x14) */
Steve Sakomancc175572008-10-30 21:35:26 -070065 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
Peter Ujfalusic8124592010-01-28 15:57:04 +020067 0x00, /* REG_AVDAC_CTL (0x17) */
Steve Sakomancc175572008-10-30 21:35:26 -070068 0x00, /* REG_ARX2VTXPGA (0x18) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030069 0x32, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */
Steve Sakomancc175572008-10-30 21:35:26 -070073 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030075 0x55, /* REG_BTPGA (0x1F) */
Steve Sakomancc175572008-10-30 21:35:26 -070076 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
Peter Ujfalusie47c7962010-02-17 09:49:54 +020078 0x00, /* REG_HS_SEL (0x22) */
79 0x00, /* REG_HS_GAIN_SET (0x23) */
Steve Sakomancc175572008-10-30 21:35:26 -070080 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030087 0x05, /* REG_ALC_CTL (0x2B) */
Steve Sakomancc175572008-10-30 21:35:26 -070088 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
Peter Ujfalusif8d05bd2008-11-24 08:25:45 +020091 0x00, /* REG_SOFTVOL_CTL (0x2F) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030092 0x13, /* REG_DTMF_FREQSEL (0x30) */
Steve Sakomancc175572008-10-30 21:35:26 -070093 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030097 0x79, /* REG_DTMF_TONOFF (0x35) */
98 0x11, /* REG_DTMF_WANONOFF (0x36) */
Steve Sakomancc175572008-10-30 21:35:26 -070099 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
Peter Ujfalusic8124592010-01-28 15:57:04 +0200102 0x06, /* REG_APLL_CTL (0x3A) */
Steve Sakomancc175572008-10-30 21:35:26 -0700103 0x00, /* REG_DTMF_CTL (0x3B) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +0300104 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */
Steve Sakomancc175572008-10-30 21:35:26 -0700106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +0300112 0x32, /* REG_VDL_APGA_CTL (0x44) */
Steve Sakomancc175572008-10-30 21:35:26 -0700113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
Peter Ujfalusif3b5d302009-05-25 11:12:12 +0300118 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
Steve Sakomancc175572008-10-30 21:35:26 -0700119};
120
Peter Ujfalusi73939582009-01-29 14:57:50 +0200121/* codec private data */
122struct twl4030_priv {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300123 struct snd_soc_codec codec;
124
Peter Ujfalusi73939582009-01-29 14:57:50 +0200125 unsigned int codec_powered;
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300126
127 /* reference counts of AIF/APLL users */
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200128 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +0200129
130 struct snd_pcm_substream *master_substream;
131 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +0300132
133 unsigned int configured;
134 unsigned int rate;
135 unsigned int sample_bits;
136 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300137
138 unsigned int sysclk;
139
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200140 /* Output (with associated amp) states */
141 u8 hsl_enabled, hsr_enabled;
142 u8 earpiece_enabled;
143 u8 predrivel_enabled, predriver_enabled;
144 u8 carkitl_enabled, carkitr_enabled;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200145};
146
Steve Sakomancc175572008-10-30 21:35:26 -0700147/*
148 * read twl4030 register cache
149 */
150static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
151 unsigned int reg)
152{
Takashi Iwaid08664f2009-06-04 09:58:18 +0200153 u8 *cache = codec->reg_cache;
Steve Sakomancc175572008-10-30 21:35:26 -0700154
Ian Molton91432e92009-01-17 17:44:23 +0000155 if (reg >= TWL4030_CACHEREGNUM)
156 return -EIO;
157
Steve Sakomancc175572008-10-30 21:35:26 -0700158 return cache[reg];
159}
160
161/*
162 * write twl4030 register cache
163 */
164static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
165 u8 reg, u8 value)
166{
167 u8 *cache = codec->reg_cache;
168
169 if (reg >= TWL4030_CACHEREGNUM)
170 return;
171 cache[reg] = value;
172}
173
174/*
175 * write to the twl4030 register space
176 */
177static int twl4030_write(struct snd_soc_codec *codec,
178 unsigned int reg, unsigned int value)
179{
Mark Brownb2c812e2010-04-14 15:35:19 +0900180 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200181 int write_to_reg = 0;
182
Steve Sakomancc175572008-10-30 21:35:26 -0700183 twl4030_write_reg_cache(codec, reg, value);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200184 if (likely(reg < TWL4030_REG_SW_SHADOW)) {
185 /* Decide if the given register can be written */
186 switch (reg) {
187 case TWL4030_REG_EAR_CTL:
188 if (twl4030->earpiece_enabled)
189 write_to_reg = 1;
190 break;
191 case TWL4030_REG_PREDL_CTL:
192 if (twl4030->predrivel_enabled)
193 write_to_reg = 1;
194 break;
195 case TWL4030_REG_PREDR_CTL:
196 if (twl4030->predriver_enabled)
197 write_to_reg = 1;
198 break;
199 case TWL4030_REG_PRECKL_CTL:
200 if (twl4030->carkitl_enabled)
201 write_to_reg = 1;
202 break;
203 case TWL4030_REG_PRECKR_CTL:
204 if (twl4030->carkitr_enabled)
205 write_to_reg = 1;
206 break;
207 case TWL4030_REG_HS_GAIN_SET:
208 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
209 write_to_reg = 1;
210 break;
211 default:
212 /* All other register can be written */
213 write_to_reg = 1;
214 break;
215 }
216 if (write_to_reg)
217 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
218 value, reg);
219 }
220 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700221}
222
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200223static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700224{
Mark Brownb2c812e2010-04-14 15:35:19 +0900225 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300226 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700227
Peter Ujfalusi73939582009-01-29 14:57:50 +0200228 if (enable == twl4030->codec_powered)
229 return;
230
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200231 if (enable)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300232 mode = twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200233 else
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300234 mode = twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700235
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300236 if (mode >= 0) {
237 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
238 twl4030->codec_powered = enable;
239 }
Steve Sakomancc175572008-10-30 21:35:26 -0700240
241 /* REVISIT: this delay is present in TI sample drivers */
242 /* but there seems to be no TRM requirement for it */
243 udelay(10);
244}
245
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300246static void twl4030_init_chip(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -0700247{
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300248 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
249 struct twl4030_setup_data *setup = socdev->codec_data;
250 struct snd_soc_codec *codec = socdev->card->codec;
251 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
252 u8 reg, byte;
253 int i = 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700254
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300255 /* Refresh APLL_CTL register from HW */
256 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
257 TWL4030_REG_APLL_CTL);
258 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte);
259
260 /* anti-pop when changing analog gain */
261 reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
262 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
263 reg | TWL4030_SMOOTH_ANAVOL_EN);
264
265 twl4030_write(codec, TWL4030_REG_OPTION,
266 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
267 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
268
269 /* Machine dependent setup */
270 if (!setup)
271 return;
272
273 /* Configuration for headset ramp delay from setup data */
274 if (setup->sysclk != twl4030->sysclk)
275 dev_warn(codec->dev,
276 "Mismatch in APLL mclk: %u (configured: %u)\n",
277 setup->sysclk, twl4030->sysclk);
278
279 reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
280 reg &= ~TWL4030_RAMP_DELAY;
281 reg |= (setup->ramp_delay_value << 2);
282 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg);
283
284 /* initiate offset cancellation */
285 twl4030_codec_enable(codec, 1);
286
287 reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
288 reg &= ~TWL4030_OFFSET_CNCL_SEL;
289 reg |= setup->offset_cncl_path;
290 twl4030_write(codec, TWL4030_REG_ANAMICL,
291 reg | TWL4030_CNCL_OFFSET_START);
292
293 /* wait for offset cancellation to complete */
294 do {
295 /* this takes a little while, so don't slam i2c */
296 udelay(2000);
297 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
298 TWL4030_REG_ANAMICL);
299 } while ((i++ < 100) &&
300 ((byte & TWL4030_CNCL_OFFSET_START) ==
301 TWL4030_CNCL_OFFSET_START));
302
303 /* Make sure that the reg_cache has the same value as the HW */
304 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
305
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200306 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700307}
308
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200309static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200310{
Mark Brownb2c812e2010-04-14 15:35:19 +0900311 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300312 int status = -1;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200313
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300314 if (enable) {
315 twl4030->apll_enabled++;
316 if (twl4030->apll_enabled == 1)
317 status = twl4030_codec_enable_resource(
318 TWL4030_CODEC_RES_APLL);
319 } else {
320 twl4030->apll_enabled--;
321 if (!twl4030->apll_enabled)
322 status = twl4030_codec_disable_resource(
323 TWL4030_CODEC_RES_APLL);
324 }
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300325
326 if (status >= 0)
327 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
Peter Ujfalusi73939582009-01-29 14:57:50 +0200328}
329
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200330/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900331static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
332 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
333 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
334 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
335 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
336};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200337
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200338/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900339static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
340 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
341 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
342 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
343 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
344};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200345
346/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900347static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
348 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
349 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
350 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
351 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
352};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200353
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200354/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900355static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
356 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
357 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
358 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
359};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200360
361/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900362static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
363 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
364 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
365 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
366};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200367
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200368/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900369static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
370 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
371 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
372 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
373};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200374
375/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900376static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
377 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
378 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
379 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
380};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200381
Peter Ujfalusidf339802008-12-09 12:35:51 +0200382/* Handsfree Left */
383static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900384 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200385
386static const struct soc_enum twl4030_handsfreel_enum =
387 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
388 ARRAY_SIZE(twl4030_handsfreel_texts),
389 twl4030_handsfreel_texts);
390
391static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
392SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
393
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300394/* Handsfree Left virtual mute */
395static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
396 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
397
Peter Ujfalusidf339802008-12-09 12:35:51 +0200398/* Handsfree Right */
399static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900400 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200401
402static const struct soc_enum twl4030_handsfreer_enum =
403 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
404 ARRAY_SIZE(twl4030_handsfreer_texts),
405 twl4030_handsfreer_texts);
406
407static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
408SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
409
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300410/* Handsfree Right virtual mute */
411static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
412 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
413
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300414/* Vibra */
415/* Vibra audio path selection */
416static const char *twl4030_vibra_texts[] =
417 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
418
419static const struct soc_enum twl4030_vibra_enum =
420 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
421 ARRAY_SIZE(twl4030_vibra_texts),
422 twl4030_vibra_texts);
423
424static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
425SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
426
427/* Vibra path selection: local vibrator (PWM) or audio driven */
428static const char *twl4030_vibrapath_texts[] =
429 {"Local vibrator", "Audio"};
430
431static const struct soc_enum twl4030_vibrapath_enum =
432 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
433 ARRAY_SIZE(twl4030_vibrapath_texts),
434 twl4030_vibrapath_texts);
435
436static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
437SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
438
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200439/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900440static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300441 SOC_DAPM_SINGLE("Main Mic Capture Switch",
442 TWL4030_REG_ANAMICL, 0, 1, 0),
443 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
444 TWL4030_REG_ANAMICL, 1, 1, 0),
445 SOC_DAPM_SINGLE("AUXL Capture Switch",
446 TWL4030_REG_ANAMICL, 2, 1, 0),
447 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
448 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900449};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200450
451/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900452static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300453 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
454 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900455};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200456
457/* TX1 L/R Analog/Digital microphone selection */
458static const char *twl4030_micpathtx1_texts[] =
459 {"Analog", "Digimic0"};
460
461static const struct soc_enum twl4030_micpathtx1_enum =
462 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
463 ARRAY_SIZE(twl4030_micpathtx1_texts),
464 twl4030_micpathtx1_texts);
465
466static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
467SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
468
469/* TX2 L/R Analog/Digital microphone selection */
470static const char *twl4030_micpathtx2_texts[] =
471 {"Analog", "Digimic1"};
472
473static const struct soc_enum twl4030_micpathtx2_enum =
474 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
475 ARRAY_SIZE(twl4030_micpathtx2_texts),
476 twl4030_micpathtx2_texts);
477
478static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
479SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
480
Peter Ujfalusi73939582009-01-29 14:57:50 +0200481/* Analog bypass for AudioR1 */
482static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
483 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
484
485/* Analog bypass for AudioL1 */
486static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
487 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
488
489/* Analog bypass for AudioR2 */
490static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
491 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
492
493/* Analog bypass for AudioL2 */
494static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
495 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
496
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500497/* Analog bypass for Voice */
498static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
499 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
500
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200501/* Digital bypass gain, 0 mutes the bypass */
502static const unsigned int twl4030_dapm_dbypass_tlv[] = {
503 TLV_DB_RANGE_HEAD(2),
504 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
505 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
506};
507
508/* Digital bypass left (TX1L -> RX2L) */
509static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
510 SOC_DAPM_SINGLE_TLV("Volume",
511 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
512 twl4030_dapm_dbypass_tlv);
513
514/* Digital bypass right (TX1R -> RX2R) */
515static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
516 SOC_DAPM_SINGLE_TLV("Volume",
517 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
518 twl4030_dapm_dbypass_tlv);
519
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500520/*
521 * Voice Sidetone GAIN volume control:
522 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
523 */
524static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
525
526/* Digital bypass voice: sidetone (VUL -> VDL)*/
527static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
528 SOC_DAPM_SINGLE_TLV("Volume",
529 TWL4030_REG_VSTPGA, 0, 0x29, 0,
530 twl4030_dapm_dbypassv_tlv);
531
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200532static int micpath_event(struct snd_soc_dapm_widget *w,
533 struct snd_kcontrol *kcontrol, int event)
534{
535 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
536 unsigned char adcmicsel, micbias_ctl;
537
538 adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL);
539 micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL);
540 /* Prepare the bits for the given TX path:
541 * shift_l == 0: TX1 microphone path
542 * shift_l == 2: TX2 microphone path */
543 if (e->shift_l) {
544 /* TX2 microphone path */
545 if (adcmicsel & TWL4030_TX2IN_SEL)
546 micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */
547 else
548 micbias_ctl &= ~TWL4030_MICBIAS2_CTL;
549 } else {
550 /* TX1 microphone path */
551 if (adcmicsel & TWL4030_TX1IN_SEL)
552 micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */
553 else
554 micbias_ctl &= ~TWL4030_MICBIAS1_CTL;
555 }
556
557 twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl);
558
559 return 0;
560}
561
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300562/*
563 * Output PGA builder:
564 * Handle the muting and unmuting of the given output (turning off the
565 * amplifier associated with the output pin)
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200566 * On mute bypass the reg_cache and write 0 to the register
567 * On unmute: restore the register content from the reg_cache
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300568 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
569 */
570#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
571static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
572 struct snd_kcontrol *kcontrol, int event) \
573{ \
Mark Brownb2c812e2010-04-14 15:35:19 +0900574 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300575 \
576 switch (event) { \
577 case SND_SOC_DAPM_POST_PMU: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200578 twl4030->pin_name##_enabled = 1; \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300579 twl4030_write(w->codec, reg, \
580 twl4030_read_reg_cache(w->codec, reg)); \
581 break; \
582 case SND_SOC_DAPM_POST_PMD: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200583 twl4030->pin_name##_enabled = 0; \
584 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
585 0, reg); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300586 break; \
587 } \
588 return 0; \
589}
590
591TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
592TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
593TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
594TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
595TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
596
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300597static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800598{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800599 unsigned char hs_ctl;
600
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300601 hs_ctl = twl4030_read_reg_cache(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800602
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300603 if (ramp) {
604 /* HF ramp-up */
605 hs_ctl |= TWL4030_HF_CTL_REF_EN;
606 twl4030_write(codec, reg, hs_ctl);
607 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800608 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300609 twl4030_write(codec, reg, hs_ctl);
610 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800611 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800612 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300613 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800614 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300615 /* HF ramp-down */
616 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
617 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
618 twl4030_write(codec, reg, hs_ctl);
619 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
620 twl4030_write(codec, reg, hs_ctl);
621 udelay(40);
622 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
623 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800624 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300625}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800626
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300627static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
628 struct snd_kcontrol *kcontrol, int event)
629{
630 switch (event) {
631 case SND_SOC_DAPM_POST_PMU:
632 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
633 break;
634 case SND_SOC_DAPM_POST_PMD:
635 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
636 break;
637 }
638 return 0;
639}
640
641static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
642 struct snd_kcontrol *kcontrol, int event)
643{
644 switch (event) {
645 case SND_SOC_DAPM_POST_PMU:
646 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
647 break;
648 case SND_SOC_DAPM_POST_PMD:
649 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
650 break;
651 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800652 return 0;
653}
654
Jari Vanhala86139a12009-10-29 11:58:09 +0200655static int vibramux_event(struct snd_soc_dapm_widget *w,
656 struct snd_kcontrol *kcontrol, int event)
657{
658 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
659 return 0;
660}
661
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200662static int apll_event(struct snd_soc_dapm_widget *w,
663 struct snd_kcontrol *kcontrol, int event)
664{
665 switch (event) {
666 case SND_SOC_DAPM_PRE_PMU:
667 twl4030_apll_enable(w->codec, 1);
668 break;
669 case SND_SOC_DAPM_POST_PMD:
670 twl4030_apll_enable(w->codec, 0);
671 break;
672 }
673 return 0;
674}
675
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300676static int aif_event(struct snd_soc_dapm_widget *w,
677 struct snd_kcontrol *kcontrol, int event)
678{
679 u8 audio_if;
680
681 audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
682 switch (event) {
683 case SND_SOC_DAPM_PRE_PMU:
684 /* Enable AIF */
685 /* enable the PLL before we use it to clock the DAI */
686 twl4030_apll_enable(w->codec, 1);
687
688 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
689 audio_if | TWL4030_AIF_EN);
690 break;
691 case SND_SOC_DAPM_POST_PMD:
692 /* disable the DAI before we stop it's source PLL */
693 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
694 audio_if & ~TWL4030_AIF_EN);
695 twl4030_apll_enable(w->codec, 0);
696 break;
697 }
698 return 0;
699}
700
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300701static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200702{
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500703 struct snd_soc_device *socdev = codec->socdev;
704 struct twl4030_setup_data *setup = socdev->codec_data;
705
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200706 unsigned char hs_gain, hs_pop;
Mark Brownb2c812e2010-04-14 15:35:19 +0900707 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300708 /* Base values for ramp delay calculation: 2^19 - 2^26 */
709 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
710 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200711
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300712 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
713 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200714
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500715 /* Enable external mute control, this dramatically reduces
716 * the pop-noise */
717 if (setup && setup->hs_extmute) {
718 if (setup->set_hs_extmute) {
719 setup->set_hs_extmute(1);
720 } else {
721 hs_pop |= TWL4030_EXTMUTE;
722 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
723 }
724 }
725
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300726 if (ramp) {
727 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200728 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300729 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200730 /* Actually write to the register */
731 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
732 hs_gain,
733 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200734 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300735 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500736 /* Wait ramp delay time + 1, so the VMID can settle */
737 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
738 twl4030->sysclk) + 1);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300739 } else {
740 /* Headset ramp-down _not_ according to
741 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200742 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300743 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
744 /* Wait ramp delay time + 1, so the VMID can settle */
745 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
746 twl4030->sysclk) + 1);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200747 /* Bypass the reg_cache to mute the headset */
Balaji T Kfc7b92f2009-12-13 21:23:33 +0100748 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200749 hs_gain & (~0x0f),
750 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300751
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200752 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300753 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
754 }
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500755
756 /* Disable external mute */
757 if (setup && setup->hs_extmute) {
758 if (setup->set_hs_extmute) {
759 setup->set_hs_extmute(0);
760 } else {
761 hs_pop &= ~TWL4030_EXTMUTE;
762 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
763 }
764 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300765}
766
767static int headsetlpga_event(struct snd_soc_dapm_widget *w,
768 struct snd_kcontrol *kcontrol, int event)
769{
Mark Brownb2c812e2010-04-14 15:35:19 +0900770 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300771
772 switch (event) {
773 case SND_SOC_DAPM_POST_PMU:
774 /* Do the ramp-up only once */
775 if (!twl4030->hsr_enabled)
776 headset_ramp(w->codec, 1);
777
778 twl4030->hsl_enabled = 1;
779 break;
780 case SND_SOC_DAPM_POST_PMD:
781 /* Do the ramp-down only if both headsetL/R is disabled */
782 if (!twl4030->hsr_enabled)
783 headset_ramp(w->codec, 0);
784
785 twl4030->hsl_enabled = 0;
786 break;
787 }
788 return 0;
789}
790
791static int headsetrpga_event(struct snd_soc_dapm_widget *w,
792 struct snd_kcontrol *kcontrol, int event)
793{
Mark Brownb2c812e2010-04-14 15:35:19 +0900794 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300795
796 switch (event) {
797 case SND_SOC_DAPM_POST_PMU:
798 /* Do the ramp-up only once */
799 if (!twl4030->hsl_enabled)
800 headset_ramp(w->codec, 1);
801
802 twl4030->hsr_enabled = 1;
803 break;
804 case SND_SOC_DAPM_POST_PMD:
805 /* Do the ramp-down only if both headsetL/R is disabled */
806 if (!twl4030->hsl_enabled)
807 headset_ramp(w->codec, 0);
808
809 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200810 break;
811 }
812 return 0;
813}
814
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200815/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200816 * Some of the gain controls in TWL (mostly those which are associated with
817 * the outputs) are implemented in an interesting way:
818 * 0x0 : Power down (mute)
819 * 0x1 : 6dB
820 * 0x2 : 0 dB
821 * 0x3 : -6 dB
822 * Inverting not going to help with these.
823 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
824 */
825#define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
826 xinvert, tlv_array) \
827{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
828 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
829 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
830 .tlv.p = (tlv_array), \
831 .info = snd_soc_info_volsw, \
832 .get = snd_soc_get_volsw_twl4030, \
833 .put = snd_soc_put_volsw_twl4030, \
834 .private_value = (unsigned long)&(struct soc_mixer_control) \
835 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
836 .max = xmax, .invert = xinvert} }
837#define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
838 xinvert, tlv_array) \
839{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
840 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
841 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
842 .tlv.p = (tlv_array), \
843 .info = snd_soc_info_volsw_2r, \
844 .get = snd_soc_get_volsw_r2_twl4030,\
845 .put = snd_soc_put_volsw_r2_twl4030, \
846 .private_value = (unsigned long)&(struct soc_mixer_control) \
847 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
Mark Brown64089b82008-12-08 19:17:58 +0000848 .rshift = xshift, .max = xmax, .invert = xinvert} }
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200849#define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
850 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
851 xinvert, tlv_array)
852
853static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
854 struct snd_ctl_elem_value *ucontrol)
855{
856 struct soc_mixer_control *mc =
857 (struct soc_mixer_control *)kcontrol->private_value;
858 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
859 unsigned int reg = mc->reg;
860 unsigned int shift = mc->shift;
861 unsigned int rshift = mc->rshift;
862 int max = mc->max;
863 int mask = (1 << fls(max)) - 1;
864
865 ucontrol->value.integer.value[0] =
866 (snd_soc_read(codec, reg) >> shift) & mask;
867 if (ucontrol->value.integer.value[0])
868 ucontrol->value.integer.value[0] =
869 max + 1 - ucontrol->value.integer.value[0];
870
871 if (shift != rshift) {
872 ucontrol->value.integer.value[1] =
873 (snd_soc_read(codec, reg) >> rshift) & mask;
874 if (ucontrol->value.integer.value[1])
875 ucontrol->value.integer.value[1] =
876 max + 1 - ucontrol->value.integer.value[1];
877 }
878
879 return 0;
880}
881
882static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
883 struct snd_ctl_elem_value *ucontrol)
884{
885 struct soc_mixer_control *mc =
886 (struct soc_mixer_control *)kcontrol->private_value;
887 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
888 unsigned int reg = mc->reg;
889 unsigned int shift = mc->shift;
890 unsigned int rshift = mc->rshift;
891 int max = mc->max;
892 int mask = (1 << fls(max)) - 1;
893 unsigned short val, val2, val_mask;
894
895 val = (ucontrol->value.integer.value[0] & mask);
896
897 val_mask = mask << shift;
898 if (val)
899 val = max + 1 - val;
900 val = val << shift;
901 if (shift != rshift) {
902 val2 = (ucontrol->value.integer.value[1] & mask);
903 val_mask |= mask << rshift;
904 if (val2)
905 val2 = max + 1 - val2;
906 val |= val2 << rshift;
907 }
908 return snd_soc_update_bits(codec, reg, val_mask, val);
909}
910
911static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
912 struct snd_ctl_elem_value *ucontrol)
913{
914 struct soc_mixer_control *mc =
915 (struct soc_mixer_control *)kcontrol->private_value;
916 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
917 unsigned int reg = mc->reg;
918 unsigned int reg2 = mc->rreg;
919 unsigned int shift = mc->shift;
920 int max = mc->max;
921 int mask = (1<<fls(max))-1;
922
923 ucontrol->value.integer.value[0] =
924 (snd_soc_read(codec, reg) >> shift) & mask;
925 ucontrol->value.integer.value[1] =
926 (snd_soc_read(codec, reg2) >> shift) & mask;
927
928 if (ucontrol->value.integer.value[0])
929 ucontrol->value.integer.value[0] =
930 max + 1 - ucontrol->value.integer.value[0];
931 if (ucontrol->value.integer.value[1])
932 ucontrol->value.integer.value[1] =
933 max + 1 - ucontrol->value.integer.value[1];
934
935 return 0;
936}
937
938static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
939 struct snd_ctl_elem_value *ucontrol)
940{
941 struct soc_mixer_control *mc =
942 (struct soc_mixer_control *)kcontrol->private_value;
943 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
944 unsigned int reg = mc->reg;
945 unsigned int reg2 = mc->rreg;
946 unsigned int shift = mc->shift;
947 int max = mc->max;
948 int mask = (1 << fls(max)) - 1;
949 int err;
950 unsigned short val, val2, val_mask;
951
952 val_mask = mask << shift;
953 val = (ucontrol->value.integer.value[0] & mask);
954 val2 = (ucontrol->value.integer.value[1] & mask);
955
956 if (val)
957 val = max + 1 - val;
958 if (val2)
959 val2 = max + 1 - val2;
960
961 val = val << shift;
962 val2 = val2 << shift;
963
964 err = snd_soc_update_bits(codec, reg, val_mask, val);
965 if (err < 0)
966 return err;
967
968 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
969 return err;
970}
971
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500972/* Codec operation modes */
973static const char *twl4030_op_modes_texts[] = {
974 "Option 2 (voice/audio)", "Option 1 (audio)"
975};
976
977static const struct soc_enum twl4030_op_modes_enum =
978 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
979 ARRAY_SIZE(twl4030_op_modes_texts),
980 twl4030_op_modes_texts);
981
Mark Brown423c2382009-06-20 13:54:02 +0100982static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500983 struct snd_ctl_elem_value *ucontrol)
984{
985 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900986 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500987 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
988 unsigned short val;
989 unsigned short mask, bitmask;
990
991 if (twl4030->configured) {
992 printk(KERN_ERR "twl4030 operation mode cannot be "
993 "changed on-the-fly\n");
994 return -EBUSY;
995 }
996
997 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
998 ;
999 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1000 return -EINVAL;
1001
1002 val = ucontrol->value.enumerated.item[0] << e->shift_l;
1003 mask = (bitmask - 1) << e->shift_l;
1004 if (e->shift_l != e->shift_r) {
1005 if (ucontrol->value.enumerated.item[1] > e->max - 1)
1006 return -EINVAL;
1007 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
1008 mask |= (bitmask - 1) << e->shift_r;
1009 }
1010
1011 return snd_soc_update_bits(codec, e->reg, mask, val);
1012}
1013
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +02001014/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +02001015 * FGAIN volume control:
1016 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1017 */
Peter Ujfalusid889a722008-12-01 10:03:46 +02001018static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +02001019
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001020/*
1021 * CGAIN volume control:
1022 * 0 dB to 12 dB in 6 dB steps
1023 * value 2 and 3 means 12 dB
1024 */
Peter Ujfalusid889a722008-12-01 10:03:46 +02001025static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1026
1027/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001028 * Voice Downlink GAIN volume control:
1029 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1030 */
1031static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1032
1033/*
Peter Ujfalusid889a722008-12-01 10:03:46 +02001034 * Analog playback gain
1035 * -24 dB to 12 dB in 2 dB steps
1036 */
1037static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001038
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001039/*
Peter Ujfalusi42902392008-12-01 10:03:47 +02001040 * Gain controls tied to outputs
1041 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1042 */
1043static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1044
1045/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001046 * Gain control for earpiece amplifier
1047 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1048 */
1049static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1050
1051/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001052 * Capture gain after the ADCs
1053 * from 0 dB to 31 dB in 1 dB steps
1054 */
1055static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1056
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001057/*
1058 * Gain control for input amplifiers
1059 * 0 dB to 30 dB in 6 dB steps
1060 */
1061static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1062
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001063/* AVADC clock priority */
1064static const char *twl4030_avadc_clk_priority_texts[] = {
1065 "Voice high priority", "HiFi high priority"
1066};
1067
1068static const struct soc_enum twl4030_avadc_clk_priority_enum =
1069 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1070 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1071 twl4030_avadc_clk_priority_texts);
1072
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001073static const char *twl4030_rampdelay_texts[] = {
1074 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1075 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1076 "3495/2581/1748 ms"
1077};
1078
1079static const struct soc_enum twl4030_rampdelay_enum =
1080 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1081 ARRAY_SIZE(twl4030_rampdelay_texts),
1082 twl4030_rampdelay_texts);
1083
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001084/* Vibra H-bridge direction mode */
1085static const char *twl4030_vibradirmode_texts[] = {
1086 "Vibra H-bridge direction", "Audio data MSB",
1087};
1088
1089static const struct soc_enum twl4030_vibradirmode_enum =
1090 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1091 ARRAY_SIZE(twl4030_vibradirmode_texts),
1092 twl4030_vibradirmode_texts);
1093
1094/* Vibra H-bridge direction */
1095static const char *twl4030_vibradir_texts[] = {
1096 "Positive polarity", "Negative polarity",
1097};
1098
1099static const struct soc_enum twl4030_vibradir_enum =
1100 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1101 ARRAY_SIZE(twl4030_vibradir_texts),
1102 twl4030_vibradir_texts);
1103
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001104/* Digimic Left and right swapping */
1105static const char *twl4030_digimicswap_texts[] = {
1106 "Not swapped", "Swapped",
1107};
1108
1109static const struct soc_enum twl4030_digimicswap_enum =
1110 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1111 ARRAY_SIZE(twl4030_digimicswap_texts),
1112 twl4030_digimicswap_texts);
1113
Steve Sakomancc175572008-10-30 21:35:26 -07001114static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001115 /* Codec operation mode control */
1116 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1117 snd_soc_get_enum_double,
1118 snd_soc_put_twl4030_opmode_enum_double),
1119
Peter Ujfalusid889a722008-12-01 10:03:46 +02001120 /* Common playback gain controls */
1121 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1122 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1123 0, 0x3f, 0, digital_fine_tlv),
1124 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1125 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1126 0, 0x3f, 0, digital_fine_tlv),
1127
1128 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1129 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1130 6, 0x2, 0, digital_coarse_tlv),
1131 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1132 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1133 6, 0x2, 0, digital_coarse_tlv),
1134
1135 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1136 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1137 3, 0x12, 1, analog_tlv),
1138 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1139 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1140 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001141 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1142 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1143 1, 1, 0),
1144 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1145 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1146 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001147
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001148 /* Common voice downlink gain controls */
1149 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1150 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1151
1152 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1153 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1154
1155 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1156 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1157
Peter Ujfalusi42902392008-12-01 10:03:47 +02001158 /* Separate output gain controls */
1159 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1160 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1161 4, 3, 0, output_tvl),
1162
1163 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1164 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
1165
1166 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1167 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1168 4, 3, 0, output_tvl),
1169
1170 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001171 TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001172
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001173 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001174 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001175 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1176 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001177 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1178 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1179 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001180
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001181 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001182 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001183
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001184 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1185
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001186 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001187
1188 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1189 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001190
1191 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001192};
1193
Steve Sakomancc175572008-10-30 21:35:26 -07001194static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001195 /* Left channel inputs */
1196 SND_SOC_DAPM_INPUT("MAINMIC"),
1197 SND_SOC_DAPM_INPUT("HSMIC"),
1198 SND_SOC_DAPM_INPUT("AUXL"),
1199 SND_SOC_DAPM_INPUT("CARKITMIC"),
1200 /* Right channel inputs */
1201 SND_SOC_DAPM_INPUT("SUBMIC"),
1202 SND_SOC_DAPM_INPUT("AUXR"),
1203 /* Digital microphones (Stereo) */
1204 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1205 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001206
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001207 /* Outputs */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001208 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001209 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1210 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001211 SND_SOC_DAPM_OUTPUT("HSOL"),
1212 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001213 SND_SOC_DAPM_OUTPUT("CARKITL"),
1214 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001215 SND_SOC_DAPM_OUTPUT("HFL"),
1216 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001217 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001218
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001219 /* AIF and APLL clocks for running DAIs (including loopback) */
1220 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1221 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1222 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1223
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001224 /* DACs */
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001225 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001226 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001227 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001228 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001229 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001230 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001231 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001232 SND_SOC_NOPM, 0, 0),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001233 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001234 SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001235
Peter Ujfalusi73939582009-01-29 14:57:50 +02001236 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001237 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1238 &twl4030_dapm_abypassr1_control),
1239 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1240 &twl4030_dapm_abypassl1_control),
1241 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1242 &twl4030_dapm_abypassr2_control),
1243 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1244 &twl4030_dapm_abypassl2_control),
1245 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1246 &twl4030_dapm_abypassv_control),
1247
1248 /* Master analog loopback switch */
1249 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1250 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001251
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001252 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001253 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1254 &twl4030_dapm_dbypassl_control),
1255 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1256 &twl4030_dapm_dbypassr_control),
1257 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1258 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001259
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001260 /* Digital mixers, power control for the physical DACs */
1261 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1262 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1263 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1264 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1265 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1266 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1267 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1268 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1269 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1270 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1271
1272 /* Analog mixers, power control for the physical PGAs */
1273 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1274 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1275 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1276 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1277 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1278 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1279 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1280 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1281 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1282 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001283
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001284 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1285 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1286
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001287 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1288 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001289
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001290 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001291 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001292 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1293 &twl4030_dapm_earpiece_controls[0],
1294 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001295 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1296 0, 0, NULL, 0, earpiecepga_event,
1297 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001298 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001299 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1300 &twl4030_dapm_predrivel_controls[0],
1301 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001302 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1303 0, 0, NULL, 0, predrivelpga_event,
1304 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001305 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1306 &twl4030_dapm_predriver_controls[0],
1307 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001308 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1309 0, 0, NULL, 0, predriverpga_event,
1310 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001311 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001312 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001313 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001314 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1315 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1316 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001317 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1318 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1319 &twl4030_dapm_hsor_controls[0],
1320 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001321 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1322 0, 0, NULL, 0, headsetrpga_event,
1323 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001324 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001325 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1326 &twl4030_dapm_carkitl_controls[0],
1327 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001328 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1329 0, 0, NULL, 0, carkitlpga_event,
1330 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001331 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1332 &twl4030_dapm_carkitr_controls[0],
1333 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001334 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1335 0, 0, NULL, 0, carkitrpga_event,
1336 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001337
1338 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001339 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001340 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1341 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001342 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001343 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001344 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1345 0, 0, NULL, 0, handsfreelpga_event,
1346 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1347 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1348 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001349 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001350 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001351 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1352 0, 0, NULL, 0, handsfreerpga_event,
1353 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001354 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001355 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1356 &twl4030_dapm_vibra_control, vibramux_event,
1357 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001358 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1359 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001360
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001361 /* Introducing four virtual ADC, since TWL4030 have four channel for
1362 capture */
1363 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1364 SND_SOC_NOPM, 0, 0),
1365 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1366 SND_SOC_NOPM, 0, 0),
1367 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1368 SND_SOC_NOPM, 0, 0),
1369 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1370 SND_SOC_NOPM, 0, 0),
1371
1372 /* Analog/Digital mic path selection.
1373 TX1 Left/Right: either analog Left/Right or Digimic0
1374 TX2 Left/Right: either analog Left/Right or Digimic1 */
1375 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1376 &twl4030_dapm_micpathtx1_control, micpath_event,
1377 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1378 SND_SOC_DAPM_POST_REG),
1379 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1380 &twl4030_dapm_micpathtx2_control, micpath_event,
1381 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1382 SND_SOC_DAPM_POST_REG),
1383
Joonyoung Shim97b80962009-05-11 20:36:08 +09001384 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001385 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001386 TWL4030_REG_ANAMICL, 4, 0,
1387 &twl4030_dapm_analoglmic_controls[0],
1388 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001389 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001390 TWL4030_REG_ANAMICR, 4, 0,
1391 &twl4030_dapm_analogrmic_controls[0],
1392 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001393
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001394 SND_SOC_DAPM_PGA("ADC Physical Left",
1395 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1396 SND_SOC_DAPM_PGA("ADC Physical Right",
1397 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001398
1399 SND_SOC_DAPM_PGA("Digimic0 Enable",
1400 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
1401 SND_SOC_DAPM_PGA("Digimic1 Enable",
1402 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0),
1403
1404 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1405 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1406 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001407
Steve Sakomancc175572008-10-30 21:35:26 -07001408};
1409
1410static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001411 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1412 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1413 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1414 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1415 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001416
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001417 /* Supply for the digital part (APLL) */
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001418 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1419
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001420 {"Digital R1 Playback Mixer", NULL, "AIF Enable"},
1421 {"Digital L1 Playback Mixer", NULL, "AIF Enable"},
1422 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1423 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1424
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001425 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1426 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1427 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1428 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1429 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001430
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001431 /* Internal playback routings */
1432 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001433 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1434 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1435 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1436 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001437 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001438 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001439 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1440 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1441 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1442 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001443 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001444 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001445 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1446 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1447 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1448 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001449 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001450 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001451 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1452 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1453 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001454 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001455 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001456 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1457 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1458 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001459 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001460 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001461 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1462 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1463 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001464 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001465 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001466 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1467 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1468 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001469 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001470 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001471 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1472 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1473 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1474 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001475 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1476 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001477 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001478 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1479 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1480 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1481 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001482 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1483 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001484 /* Vibra */
1485 {"Vibra Mux", "AudioL1", "DAC Left1"},
1486 {"Vibra Mux", "AudioR1", "DAC Right1"},
1487 {"Vibra Mux", "AudioL2", "DAC Left2"},
1488 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001489
Steve Sakomancc175572008-10-30 21:35:26 -07001490 /* outputs */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001491 /* Must be always connected (for AIF and APLL) */
1492 {"Virtual HiFi OUT", NULL, "Digital L1 Playback Mixer"},
1493 {"Virtual HiFi OUT", NULL, "Digital R1 Playback Mixer"},
1494 {"Virtual HiFi OUT", NULL, "Digital L2 Playback Mixer"},
1495 {"Virtual HiFi OUT", NULL, "Digital R2 Playback Mixer"},
1496 /* Must be always connected (for APLL) */
1497 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1498 /* Physical outputs */
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001499 {"EARPIECE", NULL, "Earpiece PGA"},
1500 {"PREDRIVEL", NULL, "PredriveL PGA"},
1501 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001502 {"HSOL", NULL, "HeadsetL PGA"},
1503 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001504 {"CARKITL", NULL, "CarkitL PGA"},
1505 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001506 {"HFL", NULL, "HandsfreeL PGA"},
1507 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001508 {"Vibra Route", "Audio", "Vibra Mux"},
1509 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001510
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001511 /* Capture path */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001512 /* Must be always connected (for AIF and APLL) */
1513 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1514 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1515 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1516 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1517 /* Physical inputs */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001518 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1519 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1520 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1521 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001522
Peter Ujfalusi90289352009-08-14 08:44:00 +03001523 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1524 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001525
Peter Ujfalusi90289352009-08-14 08:44:00 +03001526 {"ADC Physical Left", NULL, "Analog Left"},
1527 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001528
1529 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1530 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1531
1532 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001533 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001534 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1535 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001536 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001537 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1538 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001539 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001540 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1541 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001542 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001543 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1544
1545 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1546 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1547 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1548 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1549
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001550 {"ADC Virtual Left1", NULL, "AIF Enable"},
1551 {"ADC Virtual Right1", NULL, "AIF Enable"},
1552 {"ADC Virtual Left2", NULL, "AIF Enable"},
1553 {"ADC Virtual Right2", NULL, "AIF Enable"},
1554
Peter Ujfalusi73939582009-01-29 14:57:50 +02001555 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001556 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1557 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1558 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1559 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1560 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001561
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001562 /* Supply for the Analog loopbacks */
1563 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1564 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1565 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1566 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1567 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1568
Peter Ujfalusi73939582009-01-29 14:57:50 +02001569 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1570 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1571 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1572 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001573 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001574
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001575 /* Digital bypass routes */
1576 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1577 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001578 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001579
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001580 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1581 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1582 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001583
Steve Sakomancc175572008-10-30 21:35:26 -07001584};
1585
1586static int twl4030_add_widgets(struct snd_soc_codec *codec)
1587{
1588 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
1589 ARRAY_SIZE(twl4030_dapm_widgets));
1590
1591 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
1592
Steve Sakomancc175572008-10-30 21:35:26 -07001593 return 0;
1594}
1595
Steve Sakomancc175572008-10-30 21:35:26 -07001596static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1597 enum snd_soc_bias_level level)
1598{
1599 switch (level) {
1600 case SND_SOC_BIAS_ON:
Steve Sakomancc175572008-10-30 21:35:26 -07001601 break;
1602 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001603 break;
1604 case SND_SOC_BIAS_STANDBY:
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001605 if (codec->bias_level == SND_SOC_BIAS_OFF)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03001606 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001607 break;
1608 case SND_SOC_BIAS_OFF:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03001609 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001610 break;
1611 }
1612 codec->bias_level = level;
1613
1614 return 0;
1615}
1616
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001617static void twl4030_constraints(struct twl4030_priv *twl4030,
1618 struct snd_pcm_substream *mst_substream)
1619{
1620 struct snd_pcm_substream *slv_substream;
1621
1622 /* Pick the stream, which need to be constrained */
1623 if (mst_substream == twl4030->master_substream)
1624 slv_substream = twl4030->slave_substream;
1625 else if (mst_substream == twl4030->slave_substream)
1626 slv_substream = twl4030->master_substream;
1627 else /* This should not happen.. */
1628 return;
1629
1630 /* Set the constraints according to the already configured stream */
1631 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1632 SNDRV_PCM_HW_PARAM_RATE,
1633 twl4030->rate,
1634 twl4030->rate);
1635
1636 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1637 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1638 twl4030->sample_bits,
1639 twl4030->sample_bits);
1640
1641 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1642 SNDRV_PCM_HW_PARAM_CHANNELS,
1643 twl4030->channels,
1644 twl4030->channels);
1645}
1646
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001647/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1648 * capture has to be enabled/disabled. */
1649static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1650 int enable)
1651{
1652 u8 reg, mask;
1653
1654 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1655
1656 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1657 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1658 else
1659 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1660
1661 if (enable)
1662 reg |= mask;
1663 else
1664 reg &= ~mask;
1665
1666 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1667}
1668
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001669static int twl4030_startup(struct snd_pcm_substream *substream,
1670 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001671{
1672 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1673 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001674 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001675 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001676
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001677 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001678 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001679 /* The DAI has one configuration for playback and capture, so
1680 * if the DAI has been already configured then constrain this
1681 * substream to match it. */
1682 if (twl4030->configured)
1683 twl4030_constraints(twl4030, twl4030->master_substream);
1684 } else {
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001685 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1686 TWL4030_OPTION_1)) {
1687 /* In option2 4 channel is not supported, set the
1688 * constraint for the first stream for channels, the
1689 * second stream will 'inherit' this cosntraint */
1690 snd_pcm_hw_constraint_minmax(substream->runtime,
1691 SNDRV_PCM_HW_PARAM_CHANNELS,
1692 2, 2);
1693 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001694 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001695 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001696
1697 return 0;
1698}
1699
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001700static void twl4030_shutdown(struct snd_pcm_substream *substream,
1701 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001702{
1703 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1704 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001705 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001706 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001707
1708 if (twl4030->master_substream == substream)
1709 twl4030->master_substream = twl4030->slave_substream;
1710
1711 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001712
1713 /* If all streams are closed, or the remaining stream has not yet
1714 * been configured than set the DAI as not configured. */
1715 if (!twl4030->master_substream)
1716 twl4030->configured = 0;
1717 else if (!twl4030->master_substream->runtime->channels)
1718 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001719
1720 /* If the closing substream had 4 channel, do the necessary cleanup */
1721 if (substream->runtime->channels == 4)
1722 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001723}
1724
Steve Sakomancc175572008-10-30 21:35:26 -07001725static int twl4030_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +00001726 struct snd_pcm_hw_params *params,
1727 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001728{
1729 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1730 struct snd_soc_device *socdev = rtd->socdev;
Mark Brown6627a652009-01-23 22:55:23 +00001731 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001732 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001733 u8 mode, old_mode, format, old_format;
1734
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001735 /* If the substream has 4 channel, do the necessary setup */
1736 if (params_channels(params) == 4) {
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001737 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1738 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1739
1740 /* Safety check: are we in the correct operating mode and
1741 * the interface is in TDM mode? */
1742 if ((mode & TWL4030_OPTION_1) &&
1743 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001744 twl4030_tdm_enable(codec, substream->stream, 1);
1745 else
1746 return -EINVAL;
1747 }
1748
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001749 if (twl4030->configured)
1750 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001751 return 0;
1752
Steve Sakomancc175572008-10-30 21:35:26 -07001753 /* bit rate */
1754 old_mode = twl4030_read_reg_cache(codec,
1755 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1756 mode = old_mode & ~TWL4030_APLL_RATE;
1757
1758 switch (params_rate(params)) {
1759 case 8000:
1760 mode |= TWL4030_APLL_RATE_8000;
1761 break;
1762 case 11025:
1763 mode |= TWL4030_APLL_RATE_11025;
1764 break;
1765 case 12000:
1766 mode |= TWL4030_APLL_RATE_12000;
1767 break;
1768 case 16000:
1769 mode |= TWL4030_APLL_RATE_16000;
1770 break;
1771 case 22050:
1772 mode |= TWL4030_APLL_RATE_22050;
1773 break;
1774 case 24000:
1775 mode |= TWL4030_APLL_RATE_24000;
1776 break;
1777 case 32000:
1778 mode |= TWL4030_APLL_RATE_32000;
1779 break;
1780 case 44100:
1781 mode |= TWL4030_APLL_RATE_44100;
1782 break;
1783 case 48000:
1784 mode |= TWL4030_APLL_RATE_48000;
1785 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001786 case 96000:
1787 mode |= TWL4030_APLL_RATE_96000;
1788 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001789 default:
1790 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1791 params_rate(params));
1792 return -EINVAL;
1793 }
1794
1795 if (mode != old_mode) {
1796 /* change rate and set CODECPDZ */
Peter Ujfalusi73939582009-01-29 14:57:50 +02001797 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001798 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001799 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001800 }
1801
1802 /* sample size */
1803 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1804 format = old_format;
1805 format &= ~TWL4030_DATA_WIDTH;
1806 switch (params_format(params)) {
1807 case SNDRV_PCM_FORMAT_S16_LE:
1808 format |= TWL4030_DATA_WIDTH_16S_16W;
1809 break;
1810 case SNDRV_PCM_FORMAT_S24_LE:
1811 format |= TWL4030_DATA_WIDTH_32S_24W;
1812 break;
1813 default:
1814 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1815 params_format(params));
1816 return -EINVAL;
1817 }
1818
1819 if (format != old_format) {
1820
1821 /* clear CODECPDZ before changing format (codec requirement) */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001822 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001823
1824 /* change format */
1825 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1826
1827 /* set CODECPDZ afterwards */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001828 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001829 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001830
1831 /* Store the important parameters for the DAI configuration and set
1832 * the DAI as configured */
1833 twl4030->configured = 1;
1834 twl4030->rate = params_rate(params);
1835 twl4030->sample_bits = hw_param_interval(params,
1836 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1837 twl4030->channels = params_channels(params);
1838
1839 /* If both playback and capture streams are open, and one of them
1840 * is setting the hw parameters right now (since we are here), set
1841 * constraints to the other stream to match the current one. */
1842 if (twl4030->slave_substream)
1843 twl4030_constraints(twl4030, substream);
1844
Steve Sakomancc175572008-10-30 21:35:26 -07001845 return 0;
1846}
1847
1848static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1849 int clk_id, unsigned int freq, int dir)
1850{
1851 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001852 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001853
1854 switch (freq) {
1855 case 19200000:
Steve Sakomancc175572008-10-30 21:35:26 -07001856 case 26000000:
Steve Sakomancc175572008-10-30 21:35:26 -07001857 case 38400000:
Steve Sakomancc175572008-10-30 21:35:26 -07001858 break;
1859 default:
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001860 dev_err(codec->dev, "Unsupported APLL mclk: %u\n", freq);
Steve Sakomancc175572008-10-30 21:35:26 -07001861 return -EINVAL;
1862 }
1863
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001864 if ((freq / 1000) != twl4030->sysclk) {
1865 dev_err(codec->dev,
1866 "Mismatch in APLL mclk: %u (configured: %u)\n",
1867 freq, twl4030->sysclk * 1000);
1868 return -EINVAL;
1869 }
Steve Sakomancc175572008-10-30 21:35:26 -07001870
1871 return 0;
1872}
1873
1874static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1875 unsigned int fmt)
1876{
1877 struct snd_soc_codec *codec = codec_dai->codec;
1878 u8 old_format, format;
1879
1880 /* get format */
1881 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1882 format = old_format;
1883
1884 /* set master/slave audio interface */
1885 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1886 case SND_SOC_DAIFMT_CBM_CFM:
1887 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001888 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001889 break;
1890 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001891 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001892 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001893 break;
1894 default:
1895 return -EINVAL;
1896 }
1897
1898 /* interface format */
1899 format &= ~TWL4030_AIF_FORMAT;
1900 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1901 case SND_SOC_DAIFMT_I2S:
1902 format |= TWL4030_AIF_FORMAT_CODEC;
1903 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001904 case SND_SOC_DAIFMT_DSP_A:
1905 format |= TWL4030_AIF_FORMAT_TDM;
1906 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001907 default:
1908 return -EINVAL;
1909 }
1910
1911 if (format != old_format) {
1912
1913 /* clear CODECPDZ before changing format (codec requirement) */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001914 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001915
1916 /* change format */
1917 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1918
1919 /* set CODECPDZ afterwards */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001920 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001921 }
1922
1923 return 0;
1924}
1925
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001926static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1927{
1928 struct snd_soc_codec *codec = dai->codec;
1929 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1930
1931 if (tristate)
1932 reg |= TWL4030_AIF_TRI_EN;
1933 else
1934 reg &= ~TWL4030_AIF_TRI_EN;
1935
1936 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1937}
1938
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001939/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1940 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1941static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1942 int enable)
1943{
1944 u8 reg, mask;
1945
1946 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1947
1948 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1949 mask = TWL4030_ARXL1_VRX_EN;
1950 else
1951 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1952
1953 if (enable)
1954 reg |= mask;
1955 else
1956 reg &= ~mask;
1957
1958 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1959}
1960
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001961static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1962 struct snd_soc_dai *dai)
1963{
1964 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1965 struct snd_soc_device *socdev = rtd->socdev;
1966 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001967 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001968 u8 mode;
1969
1970 /* If the system master clock is not 26MHz, the voice PCM interface is
1971 * not avilable.
1972 */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001973 if (twl4030->sysclk != 26000) {
1974 dev_err(codec->dev, "The board is configured for %u Hz, while"
1975 "the Voice interface needs 26MHz APLL mclk\n",
1976 twl4030->sysclk * 1000);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001977 return -EINVAL;
1978 }
1979
1980 /* If the codec mode is not option2, the voice PCM interface is not
1981 * avilable.
1982 */
1983 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1984 & TWL4030_OPT_MODE;
1985
1986 if (mode != TWL4030_OPTION_2) {
1987 printk(KERN_ERR "TWL4030 voice startup: "
1988 "the codec mode is not option2\n");
1989 return -EINVAL;
1990 }
1991
1992 return 0;
1993}
1994
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001995static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
1996 struct snd_soc_dai *dai)
1997{
1998 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1999 struct snd_soc_device *socdev = rtd->socdev;
2000 struct snd_soc_codec *codec = socdev->card->codec;
2001
2002 /* Enable voice digital filters */
2003 twl4030_voice_enable(codec, substream->stream, 0);
2004}
2005
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002006static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2007 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2008{
2009 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2010 struct snd_soc_device *socdev = rtd->socdev;
2011 struct snd_soc_codec *codec = socdev->card->codec;
2012 u8 old_mode, mode;
2013
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002014 /* Enable voice digital filters */
2015 twl4030_voice_enable(codec, substream->stream, 1);
2016
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002017 /* bit rate */
2018 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2019 & ~(TWL4030_CODECPDZ);
2020 mode = old_mode;
2021
2022 switch (params_rate(params)) {
2023 case 8000:
2024 mode &= ~(TWL4030_SEL_16K);
2025 break;
2026 case 16000:
2027 mode |= TWL4030_SEL_16K;
2028 break;
2029 default:
2030 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
2031 params_rate(params));
2032 return -EINVAL;
2033 }
2034
2035 if (mode != old_mode) {
2036 /* change rate and set CODECPDZ */
2037 twl4030_codec_enable(codec, 0);
2038 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2039 twl4030_codec_enable(codec, 1);
2040 }
2041
2042 return 0;
2043}
2044
2045static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2046 int clk_id, unsigned int freq, int dir)
2047{
2048 struct snd_soc_codec *codec = codec_dai->codec;
Takashi Iwaid4a8ca22010-04-20 08:20:31 +02002049 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002050
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002051 if (freq != 26000000) {
2052 dev_err(codec->dev, "Unsupported APLL mclk: %u, the Voice"
2053 "interface needs 26MHz APLL mclk\n", freq);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002054 return -EINVAL;
2055 }
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002056 if ((freq / 1000) != twl4030->sysclk) {
2057 dev_err(codec->dev,
2058 "Mismatch in APLL mclk: %u (configured: %u)\n",
2059 freq, twl4030->sysclk * 1000);
2060 return -EINVAL;
2061 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002062 return 0;
2063}
2064
2065static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2066 unsigned int fmt)
2067{
2068 struct snd_soc_codec *codec = codec_dai->codec;
2069 u8 old_format, format;
2070
2071 /* get format */
2072 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2073 format = old_format;
2074
2075 /* set master/slave audio interface */
2076 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05002077 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002078 format &= ~(TWL4030_VIF_SLAVE_EN);
2079 break;
2080 case SND_SOC_DAIFMT_CBS_CFS:
2081 format |= TWL4030_VIF_SLAVE_EN;
2082 break;
2083 default:
2084 return -EINVAL;
2085 }
2086
2087 /* clock inversion */
2088 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2089 case SND_SOC_DAIFMT_IB_NF:
2090 format &= ~(TWL4030_VIF_FORMAT);
2091 break;
2092 case SND_SOC_DAIFMT_NB_IF:
2093 format |= TWL4030_VIF_FORMAT;
2094 break;
2095 default:
2096 return -EINVAL;
2097 }
2098
2099 if (format != old_format) {
2100 /* change format and set CODECPDZ */
2101 twl4030_codec_enable(codec, 0);
2102 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2103 twl4030_codec_enable(codec, 1);
2104 }
2105
2106 return 0;
2107}
2108
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002109static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2110{
2111 struct snd_soc_codec *codec = dai->codec;
2112 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2113
2114 if (tristate)
2115 reg |= TWL4030_VIF_TRI_EN;
2116 else
2117 reg &= ~TWL4030_VIF_TRI_EN;
2118
2119 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2120}
2121
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002122#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Steve Sakomancc175572008-10-30 21:35:26 -07002123#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2124
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002125static struct snd_soc_dai_ops twl4030_dai_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002126 .startup = twl4030_startup,
2127 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002128 .hw_params = twl4030_hw_params,
2129 .set_sysclk = twl4030_set_dai_sysclk,
2130 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002131 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002132};
2133
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002134static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2135 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002136 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002137 .hw_params = twl4030_voice_hw_params,
2138 .set_sysclk = twl4030_voice_set_dai_sysclk,
2139 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002140 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002141};
2142
2143struct snd_soc_dai twl4030_dai[] = {
2144{
Steve Sakomancc175572008-10-30 21:35:26 -07002145 .name = "twl4030",
2146 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002147 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002148 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002149 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002150 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Steve Sakomancc175572008-10-30 21:35:26 -07002151 .formats = TWL4030_FORMATS,},
2152 .capture = {
2153 .stream_name = "Capture",
2154 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002155 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002156 .rates = TWL4030_RATES,
2157 .formats = TWL4030_FORMATS,},
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002158 .ops = &twl4030_dai_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002159},
2160{
2161 .name = "twl4030 Voice",
2162 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002163 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002164 .channels_min = 1,
2165 .channels_max = 1,
2166 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2167 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2168 .capture = {
2169 .stream_name = "Capture",
2170 .channels_min = 1,
2171 .channels_max = 2,
2172 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2173 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2174 .ops = &twl4030_dai_voice_ops,
2175},
Steve Sakomancc175572008-10-30 21:35:26 -07002176};
2177EXPORT_SYMBOL_GPL(twl4030_dai);
2178
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002179static int twl4030_soc_suspend(struct platform_device *pdev, pm_message_t state)
Steve Sakomancc175572008-10-30 21:35:26 -07002180{
2181 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002182 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002183
2184 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2185
2186 return 0;
2187}
2188
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002189static int twl4030_soc_resume(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002190{
2191 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002192 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002193
2194 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
Steve Sakomancc175572008-10-30 21:35:26 -07002195 return 0;
2196}
2197
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002198static struct snd_soc_codec *twl4030_codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002199
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002200static int twl4030_soc_probe(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002201{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002202 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002203 struct snd_soc_codec *codec;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002204 int ret;
Steve Sakomancc175572008-10-30 21:35:26 -07002205
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002206 BUG_ON(!twl4030_codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002207
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002208 codec = twl4030_codec;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002209 socdev->card->codec = codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002210
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03002211 twl4030_init_chip(pdev);
2212 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
Peter Ujfalusi9da28c72009-05-22 10:13:15 +03002213
Steve Sakomancc175572008-10-30 21:35:26 -07002214 /* register pcms */
2215 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
2216 if (ret < 0) {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002217 dev_err(&pdev->dev, "failed to create pcms\n");
2218 return ret;
Steve Sakomancc175572008-10-30 21:35:26 -07002219 }
2220
Ian Molton3e8e1952009-01-09 00:23:21 +00002221 snd_soc_add_controls(codec, twl4030_snd_controls,
2222 ARRAY_SIZE(twl4030_snd_controls));
Steve Sakomancc175572008-10-30 21:35:26 -07002223 twl4030_add_widgets(codec);
2224
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002225 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002226}
2227
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002228static int twl4030_soc_remove(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002229{
2230 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002231 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002232
Peter Ujfalusi73939582009-01-29 14:57:50 +02002233 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
Peter Ujfalusic6d1662b2009-01-08 15:52:43 +02002234 snd_soc_free_pcms(socdev);
2235 snd_soc_dapm_free(socdev);
Steve Sakomancc175572008-10-30 21:35:26 -07002236
2237 return 0;
2238}
2239
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002240static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2241{
2242 struct twl4030_codec_audio_data *pdata = pdev->dev.platform_data;
2243 struct snd_soc_codec *codec;
2244 struct twl4030_priv *twl4030;
2245 int ret;
2246
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002247 if (!pdata) {
2248 dev_err(&pdev->dev, "platform_data is missing\n");
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002249 return -EINVAL;
2250 }
2251
2252 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2253 if (twl4030 == NULL) {
2254 dev_err(&pdev->dev, "Can not allocate memroy\n");
2255 return -ENOMEM;
2256 }
2257
2258 codec = &twl4030->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09002259 snd_soc_codec_set_drvdata(codec, twl4030);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002260 codec->dev = &pdev->dev;
2261 twl4030_dai[0].dev = &pdev->dev;
2262 twl4030_dai[1].dev = &pdev->dev;
2263
2264 mutex_init(&codec->mutex);
2265 INIT_LIST_HEAD(&codec->dapm_widgets);
2266 INIT_LIST_HEAD(&codec->dapm_paths);
2267
2268 codec->name = "twl4030";
2269 codec->owner = THIS_MODULE;
2270 codec->read = twl4030_read_reg_cache;
2271 codec->write = twl4030_write;
2272 codec->set_bias_level = twl4030_set_bias_level;
2273 codec->dai = twl4030_dai;
Peter Ujfalusifd63df22010-01-13 12:37:49 +02002274 codec->num_dai = ARRAY_SIZE(twl4030_dai);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002275 codec->reg_cache_size = sizeof(twl4030_reg);
2276 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
2277 GFP_KERNEL);
2278 if (codec->reg_cache == NULL) {
2279 ret = -ENOMEM;
2280 goto error_cache;
2281 }
2282
2283 platform_set_drvdata(pdev, twl4030);
2284 twl4030_codec = codec;
2285
2286 /* Set the defaults, and power up the codec */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002287 twl4030->sysclk = twl4030_codec_get_mclk() / 1000;
Peter Ujfalusib3f5a272009-11-02 14:34:54 +02002288 codec->bias_level = SND_SOC_BIAS_OFF;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002289
2290 ret = snd_soc_register_codec(codec);
2291 if (ret != 0) {
2292 dev_err(codec->dev, "Failed to register codec: %d\n", ret);
2293 goto error_codec;
2294 }
2295
2296 ret = snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2297 if (ret != 0) {
2298 dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
2299 snd_soc_unregister_codec(codec);
2300 goto error_codec;
2301 }
2302
2303 return 0;
2304
2305error_codec:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03002306 twl4030_codec_enable(codec, 0);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002307 kfree(codec->reg_cache);
2308error_cache:
2309 kfree(twl4030);
2310 return ret;
2311}
2312
2313static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2314{
2315 struct twl4030_priv *twl4030 = platform_get_drvdata(pdev);
2316
Peter Ujfalusicb672862010-02-04 09:10:10 +02002317 snd_soc_unregister_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2318 snd_soc_unregister_codec(&twl4030->codec);
2319 kfree(twl4030->codec.reg_cache);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002320 kfree(twl4030);
2321
2322 twl4030_codec = NULL;
2323 return 0;
2324}
2325
2326MODULE_ALIAS("platform:twl4030_codec_audio");
2327
2328static struct platform_driver twl4030_codec_driver = {
2329 .probe = twl4030_codec_probe,
2330 .remove = __devexit_p(twl4030_codec_remove),
2331 .driver = {
2332 .name = "twl4030_codec_audio",
2333 .owner = THIS_MODULE,
2334 },
Steve Sakomancc175572008-10-30 21:35:26 -07002335};
Steve Sakomancc175572008-10-30 21:35:26 -07002336
Takashi Iwai24e07db2008-12-10 07:40:24 +01002337static int __init twl4030_modinit(void)
Mark Brown64089b82008-12-08 19:17:58 +00002338{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002339 return platform_driver_register(&twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002340}
Takashi Iwai24e07db2008-12-10 07:40:24 +01002341module_init(twl4030_modinit);
Mark Brown64089b82008-12-08 19:17:58 +00002342
2343static void __exit twl4030_exit(void)
2344{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002345 platform_driver_unregister(&twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002346}
2347module_exit(twl4030_exit);
2348
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002349struct snd_soc_codec_device soc_codec_dev_twl4030 = {
2350 .probe = twl4030_soc_probe,
2351 .remove = twl4030_soc_remove,
2352 .suspend = twl4030_soc_suspend,
2353 .resume = twl4030_soc_resume,
2354};
2355EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
2356
Steve Sakomancc175572008-10-30 21:35:26 -07002357MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2358MODULE_AUTHOR("Steve Sakoman");
2359MODULE_LICENSE("GPL");