blob: 6abb3b6a348f6e7541e9f9bff613c4f779d8be5c [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
28/* slightly larger than one large A-MPDU */
29#define HTT_RX_RING_SIZE_MIN 128
30
31/* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
32#define HTT_RX_RING_SIZE_MAX 2048
33
34#define HTT_RX_AVG_FRM_BYTES 1000
35
36/* ms, very conservative */
37#define HTT_RX_HOST_LATENCY_MAX_MS 20
38
39/* ms, conservative */
40#define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
41
42/* when under memory pressure rx ring refill may fail and needs a retry */
43#define HTT_RX_RING_REFILL_RETRY_MS 50
44
Michal Kaziorf6dc2092013-09-26 10:12:22 +030045static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020046static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030047
Kalle Valo5e3dd152013-06-12 20:52:10 +030048static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
49{
50 int size;
51
52 /*
53 * It is expected that the host CPU will typically be able to
54 * service the rx indication from one A-MPDU before the rx
55 * indication from the subsequent A-MPDU happens, roughly 1-2 ms
56 * later. However, the rx ring should be sized very conservatively,
57 * to accomodate the worst reasonable delay before the host CPU
58 * services a rx indication interrupt.
59 *
60 * The rx ring need not be kept full of empty buffers. In theory,
61 * the htt host SW can dynamically track the low-water mark in the
62 * rx ring, and dynamically adjust the level to which the rx ring
63 * is filled with empty buffers, to dynamically meet the desired
64 * low-water mark.
65 *
66 * In contrast, it's difficult to resize the rx ring itself, once
67 * it's in use. Thus, the ring itself should be sized very
68 * conservatively, while the degree to which the ring is filled
69 * with empty buffers should be sized moderately conservatively.
70 */
71
72 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
73 size =
74 htt->max_throughput_mbps +
75 1000 /
76 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
77
78 if (size < HTT_RX_RING_SIZE_MIN)
79 size = HTT_RX_RING_SIZE_MIN;
80
81 if (size > HTT_RX_RING_SIZE_MAX)
82 size = HTT_RX_RING_SIZE_MAX;
83
84 size = roundup_pow_of_two(size);
85
86 return size;
87}
88
89static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
90{
91 int size;
92
93 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
94 size =
95 htt->max_throughput_mbps *
96 1000 /
97 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
98
99 /*
100 * Make sure the fill level is at least 1 less than the ring size.
101 * Leaving 1 element empty allows the SW to easily distinguish
102 * between a full ring vs. an empty ring.
103 */
104 if (size >= htt->rx_ring.size)
105 size = htt->rx_ring.size - 1;
106
107 return size;
108}
109
110static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
111{
112 struct sk_buff *skb;
113 struct ath10k_skb_cb *cb;
114 int i;
115
116 for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
117 skb = htt->rx_ring.netbufs_ring[i];
118 cb = ATH10K_SKB_CB(skb);
119 dma_unmap_single(htt->ar->dev, cb->paddr,
120 skb->len + skb_tailroom(skb),
121 DMA_FROM_DEVICE);
122 dev_kfree_skb_any(skb);
123 }
124
125 htt->rx_ring.fill_cnt = 0;
126}
127
128static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
129{
130 struct htt_rx_desc *rx_desc;
131 struct sk_buff *skb;
132 dma_addr_t paddr;
133 int ret = 0, idx;
134
Kalle Valo8cc7f262014-09-14 12:50:39 +0300135 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300136 while (num > 0) {
137 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
138 if (!skb) {
139 ret = -ENOMEM;
140 goto fail;
141 }
142
143 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
144 skb_pull(skb,
145 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
146 skb->data);
147
148 /* Clear rx_desc attention word before posting to Rx ring */
149 rx_desc = (struct htt_rx_desc *)skb->data;
150 rx_desc->attention.flags = __cpu_to_le32(0);
151
152 paddr = dma_map_single(htt->ar->dev, skb->data,
153 skb->len + skb_tailroom(skb),
154 DMA_FROM_DEVICE);
155
156 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
157 dev_kfree_skb_any(skb);
158 ret = -ENOMEM;
159 goto fail;
160 }
161
162 ATH10K_SKB_CB(skb)->paddr = paddr;
163 htt->rx_ring.netbufs_ring[idx] = skb;
164 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
165 htt->rx_ring.fill_cnt++;
166
167 num--;
168 idx++;
169 idx &= htt->rx_ring.size_mask;
170 }
171
172fail:
Kalle Valo8cc7f262014-09-14 12:50:39 +0300173 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300174 return ret;
175}
176
177static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
178{
179 lockdep_assert_held(&htt->rx_ring.lock);
180 return __ath10k_htt_rx_ring_fill_n(htt, num);
181}
182
183static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
184{
Michal Kazior6e712d42013-09-24 10:18:36 +0200185 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300186
Michal Kazior6e712d42013-09-24 10:18:36 +0200187 /* Refilling the whole RX ring buffer proves to be a bad idea. The
188 * reason is RX may take up significant amount of CPU cycles and starve
189 * other tasks, e.g. TX on an ethernet device while acting as a bridge
190 * with ath10k wlan interface. This ended up with very poor performance
191 * once CPU the host system was overwhelmed with RX on ath10k.
192 *
193 * By limiting the number of refills the replenishing occurs
194 * progressively. This in turns makes use of the fact tasklets are
195 * processed in FIFO order. This means actual RX processing can starve
196 * out refilling. If there's not enough buffers on RX ring FW will not
197 * report RX until it is refilled with enough buffers. This
198 * automatically balances load wrt to CPU power.
199 *
200 * This probably comes at a cost of lower maximum throughput but
201 * improves the avarage and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300202 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200203 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
204 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
205 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300206 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
207 if (ret == -ENOMEM) {
208 /*
209 * Failed to fill it to the desired level -
210 * we'll start a timer and try again next time.
211 * As long as enough buffers are left in the ring for
212 * another A-MPDU rx, no special recovery is needed.
213 */
214 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
215 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200216 } else if (num_deficit > 0) {
217 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300218 }
219 spin_unlock_bh(&htt->rx_ring.lock);
220}
221
222static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
223{
224 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
Kalle Valoaf762c02014-09-14 12:50:17 +0300225
Kalle Valo5e3dd152013-06-12 20:52:10 +0300226 ath10k_htt_rx_msdu_buff_replenish(htt);
227}
228
Michal Kazior3e841fd2014-05-14 16:23:31 +0300229static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
230{
231 struct sk_buff *skb;
232 int i;
233
234 for (i = 0; i < htt->rx_ring.size; i++) {
235 skb = htt->rx_ring.netbufs_ring[i];
236 if (!skb)
237 continue;
238
239 dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
240 skb->len + skb_tailroom(skb),
241 DMA_FROM_DEVICE);
242 dev_kfree_skb_any(skb);
243 htt->rx_ring.netbufs_ring[i] = NULL;
244 }
245}
246
Michal Kazior95bf21f2014-05-16 17:15:39 +0300247void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300249 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200250 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200251 tasklet_kill(&htt->txrx_compl_task);
252
253 skb_queue_purge(&htt->tx_compl_q);
254 skb_queue_purge(&htt->rx_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300255
Michal Kazior3e841fd2014-05-14 16:23:31 +0300256 ath10k_htt_rx_ring_clean_up(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300257
258 dma_free_coherent(htt->ar->dev,
259 (htt->rx_ring.size *
260 sizeof(htt->rx_ring.paddrs_ring)),
261 htt->rx_ring.paddrs_ring,
262 htt->rx_ring.base_paddr);
263
264 dma_free_coherent(htt->ar->dev,
265 sizeof(*htt->rx_ring.alloc_idx.vaddr),
266 htt->rx_ring.alloc_idx.vaddr,
267 htt->rx_ring.alloc_idx.paddr);
268
269 kfree(htt->rx_ring.netbufs_ring);
270}
271
272static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
273{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200274 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300275 int idx;
276 struct sk_buff *msdu;
277
Michal Kazior45967082014-02-27 18:50:05 +0200278 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300279
Michal Kazior8d60ee82014-02-27 18:50:05 +0200280 if (htt->rx_ring.fill_cnt == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200281 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
Michal Kazior8d60ee82014-02-27 18:50:05 +0200282 return NULL;
283 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300284
285 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
286 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300287 htt->rx_ring.netbufs_ring[idx] = NULL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300288
289 idx++;
290 idx &= htt->rx_ring.size_mask;
291 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
292 htt->rx_ring.fill_cnt--;
293
Michal Kazior4de02802014-10-23 17:04:23 +0300294 dma_unmap_single(htt->ar->dev,
295 ATH10K_SKB_CB(msdu)->paddr,
296 msdu->len + skb_tailroom(msdu),
297 DMA_FROM_DEVICE);
298 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
299 msdu->data, msdu->len + skb_tailroom(msdu));
Michal Kazior4de02802014-10-23 17:04:23 +0300300
Kalle Valo5e3dd152013-06-12 20:52:10 +0300301 return msdu;
302}
303
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100304/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300305static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
306 u8 **fw_desc, int *fw_desc_len,
Michal Kazior9aa505d2014-11-18 09:24:47 +0200307 struct sk_buff_head *amsdu,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300308 u32 *attention)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300309{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200310 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300311 int msdu_len, msdu_chaining = 0;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200312 struct sk_buff *msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300313 struct htt_rx_desc *rx_desc;
314
Michal Kazior45967082014-02-27 18:50:05 +0200315 lockdep_assert_held(&htt->rx_ring.lock);
316
Michal Kazior9aa505d2014-11-18 09:24:47 +0200317 for (;;) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300318 int last_msdu, msdu_len_invalid, msdu_chained;
319
Michal Kazior9aa505d2014-11-18 09:24:47 +0200320 msdu = ath10k_htt_rx_netbuf_pop(htt);
321 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200322 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200323 return -ENOENT;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200324 }
325
326 __skb_queue_tail(amsdu, msdu);
327
Kalle Valo5e3dd152013-06-12 20:52:10 +0300328 rx_desc = (struct htt_rx_desc *)msdu->data;
329
330 /* FIXME: we must report msdu payload since this is what caller
331 * expects now */
332 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
333 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
334
335 /*
336 * Sanity check - confirm the HW is finished filling in the
337 * rx data.
338 * If the HW and SW are working correctly, then it's guaranteed
339 * that the HW's MAC DMA is done before this point in the SW.
340 * To prevent the case that we handle a stale Rx descriptor,
341 * just assert for now until we have a way to recover.
342 */
343 if (!(__le32_to_cpu(rx_desc->attention.flags)
344 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200345 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200346 return -EIO;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300347 }
348
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300349 *attention |= __le32_to_cpu(rx_desc->attention.flags) &
350 (RX_ATTENTION_FLAGS_TKIP_MIC_ERR |
351 RX_ATTENTION_FLAGS_DECRYPT_ERR |
352 RX_ATTENTION_FLAGS_FCS_ERR |
353 RX_ATTENTION_FLAGS_MGMT_TYPE);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300354 /*
355 * Copy the FW rx descriptor for this MSDU from the rx
356 * indication message into the MSDU's netbuf. HL uses the
357 * same rx indication message definition as LL, and simply
358 * appends new info (fields from the HW rx desc, and the
359 * MSDU payload itself). So, the offset into the rx
360 * indication message only has to account for the standard
361 * offset of the per-MSDU FW rx desc info within the
362 * message, and how many bytes of the per-MSDU FW rx desc
363 * info have already been consumed. (And the endianness of
364 * the host, since for a big-endian host, the rx ind
365 * message contents, including the per-MSDU rx desc bytes,
366 * were byteswapped during upload.)
367 */
368 if (*fw_desc_len > 0) {
369 rx_desc->fw_desc.info0 = **fw_desc;
370 /*
371 * The target is expected to only provide the basic
372 * per-MSDU rx descriptors. Just to be sure, verify
373 * that the target has not attached extension data
374 * (e.g. LRO flow ID).
375 */
376
377 /* or more, if there's extension data */
378 (*fw_desc)++;
379 (*fw_desc_len)--;
380 } else {
381 /*
382 * When an oversized AMSDU happened, FW will lost
383 * some of MSDU status - in this case, the FW
384 * descriptors provided will be less than the
385 * actual MSDUs inside this MPDU. Mark the FW
386 * descriptors so that it will still deliver to
387 * upper stack, if no CRC error for this MPDU.
388 *
389 * FIX THIS - the FW descriptors are actually for
390 * MSDUs in the end of this A-MSDU instead of the
391 * beginning.
392 */
393 rx_desc->fw_desc.info0 = 0;
394 }
395
396 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
397 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
398 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
399 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
400 RX_MSDU_START_INFO0_MSDU_LENGTH);
401 msdu_chained = rx_desc->frag_info.ring2_more_count;
402
403 if (msdu_len_invalid)
404 msdu_len = 0;
405
406 skb_trim(msdu, 0);
407 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
408 msdu_len -= msdu->len;
409
Michal Kazior9aa505d2014-11-18 09:24:47 +0200410 /* Note: Chained buffers do not contain rx descriptor */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300411 while (msdu_chained--) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200412 msdu = ath10k_htt_rx_netbuf_pop(htt);
413 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200414 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200415 return -ENOENT;
Michal Kaziorb30595a2014-10-23 17:04:24 +0300416 }
417
Michal Kazior9aa505d2014-11-18 09:24:47 +0200418 __skb_queue_tail(amsdu, msdu);
419 skb_trim(msdu, 0);
420 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
421 msdu_len -= msdu->len;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300422 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300423 }
424
Kalle Valo5e3dd152013-06-12 20:52:10 +0300425 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
426 RX_MSDU_END_INFO0_LAST_MSDU;
427
Michal Kaziorb04e2042014-10-23 17:04:27 +0300428 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
Rajkumar Manoharana0883cf2014-10-03 08:02:47 +0300429 sizeof(*rx_desc) - sizeof(u32));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200430
431 if (last_msdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300432 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300433 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300434
Michal Kazior9aa505d2014-11-18 09:24:47 +0200435 if (skb_queue_empty(amsdu))
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100436 msdu_chaining = -1;
437
Kalle Valo5e3dd152013-06-12 20:52:10 +0300438 /*
439 * Don't refill the ring yet.
440 *
441 * First, the elements popped here are still in use - it is not
442 * safe to overwrite them until the matching call to
443 * mpdu_desc_list_next. Second, for efficiency it is preferable to
444 * refill the rx ring with 1 PPDU's worth of rx buffers (something
445 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
446 * (something like 3 buffers). Consequently, we'll rely on the txrx
447 * SW to tell us when it is done pulling all the PPDU's rx buffers
448 * out of the rx ring, and then refill it just once.
449 */
450
451 return msdu_chaining;
452}
453
Michal Kazior6e712d42013-09-24 10:18:36 +0200454static void ath10k_htt_rx_replenish_task(unsigned long ptr)
455{
456 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Kalle Valoaf762c02014-09-14 12:50:17 +0300457
Michal Kazior6e712d42013-09-24 10:18:36 +0200458 ath10k_htt_rx_msdu_buff_replenish(htt);
459}
460
Michal Kazior95bf21f2014-05-16 17:15:39 +0300461int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300462{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200463 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300464 dma_addr_t paddr;
465 void *vaddr;
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300466 size_t size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300467 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
468
Michal Kazior51fc7d72014-10-23 17:04:24 +0300469 htt->rx_confused = false;
470
Kalle Valo5e3dd152013-06-12 20:52:10 +0300471 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
472 if (!is_power_of_2(htt->rx_ring.size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200473 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300474 return -EINVAL;
475 }
476
477 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
478
479 /*
480 * Set the initial value for the level to which the rx ring
481 * should be filled, based on the max throughput and the
482 * worst likely latency for the host to fill the rx ring
483 * with new buffers. In theory, this fill level can be
484 * dynamically adjusted from the initial value set here, to
485 * reflect the actual host latency rather than a
486 * conservative assumption about the host latency.
487 */
488 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
489
490 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300491 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300492 GFP_KERNEL);
493 if (!htt->rx_ring.netbufs_ring)
494 goto err_netbuf;
495
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300496 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
497
498 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300499 if (!vaddr)
500 goto err_dma_ring;
501
502 htt->rx_ring.paddrs_ring = vaddr;
503 htt->rx_ring.base_paddr = paddr;
504
505 vaddr = dma_alloc_coherent(htt->ar->dev,
506 sizeof(*htt->rx_ring.alloc_idx.vaddr),
507 &paddr, GFP_DMA);
508 if (!vaddr)
509 goto err_dma_idx;
510
511 htt->rx_ring.alloc_idx.vaddr = vaddr;
512 htt->rx_ring.alloc_idx.paddr = paddr;
513 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
514 *htt->rx_ring.alloc_idx.vaddr = 0;
515
516 /* Initialize the Rx refill retry timer */
517 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
518
519 spin_lock_init(&htt->rx_ring.lock);
520
521 htt->rx_ring.fill_cnt = 0;
522 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
523 goto err_fill_ring;
524
Michal Kazior6e712d42013-09-24 10:18:36 +0200525 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
526 (unsigned long)htt);
527
Michal Kazior6c5151a2014-02-27 18:50:04 +0200528 skb_queue_head_init(&htt->tx_compl_q);
529 skb_queue_head_init(&htt->rx_compl_q);
530
531 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
532 (unsigned long)htt);
533
Michal Kazior7aa7a722014-08-25 12:09:38 +0200534 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300535 htt->rx_ring.size, htt->rx_ring.fill_level);
536 return 0;
537
538err_fill_ring:
539 ath10k_htt_rx_ring_free(htt);
540 dma_free_coherent(htt->ar->dev,
541 sizeof(*htt->rx_ring.alloc_idx.vaddr),
542 htt->rx_ring.alloc_idx.vaddr,
543 htt->rx_ring.alloc_idx.paddr);
544err_dma_idx:
545 dma_free_coherent(htt->ar->dev,
546 (htt->rx_ring.size *
547 sizeof(htt->rx_ring.paddrs_ring)),
548 htt->rx_ring.paddrs_ring,
549 htt->rx_ring.base_paddr);
550err_dma_ring:
551 kfree(htt->rx_ring.netbufs_ring);
552err_netbuf:
553 return -ENOMEM;
554}
555
Michal Kazior7aa7a722014-08-25 12:09:38 +0200556static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
557 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300558{
559 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300560 case HTT_RX_MPDU_ENCRYPT_NONE:
561 return 0;
Michal Kazior890d3b22014-10-23 17:04:22 +0300562 case HTT_RX_MPDU_ENCRYPT_WEP40:
563 case HTT_RX_MPDU_ENCRYPT_WEP104:
564 return IEEE80211_WEP_IV_LEN;
565 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
566 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
567 return IEEE80211_TKIP_IV_LEN;
568 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
569 return IEEE80211_CCMP_HDR_LEN;
570 case HTT_RX_MPDU_ENCRYPT_WEP128:
571 case HTT_RX_MPDU_ENCRYPT_WAPI:
572 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300573 }
574
Michal Kazior890d3b22014-10-23 17:04:22 +0300575 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300576 return 0;
577}
578
Michal Kazior890d3b22014-10-23 17:04:22 +0300579#define MICHAEL_MIC_LEN 8
580
Michal Kazior7aa7a722014-08-25 12:09:38 +0200581static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
582 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300583{
584 switch (type) {
585 case HTT_RX_MPDU_ENCRYPT_NONE:
Michal Kazior890d3b22014-10-23 17:04:22 +0300586 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300587 case HTT_RX_MPDU_ENCRYPT_WEP40:
588 case HTT_RX_MPDU_ENCRYPT_WEP104:
Michal Kazior890d3b22014-10-23 17:04:22 +0300589 return IEEE80211_WEP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300590 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
591 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
Michal Kazior890d3b22014-10-23 17:04:22 +0300592 return IEEE80211_TKIP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300593 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
Michal Kazior890d3b22014-10-23 17:04:22 +0300594 return IEEE80211_CCMP_MIC_LEN;
595 case HTT_RX_MPDU_ENCRYPT_WEP128:
596 case HTT_RX_MPDU_ENCRYPT_WAPI:
597 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300598 }
599
Michal Kazior890d3b22014-10-23 17:04:22 +0300600 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300601 return 0;
602}
603
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300604struct rfc1042_hdr {
605 u8 llc_dsap;
606 u8 llc_ssap;
607 u8 llc_ctrl;
608 u8 snap_oui[3];
609 __be16 snap_type;
610} __packed;
611
612struct amsdu_subframe_hdr {
613 u8 dst[ETH_ALEN];
614 u8 src[ETH_ALEN];
615 __be16 len;
616} __packed;
617
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100618static const u8 rx_legacy_rate_idx[] = {
619 3, /* 0x00 - 11Mbps */
620 2, /* 0x01 - 5.5Mbps */
621 1, /* 0x02 - 2Mbps */
622 0, /* 0x03 - 1Mbps */
623 3, /* 0x04 - 11Mbps */
624 2, /* 0x05 - 5.5Mbps */
625 1, /* 0x06 - 2Mbps */
626 0, /* 0x07 - 1Mbps */
627 10, /* 0x08 - 48Mbps */
628 8, /* 0x09 - 24Mbps */
629 6, /* 0x0A - 12Mbps */
630 4, /* 0x0B - 6Mbps */
631 11, /* 0x0C - 54Mbps */
632 9, /* 0x0D - 36Mbps */
633 7, /* 0x0E - 18Mbps */
634 5, /* 0x0F - 9Mbps */
635};
636
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100637static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100638 enum ieee80211_band band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100639 u8 info0, u32 info1, u32 info2,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100640 struct ieee80211_rx_status *status)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100641{
642 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100643 u8 preamble = 0;
644
645 /* Check if valid fields */
646 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
647 return;
648
649 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
650
651 switch (preamble) {
652 case HTT_RX_LEGACY:
653 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
654 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
655 rate_idx = 0;
656
657 if (rate < 0x08 || rate > 0x0F)
658 break;
659
660 switch (band) {
661 case IEEE80211_BAND_2GHZ:
662 if (cck)
663 rate &= ~BIT(3);
664 rate_idx = rx_legacy_rate_idx[rate];
665 break;
666 case IEEE80211_BAND_5GHZ:
667 rate_idx = rx_legacy_rate_idx[rate];
668 /* We are using same rate table registering
669 HW - ath10k_rates[]. In case of 5GHz skip
670 CCK rates, so -4 here */
671 rate_idx -= 4;
672 break;
673 default:
674 break;
675 }
676
677 status->rate_idx = rate_idx;
678 break;
679 case HTT_RX_HT:
680 case HTT_RX_HT_WITH_TXBF:
681 /* HT-SIG - Table 20-11 in info1 and info2 */
682 mcs = info1 & 0x1F;
683 nss = mcs >> 3;
684 bw = (info1 >> 7) & 1;
685 sgi = (info2 >> 7) & 1;
686
687 status->rate_idx = mcs;
688 status->flag |= RX_FLAG_HT;
689 if (sgi)
690 status->flag |= RX_FLAG_SHORT_GI;
691 if (bw)
692 status->flag |= RX_FLAG_40MHZ;
693 break;
694 case HTT_RX_VHT:
695 case HTT_RX_VHT_WITH_TXBF:
696 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
697 TODO check this */
698 mcs = (info2 >> 4) & 0x0F;
699 nss = ((info1 >> 10) & 0x07) + 1;
700 bw = info1 & 3;
701 sgi = info2 & 1;
702
703 status->rate_idx = mcs;
704 status->vht_nss = nss;
705
706 if (sgi)
707 status->flag |= RX_FLAG_SHORT_GI;
708
709 switch (bw) {
710 /* 20MHZ */
711 case 0:
712 break;
713 /* 40MHZ */
714 case 1:
715 status->flag |= RX_FLAG_40MHZ;
716 break;
717 /* 80MHZ */
718 case 2:
719 status->vht_flag |= RX_VHT_FLAG_80MHZ;
720 }
721
722 status->flag |= RX_FLAG_VHT;
723 break;
724 default:
725 break;
726 }
727}
728
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100729static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
730 struct ieee80211_rx_status *status)
731{
732 struct ieee80211_channel *ch;
733
734 spin_lock_bh(&ar->data_lock);
735 ch = ar->scan_channel;
736 if (!ch)
737 ch = ar->rx_channel;
738 spin_unlock_bh(&ar->data_lock);
739
740 if (!ch)
741 return false;
742
743 status->band = ch->band;
744 status->freq = ch->center_freq;
745
746 return true;
747}
748
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300749static const char * const tid_to_ac[] = {
750 "BE",
751 "BK",
752 "BK",
753 "BE",
754 "VI",
755 "VI",
756 "VO",
757 "VO",
758};
759
760static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
761{
762 u8 *qc;
763 int tid;
764
765 if (!ieee80211_is_data_qos(hdr->frame_control))
766 return "";
767
768 qc = ieee80211_get_qos_ctl(hdr);
769 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
770 if (tid < 8)
771 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
772 else
773 snprintf(out, size, "tid %d", tid);
774
775 return out;
776}
777
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100778static void ath10k_process_rx(struct ath10k *ar,
779 struct ieee80211_rx_status *rx_status,
780 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100781{
782 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300783 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
784 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100785
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100786 status = IEEE80211_SKB_RXCB(skb);
787 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100788
Michal Kazior7aa7a722014-08-25 12:09:38 +0200789 ath10k_dbg(ar, ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300790 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100791 skb,
792 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300793 ieee80211_get_SA(hdr),
794 ath10k_get_tid(hdr, tid, sizeof(tid)),
795 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
796 "mcast" : "ucast",
797 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100798 status->flag == 0 ? "legacy" : "",
799 status->flag & RX_FLAG_HT ? "ht" : "",
800 status->flag & RX_FLAG_VHT ? "vht" : "",
801 status->flag & RX_FLAG_40MHZ ? "40" : "",
802 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
803 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
804 status->rate_idx,
805 status->vht_nss,
806 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100807 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100808 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300809 !!(status->flag & RX_FLAG_MMIC_ERROR),
810 !!(status->flag & RX_FLAG_AMSDU_MORE));
Michal Kazior7aa7a722014-08-25 12:09:38 +0200811 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100812 skb->data, skb->len);
Rajkumar Manoharan5ce8e7f2014-11-05 19:14:31 +0530813 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
814 trace_ath10k_rx_payload(ar, skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100815
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100816 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100817}
818
Michal Kaziord960c362014-02-25 09:29:57 +0200819static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
820{
821 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
822 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
823}
824
Michal Kazior581c25f2014-11-18 09:24:48 +0200825static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
826 struct sk_buff *msdu,
827 struct ieee80211_rx_status *status,
828 enum htt_rx_mpdu_encrypt_type enctype,
829 bool is_decrypted)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300830{
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300831 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +0200832 struct htt_rx_desc *rxd;
833 size_t hdr_len;
834 size_t crypto_len;
835 bool is_first;
836 bool is_last;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300837
Michal Kazior581c25f2014-11-18 09:24:48 +0200838 rxd = (void *)msdu->data - sizeof(*rxd);
839 is_first = !!(rxd->msdu_end.info0 &
840 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
841 is_last = !!(rxd->msdu_end.info0 &
842 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200843
Michal Kazior581c25f2014-11-18 09:24:48 +0200844 /* Delivered decapped frame:
845 * [802.11 header]
846 * [crypto param] <-- can be trimmed if !fcs_err &&
847 * !decrypt_err && !peer_idx_invalid
848 * [amsdu header] <-- only if A-MSDU
849 * [rfc1042/llc]
850 * [payload]
851 * [FCS] <-- at end, needs to be trimmed
852 */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300853
Michal Kazior581c25f2014-11-18 09:24:48 +0200854 /* This probably shouldn't happen but warn just in case */
855 if (unlikely(WARN_ON_ONCE(!is_first)))
856 return;
857
858 /* This probably shouldn't happen but warn just in case */
859 if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
860 return;
861
862 skb_trim(msdu, msdu->len - FCS_LEN);
863
864 /* In most cases this will be true for sniffed frames. It makes sense
865 * to deliver them as-is without stripping the crypto param. This would
866 * also make sense for software based decryption (which is not
867 * implemented in ath10k).
868 *
869 * If there's no error then the frame is decrypted. At least that is
870 * the case for frames that come in via fragmented rx indication.
871 */
872 if (!is_decrypted)
873 return;
874
875 /* The payload is decrypted so strip crypto params. Start from tail
876 * since hdr is used to compute some stuff.
877 */
878
879 hdr = (void *)msdu->data;
880
881 /* Tail */
882 skb_trim(msdu, msdu->len - ath10k_htt_rx_crypto_tail_len(ar, enctype));
883
884 /* MMIC */
885 if (!ieee80211_has_morefrags(hdr->frame_control) &&
886 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
887 skb_trim(msdu, msdu->len - 8);
888
889 /* Head */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300890 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +0200891 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300892
Michal Kazior581c25f2014-11-18 09:24:48 +0200893 memmove((void *)msdu->data + crypto_len,
894 (void *)msdu->data, hdr_len);
895 skb_pull(msdu, crypto_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300896}
897
Michal Kazior581c25f2014-11-18 09:24:48 +0200898static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
899 struct sk_buff *msdu,
900 struct ieee80211_rx_status *status,
901 const u8 first_hdr[64])
Kalle Valo5e3dd152013-06-12 20:52:10 +0300902{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300903 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +0200904 size_t hdr_len;
905 u8 da[ETH_ALEN];
906 u8 sa[ETH_ALEN];
Kalle Valo5e3dd152013-06-12 20:52:10 +0300907
Michal Kazior581c25f2014-11-18 09:24:48 +0200908 /* Delivered decapped frame:
909 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
910 * [rfc1042/llc]
911 *
912 * Note: The nwifi header doesn't have QoS Control and is
913 * (always?) a 3addr frame.
914 *
915 * Note2: There's no A-MSDU subframe header. Even if it's part
916 * of an A-MSDU.
917 */
918
919 /* pull decapped header and copy SA & DA */
920 hdr = (struct ieee80211_hdr *)msdu->data;
921 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
922 ether_addr_copy(da, ieee80211_get_DA(hdr));
923 ether_addr_copy(sa, ieee80211_get_SA(hdr));
924 skb_pull(msdu, hdr_len);
925
926 /* push original 802.11 header */
927 hdr = (struct ieee80211_hdr *)first_hdr;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300928 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +0200929 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300930
Michal Kazior581c25f2014-11-18 09:24:48 +0200931 /* original 802.11 header has a different DA and in
932 * case of 4addr it may also have different SA
933 */
934 hdr = (struct ieee80211_hdr *)msdu->data;
935 ether_addr_copy(ieee80211_get_DA(hdr), da);
936 ether_addr_copy(ieee80211_get_SA(hdr), sa);
937}
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300938
Michal Kazior581c25f2014-11-18 09:24:48 +0200939static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
940 struct sk_buff *msdu,
941 enum htt_rx_mpdu_encrypt_type enctype)
942{
943 struct ieee80211_hdr *hdr;
944 struct htt_rx_desc *rxd;
945 size_t hdr_len, crypto_len;
946 void *rfc1042;
947 bool is_first, is_last, is_amsdu;
Michal Kazior784f69d2013-09-26 10:12:23 +0300948
Michal Kazior581c25f2014-11-18 09:24:48 +0200949 rxd = (void *)msdu->data - sizeof(*rxd);
950 hdr = (void *)rxd->rx_hdr_status;
951
952 is_first = !!(rxd->msdu_end.info0 &
953 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
954 is_last = !!(rxd->msdu_end.info0 &
955 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
956 is_amsdu = !(is_first && is_last);
957
958 rfc1042 = hdr;
959
960 if (is_first) {
Michal Kazior784f69d2013-09-26 10:12:23 +0300961 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +0200962 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300963
Michal Kazior581c25f2014-11-18 09:24:48 +0200964 rfc1042 += round_up(hdr_len, 4) +
965 round_up(crypto_len, 4);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300966 }
967
Michal Kazior581c25f2014-11-18 09:24:48 +0200968 if (is_amsdu)
969 rfc1042 += sizeof(struct amsdu_subframe_hdr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300970
Michal Kazior581c25f2014-11-18 09:24:48 +0200971 return rfc1042;
972}
973
974static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
975 struct sk_buff *msdu,
976 struct ieee80211_rx_status *status,
977 const u8 first_hdr[64],
978 enum htt_rx_mpdu_encrypt_type enctype)
979{
980 struct ieee80211_hdr *hdr;
981 struct ethhdr *eth;
982 size_t hdr_len;
983 void *rfc1042;
984 u8 da[ETH_ALEN];
985 u8 sa[ETH_ALEN];
986
987 /* Delivered decapped frame:
988 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
989 * [payload]
990 */
991
992 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
993 if (WARN_ON_ONCE(!rfc1042))
994 return;
995
996 /* pull decapped header and copy SA & DA */
997 eth = (struct ethhdr *)msdu->data;
998 ether_addr_copy(da, eth->h_dest);
999 ether_addr_copy(sa, eth->h_source);
1000 skb_pull(msdu, sizeof(struct ethhdr));
1001
1002 /* push rfc1042/llc/snap */
1003 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
1004 sizeof(struct rfc1042_hdr));
1005
1006 /* push original 802.11 header */
1007 hdr = (struct ieee80211_hdr *)first_hdr;
1008 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1009 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1010
1011 /* original 802.11 header has a different DA and in
1012 * case of 4addr it may also have different SA
1013 */
1014 hdr = (struct ieee80211_hdr *)msdu->data;
1015 ether_addr_copy(ieee80211_get_DA(hdr), da);
1016 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1017}
1018
1019static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1020 struct sk_buff *msdu,
1021 struct ieee80211_rx_status *status,
1022 const u8 first_hdr[64])
1023{
1024 struct ieee80211_hdr *hdr;
1025 size_t hdr_len;
1026
1027 /* Delivered decapped frame:
1028 * [amsdu header] <-- replaced with 802.11 hdr
1029 * [rfc1042/llc]
1030 * [payload]
1031 */
1032
1033 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
1034
1035 hdr = (struct ieee80211_hdr *)first_hdr;
1036 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1037 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1038}
1039
1040static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1041 struct sk_buff *msdu,
1042 struct ieee80211_rx_status *status,
1043 u8 first_hdr[64],
1044 enum htt_rx_mpdu_encrypt_type enctype,
1045 bool is_decrypted)
1046{
1047 struct htt_rx_desc *rxd;
1048 enum rx_msdu_decap_format decap;
1049 struct ieee80211_hdr *hdr;
1050
1051 /* First msdu's decapped header:
1052 * [802.11 header] <-- padded to 4 bytes long
1053 * [crypto param] <-- padded to 4 bytes long
1054 * [amsdu header] <-- only if A-MSDU
1055 * [rfc1042/llc]
1056 *
1057 * Other (2nd, 3rd, ..) msdu's decapped header:
1058 * [amsdu header] <-- only if A-MSDU
1059 * [rfc1042/llc]
1060 */
1061
1062 rxd = (void *)msdu->data - sizeof(*rxd);
1063 hdr = (void *)rxd->rx_hdr_status;
1064 decap = MS(__le32_to_cpu(rxd->msdu_start.info1),
1065 RX_MSDU_START_INFO1_DECAP_FORMAT);
1066
1067 switch (decap) {
1068 case RX_MSDU_DECAP_RAW:
1069 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1070 is_decrypted);
1071 break;
1072 case RX_MSDU_DECAP_NATIVE_WIFI:
1073 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
1074 break;
1075 case RX_MSDU_DECAP_ETHERNET2_DIX:
1076 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1077 break;
1078 case RX_MSDU_DECAP_8023_SNAP_LLC:
1079 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
1080 break;
1081 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001082}
1083
Michal Kazior605f81a2013-07-31 10:47:56 +02001084static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1085{
1086 struct htt_rx_desc *rxd;
1087 u32 flags, info;
1088 bool is_ip4, is_ip6;
1089 bool is_tcp, is_udp;
1090 bool ip_csum_ok, tcpudp_csum_ok;
1091
1092 rxd = (void *)skb->data - sizeof(*rxd);
1093 flags = __le32_to_cpu(rxd->attention.flags);
1094 info = __le32_to_cpu(rxd->msdu_start.info1);
1095
1096 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1097 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1098 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1099 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1100 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1101 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1102
1103 if (!is_ip4 && !is_ip6)
1104 return CHECKSUM_NONE;
1105 if (!is_tcp && !is_udp)
1106 return CHECKSUM_NONE;
1107 if (!ip_csum_ok)
1108 return CHECKSUM_NONE;
1109 if (!tcpudp_csum_ok)
1110 return CHECKSUM_NONE;
1111
1112 return CHECKSUM_UNNECESSARY;
1113}
1114
Michal Kazior581c25f2014-11-18 09:24:48 +02001115static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
1116{
1117 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
1118}
1119
1120static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1121 struct sk_buff_head *amsdu,
1122 struct ieee80211_rx_status *status)
1123{
1124 struct sk_buff *first;
1125 struct sk_buff *last;
1126 struct sk_buff *msdu;
1127 struct htt_rx_desc *rxd;
1128 struct ieee80211_hdr *hdr;
1129 enum htt_rx_mpdu_encrypt_type enctype;
1130 u8 first_hdr[64];
1131 u8 *qos;
1132 size_t hdr_len;
1133 bool has_fcs_err;
1134 bool has_crypto_err;
1135 bool has_tkip_err;
1136 bool has_peer_idx_invalid;
1137 bool is_decrypted;
1138 u32 attention;
1139
1140 if (skb_queue_empty(amsdu))
1141 return;
1142
1143 first = skb_peek(amsdu);
1144 rxd = (void *)first->data - sizeof(*rxd);
1145
1146 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1147 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1148
1149 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1150 * decapped header. It'll be used for undecapping of each MSDU.
1151 */
1152 hdr = (void *)rxd->rx_hdr_status;
1153 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1154 memcpy(first_hdr, hdr, hdr_len);
1155
1156 /* Each A-MSDU subframe will use the original header as the base and be
1157 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1158 */
1159 hdr = (void *)first_hdr;
1160 qos = ieee80211_get_qos_ctl(hdr);
1161 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1162
1163 /* Some attention flags are valid only in the last MSDU. */
1164 last = skb_peek_tail(amsdu);
1165 rxd = (void *)last->data - sizeof(*rxd);
1166 attention = __le32_to_cpu(rxd->attention.flags);
1167
1168 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1169 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1170 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1171 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
1172
1173 /* Note: If hardware captures an encrypted frame that it can't decrypt,
1174 * e.g. due to fcs error, missing peer or invalid key data it will
1175 * report the frame as raw.
1176 */
1177 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
1178 !has_fcs_err &&
1179 !has_crypto_err &&
1180 !has_peer_idx_invalid);
1181
1182 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
1183 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
1184 RX_FLAG_MMIC_ERROR |
1185 RX_FLAG_DECRYPTED |
1186 RX_FLAG_IV_STRIPPED |
1187 RX_FLAG_MMIC_STRIPPED);
1188
1189 if (has_fcs_err)
1190 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1191
1192 if (has_tkip_err)
1193 status->flag |= RX_FLAG_MMIC_ERROR;
1194
1195 if (is_decrypted)
1196 status->flag |= RX_FLAG_DECRYPTED |
1197 RX_FLAG_IV_STRIPPED |
1198 RX_FLAG_MMIC_STRIPPED;
1199
1200 skb_queue_walk(amsdu, msdu) {
1201 ath10k_htt_rx_h_csum_offload(msdu);
1202 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
1203 is_decrypted);
1204
1205 /* Undecapping involves copying the original 802.11 header back
1206 * to sk_buff. If frame is protected and hardware has decrypted
1207 * it then remove the protected bit.
1208 */
1209 if (!is_decrypted)
1210 continue;
1211
1212 hdr = (void *)msdu->data;
1213 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1214 }
1215}
1216
1217static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
1218 struct sk_buff_head *amsdu,
1219 struct ieee80211_rx_status *status)
1220{
1221 struct sk_buff *msdu;
1222
1223 while ((msdu = __skb_dequeue(amsdu))) {
1224 /* Setup per-MSDU flags */
1225 if (skb_queue_empty(amsdu))
1226 status->flag &= ~RX_FLAG_AMSDU_MORE;
1227 else
1228 status->flag |= RX_FLAG_AMSDU_MORE;
1229
1230 ath10k_process_rx(ar, status, msdu);
1231 }
1232}
1233
Michal Kazior9aa505d2014-11-18 09:24:47 +02001234static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
Ben Greearbfa35362014-03-03 14:07:09 -08001235{
Michal Kazior9aa505d2014-11-18 09:24:47 +02001236 struct sk_buff *skb, *first;
Ben Greearbfa35362014-03-03 14:07:09 -08001237 int space;
1238 int total_len = 0;
1239
1240 /* TODO: Might could optimize this by using
1241 * skb_try_coalesce or similar method to
1242 * decrease copying, or maybe get mac80211 to
1243 * provide a way to just receive a list of
1244 * skb?
1245 */
1246
Michal Kazior9aa505d2014-11-18 09:24:47 +02001247 first = __skb_dequeue(amsdu);
Ben Greearbfa35362014-03-03 14:07:09 -08001248
1249 /* Allocate total length all at once. */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001250 skb_queue_walk(amsdu, skb)
1251 total_len += skb->len;
Ben Greearbfa35362014-03-03 14:07:09 -08001252
Michal Kazior9aa505d2014-11-18 09:24:47 +02001253 space = total_len - skb_tailroom(first);
Ben Greearbfa35362014-03-03 14:07:09 -08001254 if ((space > 0) &&
Michal Kazior9aa505d2014-11-18 09:24:47 +02001255 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
Ben Greearbfa35362014-03-03 14:07:09 -08001256 /* TODO: bump some rx-oom error stat */
1257 /* put it back together so we can free the
1258 * whole list at once.
1259 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001260 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001261 return -1;
1262 }
1263
1264 /* Walk list again, copying contents into
1265 * msdu_head
1266 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001267 while ((skb = __skb_dequeue(amsdu))) {
1268 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
1269 skb->len);
1270 dev_kfree_skb_any(skb);
Ben Greearbfa35362014-03-03 14:07:09 -08001271 }
1272
Michal Kazior9aa505d2014-11-18 09:24:47 +02001273 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001274 return 0;
1275}
1276
Michal Kazior581c25f2014-11-18 09:24:48 +02001277static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
1278 struct sk_buff_head *amsdu,
1279 bool chained)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001280{
Michal Kazior581c25f2014-11-18 09:24:48 +02001281 struct sk_buff *first;
1282 struct htt_rx_desc *rxd;
1283 enum rx_msdu_decap_format decap;
Michal Kazior7aa7a722014-08-25 12:09:38 +02001284
Michal Kazior581c25f2014-11-18 09:24:48 +02001285 first = skb_peek(amsdu);
1286 rxd = (void *)first->data - sizeof(*rxd);
1287 decap = MS(__le32_to_cpu(rxd->msdu_start.info1),
1288 RX_MSDU_START_INFO1_DECAP_FORMAT);
1289
1290 if (!chained)
1291 return;
1292
1293 /* FIXME: Current unchaining logic can only handle simple case of raw
1294 * msdu chaining. If decapping is other than raw the chaining may be
1295 * more complex and this isn't handled by the current code. Don't even
1296 * try re-constructing such frames - it'll be pretty much garbage.
1297 */
1298 if (decap != RX_MSDU_DECAP_RAW ||
1299 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
1300 __skb_queue_purge(amsdu);
1301 return;
1302 }
1303
1304 ath10k_unchain_msdu(amsdu);
1305}
1306
1307static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
1308 struct sk_buff_head *amsdu,
1309 struct ieee80211_rx_status *rx_status)
1310{
1311 struct sk_buff *msdu;
1312 struct htt_rx_desc *rxd;
1313
1314 msdu = skb_peek(amsdu);
1315 rxd = (void *)msdu->data - sizeof(*rxd);
1316
1317 /* FIXME: It might be a good idea to do some fuzzy-testing to drop
1318 * invalid/dangerous frames.
1319 */
1320
1321 if (!rx_status->freq) {
1322 ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001323 return false;
1324 }
1325
Michal Kazior581c25f2014-11-18 09:24:48 +02001326 /* Management frames are handled via WMI events. The pros of such
1327 * approach is that channel is explicitly provided in WMI events
1328 * whereas HTT doesn't provide channel information for Rxed frames.
1329 */
1330 if (rxd->attention.flags &
1331 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001332 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001333 return false;
1334 }
1335
Michal Kazior581c25f2014-11-18 09:24:48 +02001336 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1337 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001338 return false;
1339 }
1340
1341 return true;
1342}
1343
Michal Kazior581c25f2014-11-18 09:24:48 +02001344static void ath10k_htt_rx_h_filter(struct ath10k *ar,
1345 struct sk_buff_head *amsdu,
1346 struct ieee80211_rx_status *rx_status)
1347{
1348 if (skb_queue_empty(amsdu))
1349 return;
1350
1351 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
1352 return;
1353
1354 __skb_queue_purge(amsdu);
1355}
1356
Kalle Valo5e3dd152013-06-12 20:52:10 +03001357static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1358 struct htt_rx_indication *rx)
1359{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001360 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001361 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001362 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001363 struct sk_buff_head amsdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001364 int num_mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001365 u32 attention;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001366 int fw_desc_len;
1367 u8 *fw_desc;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001368 bool channel_set;
Michal Kaziord5406902014-11-18 09:24:47 +02001369 int i, ret, mpdu_count = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001370
Michal Kazior45967082014-02-27 18:50:05 +02001371 lockdep_assert_held(&htt->rx_ring.lock);
1372
Michal Kaziore0bd7512014-11-18 09:24:48 +02001373 if (htt->rx_confused)
1374 return;
1375
Kalle Valo5e3dd152013-06-12 20:52:10 +03001376 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1377 fw_desc = (u8 *)&rx->fw_desc;
1378
1379 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1380 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1381 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1382
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001383 /* Fill this once, while this is per-ppdu */
Janusz Dziedzic22891882014-03-24 21:24:58 +01001384 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
1385 memset(rx_status, 0, sizeof(*rx_status));
1386 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1387 rx->ppdu.combined_rssi;
1388 }
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001389
1390 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
1391 /* TSF available only in 32-bit */
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001392 rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
1393 rx_status->flag |= RX_FLAG_MACTIME_END;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001394 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001395
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001396 channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
Janusz Dziedzic36653f02014-03-24 21:23:18 +01001397
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001398 if (channel_set) {
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001399 ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001400 rx->ppdu.info0,
1401 __le32_to_cpu(rx->ppdu.info1),
1402 __le32_to_cpu(rx->ppdu.info2),
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001403 rx_status);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001404 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001405
Michal Kazior7aa7a722014-08-25 12:09:38 +02001406 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001407 rx, sizeof(*rx) +
1408 (sizeof(struct htt_rx_indication_mpdu_range) *
1409 num_mpdu_ranges));
1410
Michal Kaziord5406902014-11-18 09:24:47 +02001411 for (i = 0; i < num_mpdu_ranges; i++)
1412 mpdu_count += mpdu_ranges[i].mpdu_count;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001413
Michal Kaziord5406902014-11-18 09:24:47 +02001414 while (mpdu_count--) {
1415 attention = 0;
1416 __skb_queue_head_init(&amsdu);
1417 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc,
1418 &fw_desc_len, &amsdu,
1419 &attention);
1420 if (ret < 0) {
Michal Kaziore0bd7512014-11-18 09:24:48 +02001421 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
Michal Kaziord5406902014-11-18 09:24:47 +02001422 __skb_queue_purge(&amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +02001423 /* FIXME: It's probably a good idea to reboot the
1424 * device instead of leaving it inoperable.
1425 */
1426 htt->rx_confused = true;
1427 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001428 }
Michal Kaziord5406902014-11-18 09:24:47 +02001429
Michal Kazior581c25f2014-11-18 09:24:48 +02001430 ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
1431 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1432 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1433 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001434 }
1435
Michal Kazior6e712d42013-09-24 10:18:36 +02001436 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001437}
1438
1439static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
Kalle Valo5b07e072014-09-14 12:50:06 +03001440 struct htt_rx_fragment_indication *frag)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001441{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001442 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001443 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001444 struct sk_buff_head amsdu;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001445 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001446 u8 *fw_desc;
Michal Kazior581c25f2014-11-18 09:24:48 +02001447 int fw_desc_len;
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001448 u32 attention = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001449
1450 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1451 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1452
Michal Kazior9aa505d2014-11-18 09:24:47 +02001453 __skb_queue_head_init(&amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001454
1455 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001456 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Michal Kazior9aa505d2014-11-18 09:24:47 +02001457 &amsdu, &attention);
Michal Kazior45967082014-02-27 18:50:05 +02001458 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001459
Michal Kazior686687c2014-10-23 17:04:24 +03001460 tasklet_schedule(&htt->rx_replenish_task);
1461
Michal Kazior7aa7a722014-08-25 12:09:38 +02001462 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001463
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001464 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001465 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001466 ret);
Michal Kazior9aa505d2014-11-18 09:24:47 +02001467 __skb_queue_purge(&amsdu);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001468 return;
1469 }
1470
Michal Kazior9aa505d2014-11-18 09:24:47 +02001471 if (skb_queue_len(&amsdu) != 1) {
1472 ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n");
1473 __skb_queue_purge(&amsdu);
1474 return;
1475 }
1476
Kalle Valo5e3dd152013-06-12 20:52:10 +03001477 /* FIXME: implement signal strength */
Ben Greear4b81d172014-05-26 12:46:04 +03001478 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001479
Michal Kazior581c25f2014-11-18 09:24:48 +02001480 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1481 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1482 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001483
Kalle Valo5e3dd152013-06-12 20:52:10 +03001484 if (fw_desc_len > 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001485 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001486 "expecting more fragmented rx in one indication %d\n",
1487 fw_desc_len);
1488 }
1489}
1490
Michal Kazior6c5151a2014-02-27 18:50:04 +02001491static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1492 struct sk_buff *skb)
1493{
1494 struct ath10k_htt *htt = &ar->htt;
1495 struct htt_resp *resp = (struct htt_resp *)skb->data;
1496 struct htt_tx_done tx_done = {};
1497 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1498 __le16 msdu_id;
1499 int i;
1500
Michal Kazior45967082014-02-27 18:50:05 +02001501 lockdep_assert_held(&htt->tx_lock);
1502
Michal Kazior6c5151a2014-02-27 18:50:04 +02001503 switch (status) {
1504 case HTT_DATA_TX_STATUS_NO_ACK:
1505 tx_done.no_ack = true;
1506 break;
1507 case HTT_DATA_TX_STATUS_OK:
1508 break;
1509 case HTT_DATA_TX_STATUS_DISCARD:
1510 case HTT_DATA_TX_STATUS_POSTPONE:
1511 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1512 tx_done.discard = true;
1513 break;
1514 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001515 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001516 tx_done.discard = true;
1517 break;
1518 }
1519
Michal Kazior7aa7a722014-08-25 12:09:38 +02001520 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
Michal Kazior6c5151a2014-02-27 18:50:04 +02001521 resp->data_tx_completion.num_msdus);
1522
1523 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1524 msdu_id = resp->data_tx_completion.msdus[i];
1525 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1526 ath10k_txrx_tx_unref(htt, &tx_done);
1527 }
1528}
1529
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001530static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1531{
1532 struct htt_rx_addba *ev = &resp->rx_addba;
1533 struct ath10k_peer *peer;
1534 struct ath10k_vif *arvif;
1535 u16 info0, tid, peer_id;
1536
1537 info0 = __le16_to_cpu(ev->info0);
1538 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1539 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1540
Michal Kazior7aa7a722014-08-25 12:09:38 +02001541 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001542 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1543 tid, peer_id, ev->window_size);
1544
1545 spin_lock_bh(&ar->data_lock);
1546 peer = ath10k_peer_find_by_id(ar, peer_id);
1547 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001548 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001549 peer_id);
1550 spin_unlock_bh(&ar->data_lock);
1551 return;
1552 }
1553
1554 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1555 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001556 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001557 peer->vdev_id);
1558 spin_unlock_bh(&ar->data_lock);
1559 return;
1560 }
1561
Michal Kazior7aa7a722014-08-25 12:09:38 +02001562 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001563 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1564 peer->addr, tid, ev->window_size);
1565
1566 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1567 spin_unlock_bh(&ar->data_lock);
1568}
1569
1570static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1571{
1572 struct htt_rx_delba *ev = &resp->rx_delba;
1573 struct ath10k_peer *peer;
1574 struct ath10k_vif *arvif;
1575 u16 info0, tid, peer_id;
1576
1577 info0 = __le16_to_cpu(ev->info0);
1578 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1579 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1580
Michal Kazior7aa7a722014-08-25 12:09:38 +02001581 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001582 "htt rx delba tid %hu peer_id %hu\n",
1583 tid, peer_id);
1584
1585 spin_lock_bh(&ar->data_lock);
1586 peer = ath10k_peer_find_by_id(ar, peer_id);
1587 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001588 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001589 peer_id);
1590 spin_unlock_bh(&ar->data_lock);
1591 return;
1592 }
1593
1594 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1595 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001596 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001597 peer->vdev_id);
1598 spin_unlock_bh(&ar->data_lock);
1599 return;
1600 }
1601
Michal Kazior7aa7a722014-08-25 12:09:38 +02001602 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001603 "htt rx stop rx ba session sta %pM tid %hu\n",
1604 peer->addr, tid);
1605
1606 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1607 spin_unlock_bh(&ar->data_lock);
1608}
1609
Kalle Valo5e3dd152013-06-12 20:52:10 +03001610void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1611{
Michal Kazioredb82362013-07-05 16:15:14 +03001612 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001613 struct htt_resp *resp = (struct htt_resp *)skb->data;
1614
1615 /* confirm alignment */
1616 if (!IS_ALIGNED((unsigned long)skb->data, 4))
Michal Kazior7aa7a722014-08-25 12:09:38 +02001617 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001618
Michal Kazior7aa7a722014-08-25 12:09:38 +02001619 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001620 resp->hdr.msg_type);
1621 switch (resp->hdr.msg_type) {
1622 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1623 htt->target_version_major = resp->ver_resp.major;
1624 htt->target_version_minor = resp->ver_resp.minor;
1625 complete(&htt->target_version_received);
1626 break;
1627 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001628 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001629 spin_lock_bh(&htt->rx_ring.lock);
1630 __skb_queue_tail(&htt->rx_compl_q, skb);
1631 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001632 tasklet_schedule(&htt->txrx_compl_task);
1633 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001634 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1635 struct htt_peer_map_event ev = {
1636 .vdev_id = resp->peer_map.vdev_id,
1637 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1638 };
1639 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1640 ath10k_peer_map_event(htt, &ev);
1641 break;
1642 }
1643 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1644 struct htt_peer_unmap_event ev = {
1645 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1646 };
1647 ath10k_peer_unmap_event(htt, &ev);
1648 break;
1649 }
1650 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1651 struct htt_tx_done tx_done = {};
1652 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1653
1654 tx_done.msdu_id =
1655 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1656
1657 switch (status) {
1658 case HTT_MGMT_TX_STATUS_OK:
1659 break;
1660 case HTT_MGMT_TX_STATUS_RETRY:
1661 tx_done.no_ack = true;
1662 break;
1663 case HTT_MGMT_TX_STATUS_DROP:
1664 tx_done.discard = true;
1665 break;
1666 }
1667
Michal Kazior6c5151a2014-02-27 18:50:04 +02001668 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001669 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001670 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001671 break;
1672 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001673 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1674 spin_lock_bh(&htt->tx_lock);
1675 __skb_queue_tail(&htt->tx_compl_q, skb);
1676 spin_unlock_bh(&htt->tx_lock);
1677 tasklet_schedule(&htt->txrx_compl_task);
1678 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001679 case HTT_T2H_MSG_TYPE_SEC_IND: {
1680 struct ath10k *ar = htt->ar;
1681 struct htt_security_indication *ev = &resp->security_indication;
1682
Michal Kazior7aa7a722014-08-25 12:09:38 +02001683 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001684 "sec ind peer_id %d unicast %d type %d\n",
1685 __le16_to_cpu(ev->peer_id),
1686 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1687 MS(ev->flags, HTT_SECURITY_TYPE));
1688 complete(&ar->install_key_done);
1689 break;
1690 }
1691 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001692 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001693 skb->data, skb->len);
1694 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1695 break;
1696 }
1697 case HTT_T2H_MSG_TYPE_TEST:
1698 /* FIX THIS */
1699 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001700 case HTT_T2H_MSG_TYPE_STATS_CONF:
Michal Kaziord35a6c12014-09-02 11:00:21 +03001701 trace_ath10k_htt_stats(ar, skb->data, skb->len);
Kalle Valoa9bf0502013-09-03 11:43:55 +03001702 break;
1703 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03001704 /* Firmware can return tx frames if it's unable to fully
1705 * process them and suspects host may be able to fix it. ath10k
1706 * sends all tx frames as already inspected so this shouldn't
1707 * happen unless fw has a bug.
1708 */
Michal Kazior7aa7a722014-08-25 12:09:38 +02001709 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
Michal Kazior708b9bd2014-07-21 20:52:59 +03001710 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001711 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001712 ath10k_htt_rx_addba(ar, resp);
1713 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001714 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001715 ath10k_htt_rx_delba(ar, resp);
1716 break;
Rajkumar Manoharanbfdd7932014-10-03 08:02:40 +03001717 case HTT_T2H_MSG_TYPE_PKTLOG: {
1718 struct ath10k_pktlog_hdr *hdr =
1719 (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
1720
1721 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
1722 sizeof(*hdr) +
1723 __le16_to_cpu(hdr->size));
1724 break;
1725 }
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001726 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
1727 /* Ignore this event because mac80211 takes care of Rx
1728 * aggregation reordering.
1729 */
1730 break;
1731 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001732 default:
Michal Kazior2358a542014-10-02 13:32:55 +02001733 ath10k_warn(ar, "htt event (%d) not handled\n",
1734 resp->hdr.msg_type);
Michal Kazior7aa7a722014-08-25 12:09:38 +02001735 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001736 skb->data, skb->len);
1737 break;
1738 };
1739
1740 /* Free the indication buffer */
1741 dev_kfree_skb_any(skb);
1742}
Michal Kazior6c5151a2014-02-27 18:50:04 +02001743
1744static void ath10k_htt_txrx_compl_task(unsigned long ptr)
1745{
1746 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
1747 struct htt_resp *resp;
1748 struct sk_buff *skb;
1749
Michal Kazior45967082014-02-27 18:50:05 +02001750 spin_lock_bh(&htt->tx_lock);
1751 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001752 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
1753 dev_kfree_skb_any(skb);
1754 }
Michal Kazior45967082014-02-27 18:50:05 +02001755 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001756
Michal Kazior45967082014-02-27 18:50:05 +02001757 spin_lock_bh(&htt->rx_ring.lock);
1758 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001759 resp = (struct htt_resp *)skb->data;
1760 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1761 dev_kfree_skb_any(skb);
1762 }
Michal Kazior45967082014-02-27 18:50:05 +02001763 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001764}