Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2002 Andi Kleen, SuSE Labs. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * Thanks to Ben LaHaise for precious feedback. |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 4 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | #include <linux/highmem.h> |
Ingo Molnar | 8192206 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 6 | #include <linux/bootmem.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | #include <linux/module.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 8 | #include <linux/sched.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | #include <linux/slab.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 10 | #include <linux/mm.h> |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 11 | #include <linux/interrupt.h> |
Thomas Gleixner | ee7ae7a | 2008-04-17 17:40:45 +0200 | [diff] [blame] | 12 | #include <linux/seq_file.h> |
| 13 | #include <linux/debugfs.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 14 | |
Thomas Gleixner | 950f9d9 | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 15 | #include <asm/e820.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <asm/processor.h> |
| 17 | #include <asm/tlbflush.h> |
Dave Jones | f8af095 | 2006-01-06 00:12:10 -0800 | [diff] [blame] | 18 | #include <asm/sections.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 19 | #include <asm/uaccess.h> |
| 20 | #include <asm/pgalloc.h> |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 21 | #include <asm/proto.h> |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 22 | #include <asm/pat.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 24 | /* |
| 25 | * The current flushing context - we pass it instead of 5 arguments: |
| 26 | */ |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 27 | struct cpa_data { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 28 | unsigned long *vaddr; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 29 | pgprot_t mask_set; |
| 30 | pgprot_t mask_clr; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 31 | int numpages; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 32 | int flags; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 33 | unsigned long pfn; |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 34 | unsigned force_split : 1; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 35 | int curpage; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 36 | }; |
| 37 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 38 | #define CPA_FLUSHTLB 1 |
| 39 | #define CPA_ARRAY 2 |
| 40 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 41 | #ifdef CONFIG_PROC_FS |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 42 | static unsigned long direct_pages_count[PG_LEVEL_NUM]; |
| 43 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 44 | void update_page_count(int level, unsigned long pages) |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 45 | { |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 46 | unsigned long flags; |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 47 | |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 48 | /* Protect against CPA */ |
| 49 | spin_lock_irqsave(&pgd_lock, flags); |
| 50 | direct_pages_count[level] += pages; |
| 51 | spin_unlock_irqrestore(&pgd_lock, flags); |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 52 | } |
| 53 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 54 | static void split_page_count(int level) |
| 55 | { |
| 56 | direct_pages_count[level]--; |
| 57 | direct_pages_count[level - 1] += PTRS_PER_PTE; |
| 58 | } |
| 59 | |
| 60 | int arch_report_meminfo(char *page) |
| 61 | { |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 62 | int n = sprintf(page, "DirectMap4k: %8lu kB\n", |
| 63 | direct_pages_count[PG_LEVEL_4K] << 2); |
| 64 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) |
| 65 | n += sprintf(page + n, "DirectMap2M: %8lu kB\n", |
| 66 | direct_pages_count[PG_LEVEL_2M] << 11); |
| 67 | #else |
| 68 | n += sprintf(page + n, "DirectMap4M: %8lu kB\n", |
| 69 | direct_pages_count[PG_LEVEL_2M] << 12); |
| 70 | #endif |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 71 | #ifdef CONFIG_X86_64 |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 72 | if (direct_gbpages) |
| 73 | n += sprintf(page + n, "DirectMap1G: %8lu kB\n", |
| 74 | direct_pages_count[PG_LEVEL_1G] << 20); |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 75 | #endif |
| 76 | return n; |
| 77 | } |
| 78 | #else |
| 79 | static inline void split_page_count(int level) { } |
| 80 | #endif |
| 81 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 82 | #ifdef CONFIG_X86_64 |
| 83 | |
| 84 | static inline unsigned long highmap_start_pfn(void) |
| 85 | { |
| 86 | return __pa(_text) >> PAGE_SHIFT; |
| 87 | } |
| 88 | |
| 89 | static inline unsigned long highmap_end_pfn(void) |
| 90 | { |
| 91 | return __pa(round_up((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT; |
| 92 | } |
| 93 | |
| 94 | #endif |
| 95 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 96 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 97 | # define debug_pagealloc 1 |
| 98 | #else |
| 99 | # define debug_pagealloc 0 |
| 100 | #endif |
| 101 | |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 102 | static inline int |
| 103 | within(unsigned long addr, unsigned long start, unsigned long end) |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 104 | { |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 105 | return addr >= start && addr < end; |
| 106 | } |
| 107 | |
| 108 | /* |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 109 | * Flushing functions |
| 110 | */ |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 111 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 112 | /** |
| 113 | * clflush_cache_range - flush a cache range with clflush |
| 114 | * @addr: virtual start address |
| 115 | * @size: number of bytes to flush |
| 116 | * |
| 117 | * clflush is an unordered instruction which needs fencing with mfence |
| 118 | * to avoid ordering issues. |
| 119 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 120 | void clflush_cache_range(void *vaddr, unsigned int size) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 121 | { |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 122 | void *vend = vaddr + size - 1; |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 123 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 124 | mb(); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 125 | |
| 126 | for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size) |
| 127 | clflush(vaddr); |
| 128 | /* |
| 129 | * Flush any possible final partial cacheline: |
| 130 | */ |
| 131 | clflush(vend); |
| 132 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 133 | mb(); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 134 | } |
| 135 | |
Thomas Gleixner | af1e684 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 136 | static void __cpa_flush_all(void *arg) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 137 | { |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 138 | unsigned long cache = (unsigned long)arg; |
| 139 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 140 | /* |
| 141 | * Flush all to work around Errata in early athlons regarding |
| 142 | * large page flushing. |
| 143 | */ |
| 144 | __flush_tlb_all(); |
| 145 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 146 | if (cache && boot_cpu_data.x86_model >= 4) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 147 | wbinvd(); |
| 148 | } |
| 149 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 150 | static void cpa_flush_all(unsigned long cache) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 151 | { |
| 152 | BUG_ON(irqs_disabled()); |
| 153 | |
Jens Axboe | 15c8b6c | 2008-05-09 09:39:44 +0200 | [diff] [blame] | 154 | on_each_cpu(__cpa_flush_all, (void *) cache, 1); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 155 | } |
| 156 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 157 | static void __cpa_flush_range(void *arg) |
| 158 | { |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 159 | /* |
| 160 | * We could optimize that further and do individual per page |
| 161 | * tlb invalidates for a low number of pages. Caveat: we must |
| 162 | * flush the high aliases on 64bit as well. |
| 163 | */ |
| 164 | __flush_tlb_all(); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 165 | } |
| 166 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 167 | static void cpa_flush_range(unsigned long start, int numpages, int cache) |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 168 | { |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 169 | unsigned int i, level; |
| 170 | unsigned long addr; |
| 171 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 172 | BUG_ON(irqs_disabled()); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 173 | WARN_ON(PAGE_ALIGN(start) != start); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 174 | |
Jens Axboe | 15c8b6c | 2008-05-09 09:39:44 +0200 | [diff] [blame] | 175 | on_each_cpu(__cpa_flush_range, NULL, 1); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 176 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 177 | if (!cache) |
| 178 | return; |
| 179 | |
Thomas Gleixner | 3b233e5 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 180 | /* |
| 181 | * We only need to flush on one CPU, |
| 182 | * clflush is a MESI-coherent instruction that |
| 183 | * will cause all other CPUs to flush the same |
| 184 | * cachelines: |
| 185 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 186 | for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) { |
| 187 | pte_t *pte = lookup_address(addr, &level); |
| 188 | |
| 189 | /* |
| 190 | * Only flush present addresses: |
| 191 | */ |
Thomas Gleixner | 7bfb72e | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 192 | if (pte && (pte_val(*pte) & _PAGE_PRESENT)) |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 193 | clflush_cache_range((void *) addr, PAGE_SIZE); |
| 194 | } |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 195 | } |
| 196 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 197 | static void cpa_flush_array(unsigned long *start, int numpages, int cache) |
| 198 | { |
| 199 | unsigned int i, level; |
| 200 | unsigned long *addr; |
| 201 | |
| 202 | BUG_ON(irqs_disabled()); |
| 203 | |
| 204 | on_each_cpu(__cpa_flush_range, NULL, 1); |
| 205 | |
| 206 | if (!cache) |
| 207 | return; |
| 208 | |
| 209 | /* 4M threshold */ |
| 210 | if (numpages >= 1024) { |
| 211 | if (boot_cpu_data.x86_model >= 4) |
| 212 | wbinvd(); |
| 213 | return; |
| 214 | } |
| 215 | /* |
| 216 | * We only need to flush on one CPU, |
| 217 | * clflush is a MESI-coherent instruction that |
| 218 | * will cause all other CPUs to flush the same |
| 219 | * cachelines: |
| 220 | */ |
| 221 | for (i = 0, addr = start; i < numpages; i++, addr++) { |
| 222 | pte_t *pte = lookup_address(*addr, &level); |
| 223 | |
| 224 | /* |
| 225 | * Only flush present addresses: |
| 226 | */ |
| 227 | if (pte && (pte_val(*pte) & _PAGE_PRESENT)) |
| 228 | clflush_cache_range((void *) *addr, PAGE_SIZE); |
| 229 | } |
| 230 | } |
| 231 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 232 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 233 | * Certain areas of memory on x86 require very specific protection flags, |
| 234 | * for example the BIOS area or kernel text. Callers don't always get this |
| 235 | * right (again, ioremap() on BIOS memory is not uncommon) so this function |
| 236 | * checks and fixes these known static required protection bits. |
| 237 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 238 | static inline pgprot_t static_protections(pgprot_t prot, unsigned long address, |
| 239 | unsigned long pfn) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 240 | { |
| 241 | pgprot_t forbidden = __pgprot(0); |
| 242 | |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 243 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 244 | * The BIOS area between 640k and 1Mb needs to be executable for |
| 245 | * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support. |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 246 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 247 | if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT)) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 248 | pgprot_val(forbidden) |= _PAGE_NX; |
| 249 | |
| 250 | /* |
| 251 | * The kernel text needs to be executable for obvious reasons |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 252 | * Does not cover __inittext since that is gone later on. On |
| 253 | * 64bit we do not enforce !NX on the low mapping |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 254 | */ |
| 255 | if (within(address, (unsigned long)_text, (unsigned long)_etext)) |
| 256 | pgprot_val(forbidden) |= _PAGE_NX; |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 257 | |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 258 | /* |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 259 | * The .rodata section needs to be read-only. Using the pfn |
| 260 | * catches all aliases. |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 261 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 262 | if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT, |
| 263 | __pa((unsigned long)__end_rodata) >> PAGE_SHIFT)) |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 264 | pgprot_val(forbidden) |= _PAGE_RW; |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 265 | |
| 266 | prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 267 | |
| 268 | return prot; |
| 269 | } |
| 270 | |
Thomas Gleixner | 9a14aef | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 271 | /* |
| 272 | * Lookup the page table entry for a virtual address. Return a pointer |
| 273 | * to the entry and the level of the mapping. |
| 274 | * |
| 275 | * Note: We return pud and pmd either when the entry is marked large |
| 276 | * or when the present bit is not set. Otherwise we would return a |
| 277 | * pointer to a nonexisting mapping. |
| 278 | */ |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 279 | pte_t *lookup_address(unsigned long address, unsigned int *level) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 280 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 281 | pgd_t *pgd = pgd_offset_k(address); |
| 282 | pud_t *pud; |
| 283 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 284 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 285 | *level = PG_LEVEL_NONE; |
| 286 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | if (pgd_none(*pgd)) |
| 288 | return NULL; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 289 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 290 | pud = pud_offset(pgd, address); |
| 291 | if (pud_none(*pud)) |
| 292 | return NULL; |
Andi Kleen | c2f71ee | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 293 | |
| 294 | *level = PG_LEVEL_1G; |
| 295 | if (pud_large(*pud) || !pud_present(*pud)) |
| 296 | return (pte_t *)pud; |
| 297 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 298 | pmd = pmd_offset(pud, address); |
| 299 | if (pmd_none(*pmd)) |
| 300 | return NULL; |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 301 | |
| 302 | *level = PG_LEVEL_2M; |
Thomas Gleixner | 9a14aef | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 303 | if (pmd_large(*pmd) || !pmd_present(*pmd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | return (pte_t *)pmd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 305 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 306 | *level = PG_LEVEL_4K; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 307 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 308 | return pte_offset_kernel(pmd, address); |
| 309 | } |
Pekka Paalanen | 75bb883 | 2008-05-12 21:20:56 +0200 | [diff] [blame] | 310 | EXPORT_SYMBOL_GPL(lookup_address); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 311 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 312 | /* |
| 313 | * Set the new pmd in all the pgds we know about: |
| 314 | */ |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 315 | static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 316 | { |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 317 | /* change init_mm */ |
| 318 | set_pte_atomic(kpte, pte); |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 319 | #ifdef CONFIG_X86_32 |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 320 | if (!SHARED_KERNEL_PMD) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 321 | struct page *page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 322 | |
Jeremy Fitzhardinge | e3ed910 | 2008-01-30 13:34:11 +0100 | [diff] [blame] | 323 | list_for_each_entry(page, &pgd_list, lru) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 324 | pgd_t *pgd; |
| 325 | pud_t *pud; |
| 326 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 327 | |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 328 | pgd = (pgd_t *)page_address(page) + pgd_index(address); |
| 329 | pud = pud_offset(pgd, address); |
| 330 | pmd = pmd_offset(pud, address); |
| 331 | set_pte_atomic((pte_t *)pmd, pte); |
| 332 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 334 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | } |
| 336 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 337 | static int |
| 338 | try_preserve_large_page(pte_t *kpte, unsigned long address, |
| 339 | struct cpa_data *cpa) |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 340 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 341 | unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 342 | pte_t new_pte, old_pte, *tmp; |
| 343 | pgprot_t old_prot, new_prot; |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 344 | int i, do_split = 1; |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 345 | unsigned int level; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 346 | |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 347 | if (cpa->force_split) |
| 348 | return 1; |
| 349 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 350 | spin_lock_irqsave(&pgd_lock, flags); |
| 351 | /* |
| 352 | * Check for races, another CPU might have split this page |
| 353 | * up already: |
| 354 | */ |
| 355 | tmp = lookup_address(address, &level); |
| 356 | if (tmp != kpte) |
| 357 | goto out_unlock; |
| 358 | |
| 359 | switch (level) { |
| 360 | case PG_LEVEL_2M: |
Andi Kleen | 31422c5 | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 361 | psize = PMD_PAGE_SIZE; |
| 362 | pmask = PMD_PAGE_MASK; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 363 | break; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 364 | #ifdef CONFIG_X86_64 |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 365 | case PG_LEVEL_1G: |
Andi Kleen | 5d3c8b2 | 2008-02-13 16:20:35 +0100 | [diff] [blame] | 366 | psize = PUD_PAGE_SIZE; |
| 367 | pmask = PUD_PAGE_MASK; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 368 | break; |
| 369 | #endif |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 370 | default: |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 371 | do_split = -EINVAL; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 372 | goto out_unlock; |
| 373 | } |
| 374 | |
| 375 | /* |
| 376 | * Calculate the number of pages, which fit into this large |
| 377 | * page starting at address: |
| 378 | */ |
| 379 | nextpage_addr = (address + psize) & pmask; |
| 380 | numpages = (nextpage_addr - address) >> PAGE_SHIFT; |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 381 | if (numpages < cpa->numpages) |
| 382 | cpa->numpages = numpages; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 383 | |
| 384 | /* |
| 385 | * We are safe now. Check whether the new pgprot is the same: |
| 386 | */ |
| 387 | old_pte = *kpte; |
| 388 | old_prot = new_prot = pte_pgprot(old_pte); |
| 389 | |
| 390 | pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr); |
| 391 | pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 392 | |
| 393 | /* |
| 394 | * old_pte points to the large page base address. So we need |
| 395 | * to add the offset of the virtual address: |
| 396 | */ |
| 397 | pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT); |
| 398 | cpa->pfn = pfn; |
| 399 | |
| 400 | new_prot = static_protections(new_prot, address, pfn); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 401 | |
| 402 | /* |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 403 | * We need to check the full range, whether |
| 404 | * static_protection() requires a different pgprot for one of |
| 405 | * the pages in the range we try to preserve: |
| 406 | */ |
| 407 | addr = address + PAGE_SIZE; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 408 | pfn++; |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 409 | for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 410 | pgprot_t chk_prot = static_protections(new_prot, addr, pfn); |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 411 | |
| 412 | if (pgprot_val(chk_prot) != pgprot_val(new_prot)) |
| 413 | goto out_unlock; |
| 414 | } |
| 415 | |
| 416 | /* |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 417 | * If there are no changes, return. maxpages has been updated |
| 418 | * above: |
| 419 | */ |
| 420 | if (pgprot_val(new_prot) == pgprot_val(old_prot)) { |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 421 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 422 | goto out_unlock; |
| 423 | } |
| 424 | |
| 425 | /* |
| 426 | * We need to change the attributes. Check, whether we can |
| 427 | * change the large page in one go. We request a split, when |
| 428 | * the address is not aligned and the number of pages is |
| 429 | * smaller than the number of pages in the large page. Note |
| 430 | * that we limited the number of possible pages already to |
| 431 | * the number of pages in the large page. |
| 432 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 433 | if (address == (nextpage_addr - psize) && cpa->numpages == numpages) { |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 434 | /* |
| 435 | * The address is aligned and the number of pages |
| 436 | * covers the full page. |
| 437 | */ |
| 438 | new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot)); |
| 439 | __set_pmd_pte(kpte, address, new_pte); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 440 | cpa->flags |= CPA_FLUSHTLB; |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 441 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 442 | } |
| 443 | |
| 444 | out_unlock: |
| 445 | spin_unlock_irqrestore(&pgd_lock, flags); |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 446 | |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 447 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 448 | } |
| 449 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 450 | static LIST_HEAD(page_pool); |
| 451 | static unsigned long pool_size, pool_pages, pool_low; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 452 | static unsigned long pool_used, pool_failed; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 453 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 454 | static void cpa_fill_pool(struct page **ret) |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 455 | { |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 456 | gfp_t gfp = GFP_KERNEL; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 457 | unsigned long flags; |
| 458 | struct page *p; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 459 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 460 | /* |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 461 | * Avoid recursion (on debug-pagealloc) and also signal |
| 462 | * our priority to get to these pagetables: |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 463 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 464 | if (current->flags & PF_MEMALLOC) |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 465 | return; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 466 | current->flags |= PF_MEMALLOC; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 467 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 468 | /* |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 469 | * Allocate atomically from atomic contexts: |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 470 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 471 | if (in_atomic() || irqs_disabled() || debug_pagealloc) |
| 472 | gfp = GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 473 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 474 | while (pool_pages < pool_size || (ret && !*ret)) { |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 475 | p = alloc_pages(gfp, 0); |
| 476 | if (!p) { |
| 477 | pool_failed++; |
| 478 | break; |
| 479 | } |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 480 | /* |
| 481 | * If the call site needs a page right now, provide it: |
| 482 | */ |
| 483 | if (ret && !*ret) { |
| 484 | *ret = p; |
| 485 | continue; |
| 486 | } |
| 487 | spin_lock_irqsave(&pgd_lock, flags); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 488 | list_add(&p->lru, &page_pool); |
| 489 | pool_pages++; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 490 | spin_unlock_irqrestore(&pgd_lock, flags); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 491 | } |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 492 | |
| 493 | current->flags &= ~PF_MEMALLOC; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 494 | } |
| 495 | |
| 496 | #define SHIFT_MB (20 - PAGE_SHIFT) |
| 497 | #define ROUND_MB_GB ((1 << 10) - 1) |
| 498 | #define SHIFT_MB_GB 10 |
| 499 | #define POOL_PAGES_PER_GB 16 |
| 500 | |
| 501 | void __init cpa_init(void) |
| 502 | { |
| 503 | struct sysinfo si; |
| 504 | unsigned long gb; |
| 505 | |
| 506 | si_meminfo(&si); |
| 507 | /* |
| 508 | * Calculate the number of pool pages: |
| 509 | * |
| 510 | * Convert totalram (nr of pages) to MiB and round to the next |
| 511 | * GiB. Shift MiB to Gib and multiply the result by |
| 512 | * POOL_PAGES_PER_GB: |
| 513 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 514 | if (debug_pagealloc) { |
| 515 | gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB; |
| 516 | pool_size = POOL_PAGES_PER_GB * gb; |
| 517 | } else { |
| 518 | pool_size = 1; |
| 519 | } |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 520 | pool_low = pool_size; |
| 521 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 522 | cpa_fill_pool(NULL); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 523 | printk(KERN_DEBUG |
| 524 | "CPA: page pool initialized %lu of %lu pages preallocated\n", |
| 525 | pool_pages, pool_size); |
| 526 | } |
| 527 | |
Ingo Molnar | 7afe15b | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 528 | static int split_large_page(pte_t *kpte, unsigned long address) |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 529 | { |
Thomas Gleixner | 7b610ee | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 530 | unsigned long flags, pfn, pfninc = 1; |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 531 | unsigned int i, level; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 532 | pte_t *pbase, *tmp; |
| 533 | pgprot_t ref_prot; |
| 534 | struct page *base; |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 535 | |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 536 | /* |
| 537 | * Get a page from the pool. The pool list is protected by the |
| 538 | * pgd_lock, which we have to take anyway for the split |
| 539 | * operation: |
| 540 | */ |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 541 | spin_lock_irqsave(&pgd_lock, flags); |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 542 | if (list_empty(&page_pool)) { |
| 543 | spin_unlock_irqrestore(&pgd_lock, flags); |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 544 | base = NULL; |
| 545 | cpa_fill_pool(&base); |
| 546 | if (!base) |
| 547 | return -ENOMEM; |
| 548 | spin_lock_irqsave(&pgd_lock, flags); |
| 549 | } else { |
| 550 | base = list_first_entry(&page_pool, struct page, lru); |
| 551 | list_del(&base->lru); |
| 552 | pool_pages--; |
| 553 | |
| 554 | if (pool_pages < pool_low) |
| 555 | pool_low = pool_pages; |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 556 | } |
| 557 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 558 | /* |
| 559 | * Check for races, another CPU might have split this page |
| 560 | * up for us already: |
| 561 | */ |
| 562 | tmp = lookup_address(address, &level); |
Ingo Molnar | 6ce9fc1 | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 563 | if (tmp != kpte) |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 564 | goto out_unlock; |
| 565 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 566 | pbase = (pte_t *)page_address(base); |
Jeremy Fitzhardinge | 6944a9c | 2008-03-17 16:37:01 -0700 | [diff] [blame] | 567 | paravirt_alloc_pte(&init_mm, page_to_pfn(base)); |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 568 | ref_prot = pte_pgprot(pte_clrhuge(*kpte)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 569 | |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 570 | #ifdef CONFIG_X86_64 |
| 571 | if (level == PG_LEVEL_1G) { |
| 572 | pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT; |
| 573 | pgprot_val(ref_prot) |= _PAGE_PSE; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 574 | } |
| 575 | #endif |
| 576 | |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 577 | /* |
| 578 | * Get the target pfn from the original entry: |
| 579 | */ |
| 580 | pfn = pte_pfn(*kpte); |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 581 | for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc) |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 582 | set_pte(&pbase[i], pfn_pte(pfn, ref_prot)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 583 | |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 584 | if (address >= (unsigned long)__va(0) && |
Yinghai Lu | f361a45 | 2008-07-10 20:38:26 -0700 | [diff] [blame] | 585 | address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT)) |
| 586 | split_page_count(level); |
| 587 | |
| 588 | #ifdef CONFIG_X86_64 |
| 589 | if (address >= (unsigned long)__va(1UL<<32) && |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 590 | address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT)) |
| 591 | split_page_count(level); |
Yinghai Lu | f361a45 | 2008-07-10 20:38:26 -0700 | [diff] [blame] | 592 | #endif |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 593 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 594 | /* |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 595 | * Install the new, split up pagetable. Important details here: |
Huang, Ying | 4c881ca | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 596 | * |
| 597 | * On Intel the NX bit of all levels must be cleared to make a |
| 598 | * page executable. See section 4.13.2 of Intel 64 and IA-32 |
| 599 | * Architectures Software Developer's Manual). |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 600 | * |
| 601 | * Mark the entry present. The current mapping might be |
| 602 | * set to not present, which we preserved above. |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 603 | */ |
Huang, Ying | 4c881ca | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 604 | ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte))); |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 605 | pgprot_val(ref_prot) |= _PAGE_PRESENT; |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 606 | __set_pmd_pte(kpte, address, mk_pte(base, ref_prot)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 607 | base = NULL; |
| 608 | |
| 609 | out_unlock: |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 610 | /* |
| 611 | * If we dropped out via the lookup_address check under |
| 612 | * pgd_lock then stick the page back into the pool: |
| 613 | */ |
| 614 | if (base) { |
| 615 | list_add(&base->lru, &page_pool); |
| 616 | pool_pages++; |
| 617 | } else |
| 618 | pool_used++; |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 619 | spin_unlock_irqrestore(&pgd_lock, flags); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 620 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 621 | return 0; |
| 622 | } |
| 623 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 624 | static int __change_page_attr(struct cpa_data *cpa, int primary) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 625 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 626 | unsigned long address; |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 627 | int do_split, err; |
| 628 | unsigned int level; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 629 | pte_t *kpte, old_pte; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 630 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 631 | if (cpa->flags & CPA_ARRAY) |
| 632 | address = cpa->vaddr[cpa->curpage]; |
| 633 | else |
| 634 | address = *cpa->vaddr; |
| 635 | |
Ingo Molnar | 97f99fe | 2008-01-30 13:33:55 +0100 | [diff] [blame] | 636 | repeat: |
Ingo Molnar | f0646e4 | 2008-01-30 13:33:43 +0100 | [diff] [blame] | 637 | kpte = lookup_address(address, &level); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 638 | if (!kpte) |
Ingo Molnar | d1a4be6 | 2008-04-18 21:32:22 +0200 | [diff] [blame] | 639 | return 0; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 640 | |
| 641 | old_pte = *kpte; |
| 642 | if (!pte_val(old_pte)) { |
| 643 | if (!primary) |
| 644 | return 0; |
Arjan van de Ven | 875e40b | 2008-07-30 12:26:26 -0700 | [diff] [blame] | 645 | WARN(1, KERN_WARNING "CPA: called for zero pte. " |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 646 | "vaddr = %lx cpa->vaddr = %lx\n", address, |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 647 | *cpa->vaddr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | return -EINVAL; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 649 | } |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 650 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 651 | if (level == PG_LEVEL_4K) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 652 | pte_t new_pte; |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 653 | pgprot_t new_prot = pte_pgprot(old_pte); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 654 | unsigned long pfn = pte_pfn(old_pte); |
Thomas Gleixner | a72a08a | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 655 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 656 | pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr); |
| 657 | pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 658 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 659 | new_prot = static_protections(new_prot, address, pfn); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 660 | |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 661 | /* |
| 662 | * We need to keep the pfn from the existing PTE, |
| 663 | * after all we're only going to change it's attributes |
| 664 | * not the memory it points to |
| 665 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 666 | new_pte = pfn_pte(pfn, canon_pgprot(new_prot)); |
| 667 | cpa->pfn = pfn; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 668 | /* |
| 669 | * Do we really change anything ? |
| 670 | */ |
| 671 | if (pte_val(old_pte) != pte_val(new_pte)) { |
| 672 | set_pte_atomic(kpte, new_pte); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 673 | cpa->flags |= CPA_FLUSHTLB; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 674 | } |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 675 | cpa->numpages = 1; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 676 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 677 | } |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 678 | |
| 679 | /* |
| 680 | * Check, whether we can keep the large page intact |
| 681 | * and just change the pte: |
| 682 | */ |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 683 | do_split = try_preserve_large_page(kpte, address, cpa); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 684 | /* |
| 685 | * When the range fits into the existing large page, |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 686 | * return. cp->numpages and cpa->tlbflush have been updated in |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 687 | * try_large_page: |
| 688 | */ |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 689 | if (do_split <= 0) |
| 690 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 691 | |
| 692 | /* |
| 693 | * We have to split the large page: |
| 694 | */ |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 695 | err = split_large_page(kpte, address); |
| 696 | if (!err) { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 697 | cpa->flags |= CPA_FLUSHTLB; |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 698 | goto repeat; |
| 699 | } |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 700 | |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 701 | return err; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 702 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 703 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 704 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias); |
| 705 | |
| 706 | static int cpa_process_alias(struct cpa_data *cpa) |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 707 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 708 | struct cpa_data alias_cpa; |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 709 | int ret = 0; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 710 | unsigned long temp_cpa_vaddr, vaddr; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 711 | |
Yinghai Lu | 965194c | 2008-07-12 14:31:28 -0700 | [diff] [blame] | 712 | if (cpa->pfn >= max_pfn_mapped) |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 713 | return 0; |
| 714 | |
Yinghai Lu | f361a45 | 2008-07-10 20:38:26 -0700 | [diff] [blame] | 715 | #ifdef CONFIG_X86_64 |
Yinghai Lu | 965194c | 2008-07-12 14:31:28 -0700 | [diff] [blame] | 716 | if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT))) |
Yinghai Lu | f361a45 | 2008-07-10 20:38:26 -0700 | [diff] [blame] | 717 | return 0; |
| 718 | #endif |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 719 | /* |
| 720 | * No need to redo, when the primary call touched the direct |
| 721 | * mapping already: |
| 722 | */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 723 | if (cpa->flags & CPA_ARRAY) |
| 724 | vaddr = cpa->vaddr[cpa->curpage]; |
| 725 | else |
| 726 | vaddr = *cpa->vaddr; |
| 727 | |
| 728 | if (!(within(vaddr, PAGE_OFFSET, |
Yinghai Lu | f361a45 | 2008-07-10 20:38:26 -0700 | [diff] [blame] | 729 | PAGE_OFFSET + (max_low_pfn_mapped << PAGE_SHIFT)) |
| 730 | #ifdef CONFIG_X86_64 |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 731 | || within(vaddr, PAGE_OFFSET + (1UL<<32), |
Yinghai Lu | f361a45 | 2008-07-10 20:38:26 -0700 | [diff] [blame] | 732 | PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)) |
| 733 | #endif |
| 734 | )) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 735 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 736 | alias_cpa = *cpa; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 737 | temp_cpa_vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT); |
| 738 | alias_cpa.vaddr = &temp_cpa_vaddr; |
| 739 | alias_cpa.flags &= ~CPA_ARRAY; |
| 740 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 741 | |
| 742 | ret = __change_page_attr_set_clr(&alias_cpa, 0); |
| 743 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 744 | |
Arjan van de Ven | 488fd99 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 745 | #ifdef CONFIG_X86_64 |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 746 | if (ret) |
| 747 | return ret; |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 748 | /* |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 749 | * No need to redo, when the primary call touched the high |
| 750 | * mapping already: |
| 751 | */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 752 | if (within(vaddr, (unsigned long) _text, (unsigned long) _end)) |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 753 | return 0; |
| 754 | |
| 755 | /* |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 756 | * If the physical address is inside the kernel map, we need |
| 757 | * to touch the high mapped kernel as well: |
| 758 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 759 | if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) |
| 760 | return 0; |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 761 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 762 | alias_cpa = *cpa; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 763 | temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base; |
| 764 | alias_cpa.vaddr = &temp_cpa_vaddr; |
| 765 | alias_cpa.flags &= ~CPA_ARRAY; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 766 | |
| 767 | /* |
| 768 | * The high mapping range is imprecise, so ignore the return value. |
| 769 | */ |
| 770 | __change_page_attr_set_clr(&alias_cpa, 0); |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 771 | #endif |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 772 | return ret; |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 773 | } |
| 774 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 775 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias) |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 776 | { |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 777 | int ret, numpages = cpa->numpages; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 778 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 779 | while (numpages) { |
| 780 | /* |
| 781 | * Store the remaining nr of pages for the large page |
| 782 | * preservation check. |
| 783 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 784 | cpa->numpages = numpages; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 785 | /* for array changes, we can't use large page */ |
| 786 | if (cpa->flags & CPA_ARRAY) |
| 787 | cpa->numpages = 1; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 788 | |
| 789 | ret = __change_page_attr(cpa, checkalias); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 790 | if (ret) |
| 791 | return ret; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 792 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 793 | if (checkalias) { |
| 794 | ret = cpa_process_alias(cpa); |
| 795 | if (ret) |
| 796 | return ret; |
| 797 | } |
| 798 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 799 | /* |
| 800 | * Adjust the number of pages with the result of the |
| 801 | * CPA operation. Either a large page has been |
| 802 | * preserved or a single page update happened. |
| 803 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 804 | BUG_ON(cpa->numpages > numpages); |
| 805 | numpages -= cpa->numpages; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 806 | if (cpa->flags & CPA_ARRAY) |
| 807 | cpa->curpage++; |
| 808 | else |
| 809 | *cpa->vaddr += cpa->numpages * PAGE_SIZE; |
| 810 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 811 | } |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 812 | return 0; |
| 813 | } |
| 814 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 815 | static inline int cache_attr(pgprot_t attr) |
| 816 | { |
| 817 | return pgprot_val(attr) & |
| 818 | (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD); |
| 819 | } |
| 820 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 821 | static int change_page_attr_set_clr(unsigned long *addr, int numpages, |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 822 | pgprot_t mask_set, pgprot_t mask_clr, |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 823 | int force_split, int array) |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 824 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 825 | struct cpa_data cpa; |
Ingo Molnar | cacf890 | 2008-08-21 13:46:33 +0200 | [diff] [blame] | 826 | int ret, cache, checkalias; |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 827 | |
| 828 | /* |
| 829 | * Check, if we are requested to change a not supported |
| 830 | * feature: |
| 831 | */ |
| 832 | mask_set = canon_pgprot(mask_set); |
| 833 | mask_clr = canon_pgprot(mask_clr); |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 834 | if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split) |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 835 | return 0; |
| 836 | |
Thomas Gleixner | 69b1415 | 2008-02-13 11:04:50 +0100 | [diff] [blame] | 837 | /* Ensure we are PAGE_SIZE aligned */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 838 | if (!array) { |
| 839 | if (*addr & ~PAGE_MASK) { |
| 840 | *addr &= PAGE_MASK; |
| 841 | /* |
| 842 | * People should not be passing in unaligned addresses: |
| 843 | */ |
| 844 | WARN_ON_ONCE(1); |
| 845 | } |
| 846 | } else { |
| 847 | int i; |
| 848 | for (i = 0; i < numpages; i++) { |
| 849 | if (addr[i] & ~PAGE_MASK) { |
| 850 | addr[i] &= PAGE_MASK; |
| 851 | WARN_ON_ONCE(1); |
| 852 | } |
| 853 | } |
Thomas Gleixner | 69b1415 | 2008-02-13 11:04:50 +0100 | [diff] [blame] | 854 | } |
| 855 | |
Nick Piggin | 5843d9a | 2008-08-01 03:15:21 +0200 | [diff] [blame] | 856 | /* Must avoid aliasing mappings in the highmem code */ |
| 857 | kmap_flush_unused(); |
| 858 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 859 | cpa.vaddr = addr; |
| 860 | cpa.numpages = numpages; |
| 861 | cpa.mask_set = mask_set; |
| 862 | cpa.mask_clr = mask_clr; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 863 | cpa.flags = 0; |
| 864 | cpa.curpage = 0; |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 865 | cpa.force_split = force_split; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 866 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 867 | if (array) |
| 868 | cpa.flags |= CPA_ARRAY; |
| 869 | |
Thomas Gleixner | af96e44 | 2008-02-15 21:49:46 +0100 | [diff] [blame] | 870 | /* No alias checking for _NX bit modifications */ |
| 871 | checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX; |
| 872 | |
| 873 | ret = __change_page_attr_set_clr(&cpa, checkalias); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 874 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 875 | /* |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 876 | * Check whether we really changed something: |
| 877 | */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 878 | if (!(cpa.flags & CPA_FLUSHTLB)) |
Shaohua Li | 1ac2f7d | 2008-08-04 14:51:24 +0800 | [diff] [blame] | 879 | goto out; |
Ingo Molnar | cacf890 | 2008-08-21 13:46:33 +0200 | [diff] [blame] | 880 | |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 881 | /* |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 882 | * No need to flush, when we did not set any of the caching |
| 883 | * attributes: |
| 884 | */ |
| 885 | cache = cache_attr(mask_set); |
| 886 | |
| 887 | /* |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 888 | * On success we use clflush, when the CPU supports it to |
| 889 | * avoid the wbindv. If the CPU does not support it and in the |
Thomas Gleixner | af1e684 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 890 | * error case we fall back to cpa_flush_all (which uses |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 891 | * wbindv): |
| 892 | */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 893 | if (!ret && cpu_has_clflush) { |
| 894 | if (cpa.flags & CPA_ARRAY) |
| 895 | cpa_flush_array(addr, numpages, cache); |
| 896 | else |
| 897 | cpa_flush_range(*addr, numpages, cache); |
| 898 | } else |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 899 | cpa_flush_all(cache); |
Ingo Molnar | cacf890 | 2008-08-21 13:46:33 +0200 | [diff] [blame] | 900 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 901 | out: |
Ingo Molnar | cacf890 | 2008-08-21 13:46:33 +0200 | [diff] [blame] | 902 | cpa_fill_pool(NULL); |
| 903 | |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 904 | return ret; |
| 905 | } |
| 906 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 907 | static inline int change_page_attr_set(unsigned long *addr, int numpages, |
| 908 | pgprot_t mask, int array) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 909 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 910 | return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0, |
| 911 | array); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 912 | } |
| 913 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 914 | static inline int change_page_attr_clear(unsigned long *addr, int numpages, |
| 915 | pgprot_t mask, int array) |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 916 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 917 | return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0, |
| 918 | array); |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 919 | } |
| 920 | |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 921 | int _set_memory_uc(unsigned long addr, int numpages) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 922 | { |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 923 | /* |
| 924 | * for now UC MINUS. see comments in ioremap_nocache() |
| 925 | */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 926 | return change_page_attr_set(&addr, numpages, |
| 927 | __pgprot(_PAGE_CACHE_UC_MINUS), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 928 | } |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 929 | |
| 930 | int set_memory_uc(unsigned long addr, int numpages) |
| 931 | { |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 932 | /* |
| 933 | * for now UC MINUS. see comments in ioremap_nocache() |
| 934 | */ |
venkatesh.pallipadi@intel.com | c15238d | 2008-08-20 16:45:51 -0700 | [diff] [blame] | 935 | if (reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE, |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 936 | _PAGE_CACHE_UC_MINUS, NULL)) |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 937 | return -EINVAL; |
| 938 | |
| 939 | return _set_memory_uc(addr, numpages); |
| 940 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 941 | EXPORT_SYMBOL(set_memory_uc); |
| 942 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 943 | int set_memory_array_uc(unsigned long *addr, int addrinarray) |
| 944 | { |
Rene Herman | c5e147c | 2008-08-22 01:02:20 +0200 | [diff] [blame] | 945 | unsigned long start; |
| 946 | unsigned long end; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 947 | int i; |
| 948 | /* |
| 949 | * for now UC MINUS. see comments in ioremap_nocache() |
| 950 | */ |
| 951 | for (i = 0; i < addrinarray; i++) { |
Rene Herman | c5e147c | 2008-08-22 01:02:20 +0200 | [diff] [blame] | 952 | start = __pa(addr[i]); |
| 953 | for (end = start + PAGE_SIZE; i < addrinarray - 1; end += PAGE_SIZE) { |
| 954 | if (end != __pa(addr[i + 1])) |
| 955 | break; |
| 956 | i++; |
| 957 | } |
| 958 | if (reserve_memtype(start, end, _PAGE_CACHE_UC_MINUS, NULL)) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 959 | goto out; |
| 960 | } |
| 961 | |
| 962 | return change_page_attr_set(addr, addrinarray, |
| 963 | __pgprot(_PAGE_CACHE_UC_MINUS), 1); |
| 964 | out: |
Rene Herman | c5e147c | 2008-08-22 01:02:20 +0200 | [diff] [blame] | 965 | for (i = 0; i < addrinarray; i++) { |
| 966 | unsigned long tmp = __pa(addr[i]); |
| 967 | |
| 968 | if (tmp == start) |
| 969 | break; |
Venki Pallipadi | 01de05a | 2008-08-22 12:08:17 -0700 | [diff] [blame] | 970 | for (end = tmp + PAGE_SIZE; i < addrinarray - 1; end += PAGE_SIZE) { |
Rene Herman | c5e147c | 2008-08-22 01:02:20 +0200 | [diff] [blame] | 971 | if (end != __pa(addr[i + 1])) |
| 972 | break; |
| 973 | i++; |
| 974 | } |
| 975 | free_memtype(tmp, end); |
| 976 | } |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 977 | return -EINVAL; |
| 978 | } |
| 979 | EXPORT_SYMBOL(set_memory_array_uc); |
| 980 | |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 981 | int _set_memory_wc(unsigned long addr, int numpages) |
| 982 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 983 | return change_page_attr_set(&addr, numpages, |
| 984 | __pgprot(_PAGE_CACHE_WC), 0); |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 985 | } |
| 986 | |
| 987 | int set_memory_wc(unsigned long addr, int numpages) |
| 988 | { |
Andreas Herrmann | 499f8f8 | 2008-06-10 16:06:21 +0200 | [diff] [blame] | 989 | if (!pat_enabled) |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 990 | return set_memory_uc(addr, numpages); |
| 991 | |
venkatesh.pallipadi@intel.com | c15238d | 2008-08-20 16:45:51 -0700 | [diff] [blame] | 992 | if (reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE, |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 993 | _PAGE_CACHE_WC, NULL)) |
| 994 | return -EINVAL; |
| 995 | |
| 996 | return _set_memory_wc(addr, numpages); |
| 997 | } |
| 998 | EXPORT_SYMBOL(set_memory_wc); |
| 999 | |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1000 | int _set_memory_wb(unsigned long addr, int numpages) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1001 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1002 | return change_page_attr_clear(&addr, numpages, |
| 1003 | __pgprot(_PAGE_CACHE_MASK), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1004 | } |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1005 | |
| 1006 | int set_memory_wb(unsigned long addr, int numpages) |
| 1007 | { |
venkatesh.pallipadi@intel.com | c15238d | 2008-08-20 16:45:51 -0700 | [diff] [blame] | 1008 | free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE); |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1009 | |
| 1010 | return _set_memory_wb(addr, numpages); |
| 1011 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1012 | EXPORT_SYMBOL(set_memory_wb); |
| 1013 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1014 | int set_memory_array_wb(unsigned long *addr, int addrinarray) |
| 1015 | { |
| 1016 | int i; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1017 | |
Rene Herman | c5e147c | 2008-08-22 01:02:20 +0200 | [diff] [blame] | 1018 | for (i = 0; i < addrinarray; i++) { |
| 1019 | unsigned long start = __pa(addr[i]); |
| 1020 | unsigned long end; |
| 1021 | |
| 1022 | for (end = start + PAGE_SIZE; i < addrinarray - 1; end += PAGE_SIZE) { |
| 1023 | if (end != __pa(addr[i + 1])) |
| 1024 | break; |
| 1025 | i++; |
| 1026 | } |
| 1027 | free_memtype(start, end); |
| 1028 | } |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1029 | return change_page_attr_clear(addr, addrinarray, |
| 1030 | __pgprot(_PAGE_CACHE_MASK), 1); |
| 1031 | } |
| 1032 | EXPORT_SYMBOL(set_memory_array_wb); |
| 1033 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1034 | int set_memory_x(unsigned long addr, int numpages) |
| 1035 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1036 | return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1037 | } |
| 1038 | EXPORT_SYMBOL(set_memory_x); |
| 1039 | |
| 1040 | int set_memory_nx(unsigned long addr, int numpages) |
| 1041 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1042 | return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1043 | } |
| 1044 | EXPORT_SYMBOL(set_memory_nx); |
| 1045 | |
| 1046 | int set_memory_ro(unsigned long addr, int numpages) |
| 1047 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1048 | return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1049 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1050 | |
| 1051 | int set_memory_rw(unsigned long addr, int numpages) |
| 1052 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1053 | return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1054 | } |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1055 | |
| 1056 | int set_memory_np(unsigned long addr, int numpages) |
| 1057 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1058 | return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1059 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1060 | |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1061 | int set_memory_4k(unsigned long addr, int numpages) |
| 1062 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1063 | return change_page_attr_set_clr(&addr, numpages, __pgprot(0), |
| 1064 | __pgprot(0), 1, 0); |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1065 | } |
| 1066 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1067 | int set_pages_uc(struct page *page, int numpages) |
| 1068 | { |
| 1069 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1070 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1071 | return set_memory_uc(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1072 | } |
| 1073 | EXPORT_SYMBOL(set_pages_uc); |
| 1074 | |
| 1075 | int set_pages_wb(struct page *page, int numpages) |
| 1076 | { |
| 1077 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1078 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1079 | return set_memory_wb(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1080 | } |
| 1081 | EXPORT_SYMBOL(set_pages_wb); |
| 1082 | |
| 1083 | int set_pages_x(struct page *page, int numpages) |
| 1084 | { |
| 1085 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1086 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1087 | return set_memory_x(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1088 | } |
| 1089 | EXPORT_SYMBOL(set_pages_x); |
| 1090 | |
| 1091 | int set_pages_nx(struct page *page, int numpages) |
| 1092 | { |
| 1093 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1094 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1095 | return set_memory_nx(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1096 | } |
| 1097 | EXPORT_SYMBOL(set_pages_nx); |
| 1098 | |
| 1099 | int set_pages_ro(struct page *page, int numpages) |
| 1100 | { |
| 1101 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1102 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1103 | return set_memory_ro(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1104 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1105 | |
| 1106 | int set_pages_rw(struct page *page, int numpages) |
| 1107 | { |
| 1108 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1109 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1110 | return set_memory_rw(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1111 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1112 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1113 | #ifdef CONFIG_DEBUG_PAGEALLOC |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1114 | |
| 1115 | static int __set_pages_p(struct page *page, int numpages) |
| 1116 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1117 | unsigned long tempaddr = (unsigned long) page_address(page); |
| 1118 | struct cpa_data cpa = { .vaddr = &tempaddr, |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1119 | .numpages = numpages, |
| 1120 | .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW), |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1121 | .mask_clr = __pgprot(0), |
| 1122 | .flags = 0}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1123 | |
Suresh Siddha | 55121b4 | 2008-09-23 14:00:40 -0700 | [diff] [blame^] | 1124 | /* |
| 1125 | * No alias checking needed for setting present flag. otherwise, |
| 1126 | * we may need to break large pages for 64-bit kernel text |
| 1127 | * mappings (this adds to complexity if we want to do this from |
| 1128 | * atomic context especially). Let's keep it simple! |
| 1129 | */ |
| 1130 | return __change_page_attr_set_clr(&cpa, 0); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1131 | } |
| 1132 | |
| 1133 | static int __set_pages_np(struct page *page, int numpages) |
| 1134 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1135 | unsigned long tempaddr = (unsigned long) page_address(page); |
| 1136 | struct cpa_data cpa = { .vaddr = &tempaddr, |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1137 | .numpages = numpages, |
| 1138 | .mask_set = __pgprot(0), |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1139 | .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW), |
| 1140 | .flags = 0}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1141 | |
Suresh Siddha | 55121b4 | 2008-09-23 14:00:40 -0700 | [diff] [blame^] | 1142 | /* |
| 1143 | * No alias checking needed for setting not present flag. otherwise, |
| 1144 | * we may need to break large pages for 64-bit kernel text |
| 1145 | * mappings (this adds to complexity if we want to do this from |
| 1146 | * atomic context especially). Let's keep it simple! |
| 1147 | */ |
| 1148 | return __change_page_attr_set_clr(&cpa, 0); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1149 | } |
| 1150 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1151 | void kernel_map_pages(struct page *page, int numpages, int enable) |
| 1152 | { |
| 1153 | if (PageHighMem(page)) |
| 1154 | return; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1155 | if (!enable) { |
Ingo Molnar | f9b8404 | 2006-06-27 02:54:49 -0700 | [diff] [blame] | 1156 | debug_check_no_locks_freed(page_address(page), |
| 1157 | numpages * PAGE_SIZE); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1158 | } |
Ingo Molnar | de5097c | 2006-01-09 15:59:21 -0800 | [diff] [blame] | 1159 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1160 | /* |
Ingo Molnar | 12d6f21 | 2008-01-30 13:33:58 +0100 | [diff] [blame] | 1161 | * If page allocator is not up yet then do not call c_p_a(): |
| 1162 | */ |
| 1163 | if (!debug_pagealloc_enabled) |
| 1164 | return; |
| 1165 | |
| 1166 | /* |
Ingo Molnar | f8d8406 | 2008-02-13 14:09:53 +0100 | [diff] [blame] | 1167 | * The return value is ignored as the calls cannot fail. |
Suresh Siddha | 55121b4 | 2008-09-23 14:00:40 -0700 | [diff] [blame^] | 1168 | * Large pages for identity mappings are not used at boot time |
| 1169 | * and hence no memory allocations during large page split. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1170 | */ |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1171 | if (enable) |
| 1172 | __set_pages_p(page, numpages); |
| 1173 | else |
| 1174 | __set_pages_np(page, numpages); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1175 | |
| 1176 | /* |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 1177 | * We should perform an IPI and flush all tlbs, |
| 1178 | * but that can deadlock->flush only current cpu: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1179 | */ |
| 1180 | __flush_tlb_all(); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 1181 | |
| 1182 | /* |
| 1183 | * Try to refill the page pool here. We can do this only after |
| 1184 | * the tlb flush. |
| 1185 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 1186 | cpa_fill_pool(NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1187 | } |
Rafael J. Wysocki | 8a235ef | 2008-02-20 01:47:44 +0100 | [diff] [blame] | 1188 | |
Thomas Gleixner | ee7ae7a | 2008-04-17 17:40:45 +0200 | [diff] [blame] | 1189 | #ifdef CONFIG_DEBUG_FS |
| 1190 | static int dpa_show(struct seq_file *m, void *v) |
| 1191 | { |
| 1192 | seq_puts(m, "DEBUG_PAGEALLOC\n"); |
| 1193 | seq_printf(m, "pool_size : %lu\n", pool_size); |
| 1194 | seq_printf(m, "pool_pages : %lu\n", pool_pages); |
| 1195 | seq_printf(m, "pool_low : %lu\n", pool_low); |
| 1196 | seq_printf(m, "pool_used : %lu\n", pool_used); |
| 1197 | seq_printf(m, "pool_failed : %lu\n", pool_failed); |
| 1198 | |
| 1199 | return 0; |
| 1200 | } |
| 1201 | |
| 1202 | static int dpa_open(struct inode *inode, struct file *filp) |
| 1203 | { |
| 1204 | return single_open(filp, dpa_show, NULL); |
| 1205 | } |
| 1206 | |
| 1207 | static const struct file_operations dpa_fops = { |
| 1208 | .open = dpa_open, |
| 1209 | .read = seq_read, |
| 1210 | .llseek = seq_lseek, |
| 1211 | .release = single_release, |
| 1212 | }; |
| 1213 | |
Ingo Molnar | a4928cf | 2008-04-23 13:20:56 +0200 | [diff] [blame] | 1214 | static int __init debug_pagealloc_proc_init(void) |
Thomas Gleixner | ee7ae7a | 2008-04-17 17:40:45 +0200 | [diff] [blame] | 1215 | { |
| 1216 | struct dentry *de; |
| 1217 | |
| 1218 | de = debugfs_create_file("debug_pagealloc", 0600, NULL, NULL, |
| 1219 | &dpa_fops); |
| 1220 | if (!de) |
| 1221 | return -ENOMEM; |
| 1222 | |
| 1223 | return 0; |
| 1224 | } |
| 1225 | __initcall(debug_pagealloc_proc_init); |
| 1226 | #endif |
| 1227 | |
Rafael J. Wysocki | 8a235ef | 2008-02-20 01:47:44 +0100 | [diff] [blame] | 1228 | #ifdef CONFIG_HIBERNATION |
| 1229 | |
| 1230 | bool kernel_page_present(struct page *page) |
| 1231 | { |
| 1232 | unsigned int level; |
| 1233 | pte_t *pte; |
| 1234 | |
| 1235 | if (PageHighMem(page)) |
| 1236 | return false; |
| 1237 | |
| 1238 | pte = lookup_address((unsigned long)page_address(page), &level); |
| 1239 | return (pte_val(*pte) & _PAGE_PRESENT); |
| 1240 | } |
| 1241 | |
| 1242 | #endif /* CONFIG_HIBERNATION */ |
| 1243 | |
| 1244 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
Arjan van de Ven | d1028a1 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1245 | |
| 1246 | /* |
| 1247 | * The testcases use internal knowledge of the implementation that shouldn't |
| 1248 | * be exposed to the rest of the kernel. Include these directly here. |
| 1249 | */ |
| 1250 | #ifdef CONFIG_CPA_DEBUG |
| 1251 | #include "pageattr-test.c" |
| 1252 | #endif |