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XNNPACK Teamb455b122019-09-27 18:10:33 -07001// Copyright (c) Facebook, Inc. and its affiliates.
2// All rights reserved.
3//
4// Copyright 2019 Google LLC
5//
6// This source code is licensed under the BSD-style license found in the
7// LICENSE file in the root directory of this source tree.
8
9#pragma once
10
11#include <stddef.h>
12#include <stdint.h>
13
14#include <pthreadpool.h>
15
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -070016#include <xnnpack/params.h>
XNNPACK Teamb455b122019-09-27 18:10:33 -070017#include <xnnpack/compute.h>
18
19
20enum xnn_ukernel_type {
Marat Dukhanbef9a4d2020-11-19 13:29:28 -080021 xnn_ukernel_type_default = 0,
XNNPACK Teamb455b122019-09-27 18:10:33 -070022 xnn_ukernel_type_average_pooling,
Marat Dukhan1f29b802020-05-15 23:46:39 -070023 xnn_ukernel_type_conv2d_hwc2chw,
XNNPACK Teamb455b122019-09-27 18:10:33 -070024 xnn_ukernel_type_dwconv,
25 xnn_ukernel_type_gemm,
Marat Dukhan346a9e52019-11-15 09:06:30 -080026 xnn_ukernel_type_igemm,
XNNPACK Teamb455b122019-09-27 18:10:33 -070027 xnn_ukernel_type_pixelwise_average_pooling,
XNNPACK Teamb455b122019-09-27 18:10:33 -070028 xnn_ukernel_type_spmm,
29 xnn_ukernel_type_subconv2d,
XNNPACK Teamb455b122019-09-27 18:10:33 -070030 xnn_ukernel_type_vmulcaddc,
31};
32
33enum xnn_operator_type {
Marat Dukhan3b59de22020-06-03 20:15:19 -070034 xnn_operator_type_invalid = 0,
Marat Dukhan5020b962020-06-08 13:30:10 -070035 xnn_operator_type_abs_nc_f32,
Frank Barchard01898c02020-06-23 21:49:50 -070036 xnn_operator_type_add_nd_f16,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -080037 xnn_operator_type_add_nd_f32,
Marat Dukhanff209482020-09-03 14:26:53 -070038 xnn_operator_type_add_nd_qs8,
Marat Dukhandb007cd2021-07-20 23:42:39 -070039 xnn_operator_type_add_nd_qu8,
Marat Dukhanefc47b82019-11-18 09:25:38 -080040 xnn_operator_type_argmax_pooling_nhwc_f32,
41 xnn_operator_type_average_pooling_nhwc_f32,
Marat Dukhan08b7a972020-07-14 18:17:29 -070042 xnn_operator_type_average_pooling_nhwc_qu8,
Marat Dukhan64e52512020-06-09 13:41:16 -070043 xnn_operator_type_bankers_rounding_nc_f32,
Marat Dukhanefc47b82019-11-18 09:25:38 -080044 xnn_operator_type_channel_shuffle_nc_x8,
Marat Dukhan139e9612021-08-09 09:03:07 -070045 xnn_operator_type_channel_shuffle_nc_x32,
Marat Dukhanefc47b82019-11-18 09:25:38 -080046 xnn_operator_type_clamp_nc_f32,
Marat Dukhan61c0c9e2021-08-16 23:16:14 -070047 xnn_operator_type_clamp_nc_s8,
Marat Dukhanefc47b82019-11-18 09:25:38 -080048 xnn_operator_type_clamp_nc_u8,
Marat Dukhan64e52512020-06-09 13:41:16 -070049 xnn_operator_type_ceiling_nc_f32,
Marat Dukhan139e9612021-08-09 09:03:07 -070050 xnn_operator_type_constant_pad_nd_x8,
Marat Dukhan065b11e2020-05-22 09:49:41 -070051 xnn_operator_type_constant_pad_nd_x32,
Marat Dukhan4e21b272020-06-04 18:45:01 -070052 xnn_operator_type_convolution_nchw_f32,
Frank Barchard49b4dcc2020-06-26 14:07:19 -070053 xnn_operator_type_convolution_nhwc_f16,
Marat Dukhanefc47b82019-11-18 09:25:38 -080054 xnn_operator_type_convolution_nhwc_f32,
Marat Dukhan97262462021-06-18 16:14:17 -070055 xnn_operator_type_convolution_nhwc_qc8,
Marat Dukhan16f1e1a2020-08-04 16:38:22 -070056 xnn_operator_type_convolution_nhwc_qs8,
Marat Dukhan08b7a972020-07-14 18:17:29 -070057 xnn_operator_type_convolution_nhwc_qu8,
Marat Dukhan4e21b272020-06-04 18:45:01 -070058 xnn_operator_type_copy_nc_x32,
Marat Dukhanefc47b82019-11-18 09:25:38 -080059 xnn_operator_type_deconvolution_nhwc_f32,
Marat Dukhanbea849a2021-07-30 16:25:30 -070060 xnn_operator_type_deconvolution_nhwc_qs8,
Marat Dukhan08b7a972020-07-14 18:17:29 -070061 xnn_operator_type_deconvolution_nhwc_qu8,
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080062 xnn_operator_type_depth_to_space_nchw2nhwc_x32,
Marat Dukhan0e521172020-11-25 13:10:04 -080063 xnn_operator_type_depth_to_space_nhwc_x32,
Marat Dukhan69180502019-12-06 15:00:31 -080064 xnn_operator_type_divide_nd_f32,
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -080065 xnn_operator_type_elu_nc_f32,
Marat Dukhanefc47b82019-11-18 09:25:38 -080066 xnn_operator_type_fully_connected_nc_f32,
Marat Dukhand23cb6e2021-04-01 01:18:58 -070067 xnn_operator_type_fully_connected_nc_qs8,
Marat Dukhan08b7a972020-07-14 18:17:29 -070068 xnn_operator_type_fully_connected_nc_qu8,
Marat Dukhan64e52512020-06-09 13:41:16 -070069 xnn_operator_type_floor_nc_f32,
Frank Barchard7e2cbb02020-06-12 01:22:13 -070070 xnn_operator_type_global_average_pooling_nwc_f16,
Marat Dukhanefc47b82019-11-18 09:25:38 -080071 xnn_operator_type_global_average_pooling_nwc_f32,
Marat Dukhan9e0b5392020-08-07 02:29:34 -070072 xnn_operator_type_global_average_pooling_nwc_qs8,
Marat Dukhan08b7a972020-07-14 18:17:29 -070073 xnn_operator_type_global_average_pooling_nwc_qu8,
Marat Dukhanefc47b82019-11-18 09:25:38 -080074 xnn_operator_type_global_average_pooling_ncw_f32,
Frank Barcharda96948e2020-09-11 15:34:18 -070075 xnn_operator_type_hardswish_nc_f16,
Marat Dukhanefc47b82019-11-18 09:25:38 -080076 xnn_operator_type_hardswish_nc_f32,
Marat Dukhan28813332020-06-10 18:05:38 -070077 xnn_operator_type_leaky_relu_nc_f32,
Marat Dukhan08b7a972020-07-14 18:17:29 -070078 xnn_operator_type_leaky_relu_nc_qu8,
Marat Dukhanefc47b82019-11-18 09:25:38 -080079 xnn_operator_type_max_pooling_nhwc_f32,
Marat Dukhandc5c1482021-08-16 09:03:15 -070080 xnn_operator_type_max_pooling_nhwc_s8,
Marat Dukhanefc47b82019-11-18 09:25:38 -080081 xnn_operator_type_max_pooling_nhwc_u8,
Marat Dukhan79e7f842019-12-05 14:35:50 -080082 xnn_operator_type_maximum_nd_f32,
83 xnn_operator_type_minimum_nd_f32,
Frank Barchard0ea6a772020-09-09 15:26:31 -070084 xnn_operator_type_multiply_nd_f16,
Marat Dukhanefc47b82019-11-18 09:25:38 -080085 xnn_operator_type_multiply_nd_f32,
Marat Dukhan0853b8a2021-08-03 01:01:53 -070086 xnn_operator_type_multiply_nd_qs8,
87 xnn_operator_type_multiply_nd_qu8,
Marat Dukhan5020b962020-06-08 13:30:10 -070088 xnn_operator_type_negate_nc_f32,
Marat Dukhanefc47b82019-11-18 09:25:38 -080089 xnn_operator_type_prelu_nc_f32,
Artsiom Ablavatski97918102020-10-27 15:52:59 -070090 xnn_operator_type_resize_bilinear_nchw_f32,
Marat Dukhanefc47b82019-11-18 09:25:38 -080091 xnn_operator_type_resize_bilinear_nhwc_f32,
92 xnn_operator_type_sigmoid_nc_f32,
Marat Dukhan08b7a972020-07-14 18:17:29 -070093 xnn_operator_type_sigmoid_nc_qu8,
Marat Dukhanfd8e6892020-01-27 15:25:25 -080094 xnn_operator_type_softmax_nc_f32,
Marat Dukhan08b7a972020-07-14 18:17:29 -070095 xnn_operator_type_softmax_nc_qu8,
Marat Dukhan5020b962020-06-08 13:30:10 -070096 xnn_operator_type_square_nc_f32,
Marat Dukhan6804bbd2020-06-30 19:26:11 -070097 xnn_operator_type_square_root_nc_f32,
Marat Dukhanf7399262020-06-05 10:58:44 -070098 xnn_operator_type_squared_difference_nd_f32,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -080099 xnn_operator_type_subtract_nd_f32,
Marat Dukhan64e52512020-06-09 13:41:16 -0700100 xnn_operator_type_truncation_nc_f32,
Marat Dukhanefc47b82019-11-18 09:25:38 -0800101 xnn_operator_type_unpooling_nhwc_x32,
XNNPACK Teamb455b122019-09-27 18:10:33 -0700102};
103
Marat Dukhan1f29b802020-05-15 23:46:39 -0700104struct xnn_ukernel_conv2d {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700105 union {
Marat Dukhan1f29b802020-05-15 23:46:39 -0700106 xnn_conv_hwc2chw_ukernel_function hwc2chw_function;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700107 xnn_conv_hwc_ukernel_function hwc_function;
108 };
109 uint8_t output_height_tile;
110 uint8_t output_channel_tile;
111};
112
113struct xnn_ukernel_dwconv {
114 union {
Marat Dukhanaefaef32020-04-09 07:09:34 -0700115 xnn_dwconv_unipass_ukernel_function unipass_function;
116 xnn_dwconv_multipass_ukernel_function multipass_function;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700117 };
Marat Dukhanaefaef32020-04-09 07:09:34 -0700118 uint8_t primary_tile;
119 uint8_t incremental_tile;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700120};
121
122// Direct 2D Depthwise Convolution
123struct xnn_ukernel_dwconv2d {
124 union {
Marat Dukhanbf715f92020-10-23 20:17:00 -0700125 xnn_dwconv2d_chw_ukernel_function chw_function;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700126 };
XNNPACK Teamb455b122019-09-27 18:10:33 -0700127 uint8_t output_width_tile;
128};
129
130struct xnn_ukernel_gemm {
Marat Dukhan05702cf2020-03-26 15:41:33 -0700131 struct xnn_hmp_gemm_ukernel general_case;
132 struct xnn_hmp_gemm_ukernel mr1_case;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700133 uint8_t mr;
134 uint8_t nr;
135 uint8_t kr;
136};
137
138struct xnn_ukernel_igemm {
Marat Dukhan05702cf2020-03-26 15:41:33 -0700139 struct xnn_hmp_igemm_ukernel general_case;
140 struct xnn_hmp_igemm_ukernel mr1_case;
141 struct xnn_hmp_gemm_ukernel gemm_case;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700142 uint8_t mr;
143 uint8_t nr;
144 uint8_t kr;
145};
146
147struct xnn_ukernel_spmm {
148 xnn_spmm_ukernel_function function;
149 uint8_t mr;
150};
151
152struct xnn_ukernel_vmulcaddc {
153 xnn_vmulcaddc_ukernel_function function;
154 uint8_t mr;
155};
156
Frank Barchardc67dd7f2020-07-06 11:23:57 -0700157struct xnn_ukernel_vbinary {
Frank Barchard65beb1a2020-07-20 16:40:02 -0700158 xnn_vbinary_ukernel_function op_function;
159 xnn_vbinary_ukernel_function opc_function;
160 xnn_vbinary_ukernel_function ropc_function;
Frank Barchardc67dd7f2020-07-06 11:23:57 -0700161};
162
Frank Barchard62c5e232020-07-21 17:42:19 -0700163struct xnn_ukernel_vunary {
164 xnn_vunary_ukernel_function function;
165};
166
XNNPACK Teamb455b122019-09-27 18:10:33 -0700167struct xnn_ukernel {
168 enum xnn_ukernel_type type;
169 union {
Marat Dukhan1f29b802020-05-15 23:46:39 -0700170 struct xnn_ukernel_conv2d conv2d;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700171 struct xnn_ukernel_dwconv dwconv;
172 struct xnn_ukernel_dwconv2d dwconv2d;
173 struct xnn_ukernel_gemm gemm;
174 struct xnn_ukernel_igemm igemm;
175 struct xnn_ukernel_spmm spmm;
176 struct xnn_ukernel_vmulcaddc vmulcaddc;
Frank Barchardc67dd7f2020-07-06 11:23:57 -0700177 struct xnn_ukernel_vbinary vbinary;
Frank Barchard62c5e232020-07-21 17:42:19 -0700178 struct xnn_ukernel_vunary vunary;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700179 };
180};
181
182enum xnn_run_state {
183 xnn_run_state_invalid = 0,
184 xnn_run_state_ready,
185 xnn_run_state_skip,
186};
187
188struct subconvolution_params {
189 void* weights;
190 size_t w_stride;
191 const void** indirection_buffer;
192 void* output;
193 size_t slice_width;
194 size_t slice_height;
195 size_t indirection_y_stride;
196 size_t indirection_x_stride;
Marat Dukhan80fc9322019-09-29 21:06:36 -0700197 // scaled_kernel_size := kernel_size * mr * sizeof(void*).
XNNPACK Teamb455b122019-09-27 18:10:33 -0700198 size_t scaled_kernel_size;
199};
200
201struct xnn_operator {
202 size_t batch_size;
203 uint32_t padding_top;
204 uint32_t padding_right;
205 uint32_t padding_bottom;
206 uint32_t padding_left;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700207 uint32_t kernel_height;
208 uint32_t kernel_width;
209 uint32_t stride_height;
210 uint32_t stride_width;
211 uint32_t dilation_height;
212 uint32_t dilation_width;
213 uint32_t groups;
214 size_t group_channels;
215 size_t group_input_channels;
216 size_t group_output_channels;
217 size_t channels;
218
219 size_t pad_before_channels;
220 size_t pad_after_channels;
221 uint32_t pad_value;
222
223 size_t input_height;
224 size_t input_width;
225 size_t input_pixel_stride;
226 const void* input;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700227 const void* input2;
Marat Dukhan322b21e2020-11-24 21:30:38 -0800228 const void** indirection_buffer;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700229
230 size_t output_height;
231 size_t output_width;
232 size_t output_pixel_stride;
233 void* output;
234
235 void* packed_weights;
236 // Total number of non-zero kernel elements when weights use sparse representation.
237 size_t num_nonzero_values;
238 // Total number of non-zero kernel blocks when weights use sparse representation.
239 size_t num_nonzero_blocks;
240 // Total number of output channel blocks when weights use sparse representation.
241 size_t num_output_channel_blocks;
242 // Input channel corresponding to the first non-zero kernel element.
243 size_t first_input_channel;
244
245 float input_scale;
246 float output_scale;
Marat Dukhan54e95a02020-08-06 23:55:13 -0700247 int32_t input_zero_point;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700248 uint8_t output_zero_point;
249 uint8_t output_min;
250 uint8_t output_max;
251
252 size_t valid_batch_size;
253 size_t last_input_height;
254 size_t last_input_width;
255 const void* last_input;
Marat Dukhan69722492019-11-11 19:55:50 -0800256 size_t last_output_height;
257 size_t last_output_width;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700258 void* last_output;
259
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -0800260 uint32_t block_size;
261
XNNPACK Teamb455b122019-09-27 18:10:33 -0700262 void* zero_buffer;
263 void* lookup_table;
264 void* pixelwise_buffer;
265 struct subconvolution_params* subconvolution_buffer;
Marat Dukhan8440fde2019-10-24 12:46:13 -0700266 uint32_t flags;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700267
268 union {
Marat Dukhan5020b962020-06-08 13:30:10 -0700269 union xnn_f32_abs_params f32_abs;
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -0800270 union xnn_f32_elu_params f32_elu;
Marat Dukhan28813332020-06-10 18:05:38 -0700271 union xnn_f32_lrelu_params f32_lrelu;
Marat Dukhan5020b962020-06-08 13:30:10 -0700272 union xnn_f32_neg_params f32_neg;
Marat Dukhan64e52512020-06-09 13:41:16 -0700273 union xnn_f32_rnd_params f32_rnd;
Marat Dukhan5868d802020-03-19 17:18:45 -0700274 // Parameters for Global Average Pooling in CHW layout
Marat Dukhanc3065f52020-06-04 13:33:32 -0700275 union xnn_f32_gavgpool_params f32_gavgpool;
Frank Barcharda96948e2020-09-11 15:34:18 -0700276 struct xnn_f16_hswish_params f16_hswish;
Marat Dukhanc3065f52020-06-04 13:33:32 -0700277 union xnn_f32_hswish_params f32_hswish;
Marat Dukhan104ae5e2021-05-24 13:41:57 -0700278 struct xnn_f16_minmax_params f16_minmax;
279 struct xnn_f16_scaleminmax_params f16_scaleminmax;
Marat Dukhan8452ff52020-04-08 20:44:58 -0700280 // Pixelwise Average Pooling normally use f32_minmax_params, but also initialize
281 // f32_scaleminmax_params in case it needs to switch to Global Average Pooling operation.
Marat Dukhan5868d802020-03-19 17:18:45 -0700282 struct {
Marat Dukhanc3065f52020-06-04 13:33:32 -0700283 union xnn_f32_minmax_params f32_minmax;
284 union xnn_f32_scaleminmax_params f32_scaleminmax;
Marat Dukhan5868d802020-03-19 17:18:45 -0700285 };
Marat Dukhanc3065f52020-06-04 13:33:32 -0700286 union xnn_f32_chw_params f32_chw;
Marat Dukhane3d17bf2021-05-24 22:22:43 -0700287 union xnn_qs8_conv_minmax_params qs8_conv_minmax;
Marat Dukhan9e0b5392020-08-07 02:29:34 -0700288 // Average Pooling normally use qs8_avgpool_params, but also initialize qs8_gavgpool_params in case it needs to switch
289 // to Global Average Pooling operation.
290 struct {
291 union xnn_qs8_avgpool_params qs8_avgpool;
292 union xnn_qs8_avgpool_params qs8_gavgpool;
293 };
Marat Dukhanff209482020-09-03 14:26:53 -0700294 // Quantized Add parameters are sensitive to order of inputs, so we initialize an extra copy with the reversed order.
295 struct {
Marat Dukhan6e0fc392021-07-19 18:38:24 -0700296 union xnn_qs8_add_minmax_params qs8_add;
297 union xnn_qs8_add_minmax_params qs8_radd;
Marat Dukhanff209482020-09-03 14:26:53 -0700298 };
Marat Dukhandb007cd2021-07-20 23:42:39 -0700299 struct {
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700300 union xnn_qs8_mul_minmax_params qs8_mul;
301 union xnn_qs8_mul_minmax_params qs8_rmul;
302 };
303 struct {
Marat Dukhandb007cd2021-07-20 23:42:39 -0700304 union xnn_qu8_add_minmax_params qu8_add;
305 union xnn_qu8_add_minmax_params qu8_radd;
306 };
Marat Dukhan0853b8a2021-08-03 01:01:53 -0700307 struct {
308 union xnn_qu8_mul_minmax_params qu8_mul;
309 union xnn_qu8_mul_minmax_params qu8_rmul;
310 };
Marat Dukhane3d17bf2021-05-24 22:22:43 -0700311 union xnn_qu8_conv_minmax_params qu8_conv_minmax;
Marat Dukhan08b7a972020-07-14 18:17:29 -0700312 // Average Pooling normally use qu8_avgpool_params, but also initialize qu8_gavgpool_params in case it needs to switch
Marat Dukhan5868d802020-03-19 17:18:45 -0700313 // to Global Average Pooling operation.
314 struct {
Marat Dukhan08b7a972020-07-14 18:17:29 -0700315 union xnn_qu8_avgpool_params qu8_avgpool;
316 union xnn_qu8_avgpool_params qu8_gavgpool;
Marat Dukhan5868d802020-03-19 17:18:45 -0700317 };
Marat Dukhandc5c1482021-08-16 09:03:15 -0700318 union xnn_s8_minmax_params s8_minmax;
Marat Dukhanc3065f52020-06-04 13:33:32 -0700319 union xnn_u8_minmax_params u8_minmax;
320 } params;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700321 enum xnn_operator_type type;
322 struct xnn_ukernel ukernel;
323
324 struct compute_parameters compute;
325 struct compute_parameters compute2;
326 union {
XNNPACK Teamb455b122019-09-27 18:10:33 -0700327 struct argmax_pooling_context argmax_pooling;
328 struct average_pooling_context average_pooling;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700329 struct channel_shuffle_context channel_shuffle;
Marat Dukhan1f29b802020-05-15 23:46:39 -0700330 struct conv2d_context conv2d;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700331 struct dwconv2d_context dwconv2d;
332 struct dwconv_context dwconv;
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800333 struct depthtospace2d_chw2hwc_context depthtospace2d_chw;
Marat Dukhan0e521172020-11-25 13:10:04 -0800334 struct depthtospace2d_hwc_context depthtospace2d_hwc;
Marat Dukhanca2733c2019-11-15 23:21:17 -0800335 struct elementwise_binary_context elementwise_binary;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700336 struct gemm_context gemm;
Marat Dukhanefc47b82019-11-18 09:25:38 -0800337 struct global_average_pooling_nwc_context global_average_pooling_nwc;
338 struct global_average_pooling_ncw_context global_average_pooling_ncw;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700339 struct igemm_context igemm;
340 struct lut_contiguous_context lut_contiguous;
341 struct lut_strided_context lut_strided;
342 struct max_pooling_context max_pooling;
Marat Dukhan4662b192020-05-21 15:52:03 -0700343 struct pad_context pad;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700344 struct pixelwise_average_pooling_context pixelwise_average_pooling;
345 struct prelu_context prelu;
Marat Dukhan69722492019-11-11 19:55:50 -0800346 struct resize_bilinear_context resize_bilinear;
Artsiom Ablavatski97918102020-10-27 15:52:59 -0700347 struct resize_bilinear_chw_context resize_bilinear_chw;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700348 struct spmm_context spmm;
349 struct subconv_context subconv;
Marat Dukhan29954272020-02-13 17:56:11 -0800350 struct subgemm_context subgemm;
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800351 struct f32_three_pass_softmax_context f32_three_pass_softmax;
352 struct u8_softmax_context u8_softmax;
XNNPACK Teamb455b122019-09-27 18:10:33 -0700353 struct univector_contiguous_context univector_contiguous;
354 struct univector_strided_context univector_strided;
355 struct unpooling_context unpooling;
356 struct vmulcaddc_context vmulcaddc;
357 } context;
358
359 enum xnn_run_state state;
Marat Dukhan9cbaa632020-11-24 21:28:50 -0800360};