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gerrit-public.fairphone.software / platform / external / XNNPACK / f0bd4de095e04b5fea699569ef8204b7a9abb70c / . / BUILD.bazel
blob: 5de1b46b35edce5c9fc326206afa68110ed239ad [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]19 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]20 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]23MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]26 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]27 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]32ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]39MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]40 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]41 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]42 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]47OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]48 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]49 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]53OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]54 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]57 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]58 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]59 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
62 "src/operators/fully-connected-nc.c",
63 "src/operators/global-average-pooling-ncw.c",
64 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]65 "src/operators/leaky-relu-nc.c",
66 "src/operators/max-pooling-nhwc.c",
67 "src/operators/prelu-nc.c",
68 "src/operators/resize-bilinear-nhwc.c",
69 "src/operators/sigmoid-nc.c",
70 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame]71 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]72 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]73]
74
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]75SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]76 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]77 "src/subgraph/add2.c",
78 "src/subgraph/argmax-pooling-2d.c",
79 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]80 "src/subgraph/bankers-rounding.c",
81 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]82 "src/subgraph/clamp.c",
83 "src/subgraph/convolution-2d.c",
84 "src/subgraph/deconvolution-2d.c",
85 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]86 "src/subgraph/divide.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]87 "src/subgraph/fully-connected.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]88 "src/subgraph/floor.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]89 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]90 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]91 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]92 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]93 "src/subgraph/maximum2.c",
94 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]95 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]96 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]97 "src/subgraph/prelu.c",
98 "src/subgraph/sigmoid.c",
99 "src/subgraph/softmax.c",
100 "src/subgraph/static-constant-pad.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]101 "src/subgraph/square.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]102 "src/subgraph/squared-difference.c",
103 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]104 "src/subgraph/unpooling-2d.c",
105]
106
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]107TABLE_SRCS = [
108 "src/tables/exp2-k-over-64.c",
109 "src/tables/exp2-k-over-2048.c",
110]
111
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]112SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]113 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]114 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]115 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]116 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
117 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]118 "src/f32-clamp/gen/scalar-x1.c",
119 "src/f32-clamp/gen/scalar-x2.c",
120 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]121 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]122 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]123 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
124 "src/f32-dwconv-chw/3x3p1-scalar.c",
125 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
126 "src/f32-dwconv-chw/5x5p2-scalar.c",
127 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]128 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
129 "src/f32-dwconv/gen/up1x4-scalar.c",
130 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
131 "src/f32-dwconv/gen/up1x9-scalar.c",
132 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
133 "src/f32-dwconv/gen/up1x25-scalar.c",
134 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
135 "src/f32-dwconv/gen/up2x4-scalar.c",
136 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
137 "src/f32-dwconv/gen/up2x9-scalar.c",
138 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
139 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]140 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
142 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
143 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]144 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]150 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
151 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]152 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]153 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
154 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]155 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
156 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
157 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]158 "src/f32-gemm/gen/1x4-scalar.c",
159 "src/f32-gemm/gen/2x4-scalar.c",
160 "src/f32-gemm/gen/4x2-scalar.c",
161 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]162 "src/f32-gemm/gen/1x4-relu-scalar.c",
163 "src/f32-gemm/gen/2x4-relu-scalar.c",
164 "src/f32-gemm/gen/4x2-relu-scalar.c",
165 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]166 "src/f32-gemm/gen/1x4-minmax-scalar.c",
167 "src/f32-gemm/gen/2x4-minmax-scalar.c",
168 "src/f32-gemm/gen/4x2-minmax-scalar.c",
169 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]170 "src/f32-hswish/gen/scalar-x1.c",
171 "src/f32-hswish/gen/scalar-x2.c",
172 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]173 "src/f32-ibilinear/gen/scalar-c1.c",
174 "src/f32-ibilinear/gen/scalar-c2.c",
175 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]176 "src/f32-igemm/gen/1x4-scalar.c",
177 "src/f32-igemm/gen/2x4-scalar.c",
178 "src/f32-igemm/gen/4x2-scalar.c",
179 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]180 "src/f32-igemm/gen/1x4-relu-scalar.c",
181 "src/f32-igemm/gen/2x4-relu-scalar.c",
182 "src/f32-igemm/gen/4x2-relu-scalar.c",
183 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]184 "src/f32-igemm/gen/1x4-minmax-scalar.c",
185 "src/f32-igemm/gen/2x4-minmax-scalar.c",
186 "src/f32-igemm/gen/4x2-minmax-scalar.c",
187 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]188 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
189 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
190 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]191 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
192 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
193 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
194 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]195 "src/f32-prelu/gen/scalar-2x1.c",
196 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]197 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
198 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
199 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
200 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
201 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
202 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
203 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
204 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
205 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
206 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
207 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
208 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]209 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]210 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
211 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
212 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
213 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
214 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
215 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
216 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
217 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
218 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]219 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
220 "src/f32-spmm/gen/1x1-minmax-scalar.c",
221 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
222 "src/f32-spmm/gen/2x1-minmax-scalar.c",
223 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
224 "src/f32-spmm/gen/4x1-minmax-scalar.c",
225 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
226 "src/f32-spmm/gen/8x1-minmax-scalar.c",
227 "src/f32-spmm/gen/8x2-minmax-scalar.c",
228 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]229 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
232 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
233 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
234 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
235 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
236 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
237 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
238 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
239 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
240 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]241 "src/f32-vbinary/gen/vmax-scalar-x1.c",
242 "src/f32-vbinary/gen/vmax-scalar-x2.c",
243 "src/f32-vbinary/gen/vmax-scalar-x4.c",
244 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
245 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
246 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
247 "src/f32-vbinary/gen/vmin-scalar-x1.c",
248 "src/f32-vbinary/gen/vmin-scalar-x2.c",
249 "src/f32-vbinary/gen/vmin-scalar-x4.c",
250 "src/f32-vbinary/gen/vminc-scalar-x1.c",
251 "src/f32-vbinary/gen/vminc-scalar-x2.c",
252 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]253 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
254 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
255 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
256 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
259 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
260 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
261 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]262 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x1.c",
263 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x2.c",
264 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]265 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
266 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
267 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]268 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
269 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
270 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
271 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
272 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
273 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]274 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
275 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
276 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
277 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
278 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
279 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]280 "src/f32-vlrelu/gen/scalar-x1.c",
281 "src/f32-vlrelu/gen/scalar-x2.c",
282 "src/f32-vlrelu/gen/scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]283 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
284 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
285 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]286 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
287 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
288 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
289 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
290 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
291 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
292 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
293 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
294 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
295 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
296 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
297 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]298 "src/f32-vunary/gen/vabs-scalar-x1.c",
299 "src/f32-vunary/gen/vabs-scalar-x2.c",
300 "src/f32-vunary/gen/vabs-scalar-x4.c",
301 "src/f32-vunary/gen/vneg-scalar-x1.c",
302 "src/f32-vunary/gen/vneg-scalar-x2.c",
303 "src/f32-vunary/gen/vneg-scalar-x4.c",
304 "src/f32-vunary/gen/vsqr-scalar-x1.c",
305 "src/f32-vunary/gen/vsqr-scalar-x2.c",
306 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]307 "src/math/expminus-scalar-lut2048-p1.c",
308 "src/math/expminus-scalar-lut64-p2.c",
309 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]310 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]311 "src/math/roundne-scalar-nearbyint.c",
312 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]313 "src/math/roundd-scalar-addsub.c",
314 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]315 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]316 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]317 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]318 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]319 "src/math/roundz-scalar-addsub.c",
320 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]321 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]322 "src/math/sigmoid-scalar-lut2048-p1-div.c",
323 "src/math/sigmoid-scalar-lut64-p2-div.c",
324 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]325 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
326 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]327 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]328 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
329 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]330 "src/q8-gemm/2x2-minmax-scalar.c",
331 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]332 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]333 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]334 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]335 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]336 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]337 "src/x32-fill/scalar-float.c",
338 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]339 "src/x32-packx/x2-scalar.c",
340 "src/x32-packx/x3-scalar.c",
341 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]342 "src/x32-pad/scalar-int.c",
343 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]344 "src/x32-unpool/scalar.c",
345 "src/x32-zip/x2-scalar.c",
346 "src/x32-zip/x3-scalar.c",
347 "src/x32-zip/x4-scalar.c",
348 "src/x32-zip/xm-scalar.c",
349 "src/x8-lut/scalar.c",
350 "src/x8-zip/x2-scalar.c",
351 "src/x8-zip/x3-scalar.c",
352 "src/x8-zip/x4-scalar.c",
353 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]354 "src/requantization/precise-scalar.c",
355 "src/requantization/fp32-scalar.c",
356 "src/requantization/q31-scalar.c",
357 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]358]
359
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]360WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]361 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
362 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]363 "src/f32-clamp/gen/wasm-x1.c",
364 "src/f32-clamp/gen/wasm-x2.c",
365 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]366 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
367 "src/f32-dwconv/gen/up1x4-wasm.c",
368 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
369 "src/f32-dwconv/gen/up1x9-wasm.c",
370 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
371 "src/f32-dwconv/gen/up1x25-wasm.c",
372 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
373 "src/f32-dwconv/gen/up2x4-wasm.c",
374 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
375 "src/f32-dwconv/gen/up2x9-wasm.c",
376 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
377 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]378 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
379 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
380 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
381 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]382 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
383 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]384 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
385 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
386 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
387 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]388 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
389 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]390 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
391 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]392 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
393 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
394 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]395 "src/f32-gemm/gen/1x4-wasm.c",
396 "src/f32-gemm/gen/2x4-wasm.c",
397 "src/f32-gemm/gen/4x2-wasm.c",
398 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]399 "src/f32-gemm/gen/1x4-relu-wasm.c",
400 "src/f32-gemm/gen/2x4-relu-wasm.c",
401 "src/f32-gemm/gen/4x2-relu-wasm.c",
402 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]403 "src/f32-gemm/gen/1x4-minmax-wasm.c",
404 "src/f32-gemm/gen/2x4-minmax-wasm.c",
405 "src/f32-gemm/gen/4x2-minmax-wasm.c",
406 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]407 "src/f32-hswish/gen/wasm-x1.c",
408 "src/f32-hswish/gen/wasm-x2.c",
409 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]410 "src/f32-igemm/gen/1x4-wasm.c",
411 "src/f32-igemm/gen/2x4-wasm.c",
412 "src/f32-igemm/gen/4x2-wasm.c",
413 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]414 "src/f32-igemm/gen/1x4-relu-wasm.c",
415 "src/f32-igemm/gen/2x4-relu-wasm.c",
416 "src/f32-igemm/gen/4x2-relu-wasm.c",
417 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]418 "src/f32-igemm/gen/1x4-minmax-wasm.c",
419 "src/f32-igemm/gen/2x4-minmax-wasm.c",
420 "src/f32-igemm/gen/4x2-minmax-wasm.c",
421 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]422 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
423 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
424 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]425 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
426 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
427 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
428 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
429 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
430 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
431 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
432 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
433 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
434 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
435 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
436 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]437 "src/f32-vbinary/gen/vmax-wasm-x1.c",
438 "src/f32-vbinary/gen/vmax-wasm-x2.c",
439 "src/f32-vbinary/gen/vmax-wasm-x4.c",
440 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
441 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
442 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
443 "src/f32-vbinary/gen/vmin-wasm-x1.c",
444 "src/f32-vbinary/gen/vmin-wasm-x2.c",
445 "src/f32-vbinary/gen/vmin-wasm-x4.c",
446 "src/f32-vbinary/gen/vminc-wasm-x1.c",
447 "src/f32-vbinary/gen/vminc-wasm-x2.c",
448 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]449 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
450 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
451 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
452 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
453 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
454 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
455 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
456 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
457 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
458 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
459 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
460 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
461 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
462 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
463 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
464 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
465 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
466 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]467 "src/f32-vlrelu/gen/wasm-x1.c",
468 "src/f32-vlrelu/gen/wasm-x2.c",
469 "src/f32-vlrelu/gen/wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]470 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
471 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
472 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]473]
474
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]475WASMSIMD_UKERNELS = [
476 "src/requantization/fp32-wasmsimd.c",
477]
478
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]479PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]480 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]481 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]482 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]483 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
484 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]485 "src/f32-clamp/gen/psimd-x4.c",
486 "src/f32-clamp/gen/psimd-x8.c",
Erich Elsen0a1970e2020-06-10 09:24:59 -0700[diff] [blame]487 "src/f32-conv-hwc2chw/3x3s2p1c3x4-psimd-2x2.c",
Erich Elsene6214af2020-06-10 22:17:22 -0700[diff] [blame]488 "src/f32-dwconv-chw/3x3p1-psimd.c",
Erich Elsenfd7a6e32020-06-11 12:04:44 -0700[diff] [blame]489 "src/f32-dwconv-chw/3x3s2p1-psimd.c",
Erich Elsen28928892020-06-12 08:08:19 -0700[diff] [blame]490 "src/f32-dwconv-chw/5x5p2-psimd.c",
Erich Elsen7465a892020-06-13 14:02:04 -0700[diff] [blame]491 "src/f32-dwconv-chw/5x5s2p2-psimd.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]492 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
493 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
494 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
495 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
496 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
497 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
498 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
499 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
500 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
501 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
502 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
503 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Erich Elsen6f278b52020-06-10 16:13:11 -0700[diff] [blame]504 "src/f32-gavgpool-cw/psimd-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]505 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
506 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]507 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
508 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
509 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
510 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
511 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
512 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
513 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
514 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
515 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
516 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
517 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
518 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
519 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
520 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
521 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
522 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
523 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
524 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
525 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]526 "src/f32-hswish/gen/psimd-x4.c",
527 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]528 "src/f32-ibilinear/gen/psimd-c4.c",
529 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]530 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
531 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
532 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
533 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
534 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
535 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
536 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
537 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
538 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
539 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]540 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]541 "src/f32-spmm/gen/4x1-minmax-psimd.c",
542 "src/f32-spmm/gen/8x1-minmax-psimd.c",
543 "src/f32-spmm/gen/16x1-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]544 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
545 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]546 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]547 "src/f32-prelu/gen/psimd-2x4.c",
548 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]549 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]550 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
551 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
552 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
553 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
554 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
555 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
556 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
557 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]558 "src/f32-vbinary/gen/vmax-psimd-x4.c",
559 "src/f32-vbinary/gen/vmax-psimd-x8.c",
560 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
561 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
562 "src/f32-vbinary/gen/vmin-psimd-x4.c",
563 "src/f32-vbinary/gen/vmin-psimd-x8.c",
564 "src/f32-vbinary/gen/vminc-psimd-x4.c",
565 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]566 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
567 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
568 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
569 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
570 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
571 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]572 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x4.c",
573 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]574 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
575 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]576 "src/f32-vbinary/gen/vsqrdiff-psimd-x4.c",
577 "src/f32-vbinary/gen/vsqrdiff-psimd-x8.c",
578 "src/f32-vbinary/gen/vsqrdiffc-psimd-x4.c",
579 "src/f32-vbinary/gen/vsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]580 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
581 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
582 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
583 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]584 "src/f32-vlrelu/gen/psimd-x4.c",
585 "src/f32-vlrelu/gen/psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]586 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
587 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]588 "src/f32-vunary/gen/vabs-psimd-x4.c",
589 "src/f32-vunary/gen/vabs-psimd-x8.c",
590 "src/f32-vunary/gen/vneg-psimd-x4.c",
591 "src/f32-vunary/gen/vneg-psimd-x8.c",
592 "src/f32-vunary/gen/vsqr-psimd-x4.c",
593 "src/f32-vunary/gen/vsqr-psimd-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]594 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]595 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]596 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]597 "src/x32-unpool/psimd.c",
598 "src/x32-zip/x2-psimd.c",
599 "src/x32-zip/x3-psimd.c",
600 "src/x32-zip/x4-psimd.c",
601 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]602 "src/requantization/precise-psimd.c",
603 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]604]
605
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]606PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]607 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
608 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
609 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
610 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
611 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
612 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
613 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
614 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
615 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
616 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
617 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
618 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]619 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
620 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
621 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
622 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
623 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
624 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]625 "src/f32-vrnd/gen/vrndne-psimd-x4.c",
626 "src/f32-vrnd/gen/vrndne-psimd-x8.c",
627 "src/f32-vrnd/gen/vrndz-psimd-x4.c",
628 "src/f32-vrnd/gen/vrndz-psimd-x8.c",
629 "src/f32-vrnd/gen/vrndu-psimd-x4.c",
630 "src/f32-vrnd/gen/vrndu-psimd-x8.c",
631 "src/f32-vrnd/gen/vrndd-psimd-x4.c",
632 "src/f32-vrnd/gen/vrndd-psimd-x8.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]633 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]634 "src/math/roundd-psimd-addsub.c",
635 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]636 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]637 "src/math/sigmoid-psimd-p5-div.c",
638]
639
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]640# ISA-specific micro-kernels
641NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]642 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
643 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]644 "src/f32-clamp/gen/neon-x4.c",
645 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]646 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
647 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]648 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
649 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]650 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
651 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]652 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
653 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]654 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
655 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
656 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
657 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]658 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
659 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
660 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
661 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]662 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
663 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
664 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
665 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]666 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]667 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
668 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]669 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
670 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
671 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
672 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
673 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
674 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
675 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
676 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
677 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
678 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
679 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
680 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
681 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
682 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
683 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
684 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
685 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
686 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
687 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
688 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
689 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
690 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
691 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
692 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
693 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
694 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
695 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
696 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
697 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
698 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
699 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]700 "src/f32-hswish/gen/neon-x4.c",
701 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]702 "src/f32-ibilinear/gen/neon-c4.c",
703 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]704 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
705 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
706 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
707 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
708 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
709 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
710 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
711 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
712 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
713 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
714 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
715 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
716 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
717 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
718 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
719 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]720 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
721 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
722 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]723 "src/f32-ppmm/gen/4x8-minmax-neon.c",
724 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]725 "src/f32-prelu/gen/neon-2x4.c",
726 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]727 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
728 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
729 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
730 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
731 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
732 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
733 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
734 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
735 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
736 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
737 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
738 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
739 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
740 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
741 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
742 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
743 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
744 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
745 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
746 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
747 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
748 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
749 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
750 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]751 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]752 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]753 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
754 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
755 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
756 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
757 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
758 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
759 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
760 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
761 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
762 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
763 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
764 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
765 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
766 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
767 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
768 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
769 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
770 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]771 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
772 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
773 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
774 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]775 "src/f32-vbinary/gen/vmax-neon-x4.c",
776 "src/f32-vbinary/gen/vmax-neon-x8.c",
777 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
778 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
779 "src/f32-vbinary/gen/vmin-neon-x4.c",
780 "src/f32-vbinary/gen/vmin-neon-x8.c",
781 "src/f32-vbinary/gen/vminc-neon-x4.c",
782 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]783 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
784 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
785 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
786 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]787 "src/f32-vbinary/gen/vrsqrdiffc-neon-x4.c",
788 "src/f32-vbinary/gen/vrsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]789 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
790 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]791 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
792 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
793 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
794 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]795 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
796 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
797 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
798 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]799 "src/f32-vlrelu/gen/neon-x4.c",
800 "src/f32-vlrelu/gen/neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]801 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
802 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]803 "src/f32-vrnd/gen/vrndne-neon-x4.c",
804 "src/f32-vrnd/gen/vrndne-neon-x8.c",
805 "src/f32-vrnd/gen/vrndz-neon-x4.c",
806 "src/f32-vrnd/gen/vrndz-neon-x8.c",
807 "src/f32-vrnd/gen/vrndu-neon-x4.c",
808 "src/f32-vrnd/gen/vrndu-neon-x8.c",
809 "src/f32-vrnd/gen/vrndd-neon-x4.c",
810 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]811 "src/f32-vunary/gen/vabs-neon-x4.c",
812 "src/f32-vunary/gen/vabs-neon-x8.c",
813 "src/f32-vunary/gen/vneg-neon-x4.c",
814 "src/f32-vunary/gen/vneg-neon-x8.c",
815 "src/f32-vunary/gen/vsqr-neon-x4.c",
816 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]817 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
818 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]819 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]820 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
821 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]822 "src/q8-gemm/4x8-minmax-neon.c",
823 "src/q8-gemm/8x8-minmax-neon.c",
824 "src/q8-igemm/4x8-minmax-neon.c",
825 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]826 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]827 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]828 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]829 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]830 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]831 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]832 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]833 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]834 "src/x32-zip/x2-neon.c",
835 "src/x32-zip/x3-neon.c",
836 "src/x32-zip/x4-neon.c",
837 "src/x32-zip/xm-neon.c",
838 "src/x8-zip/x2-neon.c",
839 "src/x8-zip/x3-neon.c",
840 "src/x8-zip/x4-neon.c",
841 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]842 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]843 "src/math/roundd-neon-addsub.c",
844 "src/math/roundd-neon-cvt.c",
845 "src/math/roundu-neon-addsub.c",
846 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]847 "src/math/roundz-neon-addsub.c",
848 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]849 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]850 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
851 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
852 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
853 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
854 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
855 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]856 "src/requantization/precise-neon.c",
857 "src/requantization/fp32-neon.c",
858 "src/requantization/q31-neon.c",
859 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]860]
861
862NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]863 "src/f32-ibilinear/gen/neonfma-c4.c",
864 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]865 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
866 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
867 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
868 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
869 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
870 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
871 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
872 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
873 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]874 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
875 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
876 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
877 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]878 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
879 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
880 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
881 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]882 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
883 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
884 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
885 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]886 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
887 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
888 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
889 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
890 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
891 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
892 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
893 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
894 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
895 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
896 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
897 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
898 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
899 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
900 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
901 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
902 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
903 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]904 "src/f32-hswish/gen/neonfma-x4.c",
905 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]906 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
907 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]908 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
909 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
910 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
911 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
912 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
913 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
914 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
915 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
916 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
917 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
918 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
919 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
920 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
921 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
922 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
923 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
924 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
925 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
926 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
927 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
928 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
929 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
930 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
931 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]932 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
933 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
934 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
935 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
936 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
937 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
938 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
939 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
940 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
941 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
942 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
943 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
944 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
945 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
946 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
947 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
948 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
949 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
950 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
951 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
952 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
953 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
954 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
955 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
956 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
957 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
958 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
959 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
960 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
961 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
962 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
963 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
964 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
965 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
966 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
967 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
968 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
969 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
970 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
971 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
972 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
973 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
974 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
975 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
976 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
977 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
978 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
979 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
980 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
981 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
982 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
983 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
984 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
985 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]986 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
987 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]988 "src/math/exp-neonfma-lut64-p2.c",
989 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]990 "src/math/expminus-neonfma-lut2048-p1.c",
991 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]992 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]993 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
994 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
995 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
996 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
997 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
998 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
999 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
1000 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
1001 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
1002 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
1003 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
1004 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
1005 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
1006 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
1007 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
1008 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
1009 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
1010 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1011]
1012
1013AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1014 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
1015 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
1016 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
1017 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
1018 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
1019 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1020 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1021 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1022 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1023 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1024 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
1025 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1026 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
1027 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
1028 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
1029 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
1030 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
1031 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
1032 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
1033 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1034 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1035 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
1036 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1037 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1038 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1039 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1040 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
1041 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1042 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
1043 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1044 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
1045 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1046 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
1047 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1048 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
1049 "src/f32-dwconv-chw/3x3p1-neonfma.c",
1050 "src/f32-dwconv-chw/5x5p2-neonfma.c",
1051 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
1052 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1053 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
1054 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
1055 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
1056 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x16.c",
1057 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x20.c",
1058 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x24.c",
1059 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x4.c",
1060 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x8.c",
1061 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
1062 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
1063 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
1064 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
1065 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
1066 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
1067 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
1068 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
1069 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
1070 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1071 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1072 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
1073 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
1074 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1075 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
1076 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1077 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
1078 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
1079 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1080 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
1081 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1082 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
1083 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
1084 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1085 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
1086 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1087 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
1088 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1089 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
1090 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
1091 "src/math/sigmoid-neonfma-rr1-p5-div.c",
1092 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
1093 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
1094 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1095]
1096
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1097NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1098 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
1099 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
1100 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
1101 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
1102 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
1103 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
1104 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
1105 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1106 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1107 "src/math/roundd-neonv8.c",
1108 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1109 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1110]
1111
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1112AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1113 "src/f16-clamp/gen/neonfp16arith-x16.c",
1114 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]1115 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
1116 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
1117 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
1118 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
1119 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
1120 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
1121 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
1122 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
1123 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
1124 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
1125 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
1126 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1127 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
1128 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1129 "src/f16-hswish/gen/neonfp16arith-x16.c",
1130 "src/f16-hswish/gen/neonfp16arith-x8.c",
1131 "src/f16-prelu/gen/neonfp16arith-2x16.c",
1132 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1133 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
1134 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
1135 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
1136 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
1137 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
1138 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
1139 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
1140 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
1141 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
1142 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
1143 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
1144 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
1145 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
1146 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
1147 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
1148 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1149 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1150 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1151 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1152 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1153 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1154 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
1155 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
1156 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
1157 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
1158 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
1159 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1160 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1161 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1162 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1163 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1164 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1165 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1166 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1167 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1168 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1169 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1170 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1171 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1172 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1173 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1174 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1175 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1176 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1177 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1178 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1179 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1180 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1181 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1182 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1183 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1184 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1185 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1186 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1187 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1188 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1189 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1190 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1191 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1192 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1193 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1194 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1195]
1196
1197SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1198 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
1199 "src/f32-avgpool/9x-minmax-sse-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1200 "src/f32-clamp/gen/sse-x4.c",
1201 "src/f32-clamp/gen/sse-x8.c",
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]1202 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
1203 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1204 "src/f32-dwconv-chw/3x3p1-sse.c",
1205 "src/f32-dwconv-chw/3x3s2p1-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1206 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1207 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1208 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
1209 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
1210 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
1211 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
1212 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
1213 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
1214 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
1215 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
1216 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1217 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1218 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1219 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1220 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1221 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
1222 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
1223 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
1224 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
1225 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1226 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1227 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1228 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1229 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1230 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
1231 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
1232 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1233 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1234 "src/f32-hswish/gen/sse-x4.c",
1235 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1236 "src/f32-ibilinear/gen/sse-c4.c",
1237 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1238 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1239 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1240 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
1241 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
1242 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
1243 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1244 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1245 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
1246 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
1247 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1248 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1249 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1250 "src/f32-spmm/gen/4x1-minmax-sse.c",
1251 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]1252 "src/f32-spmm/gen/16x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1253 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1254 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1255 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1256 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1257 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1258 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1259 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1260 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1261 "src/f32-vbinary/gen/vmax-sse-x4.c",
1262 "src/f32-vbinary/gen/vmax-sse-x8.c",
1263 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1264 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1265 "src/f32-vbinary/gen/vmin-sse-x4.c",
1266 "src/f32-vbinary/gen/vmin-sse-x8.c",
1267 "src/f32-vbinary/gen/vminc-sse-x4.c",
1268 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1269 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1270 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1271 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1272 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1273 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
1274 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1275 "src/f32-vbinary/gen/vrsqrdiffc-sse-x4.c",
1276 "src/f32-vbinary/gen/vrsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1277 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1278 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1279 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
1280 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
1281 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
1282 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1283 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1284 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1285 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1286 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1287 "src/f32-vlrelu/gen/sse-x4.c",
1288 "src/f32-vlrelu/gen/sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1289 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1290 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1291 "src/f32-vunary/gen/vabs-sse-x4.c",
1292 "src/f32-vunary/gen/vabs-sse-x8.c",
1293 "src/f32-vunary/gen/vneg-sse-x4.c",
1294 "src/f32-vunary/gen/vneg-sse-x8.c",
1295 "src/f32-vunary/gen/vsqr-sse-x4.c",
1296 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1297 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1298 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1299 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1300 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1301 "src/math/roundd-sse-addsub.c",
1302 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1303 "src/math/roundz-sse-addsub.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1304]
1305
1306SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1307 "src/f32-argmaxpool/9p8x-sse2-c4.c",
1308 "src/f32-argmaxpool/4x-sse2-c4.c",
1309 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1310 "src/f32-prelu/gen/sse2-2x4.c",
1311 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1312 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
1313 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
1314 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
1315 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
1316 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
1317 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
1318 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
1319 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
1320 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
1321 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
1322 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
1323 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1324 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1325 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1326 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1327 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1328 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
1329 "src/f32-sigmoid/gen/sse2-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1330 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
1331 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
1332 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
1333 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
1334 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
1335 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
1336 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
1337 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1338 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1339 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1340 "src/q8-igemm/4x4c2-minmax-sse2.c",
1341 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1342 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1343 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1344 "src/q8-gemm/2x4c8-minmax-sse2.c",
1345 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1346 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1347 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1348 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1349 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1350 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1351 "src/x32-zip/x2-sse2.c",
1352 "src/x32-zip/x3-sse2.c",
1353 "src/x32-zip/x4-sse2.c",
1354 "src/x32-zip/xm-sse2.c",
1355 "src/x8-zip/x2-sse2.c",
1356 "src/x8-zip/x3-sse2.c",
1357 "src/x8-zip/x4-sse2.c",
1358 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1359 "src/math/exp-sse2-p5.c",
1360 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1361 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1362 "src/math/roundd-sse2-cvt.c",
1363 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1364 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1365 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1366 "src/requantization/precise-sse2.c",
1367 "src/requantization/fp32-sse2.c",
1368 "src/requantization/q31-sse2.c",
1369 "src/requantization/gemmlowp-sse2.c",
1370]
1371
1372SSSE3_UKERNELS = [
1373 "src/requantization/precise-ssse3.c",
1374 "src/requantization/q31-ssse3.c",
1375 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1376]
1377
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1378SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1379 "src/f32-prelu/gen/sse41-2x4.c",
1380 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1381 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1382 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1383 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1384 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1385 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1386 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1387 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
1388 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
1389 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
1390 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
1391 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
1392 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
1393 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
1394 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1395 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1396 "src/math/roundd-sse41.c",
1397 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1398 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1399 "src/requantization/precise-sse4.c",
1400 "src/requantization/q31-sse4.c",
1401 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1402]
1403
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1404AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1405 "src/f32-clamp/gen/avx-x8.c",
1406 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1407 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1408 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1409 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1410 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
1411 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
1412 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1413 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1414 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1415 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1416 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1417 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1418 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1419 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1420 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1421 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1422 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1423 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1424 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1425 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1426 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1427 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1428 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1429 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1430 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1431 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1432 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1433 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1434 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1435 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1436 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1437 "src/f32-hswish/gen/avx-x8.c",
1438 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1439 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1440 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1441 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1442 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1443 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1444 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1445 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1446 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1447 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1448 "src/f32-prelu/gen/avx-2x8.c",
1449 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1450 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1451 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1452 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1453 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1454 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1455 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1456 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
1457 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
1458 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1459 "src/f32-vbinary/gen/vmax-avx-x8.c",
1460 "src/f32-vbinary/gen/vmax-avx-x16.c",
1461 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1462 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1463 "src/f32-vbinary/gen/vmin-avx-x8.c",
1464 "src/f32-vbinary/gen/vmin-avx-x16.c",
1465 "src/f32-vbinary/gen/vminc-avx-x8.c",
1466 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1467 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1468 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1469 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1470 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1471 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1472 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1473 "src/f32-vbinary/gen/vrsqrdiffc-avx-x8.c",
1474 "src/f32-vbinary/gen/vrsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1475 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1476 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1477 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
1478 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
1479 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
1480 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1481 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
1482 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
1483 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1484 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1485 "src/f32-vlrelu/gen/avx-x8.c",
1486 "src/f32-vlrelu/gen/avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1487 "src/f32-vscale/avx-unroll32.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1488 "src/f32-vrnd/gen/vrndne-avx-x8.c",
1489 "src/f32-vrnd/gen/vrndne-avx-x16.c",
1490 "src/f32-vrnd/gen/vrndz-avx-x8.c",
1491 "src/f32-vrnd/gen/vrndz-avx-x16.c",
1492 "src/f32-vrnd/gen/vrndu-avx-x8.c",
1493 "src/f32-vrnd/gen/vrndu-avx-x16.c",
1494 "src/f32-vrnd/gen/vrndd-avx-x8.c",
1495 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1496 "src/f32-vunary/gen/vabs-avx-x8.c",
1497 "src/f32-vunary/gen/vabs-avx-x16.c",
1498 "src/f32-vunary/gen/vneg-avx-x8.c",
1499 "src/f32-vunary/gen/vneg-avx-x16.c",
1500 "src/f32-vunary/gen/vsqr-avx-x8.c",
1501 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1502]
1503
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1504FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1505 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
1506 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
1507 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
1508 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
1509 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
1510 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
1511 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
1512 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
1513 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
1514 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
1515 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
1516 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
1517 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1518 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1519 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
1520 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
1521 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
1522 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
1523 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
1524 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
1525 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
1526 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
1527 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
1528 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
1529 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
1530 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
1531 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
1532 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
1533 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
1534 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
1535 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
1536 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
1537 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
1538 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1539 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1540 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1541 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
1542 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
1543 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
1544 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1545 "src/f32-hswish/gen/fma3-x8.c",
1546 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1547 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1548 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1549 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1550 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1551 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1552 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
1553 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
1554 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
1555 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
1556 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
1557 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
1558 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
1559 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
1560 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1561]
1562
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1563AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1564 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
1565 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
1566 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
1567 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
1568 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
1569 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
1570 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
1571 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
1572 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
1573 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
1574 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
1575 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
1576 "src/f32-raddextexp/gen/avx2-p5-x64.c",
1577 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
1578 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
1579 "src/f32-raddextexp/gen/avx2-p5-x72.c",
1580 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
1581 "src/f32-raddextexp/gen/avx2-p5-x80.c",
1582 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
1583 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
1584 "src/f32-raddextexp/gen/avx2-p5-x96.c",
1585 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
1586 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
1587 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
1588 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
1589 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
1590 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
1591 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
1592 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
1593 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
1594 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
1595 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
1596 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
1597 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
1598 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
1599 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1600 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
1601 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x16.c",
1602 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x24.c",
1603 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x32.c",
1604 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x40.c",
1605 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x48.c",
1606 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x56.c",
1607 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x64.c",
1608 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x72.c",
1609 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x80.c",
1610 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1611 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1612 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1613 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1614 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1615 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1616 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1617 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1618 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1619 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1620 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1621 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1622 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1623 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1624 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1625 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1626 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1627 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1628 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1629 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1630 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1631 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1632 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1633 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1634 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1635 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1636 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1637 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1638 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1639 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1640 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1641 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1642 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1643 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1644 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1645 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1646 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1647 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1648 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1649 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1650 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1651 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1652 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1653 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1654 "src/math/exp-avx2-p5.c",
1655 "src/math/exp-avx2-perm-p3.c",
1656 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1657 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1658 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1659 "src/math/sigmoid-avx2-rr2-p5-div.c",
1660 "src/math/sigmoid-avx2-rr1-p5-div.c",
1661 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1662 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1663 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1664 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1665]
1666
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1667AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1668 "src/f32-clamp/gen/avx512f-x16.c",
1669 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1670 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1671 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1672 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1673 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1674 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1675 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1676 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1677 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1678 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1679 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1680 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1681 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1682 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1683 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1684 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1685 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1686 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1687 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1688 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1689 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1690 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1691 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1692 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1693 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1694 "src/f32-hswish/gen/avx512f-x16.c",
1695 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1696 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1697 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1698 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1699 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1700 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1701 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1702 "src/f32-prelu/gen/avx512f-2x16.c",
1703 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1704 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1705 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1706 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1707 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1708 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1709 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1710 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1711 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1712 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1713 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1714 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1715 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1716 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1717 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1718 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1719 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1720 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1721 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1722 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1723 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1724 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1725 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1726 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1727 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
1728 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
1729 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1730 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1731 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
1732 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1733 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
1734 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1735 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1736 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
1737 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1738 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1739 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1740 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1741 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
1742 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
1743 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
1744 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
1745 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
1746 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
1747 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
1748 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1749 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
1750 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
1751 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
1752 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
1753 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
1754 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
1755 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
1756 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1757 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
1758 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
1759 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
1760 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
1761 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
1762 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1763 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x16.c",
1764 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1765 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
1766 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1767 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
1768 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
1769 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
1770 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1771 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
1772 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
1773 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
1774 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1775 "src/f32-vlrelu/gen/avx512f-x16.c",
1776 "src/f32-vlrelu/gen/avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1777 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1778 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
1779 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
1780 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
1781 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
1782 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
1783 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
1784 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
1785 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
1786 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
1787 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
1788 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
1789 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
1790 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
1791 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
1792 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
1793 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
1794 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
1795 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
1796 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
1797 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
1798 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
1799 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
1800 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
1801 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1802 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
1803 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
1804 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
1805 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
1806 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
1807 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
1808 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
1809 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1810 "src/f32-vunary/gen/vabs-avx512f-x16.c",
1811 "src/f32-vunary/gen/vabs-avx512f-x32.c",
1812 "src/f32-vunary/gen/vneg-avx512f-x16.c",
1813 "src/f32-vunary/gen/vneg-avx512f-x32.c",
1814 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
1815 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1816 "src/math/exp-avx512f-p5-scalef.c",
1817 "src/math/exp-avx512f-p5.c",
1818 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]1819 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1820 "src/math/extexp-avx512f-p5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1821]
1822
1823AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]1824 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]1825 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1826 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1827 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
1828 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1829 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1830 "src/f32-gemm/4x8-minmax-aarch32-neon-ld64.S",
1831 "src/f32-igemm/4x8-minmax-aarch32-neon-ld64.S",
1832 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1833 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1834 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1835 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1836]
1837
1838AARCH64_ASM_UKERNELS = [
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1839 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1840 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
1841 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1842 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1843 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
1844 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1845 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
1846 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
1847 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1848 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1849 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1850 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1851 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1852 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1853 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
1854 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1855 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1856 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
1857 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
1858 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
1859 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
1860 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
1861 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
1862 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
1863 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
1864 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
1865 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
1866 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
1867 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
1868 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
1869 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
1870 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
1871 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
1872 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
1873 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1874 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
1875 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1876 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1877 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
1878 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1879 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1880 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1881 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
1882 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1883 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
1884 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1885 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1886 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
1887 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
1888 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1889 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
1890 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
1891 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
1892 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
1893 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
1894 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1895 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
1896 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
1897 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
1898 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
1899 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
1900 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
1901 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
1902 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
1903 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
1904 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
1905 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
1906 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
1907 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
1908 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
1909 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
1910 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
1911 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
1912 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1913]
1914
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1915INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1916 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1917 "src/xnnpack/argmaxpool.h",
1918 "src/xnnpack/avgpool.h",
1919 "src/xnnpack/clamp.h",
1920 "src/xnnpack/common.h",
1921 "src/xnnpack/conv.h",
1922 "src/xnnpack/dwconv.h",
1923 "src/xnnpack/gavgpool.h",
1924 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1925 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1926 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1927 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1928 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]1929 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1930 "src/xnnpack/lut.h",
1931 "src/xnnpack/math.h",
1932 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]1933 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1934 "src/xnnpack/packx.h",
1935 "src/xnnpack/pad.h",
1936 "src/xnnpack/params.h",
1937 "src/xnnpack/pavgpool.h",
1938 "src/xnnpack/ppmm.h",
1939 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1940 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]1941 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1942 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1943 "src/xnnpack/rmax.h",
1944 "src/xnnpack/scalar-utils.h",
1945 "src/xnnpack/spmm.h",
1946 "src/xnnpack/unpool.h",
1947 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]1948 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1949 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1950 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]1951 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]1952 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]1953 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1954 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1955]
1956
1957INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1958 "include/xnnpack.h",
1959 "src/xnnpack/allocator.h",
1960 "src/xnnpack/compute.h",
1961 "src/xnnpack/im2col.h",
1962 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1963 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]1964 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1965 "src/xnnpack/operator.h",
1966 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1967 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1968 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1969 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]1970 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1971]
1972
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1973ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1974 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1975]
1976
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1977MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1978 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1979 "include/xnnpack.h",
1980]
1981
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]1982MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1983 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]1984 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1985 "src/xnnpack/requantization.h",
1986 "include/xnnpack.h",
1987]
1988
1989OPERATOR_TEST_PARAMS_HDRS = [
1990 "src/xnnpack/params.h",
1991 "src/xnnpack/common.h",
1992]
1993
1994WEIGHTS_PACK_HDRS = [
1995 "src/xnnpack/pack.h",
1996 "src/xnnpack/operator.h",
1997 "src/xnnpack/compute.h",
1998]
1999
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2000LOGGING_COPTS = select({
2001 # No logging in optimized mode
2002 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
2003 # Full logging in debug mode
2004 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
2005 # Error-only logging in default (fastbuild) mode
2006 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
2007})
2008
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2009LOGGING_SRCS = select({
2010 # No logging in optimized mode
2011 ":optimized_build": [],
2012 "//conditions:default": [
2013 "src/operator-strings.c",
2014 "src/subgraph-strings.c",
2015 ],
2016})
2017
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2018LOGGING_HDRS = [
2019 "src/xnnpack/log.h",
2020]
2021
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2022xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2023 name = "tables",
2024 srcs = TABLE_SRCS,
2025 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2026 gcc_copts = xnnpack_gcc_std_copts(),
2027 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2028)
2029
2030xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2031 name = "scalar_ukernels",
2032 srcs = SCALAR_UKERNELS,
2033 hdrs = INTERNAL_HDRS,
2034 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2035 gcc_copts = xnnpack_gcc_std_copts(),
2036 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2037 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2038 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2039 "@FP16",
2040 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2041 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2042 ],
2043)
2044
2045xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2046 name = "scalar_ukernels_test_mode",
2047 srcs = SCALAR_UKERNELS,
2048 hdrs = INTERNAL_HDRS,
2049 aarch32_copts = ["-marm"],
2050 copts = [
2051 "-UNDEBUG",
2052 "-DXNN_TEST_MODE=1",
2053 ],
2054 gcc_copts = xnnpack_gcc_std_copts(),
2055 msvc_copts = xnnpack_msvc_std_copts(),
2056 deps = [
2057 ":tables",
2058 "@FP16",
2059 "@FXdiv",
2060 "@pthreadpool",
2061 ],
2062)
2063
2064xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2065 name = "wasm_ukernels",
2066 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2067 gcc_copts = xnnpack_gcc_std_copts(),
2068 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2069 wasm_srcs = WASM_UKERNELS,
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2070 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2071 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2072 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2073 "@FP16",
2074 "@FXdiv",
2075 "@pthreadpool",
2076 ],
2077)
2078
2079xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2080 name = "wasm_ukernels_test_mode",
2081 hdrs = INTERNAL_HDRS,
2082 copts = [
2083 "-UNDEBUG",
2084 "-DXNN_TEST_MODE=1",
2085 ],
2086 gcc_copts = xnnpack_gcc_std_copts(),
2087 msvc_copts = xnnpack_msvc_std_copts(),
2088 wasm_srcs = WASM_UKERNELS,
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2089 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2090 deps = [
2091 ":tables",
2092 "@FP16",
2093 "@FXdiv",
2094 "@pthreadpool",
2095 ],
2096)
2097
2098xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2099 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2100 hdrs = INTERNAL_HDRS,
2101 aarch32_copts = [
2102 "-marm",
2103 "-mfpu=neon",
2104 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2105 gcc_copts = xnnpack_gcc_std_copts(),
2106 gcc_x86_copts = ["-msse2"],
2107 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2108 optimized_copts = [
2109 "-O3",
2110 "-ffast-math",
2111 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2112 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2113 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2114 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2115 "@FP16",
2116 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2117 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2118 ],
2119)
2120
2121xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2122 name = "psimd_fastmath_ukernels_test_mode",
2123 hdrs = INTERNAL_HDRS,
2124 aarch32_copts = [
2125 "-marm",
2126 "-mfpu=neon",
2127 ],
2128 copts = [
2129 "-UNDEBUG",
2130 "-DXNN_TEST_MODE=1",
2131 ],
2132 gcc_copts = xnnpack_gcc_std_copts(),
2133 gcc_x86_copts = ["-msse2"],
2134 msvc_copts = xnnpack_msvc_std_copts(),
2135 optimized_copts = [
2136 "-O3",
2137 "-ffast-math",
2138 ],
2139 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
2140 deps = [
2141 ":tables",
2142 "@FP16",
2143 "@psimd",
2144 "@pthreadpool",
2145 ],
2146)
2147
2148xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2149 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2150 hdrs = INTERNAL_HDRS,
2151 aarch32_copts = [
2152 "-marm",
2153 "-mfpu=neon",
2154 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2155 gcc_copts = xnnpack_gcc_std_copts(),
2156 gcc_x86_copts = ["-msse2"],
2157 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2158 optimized_copts = [
2159 "-O3",
2160 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2161 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2162 deps = [
2163 ":tables",
2164 "@FP16",
2165 "@psimd",
2166 "@pthreadpool",
2167 ],
2168)
2169
2170xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2171 name = "psimd_accmath_ukernels_test_mode",
2172 hdrs = INTERNAL_HDRS,
2173 aarch32_copts = [
2174 "-marm",
2175 "-mfpu=neon",
2176 ],
2177 copts = [
2178 "-UNDEBUG",
2179 "-DXNN_TEST_MODE=1",
2180 ],
2181 gcc_copts = xnnpack_gcc_std_copts(),
2182 gcc_x86_copts = ["-msse2"],
2183 msvc_copts = xnnpack_msvc_std_copts(),
2184 optimized_copts = [
2185 "-O3",
2186 ],
2187 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
2188 deps = [
2189 ":tables",
2190 "@FP16",
2191 "@psimd",
2192 "@pthreadpool",
2193 ],
2194)
2195
2196xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2197 name = "neon_ukernels",
2198 hdrs = INTERNAL_HDRS,
2199 aarch32_copts = [
2200 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2201 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2202 "-mfpu=neon",
2203 ],
2204 aarch32_srcs = NEON_UKERNELS,
2205 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2206 gcc_copts = xnnpack_gcc_std_copts(),
2207 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2208 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2209 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2210 "@FP16",
2211 "@pthreadpool",
2212 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2213)
2214
2215xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2216 name = "neon_ukernels_test_mode",
2217 hdrs = INTERNAL_HDRS,
2218 aarch32_copts = [
2219 "-marm",
2220 "-march=armv7-a",
2221 "-mfpu=neon",
2222 ],
2223 aarch32_srcs = NEON_UKERNELS,
2224 aarch64_srcs = NEON_UKERNELS,
2225 copts = [
2226 "-UNDEBUG",
2227 "-DXNN_TEST_MODE=1",
2228 ],
2229 gcc_copts = xnnpack_gcc_std_copts(),
2230 msvc_copts = xnnpack_msvc_std_copts(),
2231 deps = [
2232 ":tables",
2233 "@FP16",
2234 "@pthreadpool",
2235 ],
2236)
2237
2238xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2239 name = "neonfma_ukernels",
2240 hdrs = INTERNAL_HDRS,
2241 aarch32_copts = [
2242 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2243 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2244 "-mfpu=neon-vfpv4",
2245 ],
2246 aarch32_srcs = NEONFMA_UKERNELS,
2247 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2248 apple_aarch32_copts = [
2249 "-mcpu=swift",
2250 "-mtune=generic",
2251 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2252 gcc_copts = xnnpack_gcc_std_copts(),
2253 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2254 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2255 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2256 "@FP16",
2257 "@pthreadpool",
2258 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2259)
2260
2261xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2262 name = "neonfma_ukernels_test_mode",
2263 hdrs = INTERNAL_HDRS,
2264 aarch32_copts = [
2265 "-marm",
2266 "-march=armv7-a",
2267 "-mfpu=neon-vfpv4",
2268 ],
2269 aarch32_srcs = NEONFMA_UKERNELS,
2270 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2271 apple_aarch32_copts = [
2272 "-mcpu=swift",
2273 "-mtune=generic",
2274 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2275 copts = [
2276 "-UNDEBUG",
2277 "-DXNN_TEST_MODE=1",
2278 ],
2279 gcc_copts = xnnpack_gcc_std_copts(),
2280 msvc_copts = xnnpack_msvc_std_copts(),
2281 deps = [
2282 ":tables",
2283 "@FP16",
2284 "@pthreadpool",
2285 ],
2286)
2287
2288xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2289 name = "neonv8_ukernels",
2290 hdrs = INTERNAL_HDRS,
2291 aarch32_copts = [
2292 "-marm",
2293 "-march=armv8-a",
2294 "-mfpu=neon-fp-armv8",
2295 ],
2296 aarch32_srcs = NEONV8_UKERNELS,
2297 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2298 apple_aarch32_copts = [
2299 "-mcpu=cyclone",
2300 "-mtune=generic",
2301 ],
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2302 gcc_copts = xnnpack_gcc_std_copts(),
2303 msvc_copts = xnnpack_msvc_std_copts(),
2304 deps = [
2305 ":tables",
2306 "@FP16",
2307 "@pthreadpool",
2308 ],
2309)
2310
2311xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2312 name = "neonv8_ukernels_test_mode",
2313 hdrs = INTERNAL_HDRS,
2314 aarch32_copts = [
2315 "-marm",
2316 "-march=armv8-a",
2317 "-mfpu=neon-fp-armv8",
2318 ],
2319 aarch32_srcs = NEONV8_UKERNELS,
2320 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2321 apple_aarch32_copts = [
2322 "-mcpu=cyclone",
2323 "-mtune=generic",
2324 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2325 copts = [
2326 "-UNDEBUG",
2327 "-DXNN_TEST_MODE=1",
2328 ],
2329 gcc_copts = xnnpack_gcc_std_copts(),
2330 msvc_copts = xnnpack_msvc_std_copts(),
2331 deps = [
2332 ":tables",
2333 "@FP16",
2334 "@pthreadpool",
2335 ],
2336)
2337
2338xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2339 name = "neonfp16arith_ukernels",
2340 hdrs = INTERNAL_HDRS,
2341 aarch64_copts = ["-march=armv8.2-a+fp16"],
2342 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2343 gcc_copts = xnnpack_gcc_std_copts(),
2344 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2345 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2346 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2347 "@FP16",
2348 "@pthreadpool",
2349 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2350)
2351
2352xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2353 name = "neonfp16arith_ukernels_test_mode",
2354 hdrs = INTERNAL_HDRS,
2355 aarch64_copts = ["-march=armv8.2-a+fp16"],
2356 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2357 copts = [
2358 "-UNDEBUG",
2359 "-DXNN_TEST_MODE=1",
2360 ],
2361 gcc_copts = xnnpack_gcc_std_copts(),
2362 msvc_copts = xnnpack_msvc_std_copts(),
2363 deps = [
2364 ":tables",
2365 "@FP16",
2366 "@pthreadpool",
2367 ],
2368)
2369
2370xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2371 name = "sse2_ukernels",
2372 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2373 gcc_copts = xnnpack_gcc_std_copts(),
2374 gcc_x86_copts = ["-msse2"],
2375 msvc_copts = xnnpack_msvc_std_copts(),
2376 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2377 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2378 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2379 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2380 "@FP16",
2381 "@pthreadpool",
2382 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2383)
2384
2385xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2386 name = "sse2_ukernels_test_mode",
2387 hdrs = INTERNAL_HDRS,
2388 copts = [
2389 "-UNDEBUG",
2390 "-DXNN_TEST_MODE=1",
2391 ],
2392 gcc_copts = xnnpack_gcc_std_copts(),
2393 gcc_x86_copts = ["-msse2"],
2394 msvc_copts = xnnpack_msvc_std_copts(),
2395 msvc_x86_32_copts = ["/arch:SSE2"],
2396 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2397 deps = [
2398 ":tables",
2399 "@FP16",
2400 "@pthreadpool",
2401 ],
2402)
2403
2404xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2405 name = "ssse3_ukernels",
2406 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2407 gcc_copts = xnnpack_gcc_std_copts(),
2408 gcc_x86_copts = ["-mssse3"],
2409 msvc_copts = xnnpack_msvc_std_copts(),
2410 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2411 x86_srcs = SSSE3_UKERNELS,
2412 deps = [
2413 ":tables",
2414 "@FP16",
2415 "@pthreadpool",
2416 ],
2417)
2418
2419xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2420 name = "ssse3_ukernels_test_mode",
2421 hdrs = INTERNAL_HDRS,
2422 copts = [
2423 "-UNDEBUG",
2424 "-DXNN_TEST_MODE=1",
2425 ],
2426 gcc_copts = xnnpack_gcc_std_copts(),
2427 gcc_x86_copts = ["-mssse3"],
2428 msvc_copts = xnnpack_msvc_std_copts(),
2429 msvc_x86_32_copts = ["/arch:SSE2"],
2430 x86_srcs = SSSE3_UKERNELS,
2431 deps = [
2432 ":tables",
2433 "@FP16",
2434 "@pthreadpool",
2435 ],
2436)
2437
2438xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2439 name = "sse41_ukernels",
2440 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2441 gcc_copts = xnnpack_gcc_std_copts(),
2442 gcc_x86_copts = ["-msse4.1"],
2443 msvc_copts = xnnpack_msvc_std_copts(),
2444 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2445 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2446 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2447 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2448 "@FP16",
2449 "@pthreadpool",
2450 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2451)
2452
2453xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2454 name = "sse41_ukernels_test_mode",
2455 hdrs = INTERNAL_HDRS,
2456 copts = [
2457 "-UNDEBUG",
2458 "-DXNN_TEST_MODE=1",
2459 ],
2460 gcc_copts = xnnpack_gcc_std_copts(),
2461 gcc_x86_copts = ["-msse4.1"],
2462 msvc_copts = xnnpack_msvc_std_copts(),
2463 msvc_x86_32_copts = ["/arch:SSE2"],
2464 x86_srcs = SSE41_UKERNELS,
2465 deps = [
2466 ":tables",
2467 "@FP16",
2468 "@pthreadpool",
2469 ],
2470)
2471
2472xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2473 name = "avx_ukernels",
2474 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2475 gcc_copts = xnnpack_gcc_std_copts(),
2476 gcc_x86_copts = ["-mavx"],
2477 msvc_copts = xnnpack_msvc_std_copts(),
2478 msvc_x86_32_copts = ["/arch:AVX"],
2479 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2480 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2481 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2482 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2483 "@FP16",
2484 "@pthreadpool",
2485 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2486)
2487
2488xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2489 name = "avx_ukernels_test_mode",
2490 hdrs = INTERNAL_HDRS,
2491 copts = [
2492 "-UNDEBUG",
2493 "-DXNN_TEST_MODE=1",
2494 ],
2495 gcc_copts = xnnpack_gcc_std_copts(),
2496 gcc_x86_copts = ["-mavx"],
2497 msvc_copts = xnnpack_msvc_std_copts(),
2498 msvc_x86_32_copts = ["/arch:AVX"],
2499 msvc_x86_64_copts = ["/arch:AVX"],
2500 x86_srcs = AVX_UKERNELS,
2501 deps = [
2502 ":tables",
2503 "@FP16",
2504 "@pthreadpool",
2505 ],
2506)
2507
2508xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2509 name = "fma3_ukernels",
2510 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2511 gcc_copts = xnnpack_gcc_std_copts(),
2512 gcc_x86_copts = ["-mfma"],
2513 msvc_copts = xnnpack_msvc_std_copts(),
2514 msvc_x86_32_copts = ["/arch:AVX"],
2515 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2516 x86_srcs = FMA3_UKERNELS,
2517 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2518 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2519 "@FP16",
2520 "@pthreadpool",
2521 ],
2522)
2523
2524xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2525 name = "fma3_ukernels_test_mode",
2526 hdrs = INTERNAL_HDRS,
2527 copts = [
2528 "-UNDEBUG",
2529 "-DXNN_TEST_MODE=1",
2530 ],
2531 gcc_copts = xnnpack_gcc_std_copts(),
2532 gcc_x86_copts = ["-mfma"],
2533 msvc_copts = xnnpack_msvc_std_copts(),
2534 msvc_x86_32_copts = ["/arch:AVX"],
2535 msvc_x86_64_copts = ["/arch:AVX"],
2536 x86_srcs = FMA3_UKERNELS,
2537 deps = [
2538 ":tables",
2539 "@FP16",
2540 "@pthreadpool",
2541 ],
2542)
2543
2544xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2545 name = "avx2_ukernels",
2546 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2547 gcc_copts = xnnpack_gcc_std_copts(),
2548 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2549 "-mfma",
2550 "-mavx2",
2551 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2552 msvc_copts = xnnpack_msvc_std_copts(),
2553 msvc_x86_32_copts = ["/arch:AVX2"],
2554 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2555 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2556 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2557 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2558 "@FP16",
2559 "@pthreadpool",
2560 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2561)
2562
2563xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2564 name = "avx2_ukernels_test_mode",
2565 hdrs = INTERNAL_HDRS,
2566 copts = [
2567 "-UNDEBUG",
2568 "-DXNN_TEST_MODE=1",
2569 ],
2570 gcc_copts = xnnpack_gcc_std_copts(),
2571 gcc_x86_copts = [
2572 "-mfma",
2573 "-mavx2",
2574 ],
2575 msvc_copts = xnnpack_msvc_std_copts(),
2576 msvc_x86_32_copts = ["/arch:AVX2"],
2577 msvc_x86_64_copts = ["/arch:AVX2"],
2578 x86_srcs = AVX2_UKERNELS,
2579 deps = [
2580 ":tables",
2581 "@FP16",
2582 "@pthreadpool",
2583 ],
2584)
2585
2586xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2587 name = "avx512f_ukernels",
2588 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2589 gcc_copts = xnnpack_gcc_std_copts(),
2590 gcc_x86_copts = ["-mavx512f"],
2591 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2592 msvc_copts = xnnpack_msvc_std_copts(),
2593 msvc_x86_32_copts = ["/arch:AVX512"],
2594 msvc_x86_64_copts = ["/arch:AVX512"],
2595 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2596 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2597 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2598 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2599 "@FP16",
2600 "@pthreadpool",
2601 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2602)
2603
2604xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2605 name = "avx512f_ukernels_test_mode",
2606 hdrs = INTERNAL_HDRS,
2607 copts = [
2608 "-UNDEBUG",
2609 "-DXNN_TEST_MODE=1",
2610 ],
2611 gcc_copts = xnnpack_gcc_std_copts(),
2612 gcc_x86_copts = ["-mavx512f"],
2613 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2614 msvc_copts = xnnpack_msvc_std_copts(),
2615 msvc_x86_32_copts = ["/arch:AVX512"],
2616 msvc_x86_64_copts = ["/arch:AVX512"],
2617 msys_copts = ["-fno-asynchronous-unwind-tables"],
2618 x86_srcs = AVX512F_UKERNELS,
2619 deps = [
2620 ":tables",
2621 "@FP16",
2622 "@pthreadpool",
2623 ],
2624)
2625
2626xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2627 name = "asm_ukernels",
2628 hdrs = ["src/xnnpack/assembly.h"],
2629 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2630 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2631 aarch64_srcs = AARCH64_ASM_UKERNELS,
2632)
2633
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2634xnnpack_cc_library(
2635 name = "logging_utils",
2636 srcs = LOGGING_SRCS,
2637 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2638 copts = LOGGING_COPTS + [
2639 "-Isrc",
2640 "-Iinclude",
2641 ] + select({
2642 ":debug_build": [],
2643 "//conditions:default": xnnpack_min_size_copts(),
2644 }),
2645 gcc_copts = xnnpack_gcc_std_copts(),
2646 msvc_copts = xnnpack_msvc_std_copts(),
2647 visibility = xnnpack_visibility(),
2648 deps = [
2649 "@FP16",
2650 "@clog",
2651 "@pthreadpool",
2652 ],
2653)
2654
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2655xnnpack_aggregate_library(
2656 name = "ukernels",
2657 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2658 ":neon_ukernels",
2659 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2660 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2661 ":asm_ukernels",
2662 ],
2663 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2664 ":neon_ukernels",
2665 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2666 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2667 ":neonfp16arith_ukernels",
2668 ":asm_ukernels",
2669 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2670 generic_deps = [
2671 ":scalar_ukernels",
2672 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2673 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2674 ":psimd_fastmath_ukernels",
2675 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2676 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2677 wasm_deps = [
2678 ":wasm_ukernels",
2679 ],
2680 wasmsimd_deps = [
2681 ":wasm_ukernels",
2682 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2683 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2684 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2685 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2686 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2687 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2688 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2689 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2690 ":avx512f_ukernels",
2691 ],
2692)
2693
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2694xnnpack_aggregate_library(
2695 name = "ukernels_test_mode",
2696 aarch32_deps = [
2697 ":neon_ukernels_test_mode",
2698 ":neonfma_ukernels_test_mode",
2699 ":neonv8_ukernels_test_mode",
2700 ":asm_ukernels",
2701 ],
2702 aarch64_deps = [
2703 ":neon_ukernels_test_mode",
2704 ":neonfma_ukernels_test_mode",
2705 ":neonv8_ukernels_test_mode",
2706 ":neonfp16arith_ukernels_test_mode",
2707 ":asm_ukernels",
2708 ],
2709 generic_deps = [
2710 ":scalar_ukernels_test_mode",
2711 ],
2712 psimd_deps = [
2713 ":psimd_fastmath_ukernels_test_mode",
2714 ":psimd_accmath_ukernels_test_mode",
2715 ],
2716 wasm_deps = [
2717 ":wasm_ukernels_test_mode",
2718 ],
2719 wasmsimd_deps = [
2720 ":wasm_ukernels_test_mode",
2721 ],
2722 x86_deps = [
2723 ":sse2_ukernels_test_mode",
2724 ":ssse3_ukernels_test_mode",
2725 ":sse41_ukernels_test_mode",
2726 ":avx_ukernels_test_mode",
2727 ":fma3_ukernels_test_mode",
2728 ":avx2_ukernels_test_mode",
2729 ":avx512f_ukernels_test_mode",
2730 ],
2731)
2732
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2733xnnpack_aggregate_library(
2734 name = "ukernels_no_f16",
2735 aarch32_deps = [
2736 ":neon_ukernels",
2737 ":neonfma_ukernels",
2738 ":neonv8_ukernels",
2739 ":asm_ukernels",
2740 ],
2741 aarch64_deps = [
2742 ":neon_ukernels",
2743 ":neonfma_ukernels",
2744 ":neonv8_ukernels",
2745 ":asm_ukernels",
2746 ],
2747 generic_deps = [
2748 ":scalar_ukernels",
2749 ],
2750 psimd_deps = [
2751 ":psimd_fastmath_ukernels",
2752 ":psimd_accmath_ukernels",
2753 ],
2754 wasm_deps = [
2755 ":wasm_ukernels",
2756 ],
2757 wasmsimd_deps = [
2758 ":wasm_ukernels",
2759 ],
2760 x86_deps = [
2761 ":sse2_ukernels",
2762 ":ssse3_ukernels",
2763 ":sse41_ukernels",
2764 ":avx_ukernels",
2765 ":fma3_ukernels",
2766 ":avx2_ukernels",
2767 ":avx512f_ukernels",
2768 ],
2769)
2770
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2771xnnpack_cc_library(
2772 name = "im2col",
2773 srcs = ["src/im2col.c"],
2774 hdrs = [
2775 "src/xnnpack/common.h",
2776 "src/xnnpack/im2col.h",
2777 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2778 gcc_copts = xnnpack_gcc_std_copts(),
2779 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2780)
2781
2782xnnpack_cc_library(
2783 name = "indirection",
2784 srcs = ["src/indirection.c"],
2785 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2786 gcc_copts = xnnpack_gcc_std_copts(),
2787 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2788 deps = [
2789 "@FP16",
2790 "@FXdiv",
2791 "@pthreadpool",
2792 ],
2793)
2794
2795xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2796 name = "indirection_test_mode",
2797 srcs = ["src/indirection.c"],
2798 hdrs = INTERNAL_HDRS,
2799 copts = [
2800 "-UNDEBUG",
2801 "-DXNN_TEST_MODE=1",
2802 ],
2803 gcc_copts = xnnpack_gcc_std_copts(),
2804 msvc_copts = xnnpack_msvc_std_copts(),
2805 deps = [
2806 "@FP16",
2807 "@FXdiv",
2808 "@pthreadpool",
2809 ],
2810)
2811
2812xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2813 name = "operator_run",
2814 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2815 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2816 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2817 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2818 "//conditions:default": [],
2819 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2820 gcc_copts = xnnpack_gcc_std_copts(),
2821 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2822 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2823 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2824 "@FP16",
2825 "@FXdiv",
2826 "@clog",
2827 "@pthreadpool",
2828 ],
2829)
2830
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2831xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2832 name = "operator_run_test_mode",
2833 srcs = ["src/operator-run.c"],
2834 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2835 copts = LOGGING_COPTS + [
2836 "-UNDEBUG",
2837 "-DXNN_TEST_MODE=1",
2838 ] + select({
2839 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2840 "//conditions:default": [],
2841 }),
2842 gcc_copts = xnnpack_gcc_std_copts(),
2843 msvc_copts = xnnpack_msvc_std_copts(),
2844 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2845 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2846 "@FP16",
2847 "@FXdiv",
2848 "@clog",
2849 "@pthreadpool",
2850 ],
2851)
2852
2853xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2854 name = "memory_planner",
2855 srcs = ["src/memory-planner.c"],
2856 hdrs = INTERNAL_HDRS,
2857 defines = select({
2858 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
2859 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
2860 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
2861 }),
2862 gcc_copts = xnnpack_gcc_std_copts(),
2863 msvc_copts = xnnpack_msvc_std_copts(),
2864 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2865 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2866 "@pthreadpool",
2867 ],
2868)
2869
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2870xnnpack_cc_library(
2871 name = "memory_planner_test_mode",
2872 srcs = ["src/memory-planner.c"],
2873 hdrs = INTERNAL_HDRS,
2874 copts = [
2875 "-UNDEBUG",
2876 "-DXNN_TEST_MODE=1",
2877 ],
2878 defines = select({
2879 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
2880 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
2881 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
2882 }),
2883 gcc_copts = xnnpack_gcc_std_copts(),
2884 msvc_copts = xnnpack_msvc_std_copts(),
2885 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2886 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2887 "@pthreadpool",
2888 ],
2889)
2890
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2891cc_library(
2892 name = "enable_assembly",
2893 defines = select({
2894 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
2895 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]2896 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2897 }),
2898)
2899
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]2900xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2901 name = "operators",
2902 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2903 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2904 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]2905 ],
2906 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2907 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2908 "-Isrc",
2909 "-Iinclude",
2910 ] + select({
2911 ":debug_build": [],
2912 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2913 }) + select({
2914 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2915 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2916 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2917 gcc_copts = xnnpack_gcc_std_copts(),
2918 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2919 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2920 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2921 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2922 "@FP16",
2923 "@FXdiv",
2924 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2925 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2926 ],
2927)
2928
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2929xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2930 name = "operators_test_mode",
2931 srcs = OPERATOR_SRCS + [
2932 "src/memory.c",
2933 "src/operator-delete.c",
2934 ],
2935 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2936 copts = LOGGING_COPTS + [
2937 "-Isrc",
2938 "-Iinclude",
2939 "-UNDEBUG",
2940 "-DXNN_TEST_MODE=1",
2941 ] + select({
2942 ":debug_build": [],
2943 "//conditions:default": xnnpack_min_size_copts(),
2944 }) + select({
2945 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2946 "//conditions:default": [],
2947 }),
2948 gcc_copts = xnnpack_gcc_std_copts(),
2949 msvc_copts = xnnpack_msvc_std_copts(),
2950 deps = [
2951 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2952 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2953 "@FP16",
2954 "@FXdiv",
2955 "@clog",
2956 "@pthreadpool",
2957 ],
2958)
2959
2960xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2961 name = "XNNPACK",
2962 srcs = [
2963 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]2964 "src/runtime.c",
2965 "src/subgraph.c",
2966 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]2967 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2968 hdrs = ["include/xnnpack.h"],
2969 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2970 "-Isrc",
2971 "-Iinclude",
2972 ] + select({
2973 ":debug_build": [],
2974 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2975 }) + select({
2976 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2977 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2978 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2979 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2980 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2981 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2982 visibility = xnnpack_visibility(),
2983 deps = [
2984 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2985 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2986 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2987 ":operator_run",
2988 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2989 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2990 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]2991 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]2992 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]2993 ] + select({
2994 ":emscripten": [],
2995 "//conditions:default": ["@cpuinfo"],
2996 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2997)
2998
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2999xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3000 name = "XNNPACK_test_mode",
3001 srcs = [
3002 "src/init.c",
3003 "src/runtime.c",
3004 "src/subgraph.c",
3005 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3006 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3007 hdrs = ["include/xnnpack.h"],
3008 copts = LOGGING_COPTS + [
3009 "-Isrc",
3010 "-Iinclude",
3011 "-UNDEBUG",
3012 "-DXNN_TEST_MODE=1",
3013 ] + select({
3014 ":debug_build": [],
3015 "//conditions:default": xnnpack_min_size_copts(),
3016 }) + select({
3017 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3018 "//conditions:default": [],
3019 }),
3020 gcc_copts = xnnpack_gcc_std_copts(),
3021 includes = ["include"],
3022 msvc_copts = xnnpack_msvc_std_copts(),
3023 visibility = xnnpack_visibility(),
3024 deps = [
3025 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3026 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3027 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3028 ":operator_run_test_mode",
3029 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3030 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3031 "@clog",
3032 "@FP16",
3033 "@pthreadpool",
3034 ] + select({
3035 ":emscripten": [],
3036 "//conditions:default": ["@cpuinfo"],
3037 }),
3038)
3039
3040xnnpack_cc_library(
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3041 name = "xnnpack_f32",
3042 srcs = [
3043 "src/init.c",
3044 "src/runtime.c",
3045 "src/subgraph.c",
3046 "src/tensor.c",
3047 ] + SUBGRAPH_SRCS,
3048 hdrs = ["include/xnnpack.h"],
3049 copts = LOGGING_COPTS + [
3050 "-Isrc",
3051 "-Iinclude",
3052 ] + select({
3053 ":debug_build": [],
3054 "//conditions:default": xnnpack_min_size_copts(),
3055 }) + select({
3056 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3057 "//conditions:default": [],
3058 }),
3059 defines = [
3060 "XNN_NO_Q8_OPERATORS",
3061 "XNN_NO_U8_OPERATORS",
3062 "XNN_NO_X8_OPERATORS",
3063 "XNN_NO_F16_OPERATORS",
3064 "XNN_NO_X16_OPERATORS",
3065 ],
3066 gcc_copts = xnnpack_gcc_std_copts(),
3067 includes = ["include"],
3068 msvc_copts = xnnpack_msvc_std_copts(),
3069 visibility = xnnpack_visibility(),
3070 deps = [
3071 ":enable_assembly",
3072 ":logging_utils",
3073 ":memory_planner",
3074 ":operator_run",
3075 ":operators",
3076 ":ukernels_no_f16",
3077 "@clog",
3078 "@FP16",
3079 "@pthreadpool",
3080 ] + select({
3081 ":emscripten": [],
3082 "//conditions:default": ["@cpuinfo"],
3083 }),
3084)
3085
3086xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3087 name = "xnnpack_operators_nhwc_f32",
3088 srcs = [
3089 "src/init.c",
3090 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3091 hdrs = ["include/xnnpack.h"],
3092 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3093 "-Isrc",
3094 "-Iinclude",
3095 ] + select({
3096 ":debug_build": [],
3097 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3098 }) + select({
3099 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3100 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3101 }),
3102 defines = [
3103 "XNN_NO_Q8_OPERATORS",
3104 "XNN_NO_U8_OPERATORS",
3105 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]3106 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3107 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3108 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3109 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3110 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3111 visibility = xnnpack_visibility(),
3112 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3113 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3114 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3115 ":operator_run",
3116 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3117 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3118 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3119 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3120 ] + select({
3121 ":emscripten": [],
3122 "//conditions:default": ["@cpuinfo"],
3123 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3124)
3125
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3126xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3127 name = "bench_utils",
3128 srcs = ["bench/utils.cc"],
3129 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]3130 deps = [
3131 "@com_google_benchmark//:benchmark",
3132 "@cpuinfo",
3133 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3134)
3135
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3136######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3137
3138xnnpack_benchmark(
3139 name = "q8_gemm_bench",
3140 srcs = [
3141 "bench/gemm.h",
3142 "bench/q8-gemm.cc",
3143 "src/xnnpack/AlignedAllocator.h",
3144 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3145 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3146 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
3147)
3148
3149xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]3150 name = "f16_igemm_bench",
3151 srcs = [
3152 "bench/f16-igemm.cc",
3153 "bench/conv.h",
3154 "bench/google/conv.h",
3155 "src/xnnpack/AlignedAllocator.h",
3156 ] + MICROKERNEL_BENCHMARK_HDRS,
3157 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3158)
3159
3160xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3161 name = "f16_gemm_bench",
3162 srcs = [
3163 "bench/f16-gemm.cc",
3164 "bench/gemm.h",
3165 "src/xnnpack/AlignedAllocator.h",
3166 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3167 deps = MICROKERNEL_BENCHMARK_DEPS,
3168)
3169
3170xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3171 name = "f16_spmm_bench",
3172 srcs = [
3173 "bench/f16-spmm.cc",
3174 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3175 "src/xnnpack/AlignedAllocator.h",
3176 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3177 deps = MICROKERNEL_BENCHMARK_DEPS,
3178)
3179
3180xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3181 name = "f32_igemm_bench",
3182 srcs = [
3183 "bench/f32-igemm.cc",
3184 "bench/conv.h",
3185 "src/xnnpack/AlignedAllocator.h",
3186 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3187 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3188)
3189
3190xnnpack_benchmark(
3191 name = "f32_conv_hwc_bench",
3192 srcs = [
3193 "bench/f32-conv-hwc.cc",
3194 "bench/dconv.h",
3195 "src/xnnpack/AlignedAllocator.h",
3196 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3197 deps = MICROKERNEL_BENCHMARK_DEPS,
3198)
3199
3200xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3201 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3202 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3203 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3204 "bench/dconv.h",
3205 "src/xnnpack/AlignedAllocator.h",
3206 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3207 deps = MICROKERNEL_BENCHMARK_DEPS,
3208)
3209
3210xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3211 name = "f16_dwconv_bench",
3212 srcs = [
3213 "bench/f16-dwconv.cc",
3214 "bench/dwconv.h",
3215 "bench/google/dwconv.h",
3216 "src/xnnpack/AlignedAllocator.h",
3217 ] + MICROKERNEL_BENCHMARK_HDRS,
3218 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3219)
3220
3221xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3222 name = "f32_dwconv_bench",
3223 srcs = [
3224 "bench/f32-dwconv.cc",
3225 "bench/dwconv.h",
3226 "src/xnnpack/AlignedAllocator.h",
3227 ] + MICROKERNEL_BENCHMARK_HDRS,
3228 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3229)
3230
3231xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3232 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3233 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3234 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3235 "bench/dwconv.h",
3236 "src/xnnpack/AlignedAllocator.h",
3237 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3238 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3239)
3240
3241xnnpack_benchmark(
3242 name = "f32_gemm_bench",
3243 srcs = [
3244 "bench/f32-gemm.cc",
3245 "bench/gemm.h",
3246 "src/xnnpack/AlignedAllocator.h",
3247 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3248 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3249 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3250)
3251
3252xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3253 name = "f32_raddexpminusmax_bench",
3254 srcs = [
3255 "bench/f32-raddexpminusmax.cc",
3256 "src/xnnpack/AlignedAllocator.h",
3257 ] + MICROKERNEL_BENCHMARK_HDRS,
3258 deps = MICROKERNEL_BENCHMARK_DEPS,
3259)
3260
3261xnnpack_benchmark(
3262 name = "f32_raddextexp_bench",
3263 srcs = [
3264 "bench/f32-raddextexp.cc",
3265 "src/xnnpack/AlignedAllocator.h",
3266 ] + MICROKERNEL_BENCHMARK_HDRS,
3267 deps = MICROKERNEL_BENCHMARK_DEPS,
3268)
3269
3270xnnpack_benchmark(
3271 name = "f32_raddstoreexpminusmax_bench",
3272 srcs = [
3273 "bench/f32-raddstoreexpminusmax.cc",
3274 "src/xnnpack/AlignedAllocator.h",
3275 ] + MICROKERNEL_BENCHMARK_HDRS,
3276 deps = MICROKERNEL_BENCHMARK_DEPS,
3277)
3278
3279xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3280 name = "f32_rmax_bench",
3281 srcs = [
3282 "bench/f32-rmax.cc",
3283 "src/xnnpack/AlignedAllocator.h",
3284 ] + MICROKERNEL_BENCHMARK_HDRS,
3285 deps = MICROKERNEL_BENCHMARK_DEPS,
3286)
3287
3288xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3289 name = "f32_sigmoid_bench",
3290 srcs = [
3291 "bench/f32-sigmoid.cc",
3292 "src/xnnpack/AlignedAllocator.h",
3293 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3294 deps = MICROKERNEL_BENCHMARK_DEPS,
3295)
3296
3297xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3298 name = "f32_spmm_bench",
3299 srcs = [
3300 "bench/f32-spmm.cc",
3301 "bench/gemm.h",
3302 "src/xnnpack/AlignedAllocator.h",
3303 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3304 deps = MICROKERNEL_BENCHMARK_DEPS,
3305)
3306
3307xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3308 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3309 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3310 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3311 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3312 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3313 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3314)
3315
3316xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3317 name = "f32_vscaleexpminusmax_bench",
3318 srcs = [
3319 "bench/f32-vscaleexpminusmax.cc",
3320 "src/xnnpack/AlignedAllocator.h",
3321 ] + MICROKERNEL_BENCHMARK_HDRS,
3322 deps = MICROKERNEL_BENCHMARK_DEPS,
3323)
3324
3325xnnpack_benchmark(
3326 name = "f32_vscaleextexp_bench",
3327 srcs = [
3328 "bench/f32-vscaleextexp.cc",
3329 "src/xnnpack/AlignedAllocator.h",
3330 ] + MICROKERNEL_BENCHMARK_HDRS,
3331 deps = MICROKERNEL_BENCHMARK_DEPS,
3332)
3333
3334xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3335 name = "f32_im2col_gemm_bench",
3336 srcs = [
3337 "bench/f32-im2col-gemm.cc",
3338 "bench/conv.h",
3339 "src/xnnpack/AlignedAllocator.h",
3340 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3341 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3342)
3343
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3344xnnpack_benchmark(
3345 name = "requantization_bench",
3346 srcs = [
3347 "bench/requantization.cc",
3348 "src/xnnpack/requantization-stubs.h",
3349 "src/xnnpack/AlignedAllocator.h",
3350 ] + MICROKERNEL_BENCHMARK_HDRS,
3351 deps = MICROKERNEL_BENCHMARK_DEPS,
3352)
3353
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3354xnnpack_benchmark(
3355 name = "rounding_bench",
3356 srcs = [
3357 "bench/rounding.cc",
3358 "src/xnnpack/math-stubs.h",
3359 "src/xnnpack/AlignedAllocator.h",
3360 ] + MICROKERNEL_BENCHMARK_HDRS,
3361 deps = MICROKERNEL_BENCHMARK_DEPS,
3362)
3363
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3364########################### Benchmarks for operators ###########################
3365
3366xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3367 name = "average_pooling_bench",
3368 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3369 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3370 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3371 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3372)
3373
3374xnnpack_benchmark(
3375 name = "channel_shuffle_bench",
3376 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3377 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3378)
3379
3380xnnpack_benchmark(
3381 name = "convolution_bench",
3382 srcs = ["bench/convolution.cc"],
3383 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3384 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3385 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3386)
3387
3388xnnpack_benchmark(
3389 name = "deconvolution_bench",
3390 srcs = ["bench/deconvolution.cc"],
3391 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3392 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3393 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3394)
3395
3396xnnpack_benchmark(
3397 name = "global_average_pooling_bench",
3398 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3399 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3400)
3401
3402xnnpack_benchmark(
3403 name = "max_pooling_bench",
3404 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3405 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3406)
3407
3408xnnpack_benchmark(
3409 name = "sigmoid_bench",
3410 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3411 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3412 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3413 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3414)
3415
3416xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3417 name = "prelu_bench",
3418 srcs = ["bench/prelu.cc"],
3419 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3420 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3421 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3422)
3423
3424xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3425 name = "softmax_bench",
3426 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3427 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3428 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3429 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3430)
3431
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3432############################# End-to-end benchmarks ############################
3433
3434cc_library(
3435 name = "mobilenet_v1",
3436 srcs = ["models/mobilenet-v1.cc"],
3437 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3438 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3439 linkstatic = True,
3440 deps = [
3441 ":XNNPACK",
3442 "@pthreadpool",
3443 ],
3444)
3445
3446cc_library(
3447 name = "mobilenet_v2",
3448 srcs = ["models/mobilenet-v2.cc"],
3449 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3450 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3451 linkstatic = True,
3452 deps = [
3453 ":XNNPACK",
3454 "@pthreadpool",
3455 ],
3456)
3457
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3458cc_library(
3459 name = "mobilenet_v3_large",
3460 srcs = ["models/mobilenet-v3-large.cc"],
3461 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3462 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3463 linkstatic = True,
3464 deps = [
3465 ":XNNPACK",
3466 "@pthreadpool",
3467 ],
3468)
3469
3470cc_library(
3471 name = "mobilenet_v3_small",
3472 srcs = ["models/mobilenet-v3-small.cc"],
3473 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3474 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3475 linkstatic = True,
3476 deps = [
3477 ":XNNPACK",
3478 "@pthreadpool",
3479 ],
3480)
3481
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3482xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3483 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3484 srcs = [
3485 "bench/f32-dwconv-e2e.cc",
3486 "bench/end2end.h",
3487 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3488 deps = MICROKERNEL_BENCHMARK_DEPS + [
3489 ":XNNPACK",
3490 ":mobilenet_v1",
3491 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3492 ":mobilenet_v3_large",
3493 ":mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3494 ],
3495)
3496
3497xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3498 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3499 srcs = [
3500 "bench/f32-gemm-e2e.cc",
3501 "bench/end2end.h",
3502 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3503 deps = MICROKERNEL_BENCHMARK_DEPS + [
3504 ":XNNPACK",
3505 ":mobilenet_v1",
3506 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3507 ":mobilenet_v3_large",
3508 ":mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3509 ],
3510)
3511
3512xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3513 name = "end2end_bench",
3514 srcs = ["bench/end2end.cc"],
3515 deps = [
3516 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3517 ":bench_utils",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3518 ":mobilenet_v1",
3519 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3520 ":mobilenet_v3_large",
3521 ":mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3522 "@pthreadpool",
3523 ],
3524)
3525
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3526#################### Accuracy evaluation for math functions ####################
3527
3528xnnpack_benchmark(
3529 name = "f32_exp_eval",
3530 srcs = [
3531 "eval/f32-exp.cc",
3532 "src/xnnpack/AlignedAllocator.h",
3533 ] + ACCURACY_EVAL_HDRS,
3534 deps = ACCURACY_EVAL_DEPS,
3535)
3536
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3537xnnpack_benchmark(
3538 name = "f32_expminus_eval",
3539 srcs = [
3540 "eval/f32-expminus.cc",
3541 "src/xnnpack/AlignedAllocator.h",
3542 ] + ACCURACY_EVAL_HDRS,
3543 deps = ACCURACY_EVAL_DEPS,
3544)
3545
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3546xnnpack_benchmark(
3547 name = "f32_extexp_eval",
3548 srcs = [
3549 "eval/f32-extexp.cc",
3550 "src/xnnpack/AlignedAllocator.h",
3551 ] + ACCURACY_EVAL_HDRS,
3552 deps = ACCURACY_EVAL_DEPS,
3553)
3554
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3555xnnpack_unit_test(
3556 name = "f32_roundne_eval",
3557 srcs = [
3558 "eval/f32-roundne.cc",
3559 "src/xnnpack/AlignedAllocator.h",
3560 "src/xnnpack/math-stubs.h",
3561 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3562 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3563 deps = MICROKERNEL_TEST_DEPS,
3564)
3565
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3566xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3567 name = "f32_roundd_eval",
3568 srcs = [
3569 "eval/f32-roundd.cc",
3570 "src/xnnpack/AlignedAllocator.h",
3571 "src/xnnpack/math-stubs.h",
3572 ] + MICROKERNEL_TEST_HDRS,
3573 automatic = False,
3574 deps = MICROKERNEL_TEST_DEPS,
3575)
3576
3577xnnpack_unit_test(
3578 name = "f32_roundu_eval",
3579 srcs = [
3580 "eval/f32-roundu.cc",
3581 "src/xnnpack/AlignedAllocator.h",
3582 "src/xnnpack/math-stubs.h",
3583 ] + MICROKERNEL_TEST_HDRS,
3584 automatic = False,
3585 deps = MICROKERNEL_TEST_DEPS,
3586)
3587
3588xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3589 name = "f32_roundz_eval",
3590 srcs = [
3591 "eval/f32-roundz.cc",
3592 "src/xnnpack/AlignedAllocator.h",
3593 "src/xnnpack/math-stubs.h",
3594 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3595 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3596 deps = MICROKERNEL_TEST_DEPS,
3597)
3598
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3599xnnpack_benchmark(
3600 name = "f32_sigmoid_eval",
3601 srcs = [
3602 "eval/f32-sigmoid.cc",
3603 "src/xnnpack/AlignedAllocator.h",
3604 ] + ACCURACY_EVAL_HDRS,
3605 deps = ACCURACY_EVAL_DEPS,
3606)
3607
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3608######################### Unit tests for micro-kernels #########################
3609
3610xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3611 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3612 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3613 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3614 "test/gemm-microkernel-tester.h",
3615 "src/xnnpack/AlignedAllocator.h",
3616 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3617 deps = MICROKERNEL_TEST_DEPS,
3618)
3619
3620xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3621 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3622 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3623 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3624 "test/spmm-microkernel-tester.h",
3625 "src/xnnpack/AlignedAllocator.h",
3626 ] + MICROKERNEL_TEST_HDRS,
3627 deps = MICROKERNEL_TEST_DEPS,
3628)
3629
3630xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3631 name = "f32_argmaxpool_test",
3632 srcs = [
3633 "test/f32-argmaxpool.cc",
3634 "test/argmaxpool-microkernel-tester.h",
3635 "src/xnnpack/AlignedAllocator.h",
3636 ] + MICROKERNEL_TEST_HDRS,
3637 deps = MICROKERNEL_TEST_DEPS,
3638)
3639
3640xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3641 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3642 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3643 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3644 "test/avgpool-microkernel-tester.h",
3645 "src/xnnpack/AlignedAllocator.h",
3646 ] + MICROKERNEL_TEST_HDRS,
3647 deps = MICROKERNEL_TEST_DEPS,
3648)
3649
3650xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3651 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3652 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3653 "test/f32-ibilinear.cc",
3654 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3655 "src/xnnpack/AlignedAllocator.h",
3656 ] + MICROKERNEL_TEST_HDRS,
3657 deps = MICROKERNEL_TEST_DEPS,
3658)
3659
3660xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3661 name = "f16_clamp_test",
3662 srcs = [
3663 "test/f16-clamp.cc",
3664 "test/clamp-microkernel-tester.h",
3665 ] + MICROKERNEL_TEST_HDRS,
3666 deps = MICROKERNEL_TEST_DEPS,
3667)
3668
3669xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3670 name = "f32_clamp_test",
3671 srcs = [
3672 "test/f32-clamp.cc",
3673 "test/clamp-microkernel-tester.h",
3674 ] + MICROKERNEL_TEST_HDRS,
3675 deps = MICROKERNEL_TEST_DEPS,
3676)
3677
3678xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3679 name = "f32_igemm_test",
3680 srcs = [
3681 "test/f32-igemm.cc",
3682 "test/gemm-microkernel-tester.h",
3683 "src/xnnpack/AlignedAllocator.h",
3684 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3685 deps = MICROKERNEL_TEST_DEPS,
3686)
3687
3688xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3689 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3690 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3691 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3692 "test/gemm-microkernel-tester.h",
3693 "src/xnnpack/AlignedAllocator.h",
3694 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3695 deps = MICROKERNEL_TEST_DEPS,
3696)
3697
3698xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]3699 name = "f32_igemm_minmax_test",
3700 srcs = [
3701 "test/f32-igemm-minmax.cc",
3702 "test/gemm-microkernel-tester.h",
3703 "src/xnnpack/AlignedAllocator.h",
3704 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3705 deps = MICROKERNEL_TEST_DEPS,
3706)
3707
3708xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]3709 name = "f16_igemm_minmax_test",
3710 srcs = [
3711 "test/f16-igemm-minmax.cc",
3712 "test/gemm-microkernel-tester.h",
3713 "src/xnnpack/AlignedAllocator.h",
3714 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3715 deps = MICROKERNEL_TEST_DEPS,
3716)
3717
3718xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3719 name = "f32_conv_hwc_test",
3720 srcs = [
3721 "test/f32-conv-hwc.cc",
3722 "test/conv-hwc-microkernel-tester.h",
3723 "src/xnnpack/AlignedAllocator.h",
3724 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3725 deps = MICROKERNEL_TEST_DEPS,
3726)
3727
3728xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3729 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3730 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3731 "test/f32-conv-hwc2chw.cc",
3732 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3733 "src/xnnpack/AlignedAllocator.h",
3734 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3735 deps = MICROKERNEL_TEST_DEPS,
3736)
3737
3738xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3739 name = "f32_dwconv_test",
3740 srcs = [
3741 "test/f32-dwconv.cc",
3742 "test/dwconv-microkernel-tester.h",
3743 "src/xnnpack/AlignedAllocator.h",
3744 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3745 deps = MICROKERNEL_TEST_DEPS,
3746)
3747
3748xnnpack_unit_test(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3749 name = "f16_dwconv_minmax_test",
3750 srcs = [
3751 "test/f16-dwconv-minmax.cc",
3752 "test/dwconv-microkernel-tester.h",
3753 "src/xnnpack/AlignedAllocator.h",
3754 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3755 deps = MICROKERNEL_TEST_DEPS,
3756)
3757
3758xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3759 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3760 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3761 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3762 "test/dwconv-microkernel-tester.h",
3763 "src/xnnpack/AlignedAllocator.h",
3764 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3765 deps = MICROKERNEL_TEST_DEPS,
3766)
3767
3768xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3769 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3770 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3771 "test/f32-dwconv-chw.cc",
3772 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3773 "src/xnnpack/AlignedAllocator.h",
3774 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3775 deps = MICROKERNEL_TEST_DEPS,
3776)
3777
3778xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]3779 name = "f16_gavgpool_minmax_test",
3780 srcs = [
3781 "test/f16-gavgpool-minmax.cc",
3782 "test/gavgpool-microkernel-tester.h",
3783 "src/xnnpack/AlignedAllocator.h",
3784 ] + MICROKERNEL_TEST_HDRS,
3785 deps = MICROKERNEL_TEST_DEPS,
3786)
3787
3788xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3789 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3790 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3791 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3792 "test/gavgpool-microkernel-tester.h",
3793 "src/xnnpack/AlignedAllocator.h",
3794 ] + MICROKERNEL_TEST_HDRS,
3795 deps = MICROKERNEL_TEST_DEPS,
3796)
3797
3798xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3799 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3800 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3801 "test/f32-gavgpool-cw.cc",
3802 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3803 "src/xnnpack/AlignedAllocator.h",
3804 ] + MICROKERNEL_TEST_HDRS,
3805 deps = MICROKERNEL_TEST_DEPS,
3806)
3807
3808xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3809 name = "f32_gemm_test",
3810 srcs = [
3811 "test/f32-gemm.cc",
3812 "test/gemm-microkernel-tester.h",
3813 "src/xnnpack/AlignedAllocator.h",
3814 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3815 deps = MICROKERNEL_TEST_DEPS,
3816)
3817
3818xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3819 name = "f32_gemm_relu_test",
3820 srcs = [
3821 "test/f32-gemm-relu.cc",
3822 "test/gemm-microkernel-tester.h",
3823 "src/xnnpack/AlignedAllocator.h",
3824 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3825 deps = MICROKERNEL_TEST_DEPS,
3826)
3827
3828xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3829 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3830 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3831 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3832 "test/gemm-microkernel-tester.h",
3833 "src/xnnpack/AlignedAllocator.h",
3834 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3835 deps = MICROKERNEL_TEST_DEPS,
3836)
3837
3838xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3839 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3840 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3841 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3842 "test/gemm-microkernel-tester.h",
3843 "src/xnnpack/AlignedAllocator.h",
3844 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3845 deps = MICROKERNEL_TEST_DEPS,
3846)
3847
3848xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3849 name = "f16_hswish_test",
3850 srcs = [
3851 "test/f16-hswish.cc",
3852 "test/hswish-microkernel-tester.h",
3853 ] + MICROKERNEL_TEST_HDRS,
3854 deps = MICROKERNEL_TEST_DEPS,
3855)
3856
3857xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3858 name = "f32_hswish_test",
3859 srcs = [
3860 "test/f32-hswish.cc",
3861 "test/hswish-microkernel-tester.h",
3862 ] + MICROKERNEL_TEST_HDRS,
3863 deps = MICROKERNEL_TEST_DEPS,
3864)
3865
3866xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3867 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3868 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3869 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3870 "test/maxpool-microkernel-tester.h",
3871 ] + MICROKERNEL_TEST_HDRS,
3872 deps = MICROKERNEL_TEST_DEPS,
3873)
3874
3875xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3876 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3877 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3878 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3879 "test/avgpool-microkernel-tester.h",
3880 "src/xnnpack/AlignedAllocator.h",
3881 ] + MICROKERNEL_TEST_HDRS,
3882 deps = MICROKERNEL_TEST_DEPS,
3883)
3884
3885xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3886 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3887 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3888 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3889 "test/gemm-microkernel-tester.h",
3890 "src/xnnpack/AlignedAllocator.h",
3891 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3892 deps = MICROKERNEL_TEST_DEPS,
3893)
3894
3895xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3896 name = "f16_prelu_test",
3897 srcs = [
3898 "test/f16-prelu.cc",
3899 "test/prelu-microkernel-tester.h",
3900 "src/xnnpack/AlignedAllocator.h",
3901 ] + MICROKERNEL_TEST_HDRS,
3902 deps = MICROKERNEL_TEST_DEPS,
3903)
3904
3905xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3906 name = "f32_prelu_test",
3907 srcs = [
3908 "test/f32-prelu.cc",
3909 "test/prelu-microkernel-tester.h",
3910 "src/xnnpack/AlignedAllocator.h",
3911 ] + MICROKERNEL_TEST_HDRS,
3912 deps = MICROKERNEL_TEST_DEPS,
3913)
3914
3915xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]3916 name = "f32_raddexpminusmax_test",
3917 srcs = [
3918 "test/f32-raddexpminusmax.cc",
3919 "test/raddexpminusmax-microkernel-tester.h",
3920 ] + MICROKERNEL_TEST_HDRS,
3921 deps = MICROKERNEL_TEST_DEPS,
3922)
3923
3924xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]3925 name = "f32_raddextexp_test",
3926 srcs = [
3927 "test/f32-raddextexp.cc",
3928 "test/raddextexp-microkernel-tester.h",
3929 ] + MICROKERNEL_TEST_HDRS,
3930 deps = MICROKERNEL_TEST_DEPS,
3931)
3932
3933xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]3934 name = "f32_raddstoreexpminusmax_test",
3935 srcs = [
3936 "test/f32-raddstoreexpminusmax.cc",
3937 "test/raddstoreexpminusmax-microkernel-tester.h",
3938 ] + MICROKERNEL_TEST_HDRS,
3939 deps = MICROKERNEL_TEST_DEPS,
3940)
3941
3942xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3943 name = "f32_rmax_test",
3944 srcs = [
3945 "test/f32-rmax.cc",
3946 "test/rmax-microkernel-tester.h",
3947 ] + MICROKERNEL_TEST_HDRS,
3948 deps = MICROKERNEL_TEST_DEPS,
3949)
3950
3951xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3952 name = "f32_sigmoid_test",
3953 srcs = [
3954 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]3955 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3956 ] + MICROKERNEL_TEST_HDRS,
3957 deps = MICROKERNEL_TEST_DEPS,
3958)
3959
3960xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3961 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3962 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3963 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3964 "test/spmm-microkernel-tester.h",
3965 "src/xnnpack/AlignedAllocator.h",
3966 ] + MICROKERNEL_TEST_HDRS,
3967 deps = MICROKERNEL_TEST_DEPS,
3968)
3969
3970xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]3971 name = "f16_vadd_minmax_test",
3972 srcs = [
3973 "test/f16-vadd-minmax.cc",
3974 "test/vbinary-microkernel-tester.h",
3975 ] + MICROKERNEL_TEST_HDRS,
3976 deps = MICROKERNEL_TEST_DEPS,
3977)
3978
3979xnnpack_unit_test(
3980 name = "f16_vaddc_minmax_test",
3981 srcs = [
3982 "test/f16-vaddc-minmax.cc",
3983 "test/vbinaryc-microkernel-tester.h",
3984 ] + MICROKERNEL_TEST_HDRS,
3985 deps = MICROKERNEL_TEST_DEPS,
3986)
3987
3988xnnpack_unit_test(
3989 name = "f16_vdiv_minmax_test",
3990 srcs = [
3991 "test/f16-vdiv-minmax.cc",
3992 "test/vbinary-microkernel-tester.h",
3993 ] + MICROKERNEL_TEST_HDRS,
3994 deps = MICROKERNEL_TEST_DEPS,
3995)
3996
3997xnnpack_unit_test(
3998 name = "f16_vdivc_minmax_test",
3999 srcs = [
4000 "test/f16-vdivc-minmax.cc",
4001 "test/vbinaryc-microkernel-tester.h",
4002 ] + MICROKERNEL_TEST_HDRS,
4003 deps = MICROKERNEL_TEST_DEPS,
4004)
4005
4006xnnpack_unit_test(
4007 name = "f16_vrdivc_minmax_test",
4008 srcs = [
4009 "test/f16-vrdivc-minmax.cc",
4010 "test/vbinaryc-microkernel-tester.h",
4011 ] + MICROKERNEL_TEST_HDRS,
4012 deps = MICROKERNEL_TEST_DEPS,
4013)
4014
4015xnnpack_unit_test(
4016 name = "f16_vmax_test",
4017 srcs = [
4018 "test/f16-vmax.cc",
4019 "test/vbinary-microkernel-tester.h",
4020 ] + MICROKERNEL_TEST_HDRS,
4021 deps = MICROKERNEL_TEST_DEPS,
4022)
4023
4024xnnpack_unit_test(
4025 name = "f16_vmaxc_test",
4026 srcs = [
4027 "test/f16-vmaxc.cc",
4028 "test/vbinaryc-microkernel-tester.h",
4029 ] + MICROKERNEL_TEST_HDRS,
4030 deps = MICROKERNEL_TEST_DEPS,
4031)
4032
4033xnnpack_unit_test(
4034 name = "f16_vmin_test",
4035 srcs = [
4036 "test/f16-vmin.cc",
4037 "test/vbinary-microkernel-tester.h",
4038 ] + MICROKERNEL_TEST_HDRS,
4039 deps = MICROKERNEL_TEST_DEPS,
4040)
4041
4042xnnpack_unit_test(
4043 name = "f16_vminc_test",
4044 srcs = [
4045 "test/f16-vminc.cc",
4046 "test/vbinaryc-microkernel-tester.h",
4047 ] + MICROKERNEL_TEST_HDRS,
4048 deps = MICROKERNEL_TEST_DEPS,
4049)
4050
4051xnnpack_unit_test(
4052 name = "f16_vmul_minmax_test",
4053 srcs = [
4054 "test/f16-vmul-minmax.cc",
4055 "test/vbinary-microkernel-tester.h",
4056 ] + MICROKERNEL_TEST_HDRS,
4057 deps = MICROKERNEL_TEST_DEPS,
4058)
4059
4060xnnpack_unit_test(
4061 name = "f16_vmulc_minmax_test",
4062 srcs = [
4063 "test/f16-vmulc-minmax.cc",
4064 "test/vbinaryc-microkernel-tester.h",
4065 ] + MICROKERNEL_TEST_HDRS,
4066 deps = MICROKERNEL_TEST_DEPS,
4067)
4068
4069xnnpack_unit_test(
4070 name = "f16_vsub_minmax_test",
4071 srcs = [
4072 "test/f16-vsub-minmax.cc",
4073 "test/vbinary-microkernel-tester.h",
4074 ] + MICROKERNEL_TEST_HDRS,
4075 deps = MICROKERNEL_TEST_DEPS,
4076)
4077
4078xnnpack_unit_test(
4079 name = "f16_vsubc_minmax_test",
4080 srcs = [
4081 "test/f16-vsubc-minmax.cc",
4082 "test/vbinaryc-microkernel-tester.h",
4083 ] + MICROKERNEL_TEST_HDRS,
4084 deps = MICROKERNEL_TEST_DEPS,
4085)
4086
4087xnnpack_unit_test(
4088 name = "f16_vrsubc_minmax_test",
4089 srcs = [
4090 "test/f16-vrsubc-minmax.cc",
4091 "test/vbinaryc-microkernel-tester.h",
4092 ] + MICROKERNEL_TEST_HDRS,
4093 deps = MICROKERNEL_TEST_DEPS,
4094)
4095
4096xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4097 name = "f32_vabs_test",
4098 srcs = [
4099 "test/f32-vabs.cc",
4100 "test/vunary-microkernel-tester.h",
4101 ] + MICROKERNEL_TEST_HDRS,
4102 deps = MICROKERNEL_TEST_DEPS,
4103)
4104
4105xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4106 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4107 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4108 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4109 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4110 ] + MICROKERNEL_TEST_HDRS,
4111 deps = MICROKERNEL_TEST_DEPS,
4112)
4113
4114xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4115 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4116 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4117 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4118 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4119 ] + MICROKERNEL_TEST_HDRS,
4120 deps = MICROKERNEL_TEST_DEPS,
4121)
4122
4123xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4124 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4125 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4126 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4127 "test/vbinary-microkernel-tester.h",
4128 ] + MICROKERNEL_TEST_HDRS,
4129 deps = MICROKERNEL_TEST_DEPS,
4130)
4131
4132xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4133 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4134 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4135 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4136 "test/vbinaryc-microkernel-tester.h",
4137 ] + MICROKERNEL_TEST_HDRS,
4138 deps = MICROKERNEL_TEST_DEPS,
4139)
4140
4141xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4142 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4143 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4144 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4145 "test/vbinaryc-microkernel-tester.h",
4146 ] + MICROKERNEL_TEST_HDRS,
4147 deps = MICROKERNEL_TEST_DEPS,
4148)
4149
4150xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]4151 name = "f32_vmax_test",
4152 srcs = [
4153 "test/f32-vmax.cc",
4154 "test/vbinary-microkernel-tester.h",
4155 ] + MICROKERNEL_TEST_HDRS,
4156 deps = MICROKERNEL_TEST_DEPS,
4157)
4158
4159xnnpack_unit_test(
4160 name = "f32_vmaxc_test",
4161 srcs = [
4162 "test/f32-vmaxc.cc",
4163 "test/vbinaryc-microkernel-tester.h",
4164 ] + MICROKERNEL_TEST_HDRS,
4165 deps = MICROKERNEL_TEST_DEPS,
4166)
4167
4168xnnpack_unit_test(
4169 name = "f32_vmin_test",
4170 srcs = [
4171 "test/f32-vmin.cc",
4172 "test/vbinary-microkernel-tester.h",
4173 ] + MICROKERNEL_TEST_HDRS,
4174 deps = MICROKERNEL_TEST_DEPS,
4175)
4176
4177xnnpack_unit_test(
4178 name = "f32_vminc_test",
4179 srcs = [
4180 "test/f32-vminc.cc",
4181 "test/vbinaryc-microkernel-tester.h",
4182 ] + MICROKERNEL_TEST_HDRS,
4183 deps = MICROKERNEL_TEST_DEPS,
4184)
4185
4186xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4187 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4188 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4189 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4190 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4191 ] + MICROKERNEL_TEST_HDRS,
4192 deps = MICROKERNEL_TEST_DEPS,
4193)
4194
4195xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4196 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4197 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4198 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4199 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4200 ] + MICROKERNEL_TEST_HDRS,
4201 deps = MICROKERNEL_TEST_DEPS,
4202)
4203
4204xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]4205 name = "f16_vmulcaddc_minmax_test",
4206 srcs = [
4207 "test/f16-vmulcaddc-minmax.cc",
4208 "test/vmulcaddc-microkernel-tester.h",
4209 "src/xnnpack/AlignedAllocator.h",
4210 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4211 deps = MICROKERNEL_TEST_DEPS,
4212)
4213
4214xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4215 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4216 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4217 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4218 "test/vmulcaddc-microkernel-tester.h",
4219 "src/xnnpack/AlignedAllocator.h",
4220 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4221 deps = MICROKERNEL_TEST_DEPS,
4222)
4223
4224xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]4225 name = "f32_vlrelu_test",
4226 srcs = [
4227 "test/f32-vlrelu.cc",
4228 "test/vunary-microkernel-tester.h",
4229 ] + MICROKERNEL_TEST_HDRS,
4230 deps = MICROKERNEL_TEST_DEPS,
4231)
4232
4233xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4234 name = "f32_vneg_test",
4235 srcs = [
4236 "test/f32-vneg.cc",
4237 "test/vunary-microkernel-tester.h",
4238 ] + MICROKERNEL_TEST_HDRS,
4239 deps = MICROKERNEL_TEST_DEPS,
4240)
4241
4242xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4243 name = "f32_vrndne_test",
4244 srcs = [
4245 "test/f32-vrndne.cc",
4246 "test/vunary-microkernel-tester.h",
4247 ] + MICROKERNEL_TEST_HDRS,
4248 deps = MICROKERNEL_TEST_DEPS,
4249)
4250
4251xnnpack_unit_test(
4252 name = "f32_vrndz_test",
4253 srcs = [
4254 "test/f32-vrndz.cc",
4255 "test/vunary-microkernel-tester.h",
4256 ] + MICROKERNEL_TEST_HDRS,
4257 deps = MICROKERNEL_TEST_DEPS,
4258)
4259
4260xnnpack_unit_test(
4261 name = "f32_vrndu_test",
4262 srcs = [
4263 "test/f32-vrndu.cc",
4264 "test/vunary-microkernel-tester.h",
4265 ] + MICROKERNEL_TEST_HDRS,
4266 deps = MICROKERNEL_TEST_DEPS,
4267)
4268
4269xnnpack_unit_test(
4270 name = "f32_vrndd_test",
4271 srcs = [
4272 "test/f32-vrndd.cc",
4273 "test/vunary-microkernel-tester.h",
4274 ] + MICROKERNEL_TEST_HDRS,
4275 deps = MICROKERNEL_TEST_DEPS,
4276)
4277
4278xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]4279 name = "f32_vscale_test",
4280 srcs = [
4281 "test/f32-vscale.cc",
4282 "test/vscale-microkernel-tester.h",
4283 ] + MICROKERNEL_TEST_HDRS,
4284 deps = MICROKERNEL_TEST_DEPS,
4285)
4286
4287xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4288 name = "f32_vscaleexpminusmax_test",
4289 srcs = [
4290 "test/f32-vscaleexpminusmax.cc",
4291 "test/vscaleexpminusmax-microkernel-tester.h",
4292 ] + MICROKERNEL_TEST_HDRS,
4293 deps = MICROKERNEL_TEST_DEPS,
4294)
4295
4296xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4297 name = "f32_vscaleextexp_test",
4298 srcs = [
4299 "test/f32-vscaleextexp.cc",
4300 "test/vscaleextexp-microkernel-tester.h",
4301 ] + MICROKERNEL_TEST_HDRS,
4302 deps = MICROKERNEL_TEST_DEPS,
4303)
4304
4305xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4306 name = "f32_vsqr_test",
4307 srcs = [
4308 "test/f32-vsqr.cc",
4309 "test/vunary-microkernel-tester.h",
4310 ] + MICROKERNEL_TEST_HDRS,
4311 deps = MICROKERNEL_TEST_DEPS,
4312)
4313
4314xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]4315 name = "f32_vsqrdiff_test",
4316 srcs = [
4317 "test/f32-vsqrdiff.cc",
4318 "test/vbinary-microkernel-tester.h",
4319 ] + MICROKERNEL_TEST_HDRS,
4320 deps = MICROKERNEL_TEST_DEPS,
4321)
4322
4323xnnpack_unit_test(
4324 name = "f32_vsqrdiffc_test",
4325 srcs = [
4326 "test/f32-vsqrdiffc.cc",
4327 "test/vbinaryc-microkernel-tester.h",
4328 ] + MICROKERNEL_TEST_HDRS,
4329 deps = MICROKERNEL_TEST_DEPS,
4330)
4331
4332xnnpack_unit_test(
4333 name = "f32_vrsqrdiffc_test",
4334 srcs = [
4335 "test/f32-vrsqrdiffc.cc",
4336 "test/vbinaryc-microkernel-tester.h",
4337 ] + MICROKERNEL_TEST_HDRS,
4338 deps = MICROKERNEL_TEST_DEPS,
4339)
4340
4341xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4342 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4343 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4344 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4345 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4346 ] + MICROKERNEL_TEST_HDRS,
4347 deps = MICROKERNEL_TEST_DEPS,
4348)
4349
4350xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4351 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4352 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4353 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4354 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4355 ] + MICROKERNEL_TEST_HDRS,
4356 deps = MICROKERNEL_TEST_DEPS,
4357)
4358
4359xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4360 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4361 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4362 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4363 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4364 ] + MICROKERNEL_TEST_HDRS,
4365 deps = MICROKERNEL_TEST_DEPS,
4366)
4367
4368xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4369 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4370 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4371 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4372 "test/avgpool-microkernel-tester.h",
4373 "src/xnnpack/AlignedAllocator.h",
4374 ] + MICROKERNEL_TEST_HDRS,
4375 deps = MICROKERNEL_TEST_DEPS,
4376)
4377
4378xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4379 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4380 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4381 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4382 "test/gemm-microkernel-tester.h",
4383 "src/xnnpack/AlignedAllocator.h",
4384 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4385 deps = MICROKERNEL_TEST_DEPS,
4386)
4387
4388xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4389 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4390 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4391 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4392 "test/dwconv-microkernel-tester.h",
4393 "src/xnnpack/AlignedAllocator.h",
4394 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4395 deps = MICROKERNEL_TEST_DEPS,
4396)
4397
4398xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4399 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4400 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4401 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4402 "test/gavgpool-microkernel-tester.h",
4403 "src/xnnpack/AlignedAllocator.h",
4404 ] + MICROKERNEL_TEST_HDRS,
4405 deps = MICROKERNEL_TEST_DEPS,
4406)
4407
4408xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4409 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4410 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4411 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4412 "test/gemm-microkernel-tester.h",
4413 "src/xnnpack/AlignedAllocator.h",
4414 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4415 deps = MICROKERNEL_TEST_DEPS,
4416)
4417
4418xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4419 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4420 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4421 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4422 "test/vadd-microkernel-tester.h",
4423 ] + MICROKERNEL_TEST_HDRS,
4424 deps = MICROKERNEL_TEST_DEPS,
4425)
4426
4427xnnpack_unit_test(
4428 name = "u8_clamp_test",
4429 srcs = [
4430 "test/u8-clamp.cc",
4431 "test/clamp-microkernel-tester.h",
4432 ] + MICROKERNEL_TEST_HDRS,
4433 deps = MICROKERNEL_TEST_DEPS,
4434)
4435
4436xnnpack_unit_test(
4437 name = "u8_lut32norm_test",
4438 srcs = [
4439 "test/u8-lut32norm.cc",
4440 "test/lut-norm-microkernel-tester.h",
4441 ] + MICROKERNEL_TEST_HDRS,
4442 deps = MICROKERNEL_TEST_DEPS,
4443)
4444
4445xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4446 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4447 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4448 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4449 "test/maxpool-microkernel-tester.h",
4450 ] + MICROKERNEL_TEST_HDRS,
4451 deps = MICROKERNEL_TEST_DEPS,
4452)
4453
4454xnnpack_unit_test(
4455 name = "u8_rmax_test",
4456 srcs = [
4457 "test/u8-rmax.cc",
4458 "test/rmax-microkernel-tester.h",
4459 ] + MICROKERNEL_TEST_HDRS,
4460 deps = MICROKERNEL_TEST_DEPS,
4461)
4462
4463xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4464 name = "x32_fill_test",
4465 srcs = [
4466 "test/x32-fill.cc",
4467 "test/fill-microkernel-tester.h",
4468 ] + MICROKERNEL_TEST_HDRS,
4469 deps = MICROKERNEL_TEST_DEPS,
4470)
4471
4472xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4473 name = "x32_packx_test",
4474 srcs = [
4475 "test/x32-packx.cc",
4476 "test/pack-microkernel-tester.h",
4477 "src/xnnpack/AlignedAllocator.h",
4478 ] + MICROKERNEL_TEST_HDRS,
4479 deps = MICROKERNEL_TEST_DEPS,
4480)
4481
4482xnnpack_unit_test(
4483 name = "x32_pad_test",
4484 srcs = [
4485 "test/x32-pad.cc",
4486 "test/pad-microkernel-tester.h",
4487 ] + MICROKERNEL_TEST_HDRS,
4488 deps = MICROKERNEL_TEST_DEPS,
4489)
4490
4491xnnpack_unit_test(
4492 name = "x32_unpool_test",
4493 srcs = [
4494 "test/x32-unpool.cc",
4495 "test/unpool-microkernel-tester.h",
4496 ] + MICROKERNEL_TEST_HDRS,
4497 deps = MICROKERNEL_TEST_DEPS,
4498)
4499
4500xnnpack_unit_test(
4501 name = "x32_zip_test",
4502 srcs = [
4503 "test/x32-zip.cc",
4504 "test/zip-microkernel-tester.h",
4505 ] + MICROKERNEL_TEST_HDRS,
4506 deps = MICROKERNEL_TEST_DEPS,
4507)
4508
4509xnnpack_unit_test(
4510 name = "x8_lut_test",
4511 srcs = [
4512 "test/x8-lut.cc",
4513 "test/lut-microkernel-tester.h",
4514 ] + MICROKERNEL_TEST_HDRS,
4515 deps = MICROKERNEL_TEST_DEPS,
4516)
4517
4518xnnpack_unit_test(
4519 name = "x8_zip_test",
4520 srcs = [
4521 "test/x8-zip.cc",
4522 "test/zip-microkernel-tester.h",
4523 ] + MICROKERNEL_TEST_HDRS,
4524 deps = MICROKERNEL_TEST_DEPS,
4525)
4526
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4527xnnpack_unit_test(
4528 name = "requantization_test",
4529 srcs = [
4530 "src/xnnpack/requantization-stubs.h",
4531 "test/requantization.cc",
4532 "test/requantization-tester.h",
4533 ] + MICROKERNEL_TEST_HDRS,
4534 deps = MICROKERNEL_TEST_DEPS,
4535)
4536
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4537########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4538
4539xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4540 name = "operator_size_test",
4541 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4542 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4543)
4544
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4545xnnpack_binary(
4546 name = "subgraph_size_test",
4547 srcs = ["test/subgraph-size.c"],
4548 deps = [":XNNPACK"],
4549)
4550
4551########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4552
4553xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4554 name = "abs_nc_test",
4555 srcs = [
4556 "test/abs-nc.cc",
4557 "test/abs-operator-tester.h",
4558 ],
4559 deps = OPERATOR_TEST_DEPS,
4560)
4561
4562xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4563 name = "add_nd_test",
4564 srcs = [
4565 "test/add-nd.cc",
4566 "test/binary-elementwise-operator-tester.h",
4567 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4568 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4569)
4570
4571xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4572 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4573 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4574 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4575 "test/argmax-pooling-operator-tester.h",
4576 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4577 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4578)
4579
4580xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4581 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4582 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4583 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4584 "test/average-pooling-operator-tester.h",
4585 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4586 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4587)
4588
4589xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4590 name = "bankers_rounding_nc_test",
4591 srcs = [
4592 "test/bankers-rounding-nc.cc",
4593 "test/bankers-rounding-operator-tester.h",
4594 ],
4595 deps = OPERATOR_TEST_DEPS,
4596)
4597
4598xnnpack_unit_test(
4599 name = "ceiling_nc_test",
4600 srcs = [
4601 "test/ceiling-nc.cc",
4602 "test/ceiling-operator-tester.h",
4603 ],
4604 deps = OPERATOR_TEST_DEPS,
4605)
4606
4607xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4608 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4609 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4610 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4611 "test/channel-shuffle-operator-tester.h",
4612 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4613 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4614)
4615
4616xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4617 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4618 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4619 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4620 "test/clamp-operator-tester.h",
4621 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4622 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4623)
4624
4625xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]4626 name = "constant_pad_nd_test",
4627 srcs = [
4628 "test/constant-pad-nd.cc",
4629 "test/constant-pad-operator-tester.h",
4630 ],
4631 deps = OPERATOR_TEST_DEPS,
4632)
4633
4634xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4635 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4636 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4637 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4638 "test/convolution-operator-tester.h",
4639 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4640 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4641)
4642
4643xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4644 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4645 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4646 "test/convolution-nchw.cc",
4647 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4648 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4649 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4650)
4651
4652xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]4653 name = "copy_nc_test",
4654 srcs = [
4655 "test/copy-nc.cc",
4656 "test/copy-operator-tester.h",
4657 ],
4658 deps = OPERATOR_TEST_DEPS,
4659)
4660
4661xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4662 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4663 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4664 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4665 "test/deconvolution-operator-tester.h",
4666 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4667 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4668)
4669
4670xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4671 name = "divide_nd_test",
4672 srcs = [
4673 "test/binary-elementwise-operator-tester.h",
4674 "test/divide-nd.cc",
4675 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4676 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4677)
4678
4679xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4680 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4681 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4682 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4683 "test/fully-connected-operator-tester.h",
4684 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4685 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4686)
4687
4688xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4689 name = "floor_nc_test",
4690 srcs = [
4691 "test/floor-nc.cc",
4692 "test/floor-operator-tester.h",
4693 ],
4694 deps = OPERATOR_TEST_DEPS,
4695)
4696
4697xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4698 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4699 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4700 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4701 "test/global-average-pooling-operator-tester.h",
4702 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4703 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4704)
4705
4706xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4707 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4708 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4709 "test/global-average-pooling-ncw.cc",
4710 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4711 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4712 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4713)
4714
4715xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4716 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4717 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4718 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4719 "test/hardswish-operator-tester.h",
4720 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4721 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4722)
4723
4724xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4725 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4726 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4727 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4728 "test/leaky-relu-operator-tester.h",
4729 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4730 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4731)
4732
4733xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4734 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4735 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4736 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4737 "test/max-pooling-operator-tester.h",
4738 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4739 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4740)
4741
4742xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4743 name = "maximum_nd_test",
4744 srcs = [
4745 "test/binary-elementwise-operator-tester.h",
4746 "test/maximum-nd.cc",
4747 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4748 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4749)
4750
4751xnnpack_unit_test(
4752 name = "minimum_nd_test",
4753 srcs = [
4754 "test/binary-elementwise-operator-tester.h",
4755 "test/minimum-nd.cc",
4756 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4757 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4758)
4759
4760xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4761 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4762 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4763 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4764 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4765 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4766 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4767)
4768
4769xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4770 name = "negate_nc_test",
4771 srcs = [
4772 "test/negate-nc.cc",
4773 "test/negate-operator-tester.h",
4774 ],
4775 deps = OPERATOR_TEST_DEPS,
4776)
4777
4778xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4779 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4780 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4781 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4782 "test/prelu-operator-tester.h",
4783 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4784 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4785)
4786
4787xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4788 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4789 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4790 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4791 "test/resize-bilinear-operator-tester.h",
4792 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4793 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4794)
4795
4796xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4797 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4798 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4799 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4800 "test/sigmoid-operator-tester.h",
4801 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4802 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4803)
4804
4805xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4806 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4807 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4808 "test/softmax-nc.cc",
4809 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4810 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4811 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4812)
4813
4814xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4815 name = "square_nc_test",
4816 srcs = [
4817 "test/square-nc.cc",
4818 "test/square-operator-tester.h",
4819 ],
4820 deps = OPERATOR_TEST_DEPS,
4821)
4822
4823xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]4824 name = "squared_difference_nd_test",
4825 srcs = [
4826 "test/binary-elementwise-operator-tester.h",
4827 "test/squared-difference-nd.cc",
4828 ],
4829 deps = OPERATOR_TEST_DEPS,
4830)
4831
4832xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4833 name = "subtract_nd_test",
4834 srcs = [
4835 "test/binary-elementwise-operator-tester.h",
4836 "test/subtract-nd.cc",
4837 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4838 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4839)
4840
4841xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4842 name = "truncation_nc_test",
4843 srcs = [
4844 "test/truncation-nc.cc",
4845 "test/truncation-operator-tester.h",
4846 ],
4847 deps = OPERATOR_TEST_DEPS,
4848)
4849
4850xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4851 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4852 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4853 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4854 "test/unpooling-operator-tester.h",
4855 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4856 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4857)
4858
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]4859############################### Misc unit tests ###############################
4860
4861xnnpack_unit_test(
4862 name = "memory_planner_test",
4863 srcs = [
4864 "test/memory-planner-test.cc",
4865 ],
4866 deps = [
4867 ":XNNPACK",
4868 ":memory_planner",
4869 ],
4870)
4871
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4872############################# Build configurations #############################
4873
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4874# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4875config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4876 name = "xnn_enable_assembly_explicit_true",
4877 define_values = {"xnn_enable_assembly": "true"},
4878)
4879
4880# Disables usage of assembly kernels.
4881config_setting(
4882 name = "xnn_enable_assembly_explicit_false",
4883 define_values = {"xnn_enable_assembly": "false"},
4884)
4885
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]4886# Disables usage of HMP-aware optimizations.
4887config_setting(
4888 name = "xnn_enable_hmp_explicit_false",
4889 define_values = {"xnn_enable_hmp": "false"},
4890)
4891
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]4892# Enable usage of optimized memory allocation
4893config_setting(
4894 name = "xnn_enable_memopt_explicit_true",
4895 define_values = {"xnnpack_enable_memopt": "true"},
4896)
4897
4898# Disable usage of optimized memory allocation
4899config_setting(
4900 name = "xnn_enable_memopt_explicit_false",
4901 define_values = {"xnnpack_enable_memopt": "false"},
4902)
4903
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4904# Builds with -c dbg
4905config_setting(
4906 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4907 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4908 "compilation_mode": "dbg",
4909 },
4910)
4911
4912# Builds with -c opt
4913config_setting(
4914 name = "optimized_build",
4915 values = {
4916 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4917 },
4918)
4919
4920config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]4921 name = "linux_k8",
4922 values = {"cpu": "k8"},
4923)
4924
4925config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]4926 name = "linux_arm",
4927 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]4928)
4929
4930config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -0700[diff] [blame^]4931 name = "linux_armeabi",
4932 values = {"cpu": "armeabi"},
4933)
4934
4935config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]4936 name = "linux_armhf",
4937 values = {"cpu": "armhf"},
4938)
4939
4940config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -0700[diff] [blame]4941 name = "linux_armv7a",
4942 values = {"cpu": "armv7a"},
4943)
4944
4945config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]4946 name = "linux_aarch64",
4947 values = {"cpu": "aarch64"},
4948)
4949
4950config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4951 name = "android",
4952 values = {"crosstool_top": "//external:android/crosstool"},
4953)
4954
4955config_setting(
4956 name = "android_armv7",
4957 values = {
4958 "crosstool_top": "//external:android/crosstool",
4959 "cpu": "armeabi-v7a",
4960 },
4961)
4962
4963config_setting(
4964 name = "android_arm64",
4965 values = {
4966 "crosstool_top": "//external:android/crosstool",
4967 "cpu": "arm64-v8a",
4968 },
4969)
4970
4971config_setting(
4972 name = "android_x86",
4973 values = {
4974 "crosstool_top": "//external:android/crosstool",
4975 "cpu": "x86",
4976 },
4977)
4978
4979config_setting(
4980 name = "android_x86_64",
4981 values = {
4982 "crosstool_top": "//external:android/crosstool",
4983 "cpu": "x86_64",
4984 },
4985)
4986
4987config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]4988 name = "windows_x86_64",
4989 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]4990)
4991
4992config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]4993 name = "windows_x86_64_clang",
4994 values = {
4995 "compiler": "clang-cl",
4996 "cpu": "x64_windows",
4997 },
4998)
4999
5000config_setting(
5001 name = "windows_x86_64_mingw",
5002 values = {
5003 "compiler": "mingw-gcc",
5004 "cpu": "x64_windows",
5005 },
5006)
5007
5008config_setting(
5009 name = "windows_x86_64_msys",
5010 values = {
5011 "compiler": "msys-gcc",
5012 "cpu": "x64_windows",
5013 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5014)
5015
5016config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]5017 name = "macos_x86_64",
5018 values = {
5019 "apple_platform_type": "macos",
5020 "cpu": "darwin",
5021 },
5022)
5023
5024config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5025 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5026 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5027)
5028
5029config_setting(
5030 name = "emscripten_wasm",
5031 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5032 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5033 "cpu": "wasm",
5034 },
5035)
5036
5037config_setting(
5038 name = "emscripten_wasmsimd",
5039 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5040 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5041 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]5042 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5043 },
5044)
5045
5046config_setting(
5047 name = "emscripten_asmjs",
5048 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5049 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5050 "cpu": "asmjs",
5051 },
5052)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5053
5054config_setting(
5055 name = "ios_armv7",
5056 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5057 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5058 "cpu": "ios_armv7",
5059 },
5060)
5061
5062config_setting(
5063 name = "ios_arm64",
5064 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5065 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5066 "cpu": "ios_arm64",
5067 },
5068)
5069
5070config_setting(
5071 name = "ios_arm64e",
5072 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5073 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5074 "cpu": "ios_arm64e",
5075 },
5076)
5077
5078config_setting(
5079 name = "ios_x86",
5080 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5081 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5082 "cpu": "ios_i386",
5083 },
5084)
5085
5086config_setting(
5087 name = "ios_x86_64",
5088 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5089 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5090 "cpu": "ios_x86_64",
5091 },
5092)
5093
5094config_setting(
5095 name = "watchos_armv7k",
5096 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5097 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5098 "cpu": "watchos_armv7k",
5099 },
5100)
5101
5102config_setting(
5103 name = "watchos_arm64_32",
5104 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5105 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5106 "cpu": "watchos_arm64_32",
5107 },
5108)
5109
5110config_setting(
5111 name = "watchos_x86",
5112 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5113 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5114 "cpu": "watchos_i386",
5115 },
5116)
5117
5118config_setting(
5119 name = "watchos_x86_64",
5120 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5121 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5122 "cpu": "watchos_x86_64",
5123 },
5124)
5125
5126config_setting(
5127 name = "tvos_arm64",
5128 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5129 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5130 "cpu": "tvos_arm64",
5131 },
5132)
5133
5134config_setting(
5135 name = "tvos_x86_64",
5136 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5137 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5138 "cpu": "tvos_x86_64",
5139 },
5140)