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Alex Deucher09361392015-04-20 12:04:22 -04001/*
2 * Copyright © 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
Emil Velikova30da8e2015-08-07 17:20:51 +010022 *
Alex Deucher09361392015-04-20 12:04:22 -040023 */
24
25#ifndef _AMDGPU_INTERNAL_H_
26#define _AMDGPU_INTERNAL_H_
27
28#ifdef HAVE_CONFIG_H
29#include "config.h"
30#endif
31
32#include <assert.h>
33#include <pthread.h>
Emil Velikovb4718182015-08-07 16:54:29 +010034
35#include "libdrm_macros.h"
Alex Deucher09361392015-04-20 12:04:22 -040036#include "xf86atomic.h"
37#include "amdgpu.h"
38#include "util_double_list.h"
39
40#define AMDGPU_CS_MAX_RINGS 8
monk.liu2f2c8ac2015-04-23 13:18:59 +080041/* do not use below macro if b is not power of 2 aligned value */
Jack Xiao74547792015-05-07 16:07:03 +080042#define __round_mask(x, y) ((__typeof__(x))((y)-1))
43#define ROUND_UP(x, y) ((((x)-1) | __round_mask(x, y))+1)
44#define ROUND_DOWN(x, y) ((x) & ~__round_mask(x, y))
Alex Deucher09361392015-04-20 12:04:22 -040045
Jammy Zhou241cf6d2015-05-13 01:14:11 +080046#define AMDGPU_INVALID_VA_ADDRESS 0xffffffffffffffff
47
Alex Deucher09361392015-04-20 12:04:22 -040048struct amdgpu_bo_va_hole {
49 struct list_head list;
50 uint64_t offset;
51 uint64_t size;
52};
53
54struct amdgpu_bo_va_mgr {
Ken Wang322d02d2015-05-21 17:21:21 +080055 atomic_t refcount;
Alex Deucher09361392015-04-20 12:04:22 -040056 /* the start virtual address */
57 uint64_t va_offset;
Jammy Zhou241cf6d2015-05-13 01:14:11 +080058 uint64_t va_max;
Alex Deucher09361392015-04-20 12:04:22 -040059 struct list_head va_holes;
60 pthread_mutex_t bo_va_mutex;
61 uint32_t va_alignment;
62};
63
Sabre Shao23fab592015-07-09 13:50:36 +080064struct amdgpu_va {
65 amdgpu_device_handle dev;
66 uint64_t address;
67 uint64_t size;
68 enum amdgpu_gpu_va_range range;
69};
70
Alex Deucher09361392015-04-20 12:04:22 -040071struct amdgpu_device {
72 atomic_t refcount;
73 int fd;
74 int flink_fd;
75 unsigned major_version;
76 unsigned minor_version;
77
78 /** List of buffer handles. Protected by bo_table_mutex. */
79 struct util_hash_table *bo_handles;
80 /** List of buffer GEM flink names. Protected by bo_table_mutex. */
81 struct util_hash_table *bo_flink_names;
Alex Deucher09361392015-04-20 12:04:22 -040082 /** This protects all hash tables. */
83 pthread_mutex_t bo_table_mutex;
Alex Deucher09361392015-04-20 12:04:22 -040084 struct drm_amdgpu_info_device dev_info;
85 struct amdgpu_gpu_info info;
Ken Wang322d02d2015-05-21 17:21:21 +080086 struct amdgpu_bo_va_mgr *vamgr;
Alex Deucher09361392015-04-20 12:04:22 -040087};
88
89struct amdgpu_bo {
90 atomic_t refcount;
91 struct amdgpu_device *dev;
92
93 uint64_t alloc_size;
Alex Deucher09361392015-04-20 12:04:22 -040094
95 uint32_t handle;
96 uint32_t flink_name;
97
98 pthread_mutex_t cpu_access_mutex;
99 void *cpu_ptr;
100 int cpu_map_count;
101};
102
Christian König6dc2eaf2015-04-22 14:52:34 +0200103struct amdgpu_bo_list {
104 struct amdgpu_device *dev;
105
106 uint32_t handle;
107};
108
Alex Deucher09361392015-04-20 12:04:22 -0400109struct amdgpu_context {
Christian König9c2afff2015-04-22 12:21:13 +0200110 struct amdgpu_device *dev;
Alex Deucher09361392015-04-20 12:04:22 -0400111 /** Mutex for accessing fences and to maintain command submissions
Jammy Zhou40c53362015-05-29 12:59:59 +0200112 in good sequence. */
Alex Deucher09361392015-04-20 12:04:22 -0400113 pthread_mutex_t sequence_mutex;
Alex Deucher09361392015-04-20 12:04:22 -0400114 /* context id*/
115 uint32_t id;
116};
117
Alex Deucher09361392015-04-20 12:04:22 -0400118/**
119 * Functions.
120 */
121
122void amdgpu_device_free_internal(amdgpu_device_handle dev);
123
124void amdgpu_bo_free_internal(amdgpu_bo_handle bo);
125
Emil Velikovb4718182015-08-07 16:54:29 +0100126drm_private struct amdgpu_bo_va_mgr*
127amdgpu_vamgr_get_global(struct amdgpu_device *dev);
Ken Wang322d02d2015-05-21 17:21:21 +0800128
Emil Velikovb4718182015-08-07 16:54:29 +0100129drm_private void
130amdgpu_vamgr_reference(struct amdgpu_bo_va_mgr **dst,
131 struct amdgpu_bo_va_mgr *src);
Alex Deucher09361392015-04-20 12:04:22 -0400132
Emil Velikovb4718182015-08-07 16:54:29 +0100133drm_private uint64_t
134amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
135 uint64_t alignment, uint64_t base_required);
Alex Deucher09361392015-04-20 12:04:22 -0400136
Emil Velikovb4718182015-08-07 16:54:29 +0100137drm_private void
138amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
Alex Deucher09361392015-04-20 12:04:22 -0400139
140int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
141
142uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
143
144/**
145 * Inline functions.
146 */
147
148/**
149 * Increment src and decrement dst as if we were updating references
150 * for an assignment between 2 pointers of some objects.
151 *
152 * \return true if dst is 0
153 */
154static inline bool update_references(atomic_t *dst, atomic_t *src)
155{
156 if (dst != src) {
157 /* bump src first */
158 if (src) {
159 assert(atomic_read(src) > 0);
160 atomic_inc(src);
161 }
162 if (dst) {
163 assert(atomic_read(dst) > 0);
164 return atomic_dec_and_test(dst);
165 }
166 }
167 return false;
168}
169
170/**
171 * Assignment between two amdgpu_bo pointers with reference counting.
172 *
173 * Usage:
174 * struct amdgpu_bo *dst = ... , *src = ...;
175 *
176 * dst = src;
177 * // No reference counting. Only use this when you need to move
178 * // a reference from one pointer to another.
179 *
180 * amdgpu_bo_reference(&dst, src);
181 * // Reference counters are updated. dst is decremented and src is
182 * // incremented. dst is freed if its reference counter is 0.
183 */
184static inline void amdgpu_bo_reference(struct amdgpu_bo **dst,
185 struct amdgpu_bo *src)
186{
187 if (update_references(&(*dst)->refcount, &src->refcount))
188 amdgpu_bo_free_internal(*dst);
189 *dst = src;
190}
191
192/**
193 * Assignment between two amdgpu_device pointers with reference counting.
194 *
195 * Usage:
196 * struct amdgpu_device *dst = ... , *src = ...;
197 *
198 * dst = src;
199 * // No reference counting. Only use this when you need to move
200 * // a reference from one pointer to another.
201 *
202 * amdgpu_device_reference(&dst, src);
203 * // Reference counters are updated. dst is decremented and src is
204 * // incremented. dst is freed if its reference counter is 0.
205 */
206void amdgpu_device_reference(struct amdgpu_device **dst,
207 struct amdgpu_device *src);
208#endif