blob: 37a96feb5268e05368f4c0c05da2145cabe02909 [file] [log] [blame]
Stéphane Marchesin25a26062014-09-12 16:18:59 -07001/*
Daniele Castagna7a755de2016-12-16 17:32:30 -05002 * Copyright 2014 The Chromium OS Authors. All rights reserved.
Stéphane Marchesin25a26062014-09-12 16:18:59 -07003 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_I915
Stéphane Marchesin25a26062014-09-12 16:18:59 -07008
9#include <errno.h>
Gurchetan Singh82a8eed2017-01-03 13:01:37 -080010#include <i915_drm.h>
Gurchetan Singhcc015e82017-01-17 16:15:25 -080011#include <stdio.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070012#include <string.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070013#include <sys/mman.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070014#include <xf86drm.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070015
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070016#include "drv_priv.h"
Stéphane Marchesin25a26062014-09-12 16:18:59 -070017#include "helpers.h"
18#include "util.h"
19
Gurchetan Singh68af9c22017-01-18 13:48:11 -080020#define I915_CACHELINE_SIZE 64
21#define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
22
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070023static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888,
24 DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
25 DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
26 DRM_FORMAT_XRGB8888 };
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080027
Dongseong Hwang750e0b92017-06-07 15:17:25 -070028static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_NV12,
29 DRM_FORMAT_R8, DRM_FORMAT_UYVY,
30 DRM_FORMAT_YUYV };
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070031
32static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
Gurchetan Singh179687e2016-10-28 10:07:35 -070033
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080034struct i915_device {
Gurchetan Singh68af9c22017-01-18 13:48:11 -080035 uint32_t gen;
36 int32_t has_llc;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070037};
38
Gurchetan Singh68af9c22017-01-18 13:48:11 -080039static uint32_t i915_get_gen(int device_id)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070040{
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080041 const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
42 0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
Stéphane Marchesina39dfde2014-09-15 15:38:25 -070043 unsigned i;
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080044 for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070045 if (gen3_ids[i] == device_id)
46 return 3;
47
48 return 4;
49}
50
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080051static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
52{
53 uint32_t i;
54 struct combination *combo;
55
56 /*
57 * Older hardware can't scanout Y-tiled formats. Newer devices can, and
58 * report this functionality via format modifiers.
59 */
60 for (i = 0; i < drv->backend->combos.size; i++) {
61 combo = &drv->backend->combos.data[i];
62 if (combo->format == item->format) {
63 if ((combo->metadata.tiling == I915_TILING_Y &&
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080064 item->modifier == I915_FORMAT_MOD_Y_TILED) ||
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080065 (combo->metadata.tiling == I915_TILING_X &&
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080066 item->modifier == I915_FORMAT_MOD_X_TILED)) {
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080067 combo->metadata.modifier = item->modifier;
68 combo->usage |= item->usage;
69 } else if (combo->metadata.tiling != I915_TILING_Y) {
70 combo->usage |= item->usage;
71 }
72 }
73 }
74
75 return 0;
76}
77
78static int i915_add_combinations(struct driver *drv)
79{
80 int ret;
81 uint32_t i, num_items;
82 struct kms_item *items;
83 struct format_metadata metadata;
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070084 uint64_t render_flags, texture_flags;
85
86 render_flags = BO_USE_RENDER_MASK;
87 texture_flags = BO_USE_TEXTURE_MASK;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080088
89 metadata.tiling = I915_TILING_NONE;
90 metadata.priority = 1;
91 metadata.modifier = DRM_FORMAT_MOD_NONE;
92
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070093 ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
94 &metadata, render_flags);
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080095 if (ret)
96 return ret;
97
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070098 ret = drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
99 &metadata, texture_flags);
100 if (ret)
101 return ret;
102
103 ret = drv_add_combinations(drv, tileable_texture_source_formats,
Dongseong Hwang3c5be5a2017-06-14 10:47:11 -0700104 ARRAY_SIZE(tileable_texture_source_formats), &metadata,
105 texture_flags);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800106 if (ret)
107 return ret;
108
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800109 drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
110 drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800111
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700112 render_flags &= ~BO_USE_SW_WRITE_OFTEN;
113 render_flags &= ~BO_USE_SW_READ_OFTEN;
114 render_flags &= ~BO_USE_LINEAR;
115
116 texture_flags &= ~BO_USE_SW_WRITE_OFTEN;
117 texture_flags &= ~BO_USE_SW_READ_OFTEN;
118 texture_flags &= ~BO_USE_LINEAR;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800119
120 metadata.tiling = I915_TILING_X;
121 metadata.priority = 2;
122
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700123 ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
124 &metadata, render_flags);
125 if (ret)
126 return ret;
127
128 ret = drv_add_combinations(drv, tileable_texture_source_formats,
129 ARRAY_SIZE(tileable_texture_source_formats), &metadata,
130 texture_flags);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800131 if (ret)
132 return ret;
133
134 metadata.tiling = I915_TILING_Y;
135 metadata.priority = 3;
136
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700137 ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
138 &metadata, render_flags);
139 if (ret)
140 return ret;
141
142 ret = drv_add_combinations(drv, tileable_texture_source_formats,
143 ARRAY_SIZE(tileable_texture_source_formats), &metadata,
144 texture_flags);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800145 if (ret)
146 return ret;
147
148 items = drv_query_kms(drv, &num_items);
149 if (!items || !num_items)
150 return 0;
151
152 for (i = 0; i < num_items; i++) {
153 ret = i915_add_kms_item(drv, &items[i]);
154 if (ret) {
155 free(items);
156 return ret;
157 }
158 }
159
160 free(items);
161 return 0;
162}
163
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800164static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
165 uint32_t *aligned_height)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700166{
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700167 struct i915_device *i915 = bo->drv->priv;
168 uint32_t horizontal_alignment = 4;
169 uint32_t vertical_alignment = 4;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700170
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700171 switch (tiling) {
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700172 default:
173 case I915_TILING_NONE:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700174 horizontal_alignment = 64;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700175 break;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800176
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700177 case I915_TILING_X:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700178 horizontal_alignment = 512;
179 vertical_alignment = 8;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700180 break;
181
182 case I915_TILING_Y:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700183 if (i915->gen == 3) {
184 horizontal_alignment = 512;
185 vertical_alignment = 8;
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800186 } else {
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700187 horizontal_alignment = 128;
188 vertical_alignment = 32;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700189 }
190 break;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700191 }
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800192
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700193 *aligned_height = ALIGN(bo->height, vertical_alignment);
194 if (i915->gen > 3) {
195 *stride = ALIGN(*stride, horizontal_alignment);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800196 } else {
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700197 while (*stride > horizontal_alignment)
198 horizontal_alignment <<= 1;
199
200 *stride = horizontal_alignment;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800201 }
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800202
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700203 if (i915->gen <= 3 && *stride > 8192)
204 return -EINVAL;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800205
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700206 return 0;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700207}
208
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800209static void i915_clflush(void *start, size_t size)
210{
211 void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
212 void *end = (void *)((uintptr_t)start + size);
213
214 __builtin_ia32_mfence();
215 while (p < end) {
216 __builtin_ia32_clflush(p);
217 p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
218 }
219}
220
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800221static int i915_init(struct driver *drv)
222{
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800223 int ret;
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800224 int device_id;
225 struct i915_device *i915;
226 drm_i915_getparam_t get_param;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800227
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800228 i915 = calloc(1, sizeof(*i915));
229 if (!i915)
230 return -ENOMEM;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800231
232 memset(&get_param, 0, sizeof(get_param));
233 get_param.param = I915_PARAM_CHIPSET_ID;
234 get_param.value = &device_id;
235 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
236 if (ret) {
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800237 fprintf(stderr, "drv: Failed to get I915_PARAM_CHIPSET_ID\n");
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800238 free(i915);
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800239 return -EINVAL;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800240 }
241
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800242 i915->gen = i915_get_gen(device_id);
243
244 memset(&get_param, 0, sizeof(get_param));
245 get_param.param = I915_PARAM_HAS_LLC;
246 get_param.value = &i915->has_llc;
247 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
248 if (ret) {
249 fprintf(stderr, "drv: Failed to get I915_PARAM_HAS_LLC\n");
250 free(i915);
251 return -EINVAL;
252 }
253
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800254 drv->priv = i915;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800255
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800256 return i915_add_combinations(drv);
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800257}
258
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800259static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
260 uint32_t flags)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700261{
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700262 int ret;
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800263 size_t plane;
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700264 uint32_t stride;
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800265 struct drm_i915_gem_create gem_create;
266 struct drm_i915_gem_set_tiling gem_set_tiling;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700267
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800268 if (flags & (BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800269 bo->tiling = I915_TILING_NONE;
Gurchetan Singh458976f2016-11-23 17:32:33 -0800270 else if (flags & BO_USE_SCANOUT)
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800271 bo->tiling = I915_TILING_X;
Gurchetan Singh6bab0c12016-10-13 19:08:48 -0700272 else
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800273 bo->tiling = I915_TILING_Y;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700274
Owen Linbbb69fd2017-06-05 14:33:08 +0800275 if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID)
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800276 bo->tiling = I915_TILING_NONE;
Owen Linbbb69fd2017-06-05 14:33:08 +0800277
278 stride = drv_stride_from_format(format, width, 0);
Gurchetan Singh507f5dd2017-03-16 13:14:30 -0700279
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800280 ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700281 if (ret)
282 return ret;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800283
Owen Linbbb69fd2017-06-05 14:33:08 +0800284 /*
285 * Align the Y plane to 128 bytes so the chroma planes would be aligned
286 * to 64 byte boundaries. This is an Intel HW requirement.
287 */
288 if (format == DRM_FORMAT_YVU420)
289 stride = ALIGN(stride, 128);
290
291 /*
292 * HAL_PIXEL_FORMAT_YV12 requires that the buffer's height not be aligned.
293 */
294 if (format == DRM_FORMAT_YVU420_ANDROID)
295 height = bo->height;
296
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700297 drv_bo_from_format(bo, stride, height, format);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800298
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800299 memset(&gem_create, 0, sizeof(gem_create));
300 gem_create.size = bo->total_size;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800301
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800302 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
303 if (ret) {
304 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n",
305 gem_create.size);
306 return ret;
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700307 }
Gurchetan Singh83dc4fb2016-07-19 15:52:33 -0700308
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800309 for (plane = 0; plane < bo->num_planes; plane++)
310 bo->handles[plane].u32 = gem_create.handle;
Daniel Nicoara1de26dc2014-09-25 18:53:19 -0400311
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800312 memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
313 gem_set_tiling.handle = bo->handles[0].u32;
314 gem_set_tiling.tiling_mode = bo->tiling;
315 gem_set_tiling.stride = bo->strides[0];
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700316
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800317 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
318 if (ret) {
319 struct drm_gem_close gem_close;
320 memset(&gem_close, 0, sizeof(gem_close));
321 gem_close.handle = bo->handles[0].u32;
322 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800323
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800324 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed with %d", errno);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700325 return -errno;
326 }
327
328 return 0;
329}
330
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800331static void i915_close(struct driver *drv)
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800332{
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800333 free(drv->priv);
334 drv->priv = NULL;
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800335}
336
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800337static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
338{
339 int ret;
340 struct drm_i915_gem_get_tiling gem_get_tiling;
341
342 ret = drv_prime_bo_import(bo, data);
343 if (ret)
344 return ret;
345
346 /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
347 memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
348 gem_get_tiling.handle = bo->handles[0].u32;
349
350 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
351 if (ret) {
Joe Kniss9e5d12a2017-06-29 11:54:22 -0700352 drv_gem_bo_destroy(bo);
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800353 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed.");
354 return ret;
355 }
356
357 bo->tiling = gem_get_tiling.tiling_mode;
358 return 0;
359}
360
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700361static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
Gurchetan Singhef920532016-08-12 16:38:25 -0700362{
363 int ret;
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800364 void *addr;
365 struct drm_i915_gem_set_domain set_domain;
Gurchetan Singhef920532016-08-12 16:38:25 -0700366
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800367 memset(&set_domain, 0, sizeof(set_domain));
368 set_domain.handle = bo->handles[0].u32;
369 if (bo->tiling == I915_TILING_NONE) {
370 struct drm_i915_gem_mmap gem_map;
371 memset(&gem_map, 0, sizeof(gem_map));
Gurchetan Singhef920532016-08-12 16:38:25 -0700372
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800373 gem_map.handle = bo->handles[0].u32;
374 gem_map.offset = 0;
375 gem_map.size = bo->total_size;
376
377 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
378 if (ret) {
379 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP failed\n");
380 return MAP_FAILED;
381 }
382
383 addr = (void *)(uintptr_t)gem_map.addr_ptr;
384 set_domain.read_domains = I915_GEM_DOMAIN_CPU;
385 set_domain.write_domain = I915_GEM_DOMAIN_CPU;
386
387 } else {
388 struct drm_i915_gem_mmap_gtt gem_map;
389 memset(&gem_map, 0, sizeof(gem_map));
390
391 gem_map.handle = bo->handles[0].u32;
392
393 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
394 if (ret) {
395 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
396 return MAP_FAILED;
397 }
398
399 addr = mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd,
400 gem_map.offset);
401
402 set_domain.read_domains = I915_GEM_DOMAIN_GTT;
403 set_domain.write_domain = I915_GEM_DOMAIN_GTT;
404 }
405
406 if (addr == MAP_FAILED) {
407 fprintf(stderr, "drv: i915 GEM mmap failed\n");
408 return addr;
409 }
410
411 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
Gurchetan Singhef920532016-08-12 16:38:25 -0700412 if (ret) {
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800413 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN failed\n");
Gurchetan Singhef920532016-08-12 16:38:25 -0700414 return MAP_FAILED;
415 }
416
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800417 data->length = bo->total_size;
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800418 return addr;
419}
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700420
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800421static int i915_bo_unmap(struct bo *bo, struct map_info *data)
422{
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800423 struct i915_device *i915 = bo->drv->priv;
424 if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
425 i915_clflush(data->addr, data->length);
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800426
427 return munmap(data->addr, data->length);
Gurchetan Singhef920532016-08-12 16:38:25 -0700428}
429
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800430static uint32_t i915_resolve_format(uint32_t format)
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700431{
432 switch (format) {
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800433 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700434 /*HACK: See b/28671744 */
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800435 return DRM_FORMAT_XBGR8888;
436 case DRM_FORMAT_FLEX_YCbCr_420_888:
Owen Linbbb69fd2017-06-05 14:33:08 +0800437 return DRM_FORMAT_YVU420;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700438 default:
439 return format;
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700440 }
441}
442
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800443struct backend backend_i915 = {
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700444 .name = "i915",
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700445 .init = i915_init,
446 .close = i915_close,
447 .bo_create = i915_bo_create,
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800448 .bo_destroy = drv_gem_bo_destroy,
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800449 .bo_import = i915_bo_import,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700450 .bo_map = i915_bo_map,
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800451 .bo_unmap = i915_bo_unmap,
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700452 .resolve_format = i915_resolve_format,
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700453};
454
455#endif