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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
37#include "libvex_guest_s390x.h" /* VexGuestS390XState */
38#include "libvex.h" /* needed for bb_to_IR.h */
39#include "libvex_guest_offsets.h" /* OFFSET_s390x_SYSNO */
40
41#include "main_util.h" /* vassert */
42#include "main_globals.h" /* vex_traceflags */
43#include "guest_generic_bb_to_IR.h" /* DisResult */
44#include "guest_s390_defs.h" /* prototypes for this file's functions */
45#include "host_s390_disasm.h"
46#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
47
sewardj2019a972011-03-07 16:04:07 +000048
49/*------------------------------------------------------------*/
florianb4df7682011-07-05 02:09:01 +000050/*--- Forward declarations ---*/
51/*------------------------------------------------------------*/
52static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
53
54
55/*------------------------------------------------------------*/
sewardj2019a972011-03-07 16:04:07 +000056/*--- Globals ---*/
57/*------------------------------------------------------------*/
58
59/* The IRSB* into which we're generating code. */
60static IRSB *irsb;
61
62/* The guest address for the instruction currently being
63 translated. */
64static Addr64 guest_IA_curr_instr;
65
66/* The guest address for the instruction following the current instruction. */
67static Addr64 guest_IA_next_instr;
68
69/* Result of disassembly step. */
70static DisResult *dis_res;
71
72/* The last seen execute target instruction */
73ULong last_execute_target;
74
75/* The possible outcomes of a decoding operation */
76typedef enum {
77 S390_DECODE_OK,
78 S390_DECODE_UNKNOWN_INSN,
79 S390_DECODE_UNIMPLEMENTED_INSN,
80 S390_DECODE_UNKNOWN_SPECIAL_INSN,
81 S390_DECODE_ERROR
82} s390_decode_t;
83
84/*------------------------------------------------------------*/
85/*--- Helpers for constructing IR. ---*/
86/*------------------------------------------------------------*/
87
88/* Sign extend a value with the given number of bits. This is a
89 macro because it allows us to overload the type of the value.
90 Note that VALUE must have a signed type! */
91#undef sign_extend
92#define sign_extend(value,num_bits) \
93(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
94 (sizeof(__typeof__(value)) * 8 - (num_bits)))
95
96
97/* Add a statement to the current irsb. */
98static __inline__ void
99stmt(IRStmt *st)
100{
101 addStmtToIRSB(irsb, st);
102}
103
104/* Allocate a new temporary of the given type. */
105static __inline__ IRTemp
106newTemp(IRType type)
107{
108 vassert(isPlausibleIRType(type));
109
110 return newIRTemp(irsb->tyenv, type);
111}
112
113/* Create an expression node for a temporary */
114static __inline__ IRExpr *
115mkexpr(IRTemp tmp)
116{
117 return IRExpr_RdTmp(tmp);
118}
119
120/* Add a statement that assigns to a temporary */
121static __inline__ void
122assign(IRTemp dst, IRExpr *expr)
123{
124 stmt(IRStmt_WrTmp(dst, expr));
125}
126
127/* Create a temporary of the given type and assign the expression to it */
128static __inline__ IRTemp
129mktemp(IRType type, IRExpr *expr)
130{
131 IRTemp temp = newTemp(type);
132
133 assign(temp, expr);
134
135 return temp;
136}
137
138/* Create a unary expression */
139static __inline__ IRExpr *
140unop(IROp kind, IRExpr *op)
141{
142 return IRExpr_Unop(kind, op);
143}
144
145/* Create a binary expression */
146static __inline__ IRExpr *
147binop(IROp kind, IRExpr *op1, IRExpr *op2)
148{
149 return IRExpr_Binop(kind, op1, op2);
150}
151
152/* Create a ternary expression */
153static __inline__ IRExpr *
154triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
155{
156 return IRExpr_Triop(kind, op1, op2, op3);
157}
158
159/* Create a quaternary expression */
160static __inline__ IRExpr *
161qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
162{
163 return IRExpr_Qop(kind, op1, op2, op3, op4);
164}
165
166/* Create an expression node for an 8-bit integer constant */
167static __inline__ IRExpr *
168mkU8(UInt value)
169{
170 vassert(value < 256);
171
172 return IRExpr_Const(IRConst_U8((UChar)value));
173}
174
175/* Create an expression node for a 16-bit integer constant */
176static __inline__ IRExpr *
177mkU16(UInt value)
178{
179 vassert(value < 65536);
180
181 return IRExpr_Const(IRConst_U16((UShort)value));
182}
183
184/* Create an expression node for a 32-bit integer constant */
185static __inline__ IRExpr *
186mkU32(UInt value)
187{
188 return IRExpr_Const(IRConst_U32(value));
189}
190
191/* Create an expression node for a 64-bit integer constant */
192static __inline__ IRExpr *
193mkU64(ULong value)
194{
195 return IRExpr_Const(IRConst_U64(value));
196}
197
198/* Create an expression node for a 32-bit floating point constant
199 whose value is given by a bit pattern. */
200static __inline__ IRExpr *
201mkF32i(UInt value)
202{
203 return IRExpr_Const(IRConst_F32i(value));
204}
205
206/* Create an expression node for a 32-bit floating point constant
207 whose value is given by a bit pattern. */
208static __inline__ IRExpr *
209mkF64i(ULong value)
210{
211 return IRExpr_Const(IRConst_F64i(value));
212}
213
214/* Little helper function for my sanity. ITE = if-then-else */
215static IRExpr *
216mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
217{
218 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
219
220 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
221}
222
223/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
224static void __inline__
225store(IRExpr *addr, IRExpr *data)
226{
227 stmt(IRStmt_Store(Iend_BE, addr, data));
228}
229
230/* Create an expression that loads a TYPE sized value from ADDR.
231 This is a big-endian machine. */
232static __inline__ IRExpr *
233load(IRType type, IRExpr *addr)
234{
235 return IRExpr_Load(Iend_BE, type, addr);
236}
237
238/* Function call */
239static void
240call_function(IRExpr *callee_address)
241{
242 irsb->next = callee_address;
243 irsb->jumpkind = Ijk_Call;
244
245 dis_res->whatNext = Dis_StopHere;
246}
247
248/* Function return sequence */
249static void
250return_from_function(IRExpr *return_address)
251{
252 irsb->next = return_address;
253 irsb->jumpkind = Ijk_Ret;
254
255 dis_res->whatNext = Dis_StopHere;
256}
257
258/* A conditional branch whose target is not known at instrumentation time.
259
260 if (condition) goto computed_target;
261
262 Needs to be represented as:
263
264 if (! condition) goto next_instruction;
265 goto computed_target;
266
267 This inversion is being handled at code generation time. So we just
268 take the condition here as is.
269*/
270static void
271if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
272{
273 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
274
275 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr)));
276
277 irsb->next = target;
278 irsb->jumpkind = Ijk_Boring;
279
280 dis_res->whatNext = Dis_StopHere;
281}
282
283/* A conditional branch whose target is known at instrumentation time. */
284static void
285if_condition_goto(IRExpr *condition, Addr64 target)
286{
287 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
288
289 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target)));
290 dis_res->whatNext = Dis_Continue;
291}
292
293/* An unconditional branch. Target may or may not be known at instrumentation
294 time. */
295static void
296always_goto(IRExpr *target)
297{
298 irsb->next = target;
299 irsb->jumpkind = Ijk_Boring;
300
301 dis_res->whatNext = Dis_StopHere;
302}
303
304/* A system call */
305static void
306system_call(IRExpr *sysno)
307{
308 /* Store the system call number in the pseudo register. */
309 stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno));
310
sewardj69007022011-04-28 20:13:45 +0000311 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
sewardj2019a972011-03-07 16:04:07 +0000312 stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr)));
313
314 /* It's important that all ArchRegs carry their up-to-date value
315 at this point. So we declare an end-of-block here, which
316 forces any TempRegs caching ArchRegs to be flushed. */
317 irsb->next = mkU64(guest_IA_next_instr);
318
319 irsb->jumpkind = Ijk_Sys_syscall;
320
321 dis_res->whatNext = Dis_StopHere;
322}
323
324/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
325 instructions to VEX's IRRoundingMode. */
326static IRRoundingMode
327encode_rounding_mode(UChar mode)
328{
329 switch (mode) {
330 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
331 case S390_ROUND_ZERO: return Irrm_ZERO;
332 case S390_ROUND_POSINF: return Irrm_PosINF;
333 case S390_ROUND_NEGINF: return Irrm_NegINF;
334 }
335 vpanic("encode_rounding_mode");
336}
337
338static __inline__ IRExpr *get_fpr_dw0(UInt);
339static __inline__ void put_fpr_dw0(UInt, IRExpr *);
340
341/* Read a floating point register pair and combine their contents into a
342 128-bit value */
343static IRExpr *
344get_fpr_pair(UInt archreg)
345{
346 IRExpr *high = get_fpr_dw0(archreg);
347 IRExpr *low = get_fpr_dw0(archreg + 2);
348
349 return binop(Iop_F64HLtoF128, high, low);
350}
351
352/* Write a 128-bit floating point value into a register pair. */
353static void
354put_fpr_pair(UInt archreg, IRExpr *expr)
355{
356 IRExpr *high = unop(Iop_F128HItoF64, expr);
357 IRExpr *low = unop(Iop_F128LOtoF64, expr);
358
359 put_fpr_dw0(archreg, high);
360 put_fpr_dw0(archreg + 2, low);
361}
362
363
364/* Flags thunk offsets */
floriane88b3c92011-07-05 02:48:39 +0000365#define S390X_GUEST_OFFSET_CC_OP S390X_GUEST_OFFSET(guest_CC_OP)
366#define S390X_GUEST_OFFSET_CC_DEP1 S390X_GUEST_OFFSET(guest_CC_DEP1)
367#define S390X_GUEST_OFFSET_CC_DEP2 S390X_GUEST_OFFSET(guest_CC_DEP2)
368#define S390X_GUEST_OFFSET_CC_NDEP S390X_GUEST_OFFSET(guest_CC_NDEP)
sewardj2019a972011-03-07 16:04:07 +0000369
370/*------------------------------------------------------------*/
371/*--- Build the flags thunk. ---*/
372/*------------------------------------------------------------*/
373
374/* Completely fill the flags thunk. We're always filling all fields.
375 Apparently, that is better for redundant PUT elimination. */
376static void
377s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
378{
379 UInt op_off, dep1_off, dep2_off, ndep_off;
380
381 op_off = S390X_GUEST_OFFSET_CC_OP;
382 dep1_off = S390X_GUEST_OFFSET_CC_DEP1;
383 dep2_off = S390X_GUEST_OFFSET_CC_DEP2;
384 ndep_off = S390X_GUEST_OFFSET_CC_NDEP;
385
386 stmt(IRStmt_Put(op_off, op));
387 stmt(IRStmt_Put(dep1_off, dep1));
388 stmt(IRStmt_Put(dep2_off, dep2));
389 stmt(IRStmt_Put(ndep_off, ndep));
390}
391
392
393/* Create an expression for V and widen the result to 64 bit. */
394static IRExpr *
395s390_cc_widen(IRTemp v, Bool sign_extend)
396{
397 IRExpr *expr;
398
399 expr = mkexpr(v);
400
401 switch (typeOfIRTemp(irsb->tyenv, v)) {
402 case Ity_I64:
403 break;
404 case Ity_I32:
405 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
406 break;
407 case Ity_I16:
408 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
409 break;
410 case Ity_I8:
411 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
412 break;
413 default:
414 vpanic("s390_cc_widen");
415 }
416
417 return expr;
418}
419
420static void
421s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
422{
423 IRExpr *op, *dep1, *dep2, *ndep;
424
425 op = mkU64(opc);
426 dep1 = s390_cc_widen(d1, sign_extend);
427 dep2 = mkU64(0);
428 ndep = mkU64(0);
429
430 s390_cc_thunk_fill(op, dep1, dep2, ndep);
431}
432
433
434static void
435s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
436{
437 IRExpr *op, *dep1, *dep2, *ndep;
438
439 op = mkU64(opc);
440 dep1 = s390_cc_widen(d1, sign_extend);
441 dep2 = s390_cc_widen(d2, sign_extend);
442 ndep = mkU64(0);
443
444 s390_cc_thunk_fill(op, dep1, dep2, ndep);
445}
446
447
448/* memcheck believes that the NDEP field in the flags thunk is always
449 defined. But for some flag computations (e.g. add with carry) that is
450 just not true. We therefore need to convey to memcheck that the value
451 of the ndep field does matter and therefore we make the DEP2 field
452 depend on it:
453
454 DEP2 = original_DEP2 ^ NDEP
455
456 In s390_calculate_cc we exploit that (a^b)^b == a
457 I.e. we xor the DEP2 value with the NDEP value to recover the
458 original_DEP2 value. */
459static void
460s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
461{
462 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
463
464 op = mkU64(opc);
465 dep1 = s390_cc_widen(d1, sign_extend);
466 dep2 = s390_cc_widen(d2, sign_extend);
467 ndep = s390_cc_widen(nd, sign_extend);
468
469 dep2x = binop(Iop_Xor64, dep2, ndep);
470
471 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
472}
473
474
475/* Write one floating point value into the flags thunk */
476static void
477s390_cc_thunk_put1f(UInt opc, IRTemp d1)
478{
479 IRExpr *op, *dep1, *dep2, *ndep;
480
481 op = mkU64(opc);
482 dep1 = mkexpr(d1);
483 dep2 = mkU64(0);
484 ndep = mkU64(0);
485
486 s390_cc_thunk_fill(op, dep1, dep2, ndep);
487}
488
489
490/* Write a floating point value and an integer into the flags thunk. The
491 integer value is zero-extended first. */
492static void
493s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
494{
495 IRExpr *op, *dep1, *dep2, *ndep;
496
497 op = mkU64(opc);
498 dep1 = mkexpr(d1);
499 dep2 = s390_cc_widen(d2, False);
500 ndep = mkU64(0);
501
502 s390_cc_thunk_fill(op, dep1, dep2, ndep);
503}
504
505
506/* Write a 128-bit floating point value into the flags thunk. This is
507 done by splitting the value into two 64-bits values. */
508static void
509s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
510{
511 IRExpr *op, *hi, *lo, *ndep;
512
513 op = mkU64(opc);
514 hi = unop(Iop_F128HItoF64, mkexpr(d1));
515 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
516 ndep = mkU64(0);
517
518 s390_cc_thunk_fill(op, hi, lo, ndep);
519}
520
521
522/* Write a 128-bit floating point value and an integer into the flags thunk.
523 The integer value is zero-extended first. */
524static void
525s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
526{
527 IRExpr *op, *hi, *lo, *lox, *ndep;
528
529 op = mkU64(opc);
530 hi = unop(Iop_F128HItoF64, mkexpr(d1));
531 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
532 ndep = s390_cc_widen(nd, False);
533
534 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
535
536 s390_cc_thunk_fill(op, hi, lox, ndep);
537}
538
539
540static void
541s390_cc_set(UInt val)
542{
543 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
544 mkU64(val), mkU64(0), mkU64(0));
545}
546
547/* Build IR to calculate the condition code from flags thunk.
548 Returns an expression of type Ity_I32 */
549static IRExpr *
550s390_call_calculate_cc(void)
551{
552 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
553
554 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
555 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
556 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
557 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
558
559 args = mkIRExprVec_4(op, dep1, dep2, ndep);
560 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
561 "s390_calculate_cc", &s390_calculate_cc, args);
562
563 /* Exclude OP and NDEP from definedness checking. We're only
564 interested in DEP1 and DEP2. */
565 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
566
567 return call;
568}
569
570/* Build IR to calculate the internal condition code for a "compare and branch"
571 insn. Returns an expression of type Ity_I32 */
572static IRExpr *
573s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
574{
575 IRExpr **args, *call, *op, *dep1, *dep2;
576
577 op = mkU64(opc);
578 dep1 = s390_cc_widen(op1, sign_extend);
579 dep2 = s390_cc_widen(op2, sign_extend);
580
581 args = mkIRExprVec_3(op, dep1, dep2);
582 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
583 "s390_calculate_icc", &s390_calculate_icc, args);
584
585 /* Exclude OP from definedness checking. We're only
586 interested in DEP1 and DEP2. */
587 call->Iex.CCall.cee->mcx_mask = (1<<0);
588
589 return call;
590}
591
592/* Build IR to calculate the condition code from flags thunk.
593 Returns an expression of type Ity_I32 */
594static IRExpr *
595s390_call_calculate_cond(UInt m)
596{
597 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
598
599 mask = mkU64(m);
600 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
601 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
602 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
603 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
604
605 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
606 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
607 "s390_calculate_cond", &s390_calculate_cond, args);
608
609 /* Exclude the requested condition, OP and NDEP from definedness
610 checking. We're only interested in DEP1 and DEP2. */
611 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
612
613 return call;
614}
615
616#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
617#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
618#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
619#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
620#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
621#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
622#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
623 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
624#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
625 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
626#define s390_call_calculate_iccZZ(op,dep1,dep2) \
627 s390_call_calculate_icc(op,dep1,dep2,False)
628#define s390_call_calculate_iccSS(op,dep1,dep2) \
629 s390_call_calculate_icc(op,dep1,dep2,True)
630
631
floriane88b3c92011-07-05 02:48:39 +0000632#define OFFB_TISTART S390X_GUEST_OFFSET(guest_TISTART)
633#define OFFB_TILEN S390X_GUEST_OFFSET(guest_TILEN)
sewardj2019a972011-03-07 16:04:07 +0000634
635
636/*------------------------------------------------------------*/
637/*--- Guest register access ---*/
638/*------------------------------------------------------------*/
639
640
641/*------------------------------------------------------------*/
642/*--- ar registers ---*/
643/*------------------------------------------------------------*/
644
645/* Return the guest state offset of a ar register. */
646static UInt
647ar_offset(UInt archreg)
648{
649 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000650 S390X_GUEST_OFFSET(guest_a0),
651 S390X_GUEST_OFFSET(guest_a1),
652 S390X_GUEST_OFFSET(guest_a2),
653 S390X_GUEST_OFFSET(guest_a3),
654 S390X_GUEST_OFFSET(guest_a4),
655 S390X_GUEST_OFFSET(guest_a5),
656 S390X_GUEST_OFFSET(guest_a6),
657 S390X_GUEST_OFFSET(guest_a7),
658 S390X_GUEST_OFFSET(guest_a8),
659 S390X_GUEST_OFFSET(guest_a9),
660 S390X_GUEST_OFFSET(guest_a10),
661 S390X_GUEST_OFFSET(guest_a11),
662 S390X_GUEST_OFFSET(guest_a12),
663 S390X_GUEST_OFFSET(guest_a13),
664 S390X_GUEST_OFFSET(guest_a14),
665 S390X_GUEST_OFFSET(guest_a15),
sewardj2019a972011-03-07 16:04:07 +0000666 };
667
668 vassert(archreg < 16);
669
670 return offset[archreg];
671}
672
673
674/* Return the guest state offset of word #0 of a ar register. */
675static __inline__ UInt
676ar_w0_offset(UInt archreg)
677{
678 return ar_offset(archreg) + 0;
679}
680
681/* Write word #0 of a ar to the guest state. */
682static __inline__ void
683put_ar_w0(UInt archreg, IRExpr *expr)
684{
685 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
686
687 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
688}
689
690/* Read word #0 of a ar register. */
691static __inline__ IRExpr *
692get_ar_w0(UInt archreg)
693{
694 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
695}
696
697
698/*------------------------------------------------------------*/
699/*--- fpr registers ---*/
700/*------------------------------------------------------------*/
701
702/* Return the guest state offset of a fpr register. */
703static UInt
704fpr_offset(UInt archreg)
705{
706 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000707 S390X_GUEST_OFFSET(guest_f0),
708 S390X_GUEST_OFFSET(guest_f1),
709 S390X_GUEST_OFFSET(guest_f2),
710 S390X_GUEST_OFFSET(guest_f3),
711 S390X_GUEST_OFFSET(guest_f4),
712 S390X_GUEST_OFFSET(guest_f5),
713 S390X_GUEST_OFFSET(guest_f6),
714 S390X_GUEST_OFFSET(guest_f7),
715 S390X_GUEST_OFFSET(guest_f8),
716 S390X_GUEST_OFFSET(guest_f9),
717 S390X_GUEST_OFFSET(guest_f10),
718 S390X_GUEST_OFFSET(guest_f11),
719 S390X_GUEST_OFFSET(guest_f12),
720 S390X_GUEST_OFFSET(guest_f13),
721 S390X_GUEST_OFFSET(guest_f14),
722 S390X_GUEST_OFFSET(guest_f15),
sewardj2019a972011-03-07 16:04:07 +0000723 };
724
725 vassert(archreg < 16);
726
727 return offset[archreg];
728}
729
730
731/* Return the guest state offset of word #0 of a fpr register. */
732static __inline__ UInt
733fpr_w0_offset(UInt archreg)
734{
735 return fpr_offset(archreg) + 0;
736}
737
738/* Write word #0 of a fpr to the guest state. */
739static __inline__ void
740put_fpr_w0(UInt archreg, IRExpr *expr)
741{
742 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
743
744 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
745}
746
747/* Read word #0 of a fpr register. */
748static __inline__ IRExpr *
749get_fpr_w0(UInt archreg)
750{
751 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
752}
753
754/* Return the guest state offset of double word #0 of a fpr register. */
755static __inline__ UInt
756fpr_dw0_offset(UInt archreg)
757{
758 return fpr_offset(archreg) + 0;
759}
760
761/* Write double word #0 of a fpr to the guest state. */
762static __inline__ void
763put_fpr_dw0(UInt archreg, IRExpr *expr)
764{
765 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
766
767 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
768}
769
770/* Read double word #0 of a fpr register. */
771static __inline__ IRExpr *
772get_fpr_dw0(UInt archreg)
773{
774 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
775}
776
777
778/*------------------------------------------------------------*/
779/*--- gpr registers ---*/
780/*------------------------------------------------------------*/
781
782/* Return the guest state offset of a gpr register. */
783static UInt
784gpr_offset(UInt archreg)
785{
786 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000787 S390X_GUEST_OFFSET(guest_r0),
788 S390X_GUEST_OFFSET(guest_r1),
789 S390X_GUEST_OFFSET(guest_r2),
790 S390X_GUEST_OFFSET(guest_r3),
791 S390X_GUEST_OFFSET(guest_r4),
792 S390X_GUEST_OFFSET(guest_r5),
793 S390X_GUEST_OFFSET(guest_r6),
794 S390X_GUEST_OFFSET(guest_r7),
795 S390X_GUEST_OFFSET(guest_r8),
796 S390X_GUEST_OFFSET(guest_r9),
797 S390X_GUEST_OFFSET(guest_r10),
798 S390X_GUEST_OFFSET(guest_r11),
799 S390X_GUEST_OFFSET(guest_r12),
800 S390X_GUEST_OFFSET(guest_r13),
801 S390X_GUEST_OFFSET(guest_r14),
802 S390X_GUEST_OFFSET(guest_r15),
sewardj2019a972011-03-07 16:04:07 +0000803 };
804
805 vassert(archreg < 16);
806
807 return offset[archreg];
808}
809
810
811/* Return the guest state offset of word #0 of a gpr register. */
812static __inline__ UInt
813gpr_w0_offset(UInt archreg)
814{
815 return gpr_offset(archreg) + 0;
816}
817
818/* Write word #0 of a gpr to the guest state. */
819static __inline__ void
820put_gpr_w0(UInt archreg, IRExpr *expr)
821{
822 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
823
824 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
825}
826
827/* Read word #0 of a gpr register. */
828static __inline__ IRExpr *
829get_gpr_w0(UInt archreg)
830{
831 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
832}
833
834/* Return the guest state offset of double word #0 of a gpr register. */
835static __inline__ UInt
836gpr_dw0_offset(UInt archreg)
837{
838 return gpr_offset(archreg) + 0;
839}
840
841/* Write double word #0 of a gpr to the guest state. */
842static __inline__ void
843put_gpr_dw0(UInt archreg, IRExpr *expr)
844{
845 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
846
847 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
848}
849
850/* Read double word #0 of a gpr register. */
851static __inline__ IRExpr *
852get_gpr_dw0(UInt archreg)
853{
854 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
855}
856
857/* Return the guest state offset of half word #1 of a gpr register. */
858static __inline__ UInt
859gpr_hw1_offset(UInt archreg)
860{
861 return gpr_offset(archreg) + 2;
862}
863
864/* Write half word #1 of a gpr to the guest state. */
865static __inline__ void
866put_gpr_hw1(UInt archreg, IRExpr *expr)
867{
868 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
869
870 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
871}
872
873/* Read half word #1 of a gpr register. */
874static __inline__ IRExpr *
875get_gpr_hw1(UInt archreg)
876{
877 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
878}
879
880/* Return the guest state offset of byte #6 of a gpr register. */
881static __inline__ UInt
882gpr_b6_offset(UInt archreg)
883{
884 return gpr_offset(archreg) + 6;
885}
886
887/* Write byte #6 of a gpr to the guest state. */
888static __inline__ void
889put_gpr_b6(UInt archreg, IRExpr *expr)
890{
891 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
892
893 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
894}
895
896/* Read byte #6 of a gpr register. */
897static __inline__ IRExpr *
898get_gpr_b6(UInt archreg)
899{
900 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
901}
902
903/* Return the guest state offset of byte #3 of a gpr register. */
904static __inline__ UInt
905gpr_b3_offset(UInt archreg)
906{
907 return gpr_offset(archreg) + 3;
908}
909
910/* Write byte #3 of a gpr to the guest state. */
911static __inline__ void
912put_gpr_b3(UInt archreg, IRExpr *expr)
913{
914 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
915
916 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
917}
918
919/* Read byte #3 of a gpr register. */
920static __inline__ IRExpr *
921get_gpr_b3(UInt archreg)
922{
923 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
924}
925
926/* Return the guest state offset of byte #0 of a gpr register. */
927static __inline__ UInt
928gpr_b0_offset(UInt archreg)
929{
930 return gpr_offset(archreg) + 0;
931}
932
933/* Write byte #0 of a gpr to the guest state. */
934static __inline__ void
935put_gpr_b0(UInt archreg, IRExpr *expr)
936{
937 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
938
939 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
940}
941
942/* Read byte #0 of a gpr register. */
943static __inline__ IRExpr *
944get_gpr_b0(UInt archreg)
945{
946 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
947}
948
949/* Return the guest state offset of word #1 of a gpr register. */
950static __inline__ UInt
951gpr_w1_offset(UInt archreg)
952{
953 return gpr_offset(archreg) + 4;
954}
955
956/* Write word #1 of a gpr to the guest state. */
957static __inline__ void
958put_gpr_w1(UInt archreg, IRExpr *expr)
959{
960 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
961
962 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
963}
964
965/* Read word #1 of a gpr register. */
966static __inline__ IRExpr *
967get_gpr_w1(UInt archreg)
968{
969 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
970}
971
972/* Return the guest state offset of half word #3 of a gpr register. */
973static __inline__ UInt
974gpr_hw3_offset(UInt archreg)
975{
976 return gpr_offset(archreg) + 6;
977}
978
979/* Write half word #3 of a gpr to the guest state. */
980static __inline__ void
981put_gpr_hw3(UInt archreg, IRExpr *expr)
982{
983 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
984
985 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
986}
987
988/* Read half word #3 of a gpr register. */
989static __inline__ IRExpr *
990get_gpr_hw3(UInt archreg)
991{
992 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
993}
994
995/* Return the guest state offset of byte #7 of a gpr register. */
996static __inline__ UInt
997gpr_b7_offset(UInt archreg)
998{
999 return gpr_offset(archreg) + 7;
1000}
1001
1002/* Write byte #7 of a gpr to the guest state. */
1003static __inline__ void
1004put_gpr_b7(UInt archreg, IRExpr *expr)
1005{
1006 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1007
1008 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1009}
1010
1011/* Read byte #7 of a gpr register. */
1012static __inline__ IRExpr *
1013get_gpr_b7(UInt archreg)
1014{
1015 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1016}
1017
1018/* Return the guest state offset of half word #0 of a gpr register. */
1019static __inline__ UInt
1020gpr_hw0_offset(UInt archreg)
1021{
1022 return gpr_offset(archreg) + 0;
1023}
1024
1025/* Write half word #0 of a gpr to the guest state. */
1026static __inline__ void
1027put_gpr_hw0(UInt archreg, IRExpr *expr)
1028{
1029 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1030
1031 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1032}
1033
1034/* Read half word #0 of a gpr register. */
1035static __inline__ IRExpr *
1036get_gpr_hw0(UInt archreg)
1037{
1038 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1039}
1040
1041/* Return the guest state offset of byte #4 of a gpr register. */
1042static __inline__ UInt
1043gpr_b4_offset(UInt archreg)
1044{
1045 return gpr_offset(archreg) + 4;
1046}
1047
1048/* Write byte #4 of a gpr to the guest state. */
1049static __inline__ void
1050put_gpr_b4(UInt archreg, IRExpr *expr)
1051{
1052 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1053
1054 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1055}
1056
1057/* Read byte #4 of a gpr register. */
1058static __inline__ IRExpr *
1059get_gpr_b4(UInt archreg)
1060{
1061 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1062}
1063
1064/* Return the guest state offset of byte #1 of a gpr register. */
1065static __inline__ UInt
1066gpr_b1_offset(UInt archreg)
1067{
1068 return gpr_offset(archreg) + 1;
1069}
1070
1071/* Write byte #1 of a gpr to the guest state. */
1072static __inline__ void
1073put_gpr_b1(UInt archreg, IRExpr *expr)
1074{
1075 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1076
1077 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1078}
1079
1080/* Read byte #1 of a gpr register. */
1081static __inline__ IRExpr *
1082get_gpr_b1(UInt archreg)
1083{
1084 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1085}
1086
1087/* Return the guest state offset of half word #2 of a gpr register. */
1088static __inline__ UInt
1089gpr_hw2_offset(UInt archreg)
1090{
1091 return gpr_offset(archreg) + 4;
1092}
1093
1094/* Write half word #2 of a gpr to the guest state. */
1095static __inline__ void
1096put_gpr_hw2(UInt archreg, IRExpr *expr)
1097{
1098 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1099
1100 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1101}
1102
1103/* Read half word #2 of a gpr register. */
1104static __inline__ IRExpr *
1105get_gpr_hw2(UInt archreg)
1106{
1107 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1108}
1109
1110/* Return the guest state offset of byte #5 of a gpr register. */
1111static __inline__ UInt
1112gpr_b5_offset(UInt archreg)
1113{
1114 return gpr_offset(archreg) + 5;
1115}
1116
1117/* Write byte #5 of a gpr to the guest state. */
1118static __inline__ void
1119put_gpr_b5(UInt archreg, IRExpr *expr)
1120{
1121 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1122
1123 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1124}
1125
1126/* Read byte #5 of a gpr register. */
1127static __inline__ IRExpr *
1128get_gpr_b5(UInt archreg)
1129{
1130 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1131}
1132
1133/* Return the guest state offset of byte #2 of a gpr register. */
1134static __inline__ UInt
1135gpr_b2_offset(UInt archreg)
1136{
1137 return gpr_offset(archreg) + 2;
1138}
1139
1140/* Write byte #2 of a gpr to the guest state. */
1141static __inline__ void
1142put_gpr_b2(UInt archreg, IRExpr *expr)
1143{
1144 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1145
1146 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1147}
1148
1149/* Read byte #2 of a gpr register. */
1150static __inline__ IRExpr *
1151get_gpr_b2(UInt archreg)
1152{
1153 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1154}
1155
1156/* Return the guest state offset of the counter register. */
1157static UInt
1158counter_offset(void)
1159{
floriane88b3c92011-07-05 02:48:39 +00001160 return S390X_GUEST_OFFSET(guest_counter);
sewardj2019a972011-03-07 16:04:07 +00001161}
1162
1163/* Return the guest state offset of double word #0 of the counter register. */
1164static __inline__ UInt
1165counter_dw0_offset(void)
1166{
1167 return counter_offset() + 0;
1168}
1169
1170/* Write double word #0 of the counter to the guest state. */
1171static __inline__ void
1172put_counter_dw0(IRExpr *expr)
1173{
1174 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1175
1176 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1177}
1178
1179/* Read double word #0 of the counter register. */
1180static __inline__ IRExpr *
1181get_counter_dw0(void)
1182{
1183 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1184}
1185
1186/* Return the guest state offset of word #0 of the counter register. */
1187static __inline__ UInt
1188counter_w0_offset(void)
1189{
1190 return counter_offset() + 0;
1191}
1192
1193/* Return the guest state offset of word #1 of the counter register. */
1194static __inline__ UInt
1195counter_w1_offset(void)
1196{
1197 return counter_offset() + 4;
1198}
1199
1200/* Write word #0 of the counter to the guest state. */
1201static __inline__ void
1202put_counter_w0(IRExpr *expr)
1203{
1204 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1205
1206 stmt(IRStmt_Put(counter_w0_offset(), expr));
1207}
1208
1209/* Read word #0 of the counter register. */
1210static __inline__ IRExpr *
1211get_counter_w0(void)
1212{
1213 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1214}
1215
1216/* Write word #1 of the counter to the guest state. */
1217static __inline__ void
1218put_counter_w1(IRExpr *expr)
1219{
1220 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1221
1222 stmt(IRStmt_Put(counter_w1_offset(), expr));
1223}
1224
1225/* Read word #1 of the counter register. */
1226static __inline__ IRExpr *
1227get_counter_w1(void)
1228{
1229 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1230}
1231
1232/* Return the guest state offset of the fpc register. */
1233static UInt
1234fpc_offset(void)
1235{
floriane88b3c92011-07-05 02:48:39 +00001236 return S390X_GUEST_OFFSET(guest_fpc);
sewardj2019a972011-03-07 16:04:07 +00001237}
1238
1239/* Return the guest state offset of word #0 of the fpc register. */
1240static __inline__ UInt
1241fpc_w0_offset(void)
1242{
1243 return fpc_offset() + 0;
1244}
1245
1246/* Write word #0 of the fpc to the guest state. */
1247static __inline__ void
1248put_fpc_w0(IRExpr *expr)
1249{
1250 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1251
1252 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1253}
1254
1255/* Read word #0 of the fpc register. */
1256static __inline__ IRExpr *
1257get_fpc_w0(void)
1258{
1259 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1260}
1261
1262
1263/*------------------------------------------------------------*/
1264/*--- Build IR for formats ---*/
1265/*------------------------------------------------------------*/
1266static void
1267s390_format_I(HChar *(*irgen)(UChar i),
1268 UChar i)
1269{
1270 HChar *mnm = irgen(i);
1271
sewardj7ee97522011-05-09 21:45:04 +00001272 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001273 s390_disasm(ENC2(MNM, UINT), mnm, i);
1274}
1275
1276static void
1277s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1278 UChar r1, UShort i2)
1279{
1280 irgen(r1, i2);
1281}
1282
1283static void
1284s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1285 UChar r1, UShort i2)
1286{
1287 HChar *mnm = irgen(r1, i2);
1288
sewardj7ee97522011-05-09 21:45:04 +00001289 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001290 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1291}
1292
1293static void
1294s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1295 UChar r1, UShort i2)
1296{
1297 HChar *mnm = irgen(r1, i2);
1298
sewardj7ee97522011-05-09 21:45:04 +00001299 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001300 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1301}
1302
1303static void
1304s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1305 UChar r1, UShort i2)
1306{
1307 HChar *mnm = irgen(r1, i2);
1308
sewardj7ee97522011-05-09 21:45:04 +00001309 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001310 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1311}
1312
1313static void
1314s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1315 UChar r1, UChar r3, UShort i2)
1316{
1317 HChar *mnm = irgen(r1, r3, i2);
1318
sewardj7ee97522011-05-09 21:45:04 +00001319 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001320 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1321}
1322
1323static void
1324s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1325 UChar r1, UChar r3, UShort i2)
1326{
1327 HChar *mnm = irgen(r1, r3, i2);
1328
sewardj7ee97522011-05-09 21:45:04 +00001329 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001330 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1331}
1332
1333static void
1334s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1335 UChar i5),
1336 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1337{
1338 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1339
sewardj7ee97522011-05-09 21:45:04 +00001340 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001341 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1342 i5);
1343}
1344
1345static void
1346s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1347 UChar r1, UChar r2, UShort i4, UChar m3)
1348{
1349 HChar *mnm = irgen(r1, r2, i4, m3);
1350
sewardj7ee97522011-05-09 21:45:04 +00001351 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001352 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1353 r2, m3, (Int)(Short)i4);
1354}
1355
1356static void
1357s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1358 UChar r1, UChar m3, UShort i4, UChar i2)
1359{
1360 HChar *mnm = irgen(r1, m3, i4, i2);
1361
sewardj7ee97522011-05-09 21:45:04 +00001362 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001363 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1364 r1, i2, m3, (Int)(Short)i4);
1365}
1366
1367static void
1368s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1369 UChar r1, UChar m3, UShort i4, UChar i2)
1370{
1371 HChar *mnm = irgen(r1, m3, i4, i2);
1372
sewardj7ee97522011-05-09 21:45:04 +00001373 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001374 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1375 (Int)(Char)i2, m3, (Int)(Short)i4);
1376}
1377
1378static void
1379s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1380 UChar r1, UInt i2)
1381{
1382 irgen(r1, i2);
1383}
1384
1385static void
1386s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1387 UChar r1, UInt i2)
1388{
1389 HChar *mnm = irgen(r1, i2);
1390
sewardj7ee97522011-05-09 21:45:04 +00001391 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001392 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1393}
1394
1395static void
1396s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1397 UChar r1, UInt i2)
1398{
1399 HChar *mnm = irgen(r1, i2);
1400
sewardj7ee97522011-05-09 21:45:04 +00001401 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001402 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1403}
1404
1405static void
1406s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1407 UChar r1, UInt i2)
1408{
1409 HChar *mnm = irgen(r1, i2);
1410
sewardj7ee97522011-05-09 21:45:04 +00001411 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001412 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1413}
1414
1415static void
1416s390_format_RIL_UP(HChar *(*irgen)(void),
1417 UChar r1, UInt i2)
1418{
1419 HChar *mnm = irgen();
1420
sewardj7ee97522011-05-09 21:45:04 +00001421 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001422 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1423}
1424
1425static void
1426s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1427 IRTemp op4addr),
1428 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1429{
1430 HChar *mnm;
1431 IRTemp op4addr = newTemp(Ity_I64);
1432
1433 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1434 mkU64(0)));
1435
1436 mnm = irgen(r1, m3, i2, op4addr);
1437
sewardj7ee97522011-05-09 21:45:04 +00001438 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001439 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1440 (Int)(Char)i2, m3, d4, 0, b4);
1441}
1442
1443static void
1444s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1445 IRTemp op4addr),
1446 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1447{
1448 HChar *mnm;
1449 IRTemp op4addr = newTemp(Ity_I64);
1450
1451 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1452 mkU64(0)));
1453
1454 mnm = irgen(r1, m3, i2, op4addr);
1455
sewardj7ee97522011-05-09 21:45:04 +00001456 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001457 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1458 i2, m3, d4, 0, b4);
1459}
1460
1461static void
1462s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1463 UChar r1, UChar r2)
1464{
1465 irgen(r1, r2);
1466}
1467
1468static void
1469s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1470 UChar r1, UChar r2)
1471{
1472 HChar *mnm = irgen(r1, r2);
1473
sewardj7ee97522011-05-09 21:45:04 +00001474 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001475 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1476}
1477
1478static void
1479s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1480 UChar r1, UChar r2)
1481{
1482 HChar *mnm = irgen(r1, r2);
1483
sewardj7ee97522011-05-09 21:45:04 +00001484 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001485 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1486}
1487
1488static void
1489s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1490 UChar r1, UChar r2)
1491{
1492 irgen(r1, r2);
1493}
1494
1495static void
1496s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1497 UChar r1, UChar r2)
1498{
1499 HChar *mnm = irgen(r1, r2);
1500
sewardj7ee97522011-05-09 21:45:04 +00001501 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001502 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1503}
1504
1505static void
1506s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1507 UChar r1, UChar r2)
1508{
1509 HChar *mnm = irgen(r1, r2);
1510
sewardj7ee97522011-05-09 21:45:04 +00001511 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001512 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1513}
1514
1515static void
1516s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1517 UChar r1, UChar r2)
1518{
1519 HChar *mnm = irgen(r1, r2);
1520
sewardj7ee97522011-05-09 21:45:04 +00001521 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001522 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1523}
1524
1525static void
1526s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1527 UChar r1, UChar r2)
1528{
1529 HChar *mnm = irgen(r1, r2);
1530
sewardj7ee97522011-05-09 21:45:04 +00001531 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001532 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1533}
1534
1535static void
1536s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1537 UChar r1)
1538{
1539 HChar *mnm = irgen(r1);
1540
sewardj7ee97522011-05-09 21:45:04 +00001541 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001542 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1543}
1544
1545static void
1546s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1547 UChar r1)
1548{
1549 HChar *mnm = irgen(r1);
1550
sewardj7ee97522011-05-09 21:45:04 +00001551 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001552 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1553}
1554
1555static void
1556s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1557 UChar r1, UChar r3, UChar r2)
1558{
1559 HChar *mnm = irgen(r1, r3, r2);
1560
sewardj7ee97522011-05-09 21:45:04 +00001561 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001562 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1563}
1564
1565static void
sewardjd7bde722011-04-05 13:19:33 +00001566s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1567 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1568{
1569 irgen(m3, r1, r2);
1570
sewardj7ee97522011-05-09 21:45:04 +00001571 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001572 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1573}
1574
1575static void
sewardj2019a972011-03-07 16:04:07 +00001576s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1577 UChar r3, UChar r1, UChar r2)
1578{
1579 HChar *mnm = irgen(r3, r1, r2);
1580
sewardj7ee97522011-05-09 21:45:04 +00001581 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001582 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1583}
1584
1585static void
1586s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1587 UChar r3, UChar r1, UChar r2)
1588{
1589 HChar *mnm = irgen(r3, r1, r2);
1590
sewardj7ee97522011-05-09 21:45:04 +00001591 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001592 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1593}
1594
1595static void
1596s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1597 UChar r3, UChar r1, UChar r2)
1598{
1599 HChar *mnm = irgen(r3, r1, r2);
1600
sewardj7ee97522011-05-09 21:45:04 +00001601 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001602 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1603}
1604
1605static void
1606s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1607 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1608{
1609 HChar *mnm;
1610 IRTemp op4addr = newTemp(Ity_I64);
1611
1612 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1613 mkU64(0)));
1614
1615 mnm = irgen(r1, r2, m3, op4addr);
1616
sewardj7ee97522011-05-09 21:45:04 +00001617 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001618 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1619 r2, m3, d4, 0, b4);
1620}
1621
1622static void
1623s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1624 UChar r1, UChar b2, UShort d2)
1625{
1626 HChar *mnm;
1627 IRTemp op2addr = newTemp(Ity_I64);
1628
1629 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1630 mkU64(0)));
1631
1632 mnm = irgen(r1, op2addr);
1633
sewardj7ee97522011-05-09 21:45:04 +00001634 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001635 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1636}
1637
1638static void
1639s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1640 UChar r1, UChar r3, UChar b2, UShort d2)
1641{
1642 HChar *mnm;
1643 IRTemp op2addr = newTemp(Ity_I64);
1644
1645 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1646 mkU64(0)));
1647
1648 mnm = irgen(r1, r3, op2addr);
1649
sewardj7ee97522011-05-09 21:45:04 +00001650 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001651 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1652}
1653
1654static void
1655s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1656 UChar r1, UChar r3, UChar b2, UShort d2)
1657{
1658 HChar *mnm;
1659 IRTemp op2addr = newTemp(Ity_I64);
1660
1661 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1662 mkU64(0)));
1663
1664 mnm = irgen(r1, r3, op2addr);
1665
sewardj7ee97522011-05-09 21:45:04 +00001666 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001667 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1668}
1669
1670static void
1671s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1672 UChar r1, UChar r3, UChar b2, UShort d2)
1673{
1674 HChar *mnm;
1675 IRTemp op2addr = newTemp(Ity_I64);
1676
1677 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1678 mkU64(0)));
1679
1680 mnm = irgen(r1, r3, op2addr);
1681
sewardj7ee97522011-05-09 21:45:04 +00001682 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001683 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1684}
1685
1686static void
1687s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1688 UChar r1, UChar r3, UShort i2)
1689{
1690 HChar *mnm = irgen(r1, r3, i2);
1691
sewardj7ee97522011-05-09 21:45:04 +00001692 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001693 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1694}
1695
1696static void
1697s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1698 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1699{
1700 HChar *mnm;
1701 IRTemp op2addr = newTemp(Ity_I64);
1702 IRTemp d2 = newTemp(Ity_I64);
1703
1704 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1705 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1706 mkU64(0)));
1707
1708 mnm = irgen(r1, r3, op2addr);
1709
sewardj7ee97522011-05-09 21:45:04 +00001710 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001711 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1712}
1713
1714static void
1715s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1716 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1717{
1718 HChar *mnm;
1719 IRTemp op2addr = newTemp(Ity_I64);
1720 IRTemp d2 = newTemp(Ity_I64);
1721
1722 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1723 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1724 mkU64(0)));
1725
1726 mnm = irgen(r1, r3, op2addr);
1727
sewardj7ee97522011-05-09 21:45:04 +00001728 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001729 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1730}
1731
1732static void
1733s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1734 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1735{
1736 HChar *mnm;
1737 IRTemp op2addr = newTemp(Ity_I64);
1738 IRTemp d2 = newTemp(Ity_I64);
1739
1740 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1741 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1742 mkU64(0)));
1743
1744 mnm = irgen(r1, r3, op2addr);
1745
sewardj7ee97522011-05-09 21:45:04 +00001746 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001747 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1748}
1749
1750static void
sewardjd7bde722011-04-05 13:19:33 +00001751s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1752 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1753 Int xmnm_kind)
1754{
1755 IRTemp op2addr = newTemp(Ity_I64);
1756 IRTemp d2 = newTemp(Ity_I64);
1757
1758 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1759 guest_IA_next_instr);
1760 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1761 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1762 mkU64(0)));
1763
1764 irgen(r1, op2addr);
1765
sewardj7ee97522011-05-09 21:45:04 +00001766 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001767 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1768}
1769
1770static void
sewardj2019a972011-03-07 16:04:07 +00001771s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1772 IRTemp op2addr),
1773 UChar r1, UChar x2, UChar b2, UShort d2)
1774{
1775 IRTemp op2addr = newTemp(Ity_I64);
1776
1777 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1778 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1779 mkU64(0)));
1780
1781 irgen(r1, x2, b2, d2, op2addr);
1782}
1783
1784static void
1785s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1786 UChar r1, UChar x2, UChar b2, UShort d2)
1787{
1788 HChar *mnm;
1789 IRTemp op2addr = newTemp(Ity_I64);
1790
1791 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1792 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1793 mkU64(0)));
1794
1795 mnm = irgen(r1, op2addr);
1796
sewardj7ee97522011-05-09 21:45:04 +00001797 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001798 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1799}
1800
1801static void
1802s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1803 UChar r1, UChar x2, UChar b2, UShort d2)
1804{
1805 HChar *mnm;
1806 IRTemp op2addr = newTemp(Ity_I64);
1807
1808 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1809 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1810 mkU64(0)));
1811
1812 mnm = irgen(r1, op2addr);
1813
sewardj7ee97522011-05-09 21:45:04 +00001814 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001815 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1816}
1817
1818static void
1819s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1820 UChar r1, UChar x2, UChar b2, UShort d2)
1821{
1822 HChar *mnm;
1823 IRTemp op2addr = newTemp(Ity_I64);
1824
1825 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1826 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1827 mkU64(0)));
1828
1829 mnm = irgen(r1, op2addr);
1830
sewardj7ee97522011-05-09 21:45:04 +00001831 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001832 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1833}
1834
1835static void
1836s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1837 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1838{
1839 HChar *mnm;
1840 IRTemp op2addr = newTemp(Ity_I64);
1841
1842 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1843 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1844 mkU64(0)));
1845
1846 mnm = irgen(r3, op2addr, r1);
1847
sewardj7ee97522011-05-09 21:45:04 +00001848 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001849 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1850}
1851
1852static void
1853s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1854 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1855{
1856 HChar *mnm;
1857 IRTemp op2addr = newTemp(Ity_I64);
1858 IRTemp d2 = newTemp(Ity_I64);
1859
1860 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1861 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1862 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1863 mkU64(0)));
1864
1865 mnm = irgen(r1, op2addr);
1866
sewardj7ee97522011-05-09 21:45:04 +00001867 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001868 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1869}
1870
1871static void
1872s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1873 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1874{
1875 HChar *mnm;
1876 IRTemp op2addr = newTemp(Ity_I64);
1877 IRTemp d2 = newTemp(Ity_I64);
1878
1879 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1880 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1881 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1882 mkU64(0)));
1883
1884 mnm = irgen(r1, op2addr);
1885
sewardj7ee97522011-05-09 21:45:04 +00001886 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001887 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1888}
1889
1890static void
1891s390_format_RXY_URRD(HChar *(*irgen)(void),
1892 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1893{
1894 HChar *mnm;
1895 IRTemp op2addr = newTemp(Ity_I64);
1896 IRTemp d2 = newTemp(Ity_I64);
1897
1898 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1899 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1900 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1901 mkU64(0)));
1902
1903 mnm = irgen();
1904
sewardj7ee97522011-05-09 21:45:04 +00001905 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001906 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1907}
1908
1909static void
1910s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1911 UChar b2, UShort d2)
1912{
1913 HChar *mnm;
1914 IRTemp op2addr = newTemp(Ity_I64);
1915
1916 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1917 mkU64(0)));
1918
1919 mnm = irgen(op2addr);
1920
sewardj7ee97522011-05-09 21:45:04 +00001921 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001922 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1923}
1924
1925static void
1926s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1927 UChar i2, UChar b1, UShort d1)
1928{
1929 HChar *mnm;
1930 IRTemp op1addr = newTemp(Ity_I64);
1931
1932 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1933 mkU64(0)));
1934
1935 mnm = irgen(i2, op1addr);
1936
sewardj7ee97522011-05-09 21:45:04 +00001937 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001938 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
1939}
1940
1941static void
1942s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1943 UChar i2, UChar b1, UShort dl1, UChar dh1)
1944{
1945 HChar *mnm;
1946 IRTemp op1addr = newTemp(Ity_I64);
1947 IRTemp d1 = newTemp(Ity_I64);
1948
1949 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1950 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1951 mkU64(0)));
1952
1953 mnm = irgen(i2, op1addr);
1954
sewardj7ee97522011-05-09 21:45:04 +00001955 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001956 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
1957}
1958
1959static void
1960s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1961 UChar i2, UChar b1, UShort dl1, UChar dh1)
1962{
1963 HChar *mnm;
1964 IRTemp op1addr = newTemp(Ity_I64);
1965 IRTemp d1 = newTemp(Ity_I64);
1966
1967 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1968 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1969 mkU64(0)));
1970
1971 mnm = irgen(i2, op1addr);
1972
sewardj7ee97522011-05-09 21:45:04 +00001973 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001974 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
1975}
1976
1977static void
1978s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
1979 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
1980{
1981 HChar *mnm;
1982 IRTemp op1addr = newTemp(Ity_I64);
1983 IRTemp op2addr = newTemp(Ity_I64);
1984
1985 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1986 mkU64(0)));
1987 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1988 mkU64(0)));
1989
1990 mnm = irgen(l, op1addr, op2addr);
1991
sewardj7ee97522011-05-09 21:45:04 +00001992 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001993 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
1994}
1995
1996static void
1997s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
1998 UChar b1, UShort d1, UShort i2)
1999{
2000 HChar *mnm;
2001 IRTemp op1addr = newTemp(Ity_I64);
2002
2003 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2004 mkU64(0)));
2005
2006 mnm = irgen(i2, op1addr);
2007
sewardj7ee97522011-05-09 21:45:04 +00002008 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002009 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2010}
2011
2012static void
2013s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2014 UChar b1, UShort d1, UShort i2)
2015{
2016 HChar *mnm;
2017 IRTemp op1addr = newTemp(Ity_I64);
2018
2019 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2020 mkU64(0)));
2021
2022 mnm = irgen(i2, op1addr);
2023
sewardj7ee97522011-05-09 21:45:04 +00002024 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002025 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2026}
2027
2028
2029
2030/*------------------------------------------------------------*/
2031/*--- Build IR for opcodes ---*/
2032/*------------------------------------------------------------*/
2033
2034static HChar *
2035s390_irgen_AR(UChar r1, UChar r2)
2036{
2037 IRTemp op1 = newTemp(Ity_I32);
2038 IRTemp op2 = newTemp(Ity_I32);
2039 IRTemp result = newTemp(Ity_I32);
2040
2041 assign(op1, get_gpr_w1(r1));
2042 assign(op2, get_gpr_w1(r2));
2043 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2044 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2045 put_gpr_w1(r1, mkexpr(result));
2046
2047 return "ar";
2048}
2049
2050static HChar *
2051s390_irgen_AGR(UChar r1, UChar r2)
2052{
2053 IRTemp op1 = newTemp(Ity_I64);
2054 IRTemp op2 = newTemp(Ity_I64);
2055 IRTemp result = newTemp(Ity_I64);
2056
2057 assign(op1, get_gpr_dw0(r1));
2058 assign(op2, get_gpr_dw0(r2));
2059 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2060 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2061 put_gpr_dw0(r1, mkexpr(result));
2062
2063 return "agr";
2064}
2065
2066static HChar *
2067s390_irgen_AGFR(UChar r1, UChar r2)
2068{
2069 IRTemp op1 = newTemp(Ity_I64);
2070 IRTemp op2 = newTemp(Ity_I64);
2071 IRTemp result = newTemp(Ity_I64);
2072
2073 assign(op1, get_gpr_dw0(r1));
2074 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2075 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2076 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2077 put_gpr_dw0(r1, mkexpr(result));
2078
2079 return "agfr";
2080}
2081
2082static HChar *
2083s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2084{
2085 IRTemp op2 = newTemp(Ity_I32);
2086 IRTemp op3 = newTemp(Ity_I32);
2087 IRTemp result = newTemp(Ity_I32);
2088
2089 assign(op2, get_gpr_w1(r2));
2090 assign(op3, get_gpr_w1(r3));
2091 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2092 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2093 put_gpr_w1(r1, mkexpr(result));
2094
2095 return "ark";
2096}
2097
2098static HChar *
2099s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2100{
2101 IRTemp op2 = newTemp(Ity_I64);
2102 IRTemp op3 = newTemp(Ity_I64);
2103 IRTemp result = newTemp(Ity_I64);
2104
2105 assign(op2, get_gpr_dw0(r2));
2106 assign(op3, get_gpr_dw0(r3));
2107 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2108 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2109 put_gpr_dw0(r1, mkexpr(result));
2110
2111 return "agrk";
2112}
2113
2114static HChar *
2115s390_irgen_A(UChar r1, IRTemp op2addr)
2116{
2117 IRTemp op1 = newTemp(Ity_I32);
2118 IRTemp op2 = newTemp(Ity_I32);
2119 IRTemp result = newTemp(Ity_I32);
2120
2121 assign(op1, get_gpr_w1(r1));
2122 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2123 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2124 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2125 put_gpr_w1(r1, mkexpr(result));
2126
2127 return "a";
2128}
2129
2130static HChar *
2131s390_irgen_AY(UChar r1, IRTemp op2addr)
2132{
2133 IRTemp op1 = newTemp(Ity_I32);
2134 IRTemp op2 = newTemp(Ity_I32);
2135 IRTemp result = newTemp(Ity_I32);
2136
2137 assign(op1, get_gpr_w1(r1));
2138 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2139 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2140 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2141 put_gpr_w1(r1, mkexpr(result));
2142
2143 return "ay";
2144}
2145
2146static HChar *
2147s390_irgen_AG(UChar r1, IRTemp op2addr)
2148{
2149 IRTemp op1 = newTemp(Ity_I64);
2150 IRTemp op2 = newTemp(Ity_I64);
2151 IRTemp result = newTemp(Ity_I64);
2152
2153 assign(op1, get_gpr_dw0(r1));
2154 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2155 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2156 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2157 put_gpr_dw0(r1, mkexpr(result));
2158
2159 return "ag";
2160}
2161
2162static HChar *
2163s390_irgen_AGF(UChar r1, IRTemp op2addr)
2164{
2165 IRTemp op1 = newTemp(Ity_I64);
2166 IRTemp op2 = newTemp(Ity_I64);
2167 IRTemp result = newTemp(Ity_I64);
2168
2169 assign(op1, get_gpr_dw0(r1));
2170 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2171 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2172 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2173 put_gpr_dw0(r1, mkexpr(result));
2174
2175 return "agf";
2176}
2177
2178static HChar *
2179s390_irgen_AFI(UChar r1, UInt i2)
2180{
2181 IRTemp op1 = newTemp(Ity_I32);
2182 Int op2;
2183 IRTemp result = newTemp(Ity_I32);
2184
2185 assign(op1, get_gpr_w1(r1));
2186 op2 = (Int)i2;
2187 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2188 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2189 mkU32((UInt)op2)));
2190 put_gpr_w1(r1, mkexpr(result));
2191
2192 return "afi";
2193}
2194
2195static HChar *
2196s390_irgen_AGFI(UChar r1, UInt i2)
2197{
2198 IRTemp op1 = newTemp(Ity_I64);
2199 Long op2;
2200 IRTemp result = newTemp(Ity_I64);
2201
2202 assign(op1, get_gpr_dw0(r1));
2203 op2 = (Long)(Int)i2;
2204 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2205 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2206 mkU64((ULong)op2)));
2207 put_gpr_dw0(r1, mkexpr(result));
2208
2209 return "agfi";
2210}
2211
2212static HChar *
2213s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2214{
2215 Int op2;
2216 IRTemp op3 = newTemp(Ity_I32);
2217 IRTemp result = newTemp(Ity_I32);
2218
2219 op2 = (Int)(Short)i2;
2220 assign(op3, get_gpr_w1(r3));
2221 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2222 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2223 op2)), op3);
2224 put_gpr_w1(r1, mkexpr(result));
2225
2226 return "ahik";
2227}
2228
2229static HChar *
2230s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2231{
2232 Long op2;
2233 IRTemp op3 = newTemp(Ity_I64);
2234 IRTemp result = newTemp(Ity_I64);
2235
2236 op2 = (Long)(Short)i2;
2237 assign(op3, get_gpr_dw0(r3));
2238 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2239 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2240 op2)), op3);
2241 put_gpr_dw0(r1, mkexpr(result));
2242
2243 return "aghik";
2244}
2245
2246static HChar *
2247s390_irgen_ASI(UChar i2, IRTemp op1addr)
2248{
2249 IRTemp op1 = newTemp(Ity_I32);
2250 Int op2;
2251 IRTemp result = newTemp(Ity_I32);
2252
2253 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2254 op2 = (Int)(Char)i2;
2255 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2256 store(mkexpr(op1addr), mkexpr(result));
2257 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2258 mkU32((UInt)op2)));
2259
2260 return "asi";
2261}
2262
2263static HChar *
2264s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2265{
2266 IRTemp op1 = newTemp(Ity_I64);
2267 Long op2;
2268 IRTemp result = newTemp(Ity_I64);
2269
2270 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2271 op2 = (Long)(Char)i2;
2272 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2273 store(mkexpr(op1addr), mkexpr(result));
2274 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2275 mkU64((ULong)op2)));
2276
2277 return "agsi";
2278}
2279
2280static HChar *
2281s390_irgen_AH(UChar r1, IRTemp op2addr)
2282{
2283 IRTemp op1 = newTemp(Ity_I32);
2284 IRTemp op2 = newTemp(Ity_I32);
2285 IRTemp result = newTemp(Ity_I32);
2286
2287 assign(op1, get_gpr_w1(r1));
2288 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2289 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2290 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2291 put_gpr_w1(r1, mkexpr(result));
2292
2293 return "ah";
2294}
2295
2296static HChar *
2297s390_irgen_AHY(UChar r1, IRTemp op2addr)
2298{
2299 IRTemp op1 = newTemp(Ity_I32);
2300 IRTemp op2 = newTemp(Ity_I32);
2301 IRTemp result = newTemp(Ity_I32);
2302
2303 assign(op1, get_gpr_w1(r1));
2304 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2305 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2306 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2307 put_gpr_w1(r1, mkexpr(result));
2308
2309 return "ahy";
2310}
2311
2312static HChar *
2313s390_irgen_AHI(UChar r1, UShort i2)
2314{
2315 IRTemp op1 = newTemp(Ity_I32);
2316 Int op2;
2317 IRTemp result = newTemp(Ity_I32);
2318
2319 assign(op1, get_gpr_w1(r1));
2320 op2 = (Int)(Short)i2;
2321 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2322 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2323 mkU32((UInt)op2)));
2324 put_gpr_w1(r1, mkexpr(result));
2325
2326 return "ahi";
2327}
2328
2329static HChar *
2330s390_irgen_AGHI(UChar r1, UShort i2)
2331{
2332 IRTemp op1 = newTemp(Ity_I64);
2333 Long op2;
2334 IRTemp result = newTemp(Ity_I64);
2335
2336 assign(op1, get_gpr_dw0(r1));
2337 op2 = (Long)(Short)i2;
2338 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2339 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2340 mkU64((ULong)op2)));
2341 put_gpr_dw0(r1, mkexpr(result));
2342
2343 return "aghi";
2344}
2345
2346static HChar *
2347s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2348{
2349 IRTemp op2 = newTemp(Ity_I32);
2350 IRTemp op3 = newTemp(Ity_I32);
2351 IRTemp result = newTemp(Ity_I32);
2352
2353 assign(op2, get_gpr_w0(r2));
2354 assign(op3, get_gpr_w0(r3));
2355 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2356 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2357 put_gpr_w0(r1, mkexpr(result));
2358
2359 return "ahhhr";
2360}
2361
2362static HChar *
2363s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2364{
2365 IRTemp op2 = newTemp(Ity_I32);
2366 IRTemp op3 = newTemp(Ity_I32);
2367 IRTemp result = newTemp(Ity_I32);
2368
2369 assign(op2, get_gpr_w0(r2));
2370 assign(op3, get_gpr_w1(r3));
2371 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2372 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2373 put_gpr_w0(r1, mkexpr(result));
2374
2375 return "ahhlr";
2376}
2377
2378static HChar *
2379s390_irgen_AIH(UChar r1, UInt i2)
2380{
2381 IRTemp op1 = newTemp(Ity_I32);
2382 Int op2;
2383 IRTemp result = newTemp(Ity_I32);
2384
2385 assign(op1, get_gpr_w0(r1));
2386 op2 = (Int)i2;
2387 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2388 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2389 mkU32((UInt)op2)));
2390 put_gpr_w0(r1, mkexpr(result));
2391
2392 return "aih";
2393}
2394
2395static HChar *
2396s390_irgen_ALR(UChar r1, UChar r2)
2397{
2398 IRTemp op1 = newTemp(Ity_I32);
2399 IRTemp op2 = newTemp(Ity_I32);
2400 IRTemp result = newTemp(Ity_I32);
2401
2402 assign(op1, get_gpr_w1(r1));
2403 assign(op2, get_gpr_w1(r2));
2404 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2405 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2406 put_gpr_w1(r1, mkexpr(result));
2407
2408 return "alr";
2409}
2410
2411static HChar *
2412s390_irgen_ALGR(UChar r1, UChar r2)
2413{
2414 IRTemp op1 = newTemp(Ity_I64);
2415 IRTemp op2 = newTemp(Ity_I64);
2416 IRTemp result = newTemp(Ity_I64);
2417
2418 assign(op1, get_gpr_dw0(r1));
2419 assign(op2, get_gpr_dw0(r2));
2420 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2421 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2422 put_gpr_dw0(r1, mkexpr(result));
2423
2424 return "algr";
2425}
2426
2427static HChar *
2428s390_irgen_ALGFR(UChar r1, UChar r2)
2429{
2430 IRTemp op1 = newTemp(Ity_I64);
2431 IRTemp op2 = newTemp(Ity_I64);
2432 IRTemp result = newTemp(Ity_I64);
2433
2434 assign(op1, get_gpr_dw0(r1));
2435 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2436 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2437 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2438 put_gpr_dw0(r1, mkexpr(result));
2439
2440 return "algfr";
2441}
2442
2443static HChar *
2444s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2445{
2446 IRTemp op2 = newTemp(Ity_I32);
2447 IRTemp op3 = newTemp(Ity_I32);
2448 IRTemp result = newTemp(Ity_I32);
2449
2450 assign(op2, get_gpr_w1(r2));
2451 assign(op3, get_gpr_w1(r3));
2452 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2453 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2454 put_gpr_w1(r1, mkexpr(result));
2455
2456 return "alrk";
2457}
2458
2459static HChar *
2460s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2461{
2462 IRTemp op2 = newTemp(Ity_I64);
2463 IRTemp op3 = newTemp(Ity_I64);
2464 IRTemp result = newTemp(Ity_I64);
2465
2466 assign(op2, get_gpr_dw0(r2));
2467 assign(op3, get_gpr_dw0(r3));
2468 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2469 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2470 put_gpr_dw0(r1, mkexpr(result));
2471
2472 return "algrk";
2473}
2474
2475static HChar *
2476s390_irgen_AL(UChar r1, IRTemp op2addr)
2477{
2478 IRTemp op1 = newTemp(Ity_I32);
2479 IRTemp op2 = newTemp(Ity_I32);
2480 IRTemp result = newTemp(Ity_I32);
2481
2482 assign(op1, get_gpr_w1(r1));
2483 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2484 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2485 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2486 put_gpr_w1(r1, mkexpr(result));
2487
2488 return "al";
2489}
2490
2491static HChar *
2492s390_irgen_ALY(UChar r1, IRTemp op2addr)
2493{
2494 IRTemp op1 = newTemp(Ity_I32);
2495 IRTemp op2 = newTemp(Ity_I32);
2496 IRTemp result = newTemp(Ity_I32);
2497
2498 assign(op1, get_gpr_w1(r1));
2499 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2500 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2501 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2502 put_gpr_w1(r1, mkexpr(result));
2503
2504 return "aly";
2505}
2506
2507static HChar *
2508s390_irgen_ALG(UChar r1, IRTemp op2addr)
2509{
2510 IRTemp op1 = newTemp(Ity_I64);
2511 IRTemp op2 = newTemp(Ity_I64);
2512 IRTemp result = newTemp(Ity_I64);
2513
2514 assign(op1, get_gpr_dw0(r1));
2515 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2516 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2517 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2518 put_gpr_dw0(r1, mkexpr(result));
2519
2520 return "alg";
2521}
2522
2523static HChar *
2524s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2525{
2526 IRTemp op1 = newTemp(Ity_I64);
2527 IRTemp op2 = newTemp(Ity_I64);
2528 IRTemp result = newTemp(Ity_I64);
2529
2530 assign(op1, get_gpr_dw0(r1));
2531 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2532 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2533 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2534 put_gpr_dw0(r1, mkexpr(result));
2535
2536 return "algf";
2537}
2538
2539static HChar *
2540s390_irgen_ALFI(UChar r1, UInt i2)
2541{
2542 IRTemp op1 = newTemp(Ity_I32);
2543 UInt op2;
2544 IRTemp result = newTemp(Ity_I32);
2545
2546 assign(op1, get_gpr_w1(r1));
2547 op2 = i2;
2548 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2549 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2550 mkU32(op2)));
2551 put_gpr_w1(r1, mkexpr(result));
2552
2553 return "alfi";
2554}
2555
2556static HChar *
2557s390_irgen_ALGFI(UChar r1, UInt i2)
2558{
2559 IRTemp op1 = newTemp(Ity_I64);
2560 ULong op2;
2561 IRTemp result = newTemp(Ity_I64);
2562
2563 assign(op1, get_gpr_dw0(r1));
2564 op2 = (ULong)i2;
2565 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2566 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2567 mkU64(op2)));
2568 put_gpr_dw0(r1, mkexpr(result));
2569
2570 return "algfi";
2571}
2572
2573static HChar *
2574s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2575{
2576 IRTemp op2 = newTemp(Ity_I32);
2577 IRTemp op3 = newTemp(Ity_I32);
2578 IRTemp result = newTemp(Ity_I32);
2579
2580 assign(op2, get_gpr_w0(r2));
2581 assign(op3, get_gpr_w0(r3));
2582 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2583 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2584 put_gpr_w0(r1, mkexpr(result));
2585
2586 return "alhhhr";
2587}
2588
2589static HChar *
2590s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2591{
2592 IRTemp op2 = newTemp(Ity_I32);
2593 IRTemp op3 = newTemp(Ity_I32);
2594 IRTemp result = newTemp(Ity_I32);
2595
2596 assign(op2, get_gpr_w0(r2));
2597 assign(op3, get_gpr_w1(r3));
2598 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2599 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2600 put_gpr_w0(r1, mkexpr(result));
2601
2602 return "alhhlr";
2603}
2604
2605static HChar *
2606s390_irgen_ALCR(UChar r1, UChar r2)
2607{
2608 IRTemp op1 = newTemp(Ity_I32);
2609 IRTemp op2 = newTemp(Ity_I32);
2610 IRTemp result = newTemp(Ity_I32);
2611 IRTemp carry_in = newTemp(Ity_I32);
2612
2613 assign(op1, get_gpr_w1(r1));
2614 assign(op2, get_gpr_w1(r2));
2615 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2616 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2617 mkexpr(carry_in)));
2618 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2619 put_gpr_w1(r1, mkexpr(result));
2620
2621 return "alcr";
2622}
2623
2624static HChar *
2625s390_irgen_ALCGR(UChar r1, UChar r2)
2626{
2627 IRTemp op1 = newTemp(Ity_I64);
2628 IRTemp op2 = newTemp(Ity_I64);
2629 IRTemp result = newTemp(Ity_I64);
2630 IRTemp carry_in = newTemp(Ity_I64);
2631
2632 assign(op1, get_gpr_dw0(r1));
2633 assign(op2, get_gpr_dw0(r2));
2634 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2635 mkU8(1))));
2636 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2637 mkexpr(carry_in)));
2638 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2639 put_gpr_dw0(r1, mkexpr(result));
2640
2641 return "alcgr";
2642}
2643
2644static HChar *
2645s390_irgen_ALC(UChar r1, IRTemp op2addr)
2646{
2647 IRTemp op1 = newTemp(Ity_I32);
2648 IRTemp op2 = newTemp(Ity_I32);
2649 IRTemp result = newTemp(Ity_I32);
2650 IRTemp carry_in = newTemp(Ity_I32);
2651
2652 assign(op1, get_gpr_w1(r1));
2653 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2654 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2655 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2656 mkexpr(carry_in)));
2657 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2658 put_gpr_w1(r1, mkexpr(result));
2659
2660 return "alc";
2661}
2662
2663static HChar *
2664s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2665{
2666 IRTemp op1 = newTemp(Ity_I64);
2667 IRTemp op2 = newTemp(Ity_I64);
2668 IRTemp result = newTemp(Ity_I64);
2669 IRTemp carry_in = newTemp(Ity_I64);
2670
2671 assign(op1, get_gpr_dw0(r1));
2672 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2673 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2674 mkU8(1))));
2675 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2676 mkexpr(carry_in)));
2677 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2678 put_gpr_dw0(r1, mkexpr(result));
2679
2680 return "alcg";
2681}
2682
2683static HChar *
2684s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2685{
2686 IRTemp op1 = newTemp(Ity_I32);
2687 UInt op2;
2688 IRTemp result = newTemp(Ity_I32);
2689
2690 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2691 op2 = (UInt)(Int)(Char)i2;
2692 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2693 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2694 mkU32(op2)));
2695 store(mkexpr(op1addr), mkexpr(result));
2696
2697 return "alsi";
2698}
2699
2700static HChar *
2701s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2702{
2703 IRTemp op1 = newTemp(Ity_I64);
2704 ULong op2;
2705 IRTemp result = newTemp(Ity_I64);
2706
2707 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2708 op2 = (ULong)(Long)(Char)i2;
2709 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2710 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2711 mkU64(op2)));
2712 store(mkexpr(op1addr), mkexpr(result));
2713
2714 return "algsi";
2715}
2716
2717static HChar *
2718s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2719{
2720 UInt op2;
2721 IRTemp op3 = newTemp(Ity_I32);
2722 IRTemp result = newTemp(Ity_I32);
2723
2724 op2 = (UInt)(Int)(Short)i2;
2725 assign(op3, get_gpr_w1(r3));
2726 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2727 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2728 op3);
2729 put_gpr_w1(r1, mkexpr(result));
2730
2731 return "alhsik";
2732}
2733
2734static HChar *
2735s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2736{
2737 ULong op2;
2738 IRTemp op3 = newTemp(Ity_I64);
2739 IRTemp result = newTemp(Ity_I64);
2740
2741 op2 = (ULong)(Long)(Short)i2;
2742 assign(op3, get_gpr_dw0(r3));
2743 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2744 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2745 op3);
2746 put_gpr_dw0(r1, mkexpr(result));
2747
2748 return "alghsik";
2749}
2750
2751static HChar *
2752s390_irgen_ALSIH(UChar r1, UInt i2)
2753{
2754 IRTemp op1 = newTemp(Ity_I32);
2755 UInt op2;
2756 IRTemp result = newTemp(Ity_I32);
2757
2758 assign(op1, get_gpr_w0(r1));
2759 op2 = i2;
2760 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2761 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2762 mkU32(op2)));
2763 put_gpr_w0(r1, mkexpr(result));
2764
2765 return "alsih";
2766}
2767
2768static HChar *
2769s390_irgen_ALSIHN(UChar r1, UInt i2)
2770{
2771 IRTemp op1 = newTemp(Ity_I32);
2772 UInt op2;
2773 IRTemp result = newTemp(Ity_I32);
2774
2775 assign(op1, get_gpr_w0(r1));
2776 op2 = i2;
2777 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2778 put_gpr_w0(r1, mkexpr(result));
2779
2780 return "alsihn";
2781}
2782
2783static HChar *
2784s390_irgen_NR(UChar r1, UChar r2)
2785{
2786 IRTemp op1 = newTemp(Ity_I32);
2787 IRTemp op2 = newTemp(Ity_I32);
2788 IRTemp result = newTemp(Ity_I32);
2789
2790 assign(op1, get_gpr_w1(r1));
2791 assign(op2, get_gpr_w1(r2));
2792 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2793 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2794 put_gpr_w1(r1, mkexpr(result));
2795
2796 return "nr";
2797}
2798
2799static HChar *
2800s390_irgen_NGR(UChar r1, UChar r2)
2801{
2802 IRTemp op1 = newTemp(Ity_I64);
2803 IRTemp op2 = newTemp(Ity_I64);
2804 IRTemp result = newTemp(Ity_I64);
2805
2806 assign(op1, get_gpr_dw0(r1));
2807 assign(op2, get_gpr_dw0(r2));
2808 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2809 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2810 put_gpr_dw0(r1, mkexpr(result));
2811
2812 return "ngr";
2813}
2814
2815static HChar *
2816s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2817{
2818 IRTemp op2 = newTemp(Ity_I32);
2819 IRTemp op3 = newTemp(Ity_I32);
2820 IRTemp result = newTemp(Ity_I32);
2821
2822 assign(op2, get_gpr_w1(r2));
2823 assign(op3, get_gpr_w1(r3));
2824 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2825 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2826 put_gpr_w1(r1, mkexpr(result));
2827
2828 return "nrk";
2829}
2830
2831static HChar *
2832s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2833{
2834 IRTemp op2 = newTemp(Ity_I64);
2835 IRTemp op3 = newTemp(Ity_I64);
2836 IRTemp result = newTemp(Ity_I64);
2837
2838 assign(op2, get_gpr_dw0(r2));
2839 assign(op3, get_gpr_dw0(r3));
2840 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2841 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2842 put_gpr_dw0(r1, mkexpr(result));
2843
2844 return "ngrk";
2845}
2846
2847static HChar *
2848s390_irgen_N(UChar r1, IRTemp op2addr)
2849{
2850 IRTemp op1 = newTemp(Ity_I32);
2851 IRTemp op2 = newTemp(Ity_I32);
2852 IRTemp result = newTemp(Ity_I32);
2853
2854 assign(op1, get_gpr_w1(r1));
2855 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2856 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2857 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2858 put_gpr_w1(r1, mkexpr(result));
2859
2860 return "n";
2861}
2862
2863static HChar *
2864s390_irgen_NY(UChar r1, IRTemp op2addr)
2865{
2866 IRTemp op1 = newTemp(Ity_I32);
2867 IRTemp op2 = newTemp(Ity_I32);
2868 IRTemp result = newTemp(Ity_I32);
2869
2870 assign(op1, get_gpr_w1(r1));
2871 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2872 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2873 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2874 put_gpr_w1(r1, mkexpr(result));
2875
2876 return "ny";
2877}
2878
2879static HChar *
2880s390_irgen_NG(UChar r1, IRTemp op2addr)
2881{
2882 IRTemp op1 = newTemp(Ity_I64);
2883 IRTemp op2 = newTemp(Ity_I64);
2884 IRTemp result = newTemp(Ity_I64);
2885
2886 assign(op1, get_gpr_dw0(r1));
2887 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2888 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2889 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2890 put_gpr_dw0(r1, mkexpr(result));
2891
2892 return "ng";
2893}
2894
2895static HChar *
2896s390_irgen_NI(UChar i2, IRTemp op1addr)
2897{
2898 IRTemp op1 = newTemp(Ity_I8);
2899 UChar op2;
2900 IRTemp result = newTemp(Ity_I8);
2901
2902 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2903 op2 = i2;
2904 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2905 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2906 store(mkexpr(op1addr), mkexpr(result));
2907
2908 return "ni";
2909}
2910
2911static HChar *
2912s390_irgen_NIY(UChar i2, IRTemp op1addr)
2913{
2914 IRTemp op1 = newTemp(Ity_I8);
2915 UChar op2;
2916 IRTemp result = newTemp(Ity_I8);
2917
2918 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2919 op2 = i2;
2920 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2921 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2922 store(mkexpr(op1addr), mkexpr(result));
2923
2924 return "niy";
2925}
2926
2927static HChar *
2928s390_irgen_NIHF(UChar r1, UInt i2)
2929{
2930 IRTemp op1 = newTemp(Ity_I32);
2931 UInt op2;
2932 IRTemp result = newTemp(Ity_I32);
2933
2934 assign(op1, get_gpr_w0(r1));
2935 op2 = i2;
2936 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2937 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2938 put_gpr_w0(r1, mkexpr(result));
2939
2940 return "nihf";
2941}
2942
2943static HChar *
2944s390_irgen_NIHH(UChar r1, UShort i2)
2945{
2946 IRTemp op1 = newTemp(Ity_I16);
2947 UShort op2;
2948 IRTemp result = newTemp(Ity_I16);
2949
2950 assign(op1, get_gpr_hw0(r1));
2951 op2 = i2;
2952 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2953 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2954 put_gpr_hw0(r1, mkexpr(result));
2955
2956 return "nihh";
2957}
2958
2959static HChar *
2960s390_irgen_NIHL(UChar r1, UShort i2)
2961{
2962 IRTemp op1 = newTemp(Ity_I16);
2963 UShort op2;
2964 IRTemp result = newTemp(Ity_I16);
2965
2966 assign(op1, get_gpr_hw1(r1));
2967 op2 = i2;
2968 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2969 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2970 put_gpr_hw1(r1, mkexpr(result));
2971
2972 return "nihl";
2973}
2974
2975static HChar *
2976s390_irgen_NILF(UChar r1, UInt i2)
2977{
2978 IRTemp op1 = newTemp(Ity_I32);
2979 UInt op2;
2980 IRTemp result = newTemp(Ity_I32);
2981
2982 assign(op1, get_gpr_w1(r1));
2983 op2 = i2;
2984 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2985 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2986 put_gpr_w1(r1, mkexpr(result));
2987
2988 return "nilf";
2989}
2990
2991static HChar *
2992s390_irgen_NILH(UChar r1, UShort i2)
2993{
2994 IRTemp op1 = newTemp(Ity_I16);
2995 UShort op2;
2996 IRTemp result = newTemp(Ity_I16);
2997
2998 assign(op1, get_gpr_hw2(r1));
2999 op2 = i2;
3000 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3001 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3002 put_gpr_hw2(r1, mkexpr(result));
3003
3004 return "nilh";
3005}
3006
3007static HChar *
3008s390_irgen_NILL(UChar r1, UShort i2)
3009{
3010 IRTemp op1 = newTemp(Ity_I16);
3011 UShort op2;
3012 IRTemp result = newTemp(Ity_I16);
3013
3014 assign(op1, get_gpr_hw3(r1));
3015 op2 = i2;
3016 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3017 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3018 put_gpr_hw3(r1, mkexpr(result));
3019
3020 return "nill";
3021}
3022
3023static HChar *
3024s390_irgen_BASR(UChar r1, UChar r2)
3025{
3026 IRTemp target = newTemp(Ity_I64);
3027
3028 if (r2 == 0) {
3029 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3030 } else {
3031 if (r1 != r2) {
3032 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3033 call_function(get_gpr_dw0(r2));
3034 } else {
3035 assign(target, get_gpr_dw0(r2));
3036 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3037 call_function(mkexpr(target));
3038 }
3039 }
3040
3041 return "basr";
3042}
3043
3044static HChar *
3045s390_irgen_BAS(UChar r1, IRTemp op2addr)
3046{
3047 IRTemp target = newTemp(Ity_I64);
3048
3049 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3050 assign(target, mkexpr(op2addr));
3051 call_function(mkexpr(target));
3052
3053 return "bas";
3054}
3055
3056static HChar *
3057s390_irgen_BCR(UChar r1, UChar r2)
3058{
3059 IRTemp cond = newTemp(Ity_I32);
3060
sewardja52e37e2011-04-28 18:48:06 +00003061 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3062 stmt(IRStmt_MBE(Imbe_Fence));
3063 }
3064
sewardj2019a972011-03-07 16:04:07 +00003065 if ((r2 == 0) || (r1 == 0)) {
3066 } else {
3067 if (r1 == 15) {
3068 return_from_function(get_gpr_dw0(r2));
3069 } else {
3070 assign(cond, s390_call_calculate_cond(r1));
3071 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3072 mkU32(0)), get_gpr_dw0(r2));
3073 }
3074 }
sewardj7ee97522011-05-09 21:45:04 +00003075 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003076 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3077
3078 return "bcr";
3079}
3080
3081static HChar *
3082s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3083{
3084 IRTemp cond = newTemp(Ity_I32);
3085
3086 if (r1 == 0) {
3087 } else {
3088 if (r1 == 15) {
3089 always_goto(mkexpr(op2addr));
3090 } else {
3091 assign(cond, s390_call_calculate_cond(r1));
3092 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3093 mkU32(0)), mkexpr(op2addr));
3094 }
3095 }
sewardj7ee97522011-05-09 21:45:04 +00003096 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003097 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3098
3099 return "bc";
3100}
3101
3102static HChar *
3103s390_irgen_BCTR(UChar r1, UChar r2)
3104{
3105 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3106 if (r2 != 0) {
3107 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3108 ), get_gpr_dw0(r2));
3109 }
3110
3111 return "bctr";
3112}
3113
3114static HChar *
3115s390_irgen_BCTGR(UChar r1, UChar r2)
3116{
3117 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3118 if (r2 != 0) {
3119 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3120 mkU64(0)), get_gpr_dw0(r2));
3121 }
3122
3123 return "bctgr";
3124}
3125
3126static HChar *
3127s390_irgen_BCT(UChar r1, IRTemp op2addr)
3128{
3129 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3130 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3131 mkexpr(op2addr));
3132
3133 return "bct";
3134}
3135
3136static HChar *
3137s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3138{
3139 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3140 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3141 mkexpr(op2addr));
3142
3143 return "bctg";
3144}
3145
3146static HChar *
3147s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3148{
3149 IRTemp value = newTemp(Ity_I32);
3150
3151 assign(value, get_gpr_w1(r3 | 1));
3152 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3153 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3154 mkexpr(value)), mkexpr(op2addr));
3155
3156 return "bxh";
3157}
3158
3159static HChar *
3160s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3161{
3162 IRTemp value = newTemp(Ity_I64);
3163
3164 assign(value, get_gpr_dw0(r3 | 1));
3165 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3166 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3167 mkexpr(value)), mkexpr(op2addr));
3168
3169 return "bxhg";
3170}
3171
3172static HChar *
3173s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3174{
3175 IRTemp value = newTemp(Ity_I32);
3176
3177 assign(value, get_gpr_w1(r3 | 1));
3178 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3179 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3180 get_gpr_w1(r1)), mkexpr(op2addr));
3181
3182 return "bxle";
3183}
3184
3185static HChar *
3186s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3187{
3188 IRTemp value = newTemp(Ity_I64);
3189
3190 assign(value, get_gpr_dw0(r3 | 1));
3191 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3192 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3193 get_gpr_dw0(r1)), mkexpr(op2addr));
3194
3195 return "bxleg";
3196}
3197
3198static HChar *
3199s390_irgen_BRAS(UChar r1, UShort i2)
3200{
3201 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3202 call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)));
3203
3204 return "bras";
3205}
3206
3207static HChar *
3208s390_irgen_BRASL(UChar r1, UInt i2)
3209{
3210 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
3211 call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
3212
3213 return "brasl";
3214}
3215
3216static HChar *
3217s390_irgen_BRC(UChar r1, UShort i2)
3218{
3219 IRTemp cond = newTemp(Ity_I32);
3220
3221 if (r1 == 0) {
3222 } else {
3223 if (r1 == 15) {
3224 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1))
3225 );
3226 } else {
3227 assign(cond, s390_call_calculate_cond(r1));
3228 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3229 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3230
3231 }
3232 }
sewardj7ee97522011-05-09 21:45:04 +00003233 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003234 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3235
3236 return "brc";
3237}
3238
3239static HChar *
3240s390_irgen_BRCL(UChar r1, UInt i2)
3241{
3242 IRTemp cond = newTemp(Ity_I32);
3243
3244 if (r1 == 0) {
3245 } else {
3246 if (r1 == 15) {
3247 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
3248 } else {
3249 assign(cond, s390_call_calculate_cond(r1));
3250 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3251 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3252 }
3253 }
sewardj7ee97522011-05-09 21:45:04 +00003254 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003255 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3256
3257 return "brcl";
3258}
3259
3260static HChar *
3261s390_irgen_BRCT(UChar r1, UShort i2)
3262{
3263 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3264 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3265 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3266
3267 return "brct";
3268}
3269
3270static HChar *
3271s390_irgen_BRCTG(UChar r1, UShort i2)
3272{
3273 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3274 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3275 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3276
3277 return "brctg";
3278}
3279
3280static HChar *
3281s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3282{
3283 IRTemp value = newTemp(Ity_I32);
3284
3285 assign(value, get_gpr_w1(r3 | 1));
3286 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3287 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3288 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3289
3290 return "brxh";
3291}
3292
3293static HChar *
3294s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3295{
3296 IRTemp value = newTemp(Ity_I64);
3297
3298 assign(value, get_gpr_dw0(r3 | 1));
3299 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3300 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3301 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3302
3303 return "brxhg";
3304}
3305
3306static HChar *
3307s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3308{
3309 IRTemp value = newTemp(Ity_I32);
3310
3311 assign(value, get_gpr_w1(r3 | 1));
3312 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3313 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3314 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3315
3316 return "brxle";
3317}
3318
3319static HChar *
3320s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3321{
3322 IRTemp value = newTemp(Ity_I64);
3323
3324 assign(value, get_gpr_dw0(r3 | 1));
3325 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3326 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3327 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3328
3329 return "brxlg";
3330}
3331
3332static HChar *
3333s390_irgen_CR(UChar r1, UChar r2)
3334{
3335 IRTemp op1 = newTemp(Ity_I32);
3336 IRTemp op2 = newTemp(Ity_I32);
3337
3338 assign(op1, get_gpr_w1(r1));
3339 assign(op2, get_gpr_w1(r2));
3340 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3341
3342 return "cr";
3343}
3344
3345static HChar *
3346s390_irgen_CGR(UChar r1, UChar r2)
3347{
3348 IRTemp op1 = newTemp(Ity_I64);
3349 IRTemp op2 = newTemp(Ity_I64);
3350
3351 assign(op1, get_gpr_dw0(r1));
3352 assign(op2, get_gpr_dw0(r2));
3353 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3354
3355 return "cgr";
3356}
3357
3358static HChar *
3359s390_irgen_CGFR(UChar r1, UChar r2)
3360{
3361 IRTemp op1 = newTemp(Ity_I64);
3362 IRTemp op2 = newTemp(Ity_I64);
3363
3364 assign(op1, get_gpr_dw0(r1));
3365 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3366 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3367
3368 return "cgfr";
3369}
3370
3371static HChar *
3372s390_irgen_C(UChar r1, IRTemp op2addr)
3373{
3374 IRTemp op1 = newTemp(Ity_I32);
3375 IRTemp op2 = newTemp(Ity_I32);
3376
3377 assign(op1, get_gpr_w1(r1));
3378 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3379 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3380
3381 return "c";
3382}
3383
3384static HChar *
3385s390_irgen_CY(UChar r1, IRTemp op2addr)
3386{
3387 IRTemp op1 = newTemp(Ity_I32);
3388 IRTemp op2 = newTemp(Ity_I32);
3389
3390 assign(op1, get_gpr_w1(r1));
3391 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3392 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3393
3394 return "cy";
3395}
3396
3397static HChar *
3398s390_irgen_CG(UChar r1, IRTemp op2addr)
3399{
3400 IRTemp op1 = newTemp(Ity_I64);
3401 IRTemp op2 = newTemp(Ity_I64);
3402
3403 assign(op1, get_gpr_dw0(r1));
3404 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3405 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3406
3407 return "cg";
3408}
3409
3410static HChar *
3411s390_irgen_CGF(UChar r1, IRTemp op2addr)
3412{
3413 IRTemp op1 = newTemp(Ity_I64);
3414 IRTemp op2 = newTemp(Ity_I64);
3415
3416 assign(op1, get_gpr_dw0(r1));
3417 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3418 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3419
3420 return "cgf";
3421}
3422
3423static HChar *
3424s390_irgen_CFI(UChar r1, UInt i2)
3425{
3426 IRTemp op1 = newTemp(Ity_I32);
3427 Int op2;
3428
3429 assign(op1, get_gpr_w1(r1));
3430 op2 = (Int)i2;
3431 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3432 mkU32((UInt)op2)));
3433
3434 return "cfi";
3435}
3436
3437static HChar *
3438s390_irgen_CGFI(UChar r1, UInt i2)
3439{
3440 IRTemp op1 = newTemp(Ity_I64);
3441 Long op2;
3442
3443 assign(op1, get_gpr_dw0(r1));
3444 op2 = (Long)(Int)i2;
3445 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3446 mkU64((ULong)op2)));
3447
3448 return "cgfi";
3449}
3450
3451static HChar *
3452s390_irgen_CRL(UChar r1, UInt i2)
3453{
3454 IRTemp op1 = newTemp(Ity_I32);
3455 IRTemp op2 = newTemp(Ity_I32);
3456
3457 assign(op1, get_gpr_w1(r1));
3458 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3459 i2 << 1))));
3460 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3461
3462 return "crl";
3463}
3464
3465static HChar *
3466s390_irgen_CGRL(UChar r1, UInt i2)
3467{
3468 IRTemp op1 = newTemp(Ity_I64);
3469 IRTemp op2 = newTemp(Ity_I64);
3470
3471 assign(op1, get_gpr_dw0(r1));
3472 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3473 i2 << 1))));
3474 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3475
3476 return "cgrl";
3477}
3478
3479static HChar *
3480s390_irgen_CGFRL(UChar r1, UInt i2)
3481{
3482 IRTemp op1 = newTemp(Ity_I64);
3483 IRTemp op2 = newTemp(Ity_I64);
3484
3485 assign(op1, get_gpr_dw0(r1));
3486 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3487 ((ULong)(Long)(Int)i2 << 1)))));
3488 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3489
3490 return "cgfrl";
3491}
3492
3493static HChar *
3494s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3495{
3496 IRTemp op1 = newTemp(Ity_I32);
3497 IRTemp op2 = newTemp(Ity_I32);
3498 IRTemp icc = newTemp(Ity_I32);
3499 IRTemp cond = newTemp(Ity_I32);
3500
3501 if (m3 == 0) {
3502 } else {
3503 if (m3 == 14) {
3504 always_goto(mkexpr(op4addr));
3505 } else {
3506 assign(op1, get_gpr_w1(r1));
3507 assign(op2, get_gpr_w1(r2));
3508 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3509 op2));
3510 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3511 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3512 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3513 mkU32(0)), mkexpr(op4addr));
3514 }
3515 }
3516
3517 return "crb";
3518}
3519
3520static HChar *
3521s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3522{
3523 IRTemp op1 = newTemp(Ity_I64);
3524 IRTemp op2 = newTemp(Ity_I64);
3525 IRTemp icc = newTemp(Ity_I32);
3526 IRTemp cond = newTemp(Ity_I32);
3527
3528 if (m3 == 0) {
3529 } else {
3530 if (m3 == 14) {
3531 always_goto(mkexpr(op4addr));
3532 } else {
3533 assign(op1, get_gpr_dw0(r1));
3534 assign(op2, get_gpr_dw0(r2));
3535 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3536 op2));
3537 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3538 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3539 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3540 mkU32(0)), mkexpr(op4addr));
3541 }
3542 }
3543
3544 return "cgrb";
3545}
3546
3547static HChar *
3548s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3549{
3550 IRTemp op1 = newTemp(Ity_I32);
3551 IRTemp op2 = newTemp(Ity_I32);
3552 IRTemp icc = newTemp(Ity_I32);
3553 IRTemp cond = newTemp(Ity_I32);
3554
3555 if (m3 == 0) {
3556 } else {
3557 if (m3 == 14) {
3558 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3559 );
3560 } else {
3561 assign(op1, get_gpr_w1(r1));
3562 assign(op2, get_gpr_w1(r2));
3563 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3564 op2));
3565 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3566 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3567 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3568 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3569
3570 }
3571 }
3572
3573 return "crj";
3574}
3575
3576static HChar *
3577s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3578{
3579 IRTemp op1 = newTemp(Ity_I64);
3580 IRTemp op2 = newTemp(Ity_I64);
3581 IRTemp icc = newTemp(Ity_I32);
3582 IRTemp cond = newTemp(Ity_I32);
3583
3584 if (m3 == 0) {
3585 } else {
3586 if (m3 == 14) {
3587 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3588 );
3589 } else {
3590 assign(op1, get_gpr_dw0(r1));
3591 assign(op2, get_gpr_dw0(r2));
3592 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3593 op2));
3594 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3595 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3596 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3597 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3598
3599 }
3600 }
3601
3602 return "cgrj";
3603}
3604
3605static HChar *
3606s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3607{
3608 IRTemp op1 = newTemp(Ity_I32);
3609 Int op2;
3610 IRTemp icc = newTemp(Ity_I32);
3611 IRTemp cond = newTemp(Ity_I32);
3612
3613 if (m3 == 0) {
3614 } else {
3615 if (m3 == 14) {
3616 always_goto(mkexpr(op4addr));
3617 } else {
3618 assign(op1, get_gpr_w1(r1));
3619 op2 = (Int)(Char)i2;
3620 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3621 mktemp(Ity_I32, mkU32((UInt)op2))));
3622 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3623 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3624 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3625 mkU32(0)), mkexpr(op4addr));
3626 }
3627 }
3628
3629 return "cib";
3630}
3631
3632static HChar *
3633s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3634{
3635 IRTemp op1 = newTemp(Ity_I64);
3636 Long op2;
3637 IRTemp icc = newTemp(Ity_I32);
3638 IRTemp cond = newTemp(Ity_I32);
3639
3640 if (m3 == 0) {
3641 } else {
3642 if (m3 == 14) {
3643 always_goto(mkexpr(op4addr));
3644 } else {
3645 assign(op1, get_gpr_dw0(r1));
3646 op2 = (Long)(Char)i2;
3647 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3648 mktemp(Ity_I64, mkU64((ULong)op2))));
3649 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3650 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3651 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3652 mkU32(0)), mkexpr(op4addr));
3653 }
3654 }
3655
3656 return "cgib";
3657}
3658
3659static HChar *
3660s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3661{
3662 IRTemp op1 = newTemp(Ity_I32);
3663 Int op2;
3664 IRTemp icc = newTemp(Ity_I32);
3665 IRTemp cond = newTemp(Ity_I32);
3666
3667 if (m3 == 0) {
3668 } else {
3669 if (m3 == 14) {
3670 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3671 );
3672 } else {
3673 assign(op1, get_gpr_w1(r1));
3674 op2 = (Int)(Char)i2;
3675 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3676 mktemp(Ity_I32, mkU32((UInt)op2))));
3677 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3678 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3679 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3680 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3681
3682 }
3683 }
3684
3685 return "cij";
3686}
3687
3688static HChar *
3689s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3690{
3691 IRTemp op1 = newTemp(Ity_I64);
3692 Long op2;
3693 IRTemp icc = newTemp(Ity_I32);
3694 IRTemp cond = newTemp(Ity_I32);
3695
3696 if (m3 == 0) {
3697 } else {
3698 if (m3 == 14) {
3699 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3700 );
3701 } else {
3702 assign(op1, get_gpr_dw0(r1));
3703 op2 = (Long)(Char)i2;
3704 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3705 mktemp(Ity_I64, mkU64((ULong)op2))));
3706 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3707 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3708 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3709 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3710
3711 }
3712 }
3713
3714 return "cgij";
3715}
3716
3717static HChar *
3718s390_irgen_CH(UChar r1, IRTemp op2addr)
3719{
3720 IRTemp op1 = newTemp(Ity_I32);
3721 IRTemp op2 = newTemp(Ity_I32);
3722
3723 assign(op1, get_gpr_w1(r1));
3724 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3725 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3726
3727 return "ch";
3728}
3729
3730static HChar *
3731s390_irgen_CHY(UChar r1, IRTemp op2addr)
3732{
3733 IRTemp op1 = newTemp(Ity_I32);
3734 IRTemp op2 = newTemp(Ity_I32);
3735
3736 assign(op1, get_gpr_w1(r1));
3737 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3738 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3739
3740 return "chy";
3741}
3742
3743static HChar *
3744s390_irgen_CGH(UChar r1, IRTemp op2addr)
3745{
3746 IRTemp op1 = newTemp(Ity_I64);
3747 IRTemp op2 = newTemp(Ity_I64);
3748
3749 assign(op1, get_gpr_dw0(r1));
3750 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3751 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3752
3753 return "cgh";
3754}
3755
3756static HChar *
3757s390_irgen_CHI(UChar r1, UShort i2)
3758{
3759 IRTemp op1 = newTemp(Ity_I32);
3760 Int op2;
3761
3762 assign(op1, get_gpr_w1(r1));
3763 op2 = (Int)(Short)i2;
3764 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3765 mkU32((UInt)op2)));
3766
3767 return "chi";
3768}
3769
3770static HChar *
3771s390_irgen_CGHI(UChar r1, UShort i2)
3772{
3773 IRTemp op1 = newTemp(Ity_I64);
3774 Long op2;
3775
3776 assign(op1, get_gpr_dw0(r1));
3777 op2 = (Long)(Short)i2;
3778 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3779 mkU64((ULong)op2)));
3780
3781 return "cghi";
3782}
3783
3784static HChar *
3785s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3786{
3787 IRTemp op1 = newTemp(Ity_I16);
3788 Short op2;
3789
3790 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3791 op2 = (Short)i2;
3792 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3793 mkU16((UShort)op2)));
3794
3795 return "chhsi";
3796}
3797
3798static HChar *
3799s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3800{
3801 IRTemp op1 = newTemp(Ity_I32);
3802 Int op2;
3803
3804 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3805 op2 = (Int)(Short)i2;
3806 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3807 mkU32((UInt)op2)));
3808
3809 return "chsi";
3810}
3811
3812static HChar *
3813s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3814{
3815 IRTemp op1 = newTemp(Ity_I64);
3816 Long op2;
3817
3818 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3819 op2 = (Long)(Short)i2;
3820 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3821 mkU64((ULong)op2)));
3822
3823 return "cghsi";
3824}
3825
3826static HChar *
3827s390_irgen_CHRL(UChar r1, UInt i2)
3828{
3829 IRTemp op1 = newTemp(Ity_I32);
3830 IRTemp op2 = newTemp(Ity_I32);
3831
3832 assign(op1, get_gpr_w1(r1));
3833 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3834 ((ULong)(Long)(Int)i2 << 1)))));
3835 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3836
3837 return "chrl";
3838}
3839
3840static HChar *
3841s390_irgen_CGHRL(UChar r1, UInt i2)
3842{
3843 IRTemp op1 = newTemp(Ity_I64);
3844 IRTemp op2 = newTemp(Ity_I64);
3845
3846 assign(op1, get_gpr_dw0(r1));
3847 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3848 ((ULong)(Long)(Int)i2 << 1)))));
3849 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3850
3851 return "cghrl";
3852}
3853
3854static HChar *
3855s390_irgen_CHHR(UChar r1, UChar r2)
3856{
3857 IRTemp op1 = newTemp(Ity_I32);
3858 IRTemp op2 = newTemp(Ity_I32);
3859
3860 assign(op1, get_gpr_w0(r1));
3861 assign(op2, get_gpr_w0(r2));
3862 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3863
3864 return "chhr";
3865}
3866
3867static HChar *
3868s390_irgen_CHLR(UChar r1, UChar r2)
3869{
3870 IRTemp op1 = newTemp(Ity_I32);
3871 IRTemp op2 = newTemp(Ity_I32);
3872
3873 assign(op1, get_gpr_w0(r1));
3874 assign(op2, get_gpr_w1(r2));
3875 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3876
3877 return "chlr";
3878}
3879
3880static HChar *
3881s390_irgen_CHF(UChar r1, IRTemp op2addr)
3882{
3883 IRTemp op1 = newTemp(Ity_I32);
3884 IRTemp op2 = newTemp(Ity_I32);
3885
3886 assign(op1, get_gpr_w0(r1));
3887 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3888 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3889
3890 return "chf";
3891}
3892
3893static HChar *
3894s390_irgen_CIH(UChar r1, UInt i2)
3895{
3896 IRTemp op1 = newTemp(Ity_I32);
3897 Int op2;
3898
3899 assign(op1, get_gpr_w0(r1));
3900 op2 = (Int)i2;
3901 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3902 mkU32((UInt)op2)));
3903
3904 return "cih";
3905}
3906
3907static HChar *
3908s390_irgen_CLR(UChar r1, UChar r2)
3909{
3910 IRTemp op1 = newTemp(Ity_I32);
3911 IRTemp op2 = newTemp(Ity_I32);
3912
3913 assign(op1, get_gpr_w1(r1));
3914 assign(op2, get_gpr_w1(r2));
3915 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3916
3917 return "clr";
3918}
3919
3920static HChar *
3921s390_irgen_CLGR(UChar r1, UChar r2)
3922{
3923 IRTemp op1 = newTemp(Ity_I64);
3924 IRTemp op2 = newTemp(Ity_I64);
3925
3926 assign(op1, get_gpr_dw0(r1));
3927 assign(op2, get_gpr_dw0(r2));
3928 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3929
3930 return "clgr";
3931}
3932
3933static HChar *
3934s390_irgen_CLGFR(UChar r1, UChar r2)
3935{
3936 IRTemp op1 = newTemp(Ity_I64);
3937 IRTemp op2 = newTemp(Ity_I64);
3938
3939 assign(op1, get_gpr_dw0(r1));
3940 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
3941 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3942
3943 return "clgfr";
3944}
3945
3946static HChar *
3947s390_irgen_CL(UChar r1, IRTemp op2addr)
3948{
3949 IRTemp op1 = newTemp(Ity_I32);
3950 IRTemp op2 = newTemp(Ity_I32);
3951
3952 assign(op1, get_gpr_w1(r1));
3953 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3954 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3955
3956 return "cl";
3957}
3958
3959static HChar *
3960s390_irgen_CLY(UChar r1, IRTemp op2addr)
3961{
3962 IRTemp op1 = newTemp(Ity_I32);
3963 IRTemp op2 = newTemp(Ity_I32);
3964
3965 assign(op1, get_gpr_w1(r1));
3966 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3967 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3968
3969 return "cly";
3970}
3971
3972static HChar *
3973s390_irgen_CLG(UChar r1, IRTemp op2addr)
3974{
3975 IRTemp op1 = newTemp(Ity_I64);
3976 IRTemp op2 = newTemp(Ity_I64);
3977
3978 assign(op1, get_gpr_dw0(r1));
3979 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3980 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3981
3982 return "clg";
3983}
3984
3985static HChar *
3986s390_irgen_CLGF(UChar r1, IRTemp op2addr)
3987{
3988 IRTemp op1 = newTemp(Ity_I64);
3989 IRTemp op2 = newTemp(Ity_I64);
3990
3991 assign(op1, get_gpr_dw0(r1));
3992 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
3993 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3994
3995 return "clgf";
3996}
3997
3998static HChar *
3999s390_irgen_CLFI(UChar r1, UInt i2)
4000{
4001 IRTemp op1 = newTemp(Ity_I32);
4002 UInt op2;
4003
4004 assign(op1, get_gpr_w1(r1));
4005 op2 = i2;
4006 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4007 mkU32(op2)));
4008
4009 return "clfi";
4010}
4011
4012static HChar *
4013s390_irgen_CLGFI(UChar r1, UInt i2)
4014{
4015 IRTemp op1 = newTemp(Ity_I64);
4016 ULong op2;
4017
4018 assign(op1, get_gpr_dw0(r1));
4019 op2 = (ULong)i2;
4020 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4021 mkU64(op2)));
4022
4023 return "clgfi";
4024}
4025
4026static HChar *
4027s390_irgen_CLI(UChar i2, IRTemp op1addr)
4028{
4029 IRTemp op1 = newTemp(Ity_I8);
4030 UChar op2;
4031
4032 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4033 op2 = i2;
4034 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4035 mkU8(op2)));
4036
4037 return "cli";
4038}
4039
4040static HChar *
4041s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4042{
4043 IRTemp op1 = newTemp(Ity_I8);
4044 UChar op2;
4045
4046 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4047 op2 = i2;
4048 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4049 mkU8(op2)));
4050
4051 return "cliy";
4052}
4053
4054static HChar *
4055s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4056{
4057 IRTemp op1 = newTemp(Ity_I32);
4058 UInt op2;
4059
4060 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4061 op2 = (UInt)i2;
4062 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4063 mkU32(op2)));
4064
4065 return "clfhsi";
4066}
4067
4068static HChar *
4069s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4070{
4071 IRTemp op1 = newTemp(Ity_I64);
4072 ULong op2;
4073
4074 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4075 op2 = (ULong)i2;
4076 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4077 mkU64(op2)));
4078
4079 return "clghsi";
4080}
4081
4082static HChar *
4083s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4084{
4085 IRTemp op1 = newTemp(Ity_I16);
4086 UShort op2;
4087
4088 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4089 op2 = i2;
4090 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4091 mkU16(op2)));
4092
4093 return "clhhsi";
4094}
4095
4096static HChar *
4097s390_irgen_CLRL(UChar r1, UInt i2)
4098{
4099 IRTemp op1 = newTemp(Ity_I32);
4100 IRTemp op2 = newTemp(Ity_I32);
4101
4102 assign(op1, get_gpr_w1(r1));
4103 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4104 i2 << 1))));
4105 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4106
4107 return "clrl";
4108}
4109
4110static HChar *
4111s390_irgen_CLGRL(UChar r1, UInt i2)
4112{
4113 IRTemp op1 = newTemp(Ity_I64);
4114 IRTemp op2 = newTemp(Ity_I64);
4115
4116 assign(op1, get_gpr_dw0(r1));
4117 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4118 i2 << 1))));
4119 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4120
4121 return "clgrl";
4122}
4123
4124static HChar *
4125s390_irgen_CLGFRL(UChar r1, UInt i2)
4126{
4127 IRTemp op1 = newTemp(Ity_I64);
4128 IRTemp op2 = newTemp(Ity_I64);
4129
4130 assign(op1, get_gpr_dw0(r1));
4131 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4132 ((ULong)(Long)(Int)i2 << 1)))));
4133 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4134
4135 return "clgfrl";
4136}
4137
4138static HChar *
4139s390_irgen_CLHRL(UChar r1, UInt i2)
4140{
4141 IRTemp op1 = newTemp(Ity_I32);
4142 IRTemp op2 = newTemp(Ity_I32);
4143
4144 assign(op1, get_gpr_w1(r1));
4145 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4146 ((ULong)(Long)(Int)i2 << 1)))));
4147 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4148
4149 return "clhrl";
4150}
4151
4152static HChar *
4153s390_irgen_CLGHRL(UChar r1, UInt i2)
4154{
4155 IRTemp op1 = newTemp(Ity_I64);
4156 IRTemp op2 = newTemp(Ity_I64);
4157
4158 assign(op1, get_gpr_dw0(r1));
4159 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4160 ((ULong)(Long)(Int)i2 << 1)))));
4161 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4162
4163 return "clghrl";
4164}
4165
4166static HChar *
4167s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4168{
4169 IRTemp op1 = newTemp(Ity_I32);
4170 IRTemp op2 = newTemp(Ity_I32);
4171 IRTemp icc = newTemp(Ity_I32);
4172 IRTemp cond = newTemp(Ity_I32);
4173
4174 if (m3 == 0) {
4175 } else {
4176 if (m3 == 14) {
4177 always_goto(mkexpr(op4addr));
4178 } else {
4179 assign(op1, get_gpr_w1(r1));
4180 assign(op2, get_gpr_w1(r2));
4181 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4182 op2));
4183 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4184 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4185 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4186 mkU32(0)), mkexpr(op4addr));
4187 }
4188 }
4189
4190 return "clrb";
4191}
4192
4193static HChar *
4194s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4195{
4196 IRTemp op1 = newTemp(Ity_I64);
4197 IRTemp op2 = newTemp(Ity_I64);
4198 IRTemp icc = newTemp(Ity_I32);
4199 IRTemp cond = newTemp(Ity_I32);
4200
4201 if (m3 == 0) {
4202 } else {
4203 if (m3 == 14) {
4204 always_goto(mkexpr(op4addr));
4205 } else {
4206 assign(op1, get_gpr_dw0(r1));
4207 assign(op2, get_gpr_dw0(r2));
4208 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4209 op2));
4210 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4211 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4212 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4213 mkU32(0)), mkexpr(op4addr));
4214 }
4215 }
4216
4217 return "clgrb";
4218}
4219
4220static HChar *
4221s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4222{
4223 IRTemp op1 = newTemp(Ity_I32);
4224 IRTemp op2 = newTemp(Ity_I32);
4225 IRTemp icc = newTemp(Ity_I32);
4226 IRTemp cond = newTemp(Ity_I32);
4227
4228 if (m3 == 0) {
4229 } else {
4230 if (m3 == 14) {
4231 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4232 );
4233 } else {
4234 assign(op1, get_gpr_w1(r1));
4235 assign(op2, get_gpr_w1(r2));
4236 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4237 op2));
4238 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4239 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4240 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4241 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4242
4243 }
4244 }
4245
4246 return "clrj";
4247}
4248
4249static HChar *
4250s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4251{
4252 IRTemp op1 = newTemp(Ity_I64);
4253 IRTemp op2 = newTemp(Ity_I64);
4254 IRTemp icc = newTemp(Ity_I32);
4255 IRTemp cond = newTemp(Ity_I32);
4256
4257 if (m3 == 0) {
4258 } else {
4259 if (m3 == 14) {
4260 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4261 );
4262 } else {
4263 assign(op1, get_gpr_dw0(r1));
4264 assign(op2, get_gpr_dw0(r2));
4265 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4266 op2));
4267 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4268 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4269 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4270 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4271
4272 }
4273 }
4274
4275 return "clgrj";
4276}
4277
4278static HChar *
4279s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4280{
4281 IRTemp op1 = newTemp(Ity_I32);
4282 UInt op2;
4283 IRTemp icc = newTemp(Ity_I32);
4284 IRTemp cond = newTemp(Ity_I32);
4285
4286 if (m3 == 0) {
4287 } else {
4288 if (m3 == 14) {
4289 always_goto(mkexpr(op4addr));
4290 } else {
4291 assign(op1, get_gpr_w1(r1));
4292 op2 = (UInt)i2;
4293 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4294 mktemp(Ity_I32, mkU32(op2))));
4295 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4296 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4297 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4298 mkU32(0)), mkexpr(op4addr));
4299 }
4300 }
4301
4302 return "clib";
4303}
4304
4305static HChar *
4306s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4307{
4308 IRTemp op1 = newTemp(Ity_I64);
4309 ULong op2;
4310 IRTemp icc = newTemp(Ity_I32);
4311 IRTemp cond = newTemp(Ity_I32);
4312
4313 if (m3 == 0) {
4314 } else {
4315 if (m3 == 14) {
4316 always_goto(mkexpr(op4addr));
4317 } else {
4318 assign(op1, get_gpr_dw0(r1));
4319 op2 = (ULong)i2;
4320 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4321 mktemp(Ity_I64, mkU64(op2))));
4322 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4323 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4324 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4325 mkU32(0)), mkexpr(op4addr));
4326 }
4327 }
4328
4329 return "clgib";
4330}
4331
4332static HChar *
4333s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4334{
4335 IRTemp op1 = newTemp(Ity_I32);
4336 UInt op2;
4337 IRTemp icc = newTemp(Ity_I32);
4338 IRTemp cond = newTemp(Ity_I32);
4339
4340 if (m3 == 0) {
4341 } else {
4342 if (m3 == 14) {
4343 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4344 );
4345 } else {
4346 assign(op1, get_gpr_w1(r1));
4347 op2 = (UInt)i2;
4348 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4349 mktemp(Ity_I32, mkU32(op2))));
4350 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4351 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4352 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4353 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4354
4355 }
4356 }
4357
4358 return "clij";
4359}
4360
4361static HChar *
4362s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4363{
4364 IRTemp op1 = newTemp(Ity_I64);
4365 ULong op2;
4366 IRTemp icc = newTemp(Ity_I32);
4367 IRTemp cond = newTemp(Ity_I32);
4368
4369 if (m3 == 0) {
4370 } else {
4371 if (m3 == 14) {
4372 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4373 );
4374 } else {
4375 assign(op1, get_gpr_dw0(r1));
4376 op2 = (ULong)i2;
4377 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4378 mktemp(Ity_I64, mkU64(op2))));
4379 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4380 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4381 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4382 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4383
4384 }
4385 }
4386
4387 return "clgij";
4388}
4389
4390static HChar *
4391s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4392{
4393 IRTemp op1 = newTemp(Ity_I32);
4394 IRTemp op2 = newTemp(Ity_I32);
4395 IRTemp b0 = newTemp(Ity_I32);
4396 IRTemp b1 = newTemp(Ity_I32);
4397 IRTemp b2 = newTemp(Ity_I32);
4398 IRTemp b3 = newTemp(Ity_I32);
4399 IRTemp c0 = newTemp(Ity_I32);
4400 IRTemp c1 = newTemp(Ity_I32);
4401 IRTemp c2 = newTemp(Ity_I32);
4402 IRTemp c3 = newTemp(Ity_I32);
4403 UChar n;
4404
4405 n = 0;
4406 if ((r3 & 8) != 0) {
4407 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4408 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4409 n = n + 1;
4410 } else {
4411 assign(b0, mkU32(0));
4412 assign(c0, mkU32(0));
4413 }
4414 if ((r3 & 4) != 0) {
4415 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4416 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4417 mkU64(n)))));
4418 n = n + 1;
4419 } else {
4420 assign(b1, mkU32(0));
4421 assign(c1, mkU32(0));
4422 }
4423 if ((r3 & 2) != 0) {
4424 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4425 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4426 mkU64(n)))));
4427 n = n + 1;
4428 } else {
4429 assign(b2, mkU32(0));
4430 assign(c2, mkU32(0));
4431 }
4432 if ((r3 & 1) != 0) {
4433 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4434 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4435 mkU64(n)))));
4436 n = n + 1;
4437 } else {
4438 assign(b3, mkU32(0));
4439 assign(c3, mkU32(0));
4440 }
4441 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4442 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4443 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4444 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4445 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4446 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4447 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4448
4449 return "clm";
4450}
4451
4452static HChar *
4453s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4454{
4455 IRTemp op1 = newTemp(Ity_I32);
4456 IRTemp op2 = newTemp(Ity_I32);
4457 IRTemp b0 = newTemp(Ity_I32);
4458 IRTemp b1 = newTemp(Ity_I32);
4459 IRTemp b2 = newTemp(Ity_I32);
4460 IRTemp b3 = newTemp(Ity_I32);
4461 IRTemp c0 = newTemp(Ity_I32);
4462 IRTemp c1 = newTemp(Ity_I32);
4463 IRTemp c2 = newTemp(Ity_I32);
4464 IRTemp c3 = newTemp(Ity_I32);
4465 UChar n;
4466
4467 n = 0;
4468 if ((r3 & 8) != 0) {
4469 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4470 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4471 n = n + 1;
4472 } else {
4473 assign(b0, mkU32(0));
4474 assign(c0, mkU32(0));
4475 }
4476 if ((r3 & 4) != 0) {
4477 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4478 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4479 mkU64(n)))));
4480 n = n + 1;
4481 } else {
4482 assign(b1, mkU32(0));
4483 assign(c1, mkU32(0));
4484 }
4485 if ((r3 & 2) != 0) {
4486 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4487 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4488 mkU64(n)))));
4489 n = n + 1;
4490 } else {
4491 assign(b2, mkU32(0));
4492 assign(c2, mkU32(0));
4493 }
4494 if ((r3 & 1) != 0) {
4495 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4496 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4497 mkU64(n)))));
4498 n = n + 1;
4499 } else {
4500 assign(b3, mkU32(0));
4501 assign(c3, mkU32(0));
4502 }
4503 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4504 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4505 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4506 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4507 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4508 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4509 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4510
4511 return "clmy";
4512}
4513
4514static HChar *
4515s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4516{
4517 IRTemp op1 = newTemp(Ity_I32);
4518 IRTemp op2 = newTemp(Ity_I32);
4519 IRTemp b0 = newTemp(Ity_I32);
4520 IRTemp b1 = newTemp(Ity_I32);
4521 IRTemp b2 = newTemp(Ity_I32);
4522 IRTemp b3 = newTemp(Ity_I32);
4523 IRTemp c0 = newTemp(Ity_I32);
4524 IRTemp c1 = newTemp(Ity_I32);
4525 IRTemp c2 = newTemp(Ity_I32);
4526 IRTemp c3 = newTemp(Ity_I32);
4527 UChar n;
4528
4529 n = 0;
4530 if ((r3 & 8) != 0) {
4531 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4532 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4533 n = n + 1;
4534 } else {
4535 assign(b0, mkU32(0));
4536 assign(c0, mkU32(0));
4537 }
4538 if ((r3 & 4) != 0) {
4539 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4540 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4541 mkU64(n)))));
4542 n = n + 1;
4543 } else {
4544 assign(b1, mkU32(0));
4545 assign(c1, mkU32(0));
4546 }
4547 if ((r3 & 2) != 0) {
4548 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4549 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4550 mkU64(n)))));
4551 n = n + 1;
4552 } else {
4553 assign(b2, mkU32(0));
4554 assign(c2, mkU32(0));
4555 }
4556 if ((r3 & 1) != 0) {
4557 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4558 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4559 mkU64(n)))));
4560 n = n + 1;
4561 } else {
4562 assign(b3, mkU32(0));
4563 assign(c3, mkU32(0));
4564 }
4565 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4566 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4567 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4568 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4569 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4570 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4571 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4572
4573 return "clmh";
4574}
4575
4576static HChar *
4577s390_irgen_CLHHR(UChar r1, UChar r2)
4578{
4579 IRTemp op1 = newTemp(Ity_I32);
4580 IRTemp op2 = newTemp(Ity_I32);
4581
4582 assign(op1, get_gpr_w0(r1));
4583 assign(op2, get_gpr_w0(r2));
4584 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4585
4586 return "clhhr";
4587}
4588
4589static HChar *
4590s390_irgen_CLHLR(UChar r1, UChar r2)
4591{
4592 IRTemp op1 = newTemp(Ity_I32);
4593 IRTemp op2 = newTemp(Ity_I32);
4594
4595 assign(op1, get_gpr_w0(r1));
4596 assign(op2, get_gpr_w1(r2));
4597 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4598
4599 return "clhlr";
4600}
4601
4602static HChar *
4603s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4604{
4605 IRTemp op1 = newTemp(Ity_I32);
4606 IRTemp op2 = newTemp(Ity_I32);
4607
4608 assign(op1, get_gpr_w0(r1));
4609 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4610 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4611
4612 return "clhf";
4613}
4614
4615static HChar *
4616s390_irgen_CLIH(UChar r1, UInt i2)
4617{
4618 IRTemp op1 = newTemp(Ity_I32);
4619 UInt op2;
4620
4621 assign(op1, get_gpr_w0(r1));
4622 op2 = i2;
4623 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4624 mkU32(op2)));
4625
4626 return "clih";
4627}
4628
4629static HChar *
4630s390_irgen_CPYA(UChar r1, UChar r2)
4631{
4632 put_ar_w0(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004633 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004634 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4635
4636 return "cpya";
4637}
4638
4639static HChar *
4640s390_irgen_XR(UChar r1, UChar r2)
4641{
4642 IRTemp op1 = newTemp(Ity_I32);
4643 IRTemp op2 = newTemp(Ity_I32);
4644 IRTemp result = newTemp(Ity_I32);
4645
4646 if (r1 == r2) {
4647 assign(result, mkU32(0));
4648 } else {
4649 assign(op1, get_gpr_w1(r1));
4650 assign(op2, get_gpr_w1(r2));
4651 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4652 }
4653 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4654 put_gpr_w1(r1, mkexpr(result));
4655
4656 return "xr";
4657}
4658
4659static HChar *
4660s390_irgen_XGR(UChar r1, UChar r2)
4661{
4662 IRTemp op1 = newTemp(Ity_I64);
4663 IRTemp op2 = newTemp(Ity_I64);
4664 IRTemp result = newTemp(Ity_I64);
4665
4666 if (r1 == r2) {
4667 assign(result, mkU64(0));
4668 } else {
4669 assign(op1, get_gpr_dw0(r1));
4670 assign(op2, get_gpr_dw0(r2));
4671 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4672 }
4673 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4674 put_gpr_dw0(r1, mkexpr(result));
4675
4676 return "xgr";
4677}
4678
4679static HChar *
4680s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4681{
4682 IRTemp op2 = newTemp(Ity_I32);
4683 IRTemp op3 = newTemp(Ity_I32);
4684 IRTemp result = newTemp(Ity_I32);
4685
4686 assign(op2, get_gpr_w1(r2));
4687 assign(op3, get_gpr_w1(r3));
4688 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4689 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4690 put_gpr_w1(r1, mkexpr(result));
4691
4692 return "xrk";
4693}
4694
4695static HChar *
4696s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4697{
4698 IRTemp op2 = newTemp(Ity_I64);
4699 IRTemp op3 = newTemp(Ity_I64);
4700 IRTemp result = newTemp(Ity_I64);
4701
4702 assign(op2, get_gpr_dw0(r2));
4703 assign(op3, get_gpr_dw0(r3));
4704 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4705 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4706 put_gpr_dw0(r1, mkexpr(result));
4707
4708 return "xgrk";
4709}
4710
4711static HChar *
4712s390_irgen_X(UChar r1, IRTemp op2addr)
4713{
4714 IRTemp op1 = newTemp(Ity_I32);
4715 IRTemp op2 = newTemp(Ity_I32);
4716 IRTemp result = newTemp(Ity_I32);
4717
4718 assign(op1, get_gpr_w1(r1));
4719 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4720 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4721 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4722 put_gpr_w1(r1, mkexpr(result));
4723
4724 return "x";
4725}
4726
4727static HChar *
4728s390_irgen_XY(UChar r1, IRTemp op2addr)
4729{
4730 IRTemp op1 = newTemp(Ity_I32);
4731 IRTemp op2 = newTemp(Ity_I32);
4732 IRTemp result = newTemp(Ity_I32);
4733
4734 assign(op1, get_gpr_w1(r1));
4735 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4736 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4737 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4738 put_gpr_w1(r1, mkexpr(result));
4739
4740 return "xy";
4741}
4742
4743static HChar *
4744s390_irgen_XG(UChar r1, IRTemp op2addr)
4745{
4746 IRTemp op1 = newTemp(Ity_I64);
4747 IRTemp op2 = newTemp(Ity_I64);
4748 IRTemp result = newTemp(Ity_I64);
4749
4750 assign(op1, get_gpr_dw0(r1));
4751 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4752 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4753 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4754 put_gpr_dw0(r1, mkexpr(result));
4755
4756 return "xg";
4757}
4758
4759static HChar *
4760s390_irgen_XI(UChar i2, IRTemp op1addr)
4761{
4762 IRTemp op1 = newTemp(Ity_I8);
4763 UChar op2;
4764 IRTemp result = newTemp(Ity_I8);
4765
4766 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4767 op2 = i2;
4768 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4769 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4770 store(mkexpr(op1addr), mkexpr(result));
4771
4772 return "xi";
4773}
4774
4775static HChar *
4776s390_irgen_XIY(UChar i2, IRTemp op1addr)
4777{
4778 IRTemp op1 = newTemp(Ity_I8);
4779 UChar op2;
4780 IRTemp result = newTemp(Ity_I8);
4781
4782 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4783 op2 = i2;
4784 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4785 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4786 store(mkexpr(op1addr), mkexpr(result));
4787
4788 return "xiy";
4789}
4790
4791static HChar *
4792s390_irgen_XIHF(UChar r1, UInt i2)
4793{
4794 IRTemp op1 = newTemp(Ity_I32);
4795 UInt op2;
4796 IRTemp result = newTemp(Ity_I32);
4797
4798 assign(op1, get_gpr_w0(r1));
4799 op2 = i2;
4800 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4801 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4802 put_gpr_w0(r1, mkexpr(result));
4803
4804 return "xihf";
4805}
4806
4807static HChar *
4808s390_irgen_XILF(UChar r1, UInt i2)
4809{
4810 IRTemp op1 = newTemp(Ity_I32);
4811 UInt op2;
4812 IRTemp result = newTemp(Ity_I32);
4813
4814 assign(op1, get_gpr_w1(r1));
4815 op2 = i2;
4816 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4817 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4818 put_gpr_w1(r1, mkexpr(result));
4819
4820 return "xilf";
4821}
4822
4823static HChar *
4824s390_irgen_EAR(UChar r1, UChar r2)
4825{
4826 put_gpr_w1(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004827 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004828 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4829
4830 return "ear";
4831}
4832
4833static HChar *
4834s390_irgen_IC(UChar r1, IRTemp op2addr)
4835{
4836 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4837
4838 return "ic";
4839}
4840
4841static HChar *
4842s390_irgen_ICY(UChar r1, IRTemp op2addr)
4843{
4844 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4845
4846 return "icy";
4847}
4848
4849static HChar *
4850s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4851{
4852 UChar n;
4853 IRTemp result = newTemp(Ity_I32);
4854 UInt mask;
4855
4856 n = 0;
4857 mask = (UInt)r3;
4858 if ((mask & 8) != 0) {
4859 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4860 n = n + 1;
4861 }
4862 if ((mask & 4) != 0) {
4863 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4864
4865 n = n + 1;
4866 }
4867 if ((mask & 2) != 0) {
4868 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4869
4870 n = n + 1;
4871 }
4872 if ((mask & 1) != 0) {
4873 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4874
4875 n = n + 1;
4876 }
4877 assign(result, get_gpr_w1(r1));
4878 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4879 mkU32(mask)));
4880
4881 return "icm";
4882}
4883
4884static HChar *
4885s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4886{
4887 UChar n;
4888 IRTemp result = newTemp(Ity_I32);
4889 UInt mask;
4890
4891 n = 0;
4892 mask = (UInt)r3;
4893 if ((mask & 8) != 0) {
4894 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4895 n = n + 1;
4896 }
4897 if ((mask & 4) != 0) {
4898 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4899
4900 n = n + 1;
4901 }
4902 if ((mask & 2) != 0) {
4903 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4904
4905 n = n + 1;
4906 }
4907 if ((mask & 1) != 0) {
4908 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4909
4910 n = n + 1;
4911 }
4912 assign(result, get_gpr_w1(r1));
4913 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4914 mkU32(mask)));
4915
4916 return "icmy";
4917}
4918
4919static HChar *
4920s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
4921{
4922 UChar n;
4923 IRTemp result = newTemp(Ity_I32);
4924 UInt mask;
4925
4926 n = 0;
4927 mask = (UInt)r3;
4928 if ((mask & 8) != 0) {
4929 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
4930 n = n + 1;
4931 }
4932 if ((mask & 4) != 0) {
4933 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4934
4935 n = n + 1;
4936 }
4937 if ((mask & 2) != 0) {
4938 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4939
4940 n = n + 1;
4941 }
4942 if ((mask & 1) != 0) {
4943 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4944
4945 n = n + 1;
4946 }
4947 assign(result, get_gpr_w0(r1));
4948 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4949 mkU32(mask)));
4950
4951 return "icmh";
4952}
4953
4954static HChar *
4955s390_irgen_IIHF(UChar r1, UInt i2)
4956{
4957 put_gpr_w0(r1, mkU32(i2));
4958
4959 return "iihf";
4960}
4961
4962static HChar *
4963s390_irgen_IIHH(UChar r1, UShort i2)
4964{
4965 put_gpr_hw0(r1, mkU16(i2));
4966
4967 return "iihh";
4968}
4969
4970static HChar *
4971s390_irgen_IIHL(UChar r1, UShort i2)
4972{
4973 put_gpr_hw1(r1, mkU16(i2));
4974
4975 return "iihl";
4976}
4977
4978static HChar *
4979s390_irgen_IILF(UChar r1, UInt i2)
4980{
4981 put_gpr_w1(r1, mkU32(i2));
4982
4983 return "iilf";
4984}
4985
4986static HChar *
4987s390_irgen_IILH(UChar r1, UShort i2)
4988{
4989 put_gpr_hw2(r1, mkU16(i2));
4990
4991 return "iilh";
4992}
4993
4994static HChar *
4995s390_irgen_IILL(UChar r1, UShort i2)
4996{
4997 put_gpr_hw3(r1, mkU16(i2));
4998
4999 return "iill";
5000}
5001
5002static HChar *
5003s390_irgen_LR(UChar r1, UChar r2)
5004{
5005 put_gpr_w1(r1, get_gpr_w1(r2));
5006
5007 return "lr";
5008}
5009
5010static HChar *
5011s390_irgen_LGR(UChar r1, UChar r2)
5012{
5013 put_gpr_dw0(r1, get_gpr_dw0(r2));
5014
5015 return "lgr";
5016}
5017
5018static HChar *
5019s390_irgen_LGFR(UChar r1, UChar r2)
5020{
5021 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5022
5023 return "lgfr";
5024}
5025
5026static HChar *
5027s390_irgen_L(UChar r1, IRTemp op2addr)
5028{
5029 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5030
5031 return "l";
5032}
5033
5034static HChar *
5035s390_irgen_LY(UChar r1, IRTemp op2addr)
5036{
5037 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5038
5039 return "ly";
5040}
5041
5042static HChar *
5043s390_irgen_LG(UChar r1, IRTemp op2addr)
5044{
5045 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5046
5047 return "lg";
5048}
5049
5050static HChar *
5051s390_irgen_LGF(UChar r1, IRTemp op2addr)
5052{
5053 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5054
5055 return "lgf";
5056}
5057
5058static HChar *
5059s390_irgen_LGFI(UChar r1, UInt i2)
5060{
5061 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5062
5063 return "lgfi";
5064}
5065
5066static HChar *
5067s390_irgen_LRL(UChar r1, UInt i2)
5068{
5069 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5070 i2 << 1))));
5071
5072 return "lrl";
5073}
5074
5075static HChar *
5076s390_irgen_LGRL(UChar r1, UInt i2)
5077{
5078 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5079 i2 << 1))));
5080
5081 return "lgrl";
5082}
5083
5084static HChar *
5085s390_irgen_LGFRL(UChar r1, UInt i2)
5086{
5087 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5088 ((ULong)(Long)(Int)i2 << 1)))));
5089
5090 return "lgfrl";
5091}
5092
5093static HChar *
5094s390_irgen_LA(UChar r1, IRTemp op2addr)
5095{
5096 put_gpr_dw0(r1, mkexpr(op2addr));
5097
5098 return "la";
5099}
5100
5101static HChar *
5102s390_irgen_LAY(UChar r1, IRTemp op2addr)
5103{
5104 put_gpr_dw0(r1, mkexpr(op2addr));
5105
5106 return "lay";
5107}
5108
5109static HChar *
5110s390_irgen_LAE(UChar r1, IRTemp op2addr)
5111{
5112 put_gpr_dw0(r1, mkexpr(op2addr));
5113
5114 return "lae";
5115}
5116
5117static HChar *
5118s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5119{
5120 put_gpr_dw0(r1, mkexpr(op2addr));
5121
5122 return "laey";
5123}
5124
5125static HChar *
5126s390_irgen_LARL(UChar r1, UInt i2)
5127{
5128 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5129
5130 return "larl";
5131}
5132
5133static HChar *
5134s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5135{
5136 IRTemp op2 = newTemp(Ity_I32);
5137 IRTemp op3 = newTemp(Ity_I32);
5138 IRTemp result = newTemp(Ity_I32);
5139
5140 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5141 assign(op3, get_gpr_w1(r3));
5142 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5143 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5144 store(mkexpr(op2addr), mkexpr(result));
5145 put_gpr_w1(r1, mkexpr(op2));
5146
5147 return "laa";
5148}
5149
5150static HChar *
5151s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5152{
5153 IRTemp op2 = newTemp(Ity_I64);
5154 IRTemp op3 = newTemp(Ity_I64);
5155 IRTemp result = newTemp(Ity_I64);
5156
5157 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5158 assign(op3, get_gpr_dw0(r3));
5159 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5160 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5161 store(mkexpr(op2addr), mkexpr(result));
5162 put_gpr_dw0(r1, mkexpr(op2));
5163
5164 return "laag";
5165}
5166
5167static HChar *
5168s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5169{
5170 IRTemp op2 = newTemp(Ity_I32);
5171 IRTemp op3 = newTemp(Ity_I32);
5172 IRTemp result = newTemp(Ity_I32);
5173
5174 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5175 assign(op3, get_gpr_w1(r3));
5176 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5177 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5178 store(mkexpr(op2addr), mkexpr(result));
5179 put_gpr_w1(r1, mkexpr(op2));
5180
5181 return "laal";
5182}
5183
5184static HChar *
5185s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5186{
5187 IRTemp op2 = newTemp(Ity_I64);
5188 IRTemp op3 = newTemp(Ity_I64);
5189 IRTemp result = newTemp(Ity_I64);
5190
5191 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5192 assign(op3, get_gpr_dw0(r3));
5193 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5194 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5195 store(mkexpr(op2addr), mkexpr(result));
5196 put_gpr_dw0(r1, mkexpr(op2));
5197
5198 return "laalg";
5199}
5200
5201static HChar *
5202s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5203{
5204 IRTemp op2 = newTemp(Ity_I32);
5205 IRTemp op3 = newTemp(Ity_I32);
5206 IRTemp result = newTemp(Ity_I32);
5207
5208 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5209 assign(op3, get_gpr_w1(r3));
5210 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5211 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5212 store(mkexpr(op2addr), mkexpr(result));
5213 put_gpr_w1(r1, mkexpr(op2));
5214
5215 return "lan";
5216}
5217
5218static HChar *
5219s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5220{
5221 IRTemp op2 = newTemp(Ity_I64);
5222 IRTemp op3 = newTemp(Ity_I64);
5223 IRTemp result = newTemp(Ity_I64);
5224
5225 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5226 assign(op3, get_gpr_dw0(r3));
5227 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5228 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5229 store(mkexpr(op2addr), mkexpr(result));
5230 put_gpr_dw0(r1, mkexpr(op2));
5231
5232 return "lang";
5233}
5234
5235static HChar *
5236s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5237{
5238 IRTemp op2 = newTemp(Ity_I32);
5239 IRTemp op3 = newTemp(Ity_I32);
5240 IRTemp result = newTemp(Ity_I32);
5241
5242 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5243 assign(op3, get_gpr_w1(r3));
5244 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5245 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5246 store(mkexpr(op2addr), mkexpr(result));
5247 put_gpr_w1(r1, mkexpr(op2));
5248
5249 return "lax";
5250}
5251
5252static HChar *
5253s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5254{
5255 IRTemp op2 = newTemp(Ity_I64);
5256 IRTemp op3 = newTemp(Ity_I64);
5257 IRTemp result = newTemp(Ity_I64);
5258
5259 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5260 assign(op3, get_gpr_dw0(r3));
5261 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5262 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5263 store(mkexpr(op2addr), mkexpr(result));
5264 put_gpr_dw0(r1, mkexpr(op2));
5265
5266 return "laxg";
5267}
5268
5269static HChar *
5270s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5271{
5272 IRTemp op2 = newTemp(Ity_I32);
5273 IRTemp op3 = newTemp(Ity_I32);
5274 IRTemp result = newTemp(Ity_I32);
5275
5276 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5277 assign(op3, get_gpr_w1(r3));
5278 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5279 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5280 store(mkexpr(op2addr), mkexpr(result));
5281 put_gpr_w1(r1, mkexpr(op2));
5282
5283 return "lao";
5284}
5285
5286static HChar *
5287s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5288{
5289 IRTemp op2 = newTemp(Ity_I64);
5290 IRTemp op3 = newTemp(Ity_I64);
5291 IRTemp result = newTemp(Ity_I64);
5292
5293 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5294 assign(op3, get_gpr_dw0(r3));
5295 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5296 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5297 store(mkexpr(op2addr), mkexpr(result));
5298 put_gpr_dw0(r1, mkexpr(op2));
5299
5300 return "laog";
5301}
5302
5303static HChar *
5304s390_irgen_LTR(UChar r1, UChar r2)
5305{
5306 IRTemp op2 = newTemp(Ity_I32);
5307
5308 assign(op2, get_gpr_w1(r2));
5309 put_gpr_w1(r1, mkexpr(op2));
5310 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5311
5312 return "ltr";
5313}
5314
5315static HChar *
5316s390_irgen_LTGR(UChar r1, UChar r2)
5317{
5318 IRTemp op2 = newTemp(Ity_I64);
5319
5320 assign(op2, get_gpr_dw0(r2));
5321 put_gpr_dw0(r1, mkexpr(op2));
5322 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5323
5324 return "ltgr";
5325}
5326
5327static HChar *
5328s390_irgen_LTGFR(UChar r1, UChar r2)
5329{
5330 IRTemp op2 = newTemp(Ity_I64);
5331
5332 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5333 put_gpr_dw0(r1, mkexpr(op2));
5334 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5335
5336 return "ltgfr";
5337}
5338
5339static HChar *
5340s390_irgen_LT(UChar r1, IRTemp op2addr)
5341{
5342 IRTemp op2 = newTemp(Ity_I32);
5343
5344 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5345 put_gpr_w1(r1, mkexpr(op2));
5346 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5347
5348 return "lt";
5349}
5350
5351static HChar *
5352s390_irgen_LTG(UChar r1, IRTemp op2addr)
5353{
5354 IRTemp op2 = newTemp(Ity_I64);
5355
5356 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5357 put_gpr_dw0(r1, mkexpr(op2));
5358 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5359
5360 return "ltg";
5361}
5362
5363static HChar *
5364s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5365{
5366 IRTemp op2 = newTemp(Ity_I64);
5367
5368 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5369 put_gpr_dw0(r1, mkexpr(op2));
5370 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5371
5372 return "ltgf";
5373}
5374
5375static HChar *
5376s390_irgen_LBR(UChar r1, UChar r2)
5377{
5378 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5379
5380 return "lbr";
5381}
5382
5383static HChar *
5384s390_irgen_LGBR(UChar r1, UChar r2)
5385{
5386 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5387
5388 return "lgbr";
5389}
5390
5391static HChar *
5392s390_irgen_LB(UChar r1, IRTemp op2addr)
5393{
5394 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5395
5396 return "lb";
5397}
5398
5399static HChar *
5400s390_irgen_LGB(UChar r1, IRTemp op2addr)
5401{
5402 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5403
5404 return "lgb";
5405}
5406
5407static HChar *
5408s390_irgen_LBH(UChar r1, IRTemp op2addr)
5409{
5410 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5411
5412 return "lbh";
5413}
5414
5415static HChar *
5416s390_irgen_LCR(UChar r1, UChar r2)
5417{
5418 Int op1;
5419 IRTemp op2 = newTemp(Ity_I32);
5420 IRTemp result = newTemp(Ity_I32);
5421
5422 op1 = 0;
5423 assign(op2, get_gpr_w1(r2));
5424 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5425 put_gpr_w1(r1, mkexpr(result));
5426 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5427 op1)), op2);
5428
5429 return "lcr";
5430}
5431
5432static HChar *
5433s390_irgen_LCGR(UChar r1, UChar r2)
5434{
5435 Long op1;
5436 IRTemp op2 = newTemp(Ity_I64);
5437 IRTemp result = newTemp(Ity_I64);
5438
5439 op1 = 0ULL;
5440 assign(op2, get_gpr_dw0(r2));
5441 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5442 put_gpr_dw0(r1, mkexpr(result));
5443 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5444 op1)), op2);
5445
5446 return "lcgr";
5447}
5448
5449static HChar *
5450s390_irgen_LCGFR(UChar r1, UChar r2)
5451{
5452 Long op1;
5453 IRTemp op2 = newTemp(Ity_I64);
5454 IRTemp result = newTemp(Ity_I64);
5455
5456 op1 = 0ULL;
5457 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5458 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5459 put_gpr_dw0(r1, mkexpr(result));
5460 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5461 op1)), op2);
5462
5463 return "lcgfr";
5464}
5465
5466static HChar *
5467s390_irgen_LHR(UChar r1, UChar r2)
5468{
5469 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5470
5471 return "lhr";
5472}
5473
5474static HChar *
5475s390_irgen_LGHR(UChar r1, UChar r2)
5476{
5477 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5478
5479 return "lghr";
5480}
5481
5482static HChar *
5483s390_irgen_LH(UChar r1, IRTemp op2addr)
5484{
5485 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5486
5487 return "lh";
5488}
5489
5490static HChar *
5491s390_irgen_LHY(UChar r1, IRTemp op2addr)
5492{
5493 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5494
5495 return "lhy";
5496}
5497
5498static HChar *
5499s390_irgen_LGH(UChar r1, IRTemp op2addr)
5500{
5501 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5502
5503 return "lgh";
5504}
5505
5506static HChar *
5507s390_irgen_LHI(UChar r1, UShort i2)
5508{
5509 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5510
5511 return "lhi";
5512}
5513
5514static HChar *
5515s390_irgen_LGHI(UChar r1, UShort i2)
5516{
5517 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5518
5519 return "lghi";
5520}
5521
5522static HChar *
5523s390_irgen_LHRL(UChar r1, UInt i2)
5524{
5525 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5526 ((ULong)(Long)(Int)i2 << 1)))));
5527
5528 return "lhrl";
5529}
5530
5531static HChar *
5532s390_irgen_LGHRL(UChar r1, UInt i2)
5533{
5534 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5535 ((ULong)(Long)(Int)i2 << 1)))));
5536
5537 return "lghrl";
5538}
5539
5540static HChar *
5541s390_irgen_LHH(UChar r1, IRTemp op2addr)
5542{
5543 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5544
5545 return "lhh";
5546}
5547
5548static HChar *
5549s390_irgen_LFH(UChar r1, IRTemp op2addr)
5550{
5551 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5552
5553 return "lfh";
5554}
5555
5556static HChar *
5557s390_irgen_LLGFR(UChar r1, UChar r2)
5558{
5559 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5560
5561 return "llgfr";
5562}
5563
5564static HChar *
5565s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5566{
5567 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5568
5569 return "llgf";
5570}
5571
5572static HChar *
5573s390_irgen_LLGFRL(UChar r1, UInt i2)
5574{
5575 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5576 ((ULong)(Long)(Int)i2 << 1)))));
5577
5578 return "llgfrl";
5579}
5580
5581static HChar *
5582s390_irgen_LLCR(UChar r1, UChar r2)
5583{
5584 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5585
5586 return "llcr";
5587}
5588
5589static HChar *
5590s390_irgen_LLGCR(UChar r1, UChar r2)
5591{
5592 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5593
5594 return "llgcr";
5595}
5596
5597static HChar *
5598s390_irgen_LLC(UChar r1, IRTemp op2addr)
5599{
5600 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5601
5602 return "llc";
5603}
5604
5605static HChar *
5606s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5607{
5608 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5609
5610 return "llgc";
5611}
5612
5613static HChar *
5614s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5615{
5616 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5617
5618 return "llch";
5619}
5620
5621static HChar *
5622s390_irgen_LLHR(UChar r1, UChar r2)
5623{
5624 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5625
5626 return "llhr";
5627}
5628
5629static HChar *
5630s390_irgen_LLGHR(UChar r1, UChar r2)
5631{
5632 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5633
5634 return "llghr";
5635}
5636
5637static HChar *
5638s390_irgen_LLH(UChar r1, IRTemp op2addr)
5639{
5640 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5641
5642 return "llh";
5643}
5644
5645static HChar *
5646s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5647{
5648 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5649
5650 return "llgh";
5651}
5652
5653static HChar *
5654s390_irgen_LLHRL(UChar r1, UInt i2)
5655{
5656 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5657 ((ULong)(Long)(Int)i2 << 1)))));
5658
5659 return "llhrl";
5660}
5661
5662static HChar *
5663s390_irgen_LLGHRL(UChar r1, UInt i2)
5664{
5665 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5666 ((ULong)(Long)(Int)i2 << 1)))));
5667
5668 return "llghrl";
5669}
5670
5671static HChar *
5672s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5673{
5674 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5675
5676 return "llhh";
5677}
5678
5679static HChar *
5680s390_irgen_LLIHF(UChar r1, UInt i2)
5681{
5682 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5683
5684 return "llihf";
5685}
5686
5687static HChar *
5688s390_irgen_LLIHH(UChar r1, UShort i2)
5689{
5690 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5691
5692 return "llihh";
5693}
5694
5695static HChar *
5696s390_irgen_LLIHL(UChar r1, UShort i2)
5697{
5698 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5699
5700 return "llihl";
5701}
5702
5703static HChar *
5704s390_irgen_LLILF(UChar r1, UInt i2)
5705{
5706 put_gpr_dw0(r1, mkU64(i2));
5707
5708 return "llilf";
5709}
5710
5711static HChar *
5712s390_irgen_LLILH(UChar r1, UShort i2)
5713{
5714 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5715
5716 return "llilh";
5717}
5718
5719static HChar *
5720s390_irgen_LLILL(UChar r1, UShort i2)
5721{
5722 put_gpr_dw0(r1, mkU64(i2));
5723
5724 return "llill";
5725}
5726
5727static HChar *
5728s390_irgen_LLGTR(UChar r1, UChar r2)
5729{
5730 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5731 mkU32(2147483647))));
5732
5733 return "llgtr";
5734}
5735
5736static HChar *
5737s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5738{
5739 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5740 mkexpr(op2addr)), mkU32(2147483647))));
5741
5742 return "llgt";
5743}
5744
5745static HChar *
5746s390_irgen_LNR(UChar r1, UChar r2)
5747{
5748 IRTemp op2 = newTemp(Ity_I32);
5749 IRTemp result = newTemp(Ity_I32);
5750
5751 assign(op2, get_gpr_w1(r2));
5752 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5753 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5754 put_gpr_w1(r1, mkexpr(result));
5755 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5756
5757 return "lnr";
5758}
5759
5760static HChar *
5761s390_irgen_LNGR(UChar r1, UChar r2)
5762{
5763 IRTemp op2 = newTemp(Ity_I64);
5764 IRTemp result = newTemp(Ity_I64);
5765
5766 assign(op2, get_gpr_dw0(r2));
5767 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5768 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5769 put_gpr_dw0(r1, mkexpr(result));
5770 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5771
5772 return "lngr";
5773}
5774
5775static HChar *
5776s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5777{
5778 IRTemp op2 = newTemp(Ity_I64);
5779 IRTemp result = newTemp(Ity_I64);
5780
5781 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5782 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5783 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5784 put_gpr_dw0(r1, mkexpr(result));
5785 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5786
5787 return "lngfr";
5788}
5789
5790static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005791s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5792{
5793 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5794 guest_IA_next_instr);
5795 put_gpr_w1(r1, get_gpr_w1(r2));
5796
5797 return "locr";
5798}
5799
5800static HChar *
5801s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5802{
5803 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5804 guest_IA_next_instr);
5805 put_gpr_dw0(r1, get_gpr_dw0(r2));
5806
5807 return "locgr";
5808}
5809
5810static HChar *
5811s390_irgen_LOC(UChar r1, IRTemp op2addr)
5812{
5813 /* condition is checked in format handler */
5814 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5815
5816 return "loc";
5817}
5818
5819static HChar *
5820s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5821{
5822 /* condition is checked in format handler */
5823 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5824
5825 return "locg";
5826}
5827
5828static HChar *
sewardj2019a972011-03-07 16:04:07 +00005829s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5830{
5831 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5832 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5833 ));
5834
5835 return "lpq";
5836}
5837
5838static HChar *
5839s390_irgen_LPR(UChar r1, UChar r2)
5840{
5841 IRTemp op2 = newTemp(Ity_I32);
5842 IRTemp result = newTemp(Ity_I32);
5843
5844 assign(op2, get_gpr_w1(r2));
5845 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5846 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5847 put_gpr_w1(r1, mkexpr(result));
5848 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5849
5850 return "lpr";
5851}
5852
5853static HChar *
5854s390_irgen_LPGR(UChar r1, UChar r2)
5855{
5856 IRTemp op2 = newTemp(Ity_I64);
5857 IRTemp result = newTemp(Ity_I64);
5858
5859 assign(op2, get_gpr_dw0(r2));
5860 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5861 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5862 put_gpr_dw0(r1, mkexpr(result));
5863 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5864
5865 return "lpgr";
5866}
5867
5868static HChar *
5869s390_irgen_LPGFR(UChar r1, UChar r2)
5870{
5871 IRTemp op2 = newTemp(Ity_I64);
5872 IRTemp result = newTemp(Ity_I64);
5873
5874 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5875 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5876 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5877 put_gpr_dw0(r1, mkexpr(result));
5878 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5879
5880 return "lpgfr";
5881}
5882
5883static HChar *
5884s390_irgen_LRVR(UChar r1, UChar r2)
5885{
5886 IRTemp b0 = newTemp(Ity_I8);
5887 IRTemp b1 = newTemp(Ity_I8);
5888 IRTemp b2 = newTemp(Ity_I8);
5889 IRTemp b3 = newTemp(Ity_I8);
5890
5891 assign(b3, get_gpr_b7(r2));
5892 assign(b2, get_gpr_b6(r2));
5893 assign(b1, get_gpr_b5(r2));
5894 assign(b0, get_gpr_b4(r2));
5895 put_gpr_b4(r1, mkexpr(b3));
5896 put_gpr_b5(r1, mkexpr(b2));
5897 put_gpr_b6(r1, mkexpr(b1));
5898 put_gpr_b7(r1, mkexpr(b0));
5899
5900 return "lrvr";
5901}
5902
5903static HChar *
5904s390_irgen_LRVGR(UChar r1, UChar r2)
5905{
5906 IRTemp b0 = newTemp(Ity_I8);
5907 IRTemp b1 = newTemp(Ity_I8);
5908 IRTemp b2 = newTemp(Ity_I8);
5909 IRTemp b3 = newTemp(Ity_I8);
5910 IRTemp b4 = newTemp(Ity_I8);
5911 IRTemp b5 = newTemp(Ity_I8);
5912 IRTemp b6 = newTemp(Ity_I8);
5913 IRTemp b7 = newTemp(Ity_I8);
5914
5915 assign(b7, get_gpr_b7(r2));
5916 assign(b6, get_gpr_b6(r2));
5917 assign(b5, get_gpr_b5(r2));
5918 assign(b4, get_gpr_b4(r2));
5919 assign(b3, get_gpr_b3(r2));
5920 assign(b2, get_gpr_b2(r2));
5921 assign(b1, get_gpr_b1(r2));
5922 assign(b0, get_gpr_b0(r2));
5923 put_gpr_b0(r1, mkexpr(b7));
5924 put_gpr_b1(r1, mkexpr(b6));
5925 put_gpr_b2(r1, mkexpr(b5));
5926 put_gpr_b3(r1, mkexpr(b4));
5927 put_gpr_b4(r1, mkexpr(b3));
5928 put_gpr_b5(r1, mkexpr(b2));
5929 put_gpr_b6(r1, mkexpr(b1));
5930 put_gpr_b7(r1, mkexpr(b0));
5931
5932 return "lrvgr";
5933}
5934
5935static HChar *
5936s390_irgen_LRVH(UChar r1, IRTemp op2addr)
5937{
5938 IRTemp op2 = newTemp(Ity_I16);
5939
5940 assign(op2, load(Ity_I16, mkexpr(op2addr)));
5941 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
5942 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
5943
5944 return "lrvh";
5945}
5946
5947static HChar *
5948s390_irgen_LRV(UChar r1, IRTemp op2addr)
5949{
5950 IRTemp op2 = newTemp(Ity_I32);
5951
5952 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5953 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
5954 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5955 mkU8(8)), mkU32(255))));
5956 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5957 mkU8(16)), mkU32(255))));
5958 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5959 mkU8(24)), mkU32(255))));
5960
5961 return "lrv";
5962}
5963
5964static HChar *
5965s390_irgen_LRVG(UChar r1, IRTemp op2addr)
5966{
5967 IRTemp op2 = newTemp(Ity_I64);
5968
5969 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5970 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
5971 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5972 mkU8(8)), mkU64(255))));
5973 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5974 mkU8(16)), mkU64(255))));
5975 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5976 mkU8(24)), mkU64(255))));
5977 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5978 mkU8(32)), mkU64(255))));
5979 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5980 mkU8(40)), mkU64(255))));
5981 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5982 mkU8(48)), mkU64(255))));
5983 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5984 mkU8(56)), mkU64(255))));
5985
5986 return "lrvg";
5987}
5988
5989static HChar *
5990s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
5991{
5992 store(mkexpr(op1addr), mkU16(i2));
5993
5994 return "mvhhi";
5995}
5996
5997static HChar *
5998s390_irgen_MVHI(UShort i2, IRTemp op1addr)
5999{
6000 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
6001
6002 return "mvhi";
6003}
6004
6005static HChar *
6006s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6007{
6008 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6009
6010 return "mvghi";
6011}
6012
6013static HChar *
6014s390_irgen_MVI(UChar i2, IRTemp op1addr)
6015{
6016 store(mkexpr(op1addr), mkU8(i2));
6017
6018 return "mvi";
6019}
6020
6021static HChar *
6022s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6023{
6024 store(mkexpr(op1addr), mkU8(i2));
6025
6026 return "mviy";
6027}
6028
6029static HChar *
6030s390_irgen_MR(UChar r1, UChar r2)
6031{
6032 IRTemp op1 = newTemp(Ity_I32);
6033 IRTemp op2 = newTemp(Ity_I32);
6034 IRTemp result = newTemp(Ity_I64);
6035
6036 assign(op1, get_gpr_w1(r1 + 1));
6037 assign(op2, get_gpr_w1(r2));
6038 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6039 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6040 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6041
6042 return "mr";
6043}
6044
6045static HChar *
6046s390_irgen_M(UChar r1, IRTemp op2addr)
6047{
6048 IRTemp op1 = newTemp(Ity_I32);
6049 IRTemp op2 = newTemp(Ity_I32);
6050 IRTemp result = newTemp(Ity_I64);
6051
6052 assign(op1, get_gpr_w1(r1 + 1));
6053 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6054 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6055 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6056 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6057
6058 return "m";
6059}
6060
6061static HChar *
6062s390_irgen_MFY(UChar r1, IRTemp op2addr)
6063{
6064 IRTemp op1 = newTemp(Ity_I32);
6065 IRTemp op2 = newTemp(Ity_I32);
6066 IRTemp result = newTemp(Ity_I64);
6067
6068 assign(op1, get_gpr_w1(r1 + 1));
6069 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6070 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6071 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6072 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6073
6074 return "mfy";
6075}
6076
6077static HChar *
6078s390_irgen_MH(UChar r1, IRTemp op2addr)
6079{
6080 IRTemp op1 = newTemp(Ity_I32);
6081 IRTemp op2 = newTemp(Ity_I16);
6082 IRTemp result = newTemp(Ity_I64);
6083
6084 assign(op1, get_gpr_w1(r1));
6085 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6086 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6087 ));
6088 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6089
6090 return "mh";
6091}
6092
6093static HChar *
6094s390_irgen_MHY(UChar r1, IRTemp op2addr)
6095{
6096 IRTemp op1 = newTemp(Ity_I32);
6097 IRTemp op2 = newTemp(Ity_I16);
6098 IRTemp result = newTemp(Ity_I64);
6099
6100 assign(op1, get_gpr_w1(r1));
6101 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6102 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6103 ));
6104 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6105
6106 return "mhy";
6107}
6108
6109static HChar *
6110s390_irgen_MHI(UChar r1, UShort i2)
6111{
6112 IRTemp op1 = newTemp(Ity_I32);
6113 Short op2;
6114 IRTemp result = newTemp(Ity_I64);
6115
6116 assign(op1, get_gpr_w1(r1));
6117 op2 = (Short)i2;
6118 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6119 mkU16((UShort)op2))));
6120 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6121
6122 return "mhi";
6123}
6124
6125static HChar *
6126s390_irgen_MGHI(UChar r1, UShort i2)
6127{
6128 IRTemp op1 = newTemp(Ity_I64);
6129 Short op2;
6130 IRTemp result = newTemp(Ity_I128);
6131
6132 assign(op1, get_gpr_dw0(r1));
6133 op2 = (Short)i2;
6134 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6135 mkU16((UShort)op2))));
6136 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6137
6138 return "mghi";
6139}
6140
6141static HChar *
6142s390_irgen_MLR(UChar r1, UChar r2)
6143{
6144 IRTemp op1 = newTemp(Ity_I32);
6145 IRTemp op2 = newTemp(Ity_I32);
6146 IRTemp result = newTemp(Ity_I64);
6147
6148 assign(op1, get_gpr_w1(r1 + 1));
6149 assign(op2, get_gpr_w1(r2));
6150 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6151 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6152 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6153
6154 return "mlr";
6155}
6156
6157static HChar *
6158s390_irgen_MLGR(UChar r1, UChar r2)
6159{
6160 IRTemp op1 = newTemp(Ity_I64);
6161 IRTemp op2 = newTemp(Ity_I64);
6162 IRTemp result = newTemp(Ity_I128);
6163
6164 assign(op1, get_gpr_dw0(r1 + 1));
6165 assign(op2, get_gpr_dw0(r2));
6166 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6167 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6168 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6169
6170 return "mlgr";
6171}
6172
6173static HChar *
6174s390_irgen_ML(UChar r1, IRTemp op2addr)
6175{
6176 IRTemp op1 = newTemp(Ity_I32);
6177 IRTemp op2 = newTemp(Ity_I32);
6178 IRTemp result = newTemp(Ity_I64);
6179
6180 assign(op1, get_gpr_w1(r1 + 1));
6181 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6182 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6183 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6184 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6185
6186 return "ml";
6187}
6188
6189static HChar *
6190s390_irgen_MLG(UChar r1, IRTemp op2addr)
6191{
6192 IRTemp op1 = newTemp(Ity_I64);
6193 IRTemp op2 = newTemp(Ity_I64);
6194 IRTemp result = newTemp(Ity_I128);
6195
6196 assign(op1, get_gpr_dw0(r1 + 1));
6197 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6198 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6199 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6200 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6201
6202 return "mlg";
6203}
6204
6205static HChar *
6206s390_irgen_MSR(UChar r1, UChar r2)
6207{
6208 IRTemp op1 = newTemp(Ity_I32);
6209 IRTemp op2 = newTemp(Ity_I32);
6210 IRTemp result = newTemp(Ity_I64);
6211
6212 assign(op1, get_gpr_w1(r1));
6213 assign(op2, get_gpr_w1(r2));
6214 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6215 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6216
6217 return "msr";
6218}
6219
6220static HChar *
6221s390_irgen_MSGR(UChar r1, UChar r2)
6222{
6223 IRTemp op1 = newTemp(Ity_I64);
6224 IRTemp op2 = newTemp(Ity_I64);
6225 IRTemp result = newTemp(Ity_I128);
6226
6227 assign(op1, get_gpr_dw0(r1));
6228 assign(op2, get_gpr_dw0(r2));
6229 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6230 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6231
6232 return "msgr";
6233}
6234
6235static HChar *
6236s390_irgen_MSGFR(UChar r1, UChar r2)
6237{
6238 IRTemp op1 = newTemp(Ity_I64);
6239 IRTemp op2 = newTemp(Ity_I32);
6240 IRTemp result = newTemp(Ity_I128);
6241
6242 assign(op1, get_gpr_dw0(r1));
6243 assign(op2, get_gpr_w1(r2));
6244 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6245 ));
6246 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6247
6248 return "msgfr";
6249}
6250
6251static HChar *
6252s390_irgen_MS(UChar r1, IRTemp op2addr)
6253{
6254 IRTemp op1 = newTemp(Ity_I32);
6255 IRTemp op2 = newTemp(Ity_I32);
6256 IRTemp result = newTemp(Ity_I64);
6257
6258 assign(op1, get_gpr_w1(r1));
6259 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6260 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6261 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6262
6263 return "ms";
6264}
6265
6266static HChar *
6267s390_irgen_MSY(UChar r1, IRTemp op2addr)
6268{
6269 IRTemp op1 = newTemp(Ity_I32);
6270 IRTemp op2 = newTemp(Ity_I32);
6271 IRTemp result = newTemp(Ity_I64);
6272
6273 assign(op1, get_gpr_w1(r1));
6274 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6275 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6276 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6277
6278 return "msy";
6279}
6280
6281static HChar *
6282s390_irgen_MSG(UChar r1, IRTemp op2addr)
6283{
6284 IRTemp op1 = newTemp(Ity_I64);
6285 IRTemp op2 = newTemp(Ity_I64);
6286 IRTemp result = newTemp(Ity_I128);
6287
6288 assign(op1, get_gpr_dw0(r1));
6289 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6290 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6291 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6292
6293 return "msg";
6294}
6295
6296static HChar *
6297s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6298{
6299 IRTemp op1 = newTemp(Ity_I64);
6300 IRTemp op2 = newTemp(Ity_I32);
6301 IRTemp result = newTemp(Ity_I128);
6302
6303 assign(op1, get_gpr_dw0(r1));
6304 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6305 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6306 ));
6307 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6308
6309 return "msgf";
6310}
6311
6312static HChar *
6313s390_irgen_MSFI(UChar r1, UInt i2)
6314{
6315 IRTemp op1 = newTemp(Ity_I32);
6316 Int op2;
6317 IRTemp result = newTemp(Ity_I64);
6318
6319 assign(op1, get_gpr_w1(r1));
6320 op2 = (Int)i2;
6321 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6322 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6323
6324 return "msfi";
6325}
6326
6327static HChar *
6328s390_irgen_MSGFI(UChar r1, UInt i2)
6329{
6330 IRTemp op1 = newTemp(Ity_I64);
6331 Int op2;
6332 IRTemp result = newTemp(Ity_I128);
6333
6334 assign(op1, get_gpr_dw0(r1));
6335 op2 = (Int)i2;
6336 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6337 op2))));
6338 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6339
6340 return "msgfi";
6341}
6342
6343static HChar *
6344s390_irgen_OR(UChar r1, UChar r2)
6345{
6346 IRTemp op1 = newTemp(Ity_I32);
6347 IRTemp op2 = newTemp(Ity_I32);
6348 IRTemp result = newTemp(Ity_I32);
6349
6350 assign(op1, get_gpr_w1(r1));
6351 assign(op2, get_gpr_w1(r2));
6352 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6353 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6354 put_gpr_w1(r1, mkexpr(result));
6355
6356 return "or";
6357}
6358
6359static HChar *
6360s390_irgen_OGR(UChar r1, UChar r2)
6361{
6362 IRTemp op1 = newTemp(Ity_I64);
6363 IRTemp op2 = newTemp(Ity_I64);
6364 IRTemp result = newTemp(Ity_I64);
6365
6366 assign(op1, get_gpr_dw0(r1));
6367 assign(op2, get_gpr_dw0(r2));
6368 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6369 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6370 put_gpr_dw0(r1, mkexpr(result));
6371
6372 return "ogr";
6373}
6374
6375static HChar *
6376s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6377{
6378 IRTemp op2 = newTemp(Ity_I32);
6379 IRTemp op3 = newTemp(Ity_I32);
6380 IRTemp result = newTemp(Ity_I32);
6381
6382 assign(op2, get_gpr_w1(r2));
6383 assign(op3, get_gpr_w1(r3));
6384 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6385 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6386 put_gpr_w1(r1, mkexpr(result));
6387
6388 return "ork";
6389}
6390
6391static HChar *
6392s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6393{
6394 IRTemp op2 = newTemp(Ity_I64);
6395 IRTemp op3 = newTemp(Ity_I64);
6396 IRTemp result = newTemp(Ity_I64);
6397
6398 assign(op2, get_gpr_dw0(r2));
6399 assign(op3, get_gpr_dw0(r3));
6400 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6401 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6402 put_gpr_dw0(r1, mkexpr(result));
6403
6404 return "ogrk";
6405}
6406
6407static HChar *
6408s390_irgen_O(UChar r1, IRTemp op2addr)
6409{
6410 IRTemp op1 = newTemp(Ity_I32);
6411 IRTemp op2 = newTemp(Ity_I32);
6412 IRTemp result = newTemp(Ity_I32);
6413
6414 assign(op1, get_gpr_w1(r1));
6415 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6416 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6417 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6418 put_gpr_w1(r1, mkexpr(result));
6419
6420 return "o";
6421}
6422
6423static HChar *
6424s390_irgen_OY(UChar r1, IRTemp op2addr)
6425{
6426 IRTemp op1 = newTemp(Ity_I32);
6427 IRTemp op2 = newTemp(Ity_I32);
6428 IRTemp result = newTemp(Ity_I32);
6429
6430 assign(op1, get_gpr_w1(r1));
6431 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6432 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6433 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6434 put_gpr_w1(r1, mkexpr(result));
6435
6436 return "oy";
6437}
6438
6439static HChar *
6440s390_irgen_OG(UChar r1, IRTemp op2addr)
6441{
6442 IRTemp op1 = newTemp(Ity_I64);
6443 IRTemp op2 = newTemp(Ity_I64);
6444 IRTemp result = newTemp(Ity_I64);
6445
6446 assign(op1, get_gpr_dw0(r1));
6447 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6448 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6449 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6450 put_gpr_dw0(r1, mkexpr(result));
6451
6452 return "og";
6453}
6454
6455static HChar *
6456s390_irgen_OI(UChar i2, IRTemp op1addr)
6457{
6458 IRTemp op1 = newTemp(Ity_I8);
6459 UChar op2;
6460 IRTemp result = newTemp(Ity_I8);
6461
6462 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6463 op2 = i2;
6464 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6465 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6466 store(mkexpr(op1addr), mkexpr(result));
6467
6468 return "oi";
6469}
6470
6471static HChar *
6472s390_irgen_OIY(UChar i2, IRTemp op1addr)
6473{
6474 IRTemp op1 = newTemp(Ity_I8);
6475 UChar op2;
6476 IRTemp result = newTemp(Ity_I8);
6477
6478 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6479 op2 = i2;
6480 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6481 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6482 store(mkexpr(op1addr), mkexpr(result));
6483
6484 return "oiy";
6485}
6486
6487static HChar *
6488s390_irgen_OIHF(UChar r1, UInt i2)
6489{
6490 IRTemp op1 = newTemp(Ity_I32);
6491 UInt op2;
6492 IRTemp result = newTemp(Ity_I32);
6493
6494 assign(op1, get_gpr_w0(r1));
6495 op2 = i2;
6496 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6497 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6498 put_gpr_w0(r1, mkexpr(result));
6499
6500 return "oihf";
6501}
6502
6503static HChar *
6504s390_irgen_OIHH(UChar r1, UShort i2)
6505{
6506 IRTemp op1 = newTemp(Ity_I16);
6507 UShort op2;
6508 IRTemp result = newTemp(Ity_I16);
6509
6510 assign(op1, get_gpr_hw0(r1));
6511 op2 = i2;
6512 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6513 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6514 put_gpr_hw0(r1, mkexpr(result));
6515
6516 return "oihh";
6517}
6518
6519static HChar *
6520s390_irgen_OIHL(UChar r1, UShort i2)
6521{
6522 IRTemp op1 = newTemp(Ity_I16);
6523 UShort op2;
6524 IRTemp result = newTemp(Ity_I16);
6525
6526 assign(op1, get_gpr_hw1(r1));
6527 op2 = i2;
6528 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6529 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6530 put_gpr_hw1(r1, mkexpr(result));
6531
6532 return "oihl";
6533}
6534
6535static HChar *
6536s390_irgen_OILF(UChar r1, UInt i2)
6537{
6538 IRTemp op1 = newTemp(Ity_I32);
6539 UInt op2;
6540 IRTemp result = newTemp(Ity_I32);
6541
6542 assign(op1, get_gpr_w1(r1));
6543 op2 = i2;
6544 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6545 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6546 put_gpr_w1(r1, mkexpr(result));
6547
6548 return "oilf";
6549}
6550
6551static HChar *
6552s390_irgen_OILH(UChar r1, UShort i2)
6553{
6554 IRTemp op1 = newTemp(Ity_I16);
6555 UShort op2;
6556 IRTemp result = newTemp(Ity_I16);
6557
6558 assign(op1, get_gpr_hw2(r1));
6559 op2 = i2;
6560 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6561 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6562 put_gpr_hw2(r1, mkexpr(result));
6563
6564 return "oilh";
6565}
6566
6567static HChar *
6568s390_irgen_OILL(UChar r1, UShort i2)
6569{
6570 IRTemp op1 = newTemp(Ity_I16);
6571 UShort op2;
6572 IRTemp result = newTemp(Ity_I16);
6573
6574 assign(op1, get_gpr_hw3(r1));
6575 op2 = i2;
6576 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6577 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6578 put_gpr_hw3(r1, mkexpr(result));
6579
6580 return "oill";
6581}
6582
6583static HChar *
6584s390_irgen_PFD(void)
6585{
6586
6587 return "pfd";
6588}
6589
6590static HChar *
6591s390_irgen_PFDRL(void)
6592{
6593
6594 return "pfdrl";
6595}
6596
6597static HChar *
6598s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6599{
6600 IRTemp amount = newTemp(Ity_I64);
6601 IRTemp op = newTemp(Ity_I32);
6602
6603 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6604 assign(op, get_gpr_w1(r3));
6605 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6606 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6607 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6608
6609 return "rll";
6610}
6611
6612static HChar *
6613s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6614{
6615 IRTemp amount = newTemp(Ity_I64);
6616 IRTemp op = newTemp(Ity_I64);
6617
6618 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6619 assign(op, get_gpr_dw0(r3));
6620 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6621 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6622 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6623
6624 return "rllg";
6625}
6626
6627static HChar *
6628s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6629{
6630 UChar from;
6631 UChar to;
6632 UChar rot;
6633 UChar t_bit;
6634 ULong mask;
6635 ULong maskc;
6636 IRTemp result = newTemp(Ity_I64);
6637 IRTemp op2 = newTemp(Ity_I64);
6638
6639 from = i3 & 63;
6640 to = i4 & 63;
6641 rot = i5 & 63;
6642 t_bit = i3 & 128;
6643 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6644 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6645 mkU8(64 - rot))));
6646 if (from <= to) {
6647 mask = ~0ULL;
6648 mask = (mask >> from) & (mask << (63 - to));
6649 maskc = ~mask;
6650 } else {
6651 maskc = ~0ULL;
6652 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6653 mask = ~maskc;
6654 }
6655 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6656 ), mkU64(mask)));
6657 if (t_bit == 0) {
6658 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6659 mkU64(maskc)), mkexpr(result)));
6660 }
6661 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6662
6663 return "rnsbg";
6664}
6665
6666static HChar *
6667s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6668{
6669 UChar from;
6670 UChar to;
6671 UChar rot;
6672 UChar t_bit;
6673 ULong mask;
6674 ULong maskc;
6675 IRTemp result = newTemp(Ity_I64);
6676 IRTemp op2 = newTemp(Ity_I64);
6677
6678 from = i3 & 63;
6679 to = i4 & 63;
6680 rot = i5 & 63;
6681 t_bit = i3 & 128;
6682 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6683 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6684 mkU8(64 - rot))));
6685 if (from <= to) {
6686 mask = ~0ULL;
6687 mask = (mask >> from) & (mask << (63 - to));
6688 maskc = ~mask;
6689 } else {
6690 maskc = ~0ULL;
6691 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6692 mask = ~maskc;
6693 }
6694 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6695 ), mkU64(mask)));
6696 if (t_bit == 0) {
6697 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6698 mkU64(maskc)), mkexpr(result)));
6699 }
6700 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6701
6702 return "rxsbg";
6703}
6704
6705static HChar *
6706s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6707{
6708 UChar from;
6709 UChar to;
6710 UChar rot;
6711 UChar t_bit;
6712 ULong mask;
6713 ULong maskc;
6714 IRTemp result = newTemp(Ity_I64);
6715 IRTemp op2 = newTemp(Ity_I64);
6716
6717 from = i3 & 63;
6718 to = i4 & 63;
6719 rot = i5 & 63;
6720 t_bit = i3 & 128;
6721 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6722 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6723 mkU8(64 - rot))));
6724 if (from <= to) {
6725 mask = ~0ULL;
6726 mask = (mask >> from) & (mask << (63 - to));
6727 maskc = ~mask;
6728 } else {
6729 maskc = ~0ULL;
6730 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6731 mask = ~maskc;
6732 }
6733 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6734 ), mkU64(mask)));
6735 if (t_bit == 0) {
6736 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6737 mkU64(maskc)), mkexpr(result)));
6738 }
6739 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6740
6741 return "rosbg";
6742}
6743
6744static HChar *
6745s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6746{
6747 UChar from;
6748 UChar to;
6749 UChar rot;
6750 UChar z_bit;
6751 ULong mask;
6752 ULong maskc;
6753 IRTemp op2 = newTemp(Ity_I64);
6754 IRTemp result = newTemp(Ity_I64);
6755
6756 from = i3 & 63;
6757 to = i4 & 63;
6758 rot = i5 & 63;
6759 z_bit = i4 & 128;
6760 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6761 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6762 mkU8(64 - rot))));
6763 if (from <= to) {
6764 mask = ~0ULL;
6765 mask = (mask >> from) & (mask << (63 - to));
6766 maskc = ~mask;
6767 } else {
6768 maskc = ~0ULL;
6769 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6770 mask = ~maskc;
6771 }
6772 if (z_bit == 0) {
6773 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6774 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6775 } else {
6776 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6777 }
6778 assign(result, get_gpr_dw0(r1));
6779 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6780
6781 return "risbg";
6782}
6783
6784static HChar *
6785s390_irgen_SAR(UChar r1, UChar r2)
6786{
6787 put_ar_w0(r1, get_gpr_w1(r2));
sewardj7ee97522011-05-09 21:45:04 +00006788 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00006789 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6790
6791 return "sar";
6792}
6793
6794static HChar *
6795s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6796{
6797 IRTemp p1 = newTemp(Ity_I64);
6798 IRTemp p2 = newTemp(Ity_I64);
6799 IRTemp op = newTemp(Ity_I64);
6800 IRTemp result = newTemp(Ity_I64);
6801 Long sign_mask;
6802 IRTemp shift_amount = newTemp(Ity_I64);
6803
6804 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6805 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6806 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6807 ));
6808 sign_mask = 1ULL << 63;
6809 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6810 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6811 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6812 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6813 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6814 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6815 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6816
6817 return "slda";
6818}
6819
6820static HChar *
6821s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6822{
6823 IRTemp p1 = newTemp(Ity_I64);
6824 IRTemp p2 = newTemp(Ity_I64);
6825 IRTemp result = newTemp(Ity_I64);
6826
6827 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6828 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6829 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6830 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6831 mkexpr(op2addr), mkU64(63)))));
6832 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6833 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6834
6835 return "sldl";
6836}
6837
6838static HChar *
6839s390_irgen_SLA(UChar r1, IRTemp op2addr)
6840{
6841 IRTemp uop = newTemp(Ity_I32);
6842 IRTemp result = newTemp(Ity_I32);
6843 UInt sign_mask;
6844 IRTemp shift_amount = newTemp(Ity_I64);
6845 IRTemp op = newTemp(Ity_I32);
6846
6847 assign(op, get_gpr_w1(r1));
6848 assign(uop, get_gpr_w1(r1));
6849 sign_mask = 2147483648U;
6850 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6851 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6852 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6853 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6854 put_gpr_w1(r1, mkexpr(result));
6855 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6856
6857 return "sla";
6858}
6859
6860static HChar *
6861s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6862{
6863 IRTemp uop = newTemp(Ity_I32);
6864 IRTemp result = newTemp(Ity_I32);
6865 UInt sign_mask;
6866 IRTemp shift_amount = newTemp(Ity_I64);
6867 IRTemp op = newTemp(Ity_I32);
6868
6869 assign(op, get_gpr_w1(r3));
6870 assign(uop, get_gpr_w1(r3));
6871 sign_mask = 2147483648U;
6872 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6873 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6874 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6875 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6876 put_gpr_w1(r1, mkexpr(result));
6877 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6878
6879 return "slak";
6880}
6881
6882static HChar *
6883s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6884{
6885 IRTemp uop = newTemp(Ity_I64);
6886 IRTemp result = newTemp(Ity_I64);
6887 ULong sign_mask;
6888 IRTemp shift_amount = newTemp(Ity_I64);
6889 IRTemp op = newTemp(Ity_I64);
6890
6891 assign(op, get_gpr_dw0(r3));
6892 assign(uop, get_gpr_dw0(r3));
6893 sign_mask = 9223372036854775808ULL;
6894 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6895 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6896 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6897 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6898 put_gpr_dw0(r1, mkexpr(result));
6899 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6900
6901 return "slag";
6902}
6903
6904static HChar *
6905s390_irgen_SLL(UChar r1, IRTemp op2addr)
6906{
6907 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6908 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6909
6910 return "sll";
6911}
6912
6913static HChar *
6914s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6915{
6916 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
6917 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6918
6919 return "sllk";
6920}
6921
6922static HChar *
6923s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
6924{
6925 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
6926 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6927
6928 return "sllg";
6929}
6930
6931static HChar *
6932s390_irgen_SRDA(UChar r1, IRTemp op2addr)
6933{
6934 IRTemp p1 = newTemp(Ity_I64);
6935 IRTemp p2 = newTemp(Ity_I64);
6936 IRTemp result = newTemp(Ity_I64);
6937
6938 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6939 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6940 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6941 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6942 mkexpr(op2addr), mkU64(63)))));
6943 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6944 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6945 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6946
6947 return "srda";
6948}
6949
6950static HChar *
6951s390_irgen_SRDL(UChar r1, IRTemp op2addr)
6952{
6953 IRTemp p1 = newTemp(Ity_I64);
6954 IRTemp p2 = newTemp(Ity_I64);
6955 IRTemp result = newTemp(Ity_I64);
6956
6957 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6958 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6959 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6960 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6961 mkexpr(op2addr), mkU64(63)))));
6962 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6963 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6964
6965 return "srdl";
6966}
6967
6968static HChar *
6969s390_irgen_SRA(UChar r1, IRTemp op2addr)
6970{
6971 IRTemp result = newTemp(Ity_I32);
6972 IRTemp op = newTemp(Ity_I32);
6973
6974 assign(op, get_gpr_w1(r1));
6975 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6976 mkexpr(op2addr), mkU64(63)))));
6977 put_gpr_w1(r1, mkexpr(result));
6978 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6979
6980 return "sra";
6981}
6982
6983static HChar *
6984s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
6985{
6986 IRTemp result = newTemp(Ity_I32);
6987 IRTemp op = newTemp(Ity_I32);
6988
6989 assign(op, get_gpr_w1(r3));
6990 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6991 mkexpr(op2addr), mkU64(63)))));
6992 put_gpr_w1(r1, mkexpr(result));
6993 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6994
6995 return "srak";
6996}
6997
6998static HChar *
6999s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
7000{
7001 IRTemp result = newTemp(Ity_I64);
7002 IRTemp op = newTemp(Ity_I64);
7003
7004 assign(op, get_gpr_dw0(r3));
7005 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7006 mkexpr(op2addr), mkU64(63)))));
7007 put_gpr_dw0(r1, mkexpr(result));
7008 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7009
7010 return "srag";
7011}
7012
7013static HChar *
7014s390_irgen_SRL(UChar r1, IRTemp op2addr)
7015{
7016 IRTemp op = newTemp(Ity_I32);
7017
7018 assign(op, get_gpr_w1(r1));
7019 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7020 mkexpr(op2addr), mkU64(63)))));
7021
7022 return "srl";
7023}
7024
7025static HChar *
7026s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7027{
7028 IRTemp op = newTemp(Ity_I32);
7029
7030 assign(op, get_gpr_w1(r3));
7031 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7032 mkexpr(op2addr), mkU64(63)))));
7033
7034 return "srlk";
7035}
7036
7037static HChar *
7038s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7039{
7040 IRTemp op = newTemp(Ity_I64);
7041
7042 assign(op, get_gpr_dw0(r3));
7043 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7044 mkexpr(op2addr), mkU64(63)))));
7045
7046 return "srlg";
7047}
7048
7049static HChar *
7050s390_irgen_ST(UChar r1, IRTemp op2addr)
7051{
7052 store(mkexpr(op2addr), get_gpr_w1(r1));
7053
7054 return "st";
7055}
7056
7057static HChar *
7058s390_irgen_STY(UChar r1, IRTemp op2addr)
7059{
7060 store(mkexpr(op2addr), get_gpr_w1(r1));
7061
7062 return "sty";
7063}
7064
7065static HChar *
7066s390_irgen_STG(UChar r1, IRTemp op2addr)
7067{
7068 store(mkexpr(op2addr), get_gpr_dw0(r1));
7069
7070 return "stg";
7071}
7072
7073static HChar *
7074s390_irgen_STRL(UChar r1, UInt i2)
7075{
7076 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7077 get_gpr_w1(r1));
7078
7079 return "strl";
7080}
7081
7082static HChar *
7083s390_irgen_STGRL(UChar r1, UInt i2)
7084{
7085 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7086 get_gpr_dw0(r1));
7087
7088 return "stgrl";
7089}
7090
7091static HChar *
7092s390_irgen_STC(UChar r1, IRTemp op2addr)
7093{
7094 store(mkexpr(op2addr), get_gpr_b7(r1));
7095
7096 return "stc";
7097}
7098
7099static HChar *
7100s390_irgen_STCY(UChar r1, IRTemp op2addr)
7101{
7102 store(mkexpr(op2addr), get_gpr_b7(r1));
7103
7104 return "stcy";
7105}
7106
7107static HChar *
7108s390_irgen_STCH(UChar r1, IRTemp op2addr)
7109{
7110 store(mkexpr(op2addr), get_gpr_b3(r1));
7111
7112 return "stch";
7113}
7114
7115static HChar *
7116s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7117{
7118 UChar mask;
7119 UChar n;
7120
7121 mask = (UChar)r3;
7122 n = 0;
7123 if ((mask & 8) != 0) {
7124 store(mkexpr(op2addr), get_gpr_b4(r1));
7125 n = n + 1;
7126 }
7127 if ((mask & 4) != 0) {
7128 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7129 n = n + 1;
7130 }
7131 if ((mask & 2) != 0) {
7132 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7133 n = n + 1;
7134 }
7135 if ((mask & 1) != 0) {
7136 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7137 }
7138
7139 return "stcm";
7140}
7141
7142static HChar *
7143s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7144{
7145 UChar mask;
7146 UChar n;
7147
7148 mask = (UChar)r3;
7149 n = 0;
7150 if ((mask & 8) != 0) {
7151 store(mkexpr(op2addr), get_gpr_b4(r1));
7152 n = n + 1;
7153 }
7154 if ((mask & 4) != 0) {
7155 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7156 n = n + 1;
7157 }
7158 if ((mask & 2) != 0) {
7159 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7160 n = n + 1;
7161 }
7162 if ((mask & 1) != 0) {
7163 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7164 }
7165
7166 return "stcmy";
7167}
7168
7169static HChar *
7170s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7171{
7172 UChar mask;
7173 UChar n;
7174
7175 mask = (UChar)r3;
7176 n = 0;
7177 if ((mask & 8) != 0) {
7178 store(mkexpr(op2addr), get_gpr_b0(r1));
7179 n = n + 1;
7180 }
7181 if ((mask & 4) != 0) {
7182 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7183 n = n + 1;
7184 }
7185 if ((mask & 2) != 0) {
7186 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7187 n = n + 1;
7188 }
7189 if ((mask & 1) != 0) {
7190 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7191 }
7192
7193 return "stcmh";
7194}
7195
7196static HChar *
7197s390_irgen_STH(UChar r1, IRTemp op2addr)
7198{
7199 store(mkexpr(op2addr), get_gpr_hw3(r1));
7200
7201 return "sth";
7202}
7203
7204static HChar *
7205s390_irgen_STHY(UChar r1, IRTemp op2addr)
7206{
7207 store(mkexpr(op2addr), get_gpr_hw3(r1));
7208
7209 return "sthy";
7210}
7211
7212static HChar *
7213s390_irgen_STHRL(UChar r1, UInt i2)
7214{
7215 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7216 get_gpr_hw3(r1));
7217
7218 return "sthrl";
7219}
7220
7221static HChar *
7222s390_irgen_STHH(UChar r1, IRTemp op2addr)
7223{
7224 store(mkexpr(op2addr), get_gpr_hw1(r1));
7225
7226 return "sthh";
7227}
7228
7229static HChar *
7230s390_irgen_STFH(UChar r1, IRTemp op2addr)
7231{
7232 store(mkexpr(op2addr), get_gpr_w0(r1));
7233
7234 return "stfh";
7235}
7236
7237static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007238s390_irgen_STOC(UChar r1, IRTemp op2addr)
7239{
7240 /* condition is checked in format handler */
7241 store(mkexpr(op2addr), get_gpr_w1(r1));
7242
7243 return "stoc";
7244}
7245
7246static HChar *
7247s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7248{
7249 /* condition is checked in format handler */
7250 store(mkexpr(op2addr), get_gpr_dw0(r1));
7251
7252 return "stocg";
7253}
7254
7255static HChar *
sewardj2019a972011-03-07 16:04:07 +00007256s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7257{
7258 store(mkexpr(op2addr), get_gpr_dw0(r1));
7259 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7260
7261 return "stpq";
7262}
7263
7264static HChar *
7265s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7266{
7267 store(mkexpr(op2addr), get_gpr_b7(r1));
7268 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7269
7270 return "strvh";
7271}
7272
7273static HChar *
7274s390_irgen_STRV(UChar r1, IRTemp op2addr)
7275{
7276 store(mkexpr(op2addr), get_gpr_b7(r1));
7277 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7278 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7279 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7280
7281 return "strv";
7282}
7283
7284static HChar *
7285s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7286{
7287 store(mkexpr(op2addr), get_gpr_b7(r1));
7288 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7289 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7290 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7291 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7292 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7293 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7294 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7295
7296 return "strvg";
7297}
7298
7299static HChar *
7300s390_irgen_SR(UChar r1, UChar r2)
7301{
7302 IRTemp op1 = newTemp(Ity_I32);
7303 IRTemp op2 = newTemp(Ity_I32);
7304 IRTemp result = newTemp(Ity_I32);
7305
7306 assign(op1, get_gpr_w1(r1));
7307 assign(op2, get_gpr_w1(r2));
7308 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7309 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7310 put_gpr_w1(r1, mkexpr(result));
7311
7312 return "sr";
7313}
7314
7315static HChar *
7316s390_irgen_SGR(UChar r1, UChar r2)
7317{
7318 IRTemp op1 = newTemp(Ity_I64);
7319 IRTemp op2 = newTemp(Ity_I64);
7320 IRTemp result = newTemp(Ity_I64);
7321
7322 assign(op1, get_gpr_dw0(r1));
7323 assign(op2, get_gpr_dw0(r2));
7324 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7325 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7326 put_gpr_dw0(r1, mkexpr(result));
7327
7328 return "sgr";
7329}
7330
7331static HChar *
7332s390_irgen_SGFR(UChar r1, UChar r2)
7333{
7334 IRTemp op1 = newTemp(Ity_I64);
7335 IRTemp op2 = newTemp(Ity_I64);
7336 IRTemp result = newTemp(Ity_I64);
7337
7338 assign(op1, get_gpr_dw0(r1));
7339 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7340 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7341 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7342 put_gpr_dw0(r1, mkexpr(result));
7343
7344 return "sgfr";
7345}
7346
7347static HChar *
7348s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7349{
7350 IRTemp op2 = newTemp(Ity_I32);
7351 IRTemp op3 = newTemp(Ity_I32);
7352 IRTemp result = newTemp(Ity_I32);
7353
7354 assign(op2, get_gpr_w1(r2));
7355 assign(op3, get_gpr_w1(r3));
7356 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7357 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7358 put_gpr_w1(r1, mkexpr(result));
7359
7360 return "srk";
7361}
7362
7363static HChar *
7364s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7365{
7366 IRTemp op2 = newTemp(Ity_I64);
7367 IRTemp op3 = newTemp(Ity_I64);
7368 IRTemp result = newTemp(Ity_I64);
7369
7370 assign(op2, get_gpr_dw0(r2));
7371 assign(op3, get_gpr_dw0(r3));
7372 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7373 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7374 put_gpr_dw0(r1, mkexpr(result));
7375
7376 return "sgrk";
7377}
7378
7379static HChar *
7380s390_irgen_S(UChar r1, IRTemp op2addr)
7381{
7382 IRTemp op1 = newTemp(Ity_I32);
7383 IRTemp op2 = newTemp(Ity_I32);
7384 IRTemp result = newTemp(Ity_I32);
7385
7386 assign(op1, get_gpr_w1(r1));
7387 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7388 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7389 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7390 put_gpr_w1(r1, mkexpr(result));
7391
7392 return "s";
7393}
7394
7395static HChar *
7396s390_irgen_SY(UChar r1, IRTemp op2addr)
7397{
7398 IRTemp op1 = newTemp(Ity_I32);
7399 IRTemp op2 = newTemp(Ity_I32);
7400 IRTemp result = newTemp(Ity_I32);
7401
7402 assign(op1, get_gpr_w1(r1));
7403 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7404 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7405 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7406 put_gpr_w1(r1, mkexpr(result));
7407
7408 return "sy";
7409}
7410
7411static HChar *
7412s390_irgen_SG(UChar r1, IRTemp op2addr)
7413{
7414 IRTemp op1 = newTemp(Ity_I64);
7415 IRTemp op2 = newTemp(Ity_I64);
7416 IRTemp result = newTemp(Ity_I64);
7417
7418 assign(op1, get_gpr_dw0(r1));
7419 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7420 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7421 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7422 put_gpr_dw0(r1, mkexpr(result));
7423
7424 return "sg";
7425}
7426
7427static HChar *
7428s390_irgen_SGF(UChar r1, IRTemp op2addr)
7429{
7430 IRTemp op1 = newTemp(Ity_I64);
7431 IRTemp op2 = newTemp(Ity_I64);
7432 IRTemp result = newTemp(Ity_I64);
7433
7434 assign(op1, get_gpr_dw0(r1));
7435 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7436 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7437 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7438 put_gpr_dw0(r1, mkexpr(result));
7439
7440 return "sgf";
7441}
7442
7443static HChar *
7444s390_irgen_SH(UChar r1, IRTemp op2addr)
7445{
7446 IRTemp op1 = newTemp(Ity_I32);
7447 IRTemp op2 = newTemp(Ity_I32);
7448 IRTemp result = newTemp(Ity_I32);
7449
7450 assign(op1, get_gpr_w1(r1));
7451 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7452 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7453 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7454 put_gpr_w1(r1, mkexpr(result));
7455
7456 return "sh";
7457}
7458
7459static HChar *
7460s390_irgen_SHY(UChar r1, IRTemp op2addr)
7461{
7462 IRTemp op1 = newTemp(Ity_I32);
7463 IRTemp op2 = newTemp(Ity_I32);
7464 IRTemp result = newTemp(Ity_I32);
7465
7466 assign(op1, get_gpr_w1(r1));
7467 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7468 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7469 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7470 put_gpr_w1(r1, mkexpr(result));
7471
7472 return "shy";
7473}
7474
7475static HChar *
7476s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7477{
7478 IRTemp op2 = newTemp(Ity_I32);
7479 IRTemp op3 = newTemp(Ity_I32);
7480 IRTemp result = newTemp(Ity_I32);
7481
7482 assign(op2, get_gpr_w0(r1));
7483 assign(op3, get_gpr_w0(r2));
7484 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7485 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7486 put_gpr_w0(r1, mkexpr(result));
7487
7488 return "shhhr";
7489}
7490
7491static HChar *
7492s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7493{
7494 IRTemp op2 = newTemp(Ity_I32);
7495 IRTemp op3 = newTemp(Ity_I32);
7496 IRTemp result = newTemp(Ity_I32);
7497
7498 assign(op2, get_gpr_w0(r1));
7499 assign(op3, get_gpr_w1(r2));
7500 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7501 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7502 put_gpr_w0(r1, mkexpr(result));
7503
7504 return "shhlr";
7505}
7506
7507static HChar *
7508s390_irgen_SLR(UChar r1, UChar r2)
7509{
7510 IRTemp op1 = newTemp(Ity_I32);
7511 IRTemp op2 = newTemp(Ity_I32);
7512 IRTemp result = newTemp(Ity_I32);
7513
7514 assign(op1, get_gpr_w1(r1));
7515 assign(op2, get_gpr_w1(r2));
7516 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7517 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7518 put_gpr_w1(r1, mkexpr(result));
7519
7520 return "slr";
7521}
7522
7523static HChar *
7524s390_irgen_SLGR(UChar r1, UChar r2)
7525{
7526 IRTemp op1 = newTemp(Ity_I64);
7527 IRTemp op2 = newTemp(Ity_I64);
7528 IRTemp result = newTemp(Ity_I64);
7529
7530 assign(op1, get_gpr_dw0(r1));
7531 assign(op2, get_gpr_dw0(r2));
7532 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7533 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7534 put_gpr_dw0(r1, mkexpr(result));
7535
7536 return "slgr";
7537}
7538
7539static HChar *
7540s390_irgen_SLGFR(UChar r1, UChar r2)
7541{
7542 IRTemp op1 = newTemp(Ity_I64);
7543 IRTemp op2 = newTemp(Ity_I64);
7544 IRTemp result = newTemp(Ity_I64);
7545
7546 assign(op1, get_gpr_dw0(r1));
7547 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7548 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7549 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7550 put_gpr_dw0(r1, mkexpr(result));
7551
7552 return "slgfr";
7553}
7554
7555static HChar *
7556s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7557{
7558 IRTemp op2 = newTemp(Ity_I32);
7559 IRTemp op3 = newTemp(Ity_I32);
7560 IRTemp result = newTemp(Ity_I32);
7561
7562 assign(op2, get_gpr_w1(r2));
7563 assign(op3, get_gpr_w1(r3));
7564 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7565 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7566 put_gpr_w1(r1, mkexpr(result));
7567
7568 return "slrk";
7569}
7570
7571static HChar *
7572s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7573{
7574 IRTemp op2 = newTemp(Ity_I64);
7575 IRTemp op3 = newTemp(Ity_I64);
7576 IRTemp result = newTemp(Ity_I64);
7577
7578 assign(op2, get_gpr_dw0(r2));
7579 assign(op3, get_gpr_dw0(r3));
7580 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7581 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7582 put_gpr_dw0(r1, mkexpr(result));
7583
7584 return "slgrk";
7585}
7586
7587static HChar *
7588s390_irgen_SL(UChar r1, IRTemp op2addr)
7589{
7590 IRTemp op1 = newTemp(Ity_I32);
7591 IRTemp op2 = newTemp(Ity_I32);
7592 IRTemp result = newTemp(Ity_I32);
7593
7594 assign(op1, get_gpr_w1(r1));
7595 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7596 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7597 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7598 put_gpr_w1(r1, mkexpr(result));
7599
7600 return "sl";
7601}
7602
7603static HChar *
7604s390_irgen_SLY(UChar r1, IRTemp op2addr)
7605{
7606 IRTemp op1 = newTemp(Ity_I32);
7607 IRTemp op2 = newTemp(Ity_I32);
7608 IRTemp result = newTemp(Ity_I32);
7609
7610 assign(op1, get_gpr_w1(r1));
7611 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7612 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7613 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7614 put_gpr_w1(r1, mkexpr(result));
7615
7616 return "sly";
7617}
7618
7619static HChar *
7620s390_irgen_SLG(UChar r1, IRTemp op2addr)
7621{
7622 IRTemp op1 = newTemp(Ity_I64);
7623 IRTemp op2 = newTemp(Ity_I64);
7624 IRTemp result = newTemp(Ity_I64);
7625
7626 assign(op1, get_gpr_dw0(r1));
7627 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7628 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7629 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7630 put_gpr_dw0(r1, mkexpr(result));
7631
7632 return "slg";
7633}
7634
7635static HChar *
7636s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7637{
7638 IRTemp op1 = newTemp(Ity_I64);
7639 IRTemp op2 = newTemp(Ity_I64);
7640 IRTemp result = newTemp(Ity_I64);
7641
7642 assign(op1, get_gpr_dw0(r1));
7643 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7644 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7645 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7646 put_gpr_dw0(r1, mkexpr(result));
7647
7648 return "slgf";
7649}
7650
7651static HChar *
7652s390_irgen_SLFI(UChar r1, UInt i2)
7653{
7654 IRTemp op1 = newTemp(Ity_I32);
7655 UInt op2;
7656 IRTemp result = newTemp(Ity_I32);
7657
7658 assign(op1, get_gpr_w1(r1));
7659 op2 = i2;
7660 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7661 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7662 mkU32(op2)));
7663 put_gpr_w1(r1, mkexpr(result));
7664
7665 return "slfi";
7666}
7667
7668static HChar *
7669s390_irgen_SLGFI(UChar r1, UInt i2)
7670{
7671 IRTemp op1 = newTemp(Ity_I64);
7672 ULong op2;
7673 IRTemp result = newTemp(Ity_I64);
7674
7675 assign(op1, get_gpr_dw0(r1));
7676 op2 = (ULong)i2;
7677 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7678 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7679 mkU64(op2)));
7680 put_gpr_dw0(r1, mkexpr(result));
7681
7682 return "slgfi";
7683}
7684
7685static HChar *
7686s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7687{
7688 IRTemp op2 = newTemp(Ity_I32);
7689 IRTemp op3 = newTemp(Ity_I32);
7690 IRTemp result = newTemp(Ity_I32);
7691
7692 assign(op2, get_gpr_w0(r1));
7693 assign(op3, get_gpr_w0(r2));
7694 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7695 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7696 put_gpr_w0(r1, mkexpr(result));
7697
7698 return "slhhhr";
7699}
7700
7701static HChar *
7702s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7703{
7704 IRTemp op2 = newTemp(Ity_I32);
7705 IRTemp op3 = newTemp(Ity_I32);
7706 IRTemp result = newTemp(Ity_I32);
7707
7708 assign(op2, get_gpr_w0(r1));
7709 assign(op3, get_gpr_w1(r2));
7710 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7711 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7712 put_gpr_w0(r1, mkexpr(result));
7713
7714 return "slhhlr";
7715}
7716
7717static HChar *
7718s390_irgen_SLBR(UChar r1, UChar r2)
7719{
7720 IRTemp op1 = newTemp(Ity_I32);
7721 IRTemp op2 = newTemp(Ity_I32);
7722 IRTemp result = newTemp(Ity_I32);
7723 IRTemp borrow_in = newTemp(Ity_I32);
7724
7725 assign(op1, get_gpr_w1(r1));
7726 assign(op2, get_gpr_w1(r2));
7727 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7728 s390_call_calculate_cc(), mkU8(1))));
7729 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7730 mkexpr(borrow_in)));
7731 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7732 put_gpr_w1(r1, mkexpr(result));
7733
7734 return "slbr";
7735}
7736
7737static HChar *
7738s390_irgen_SLBGR(UChar r1, UChar r2)
7739{
7740 IRTemp op1 = newTemp(Ity_I64);
7741 IRTemp op2 = newTemp(Ity_I64);
7742 IRTemp result = newTemp(Ity_I64);
7743 IRTemp borrow_in = newTemp(Ity_I64);
7744
7745 assign(op1, get_gpr_dw0(r1));
7746 assign(op2, get_gpr_dw0(r2));
7747 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7748 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7749 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7750 mkexpr(borrow_in)));
7751 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7752 put_gpr_dw0(r1, mkexpr(result));
7753
7754 return "slbgr";
7755}
7756
7757static HChar *
7758s390_irgen_SLB(UChar r1, IRTemp op2addr)
7759{
7760 IRTemp op1 = newTemp(Ity_I32);
7761 IRTemp op2 = newTemp(Ity_I32);
7762 IRTemp result = newTemp(Ity_I32);
7763 IRTemp borrow_in = newTemp(Ity_I32);
7764
7765 assign(op1, get_gpr_w1(r1));
7766 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7767 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7768 s390_call_calculate_cc(), mkU8(1))));
7769 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7770 mkexpr(borrow_in)));
7771 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7772 put_gpr_w1(r1, mkexpr(result));
7773
7774 return "slb";
7775}
7776
7777static HChar *
7778s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7779{
7780 IRTemp op1 = newTemp(Ity_I64);
7781 IRTemp op2 = newTemp(Ity_I64);
7782 IRTemp result = newTemp(Ity_I64);
7783 IRTemp borrow_in = newTemp(Ity_I64);
7784
7785 assign(op1, get_gpr_dw0(r1));
7786 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7787 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7788 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7789 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7790 mkexpr(borrow_in)));
7791 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7792 put_gpr_dw0(r1, mkexpr(result));
7793
7794 return "slbg";
7795}
7796
7797static HChar *
7798s390_irgen_SVC(UChar i)
7799{
7800 IRTemp sysno = newTemp(Ity_I64);
7801
7802 if (i != 0) {
7803 assign(sysno, mkU64(i));
7804 } else {
7805 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7806 }
7807 system_call(mkexpr(sysno));
7808
7809 return "svc";
7810}
7811
7812static HChar *
7813s390_irgen_TS(IRTemp op2addr)
7814{
7815 IRTemp value = newTemp(Ity_I8);
7816
7817 assign(value, load(Ity_I8, mkexpr(op2addr)));
7818 s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value);
7819 store(mkexpr(op2addr), mkU8(255));
7820
7821 return "ts";
7822}
7823
7824static HChar *
7825s390_irgen_TM(UChar i2, IRTemp op1addr)
7826{
7827 UChar mask;
7828 IRTemp value = newTemp(Ity_I8);
7829
7830 mask = i2;
7831 assign(value, load(Ity_I8, mkexpr(op1addr)));
7832 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7833 mkU8(mask)));
7834
7835 return "tm";
7836}
7837
7838static HChar *
7839s390_irgen_TMY(UChar i2, IRTemp op1addr)
7840{
7841 UChar mask;
7842 IRTemp value = newTemp(Ity_I8);
7843
7844 mask = i2;
7845 assign(value, load(Ity_I8, mkexpr(op1addr)));
7846 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7847 mkU8(mask)));
7848
7849 return "tmy";
7850}
7851
7852static HChar *
7853s390_irgen_TMHH(UChar r1, UShort i2)
7854{
7855 UShort mask;
7856 IRTemp value = newTemp(Ity_I16);
7857
7858 mask = i2;
7859 assign(value, get_gpr_hw0(r1));
7860 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7861 mkU16(mask)));
7862
7863 return "tmhh";
7864}
7865
7866static HChar *
7867s390_irgen_TMHL(UChar r1, UShort i2)
7868{
7869 UShort mask;
7870 IRTemp value = newTemp(Ity_I16);
7871
7872 mask = i2;
7873 assign(value, get_gpr_hw1(r1));
7874 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7875 mkU16(mask)));
7876
7877 return "tmhl";
7878}
7879
7880static HChar *
7881s390_irgen_TMLH(UChar r1, UShort i2)
7882{
7883 UShort mask;
7884 IRTemp value = newTemp(Ity_I16);
7885
7886 mask = i2;
7887 assign(value, get_gpr_hw2(r1));
7888 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7889 mkU16(mask)));
7890
7891 return "tmlh";
7892}
7893
7894static HChar *
7895s390_irgen_TMLL(UChar r1, UShort i2)
7896{
7897 UShort mask;
7898 IRTemp value = newTemp(Ity_I16);
7899
7900 mask = i2;
7901 assign(value, get_gpr_hw3(r1));
7902 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7903 mkU16(mask)));
7904
7905 return "tmll";
7906}
7907
7908static HChar *
7909s390_irgen_EFPC(UChar r1)
7910{
7911 put_gpr_w1(r1, get_fpc_w0());
7912
7913 return "efpc";
7914}
7915
7916static HChar *
7917s390_irgen_LER(UChar r1, UChar r2)
7918{
7919 put_fpr_w0(r1, get_fpr_w0(r2));
7920
7921 return "ler";
7922}
7923
7924static HChar *
7925s390_irgen_LDR(UChar r1, UChar r2)
7926{
7927 put_fpr_dw0(r1, get_fpr_dw0(r2));
7928
7929 return "ldr";
7930}
7931
7932static HChar *
7933s390_irgen_LXR(UChar r1, UChar r2)
7934{
7935 put_fpr_dw0(r1, get_fpr_dw0(r2));
7936 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
7937
7938 return "lxr";
7939}
7940
7941static HChar *
7942s390_irgen_LE(UChar r1, IRTemp op2addr)
7943{
7944 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7945
7946 return "le";
7947}
7948
7949static HChar *
7950s390_irgen_LD(UChar r1, IRTemp op2addr)
7951{
7952 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7953
7954 return "ld";
7955}
7956
7957static HChar *
7958s390_irgen_LEY(UChar r1, IRTemp op2addr)
7959{
7960 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7961
7962 return "ley";
7963}
7964
7965static HChar *
7966s390_irgen_LDY(UChar r1, IRTemp op2addr)
7967{
7968 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7969
7970 return "ldy";
7971}
7972
7973static HChar *
7974s390_irgen_LFPC(IRTemp op2addr)
7975{
7976 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
7977
7978 return "lfpc";
7979}
7980
7981static HChar *
7982s390_irgen_LZER(UChar r1)
7983{
7984 put_fpr_w0(r1, mkF32i(0x0));
7985
7986 return "lzer";
7987}
7988
7989static HChar *
7990s390_irgen_LZDR(UChar r1)
7991{
7992 put_fpr_dw0(r1, mkF64i(0x0));
7993
7994 return "lzdr";
7995}
7996
7997static HChar *
7998s390_irgen_LZXR(UChar r1)
7999{
8000 put_fpr_dw0(r1, mkF64i(0x0));
8001 put_fpr_dw0(r1 + 2, mkF64i(0x0));
8002
8003 return "lzxr";
8004}
8005
8006static HChar *
8007s390_irgen_SRNM(IRTemp op2addr)
8008{
8009 UInt mask;
8010
8011 mask = 3;
8012 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8013 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8014 );
8015
8016 return "srnm";
8017}
8018
8019static HChar *
8020s390_irgen_SFPC(UChar r1)
8021{
8022 put_fpc_w0(get_gpr_w1(r1));
8023
8024 return "sfpc";
8025}
8026
8027static HChar *
8028s390_irgen_STE(UChar r1, IRTemp op2addr)
8029{
8030 store(mkexpr(op2addr), get_fpr_w0(r1));
8031
8032 return "ste";
8033}
8034
8035static HChar *
8036s390_irgen_STD(UChar r1, IRTemp op2addr)
8037{
8038 store(mkexpr(op2addr), get_fpr_dw0(r1));
8039
8040 return "std";
8041}
8042
8043static HChar *
8044s390_irgen_STEY(UChar r1, IRTemp op2addr)
8045{
8046 store(mkexpr(op2addr), get_fpr_w0(r1));
8047
8048 return "stey";
8049}
8050
8051static HChar *
8052s390_irgen_STDY(UChar r1, IRTemp op2addr)
8053{
8054 store(mkexpr(op2addr), get_fpr_dw0(r1));
8055
8056 return "stdy";
8057}
8058
8059static HChar *
8060s390_irgen_STFPC(IRTemp op2addr)
8061{
8062 store(mkexpr(op2addr), get_fpc_w0());
8063
8064 return "stfpc";
8065}
8066
8067static HChar *
8068s390_irgen_AEBR(UChar r1, UChar r2)
8069{
8070 IRTemp op1 = newTemp(Ity_F32);
8071 IRTemp op2 = newTemp(Ity_F32);
8072 IRTemp result = newTemp(Ity_F32);
8073
8074 assign(op1, get_fpr_w0(r1));
8075 assign(op2, get_fpr_w0(r2));
8076 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8077 mkexpr(op2)));
8078 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8079 put_fpr_w0(r1, mkexpr(result));
8080
8081 return "aebr";
8082}
8083
8084static HChar *
8085s390_irgen_ADBR(UChar r1, UChar r2)
8086{
8087 IRTemp op1 = newTemp(Ity_F64);
8088 IRTemp op2 = newTemp(Ity_F64);
8089 IRTemp result = newTemp(Ity_F64);
8090
8091 assign(op1, get_fpr_dw0(r1));
8092 assign(op2, get_fpr_dw0(r2));
8093 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8094 mkexpr(op2)));
8095 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8096 put_fpr_dw0(r1, mkexpr(result));
8097
8098 return "adbr";
8099}
8100
8101static HChar *
8102s390_irgen_AEB(UChar r1, IRTemp op2addr)
8103{
8104 IRTemp op1 = newTemp(Ity_F32);
8105 IRTemp op2 = newTemp(Ity_F32);
8106 IRTemp result = newTemp(Ity_F32);
8107
8108 assign(op1, get_fpr_w0(r1));
8109 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8110 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8111 mkexpr(op2)));
8112 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8113 put_fpr_w0(r1, mkexpr(result));
8114
8115 return "aeb";
8116}
8117
8118static HChar *
8119s390_irgen_ADB(UChar r1, IRTemp op2addr)
8120{
8121 IRTemp op1 = newTemp(Ity_F64);
8122 IRTemp op2 = newTemp(Ity_F64);
8123 IRTemp result = newTemp(Ity_F64);
8124
8125 assign(op1, get_fpr_dw0(r1));
8126 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8127 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8128 mkexpr(op2)));
8129 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8130 put_fpr_dw0(r1, mkexpr(result));
8131
8132 return "adb";
8133}
8134
8135static HChar *
8136s390_irgen_CEFBR(UChar r1, UChar r2)
8137{
8138 IRTemp op2 = newTemp(Ity_I32);
8139
8140 assign(op2, get_gpr_w1(r2));
8141 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8142
8143 return "cefbr";
8144}
8145
8146static HChar *
8147s390_irgen_CDFBR(UChar r1, UChar r2)
8148{
8149 IRTemp op2 = newTemp(Ity_I32);
8150
8151 assign(op2, get_gpr_w1(r2));
8152 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8153
8154 return "cdfbr";
8155}
8156
8157static HChar *
8158s390_irgen_CEGBR(UChar r1, UChar r2)
8159{
8160 IRTemp op2 = newTemp(Ity_I64);
8161
8162 assign(op2, get_gpr_dw0(r2));
8163 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8164
8165 return "cegbr";
8166}
8167
8168static HChar *
8169s390_irgen_CDGBR(UChar r1, UChar r2)
8170{
8171 IRTemp op2 = newTemp(Ity_I64);
8172
8173 assign(op2, get_gpr_dw0(r2));
8174 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8175
8176 return "cdgbr";
8177}
8178
8179static HChar *
8180s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8181{
8182 IRTemp op = newTemp(Ity_F32);
8183 IRTemp result = newTemp(Ity_I32);
8184
8185 assign(op, get_fpr_w0(r2));
8186 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8187 mkexpr(op)));
8188 put_gpr_w1(r1, mkexpr(result));
8189 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8190
8191 return "cfebr";
8192}
8193
8194static HChar *
8195s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8196{
8197 IRTemp op = newTemp(Ity_F64);
8198 IRTemp result = newTemp(Ity_I32);
8199
8200 assign(op, get_fpr_dw0(r2));
8201 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8202 mkexpr(op)));
8203 put_gpr_w1(r1, mkexpr(result));
8204 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8205
8206 return "cfdbr";
8207}
8208
8209static HChar *
8210s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8211{
8212 IRTemp op = newTemp(Ity_F32);
8213 IRTemp result = newTemp(Ity_I64);
8214
8215 assign(op, get_fpr_w0(r2));
8216 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8217 mkexpr(op)));
8218 put_gpr_dw0(r1, mkexpr(result));
8219 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8220
8221 return "cgebr";
8222}
8223
8224static HChar *
8225s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8226{
8227 IRTemp op = newTemp(Ity_F64);
8228 IRTemp result = newTemp(Ity_I64);
8229
8230 assign(op, get_fpr_dw0(r2));
8231 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8232 mkexpr(op)));
8233 put_gpr_dw0(r1, mkexpr(result));
8234 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8235
8236 return "cgdbr";
8237}
8238
8239static HChar *
8240s390_irgen_DEBR(UChar r1, UChar r2)
8241{
8242 IRTemp op1 = newTemp(Ity_F32);
8243 IRTemp op2 = newTemp(Ity_F32);
8244 IRTemp result = newTemp(Ity_F32);
8245
8246 assign(op1, get_fpr_w0(r1));
8247 assign(op2, get_fpr_w0(r2));
8248 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8249 mkexpr(op2)));
8250 put_fpr_w0(r1, mkexpr(result));
8251
8252 return "debr";
8253}
8254
8255static HChar *
8256s390_irgen_DDBR(UChar r1, UChar r2)
8257{
8258 IRTemp op1 = newTemp(Ity_F64);
8259 IRTemp op2 = newTemp(Ity_F64);
8260 IRTemp result = newTemp(Ity_F64);
8261
8262 assign(op1, get_fpr_dw0(r1));
8263 assign(op2, get_fpr_dw0(r2));
8264 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8265 mkexpr(op2)));
8266 put_fpr_dw0(r1, mkexpr(result));
8267
8268 return "ddbr";
8269}
8270
8271static HChar *
8272s390_irgen_DEB(UChar r1, IRTemp op2addr)
8273{
8274 IRTemp op1 = newTemp(Ity_F32);
8275 IRTemp op2 = newTemp(Ity_F32);
8276 IRTemp result = newTemp(Ity_F32);
8277
8278 assign(op1, get_fpr_w0(r1));
8279 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8280 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8281 mkexpr(op2)));
8282 put_fpr_w0(r1, mkexpr(result));
8283
8284 return "deb";
8285}
8286
8287static HChar *
8288s390_irgen_DDB(UChar r1, IRTemp op2addr)
8289{
8290 IRTemp op1 = newTemp(Ity_F64);
8291 IRTemp op2 = newTemp(Ity_F64);
8292 IRTemp result = newTemp(Ity_F64);
8293
8294 assign(op1, get_fpr_dw0(r1));
8295 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8296 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8297 mkexpr(op2)));
8298 put_fpr_dw0(r1, mkexpr(result));
8299
8300 return "ddb";
8301}
8302
8303static HChar *
8304s390_irgen_LTEBR(UChar r1, UChar r2)
8305{
8306 IRTemp result = newTemp(Ity_F32);
8307
8308 assign(result, get_fpr_w0(r2));
8309 put_fpr_w0(r1, mkexpr(result));
8310 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8311
8312 return "ltebr";
8313}
8314
8315static HChar *
8316s390_irgen_LTDBR(UChar r1, UChar r2)
8317{
8318 IRTemp result = newTemp(Ity_F64);
8319
8320 assign(result, get_fpr_dw0(r2));
8321 put_fpr_dw0(r1, mkexpr(result));
8322 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8323
8324 return "ltdbr";
8325}
8326
8327static HChar *
8328s390_irgen_LCEBR(UChar r1, UChar r2)
8329{
8330 IRTemp result = newTemp(Ity_F32);
8331
8332 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8333 put_fpr_w0(r1, mkexpr(result));
8334 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8335
8336 return "lcebr";
8337}
8338
8339static HChar *
8340s390_irgen_LCDBR(UChar r1, UChar r2)
8341{
8342 IRTemp result = newTemp(Ity_F64);
8343
8344 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8345 put_fpr_dw0(r1, mkexpr(result));
8346 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8347
8348 return "lcdbr";
8349}
8350
8351static HChar *
8352s390_irgen_LDEBR(UChar r1, UChar r2)
8353{
8354 IRTemp op = newTemp(Ity_F32);
8355
8356 assign(op, get_fpr_w0(r2));
8357 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8358
8359 return "ldebr";
8360}
8361
8362static HChar *
8363s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8364{
8365 IRTemp op = newTemp(Ity_F32);
8366
8367 assign(op, load(Ity_F32, mkexpr(op2addr)));
8368 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8369
8370 return "ldeb";
8371}
8372
8373static HChar *
8374s390_irgen_LEDBR(UChar r1, UChar r2)
8375{
8376 IRTemp op = newTemp(Ity_F64);
8377
8378 assign(op, get_fpr_dw0(r2));
8379 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8380
8381 return "ledbr";
8382}
8383
8384static HChar *
8385s390_irgen_MEEBR(UChar r1, UChar r2)
8386{
8387 IRTemp op1 = newTemp(Ity_F32);
8388 IRTemp op2 = newTemp(Ity_F32);
8389 IRTemp result = newTemp(Ity_F32);
8390
8391 assign(op1, get_fpr_w0(r1));
8392 assign(op2, get_fpr_w0(r2));
8393 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8394 mkexpr(op2)));
8395 put_fpr_w0(r1, mkexpr(result));
8396
8397 return "meebr";
8398}
8399
8400static HChar *
8401s390_irgen_MDBR(UChar r1, UChar r2)
8402{
8403 IRTemp op1 = newTemp(Ity_F64);
8404 IRTemp op2 = newTemp(Ity_F64);
8405 IRTemp result = newTemp(Ity_F64);
8406
8407 assign(op1, get_fpr_dw0(r1));
8408 assign(op2, get_fpr_dw0(r2));
8409 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8410 mkexpr(op2)));
8411 put_fpr_dw0(r1, mkexpr(result));
8412
8413 return "mdbr";
8414}
8415
8416static HChar *
8417s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8418{
8419 IRTemp op1 = newTemp(Ity_F32);
8420 IRTemp op2 = newTemp(Ity_F32);
8421 IRTemp result = newTemp(Ity_F32);
8422
8423 assign(op1, get_fpr_w0(r1));
8424 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8425 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8426 mkexpr(op2)));
8427 put_fpr_w0(r1, mkexpr(result));
8428
8429 return "meeb";
8430}
8431
8432static HChar *
8433s390_irgen_MDB(UChar r1, IRTemp op2addr)
8434{
8435 IRTemp op1 = newTemp(Ity_F64);
8436 IRTemp op2 = newTemp(Ity_F64);
8437 IRTemp result = newTemp(Ity_F64);
8438
8439 assign(op1, get_fpr_dw0(r1));
8440 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8441 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8442 mkexpr(op2)));
8443 put_fpr_dw0(r1, mkexpr(result));
8444
8445 return "mdb";
8446}
8447
8448static HChar *
8449s390_irgen_SEBR(UChar r1, UChar r2)
8450{
8451 IRTemp op1 = newTemp(Ity_F32);
8452 IRTemp op2 = newTemp(Ity_F32);
8453 IRTemp result = newTemp(Ity_F32);
8454
8455 assign(op1, get_fpr_w0(r1));
8456 assign(op2, get_fpr_w0(r2));
8457 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8458 mkexpr(op2)));
8459 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8460 put_fpr_w0(r1, mkexpr(result));
8461
8462 return "sebr";
8463}
8464
8465static HChar *
8466s390_irgen_SDBR(UChar r1, UChar r2)
8467{
8468 IRTemp op1 = newTemp(Ity_F64);
8469 IRTemp op2 = newTemp(Ity_F64);
8470 IRTemp result = newTemp(Ity_F64);
8471
8472 assign(op1, get_fpr_dw0(r1));
8473 assign(op2, get_fpr_dw0(r2));
8474 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8475 mkexpr(op2)));
8476 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8477 put_fpr_dw0(r1, mkexpr(result));
8478
8479 return "sdbr";
8480}
8481
8482static HChar *
8483s390_irgen_SEB(UChar r1, IRTemp op2addr)
8484{
8485 IRTemp op1 = newTemp(Ity_F32);
8486 IRTemp op2 = newTemp(Ity_F32);
8487 IRTemp result = newTemp(Ity_F32);
8488
8489 assign(op1, get_fpr_w0(r1));
8490 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8491 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8492 mkexpr(op2)));
8493 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8494 put_fpr_w0(r1, mkexpr(result));
8495
8496 return "seb";
8497}
8498
8499static HChar *
8500s390_irgen_SDB(UChar r1, IRTemp op2addr)
8501{
8502 IRTemp op1 = newTemp(Ity_F64);
8503 IRTemp op2 = newTemp(Ity_F64);
8504 IRTemp result = newTemp(Ity_F64);
8505
8506 assign(op1, get_fpr_dw0(r1));
8507 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8508 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8509 mkexpr(op2)));
8510 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8511 put_fpr_dw0(r1, mkexpr(result));
8512
8513 return "sdb";
8514}
8515
8516
8517static HChar *
8518s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8519{
8520 IRTemp current1 = newTemp(Ity_I8);
8521 IRTemp current2 = newTemp(Ity_I8);
8522 IRTemp counter = newTemp(Ity_I64);
8523
8524 assign(counter, get_counter_dw0());
8525 put_counter_dw0(mkU64(0));
8526
8527 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8528 mkexpr(counter))));
8529 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8530 mkexpr(counter))));
8531 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8532 False);
8533
8534 /* Both fields differ ? */
8535 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8536 guest_IA_next_instr);
8537
8538 /* Check for end of field */
8539 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8540 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
8541 guest_IA_curr_instr);
8542 put_counter_dw0(mkU64(0));
8543
8544 return "clc";
8545}
8546
8547static HChar *
8548s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8549{
8550 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8551
8552 addr1 = newTemp(Ity_I64);
8553 addr3 = newTemp(Ity_I64);
8554 addr1_load = newTemp(Ity_I64);
8555 addr3_load = newTemp(Ity_I64);
8556 len1 = newTemp(Ity_I64);
8557 len3 = newTemp(Ity_I64);
8558 single1 = newTemp(Ity_I8);
8559 single3 = newTemp(Ity_I8);
8560
8561 assign(addr1, get_gpr_dw0(r1));
8562 assign(len1, get_gpr_dw0(r1 + 1));
8563 assign(addr3, get_gpr_dw0(r3));
8564 assign(len3, get_gpr_dw0(r3 + 1));
8565
8566 /* len1 == 0 and len3 == 0? Exit */
8567 s390_cc_set(0);
8568 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8569 mkexpr(len3)), mkU64(0)),
8570 guest_IA_next_instr);
8571
8572 /* A mux requires both ways to be possible. This is a way to prevent clcle
8573 from reading from addr1 if it should read from the pad. Since the pad
8574 has no address, just read from the instruction, we discard that anyway */
8575 assign(addr1_load,
8576 IRExpr_Mux0X(unop(Iop_1Uto8,
8577 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8578 mkexpr(addr1),
8579 mkU64(guest_IA_curr_instr)));
8580
8581 /* same for addr3 */
8582 assign(addr3_load,
8583 IRExpr_Mux0X(unop(Iop_1Uto8,
8584 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8585 mkexpr(addr3),
8586 mkU64(guest_IA_curr_instr)));
8587
8588 assign(single1,
8589 IRExpr_Mux0X(unop(Iop_1Uto8,
8590 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8591 load(Ity_I8, mkexpr(addr1_load)),
8592 unop(Iop_64to8, mkexpr(pad2))));
8593
8594 assign(single3,
8595 IRExpr_Mux0X(unop(Iop_1Uto8,
8596 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8597 load(Ity_I8, mkexpr(addr3_load)),
8598 unop(Iop_64to8, mkexpr(pad2))));
8599
8600 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8601 /* Both fields differ ? */
8602 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8603 guest_IA_next_instr);
8604
8605 /* If a length in 0 we must not change this length and the address */
8606 put_gpr_dw0(r1,
8607 IRExpr_Mux0X(unop(Iop_1Uto8,
8608 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8609 binop(Iop_Add64, mkexpr(addr1), mkU64(1)),
8610 mkexpr(addr1)));
8611
8612 put_gpr_dw0(r1 + 1,
8613 IRExpr_Mux0X(unop(Iop_1Uto8,
8614 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8615 binop(Iop_Sub64, mkexpr(len1), mkU64(1)),
8616 mkU64(0)));
8617
8618 put_gpr_dw0(r3,
8619 IRExpr_Mux0X(unop(Iop_1Uto8,
8620 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8621 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
8622 mkexpr(addr3)));
8623
8624 put_gpr_dw0(r3 + 1,
8625 IRExpr_Mux0X(unop(Iop_1Uto8,
8626 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8627 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
8628 mkU64(0)));
8629
8630 /* The architecture requires that we exit with CC3 after a machine specific
8631 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8632 s390_cc_set(3);
8633 if_condition_goto(binop(Iop_CmpEQ64,
8634 binop(Iop_And64,
8635 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8636 mkU64(0xfff)),
8637 mkU64(0)),
8638 guest_IA_next_instr);
8639
8640 always_goto(mkU64(guest_IA_curr_instr));
8641
8642 return "clcle";
8643}
8644static void
8645s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8646{
8647 IRTemp old1 = newTemp(Ity_I8);
8648 IRTemp old2 = newTemp(Ity_I8);
8649 IRTemp new1 = newTemp(Ity_I8);
8650 IRTemp counter = newTemp(Ity_I32);
8651 IRTemp addr1 = newTemp(Ity_I64);
8652
8653 assign(counter, get_counter_w0());
8654
8655 assign(addr1, binop(Iop_Add64, mkexpr(start1),
8656 unop(Iop_32Uto64, mkexpr(counter))));
8657
8658 assign(old1, load(Ity_I8, mkexpr(addr1)));
8659 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8660 unop(Iop_32Uto64,mkexpr(counter)))));
8661 assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
8662
8663 store(mkexpr(addr1),
8664 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
8665 mkexpr(start2))),
8666 mkexpr(new1), mkU8(0)));
8667 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
8668 get_counter_w1()));
8669
8670 /* Check for end of field */
8671 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
8672 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
8673 guest_IA_curr_instr);
8674 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
8675 False);
8676 put_counter_dw0(mkU64(0));
8677}
8678
8679
8680static void
8681s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8682{
8683 IRTemp current1 = newTemp(Ity_I8);
8684 IRTemp current2 = newTemp(Ity_I8);
8685 IRTemp counter = newTemp(Ity_I64);
8686
8687 assign(counter, get_counter_dw0());
8688 put_counter_dw0(mkU64(0));
8689
8690 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8691 mkexpr(counter))));
8692 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8693 mkexpr(counter))));
8694 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8695 False);
8696
8697 /* Both fields differ ? */
8698 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8699 guest_IA_next_instr);
8700
8701 /* Check for end of field */
8702 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8703 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8704 guest_IA_curr_instr);
8705 put_counter_dw0(mkU64(0));
8706}
8707
8708static void
8709s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8710{
8711 IRTemp counter = newTemp(Ity_I64);
8712
8713 assign(counter, get_counter_dw0());
8714
8715 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8716 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8717
8718 /* Check for end of field */
8719 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8720 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8721 guest_IA_curr_instr);
8722 put_counter_dw0(mkU64(0));
8723}
8724
8725
8726
8727static void
8728s390_irgen_EX_SS(UChar r, IRTemp addr2,
8729void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8730{
8731 struct SS {
8732 unsigned int op : 8;
8733 unsigned int l : 8;
8734 unsigned int b1 : 4;
8735 unsigned int d1 : 12;
8736 unsigned int b2 : 4;
8737 unsigned int d2 : 12;
8738 };
8739 union {
8740 struct SS dec;
8741 unsigned long bytes;
8742 } ss;
8743 IRTemp cond;
8744 IRDirty *d;
8745 IRTemp torun;
8746
8747 IRTemp start1 = newTemp(Ity_I64);
8748 IRTemp start2 = newTemp(Ity_I64);
8749 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8750 cond = newTemp(Ity_I1);
8751 torun = newTemp(Ity_I64);
8752
8753 assign(torun, load(Ity_I64, mkexpr(addr2)));
8754 /* Start with a check that the saved code is still correct */
8755 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8756 /* If not, save the new value */
8757 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8758 mkIRExprVec_1(mkexpr(torun)));
8759 d->guard = mkexpr(cond);
8760 stmt(IRStmt_Dirty(d));
8761
8762 /* and restart */
8763 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8764 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8765 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8766 IRConst_U64(guest_IA_curr_instr)));
8767
8768 ss.bytes = last_execute_target;
8769 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8770 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8771 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8772 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8773 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8774 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8775 irgen(len, start1, start2);
8776 last_execute_target = 0;
8777}
8778
8779static HChar *
8780s390_irgen_EX(UChar r1, IRTemp addr2)
8781{
8782 switch(last_execute_target & 0xff00000000000000ULL) {
8783 case 0:
8784 {
8785 /* no code information yet */
8786 IRDirty *d;
8787
8788 /* so safe the code... */
8789 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8790 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8791 stmt(IRStmt_Dirty(d));
8792 /* and restart */
8793 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8794 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8795 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8796 IRConst_U64(guest_IA_curr_instr)));
8797 /* we know that this will be invalidated */
8798 irsb->next = mkU64(guest_IA_next_instr);
8799 dis_res->whatNext = Dis_StopHere;
8800 break;
8801 }
8802
8803 case 0xd200000000000000ULL:
8804 /* special case MVC */
8805 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8806 return "mvc via ex";
8807
8808 case 0xd500000000000000ULL:
8809 /* special case CLC */
8810 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8811 return "clc via ex";
8812
8813 case 0xd700000000000000ULL:
8814 /* special case XC */
8815 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8816 return "xc via ex";
8817
8818
8819 default:
8820 {
8821 /* everything else will get a self checking prefix that also checks the
8822 register content */
8823 IRDirty *d;
8824 UChar *bytes;
8825 IRTemp cond;
8826 IRTemp orperand;
8827 IRTemp torun;
8828
8829 cond = newTemp(Ity_I1);
8830 orperand = newTemp(Ity_I64);
8831 torun = newTemp(Ity_I64);
8832
8833 if (r1 == 0)
8834 assign(orperand, mkU64(0));
8835 else
8836 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8837 /* This code is going to be translated */
8838 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8839 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8840
8841 /* Start with a check that saved code is still correct */
8842 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8843 mkU64(last_execute_target)));
8844 /* If not, save the new value */
8845 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8846 mkIRExprVec_1(mkexpr(torun)));
8847 d->guard = mkexpr(cond);
8848 stmt(IRStmt_Dirty(d));
8849
8850 /* and restart */
8851 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8852 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8853 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8854 IRConst_U64(guest_IA_curr_instr)));
8855
8856 /* Now comes the actual translation */
8857 bytes = (UChar *) &last_execute_target;
8858 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
8859 dis_res);
sewardj7ee97522011-05-09 21:45:04 +00008860 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00008861 vex_printf(" which was executed by\n");
8862 /* dont make useless translations in the next execute */
8863 last_execute_target = 0;
8864 }
8865 }
8866 return "ex";
8867}
8868
8869static HChar *
8870s390_irgen_EXRL(UChar r1, UInt offset)
8871{
8872 IRTemp addr = newTemp(Ity_I64);
8873 /* we might save one round trip because we know the target */
8874 if (!last_execute_target)
8875 last_execute_target = *(ULong *)(HWord)
8876 (guest_IA_curr_instr + offset * 2UL);
8877 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
8878 s390_irgen_EX(r1, addr);
8879 return "exrl";
8880}
8881
8882static HChar *
8883s390_irgen_IPM(UChar r1)
8884{
8885 // As long as we dont support SPM, lets just assume 0 as program mask
8886 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
8887 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
8888
8889 return "ipm";
8890}
8891
8892
8893static HChar *
8894s390_irgen_SRST(UChar r1, UChar r2)
8895{
8896 IRTemp address = newTemp(Ity_I64);
8897 IRTemp next = newTemp(Ity_I64);
8898 IRTemp delim = newTemp(Ity_I8);
8899 IRTemp counter = newTemp(Ity_I64);
8900 IRTemp byte = newTemp(Ity_I8);
8901
8902 assign(address, get_gpr_dw0(r2));
8903 assign(next, get_gpr_dw0(r1));
8904
8905 assign(counter, get_counter_dw0());
8906 put_counter_dw0(mkU64(0));
8907
8908 // start = next? CC=2 and out r1 and r2 unchanged
8909 s390_cc_set(2);
8910 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
8911 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
8912 guest_IA_next_instr);
8913
8914 assign(byte, load(Ity_I8, mkexpr(address)));
8915 assign(delim, get_gpr_b7(0));
8916
8917 // byte = delim? CC=1, R1=address
8918 s390_cc_set(1);
8919 put_gpr_dw0(r1, mkexpr(address));
8920 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
8921 guest_IA_next_instr);
8922
8923 // else: all equal, no end yet, loop
8924 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8925 put_gpr_dw0(r1, mkexpr(next));
8926 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
8927 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
8928 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
8929 // >= 256 bytes done CC=3
8930 s390_cc_set(3);
8931 put_counter_dw0(mkU64(0));
8932
8933 return "srst";
8934}
8935
8936static HChar *
8937s390_irgen_CLST(UChar r1, UChar r2)
8938{
8939 IRTemp address1 = newTemp(Ity_I64);
8940 IRTemp address2 = newTemp(Ity_I64);
8941 IRTemp end = newTemp(Ity_I8);
8942 IRTemp counter = newTemp(Ity_I64);
8943 IRTemp byte1 = newTemp(Ity_I8);
8944 IRTemp byte2 = newTemp(Ity_I8);
8945
8946 assign(address1, get_gpr_dw0(r1));
8947 assign(address2, get_gpr_dw0(r2));
8948 assign(end, get_gpr_b7(0));
8949 assign(counter, get_counter_dw0());
8950 put_counter_dw0(mkU64(0));
8951 assign(byte1, load(Ity_I8, mkexpr(address1)));
8952 assign(byte2, load(Ity_I8, mkexpr(address2)));
8953
8954 // end in both? all equal, reset r1 and r2 to start values
8955 s390_cc_set(0);
8956 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
8957 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
8958 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
8959 binop(Iop_Or8,
8960 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
8961 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
8962 guest_IA_next_instr);
8963
8964 put_gpr_dw0(r1, mkexpr(address1));
8965 put_gpr_dw0(r2, mkexpr(address2));
8966
8967 // End found in string1
8968 s390_cc_set(1);
8969 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
8970 guest_IA_next_instr);
8971
8972 // End found in string2
8973 s390_cc_set(2);
8974 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
8975 guest_IA_next_instr);
8976
8977 // string1 < string2
8978 s390_cc_set(1);
8979 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
8980 unop(Iop_8Uto32, mkexpr(byte2))),
8981 guest_IA_next_instr);
8982
8983 // string2 < string1
8984 s390_cc_set(2);
8985 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
8986 unop(Iop_8Uto32, mkexpr(byte1))),
8987 guest_IA_next_instr);
8988
8989 // else: all equal, no end yet, loop
8990 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8991 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
8992 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
8993 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
8994 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
8995 // >= 256 bytes done CC=3
8996 s390_cc_set(3);
8997 put_counter_dw0(mkU64(0));
8998
8999 return "clst";
9000}
9001
9002static void
9003s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9004{
9005 UChar reg;
9006 IRTemp addr = newTemp(Ity_I64);
9007
9008 assign(addr, mkexpr(op2addr));
9009 reg = r1;
9010 do {
9011 IRTemp old = addr;
9012
9013 reg %= 16;
9014 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9015 addr = newTemp(Ity_I64);
9016 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9017 reg++;
9018 } while (reg != (r3 + 1));
9019}
9020
9021static HChar *
9022s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9023{
9024 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9025
9026 return "lm";
9027}
9028
9029static HChar *
9030s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9031{
9032 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9033
9034 return "lmy";
9035}
9036
9037static HChar *
9038s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9039{
9040 UChar reg;
9041 IRTemp addr = newTemp(Ity_I64);
9042
9043 assign(addr, mkexpr(op2addr));
9044 reg = r1;
9045 do {
9046 IRTemp old = addr;
9047
9048 reg %= 16;
9049 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9050 addr = newTemp(Ity_I64);
9051 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9052 reg++;
9053 } while (reg != (r3 + 1));
9054
9055 return "lmh";
9056}
9057
9058static HChar *
9059s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9060{
9061 UChar reg;
9062 IRTemp addr = newTemp(Ity_I64);
9063
9064 assign(addr, mkexpr(op2addr));
9065 reg = r1;
9066 do {
9067 IRTemp old = addr;
9068
9069 reg %= 16;
9070 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9071 addr = newTemp(Ity_I64);
9072 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9073 reg++;
9074 } while (reg != (r3 + 1));
9075
9076 return "lmg";
9077}
9078
9079static void
9080s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9081{
9082 UChar reg;
9083 IRTemp addr = newTemp(Ity_I64);
9084
9085 assign(addr, mkexpr(op2addr));
9086 reg = r1;
9087 do {
9088 IRTemp old = addr;
9089
9090 reg %= 16;
9091 store(mkexpr(addr), get_gpr_w1(reg));
9092 addr = newTemp(Ity_I64);
9093 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9094 reg++;
9095 } while( reg != (r3 + 1));
9096}
9097
9098static HChar *
9099s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9100{
9101 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9102
9103 return "stm";
9104}
9105
9106static HChar *
9107s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9108{
9109 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9110
9111 return "stmy";
9112}
9113
9114static HChar *
9115s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9116{
9117 UChar reg;
9118 IRTemp addr = newTemp(Ity_I64);
9119
9120 assign(addr, mkexpr(op2addr));
9121 reg = r1;
9122 do {
9123 IRTemp old = addr;
9124
9125 reg %= 16;
9126 store(mkexpr(addr), get_gpr_w0(reg));
9127 addr = newTemp(Ity_I64);
9128 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9129 reg++;
9130 } while( reg != (r3 + 1));
9131
9132 return "stmh";
9133}
9134
9135static HChar *
9136s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9137{
9138 UChar reg;
9139 IRTemp addr = newTemp(Ity_I64);
9140
9141 assign(addr, mkexpr(op2addr));
9142 reg = r1;
9143 do {
9144 IRTemp old = addr;
9145
9146 reg %= 16;
9147 store(mkexpr(addr), get_gpr_dw0(reg));
9148 addr = newTemp(Ity_I64);
9149 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9150 reg++;
9151 } while( reg != (r3 + 1));
9152
9153 return "stmg";
9154}
9155
9156static void
9157s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2)
9158{
9159 IRTemp old1 = newTemp(Ity_I8);
9160 IRTemp old2 = newTemp(Ity_I8);
9161 IRTemp new1 = newTemp(Ity_I8);
9162 IRTemp counter = newTemp(Ity_I32);
9163 IRTemp addr1 = newTemp(Ity_I64);
9164
9165 assign(counter, get_counter_w0());
9166
9167 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9168 unop(Iop_32Uto64, mkexpr(counter))));
9169
9170 assign(old1, load(Ity_I8, mkexpr(addr1)));
9171 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9172 unop(Iop_32Uto64,mkexpr(counter)))));
9173 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9174
9175 /* Special case: xc is used to zero memory */
sewardj2019a972011-03-07 16:04:07 +00009176 if (op == Iop_Xor8) {
9177 store(mkexpr(addr1),
9178 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
9179 mkexpr(start2))),
9180 mkexpr(new1), mkU8(0)));
9181 } else
9182 store(mkexpr(addr1), mkexpr(new1));
9183 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9184 get_counter_w1()));
9185
9186 /* Check for end of field */
9187 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9188 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9189 guest_IA_curr_instr);
9190 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9191 False);
9192 put_counter_dw0(mkU64(0));
9193}
9194
9195static HChar *
9196s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9197{
9198 s390_irgen_XONC(Iop_Xor8, length, start1, start2);
9199
9200 return "xc";
9201}
9202
sewardjb63967e2011-03-24 08:50:04 +00009203static void
9204s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9205{
9206 IRTemp counter = newTemp(Ity_I32);
9207 IRTemp start = newTemp(Ity_I64);
9208 IRTemp addr = newTemp(Ity_I64);
9209
9210 assign(start,
9211 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9212
9213 if (length < 8) {
9214 UInt i;
9215
9216 for (i = 0; i <= length; ++i) {
9217 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9218 }
9219 } else {
9220 assign(counter, get_counter_w0());
9221
9222 assign(addr, binop(Iop_Add64, mkexpr(start),
9223 unop(Iop_32Uto64, mkexpr(counter))));
9224
9225 store(mkexpr(addr), mkU8(0));
9226
9227 /* Check for end of field */
9228 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9229 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9230 guest_IA_curr_instr);
9231
9232 /* Reset counter */
9233 put_counter_dw0(mkU64(0));
9234 }
9235
9236 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
9237
sewardj7ee97522011-05-09 21:45:04 +00009238 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjb63967e2011-03-24 08:50:04 +00009239 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9240}
9241
sewardj2019a972011-03-07 16:04:07 +00009242static HChar *
9243s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9244{
9245 s390_irgen_XONC(Iop_And8, length, start1, start2);
9246
9247 return "nc";
9248}
9249
9250static HChar *
9251s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9252{
9253 s390_irgen_XONC(Iop_Or8, length, start1, start2);
9254
9255 return "oc";
9256}
9257
9258
9259static HChar *
9260s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9261{
9262 IRTemp counter = newTemp(Ity_I64);
9263
9264 assign(counter, get_counter_dw0());
9265
9266 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
9267 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
9268
9269 /* Check for end of field */
9270 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9271 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
9272 guest_IA_curr_instr);
9273 put_counter_dw0(mkU64(0));
9274
9275 return "mvc";
9276}
9277
9278static HChar *
9279s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9280{
9281 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9282
9283 addr1 = newTemp(Ity_I64);
9284 addr3 = newTemp(Ity_I64);
9285 addr3_load = newTemp(Ity_I64);
9286 len1 = newTemp(Ity_I64);
9287 len3 = newTemp(Ity_I64);
9288 single = newTemp(Ity_I8);
9289
9290 assign(addr1, get_gpr_dw0(r1));
9291 assign(len1, get_gpr_dw0(r1 + 1));
9292 assign(addr3, get_gpr_dw0(r3));
9293 assign(len3, get_gpr_dw0(r3 + 1));
9294
9295 // len1 == 0 ?
9296 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9297 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9298 guest_IA_next_instr);
9299
9300 /* This is a hack to prevent mvcle from reading from addr3 if it
9301 should read from the pad. Since the pad has no address, just
9302 read from the instruction, we discard that anyway */
9303 assign(addr3_load,
9304 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9305 mkU64(0))),
9306 mkexpr(addr3),
9307 mkU64(guest_IA_curr_instr)));
9308
9309 assign(single,
9310 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9311 mkU64(0))),
9312 load(Ity_I8, mkexpr(addr3_load)),
9313 unop(Iop_64to8, mkexpr(pad2))));
9314 store(mkexpr(addr1), mkexpr(single));
9315
9316 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9317
9318 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9319
9320 put_gpr_dw0(r3,
9321 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9322 mkU64(0))),
9323 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
9324 mkexpr(addr3)));
9325
9326 put_gpr_dw0(r3 + 1,
9327 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9328 mkU64(0))),
9329 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
9330 mkU64(0)));
9331
9332 /* We should set CC=3 (faked by overflow add) and leave after
9333 a maximum of ~4096 bytes have been processed. This is simpler:
9334 we leave whenever (len1 % 4096) == 0 */
9335 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
9336
9337 mktemp(Ity_I64, mkU64(-1ULL)), False);
9338 if_condition_goto(binop(Iop_CmpEQ64,
9339 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9340 mkU64(0)),
9341 guest_IA_next_instr);
9342
9343 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9344 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9345 guest_IA_curr_instr);
9346
9347 return "mvcle";
9348}
9349
9350static HChar *
9351s390_irgen_MVST(UChar r1, UChar r2)
9352{
9353 IRTemp addr1 = newTemp(Ity_I64);
9354 IRTemp addr2 = newTemp(Ity_I64);
9355 IRTemp end = newTemp(Ity_I8);
9356 IRTemp byte = newTemp(Ity_I8);
9357 IRTemp counter = newTemp(Ity_I64);
9358
9359 assign(addr1, get_gpr_dw0(r1));
9360 assign(addr2, get_gpr_dw0(r2));
9361 assign(counter, get_counter_dw0());
9362 assign(end, get_gpr_b7(0));
9363 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9364 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9365
9366 // We use unlimited as cpu-determined number
9367 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9368 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9369 guest_IA_curr_instr);
9370
9371 // and always set cc=1 at the end + update r1
9372 s390_cc_set(1);
9373 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9374 put_counter_dw0(mkU64(0));
9375
9376 return "mvst";
9377}
9378
9379static void
9380s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9381{
9382 IRTemp op1 = newTemp(Ity_I64);
9383 IRTemp result = newTemp(Ity_I64);
9384
9385 assign(op1, binop(Iop_32HLto64,
9386 get_gpr_w1(r1), // high 32 bits
9387 get_gpr_w1(r1 + 1))); // low 32 bits
9388 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9389 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9390 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9391}
9392
9393static void
9394s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9395{
9396 IRTemp op1 = newTemp(Ity_I128);
9397 IRTemp result = newTemp(Ity_I128);
9398
9399 assign(op1, binop(Iop_64HLto128,
9400 get_gpr_dw0(r1), // high 64 bits
9401 get_gpr_dw0(r1 + 1))); // low 64 bits
9402 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9403 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9404 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9405}
9406
9407static void
9408s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9409{
9410 IRTemp op1 = newTemp(Ity_I64);
9411 IRTemp result = newTemp(Ity_I128);
9412
9413 assign(op1, get_gpr_dw0(r1 + 1));
9414 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9415 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9416 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9417}
9418
9419static HChar *
9420s390_irgen_DR(UChar r1, UChar r2)
9421{
9422 IRTemp op2 = newTemp(Ity_I32);
9423
9424 assign(op2, get_gpr_w1(r2));
9425
9426 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9427
9428 return "dr";
9429}
9430
9431static HChar *
9432s390_irgen_D(UChar r1, IRTemp op2addr)
9433{
9434 IRTemp op2 = newTemp(Ity_I32);
9435
9436 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9437
9438 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9439
9440 return "d";
9441}
9442
9443static HChar *
9444s390_irgen_DLR(UChar r1, UChar r2)
9445{
9446 IRTemp op2 = newTemp(Ity_I32);
9447
9448 assign(op2, get_gpr_w1(r2));
9449
9450 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9451
9452 return "dr";
9453}
9454
9455static HChar *
9456s390_irgen_DL(UChar r1, IRTemp op2addr)
9457{
9458 IRTemp op2 = newTemp(Ity_I32);
9459
9460 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9461
9462 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9463
9464 return "dl";
9465}
9466
9467static HChar *
9468s390_irgen_DLG(UChar r1, IRTemp op2addr)
9469{
9470 IRTemp op2 = newTemp(Ity_I64);
9471
9472 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9473
9474 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9475
9476 return "dlg";
9477}
9478
9479static HChar *
9480s390_irgen_DLGR(UChar r1, UChar r2)
9481{
9482 IRTemp op2 = newTemp(Ity_I64);
9483
9484 assign(op2, get_gpr_dw0(r2));
9485
9486 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9487
9488 return "dlgr";
9489}
9490
9491static HChar *
9492s390_irgen_DSGR(UChar r1, UChar r2)
9493{
9494 IRTemp op2 = newTemp(Ity_I64);
9495
9496 assign(op2, get_gpr_dw0(r2));
9497
9498 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9499
9500 return "dsgr";
9501}
9502
9503static HChar *
9504s390_irgen_DSG(UChar r1, IRTemp op2addr)
9505{
9506 IRTemp op2 = newTemp(Ity_I64);
9507
9508 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9509
9510 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9511
9512 return "dsg";
9513}
9514
9515static HChar *
9516s390_irgen_DSGFR(UChar r1, UChar r2)
9517{
9518 IRTemp op2 = newTemp(Ity_I64);
9519
9520 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9521
9522 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9523
9524 return "dsgfr";
9525}
9526
9527static HChar *
9528s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9529{
9530 IRTemp op2 = newTemp(Ity_I64);
9531
9532 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9533
9534 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9535
9536 return "dsgf";
9537}
9538
9539static void
9540s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9541{
9542 UChar reg;
9543 IRTemp addr = newTemp(Ity_I64);
9544
9545 assign(addr, mkexpr(op2addr));
9546 reg = r1;
9547 do {
9548 IRTemp old = addr;
9549
9550 reg %= 16;
9551 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9552 addr = newTemp(Ity_I64);
9553 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9554 reg++;
9555 } while (reg != (r3 + 1));
9556}
9557
9558static HChar *
9559s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9560{
9561 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9562
9563 return "lam";
9564}
9565
9566static HChar *
9567s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9568{
9569 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9570
9571 return "lamy";
9572}
9573
9574static void
9575s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9576{
9577 UChar reg;
9578 IRTemp addr = newTemp(Ity_I64);
9579
9580 assign(addr, mkexpr(op2addr));
9581 reg = r1;
9582 do {
9583 IRTemp old = addr;
9584
9585 reg %= 16;
9586 store(mkexpr(addr), get_ar_w0(reg));
9587 addr = newTemp(Ity_I64);
9588 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9589 reg++;
9590 } while (reg != (r3 + 1));
9591}
9592
9593static HChar *
9594s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9595{
9596 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9597
9598 return "stam";
9599}
9600
9601static HChar *
9602s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9603{
9604 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9605
9606 return "stamy";
9607}
9608
9609
9610/* Implementation for 32-bit compare-and-swap */
9611static void
9612s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9613{
9614 IRCAS *cas;
9615 IRTemp op1 = newTemp(Ity_I32);
9616 IRTemp old_mem = newTemp(Ity_I32);
9617 IRTemp op3 = newTemp(Ity_I32);
9618 IRTemp result = newTemp(Ity_I32);
9619 IRTemp nequal = newTemp(Ity_I1);
9620
9621 assign(op1, get_gpr_w1(r1));
9622 assign(op3, get_gpr_w1(r3));
9623
9624 /* The first and second operands are compared. If they are equal,
9625 the third operand is stored at the second- operand location. */
9626 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9627 Iend_BE, mkexpr(op2addr),
9628 NULL, mkexpr(op1), /* expected value */
9629 NULL, mkexpr(op3) /* new value */);
9630 stmt(IRStmt_CAS(cas));
9631
9632 /* Set CC. Operands compared equal -> 0, else 1. */
9633 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9634 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9635
9636 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9637 Otherwise, store the old_value from memory in r1 and yield. */
9638 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9639 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9640 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9641 IRConst_U64(guest_IA_next_instr)));
9642}
9643
9644static HChar *
9645s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9646{
9647 s390_irgen_cas_32(r1, r3, op2addr);
9648
9649 return "cs";
9650}
9651
9652static HChar *
9653s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9654{
9655 s390_irgen_cas_32(r1, r3, op2addr);
9656
9657 return "csy";
9658}
9659
9660static HChar *
9661s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9662{
9663 IRCAS *cas;
9664 IRTemp op1 = newTemp(Ity_I64);
9665 IRTemp old_mem = newTemp(Ity_I64);
9666 IRTemp op3 = newTemp(Ity_I64);
9667 IRTemp result = newTemp(Ity_I64);
9668 IRTemp nequal = newTemp(Ity_I1);
9669
9670 assign(op1, get_gpr_dw0(r1));
9671 assign(op3, get_gpr_dw0(r3));
9672
9673 /* The first and second operands are compared. If they are equal,
9674 the third operand is stored at the second- operand location. */
9675 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9676 Iend_BE, mkexpr(op2addr),
9677 NULL, mkexpr(op1), /* expected value */
9678 NULL, mkexpr(op3) /* new value */);
9679 stmt(IRStmt_CAS(cas));
9680
9681 /* Set CC. Operands compared equal -> 0, else 1. */
9682 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9683 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9684
9685 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9686 Otherwise, store the old_value from memory in r1 and yield. */
9687 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9688 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9689 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9690 IRConst_U64(guest_IA_next_instr)));
9691
9692 return "csg";
9693}
9694
9695
9696/* Binary floating point */
9697
9698static HChar *
9699s390_irgen_AXBR(UChar r1, UChar r2)
9700{
9701 IRTemp op1 = newTemp(Ity_F128);
9702 IRTemp op2 = newTemp(Ity_F128);
9703 IRTemp result = newTemp(Ity_F128);
9704
9705 assign(op1, get_fpr_pair(r1));
9706 assign(op2, get_fpr_pair(r2));
9707 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9708 mkexpr(op2)));
9709 put_fpr_pair(r1, mkexpr(result));
9710
9711 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9712
9713 return "axbr";
9714}
9715
9716/* The result of a Iop_CmdFxx operation is a condition code. It is
9717 encoded using the values defined in type IRCmpFxxResult.
9718 Before we can store the condition code into the guest state (or do
9719 anything else with it for that matter) we need to convert it to
9720 the encoding that s390 uses. This is what this function does.
9721
9722 s390 VEX b6 b2 b0 cc.1 cc.0
9723 0 0x40 EQ 1 0 0 0 0
9724 1 0x01 LT 0 0 1 0 1
9725 2 0x00 GT 0 0 0 1 0
9726 3 0x45 Unordered 1 1 1 1 1
9727
9728 The following bits from the VEX encoding are interesting:
9729 b0, b2, b6 with b0 being the LSB. We observe:
9730
9731 cc.0 = b0;
9732 cc.1 = b2 | (~b0 & ~b6)
9733
9734 with cc being the s390 condition code.
9735*/
9736static IRExpr *
9737convert_vex_fpcc_to_s390(IRTemp vex_cc)
9738{
9739 IRTemp cc0 = newTemp(Ity_I32);
9740 IRTemp cc1 = newTemp(Ity_I32);
9741 IRTemp b0 = newTemp(Ity_I32);
9742 IRTemp b2 = newTemp(Ity_I32);
9743 IRTemp b6 = newTemp(Ity_I32);
9744
9745 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9746 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9747 mkU32(1)));
9748 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9749 mkU32(1)));
9750
9751 assign(cc0, mkexpr(b0));
9752 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9753 binop(Iop_And32,
9754 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9755 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
9756 )));
9757
9758 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
9759}
9760
9761static HChar *
9762s390_irgen_CEBR(UChar r1, UChar r2)
9763{
9764 IRTemp op1 = newTemp(Ity_F32);
9765 IRTemp op2 = newTemp(Ity_F32);
9766 IRTemp cc_vex = newTemp(Ity_I32);
9767 IRTemp cc_s390 = newTemp(Ity_I32);
9768
9769 assign(op1, get_fpr_w0(r1));
9770 assign(op2, get_fpr_w0(r2));
9771 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9772
9773 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9774 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9775
9776 return "cebr";
9777}
9778
9779static HChar *
9780s390_irgen_CDBR(UChar r1, UChar r2)
9781{
9782 IRTemp op1 = newTemp(Ity_F64);
9783 IRTemp op2 = newTemp(Ity_F64);
9784 IRTemp cc_vex = newTemp(Ity_I32);
9785 IRTemp cc_s390 = newTemp(Ity_I32);
9786
9787 assign(op1, get_fpr_dw0(r1));
9788 assign(op2, get_fpr_dw0(r2));
9789 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9790
9791 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9792 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9793
9794 return "cdbr";
9795}
9796
9797static HChar *
9798s390_irgen_CXBR(UChar r1, UChar r2)
9799{
9800 IRTemp op1 = newTemp(Ity_F128);
9801 IRTemp op2 = newTemp(Ity_F128);
9802 IRTemp cc_vex = newTemp(Ity_I32);
9803 IRTemp cc_s390 = newTemp(Ity_I32);
9804
9805 assign(op1, get_fpr_pair(r1));
9806 assign(op2, get_fpr_pair(r2));
9807 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
9808
9809 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9810 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9811
9812 return "cxbr";
9813}
9814
9815static HChar *
9816s390_irgen_CEB(UChar r1, IRTemp op2addr)
9817{
9818 IRTemp op1 = newTemp(Ity_F32);
9819 IRTemp op2 = newTemp(Ity_F32);
9820 IRTemp cc_vex = newTemp(Ity_I32);
9821 IRTemp cc_s390 = newTemp(Ity_I32);
9822
9823 assign(op1, get_fpr_w0(r1));
9824 assign(op2, load(Ity_F32, mkexpr(op2addr)));
9825 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9826
9827 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9828 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9829
9830 return "ceb";
9831}
9832
9833static HChar *
9834s390_irgen_CDB(UChar r1, IRTemp op2addr)
9835{
9836 IRTemp op1 = newTemp(Ity_F64);
9837 IRTemp op2 = newTemp(Ity_F64);
9838 IRTemp cc_vex = newTemp(Ity_I32);
9839 IRTemp cc_s390 = newTemp(Ity_I32);
9840
9841 assign(op1, get_fpr_dw0(r1));
9842 assign(op2, load(Ity_F64, mkexpr(op2addr)));
9843 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9844
9845 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9846 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9847
9848 return "cdb";
9849}
9850
9851static HChar *
9852s390_irgen_CXFBR(UChar r1, UChar r2)
9853{
9854 IRTemp op2 = newTemp(Ity_I32);
9855
9856 assign(op2, get_gpr_w1(r2));
9857 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
9858
9859 return "cxfbr";
9860}
9861
9862static HChar *
9863s390_irgen_CXGBR(UChar r1, UChar r2)
9864{
9865 IRTemp op2 = newTemp(Ity_I64);
9866
9867 assign(op2, get_gpr_dw0(r2));
9868 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
9869
9870 return "cxgbr";
9871}
9872
9873static HChar *
9874s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
9875{
9876 IRTemp op = newTemp(Ity_F128);
9877 IRTemp result = newTemp(Ity_I32);
9878
9879 assign(op, get_fpr_pair(r2));
9880 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
9881 mkexpr(op)));
9882 put_gpr_w1(r1, mkexpr(result));
9883 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
9884
9885 return "cfxbr";
9886}
9887
9888static HChar *
9889s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
9890{
9891 IRTemp op = newTemp(Ity_F128);
9892 IRTemp result = newTemp(Ity_I64);
9893
9894 assign(op, get_fpr_pair(r2));
9895 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
9896 mkexpr(op)));
9897 put_gpr_dw0(r1, mkexpr(result));
9898 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
9899
9900 return "cgxbr";
9901}
9902
9903static HChar *
9904s390_irgen_DXBR(UChar r1, UChar r2)
9905{
9906 IRTemp op1 = newTemp(Ity_F128);
9907 IRTemp op2 = newTemp(Ity_F128);
9908 IRTemp result = newTemp(Ity_F128);
9909
9910 assign(op1, get_fpr_pair(r1));
9911 assign(op2, get_fpr_pair(r2));
9912 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9913 mkexpr(op2)));
9914 put_fpr_pair(r1, mkexpr(result));
9915
9916 return "dxbr";
9917}
9918
9919static HChar *
9920s390_irgen_LTXBR(UChar r1, UChar r2)
9921{
9922 IRTemp result = newTemp(Ity_F128);
9923
9924 assign(result, get_fpr_pair(r2));
9925 put_fpr_pair(r1, mkexpr(result));
9926 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9927
9928 return "ltxbr";
9929}
9930
9931static HChar *
9932s390_irgen_LCXBR(UChar r1, UChar r2)
9933{
9934 IRTemp result = newTemp(Ity_F128);
9935
9936 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
9937 put_fpr_pair(r1, mkexpr(result));
9938 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9939
9940 return "lcxbr";
9941}
9942
9943static HChar *
9944s390_irgen_LXDBR(UChar r1, UChar r2)
9945{
9946 IRTemp op = newTemp(Ity_F64);
9947
9948 assign(op, get_fpr_dw0(r2));
9949 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9950
9951 return "lxdbr";
9952}
9953
9954static HChar *
9955s390_irgen_LXEBR(UChar r1, UChar r2)
9956{
9957 IRTemp op = newTemp(Ity_F32);
9958
9959 assign(op, get_fpr_w0(r2));
9960 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
9961
9962 return "lxebr";
9963}
9964
9965static HChar *
9966s390_irgen_LXDB(UChar r1, IRTemp op2addr)
9967{
9968 IRTemp op = newTemp(Ity_F64);
9969
9970 assign(op, load(Ity_F64, mkexpr(op2addr)));
9971 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9972
9973 return "lxdb";
9974}
9975
9976static HChar *
9977s390_irgen_LXEB(UChar r1, IRTemp op2addr)
9978{
9979 IRTemp op = newTemp(Ity_F32);
9980
9981 assign(op, load(Ity_F32, mkexpr(op2addr)));
9982 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
9983
9984 return "lxeb";
9985}
9986
9987static HChar *
9988s390_irgen_LNEBR(UChar r1, UChar r2)
9989{
9990 IRTemp result = newTemp(Ity_F32);
9991
9992 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
9993 put_fpr_w0(r1, mkexpr(result));
9994 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
9995
9996 return "lnebr";
9997}
9998
9999static HChar *
10000s390_irgen_LNDBR(UChar r1, UChar r2)
10001{
10002 IRTemp result = newTemp(Ity_F64);
10003
10004 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10005 put_fpr_dw0(r1, mkexpr(result));
10006 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10007
10008 return "lndbr";
10009}
10010
10011static HChar *
10012s390_irgen_LNXBR(UChar r1, UChar r2)
10013{
10014 IRTemp result = newTemp(Ity_F128);
10015
10016 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10017 put_fpr_pair(r1, mkexpr(result));
10018 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10019
10020 return "lnxbr";
10021}
10022
10023static HChar *
10024s390_irgen_LPEBR(UChar r1, UChar r2)
10025{
10026 IRTemp result = newTemp(Ity_F32);
10027
10028 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10029 put_fpr_w0(r1, mkexpr(result));
10030 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10031
10032 return "lpebr";
10033}
10034
10035static HChar *
10036s390_irgen_LPDBR(UChar r1, UChar r2)
10037{
10038 IRTemp result = newTemp(Ity_F64);
10039
10040 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10041 put_fpr_dw0(r1, mkexpr(result));
10042 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10043
10044 return "lpdbr";
10045}
10046
10047static HChar *
10048s390_irgen_LPXBR(UChar r1, UChar r2)
10049{
10050 IRTemp result = newTemp(Ity_F128);
10051
10052 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10053 put_fpr_pair(r1, mkexpr(result));
10054 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10055
10056 return "lpxbr";
10057}
10058
10059static HChar *
10060s390_irgen_LDXBR(UChar r1, UChar r2)
10061{
10062 IRTemp result = newTemp(Ity_F64);
10063
10064 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10065 put_fpr_dw0(r1, mkexpr(result));
10066
10067 return "ldxbr";
10068}
10069
10070static HChar *
10071s390_irgen_LEXBR(UChar r1, UChar r2)
10072{
10073 IRTemp result = newTemp(Ity_F32);
10074
10075 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10076 put_fpr_w0(r1, mkexpr(result));
10077
10078 return "lexbr";
10079}
10080
10081static HChar *
10082s390_irgen_MXBR(UChar r1, UChar r2)
10083{
10084 IRTemp op1 = newTemp(Ity_F128);
10085 IRTemp op2 = newTemp(Ity_F128);
10086 IRTemp result = newTemp(Ity_F128);
10087
10088 assign(op1, get_fpr_pair(r1));
10089 assign(op2, get_fpr_pair(r2));
10090 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10091 mkexpr(op2)));
10092 put_fpr_pair(r1, mkexpr(result));
10093
10094 return "mxbr";
10095}
10096
10097static HChar *
10098s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10099{
10100 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10101 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10102
10103 return "maebr";
10104}
10105
10106static HChar *
10107s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10108{
10109 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10110 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10111
10112 return "madbr";
10113}
10114
10115static HChar *
10116s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10117{
10118 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10119
10120 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10121 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10122
10123 return "maeb";
10124}
10125
10126static HChar *
10127s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10128{
10129 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10130
10131 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10132 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10133
10134 return "madb";
10135}
10136
10137static HChar *
10138s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10139{
10140 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10141 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10142
10143 return "msebr";
10144}
10145
10146static HChar *
10147s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10148{
10149 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10150 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10151
10152 return "msdbr";
10153}
10154
10155static HChar *
10156s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10157{
10158 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10159
10160 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10161 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10162
10163 return "mseb";
10164}
10165
10166static HChar *
10167s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10168{
10169 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10170
10171 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10172 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10173
10174 return "msdb";
10175}
10176
10177static HChar *
10178s390_irgen_SQEBR(UChar r1, UChar r2)
10179{
10180 IRTemp result = newTemp(Ity_F32);
10181
10182 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10183 put_fpr_w0(r1, mkexpr(result));
10184
10185 return "sqebr";
10186}
10187
10188static HChar *
10189s390_irgen_SQDBR(UChar r1, UChar r2)
10190{
10191 IRTemp result = newTemp(Ity_F64);
10192
10193 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10194 put_fpr_dw0(r1, mkexpr(result));
10195
10196 return "sqdbr";
10197}
10198
10199static HChar *
10200s390_irgen_SQXBR(UChar r1, UChar r2)
10201{
10202 IRTemp result = newTemp(Ity_F128);
10203
10204 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10205 put_fpr_pair(r1, mkexpr(result));
10206
10207 return "sqxbr";
10208}
10209
10210static HChar *
10211s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10212{
10213 IRTemp op = newTemp(Ity_F32);
10214
10215 assign(op, load(Ity_F32, mkexpr(op2addr)));
10216 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10217
10218 return "sqeb";
10219}
10220
10221static HChar *
10222s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10223{
10224 IRTemp op = newTemp(Ity_F64);
10225
10226 assign(op, load(Ity_F64, mkexpr(op2addr)));
10227 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10228
10229 return "sqdb";
10230}
10231
10232static HChar *
10233s390_irgen_SXBR(UChar r1, UChar r2)
10234{
10235 IRTemp op1 = newTemp(Ity_F128);
10236 IRTemp op2 = newTemp(Ity_F128);
10237 IRTemp result = newTemp(Ity_F128);
10238
10239 assign(op1, get_fpr_pair(r1));
10240 assign(op2, get_fpr_pair(r2));
10241 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10242 mkexpr(op2)));
10243 put_fpr_pair(r1, mkexpr(result));
10244 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10245
10246 return "sxbr";
10247}
10248
10249static HChar *
10250s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10251{
10252 IRTemp value = newTemp(Ity_F32);
10253
10254 assign(value, get_fpr_w0(r1));
10255
10256 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10257
10258 return "tceb";
10259}
10260
10261static HChar *
10262s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10263{
10264 IRTemp value = newTemp(Ity_F64);
10265
10266 assign(value, get_fpr_dw0(r1));
10267
10268 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10269
10270 return "tcdb";
10271}
10272
10273static HChar *
10274s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10275{
10276 IRTemp value = newTemp(Ity_F128);
10277
10278 assign(value, get_fpr_pair(r1));
10279
10280 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10281
10282 return "tcxb";
10283}
10284
10285static HChar *
10286s390_irgen_LCDFR(UChar r1, UChar r2)
10287{
10288 IRTemp result = newTemp(Ity_F64);
10289
10290 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10291 put_fpr_dw0(r1, mkexpr(result));
10292
10293 return "lcdfr";
10294}
10295
10296static HChar *
10297s390_irgen_LNDFR(UChar r1, UChar r2)
10298{
10299 IRTemp result = newTemp(Ity_F64);
10300
10301 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10302 put_fpr_dw0(r1, mkexpr(result));
10303
10304 return "lndfr";
10305}
10306
10307static HChar *
10308s390_irgen_LPDFR(UChar r1, UChar r2)
10309{
10310 IRTemp result = newTemp(Ity_F64);
10311
10312 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10313 put_fpr_dw0(r1, mkexpr(result));
10314
10315 return "lpdfr";
10316}
10317
10318static HChar *
10319s390_irgen_LDGR(UChar r1, UChar r2)
10320{
10321 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10322
10323 return "ldgr";
10324}
10325
10326static HChar *
10327s390_irgen_LGDR(UChar r1, UChar r2)
10328{
10329 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10330
10331 return "lgdr";
10332}
10333
10334
10335static HChar *
10336s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10337{
10338 IRTemp sign = newTemp(Ity_I64);
10339 IRTemp value = newTemp(Ity_I64);
10340
10341 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10342 mkU64(1ULL << 63)));
10343 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10344 mkU64((1ULL << 63) - 1)));
10345 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10346 mkexpr(sign))));
10347
10348 return "cpsdr";
10349}
10350
10351
10352static UInt
10353s390_do_cvb(ULong decimal)
10354{
10355#if defined(VGA_s390x)
10356 UInt binary;
10357
10358 __asm__ volatile (
10359 "cvb %[result],%[input]\n\t"
10360 : [result] "=d"(binary)
10361 : [input] "m"(decimal)
10362 );
10363
10364 return binary;
10365#else
10366 return 0;
10367#endif
10368}
10369
10370static IRExpr *
10371s390_call_cvb(IRExpr *in)
10372{
10373 IRExpr **args, *call;
10374
10375 args = mkIRExprVec_1(in);
10376 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10377 "s390_do_cvb", &s390_do_cvb, args);
10378
10379 /* Nothing is excluded from definedness checking. */
10380 call->Iex.CCall.cee->mcx_mask = 0;
10381
10382 return call;
10383}
10384
10385static HChar *
10386s390_irgen_CVB(UChar r1, IRTemp op2addr)
10387{
10388 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10389
10390 return "cvb";
10391}
10392
10393static HChar *
10394s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10395{
10396 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10397
10398 return "cvby";
10399}
10400
10401
10402static ULong
10403s390_do_cvd(ULong binary_in)
10404{
10405#if defined(VGA_s390x)
10406 UInt binary = binary_in & 0xffffffffULL;
10407 ULong decimal;
10408
10409 __asm__ volatile (
10410 "cvd %[input],%[result]\n\t"
10411 : [result] "=m"(decimal)
10412 : [input] "d"(binary)
10413 );
10414
10415 return decimal;
10416#else
10417 return 0;
10418#endif
10419}
10420
10421static IRExpr *
10422s390_call_cvd(IRExpr *in)
10423{
10424 IRExpr **args, *call;
10425
10426 args = mkIRExprVec_1(in);
10427 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10428 "s390_do_cvd", &s390_do_cvd, args);
10429
10430 /* Nothing is excluded from definedness checking. */
10431 call->Iex.CCall.cee->mcx_mask = 0;
10432
10433 return call;
10434}
10435
10436static HChar *
10437s390_irgen_CVD(UChar r1, IRTemp op2addr)
10438{
10439 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10440
10441 return "cvd";
10442}
10443
10444static HChar *
10445s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10446{
10447 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10448
10449 return "cvdy";
10450}
10451
10452static HChar *
10453s390_irgen_FLOGR(UChar r1, UChar r2)
10454{
10455 IRTemp input = newTemp(Ity_I64);
10456 IRTemp not_zero = newTemp(Ity_I64);
10457 IRTemp tmpnum = newTemp(Ity_I64);
10458 IRTemp num = newTemp(Ity_I64);
10459 IRTemp shift_amount = newTemp(Ity_I8);
10460
10461 /* We use the "count leading zeroes" operator because the number of
10462 leading zeroes is identical with the bit position of the first '1' bit.
10463 However, that operator does not work when the input value is zero.
10464 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10465 the modified value. If input == 0, then the result is 64. Otherwise,
10466 the result of Clz64 is what we want. */
10467
10468 assign(input, get_gpr_dw0(r2));
10469 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10470 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10471
10472 /* num = (input == 0) ? 64 : tmpnum */
10473 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10474 /* == 0 */ mkU64(64),
10475 /* != 0 */ mkexpr(tmpnum)));
10476
10477 put_gpr_dw0(r1, mkexpr(num));
10478
10479 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10480 is to first shift the input value by NUM + 1 bits to the left which
10481 causes the leftmost '1' bit to disappear. Then we shift logically to
10482 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10483 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10484 the width of the value-to-be-shifted, we need to special case
10485 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10486 For both such INPUT values the result will be 0. */
10487
10488 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10489 mkU64(1))));
10490
10491 put_gpr_dw0(r1 + 1,
10492 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10493 /* == 0 || == 1*/ mkU64(0),
10494 /* otherwise */
10495 binop(Iop_Shr64,
10496 binop(Iop_Shl64, mkexpr(input),
10497 mkexpr(shift_amount)),
10498 mkexpr(shift_amount))));
10499
10500 /* Compare the original value as an unsigned integer with 0. */
10501 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10502 mktemp(Ity_I64, mkU64(0)), False);
10503
10504 return "flogr";
10505}
10506
sewardj1e5fea62011-05-17 16:18:36 +000010507static HChar *
10508s390_irgen_STCK(IRTemp op2addr)
10509{
10510 IRDirty *d;
10511 IRTemp cc = newTemp(Ity_I64);
10512
10513 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
10514 &s390x_dirtyhelper_STCK,
10515 mkIRExprVec_1(mkexpr(op2addr)));
10516 d->mFx = Ifx_Write;
10517 d->mAddr = mkexpr(op2addr);
10518 d->mSize = 8;
10519 stmt(IRStmt_Dirty(d));
10520 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10521 mkexpr(cc), mkU64(0), mkU64(0));
10522 return "stck";
10523}
10524
10525static HChar *
10526s390_irgen_STCKF(IRTemp op2addr)
10527{
10528 IRDirty *d;
10529 IRTemp cc = newTemp(Ity_I64);
10530
10531 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
10532 &s390x_dirtyhelper_STCKF,
10533 mkIRExprVec_1(mkexpr(op2addr)));
10534 d->mFx = Ifx_Write;
10535 d->mAddr = mkexpr(op2addr);
10536 d->mSize = 8;
10537 stmt(IRStmt_Dirty(d));
10538 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10539 mkexpr(cc), mkU64(0), mkU64(0));
10540 return "stckf";
10541}
10542
10543static HChar *
10544s390_irgen_STCKE(IRTemp op2addr)
10545{
10546 IRDirty *d;
10547 IRTemp cc = newTemp(Ity_I64);
10548
10549 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
10550 &s390x_dirtyhelper_STCKE,
10551 mkIRExprVec_1(mkexpr(op2addr)));
10552 d->mFx = Ifx_Write;
10553 d->mAddr = mkexpr(op2addr);
10554 d->mSize = 16;
10555 stmt(IRStmt_Dirty(d));
10556 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10557 mkexpr(cc), mkU64(0), mkU64(0));
10558 return "stcke";
10559}
10560
sewardj2019a972011-03-07 16:04:07 +000010561/*------------------------------------------------------------*/
10562/*--- Build IR for special instructions ---*/
10563/*------------------------------------------------------------*/
10564
florianb4df7682011-07-05 02:09:01 +000010565static void
sewardj2019a972011-03-07 16:04:07 +000010566s390_irgen_client_request(void)
10567{
10568 if (0)
10569 vex_printf("%%R3 = client_request ( %%R2 )\n");
10570
10571 irsb->next = mkU64((ULong)(guest_IA_curr_instr
10572 + S390_SPECIAL_OP_PREAMBLE_SIZE
10573 + S390_SPECIAL_OP_SIZE));
10574 irsb->jumpkind = Ijk_ClientReq;
10575
10576 dis_res->whatNext = Dis_StopHere;
10577}
10578
florianb4df7682011-07-05 02:09:01 +000010579static void
sewardj2019a972011-03-07 16:04:07 +000010580s390_irgen_guest_NRADDR(void)
10581{
10582 if (0)
10583 vex_printf("%%R3 = guest_NRADDR\n");
10584
floriane88b3c92011-07-05 02:48:39 +000010585 put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
sewardj2019a972011-03-07 16:04:07 +000010586}
10587
florianb4df7682011-07-05 02:09:01 +000010588static void
sewardj2019a972011-03-07 16:04:07 +000010589s390_irgen_call_noredir(void)
10590{
10591 /* Continue after special op */
10592 put_gpr_dw0(14, mkU64(guest_IA_curr_instr
10593 + S390_SPECIAL_OP_PREAMBLE_SIZE
10594 + S390_SPECIAL_OP_SIZE));
10595
10596 /* The address is in REG1, all parameters are in the right (guest) places */
10597 irsb->next = get_gpr_dw0(1);
10598 irsb->jumpkind = Ijk_NoRedir;
10599
10600 dis_res->whatNext = Dis_StopHere;
10601}
10602
10603/* Force proper alignment for the structures below. */
10604#pragma pack(1)
10605
10606
10607static s390_decode_t
10608s390_decode_2byte_and_irgen(UChar *bytes)
10609{
10610 typedef union {
10611 struct {
10612 unsigned int op : 16;
10613 } E;
10614 struct {
10615 unsigned int op : 8;
10616 unsigned int i : 8;
10617 } I;
10618 struct {
10619 unsigned int op : 8;
10620 unsigned int r1 : 4;
10621 unsigned int r2 : 4;
10622 } RR;
10623 } formats;
10624 union {
10625 formats fmt;
10626 UShort value;
10627 } ovl;
10628
10629 vassert(sizeof(formats) == 2);
10630
10631 ((char *)(&ovl.value))[0] = bytes[0];
10632 ((char *)(&ovl.value))[1] = bytes[1];
10633
10634 switch (ovl.value & 0xffff) {
10635 case 0x0101: /* PR */ goto unimplemented;
10636 case 0x0102: /* UPT */ goto unimplemented;
10637 case 0x0104: /* PTFF */ goto unimplemented;
10638 case 0x0107: /* SCKPF */ goto unimplemented;
10639 case 0x010a: /* PFPO */ goto unimplemented;
10640 case 0x010b: /* TAM */ goto unimplemented;
10641 case 0x010c: /* SAM24 */ goto unimplemented;
10642 case 0x010d: /* SAM31 */ goto unimplemented;
10643 case 0x010e: /* SAM64 */ goto unimplemented;
10644 case 0x01ff: /* TRAP2 */ goto unimplemented;
10645 }
10646
10647 switch ((ovl.value & 0xff00) >> 8) {
10648 case 0x04: /* SPM */ goto unimplemented;
10649 case 0x05: /* BALR */ goto unimplemented;
10650 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10651 goto ok;
10652 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10653 goto ok;
10654 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
10655 case 0x0b: /* BSM */ goto unimplemented;
10656 case 0x0c: /* BASSM */ goto unimplemented;
10657 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10658 goto ok;
10659 case 0x0e: /* MVCL */ goto unimplemented;
10660 case 0x0f: /* CLCL */ goto unimplemented;
10661 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10662 goto ok;
10663 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10664 goto ok;
10665 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10666 goto ok;
10667 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10668 goto ok;
10669 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10670 goto ok;
10671 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10672 goto ok;
10673 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10674 goto ok;
10675 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10676 goto ok;
10677 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10678 goto ok;
10679 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10680 goto ok;
10681 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10682 goto ok;
10683 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10684 goto ok;
10685 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10686 goto ok;
10687 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10688 goto ok;
10689 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10690 goto ok;
10691 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10692 goto ok;
10693 case 0x20: /* LPDR */ goto unimplemented;
10694 case 0x21: /* LNDR */ goto unimplemented;
10695 case 0x22: /* LTDR */ goto unimplemented;
10696 case 0x23: /* LCDR */ goto unimplemented;
10697 case 0x24: /* HDR */ goto unimplemented;
10698 case 0x25: /* LDXR */ goto unimplemented;
10699 case 0x26: /* MXR */ goto unimplemented;
10700 case 0x27: /* MXDR */ goto unimplemented;
10701 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10702 goto ok;
10703 case 0x29: /* CDR */ goto unimplemented;
10704 case 0x2a: /* ADR */ goto unimplemented;
10705 case 0x2b: /* SDR */ goto unimplemented;
10706 case 0x2c: /* MDR */ goto unimplemented;
10707 case 0x2d: /* DDR */ goto unimplemented;
10708 case 0x2e: /* AWR */ goto unimplemented;
10709 case 0x2f: /* SWR */ goto unimplemented;
10710 case 0x30: /* LPER */ goto unimplemented;
10711 case 0x31: /* LNER */ goto unimplemented;
10712 case 0x32: /* LTER */ goto unimplemented;
10713 case 0x33: /* LCER */ goto unimplemented;
10714 case 0x34: /* HER */ goto unimplemented;
10715 case 0x35: /* LEDR */ goto unimplemented;
10716 case 0x36: /* AXR */ goto unimplemented;
10717 case 0x37: /* SXR */ goto unimplemented;
10718 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10719 goto ok;
10720 case 0x39: /* CER */ goto unimplemented;
10721 case 0x3a: /* AER */ goto unimplemented;
10722 case 0x3b: /* SER */ goto unimplemented;
10723 case 0x3c: /* MDER */ goto unimplemented;
10724 case 0x3d: /* DER */ goto unimplemented;
10725 case 0x3e: /* AUR */ goto unimplemented;
10726 case 0x3f: /* SUR */ goto unimplemented;
10727 }
10728
10729 return S390_DECODE_UNKNOWN_INSN;
10730
10731ok:
10732 return S390_DECODE_OK;
10733
10734unimplemented:
10735 return S390_DECODE_UNIMPLEMENTED_INSN;
10736}
10737
10738static s390_decode_t
10739s390_decode_4byte_and_irgen(UChar *bytes)
10740{
10741 typedef union {
10742 struct {
10743 unsigned int op1 : 8;
10744 unsigned int r1 : 4;
10745 unsigned int op2 : 4;
10746 unsigned int i2 : 16;
10747 } RI;
10748 struct {
10749 unsigned int op : 16;
10750 unsigned int : 8;
10751 unsigned int r1 : 4;
10752 unsigned int r2 : 4;
10753 } RRE;
10754 struct {
10755 unsigned int op : 16;
10756 unsigned int r1 : 4;
10757 unsigned int : 4;
10758 unsigned int r3 : 4;
10759 unsigned int r2 : 4;
10760 } RRF;
10761 struct {
10762 unsigned int op : 16;
10763 unsigned int r3 : 4;
10764 unsigned int m4 : 4;
10765 unsigned int r1 : 4;
10766 unsigned int r2 : 4;
10767 } RRF2;
10768 struct {
10769 unsigned int op : 16;
10770 unsigned int r3 : 4;
10771 unsigned int : 4;
10772 unsigned int r1 : 4;
10773 unsigned int r2 : 4;
10774 } RRF3;
10775 struct {
10776 unsigned int op : 16;
10777 unsigned int r3 : 4;
10778 unsigned int : 4;
10779 unsigned int r1 : 4;
10780 unsigned int r2 : 4;
10781 } RRR;
10782 struct {
10783 unsigned int op : 16;
10784 unsigned int r3 : 4;
10785 unsigned int : 4;
10786 unsigned int r1 : 4;
10787 unsigned int r2 : 4;
10788 } RRF4;
10789 struct {
10790 unsigned int op : 8;
10791 unsigned int r1 : 4;
10792 unsigned int r3 : 4;
10793 unsigned int b2 : 4;
10794 unsigned int d2 : 12;
10795 } RS;
10796 struct {
10797 unsigned int op : 8;
10798 unsigned int r1 : 4;
10799 unsigned int r3 : 4;
10800 unsigned int i2 : 16;
10801 } RSI;
10802 struct {
10803 unsigned int op : 8;
10804 unsigned int r1 : 4;
10805 unsigned int x2 : 4;
10806 unsigned int b2 : 4;
10807 unsigned int d2 : 12;
10808 } RX;
10809 struct {
10810 unsigned int op : 16;
10811 unsigned int b2 : 4;
10812 unsigned int d2 : 12;
10813 } S;
10814 struct {
10815 unsigned int op : 8;
10816 unsigned int i2 : 8;
10817 unsigned int b1 : 4;
10818 unsigned int d1 : 12;
10819 } SI;
10820 } formats;
10821 union {
10822 formats fmt;
10823 UInt value;
10824 } ovl;
10825
10826 vassert(sizeof(formats) == 4);
10827
10828 ((char *)(&ovl.value))[0] = bytes[0];
10829 ((char *)(&ovl.value))[1] = bytes[1];
10830 ((char *)(&ovl.value))[2] = bytes[2];
10831 ((char *)(&ovl.value))[3] = bytes[3];
10832
10833 switch ((ovl.value & 0xff0f0000) >> 16) {
10834 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
10835 ovl.fmt.RI.i2); goto ok;
10836 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
10837 ovl.fmt.RI.i2); goto ok;
10838 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
10839 ovl.fmt.RI.i2); goto ok;
10840 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
10841 ovl.fmt.RI.i2); goto ok;
10842 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
10843 ovl.fmt.RI.i2); goto ok;
10844 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
10845 ovl.fmt.RI.i2); goto ok;
10846 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
10847 ovl.fmt.RI.i2); goto ok;
10848 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
10849 ovl.fmt.RI.i2); goto ok;
10850 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
10851 ovl.fmt.RI.i2); goto ok;
10852 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
10853 ovl.fmt.RI.i2); goto ok;
10854 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
10855 ovl.fmt.RI.i2); goto ok;
10856 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
10857 ovl.fmt.RI.i2); goto ok;
10858 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
10859 ovl.fmt.RI.i2); goto ok;
10860 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
10861 ovl.fmt.RI.i2); goto ok;
10862 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
10863 ovl.fmt.RI.i2); goto ok;
10864 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
10865 ovl.fmt.RI.i2); goto ok;
10866 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
10867 ovl.fmt.RI.i2); goto ok;
10868 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
10869 ovl.fmt.RI.i2); goto ok;
10870 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
10871 ovl.fmt.RI.i2); goto ok;
10872 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
10873 ovl.fmt.RI.i2); goto ok;
10874 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10875 goto ok;
10876 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
10877 ovl.fmt.RI.i2); goto ok;
10878 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
10879 ovl.fmt.RI.i2); goto ok;
10880 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
10881 ovl.fmt.RI.i2); goto ok;
10882 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10883 goto ok;
10884 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
10885 ovl.fmt.RI.i2); goto ok;
10886 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10887 goto ok;
10888 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
10889 ovl.fmt.RI.i2); goto ok;
10890 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10891 goto ok;
10892 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
10893 ovl.fmt.RI.i2); goto ok;
10894 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10895 goto ok;
10896 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
10897 ovl.fmt.RI.i2); goto ok;
10898 }
10899
10900 switch ((ovl.value & 0xffff0000) >> 16) {
10901 case 0x8000: /* SSM */ goto unimplemented;
10902 case 0x8200: /* LPSW */ goto unimplemented;
10903 case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2);
10904 goto ok;
10905 case 0xb202: /* STIDP */ goto unimplemented;
10906 case 0xb204: /* SCK */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000010907 case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000010908 case 0xb206: /* SCKC */ goto unimplemented;
10909 case 0xb207: /* STCKC */ goto unimplemented;
10910 case 0xb208: /* SPT */ goto unimplemented;
10911 case 0xb209: /* STPT */ goto unimplemented;
10912 case 0xb20a: /* SPKA */ goto unimplemented;
10913 case 0xb20b: /* IPK */ goto unimplemented;
10914 case 0xb20d: /* PTLB */ goto unimplemented;
10915 case 0xb210: /* SPX */ goto unimplemented;
10916 case 0xb211: /* STPX */ goto unimplemented;
10917 case 0xb212: /* STAP */ goto unimplemented;
10918 case 0xb214: /* SIE */ goto unimplemented;
10919 case 0xb218: /* PC */ goto unimplemented;
10920 case 0xb219: /* SAC */ goto unimplemented;
10921 case 0xb21a: /* CFC */ goto unimplemented;
10922 case 0xb221: /* IPTE */ goto unimplemented;
10923 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
10924 case 0xb223: /* IVSK */ goto unimplemented;
10925 case 0xb224: /* IAC */ goto unimplemented;
10926 case 0xb225: /* SSAR */ goto unimplemented;
10927 case 0xb226: /* EPAR */ goto unimplemented;
10928 case 0xb227: /* ESAR */ goto unimplemented;
10929 case 0xb228: /* PT */ goto unimplemented;
10930 case 0xb229: /* ISKE */ goto unimplemented;
10931 case 0xb22a: /* RRBE */ goto unimplemented;
10932 case 0xb22b: /* SSKE */ goto unimplemented;
10933 case 0xb22c: /* TB */ goto unimplemented;
10934 case 0xb22d: /* DXR */ goto unimplemented;
10935 case 0xb22e: /* PGIN */ goto unimplemented;
10936 case 0xb22f: /* PGOUT */ goto unimplemented;
10937 case 0xb230: /* CSCH */ goto unimplemented;
10938 case 0xb231: /* HSCH */ goto unimplemented;
10939 case 0xb232: /* MSCH */ goto unimplemented;
10940 case 0xb233: /* SSCH */ goto unimplemented;
10941 case 0xb234: /* STSCH */ goto unimplemented;
10942 case 0xb235: /* TSCH */ goto unimplemented;
10943 case 0xb236: /* TPI */ goto unimplemented;
10944 case 0xb237: /* SAL */ goto unimplemented;
10945 case 0xb238: /* RSCH */ goto unimplemented;
10946 case 0xb239: /* STCRW */ goto unimplemented;
10947 case 0xb23a: /* STCPS */ goto unimplemented;
10948 case 0xb23b: /* RCHP */ goto unimplemented;
10949 case 0xb23c: /* SCHM */ goto unimplemented;
10950 case 0xb240: /* BAKR */ goto unimplemented;
10951 case 0xb241: /* CKSM */ goto unimplemented;
10952 case 0xb244: /* SQDR */ goto unimplemented;
10953 case 0xb245: /* SQER */ goto unimplemented;
10954 case 0xb246: /* STURA */ goto unimplemented;
10955 case 0xb247: /* MSTA */ goto unimplemented;
10956 case 0xb248: /* PALB */ goto unimplemented;
10957 case 0xb249: /* EREG */ goto unimplemented;
10958 case 0xb24a: /* ESTA */ goto unimplemented;
10959 case 0xb24b: /* LURA */ goto unimplemented;
10960 case 0xb24c: /* TAR */ goto unimplemented;
10961 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
10962 ovl.fmt.RRE.r2); goto ok;
10963 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
10964 goto ok;
10965 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
10966 goto ok;
10967 case 0xb250: /* CSP */ goto unimplemented;
10968 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
10969 ovl.fmt.RRE.r2); goto ok;
10970 case 0xb254: /* MVPG */ goto unimplemented;
10971 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
10972 ovl.fmt.RRE.r2); goto ok;
10973 case 0xb257: /* CUSE */ goto unimplemented;
10974 case 0xb258: /* BSG */ goto unimplemented;
10975 case 0xb25a: /* BSA */ goto unimplemented;
10976 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
10977 ovl.fmt.RRE.r2); goto ok;
10978 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
10979 ovl.fmt.RRE.r2); goto ok;
10980 case 0xb263: /* CMPSC */ goto unimplemented;
10981 case 0xb274: /* SIGA */ goto unimplemented;
10982 case 0xb276: /* XSCH */ goto unimplemented;
10983 case 0xb277: /* RP */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000010984 case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000010985 case 0xb279: /* SACF */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000010986 case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000010987 case 0xb27d: /* STSI */ goto unimplemented;
10988 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
10989 goto ok;
10990 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
10991 goto ok;
10992 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
10993 goto ok;
10994 case 0xb2a5: /* TRE */ goto unimplemented;
10995 case 0xb2a6: /* CU21 */ goto unimplemented;
10996 case 0xb2a7: /* CU12 */ goto unimplemented;
10997 case 0xb2b0: /* STFLE */ goto unimplemented;
10998 case 0xb2b1: /* STFL */ goto unimplemented;
10999 case 0xb2b2: /* LPSWE */ goto unimplemented;
11000 case 0xb2b8: /* SRNMB */ goto unimplemented;
11001 case 0xb2b9: /* SRNMT */ goto unimplemented;
11002 case 0xb2bd: /* LFAS */ goto unimplemented;
11003 case 0xb2ff: /* TRAP4 */ goto unimplemented;
11004 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
11005 ovl.fmt.RRE.r2); goto ok;
11006 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
11007 ovl.fmt.RRE.r2); goto ok;
11008 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
11009 ovl.fmt.RRE.r2); goto ok;
11010 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
11011 ovl.fmt.RRE.r2); goto ok;
11012 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
11013 ovl.fmt.RRE.r2); goto ok;
11014 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
11015 ovl.fmt.RRE.r2); goto ok;
11016 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
11017 ovl.fmt.RRE.r2); goto ok;
11018 case 0xb307: /* MXDBR */ goto unimplemented;
11019 case 0xb308: /* KEBR */ goto unimplemented;
11020 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
11021 ovl.fmt.RRE.r2); goto ok;
11022 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
11023 ovl.fmt.RRE.r2); goto ok;
11024 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
11025 ovl.fmt.RRE.r2); goto ok;
11026 case 0xb30c: /* MDEBR */ goto unimplemented;
11027 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
11028 ovl.fmt.RRE.r2); goto ok;
11029 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
11030 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11031 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
11032 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11033 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
11034 ovl.fmt.RRE.r2); goto ok;
11035 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
11036 ovl.fmt.RRE.r2); goto ok;
11037 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
11038 ovl.fmt.RRE.r2); goto ok;
11039 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
11040 ovl.fmt.RRE.r2); goto ok;
11041 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
11042 ovl.fmt.RRE.r2); goto ok;
11043 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
11044 ovl.fmt.RRE.r2); goto ok;
11045 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
11046 ovl.fmt.RRE.r2); goto ok;
11047 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
11048 ovl.fmt.RRE.r2); goto ok;
11049 case 0xb318: /* KDBR */ goto unimplemented;
11050 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
11051 ovl.fmt.RRE.r2); goto ok;
11052 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11053 ovl.fmt.RRE.r2); goto ok;
11054 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11055 ovl.fmt.RRE.r2); goto ok;
11056 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11057 ovl.fmt.RRE.r2); goto ok;
11058 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11059 ovl.fmt.RRE.r2); goto ok;
11060 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11061 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11062 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11063 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11064 case 0xb324: /* LDER */ goto unimplemented;
11065 case 0xb325: /* LXDR */ goto unimplemented;
11066 case 0xb326: /* LXER */ goto unimplemented;
11067 case 0xb32e: /* MAER */ goto unimplemented;
11068 case 0xb32f: /* MSER */ goto unimplemented;
11069 case 0xb336: /* SQXR */ goto unimplemented;
11070 case 0xb337: /* MEER */ goto unimplemented;
11071 case 0xb338: /* MAYLR */ goto unimplemented;
11072 case 0xb339: /* MYLR */ goto unimplemented;
11073 case 0xb33a: /* MAYR */ goto unimplemented;
11074 case 0xb33b: /* MYR */ goto unimplemented;
11075 case 0xb33c: /* MAYHR */ goto unimplemented;
11076 case 0xb33d: /* MYHR */ goto unimplemented;
11077 case 0xb33e: /* MADR */ goto unimplemented;
11078 case 0xb33f: /* MSDR */ goto unimplemented;
11079 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11080 ovl.fmt.RRE.r2); goto ok;
11081 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11082 ovl.fmt.RRE.r2); goto ok;
11083 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11084 ovl.fmt.RRE.r2); goto ok;
11085 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11086 ovl.fmt.RRE.r2); goto ok;
11087 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11088 ovl.fmt.RRE.r2); goto ok;
11089 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11090 ovl.fmt.RRE.r2); goto ok;
11091 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11092 ovl.fmt.RRE.r2); goto ok;
11093 case 0xb347: /* FIXBR */ goto unimplemented;
11094 case 0xb348: /* KXBR */ goto unimplemented;
11095 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11096 ovl.fmt.RRE.r2); goto ok;
11097 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11098 ovl.fmt.RRE.r2); goto ok;
11099 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11100 ovl.fmt.RRE.r2); goto ok;
11101 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11102 ovl.fmt.RRE.r2); goto ok;
11103 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11104 ovl.fmt.RRE.r2); goto ok;
11105 case 0xb350: /* TBEDR */ goto unimplemented;
11106 case 0xb351: /* TBDR */ goto unimplemented;
11107 case 0xb353: /* DIEBR */ goto unimplemented;
11108 case 0xb357: /* FIEBR */ goto unimplemented;
11109 case 0xb358: /* THDER */ goto unimplemented;
11110 case 0xb359: /* THDR */ goto unimplemented;
11111 case 0xb35b: /* DIDBR */ goto unimplemented;
11112 case 0xb35f: /* FIDBR */ goto unimplemented;
11113 case 0xb360: /* LPXR */ goto unimplemented;
11114 case 0xb361: /* LNXR */ goto unimplemented;
11115 case 0xb362: /* LTXR */ goto unimplemented;
11116 case 0xb363: /* LCXR */ goto unimplemented;
11117 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11118 ovl.fmt.RRE.r2); goto ok;
11119 case 0xb366: /* LEXR */ goto unimplemented;
11120 case 0xb367: /* FIXR */ goto unimplemented;
11121 case 0xb369: /* CXR */ goto unimplemented;
11122 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11123 ovl.fmt.RRE.r2); goto ok;
11124 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11125 ovl.fmt.RRE.r2); goto ok;
11126 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11127 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11128 goto ok;
11129 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11130 ovl.fmt.RRE.r2); goto ok;
11131 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11132 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11133 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11134 case 0xb377: /* FIER */ goto unimplemented;
11135 case 0xb37f: /* FIDR */ goto unimplemented;
11136 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11137 case 0xb385: /* SFASR */ goto unimplemented;
11138 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11139 case 0xb390: /* CELFBR */ goto unimplemented;
11140 case 0xb391: /* CDLFBR */ goto unimplemented;
11141 case 0xb392: /* CXLFBR */ goto unimplemented;
11142 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11143 ovl.fmt.RRE.r2); goto ok;
11144 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11145 ovl.fmt.RRE.r2); goto ok;
11146 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11147 ovl.fmt.RRE.r2); goto ok;
11148 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11149 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11150 goto ok;
11151 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11152 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11153 goto ok;
11154 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11155 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11156 goto ok;
11157 case 0xb3a0: /* CELGBR */ goto unimplemented;
11158 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11159 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11160 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11161 ovl.fmt.RRE.r2); goto ok;
11162 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11163 ovl.fmt.RRE.r2); goto ok;
11164 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11165 ovl.fmt.RRE.r2); goto ok;
11166 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11167 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11168 goto ok;
11169 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11170 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11171 goto ok;
11172 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11173 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11174 goto ok;
11175 case 0xb3b4: /* CEFR */ goto unimplemented;
11176 case 0xb3b5: /* CDFR */ goto unimplemented;
11177 case 0xb3b6: /* CXFR */ goto unimplemented;
11178 case 0xb3b8: /* CFER */ goto unimplemented;
11179 case 0xb3b9: /* CFDR */ goto unimplemented;
11180 case 0xb3ba: /* CFXR */ goto unimplemented;
11181 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11182 ovl.fmt.RRE.r2); goto ok;
11183 case 0xb3c4: /* CEGR */ goto unimplemented;
11184 case 0xb3c5: /* CDGR */ goto unimplemented;
11185 case 0xb3c6: /* CXGR */ goto unimplemented;
11186 case 0xb3c8: /* CGER */ goto unimplemented;
11187 case 0xb3c9: /* CGDR */ goto unimplemented;
11188 case 0xb3ca: /* CGXR */ goto unimplemented;
11189 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11190 ovl.fmt.RRE.r2); goto ok;
11191 case 0xb3d0: /* MDTR */ goto unimplemented;
11192 case 0xb3d1: /* DDTR */ goto unimplemented;
11193 case 0xb3d2: /* ADTR */ goto unimplemented;
11194 case 0xb3d3: /* SDTR */ goto unimplemented;
11195 case 0xb3d4: /* LDETR */ goto unimplemented;
11196 case 0xb3d5: /* LEDTR */ goto unimplemented;
11197 case 0xb3d6: /* LTDTR */ goto unimplemented;
11198 case 0xb3d7: /* FIDTR */ goto unimplemented;
11199 case 0xb3d8: /* MXTR */ goto unimplemented;
11200 case 0xb3d9: /* DXTR */ goto unimplemented;
11201 case 0xb3da: /* AXTR */ goto unimplemented;
11202 case 0xb3db: /* SXTR */ goto unimplemented;
11203 case 0xb3dc: /* LXDTR */ goto unimplemented;
11204 case 0xb3dd: /* LDXTR */ goto unimplemented;
11205 case 0xb3de: /* LTXTR */ goto unimplemented;
11206 case 0xb3df: /* FIXTR */ goto unimplemented;
11207 case 0xb3e0: /* KDTR */ goto unimplemented;
11208 case 0xb3e1: /* CGDTR */ goto unimplemented;
11209 case 0xb3e2: /* CUDTR */ goto unimplemented;
11210 case 0xb3e3: /* CSDTR */ goto unimplemented;
11211 case 0xb3e4: /* CDTR */ goto unimplemented;
11212 case 0xb3e5: /* EEDTR */ goto unimplemented;
11213 case 0xb3e7: /* ESDTR */ goto unimplemented;
11214 case 0xb3e8: /* KXTR */ goto unimplemented;
11215 case 0xb3e9: /* CGXTR */ goto unimplemented;
11216 case 0xb3ea: /* CUXTR */ goto unimplemented;
11217 case 0xb3eb: /* CSXTR */ goto unimplemented;
11218 case 0xb3ec: /* CXTR */ goto unimplemented;
11219 case 0xb3ed: /* EEXTR */ goto unimplemented;
11220 case 0xb3ef: /* ESXTR */ goto unimplemented;
11221 case 0xb3f1: /* CDGTR */ goto unimplemented;
11222 case 0xb3f2: /* CDUTR */ goto unimplemented;
11223 case 0xb3f3: /* CDSTR */ goto unimplemented;
11224 case 0xb3f4: /* CEDTR */ goto unimplemented;
11225 case 0xb3f5: /* QADTR */ goto unimplemented;
11226 case 0xb3f6: /* IEDTR */ goto unimplemented;
11227 case 0xb3f7: /* RRDTR */ goto unimplemented;
11228 case 0xb3f9: /* CXGTR */ goto unimplemented;
11229 case 0xb3fa: /* CXUTR */ goto unimplemented;
11230 case 0xb3fb: /* CXSTR */ goto unimplemented;
11231 case 0xb3fc: /* CEXTR */ goto unimplemented;
11232 case 0xb3fd: /* QAXTR */ goto unimplemented;
11233 case 0xb3fe: /* IEXTR */ goto unimplemented;
11234 case 0xb3ff: /* RRXTR */ goto unimplemented;
11235 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11236 ovl.fmt.RRE.r2); goto ok;
11237 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11238 ovl.fmt.RRE.r2); goto ok;
11239 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11240 ovl.fmt.RRE.r2); goto ok;
11241 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11242 ovl.fmt.RRE.r2); goto ok;
11243 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11244 ovl.fmt.RRE.r2); goto ok;
11245 case 0xb905: /* LURAG */ goto unimplemented;
11246 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11247 ovl.fmt.RRE.r2); goto ok;
11248 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11249 ovl.fmt.RRE.r2); goto ok;
11250 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11251 ovl.fmt.RRE.r2); goto ok;
11252 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11253 ovl.fmt.RRE.r2); goto ok;
11254 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11255 ovl.fmt.RRE.r2); goto ok;
11256 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11257 ovl.fmt.RRE.r2); goto ok;
11258 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11259 ovl.fmt.RRE.r2); goto ok;
11260 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11261 ovl.fmt.RRE.r2); goto ok;
11262 case 0xb90e: /* EREGG */ goto unimplemented;
11263 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11264 ovl.fmt.RRE.r2); goto ok;
11265 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11266 ovl.fmt.RRE.r2); goto ok;
11267 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11268 ovl.fmt.RRE.r2); goto ok;
11269 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11270 ovl.fmt.RRE.r2); goto ok;
11271 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11272 ovl.fmt.RRE.r2); goto ok;
11273 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11274 ovl.fmt.RRE.r2); goto ok;
11275 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11276 ovl.fmt.RRE.r2); goto ok;
11277 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11278 ovl.fmt.RRE.r2); goto ok;
11279 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11280 ovl.fmt.RRE.r2); goto ok;
11281 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11282 ovl.fmt.RRE.r2); goto ok;
11283 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11284 ovl.fmt.RRE.r2); goto ok;
11285 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11286 ovl.fmt.RRE.r2); goto ok;
11287 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11288 ovl.fmt.RRE.r2); goto ok;
11289 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11290 ovl.fmt.RRE.r2); goto ok;
11291 case 0xb91e: /* KMAC */ goto unimplemented;
11292 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11293 ovl.fmt.RRE.r2); goto ok;
11294 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11295 ovl.fmt.RRE.r2); goto ok;
11296 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11297 ovl.fmt.RRE.r2); goto ok;
11298 case 0xb925: /* STURG */ goto unimplemented;
11299 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11300 ovl.fmt.RRE.r2); goto ok;
11301 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11302 ovl.fmt.RRE.r2); goto ok;
11303 case 0xb928: /* PCKMO */ goto unimplemented;
11304 case 0xb92b: /* KMO */ goto unimplemented;
11305 case 0xb92c: /* PCC */ goto unimplemented;
11306 case 0xb92d: /* KMCTR */ goto unimplemented;
11307 case 0xb92e: /* KM */ goto unimplemented;
11308 case 0xb92f: /* KMC */ goto unimplemented;
11309 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11310 ovl.fmt.RRE.r2); goto ok;
11311 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11312 ovl.fmt.RRE.r2); goto ok;
11313 case 0xb93e: /* KIMD */ goto unimplemented;
11314 case 0xb93f: /* KLMD */ goto unimplemented;
11315 case 0xb941: /* CFDTR */ goto unimplemented;
11316 case 0xb942: /* CLGDTR */ goto unimplemented;
11317 case 0xb943: /* CLFDTR */ goto unimplemented;
11318 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11319 ovl.fmt.RRE.r2); goto ok;
11320 case 0xb949: /* CFXTR */ goto unimplemented;
11321 case 0xb94a: /* CLGXTR */ goto unimplemented;
11322 case 0xb94b: /* CLFXTR */ goto unimplemented;
11323 case 0xb951: /* CDFTR */ goto unimplemented;
11324 case 0xb952: /* CDLGTR */ goto unimplemented;
11325 case 0xb953: /* CDLFTR */ goto unimplemented;
11326 case 0xb959: /* CXFTR */ goto unimplemented;
11327 case 0xb95a: /* CXLGTR */ goto unimplemented;
11328 case 0xb95b: /* CXLFTR */ goto unimplemented;
11329 case 0xb960: /* CGRT */ goto unimplemented;
11330 case 0xb961: /* CLGRT */ goto unimplemented;
11331 case 0xb972: /* CRT */ goto unimplemented;
11332 case 0xb973: /* CLRT */ goto unimplemented;
11333 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11334 ovl.fmt.RRE.r2); goto ok;
11335 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11336 ovl.fmt.RRE.r2); goto ok;
11337 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11338 ovl.fmt.RRE.r2); goto ok;
11339 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11340 ovl.fmt.RRE.r2); goto ok;
11341 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11342 ovl.fmt.RRE.r2); goto ok;
11343 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11344 ovl.fmt.RRE.r2); goto ok;
11345 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11346 ovl.fmt.RRE.r2); goto ok;
11347 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11348 ovl.fmt.RRE.r2); goto ok;
11349 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11350 ovl.fmt.RRE.r2); goto ok;
11351 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11352 ovl.fmt.RRE.r2); goto ok;
11353 case 0xb98a: /* CSPG */ goto unimplemented;
11354 case 0xb98d: /* EPSW */ goto unimplemented;
11355 case 0xb98e: /* IDTE */ goto unimplemented;
11356 case 0xb990: /* TRTT */ goto unimplemented;
11357 case 0xb991: /* TRTO */ goto unimplemented;
11358 case 0xb992: /* TROT */ goto unimplemented;
11359 case 0xb993: /* TROO */ goto unimplemented;
11360 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11361 ovl.fmt.RRE.r2); goto ok;
11362 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11363 ovl.fmt.RRE.r2); goto ok;
11364 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11365 ovl.fmt.RRE.r2); goto ok;
11366 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11367 ovl.fmt.RRE.r2); goto ok;
11368 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11369 ovl.fmt.RRE.r2); goto ok;
11370 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11371 ovl.fmt.RRE.r2); goto ok;
11372 case 0xb99a: /* EPAIR */ goto unimplemented;
11373 case 0xb99b: /* ESAIR */ goto unimplemented;
11374 case 0xb99d: /* ESEA */ goto unimplemented;
11375 case 0xb99e: /* PTI */ goto unimplemented;
11376 case 0xb99f: /* SSAIR */ goto unimplemented;
11377 case 0xb9a2: /* PTF */ goto unimplemented;
11378 case 0xb9aa: /* LPTEA */ goto unimplemented;
11379 case 0xb9ae: /* RRBM */ goto unimplemented;
11380 case 0xb9af: /* PFMF */ goto unimplemented;
11381 case 0xb9b0: /* CU14 */ goto unimplemented;
11382 case 0xb9b1: /* CU24 */ goto unimplemented;
11383 case 0xb9b2: /* CU41 */ goto unimplemented;
11384 case 0xb9b3: /* CU42 */ goto unimplemented;
11385 case 0xb9bd: /* TRTRE */ goto unimplemented;
11386 case 0xb9be: /* SRSTU */ goto unimplemented;
11387 case 0xb9bf: /* TRTE */ goto unimplemented;
11388 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
11389 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11390 goto ok;
11391 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
11392 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11393 goto ok;
11394 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
11395 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11396 goto ok;
11397 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
11398 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11399 goto ok;
11400 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
11401 ovl.fmt.RRE.r2); goto ok;
11402 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
11403 ovl.fmt.RRE.r2); goto ok;
11404 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
11405 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11406 goto ok;
11407 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
11408 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11409 goto ok;
11410 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
11411 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11412 goto ok;
11413 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
11414 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11415 goto ok;
11416 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
11417 ovl.fmt.RRE.r2); goto ok;
11418 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
11419 ovl.fmt.RRE.r2); goto ok;
11420 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000011421 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
11422 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11423 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011424 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
11425 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11426 goto ok;
11427 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
11428 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11429 goto ok;
11430 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
11431 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11432 goto ok;
11433 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
11434 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11435 goto ok;
11436 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
11437 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11438 goto ok;
11439 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
11440 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11441 goto ok;
11442 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
11443 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11444 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000011445 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
11446 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11447 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011448 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
11449 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11450 goto ok;
11451 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
11452 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11453 goto ok;
11454 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
11455 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11456 goto ok;
11457 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
11458 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11459 goto ok;
11460 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
11461 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11462 goto ok;
11463 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
11464 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11465 goto ok;
11466 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
11467 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11468 goto ok;
11469 }
11470
11471 switch ((ovl.value & 0xff000000) >> 24) {
11472 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11473 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11474 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11475 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11476 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11477 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11478 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11479 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11480 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11481 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11482 case 0x45: /* BAL */ goto unimplemented;
11483 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11484 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11485 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11486 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11487 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11488 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11489 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11490 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11491 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11492 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11493 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11494 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11495 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11496 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11497 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11498 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11499 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11500 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11501 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11502 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11503 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11504 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11505 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11506 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11507 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11508 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11509 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11510 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11511 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11512 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11513 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11514 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11515 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11516 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11517 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11518 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11519 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11520 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11521 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11522 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11523 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11524 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11525 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11526 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11527 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11528 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11529 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11530 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11531 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11532 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11533 case 0x67: /* MXD */ goto unimplemented;
11534 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11535 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11536 case 0x69: /* CD */ goto unimplemented;
11537 case 0x6a: /* AD */ goto unimplemented;
11538 case 0x6b: /* SD */ goto unimplemented;
11539 case 0x6c: /* MD */ goto unimplemented;
11540 case 0x6d: /* DD */ goto unimplemented;
11541 case 0x6e: /* AW */ goto unimplemented;
11542 case 0x6f: /* SW */ goto unimplemented;
11543 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11544 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11545 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11546 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11547 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11548 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11549 case 0x79: /* CE */ goto unimplemented;
11550 case 0x7a: /* AE */ goto unimplemented;
11551 case 0x7b: /* SE */ goto unimplemented;
11552 case 0x7c: /* MDE */ goto unimplemented;
11553 case 0x7d: /* DE */ goto unimplemented;
11554 case 0x7e: /* AU */ goto unimplemented;
11555 case 0x7f: /* SU */ goto unimplemented;
11556 case 0x83: /* DIAG */ goto unimplemented;
11557 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
11558 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11559 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
11560 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11561 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11562 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11563 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11564 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11565 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11566 ovl.fmt.RS.d2); goto ok;
11567 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11568 ovl.fmt.RS.d2); goto ok;
11569 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11570 ovl.fmt.RS.d2); goto ok;
11571 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11572 ovl.fmt.RS.d2); goto ok;
11573 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11574 ovl.fmt.RS.d2); goto ok;
11575 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11576 ovl.fmt.RS.d2); goto ok;
11577 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11578 ovl.fmt.RS.d2); goto ok;
11579 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11580 ovl.fmt.RS.d2); goto ok;
11581 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11582 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11583 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11584 ovl.fmt.SI.d1); goto ok;
11585 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11586 ovl.fmt.SI.d1); goto ok;
11587 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11588 ovl.fmt.SI.d1); goto ok;
11589 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11590 ovl.fmt.SI.d1); goto ok;
11591 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11592 ovl.fmt.SI.d1); goto ok;
11593 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11594 ovl.fmt.SI.d1); goto ok;
11595 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11596 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11597 case 0x99: /* TRACE */ goto unimplemented;
11598 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11599 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11600 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11601 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11602 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
11603 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11604 goto ok;
11605 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
11606 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11607 goto ok;
11608 case 0xac: /* STNSM */ goto unimplemented;
11609 case 0xad: /* STOSM */ goto unimplemented;
11610 case 0xae: /* SIGP */ goto unimplemented;
11611 case 0xaf: /* MC */ goto unimplemented;
11612 case 0xb1: /* LRA */ goto unimplemented;
11613 case 0xb6: /* STCTL */ goto unimplemented;
11614 case 0xb7: /* LCTL */ goto unimplemented;
11615 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11616 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11617 case 0xbb: /* CDS */ goto unimplemented;
11618 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11619 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11620 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11621 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11622 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11623 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11624 }
11625
11626 return S390_DECODE_UNKNOWN_INSN;
11627
11628ok:
11629 return S390_DECODE_OK;
11630
11631unimplemented:
11632 return S390_DECODE_UNIMPLEMENTED_INSN;
11633}
11634
11635static s390_decode_t
11636s390_decode_6byte_and_irgen(UChar *bytes)
11637{
11638 typedef union {
11639 struct {
11640 unsigned int op1 : 8;
11641 unsigned int r1 : 4;
11642 unsigned int r3 : 4;
11643 unsigned int i2 : 16;
11644 unsigned int : 8;
11645 unsigned int op2 : 8;
11646 } RIE;
11647 struct {
11648 unsigned int op1 : 8;
11649 unsigned int r1 : 4;
11650 unsigned int r2 : 4;
11651 unsigned int i3 : 8;
11652 unsigned int i4 : 8;
11653 unsigned int i5 : 8;
11654 unsigned int op2 : 8;
11655 } RIE_RRUUU;
11656 struct {
11657 unsigned int op1 : 8;
11658 unsigned int r1 : 4;
11659 unsigned int : 4;
11660 unsigned int i2 : 16;
11661 unsigned int m3 : 4;
11662 unsigned int : 4;
11663 unsigned int op2 : 8;
11664 } RIEv1;
11665 struct {
11666 unsigned int op1 : 8;
11667 unsigned int r1 : 4;
11668 unsigned int r2 : 4;
11669 unsigned int i4 : 16;
11670 unsigned int m3 : 4;
11671 unsigned int : 4;
11672 unsigned int op2 : 8;
11673 } RIE_RRPU;
11674 struct {
11675 unsigned int op1 : 8;
11676 unsigned int r1 : 4;
11677 unsigned int m3 : 4;
11678 unsigned int i4 : 16;
11679 unsigned int i2 : 8;
11680 unsigned int op2 : 8;
11681 } RIEv3;
11682 struct {
11683 unsigned int op1 : 8;
11684 unsigned int r1 : 4;
11685 unsigned int op2 : 4;
11686 unsigned int i2 : 32;
11687 } RIL;
11688 struct {
11689 unsigned int op1 : 8;
11690 unsigned int r1 : 4;
11691 unsigned int m3 : 4;
11692 unsigned int b4 : 4;
11693 unsigned int d4 : 12;
11694 unsigned int i2 : 8;
11695 unsigned int op2 : 8;
11696 } RIS;
11697 struct {
11698 unsigned int op1 : 8;
11699 unsigned int r1 : 4;
11700 unsigned int r2 : 4;
11701 unsigned int b4 : 4;
11702 unsigned int d4 : 12;
11703 unsigned int m3 : 4;
11704 unsigned int : 4;
11705 unsigned int op2 : 8;
11706 } RRS;
11707 struct {
11708 unsigned int op1 : 8;
11709 unsigned int l1 : 4;
11710 unsigned int : 4;
11711 unsigned int b1 : 4;
11712 unsigned int d1 : 12;
11713 unsigned int : 8;
11714 unsigned int op2 : 8;
11715 } RSL;
11716 struct {
11717 unsigned int op1 : 8;
11718 unsigned int r1 : 4;
11719 unsigned int r3 : 4;
11720 unsigned int b2 : 4;
11721 unsigned int dl2 : 12;
11722 unsigned int dh2 : 8;
11723 unsigned int op2 : 8;
11724 } RSY;
11725 struct {
11726 unsigned int op1 : 8;
11727 unsigned int r1 : 4;
11728 unsigned int x2 : 4;
11729 unsigned int b2 : 4;
11730 unsigned int d2 : 12;
11731 unsigned int : 8;
11732 unsigned int op2 : 8;
11733 } RXE;
11734 struct {
11735 unsigned int op1 : 8;
11736 unsigned int r3 : 4;
11737 unsigned int x2 : 4;
11738 unsigned int b2 : 4;
11739 unsigned int d2 : 12;
11740 unsigned int r1 : 4;
11741 unsigned int : 4;
11742 unsigned int op2 : 8;
11743 } RXF;
11744 struct {
11745 unsigned int op1 : 8;
11746 unsigned int r1 : 4;
11747 unsigned int x2 : 4;
11748 unsigned int b2 : 4;
11749 unsigned int dl2 : 12;
11750 unsigned int dh2 : 8;
11751 unsigned int op2 : 8;
11752 } RXY;
11753 struct {
11754 unsigned int op1 : 8;
11755 unsigned int i2 : 8;
11756 unsigned int b1 : 4;
11757 unsigned int dl1 : 12;
11758 unsigned int dh1 : 8;
11759 unsigned int op2 : 8;
11760 } SIY;
11761 struct {
11762 unsigned int op : 8;
11763 unsigned int l : 8;
11764 unsigned int b1 : 4;
11765 unsigned int d1 : 12;
11766 unsigned int b2 : 4;
11767 unsigned int d2 : 12;
11768 } SS;
11769 struct {
11770 unsigned int op : 8;
11771 unsigned int l1 : 4;
11772 unsigned int l2 : 4;
11773 unsigned int b1 : 4;
11774 unsigned int d1 : 12;
11775 unsigned int b2 : 4;
11776 unsigned int d2 : 12;
11777 } SS_LLRDRD;
11778 struct {
11779 unsigned int op : 8;
11780 unsigned int r1 : 4;
11781 unsigned int r3 : 4;
11782 unsigned int b2 : 4;
11783 unsigned int d2 : 12;
11784 unsigned int b4 : 4;
11785 unsigned int d4 : 12;
11786 } SS_RRRDRD2;
11787 struct {
11788 unsigned int op : 16;
11789 unsigned int b1 : 4;
11790 unsigned int d1 : 12;
11791 unsigned int b2 : 4;
11792 unsigned int d2 : 12;
11793 } SSE;
11794 struct {
11795 unsigned int op1 : 8;
11796 unsigned int r3 : 4;
11797 unsigned int op2 : 4;
11798 unsigned int b1 : 4;
11799 unsigned int d1 : 12;
11800 unsigned int b2 : 4;
11801 unsigned int d2 : 12;
11802 } SSF;
11803 struct {
11804 unsigned int op : 16;
11805 unsigned int b1 : 4;
11806 unsigned int d1 : 12;
11807 unsigned int i2 : 16;
11808 } SIL;
11809 } formats;
11810 union {
11811 formats fmt;
11812 ULong value;
11813 } ovl;
11814
11815 vassert(sizeof(formats) == 6);
11816
11817 ((char *)(&ovl.value))[0] = bytes[0];
11818 ((char *)(&ovl.value))[1] = bytes[1];
11819 ((char *)(&ovl.value))[2] = bytes[2];
11820 ((char *)(&ovl.value))[3] = bytes[3];
11821 ((char *)(&ovl.value))[4] = bytes[4];
11822 ((char *)(&ovl.value))[5] = bytes[5];
11823 ((char *)(&ovl.value))[6] = 0x0;
11824 ((char *)(&ovl.value))[7] = 0x0;
11825
11826 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
11827 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
11828 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11829 ovl.fmt.RXY.dl2,
11830 ovl.fmt.RXY.dh2); goto ok;
11831 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
11832 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
11833 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11834 ovl.fmt.RXY.dl2,
11835 ovl.fmt.RXY.dh2); goto ok;
11836 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
11837 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11838 ovl.fmt.RXY.dl2,
11839 ovl.fmt.RXY.dh2); goto ok;
11840 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
11841 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11842 ovl.fmt.RXY.dl2,
11843 ovl.fmt.RXY.dh2); goto ok;
11844 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
11845 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11846 ovl.fmt.RXY.dl2,
11847 ovl.fmt.RXY.dh2); goto ok;
11848 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
11849 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11850 ovl.fmt.RXY.dl2,
11851 ovl.fmt.RXY.dh2); goto ok;
11852 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
11853 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11854 ovl.fmt.RXY.dl2,
11855 ovl.fmt.RXY.dh2); goto ok;
11856 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
11857 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11858 ovl.fmt.RXY.dl2,
11859 ovl.fmt.RXY.dh2); goto ok;
11860 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
11861 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11862 ovl.fmt.RXY.dl2,
11863 ovl.fmt.RXY.dh2); goto ok;
11864 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
11865 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
11866 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11867 ovl.fmt.RXY.dl2,
11868 ovl.fmt.RXY.dh2); goto ok;
11869 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
11870 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11871 ovl.fmt.RXY.dl2,
11872 ovl.fmt.RXY.dh2); goto ok;
11873 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
11874 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
11875 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11876 ovl.fmt.RXY.dl2,
11877 ovl.fmt.RXY.dh2); goto ok;
11878 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
11879 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11880 ovl.fmt.RXY.dl2,
11881 ovl.fmt.RXY.dh2); goto ok;
11882 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
11883 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11884 ovl.fmt.RXY.dl2,
11885 ovl.fmt.RXY.dh2); goto ok;
11886 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
11887 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11888 ovl.fmt.RXY.dl2,
11889 ovl.fmt.RXY.dh2); goto ok;
11890 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
11891 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11892 ovl.fmt.RXY.dl2,
11893 ovl.fmt.RXY.dh2); goto ok;
11894 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
11895 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11896 ovl.fmt.RXY.dl2,
11897 ovl.fmt.RXY.dh2); goto ok;
11898 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
11899 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11900 ovl.fmt.RXY.dl2,
11901 ovl.fmt.RXY.dh2); goto ok;
11902 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
11903 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11904 ovl.fmt.RXY.dl2,
11905 ovl.fmt.RXY.dh2); goto ok;
11906 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
11907 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11908 ovl.fmt.RXY.dl2,
11909 ovl.fmt.RXY.dh2); goto ok;
11910 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
11911 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11912 ovl.fmt.RXY.dl2,
11913 ovl.fmt.RXY.dh2); goto ok;
11914 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
11915 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11916 ovl.fmt.RXY.dl2,
11917 ovl.fmt.RXY.dh2); goto ok;
11918 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
11919 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11920 ovl.fmt.RXY.dl2,
11921 ovl.fmt.RXY.dh2); goto ok;
11922 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
11923 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11924 ovl.fmt.RXY.dl2,
11925 ovl.fmt.RXY.dh2); goto ok;
11926 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
11927 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11928 ovl.fmt.RXY.dl2,
11929 ovl.fmt.RXY.dh2); goto ok;
11930 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
11931 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11932 ovl.fmt.RXY.dl2,
11933 ovl.fmt.RXY.dh2); goto ok;
11934 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
11935 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11936 ovl.fmt.RXY.dl2,
11937 ovl.fmt.RXY.dh2); goto ok;
11938 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
11939 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
11940 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
11941 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
11942 ovl.fmt.RXY.dh2); goto ok;
11943 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
11944 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11945 ovl.fmt.RXY.dl2,
11946 ovl.fmt.RXY.dh2); goto ok;
11947 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
11948 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11949 ovl.fmt.RXY.dl2,
11950 ovl.fmt.RXY.dh2); goto ok;
11951 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
11952 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11953 ovl.fmt.RXY.dl2,
11954 ovl.fmt.RXY.dh2); goto ok;
11955 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
11956 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11957 ovl.fmt.RXY.dl2,
11958 ovl.fmt.RXY.dh2); goto ok;
11959 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
11960 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11961 ovl.fmt.RXY.dl2,
11962 ovl.fmt.RXY.dh2); goto ok;
11963 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
11964 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11965 ovl.fmt.RXY.dl2,
11966 ovl.fmt.RXY.dh2); goto ok;
11967 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
11968 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
11969 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
11970 ovl.fmt.RXY.dh2); goto ok;
11971 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
11972 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11973 ovl.fmt.RXY.dl2,
11974 ovl.fmt.RXY.dh2); goto ok;
11975 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
11976 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11977 ovl.fmt.RXY.dl2,
11978 ovl.fmt.RXY.dh2); goto ok;
11979 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
11980 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11981 ovl.fmt.RXY.dl2,
11982 ovl.fmt.RXY.dh2); goto ok;
11983 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
11984 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11985 ovl.fmt.RXY.dl2,
11986 ovl.fmt.RXY.dh2); goto ok;
11987 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
11988 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11989 ovl.fmt.RXY.dl2,
11990 ovl.fmt.RXY.dh2); goto ok;
11991 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
11992 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11993 ovl.fmt.RXY.dl2,
11994 ovl.fmt.RXY.dh2); goto ok;
11995 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
11996 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11997 ovl.fmt.RXY.dl2,
11998 ovl.fmt.RXY.dh2); goto ok;
11999 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
12000 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12001 ovl.fmt.RXY.dl2,
12002 ovl.fmt.RXY.dh2); goto ok;
12003 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
12004 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12005 ovl.fmt.RXY.dl2,
12006 ovl.fmt.RXY.dh2); goto ok;
12007 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
12008 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12009 ovl.fmt.RXY.dl2,
12010 ovl.fmt.RXY.dh2); goto ok;
12011 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
12012 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12013 ovl.fmt.RXY.dl2,
12014 ovl.fmt.RXY.dh2); goto ok;
12015 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
12016 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12017 ovl.fmt.RXY.dl2,
12018 ovl.fmt.RXY.dh2); goto ok;
12019 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
12020 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12021 ovl.fmt.RXY.dl2,
12022 ovl.fmt.RXY.dh2); goto ok;
12023 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
12024 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12025 ovl.fmt.RXY.dl2,
12026 ovl.fmt.RXY.dh2); goto ok;
12027 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
12028 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12029 ovl.fmt.RXY.dl2,
12030 ovl.fmt.RXY.dh2); goto ok;
12031 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
12032 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12033 ovl.fmt.RXY.dl2,
12034 ovl.fmt.RXY.dh2); goto ok;
12035 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
12036 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12037 ovl.fmt.RXY.dl2,
12038 ovl.fmt.RXY.dh2); goto ok;
12039 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
12040 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12041 ovl.fmt.RXY.dl2,
12042 ovl.fmt.RXY.dh2); goto ok;
12043 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
12044 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12045 ovl.fmt.RXY.dl2,
12046 ovl.fmt.RXY.dh2); goto ok;
12047 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
12048 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12049 ovl.fmt.RXY.dl2,
12050 ovl.fmt.RXY.dh2); goto ok;
12051 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12052 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12053 ovl.fmt.RXY.dl2,
12054 ovl.fmt.RXY.dh2); goto ok;
12055 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12056 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12057 ovl.fmt.RXY.dl2,
12058 ovl.fmt.RXY.dh2); goto ok;
12059 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12060 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12061 ovl.fmt.RXY.dl2,
12062 ovl.fmt.RXY.dh2); goto ok;
12063 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12064 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12065 ovl.fmt.RXY.dl2,
12066 ovl.fmt.RXY.dh2); goto ok;
12067 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12068 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12069 ovl.fmt.RXY.dl2,
12070 ovl.fmt.RXY.dh2); goto ok;
12071 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12072 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12073 ovl.fmt.RXY.dl2,
12074 ovl.fmt.RXY.dh2); goto ok;
12075 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12076 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12077 ovl.fmt.RXY.dl2,
12078 ovl.fmt.RXY.dh2); goto ok;
12079 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12080 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12081 ovl.fmt.RXY.dl2,
12082 ovl.fmt.RXY.dh2); goto ok;
12083 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12084 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12085 ovl.fmt.RXY.dl2,
12086 ovl.fmt.RXY.dh2); goto ok;
12087 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12088 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12089 ovl.fmt.RXY.dl2,
12090 ovl.fmt.RXY.dh2); goto ok;
12091 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12092 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12093 ovl.fmt.RXY.dl2,
12094 ovl.fmt.RXY.dh2); goto ok;
12095 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12096 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12097 ovl.fmt.RXY.dl2,
12098 ovl.fmt.RXY.dh2); goto ok;
12099 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12100 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12101 ovl.fmt.RXY.dl2,
12102 ovl.fmt.RXY.dh2); goto ok;
12103 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12104 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12105 ovl.fmt.RXY.dl2,
12106 ovl.fmt.RXY.dh2); goto ok;
12107 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12108 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12109 ovl.fmt.RXY.dl2,
12110 ovl.fmt.RXY.dh2); goto ok;
12111 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12112 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12113 ovl.fmt.RXY.dl2,
12114 ovl.fmt.RXY.dh2); goto ok;
12115 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12116 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12117 ovl.fmt.RXY.dl2,
12118 ovl.fmt.RXY.dh2); goto ok;
12119 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12120 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12121 ovl.fmt.RXY.dl2,
12122 ovl.fmt.RXY.dh2); goto ok;
12123 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12124 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12125 ovl.fmt.RXY.dl2,
12126 ovl.fmt.RXY.dh2); goto ok;
12127 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12128 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12129 ovl.fmt.RXY.dl2,
12130 ovl.fmt.RXY.dh2); goto ok;
12131 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12132 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12133 ovl.fmt.RXY.dl2,
12134 ovl.fmt.RXY.dh2); goto ok;
12135 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12136 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12137 ovl.fmt.RXY.dl2,
12138 ovl.fmt.RXY.dh2); goto ok;
12139 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12140 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12141 ovl.fmt.RXY.dl2,
12142 ovl.fmt.RXY.dh2); goto ok;
12143 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12144 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12145 ovl.fmt.RXY.dl2,
12146 ovl.fmt.RXY.dh2); goto ok;
12147 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12148 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12149 ovl.fmt.RXY.dl2,
12150 ovl.fmt.RXY.dh2); goto ok;
12151 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12152 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12153 ovl.fmt.RXY.dl2,
12154 ovl.fmt.RXY.dh2); goto ok;
12155 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12156 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12157 ovl.fmt.RXY.dl2,
12158 ovl.fmt.RXY.dh2); goto ok;
12159 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12160 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12161 ovl.fmt.RXY.dl2,
12162 ovl.fmt.RXY.dh2); goto ok;
12163 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12164 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12165 ovl.fmt.RXY.dl2,
12166 ovl.fmt.RXY.dh2); goto ok;
12167 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12168 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12169 ovl.fmt.RXY.dl2,
12170 ovl.fmt.RXY.dh2); goto ok;
12171 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12172 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12173 ovl.fmt.RXY.dl2,
12174 ovl.fmt.RXY.dh2); goto ok;
12175 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12176 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12177 ovl.fmt.RXY.dl2,
12178 ovl.fmt.RXY.dh2); goto ok;
12179 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12180 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12181 ovl.fmt.RXY.dl2,
12182 ovl.fmt.RXY.dh2); goto ok;
12183 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12184 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12185 ovl.fmt.RSY.dl2,
12186 ovl.fmt.RSY.dh2); goto ok;
12187 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12188 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12189 ovl.fmt.RSY.dl2,
12190 ovl.fmt.RSY.dh2); goto ok;
12191 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12192 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12193 ovl.fmt.RSY.dl2,
12194 ovl.fmt.RSY.dh2); goto ok;
12195 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12196 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12197 ovl.fmt.RSY.dl2,
12198 ovl.fmt.RSY.dh2); goto ok;
12199 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12200 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12201 ovl.fmt.RSY.dl2,
12202 ovl.fmt.RSY.dh2); goto ok;
12203 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12204 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12205 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12206 ovl.fmt.RSY.dl2,
12207 ovl.fmt.RSY.dh2); goto ok;
12208 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12209 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12210 ovl.fmt.RSY.dl2,
12211 ovl.fmt.RSY.dh2); goto ok;
12212 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12213 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12214 ovl.fmt.RSY.dl2,
12215 ovl.fmt.RSY.dh2); goto ok;
12216 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12217 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12218 ovl.fmt.RSY.dl2,
12219 ovl.fmt.RSY.dh2); goto ok;
12220 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12221 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12222 ovl.fmt.RSY.dl2,
12223 ovl.fmt.RSY.dh2); goto ok;
12224 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12225 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12226 ovl.fmt.RSY.dl2,
12227 ovl.fmt.RSY.dh2); goto ok;
12228 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12229 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12230 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12231 ovl.fmt.RSY.dl2,
12232 ovl.fmt.RSY.dh2); goto ok;
12233 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12234 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12235 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12236 ovl.fmt.RSY.dh2); goto ok;
12237 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12238 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12239 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12240 ovl.fmt.RSY.dh2); goto ok;
12241 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12242 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12243 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12244 ovl.fmt.RSY.dl2,
12245 ovl.fmt.RSY.dh2); goto ok;
12246 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12247 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12248 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12249 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12250 ovl.fmt.RSY.dl2,
12251 ovl.fmt.RSY.dh2); goto ok;
12252 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12253 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12254 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12255 ovl.fmt.RSY.dh2); goto ok;
12256 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12257 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12258 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12259 ovl.fmt.SIY.dh1); goto ok;
12260 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12261 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12262 ovl.fmt.SIY.dh1); goto ok;
12263 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12264 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12265 ovl.fmt.SIY.dh1); goto ok;
12266 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12267 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12268 ovl.fmt.SIY.dh1); goto ok;
12269 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12270 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12271 ovl.fmt.SIY.dh1); goto ok;
12272 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12273 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12274 ovl.fmt.SIY.dh1); goto ok;
12275 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12276 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12277 ovl.fmt.SIY.dh1); goto ok;
12278 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12279 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12280 ovl.fmt.SIY.dh1); goto ok;
12281 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12282 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12283 ovl.fmt.SIY.dh1); goto ok;
12284 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12285 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12286 ovl.fmt.SIY.dh1); goto ok;
12287 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12288 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12289 ovl.fmt.RSY.dl2,
12290 ovl.fmt.RSY.dh2); goto ok;
12291 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12292 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12293 ovl.fmt.RSY.dl2,
12294 ovl.fmt.RSY.dh2); goto ok;
12295 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12296 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12297 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12298 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12299 ovl.fmt.RSY.dl2,
12300 ovl.fmt.RSY.dh2); goto ok;
12301 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12302 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12303 ovl.fmt.RSY.dl2,
12304 ovl.fmt.RSY.dh2); goto ok;
12305 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12306 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12307 ovl.fmt.RSY.dl2,
12308 ovl.fmt.RSY.dh2); goto ok;
12309 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12310 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12311 ovl.fmt.RSY.dl2,
12312 ovl.fmt.RSY.dh2); goto ok;
12313 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12314 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12315 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12316 ovl.fmt.RSY.dh2); goto ok;
12317 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12318 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12319 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12320 ovl.fmt.RSY.dl2,
12321 ovl.fmt.RSY.dh2); goto ok;
12322 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12323 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12324 ovl.fmt.RSY.dl2,
12325 ovl.fmt.RSY.dh2); goto ok;
12326 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12327 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12328 ovl.fmt.RSY.dl2,
12329 ovl.fmt.RSY.dh2); goto ok;
12330 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12331 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12332 ovl.fmt.RSY.dl2,
12333 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012334 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12335 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12336 ovl.fmt.RSY.dl2,
12337 ovl.fmt.RSY.dh2,
12338 S390_XMNM_LOCG); goto ok;
12339 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12340 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12341 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12342 ovl.fmt.RSY.dh2,
12343 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012344 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12345 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12346 ovl.fmt.RSY.dl2,
12347 ovl.fmt.RSY.dh2); goto ok;
12348 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12349 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12350 ovl.fmt.RSY.dl2,
12351 ovl.fmt.RSY.dh2); goto ok;
12352 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12353 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12354 ovl.fmt.RSY.dl2,
12355 ovl.fmt.RSY.dh2); goto ok;
12356 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12357 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12358 ovl.fmt.RSY.dl2,
12359 ovl.fmt.RSY.dh2); goto ok;
12360 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12361 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12362 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12363 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012364 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12365 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12366 ovl.fmt.RSY.dl2,
12367 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12368 goto ok;
12369 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12370 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12371 ovl.fmt.RSY.dl2,
12372 ovl.fmt.RSY.dh2,
12373 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012374 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12375 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12376 ovl.fmt.RSY.dl2,
12377 ovl.fmt.RSY.dh2); goto ok;
12378 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12379 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12380 ovl.fmt.RSY.dl2,
12381 ovl.fmt.RSY.dh2); goto ok;
12382 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12383 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12384 ovl.fmt.RSY.dl2,
12385 ovl.fmt.RSY.dh2); goto ok;
12386 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
12387 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12388 ovl.fmt.RSY.dl2,
12389 ovl.fmt.RSY.dh2); goto ok;
12390 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
12391 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12392 ovl.fmt.RSY.dl2,
12393 ovl.fmt.RSY.dh2); goto ok;
12394 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
12395 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12396 goto ok;
12397 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
12398 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12399 goto ok;
12400 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
12401 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
12402 ovl.fmt.RIE_RRUUU.r1,
12403 ovl.fmt.RIE_RRUUU.r2,
12404 ovl.fmt.RIE_RRUUU.i3,
12405 ovl.fmt.RIE_RRUUU.i4,
12406 ovl.fmt.RIE_RRUUU.i5);
12407 goto ok;
12408 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
12409 ovl.fmt.RIE_RRUUU.r1,
12410 ovl.fmt.RIE_RRUUU.r2,
12411 ovl.fmt.RIE_RRUUU.i3,
12412 ovl.fmt.RIE_RRUUU.i4,
12413 ovl.fmt.RIE_RRUUU.i5);
12414 goto ok;
12415 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
12416 ovl.fmt.RIE_RRUUU.r1,
12417 ovl.fmt.RIE_RRUUU.r2,
12418 ovl.fmt.RIE_RRUUU.i3,
12419 ovl.fmt.RIE_RRUUU.i4,
12420 ovl.fmt.RIE_RRUUU.i5);
12421 goto ok;
12422 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
12423 ovl.fmt.RIE_RRUUU.r1,
12424 ovl.fmt.RIE_RRUUU.r2,
12425 ovl.fmt.RIE_RRUUU.i3,
12426 ovl.fmt.RIE_RRUUU.i4,
12427 ovl.fmt.RIE_RRUUU.i5);
12428 goto ok;
12429 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
12430 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
12431 ovl.fmt.RIE_RRPU.r1,
12432 ovl.fmt.RIE_RRPU.r2,
12433 ovl.fmt.RIE_RRPU.i4,
12434 ovl.fmt.RIE_RRPU.m3); goto ok;
12435 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
12436 ovl.fmt.RIE_RRPU.r1,
12437 ovl.fmt.RIE_RRPU.r2,
12438 ovl.fmt.RIE_RRPU.i4,
12439 ovl.fmt.RIE_RRPU.m3); goto ok;
12440 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
12441 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
12442 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
12443 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
12444 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
12445 ovl.fmt.RIE_RRPU.r1,
12446 ovl.fmt.RIE_RRPU.r2,
12447 ovl.fmt.RIE_RRPU.i4,
12448 ovl.fmt.RIE_RRPU.m3); goto ok;
12449 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
12450 ovl.fmt.RIE_RRPU.r1,
12451 ovl.fmt.RIE_RRPU.r2,
12452 ovl.fmt.RIE_RRPU.i4,
12453 ovl.fmt.RIE_RRPU.m3); goto ok;
12454 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
12455 ovl.fmt.RIEv3.r1,
12456 ovl.fmt.RIEv3.m3,
12457 ovl.fmt.RIEv3.i4,
12458 ovl.fmt.RIEv3.i2); goto ok;
12459 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
12460 ovl.fmt.RIEv3.r1,
12461 ovl.fmt.RIEv3.m3,
12462 ovl.fmt.RIEv3.i4,
12463 ovl.fmt.RIEv3.i2); goto ok;
12464 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
12465 ovl.fmt.RIEv3.r1,
12466 ovl.fmt.RIEv3.m3,
12467 ovl.fmt.RIEv3.i4,
12468 ovl.fmt.RIEv3.i2); goto ok;
12469 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
12470 ovl.fmt.RIEv3.r1,
12471 ovl.fmt.RIEv3.m3,
12472 ovl.fmt.RIEv3.i4,
12473 ovl.fmt.RIEv3.i2); goto ok;
12474 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
12475 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12476 goto ok;
12477 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
12478 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12479 ovl.fmt.RIE.i2); goto ok;
12480 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
12481 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12482 ovl.fmt.RIE.i2); goto ok;
12483 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
12484 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12485 ovl.fmt.RIE.i2); goto ok;
12486 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
12487 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12488 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12489 goto ok;
12490 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
12491 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12492 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12493 goto ok;
12494 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
12495 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12496 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12497 goto ok;
12498 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
12499 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12500 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12501 goto ok;
12502 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
12503 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12504 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12505 ovl.fmt.RIS.i2); goto ok;
12506 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
12507 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12508 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12509 ovl.fmt.RIS.i2); goto ok;
12510 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
12511 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
12512 ovl.fmt.RIS.d4,
12513 ovl.fmt.RIS.i2); goto ok;
12514 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
12515 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12516 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12517 ovl.fmt.RIS.i2); goto ok;
12518 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
12519 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12520 ovl.fmt.RXE.d2); goto ok;
12521 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
12522 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12523 ovl.fmt.RXE.d2); goto ok;
12524 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
12525 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12526 ovl.fmt.RXE.d2); goto ok;
12527 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
12528 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
12529 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
12530 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12531 ovl.fmt.RXE.d2); goto ok;
12532 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
12533 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12534 ovl.fmt.RXE.d2); goto ok;
12535 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
12536 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12537 ovl.fmt.RXE.d2); goto ok;
12538 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
12539 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
12540 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12541 ovl.fmt.RXE.d2); goto ok;
12542 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
12543 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12544 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12545 ovl.fmt.RXF.r1); goto ok;
12546 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
12547 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12548 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12549 ovl.fmt.RXF.r1); goto ok;
12550 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
12551 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12552 ovl.fmt.RXE.d2); goto ok;
12553 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
12554 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12555 ovl.fmt.RXE.d2); goto ok;
12556 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
12557 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12558 ovl.fmt.RXE.d2); goto ok;
12559 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
12560 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12561 ovl.fmt.RXE.d2); goto ok;
12562 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
12563 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12564 ovl.fmt.RXE.d2); goto ok;
12565 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
12566 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12567 ovl.fmt.RXE.d2); goto ok;
12568 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
12569 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
12570 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12571 ovl.fmt.RXE.d2); goto ok;
12572 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
12573 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12574 ovl.fmt.RXE.d2); goto ok;
12575 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
12576 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12577 ovl.fmt.RXE.d2); goto ok;
12578 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
12579 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12580 ovl.fmt.RXE.d2); goto ok;
12581 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
12582 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12583 ovl.fmt.RXE.d2); goto ok;
12584 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
12585 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12586 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12587 ovl.fmt.RXF.r1); goto ok;
12588 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
12589 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12590 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12591 ovl.fmt.RXF.r1); goto ok;
12592 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
12593 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
12594 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
12595 case 0xed000000002eULL: /* MAE */ goto unimplemented;
12596 case 0xed000000002fULL: /* MSE */ goto unimplemented;
12597 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
12598 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
12599 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
12600 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
12601 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
12602 case 0xed000000003aULL: /* MAY */ goto unimplemented;
12603 case 0xed000000003bULL: /* MY */ goto unimplemented;
12604 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
12605 case 0xed000000003dULL: /* MYH */ goto unimplemented;
12606 case 0xed000000003eULL: /* MAD */ goto unimplemented;
12607 case 0xed000000003fULL: /* MSD */ goto unimplemented;
12608 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
12609 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
12610 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
12611 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
12612 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
12613 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
12614 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
12615 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
12616 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
12617 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
12618 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
12619 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12620 ovl.fmt.RXY.dl2,
12621 ovl.fmt.RXY.dh2); goto ok;
12622 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
12623 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12624 ovl.fmt.RXY.dl2,
12625 ovl.fmt.RXY.dh2); goto ok;
12626 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
12627 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12628 ovl.fmt.RXY.dl2,
12629 ovl.fmt.RXY.dh2); goto ok;
12630 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
12631 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12632 ovl.fmt.RXY.dl2,
12633 ovl.fmt.RXY.dh2); goto ok;
12634 }
12635
12636 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
12637 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
12638 ovl.fmt.RIL.i2); goto ok;
12639 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
12640 ovl.fmt.RIL.i2); goto ok;
12641 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
12642 ovl.fmt.RIL.i2); goto ok;
12643 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
12644 ovl.fmt.RIL.i2); goto ok;
12645 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
12646 ovl.fmt.RIL.i2); goto ok;
12647 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
12648 ovl.fmt.RIL.i2); goto ok;
12649 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
12650 ovl.fmt.RIL.i2); goto ok;
12651 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
12652 ovl.fmt.RIL.i2); goto ok;
12653 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
12654 ovl.fmt.RIL.i2); goto ok;
12655 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
12656 ovl.fmt.RIL.i2); goto ok;
12657 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
12658 ovl.fmt.RIL.i2); goto ok;
12659 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
12660 ovl.fmt.RIL.i2); goto ok;
12661 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
12662 ovl.fmt.RIL.i2); goto ok;
12663 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
12664 ovl.fmt.RIL.i2); goto ok;
12665 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
12666 ovl.fmt.RIL.i2); goto ok;
12667 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
12668 ovl.fmt.RIL.i2); goto ok;
12669 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
12670 ovl.fmt.RIL.i2); goto ok;
12671 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
12672 ovl.fmt.RIL.i2); goto ok;
12673 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
12674 ovl.fmt.RIL.i2); goto ok;
12675 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
12676 ovl.fmt.RIL.i2); goto ok;
12677 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
12678 ovl.fmt.RIL.i2); goto ok;
12679 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
12680 ovl.fmt.RIL.i2); goto ok;
12681 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
12682 ovl.fmt.RIL.i2); goto ok;
12683 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
12684 ovl.fmt.RIL.i2); goto ok;
12685 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
12686 ovl.fmt.RIL.i2); goto ok;
12687 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
12688 ovl.fmt.RIL.i2); goto ok;
12689 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
12690 ovl.fmt.RIL.i2); goto ok;
12691 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
12692 ovl.fmt.RIL.i2); goto ok;
12693 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
12694 ovl.fmt.RIL.i2); goto ok;
12695 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
12696 ovl.fmt.RIL.i2); goto ok;
12697 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
12698 ovl.fmt.RIL.i2); goto ok;
12699 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
12700 ovl.fmt.RIL.i2); goto ok;
12701 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
12702 ovl.fmt.RIL.i2); goto ok;
12703 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
12704 ovl.fmt.RIL.i2); goto ok;
12705 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
12706 ovl.fmt.RIL.i2); goto ok;
12707 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
12708 ovl.fmt.RIL.i2); goto ok;
12709 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
12710 ovl.fmt.RIL.i2); goto ok;
12711 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
12712 ovl.fmt.RIL.i2); goto ok;
12713 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
12714 ovl.fmt.RIL.i2); goto ok;
12715 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
12716 ovl.fmt.RIL.i2); goto ok;
12717 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
12718 ovl.fmt.RIL.i2); goto ok;
12719 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
12720 ovl.fmt.RIL.i2); goto ok;
12721 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
12722 ovl.fmt.RIL.i2); goto ok;
12723 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
12724 ovl.fmt.RIL.i2); goto ok;
12725 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
12726 ovl.fmt.RIL.i2); goto ok;
12727 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
12728 ovl.fmt.RIL.i2); goto ok;
12729 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
12730 ovl.fmt.RIL.i2); goto ok;
12731 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
12732 ovl.fmt.RIL.i2); goto ok;
12733 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
12734 ovl.fmt.RIL.i2); goto ok;
12735 case 0xc800ULL: /* MVCOS */ goto unimplemented;
12736 case 0xc801ULL: /* ECTG */ goto unimplemented;
12737 case 0xc802ULL: /* CSST */ goto unimplemented;
12738 case 0xc804ULL: /* LPD */ goto unimplemented;
12739 case 0xc805ULL: /* LPDG */ goto unimplemented;
12740 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
12741 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
12742 ovl.fmt.RIL.i2); goto ok;
12743 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
12744 ovl.fmt.RIL.i2); goto ok;
12745 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
12746 ovl.fmt.RIL.i2); goto ok;
12747 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
12748 ovl.fmt.RIL.i2); goto ok;
12749 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
12750 ovl.fmt.RIL.i2); goto ok;
12751 }
12752
12753 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
12754 case 0xd0ULL: /* TRTR */ goto unimplemented;
12755 case 0xd1ULL: /* MVN */ goto unimplemented;
12756 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
12757 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12758 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12759 case 0xd3ULL: /* MVZ */ goto unimplemented;
12760 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
12761 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12762 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12763 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
12764 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12765 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12766 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
12767 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12768 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000012769 case 0xd7ULL:
12770 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
12771 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
12772 else
12773 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
12774 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12775 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
12776 goto ok;
sewardj2019a972011-03-07 16:04:07 +000012777 case 0xd9ULL: /* MVCK */ goto unimplemented;
12778 case 0xdaULL: /* MVCP */ goto unimplemented;
12779 case 0xdbULL: /* MVCS */ goto unimplemented;
12780 case 0xdcULL: /* TR */ goto unimplemented;
12781 case 0xddULL: /* TRT */ goto unimplemented;
12782 case 0xdeULL: /* ED */ goto unimplemented;
12783 case 0xdfULL: /* EDMK */ goto unimplemented;
12784 case 0xe1ULL: /* PKU */ goto unimplemented;
12785 case 0xe2ULL: /* UNPKU */ goto unimplemented;
12786 case 0xe8ULL: /* MVCIN */ goto unimplemented;
12787 case 0xe9ULL: /* PKA */ goto unimplemented;
12788 case 0xeaULL: /* UNPKA */ goto unimplemented;
12789 case 0xeeULL: /* PLO */ goto unimplemented;
12790 case 0xefULL: /* LMD */ goto unimplemented;
12791 case 0xf0ULL: /* SRP */ goto unimplemented;
12792 case 0xf1ULL: /* MVO */ goto unimplemented;
12793 case 0xf2ULL: /* PACK */ goto unimplemented;
12794 case 0xf3ULL: /* UNPK */ goto unimplemented;
12795 case 0xf8ULL: /* ZAP */ goto unimplemented;
12796 case 0xf9ULL: /* CP */ goto unimplemented;
12797 case 0xfaULL: /* AP */ goto unimplemented;
12798 case 0xfbULL: /* SP */ goto unimplemented;
12799 case 0xfcULL: /* MP */ goto unimplemented;
12800 case 0xfdULL: /* DP */ goto unimplemented;
12801 }
12802
12803 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
12804 case 0xe500ULL: /* LASP */ goto unimplemented;
12805 case 0xe501ULL: /* TPROT */ goto unimplemented;
12806 case 0xe502ULL: /* STRAG */ goto unimplemented;
12807 case 0xe50eULL: /* MVCSK */ goto unimplemented;
12808 case 0xe50fULL: /* MVCDK */ goto unimplemented;
12809 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
12810 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12811 goto ok;
12812 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
12813 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12814 goto ok;
12815 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
12816 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12817 goto ok;
12818 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
12819 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12820 goto ok;
12821 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
12822 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12823 goto ok;
12824 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
12825 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12826 goto ok;
12827 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
12828 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12829 goto ok;
12830 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
12831 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12832 goto ok;
12833 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
12834 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12835 goto ok;
12836 }
12837
12838 return S390_DECODE_UNKNOWN_INSN;
12839
12840ok:
12841 return S390_DECODE_OK;
12842
12843unimplemented:
12844 return S390_DECODE_UNIMPLEMENTED_INSN;
12845}
12846
12847/* Handle "special" instructions. */
12848static s390_decode_t
12849s390_decode_special_and_irgen(UChar *bytes)
12850{
12851 s390_decode_t status = S390_DECODE_OK;
12852
12853 /* Got a "Special" instruction preamble. Which one is it? */
12854 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
12855 s390_irgen_client_request();
12856 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
12857 s390_irgen_guest_NRADDR();
12858 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
12859 s390_irgen_call_noredir();
12860 } else {
12861 /* We don't know what it is. */
12862 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
12863 }
12864
12865 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
12866
12867 return status;
12868}
12869
12870
12871/* Function returns # bytes that were decoded or 0 in case of failure */
florianb4df7682011-07-05 02:09:01 +000012872static UInt
sewardj2019a972011-03-07 16:04:07 +000012873s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
12874{
12875 s390_decode_t status;
12876
12877 dis_res = dres;
12878
12879 /* Spot the 8-byte preamble: 18ff lr r15,r15
12880 1811 lr r1,r1
12881 1822 lr r2,r2
12882 1833 lr r3,r3 */
12883 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
12884 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
12885 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
12886
12887 /* Handle special instruction that follows that preamble. */
12888 if (0) vex_printf("special function handling...\n");
12889 bytes += S390_SPECIAL_OP_PREAMBLE_SIZE;
12890 status = s390_decode_special_and_irgen(bytes);
12891 insn_length = S390_SPECIAL_OP_SIZE;
12892 } else {
12893 /* Handle normal instructions. */
12894 switch (insn_length) {
12895 case 2:
12896 status = s390_decode_2byte_and_irgen(bytes);
12897 break;
12898
12899 case 4:
12900 status = s390_decode_4byte_and_irgen(bytes);
12901 break;
12902
12903 case 6:
12904 status = s390_decode_6byte_and_irgen(bytes);
12905 break;
12906
12907 default:
12908 status = S390_DECODE_ERROR;
12909 break;
12910 }
12911 }
12912 /* next instruction is execute, stop here */
12913 if (irsb->next == NULL && (*(char *)(HWord) guest_IA_next_instr == 0x44)) {
12914 irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
12915 dis_res->whatNext = Dis_StopHere;
12916 }
12917
12918 if (status == S390_DECODE_OK) return insn_length; /* OK */
12919
12920 /* Decoding failed somehow */
12921 vex_printf("vex s390->IR: ");
12922 switch (status) {
12923 case S390_DECODE_UNKNOWN_INSN:
12924 vex_printf("unknown insn: ");
12925 break;
12926
12927 case S390_DECODE_UNIMPLEMENTED_INSN:
12928 vex_printf("unimplemented insn: ");
12929 break;
12930
12931 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
12932 vex_printf("unimplemented special insn: ");
12933 break;
12934
12935 default:
12936 case S390_DECODE_ERROR:
12937 vex_printf("decoding error: ");
12938 break;
12939 }
12940
12941 vex_printf("%02x%02x", bytes[0], bytes[1]);
12942 if (insn_length > 2) {
12943 vex_printf(" %02x%02x", bytes[2], bytes[3]);
12944 }
12945 if (insn_length > 4) {
12946 vex_printf(" %02x%02x", bytes[4], bytes[5]);
12947 }
12948 vex_printf("\n");
12949
12950 return 0; /* Failed */
12951}
12952
12953
12954/* Generate an IRExpr for an address. */
12955static __inline__ IRExpr *
12956mkaddr_expr(Addr64 addr)
12957{
12958 return IRExpr_Const(IRConst_U64(addr));
12959}
12960
12961
12962/* Disassemble a single instruction INSN into IR. */
12963static DisResult
12964disInstr_S390_WRK(UChar *insn, Bool (*resteerOkFn)(void *, Addr64),
12965 void *callback_data)
12966{
12967 UChar byte;
12968 UInt insn_length;
12969 DisResult dres;
12970
12971 /* ---------------------------------------------------- */
12972 /* --- Compute instruction length -- */
12973 /* ---------------------------------------------------- */
12974
12975 /* Get the first byte of the insn. */
12976 byte = insn[0];
12977
12978 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
12979 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
12980 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
12981
12982 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
12983
12984 /* ---------------------------------------------------- */
12985 /* --- Initialise the DisResult data -- */
12986 /* ---------------------------------------------------- */
12987 dres.whatNext = Dis_Continue;
12988 dres.len = insn_length;
12989 dres.continueAt = 0;
12990
12991 /* fixs390: we should probably pass the resteer-function and the callback
12992 data. It's not needed for correctness but improves performance. */
12993
12994 /* Normal and special instruction handling starts here. */
12995 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
12996 /* All decode failures end up here. The decoder has already issued an
12997 error message.
12998 Tell the dispatcher that this insn cannot be decoded, and so has
12999 not been executed, and (is currently) the next to be executed.
13000 IA should be up-to-date since it made so at the start of each
13001 insn, but nevertheless be paranoid and update it again right
13002 now. */
floriane88b3c92011-07-05 02:48:39 +000013003 addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
sewardj2019a972011-03-07 16:04:07 +000013004 mkaddr_expr(guest_IA_curr_instr)));
13005
sewardj15469da2011-04-13 15:10:16 +000013006 irsb->next = mkaddr_expr(guest_IA_next_instr);
sewardj2019a972011-03-07 16:04:07 +000013007 irsb->jumpkind = Ijk_NoDecode;
13008 dres.whatNext = Dis_StopHere;
13009 dres.len = 0;
13010
13011 return dres;
13012 }
13013
13014 return dres;
13015}
13016
13017
13018/*------------------------------------------------------------*/
13019/*--- Top-level fn ---*/
13020/*------------------------------------------------------------*/
13021
13022/* Disassemble a single instruction into IR. The instruction
13023 is located in host memory at &guest_code[delta]. */
13024
13025DisResult
13026disInstr_S390(IRSB *irsb_IN,
13027 Bool put_IP,
13028 Bool (*resteerOkFn)(void *, Addr64),
13029 Bool resteerCisOk,
13030 void *callback_opaque,
13031 UChar *guest_code,
13032 Long delta,
13033 Addr64 guest_IP,
13034 VexArch guest_arch,
13035 VexArchInfo *archinfo,
13036 VexAbiInfo *abiinfo,
13037 Bool host_bigendian)
13038{
13039 vassert(guest_arch == VexArchS390X);
13040
13041 /* The instruction decoder requires a big-endian machine. */
13042 vassert(host_bigendian == True);
13043
13044 /* Set globals (see top of this file) */
13045 guest_IA_curr_instr = guest_IP;
13046
13047 irsb = irsb_IN;
13048
13049 vassert(guest_arch == VexArchS390X);
13050
13051 /* We may be asked to update the guest IA before going further. */
13052 if (put_IP)
floriane88b3c92011-07-05 02:48:39 +000013053 addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
sewardj2019a972011-03-07 16:04:07 +000013054 mkaddr_expr(guest_IA_curr_instr)));
13055
13056 return disInstr_S390_WRK(guest_code + delta, resteerOkFn, callback_opaque);
13057}
13058
13059/*---------------------------------------------------------------*/
13060/*--- end guest_s390_toIR.c ---*/
13061/*---------------------------------------------------------------*/