blob: 085d784bbb7027877350835d5387c092e9e17656 [file] [log] [blame]
Chia-I Wu82f50aa2014-08-05 10:43:03 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wu82f50aa2014-08-05 10:43:03 +080026 */
27
Chia-I Wude2bb862014-08-19 14:32:47 +080028#include "dispatch.h"
Chia-I Wu82f50aa2014-08-05 10:43:03 +080029#include "gpu.h"
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -060030#include "dev.h"
Chia-I Wu82f50aa2014-08-05 10:43:03 +080031#include "obj.h"
32
33/**
34 * Return true if an (not so) arbitrary pointer casted to intel_base points to
35 * a valid intel_base. This assumes at least the first sizeof(void*) bytes of
36 * the address are accessible, and they does not happen to be our magic
37 * values.
38 */
39bool intel_base_is_valid(const struct intel_base *base)
40{
Chia-I Wu6a42c2a2014-08-19 14:36:47 +080041 if (base->dispatch != intel_dispatch_get(true) &&
42 base->dispatch != intel_dispatch_get(false))
Chia-I Wu82f50aa2014-08-05 10:43:03 +080043 return false;
44
45 return !intel_gpu_is_valid((const struct intel_gpu *) base);
46}
47
Chia-I Wu26f0bd02014-08-07 10:38:40 +080048XGL_RESULT intel_base_get_info(struct intel_base *base, int type,
49 XGL_SIZE *size, XGL_VOID *data)
50{
51 XGL_RESULT ret = XGL_SUCCESS;
52 XGL_SIZE s;
53
54 switch (type) {
55 case XGL_INFO_TYPE_MEMORY_REQUIREMENTS:
56 s = sizeof(XGL_MEMORY_REQUIREMENTS);
57 memset(data, 0, s);
58 *size = s;
59 break;
60 default:
61 ret = XGL_ERROR_INVALID_VALUE;
62 break;
63 }
64
65 return ret;
66}
67
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080068static bool base_dbg_copy_create_info(struct intel_base_dbg *dbg,
69 const void *create_info)
70{
71 const union {
72 const void *ptr;
73 const struct {
74 XGL_STRUCTURE_TYPE struct_type;
75 XGL_VOID *next;
76 } *header;
77 } info = { .ptr = create_info };
78 XGL_SIZE shallow_copy = 0;
79
80 if (!create_info)
81 return true;
82
Chia-I Wub1076d72014-08-18 16:10:20 +080083 switch (dbg->type) {
84 case XGL_DBG_OBJECT_DEVICE:
85 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080086 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080087 case XGL_DBG_OBJECT_GPU_MEMORY:
88 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_MEMORY_ALLOC_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080089 shallow_copy = sizeof(XGL_MEMORY_ALLOC_INFO);
90 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080091 case XGL_DBG_OBJECT_EVENT:
92 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_EVENT_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080093 shallow_copy = sizeof(XGL_EVENT_CREATE_INFO);
94 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080095 case XGL_DBG_OBJECT_FENCE:
96 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_FENCE_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080097 shallow_copy = sizeof(XGL_FENCE_CREATE_INFO);
98 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080099 case XGL_DBG_OBJECT_QUERY_POOL:
100 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO);
Courtney Goeltzenleuchter850d12c2014-08-07 18:13:10 -0600101 shallow_copy = sizeof(XGL_QUERY_POOL_CREATE_INFO);
102 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800103 case XGL_DBG_OBJECT_IMAGE:
104 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
Chia-I Wufeb441f2014-08-08 21:27:38 +0800105 shallow_copy = sizeof(XGL_IMAGE_CREATE_INFO);
106 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800107 case XGL_DBG_OBJECT_IMAGE_VIEW:
108 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800109 shallow_copy = sizeof(XGL_IMAGE_VIEW_CREATE_INFO);
110 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800111 case XGL_DBG_OBJECT_COLOR_TARGET_VIEW:
112 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_COLOR_ATTACHMENT_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800113 shallow_copy = sizeof(XGL_COLOR_ATTACHMENT_VIEW_CREATE_INFO);
114 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800115 case XGL_DBG_OBJECT_DEPTH_STENCIL_VIEW:
116 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DEPTH_STENCIL_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800117 shallow_copy = sizeof(XGL_DEPTH_STENCIL_VIEW_CREATE_INFO);
118 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800119 case XGL_DBG_OBJECT_SAMPLER:
120 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
Chia-I Wu28b89962014-08-18 14:40:49 +0800121 shallow_copy = sizeof(XGL_SAMPLER_CREATE_INFO);
122 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800123 case XGL_DBG_OBJECT_DESCRIPTOR_SET:
124 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DESCRIPTOR_SET_CREATE_INFO);
Chia-I Wub8d04c82014-08-18 15:51:10 +0800125 shallow_copy = sizeof(XGL_DESCRIPTOR_SET_CREATE_INFO);
126 break;
Chia-I Wua5714e82014-08-11 15:33:42 +0800127 case XGL_DBG_OBJECT_VIEWPORT_STATE:
128 /* no struct header! */
129 shallow_copy = sizeof(XGL_VIEWPORT_STATE_CREATE_INFO);
130 break;
131 case XGL_DBG_OBJECT_RASTER_STATE:
132 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_RASTER_STATE_CREATE_INFO);
133 shallow_copy = sizeof(XGL_RASTER_STATE_CREATE_INFO);
134 break;
135 case XGL_DBG_OBJECT_MSAA_STATE:
136 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_MSAA_STATE_CREATE_INFO);
137 shallow_copy = sizeof(XGL_MSAA_STATE_CREATE_INFO);
138 break;
139 case XGL_DBG_OBJECT_COLOR_BLEND_STATE:
140 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_COLOR_BLEND_STATE_CREATE_INFO);
141 shallow_copy = sizeof(XGL_COLOR_BLEND_STATE_CREATE_INFO);
142 break;
143 case XGL_DBG_OBJECT_DEPTH_STENCIL_STATE:
144 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DEPTH_STENCIL_STATE_CREATE_INFO);
145 shallow_copy = sizeof(XGL_DEPTH_STENCIL_STATE_CREATE_INFO);
146 break;
Chia-I Wu730e5362014-08-19 12:15:09 +0800147 case XGL_DBG_OBJECT_CMD_BUFFER:
148 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_CMD_BUFFER_CREATE_INFO);
149 shallow_copy = sizeof(XGL_CMD_BUFFER_CREATE_INFO);
150 break;
Courtney Goeltzenleuchter05a60542014-08-15 14:54:34 -0600151 case XGL_DBG_OBJECT_GRAPHICS_PIPELINE:
152 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
153 break;
Courtney Goeltzenleuchter52ec3362014-08-19 11:52:02 -0600154 case XGL_DBG_OBJECT_SHADER:
155 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_SHADER_CREATE_INFO);
156 shallow_copy = sizeof(XGL_SHADER_CREATE_INFO);
157 break;
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800158 default:
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600159 // log debug message regarding invalid struct_type?
160 intel_dev_log(dbg->dev, XGL_DBG_MSG_ERROR,
161 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
162 "Invalid Create Info type: 0x%x", info.header->struct_type);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800163 return false;
164 break;
165 }
166
167 if (shallow_copy) {
168 assert(!info.header->next);
169
170 dbg->create_info = icd_alloc(shallow_copy, 0, XGL_SYSTEM_ALLOC_DEBUG);
171 if (!dbg->create_info)
172 return false;
173
174 memcpy(dbg->create_info, create_info, shallow_copy);
Chia-I Wue2934f92014-08-16 13:17:22 +0800175 dbg->create_info_size = shallow_copy;
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800176 } else if (info.header->struct_type ==
177 XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO) {
178 const XGL_DEVICE_CREATE_INFO *src = info.ptr;
179 XGL_DEVICE_CREATE_INFO *dst;
180 uint8_t *d;
181 XGL_SIZE size;
182 XGL_UINT i;
183
184 size = sizeof(*src);
Chia-I Wue2934f92014-08-16 13:17:22 +0800185 dbg->create_info_size = size;
186
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800187 size += sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
188 size += sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
189 for (i = 0; i < src->extensionCount; i++) {
190 size += 1 +
191 strlen((const char *) src->ppEnabledExtensionNames[i]);
192 }
193
Chia-I Wu98dcfab2014-08-07 12:07:52 +0800194 dst = icd_alloc(size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800195 if (!dst)
196 return false;
197
198 memcpy(dst, src, sizeof(*src));
199
200 d = (uint8_t *) dst;
201 d += sizeof(*src);
202
203 size = sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
204 memcpy(d, src->pRequestedQueues, size);
205 dst->pRequestedQueues = (const XGL_DEVICE_QUEUE_CREATE_INFO *) d;
206 d += size;
207
208 size = sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
209 dst->ppEnabledExtensionNames = (const XGL_CHAR * const *) d;
210
211 for (i = 0; i < src->extensionCount; i++) {
212 const XGL_SIZE len =
213 strlen((const char *) src->ppEnabledExtensionNames[i]);
214
215 memcpy(d + size, src->ppEnabledExtensionNames[i], len + 1);
216 ((const XGL_CHAR **) d)[i] = (const XGL_CHAR *) (d + size);
217
218 size += len + 1;
219 }
Courtney Goeltzenleuchter05a60542014-08-15 14:54:34 -0600220 } else if (info.header->struct_type == XGL_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO) {
221 // TODO: What do we want to copy here?
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800222 }
223
224 return true;
225}
226
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800227/**
Chia-I Wubbf2c932014-08-07 12:20:08 +0800228 * Create an intel_base_dbg. When dbg_size is non-zero, a buffer of that
Chia-I Wu660caf82014-08-07 10:54:26 +0800229 * size is allocated and zeroed.
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800230 */
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600231struct intel_base_dbg *intel_base_dbg_create(struct intel_dev *dev,
232 XGL_DBG_OBJECT_TYPE type,
Chia-I Wu660caf82014-08-07 10:54:26 +0800233 const void *create_info,
Chia-I Wubbf2c932014-08-07 12:20:08 +0800234 XGL_SIZE dbg_size)
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800235{
Chia-I Wu660caf82014-08-07 10:54:26 +0800236 struct intel_base_dbg *dbg;
237
Chia-I Wubbf2c932014-08-07 12:20:08 +0800238 if (!dbg_size)
239 dbg_size = sizeof(*dbg);
Chia-I Wu660caf82014-08-07 10:54:26 +0800240
Chia-I Wubbf2c932014-08-07 12:20:08 +0800241 assert(dbg_size >= sizeof(*dbg));
Chia-I Wu660caf82014-08-07 10:54:26 +0800242
Chia-I Wubbf2c932014-08-07 12:20:08 +0800243 dbg = icd_alloc(dbg_size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu660caf82014-08-07 10:54:26 +0800244 if (!dbg)
245 return NULL;
246
Chia-I Wubbf2c932014-08-07 12:20:08 +0800247 memset(dbg, 0, dbg_size);
Chia-I Wu660caf82014-08-07 10:54:26 +0800248
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800249 dbg->alloc_id = icd_get_allocator_id();
250 dbg->type = type;
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600251 dbg->dev = dev;
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800252
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800253 if (!base_dbg_copy_create_info(dbg, create_info)) {
254 icd_free(dbg);
255 return NULL;
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800256 }
257
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800258 return dbg;
259}
260
261void intel_base_dbg_destroy(struct intel_base_dbg *dbg)
262{
Chia-I Wu660caf82014-08-07 10:54:26 +0800263 if (dbg->tag)
264 icd_free(dbg->tag);
265
266 if (dbg->create_info)
267 icd_free(dbg->create_info);
268
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800269 icd_free(dbg);
270}
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800271
Chia-I Wubbf2c932014-08-07 12:20:08 +0800272/**
273 * Create an intel_base. obj_size and dbg_size specify the real sizes of the
274 * object and the debug metadata. Memories are zeroed.
275 */
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600276struct intel_base *intel_base_create(struct intel_dev *dev,
277 XGL_SIZE obj_size, bool debug,
Chia-I Wubbf2c932014-08-07 12:20:08 +0800278 XGL_DBG_OBJECT_TYPE type,
279 const void *create_info,
280 XGL_SIZE dbg_size)
281{
282 struct intel_base *base;
283
284 if (!obj_size)
285 obj_size = sizeof(*base);
286
287 assert(obj_size >= sizeof(*base));
288
289 base = icd_alloc(obj_size, 0, XGL_SYSTEM_ALLOC_API_OBJECT);
290 if (!base)
291 return NULL;
292
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600293 if (dev == NULL) {
294 /*
295 * dev is NULL when we are creating the base device object
296 * Set dev now so that debug setup happens correctly
297 */
298 dev = (struct intel_dev *) base;
299 }
300
Chia-I Wubbf2c932014-08-07 12:20:08 +0800301 memset(base, 0, obj_size);
302
Chia-I Wu6a42c2a2014-08-19 14:36:47 +0800303 base->dispatch = intel_dispatch_get(debug);
Chia-I Wubbf2c932014-08-07 12:20:08 +0800304 if (debug) {
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600305 base->dbg = intel_base_dbg_create(dev, type, create_info, dbg_size);
Chia-I Wubbf2c932014-08-07 12:20:08 +0800306 if (!base->dbg) {
307 icd_free(base);
308 return NULL;
309 }
310 }
Chia-I Wu6a42c2a2014-08-19 14:36:47 +0800311
Chia-I Wubbf2c932014-08-07 12:20:08 +0800312 base->get_info = intel_base_get_info;
313
314 return base;
315}
316
317void intel_base_destroy(struct intel_base *base)
318{
319 if (base->dbg)
320 intel_base_dbg_destroy(base->dbg);
321 icd_free(base);
322}
323
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800324XGL_RESULT XGLAPI intelDestroyObject(
325 XGL_OBJECT object)
326{
327 struct intel_obj *obj = intel_obj(object);
328
329 obj->destroy(obj);
330
331 return XGL_SUCCESS;
332}
333
334XGL_RESULT XGLAPI intelGetObjectInfo(
335 XGL_BASE_OBJECT object,
336 XGL_OBJECT_INFO_TYPE infoType,
337 XGL_SIZE* pDataSize,
338 XGL_VOID* pData)
339{
340 struct intel_base *base = intel_base(object);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800341
Chia-I Wu26f0bd02014-08-07 10:38:40 +0800342 return base->get_info(base, infoType, pDataSize, pData);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800343}
344
345XGL_RESULT XGLAPI intelBindObjectMemory(
346 XGL_OBJECT object,
347 XGL_GPU_MEMORY mem,
348 XGL_GPU_SIZE offset)
349{
350 struct intel_obj *obj = intel_obj(object);
351
352 obj->mem = mem;
353 obj->offset = offset;
354
355 return XGL_SUCCESS;
356}
Chia-I Wu7ec9f342014-08-19 10:47:53 +0800357
358XGL_RESULT XGLAPI intelDbgSetObjectTag(
359 XGL_BASE_OBJECT object,
360 XGL_SIZE tagSize,
361 const XGL_VOID* pTag)
362{
363 struct intel_base *base = intel_base(object);
364 struct intel_base_dbg *dbg = base->dbg;
365 void *tag;
366
367 if (!dbg)
368 return XGL_SUCCESS;
369
370 tag = icd_alloc(tagSize, 0, XGL_SYSTEM_ALLOC_DEBUG);
371 if (!tag)
372 return XGL_ERROR_OUT_OF_MEMORY;
373
374 memcpy(tag, pTag, tagSize);
375
376 if (dbg->tag)
377 icd_free(dbg->tag);
378
379 dbg->tag = tag;
380 dbg->tag_size = tagSize;
381
382 return XGL_SUCCESS;
383}