blob: 264a47599727b035bfa279aa2a917bf0c5dd421d [file] [log] [blame]
Chia-I Wuc14d1562014-10-17 09:49:22 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
Chia-I Wu714df452015-01-01 07:55:04 +080028#include "buf.h"
Chia-I Wuc14d1562014-10-17 09:49:22 +080029#include "img.h"
30#include "mem.h"
Chia-I Wu429a0aa2014-10-24 11:57:51 +080031#include "state.h"
Chia-I Wuc14d1562014-10-17 09:49:22 +080032#include "cmd_priv.h"
33
Chia-I Wu714df452015-01-01 07:55:04 +080034static XGL_RESULT cmd_meta_create_buf_view(struct intel_cmd *cmd,
35 XGL_BUFFER buf,
36 XGL_GPU_SIZE range,
37 XGL_FORMAT format,
38 struct intel_buf_view **view)
Chia-I Wuc14d1562014-10-17 09:49:22 +080039{
Chia-I Wu714df452015-01-01 07:55:04 +080040 XGL_BUFFER_VIEW_CREATE_INFO info;
Chia-I Wuc14d1562014-10-17 09:49:22 +080041
42 memset(&info, 0, sizeof(info));
Chia-I Wu714df452015-01-01 07:55:04 +080043 info.sType = XGL_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO;
44 info.buffer = buf;
45 info.viewType = XGL_BUFFER_VIEW_TYPED;
Chia-I Wuc14d1562014-10-17 09:49:22 +080046 info.stride = icd_format_get_size(format);
47 info.format = format;
Chia-I Wu714df452015-01-01 07:55:04 +080048 info.range = range;
Chia-I Wuc14d1562014-10-17 09:49:22 +080049
Chia-I Wubc7a30c2014-12-13 15:54:10 +080050 /*
51 * We do not rely on the hardware to avoid out-of-bound access. But we do
52 * not want the hardware to ignore the last element either.
53 */
54 if (info.range % info.stride)
55 info.range += info.stride - (info.range % info.stride);
56
Chia-I Wu714df452015-01-01 07:55:04 +080057 return intel_buf_view_create(cmd->dev, &info, view);
Chia-I Wuc14d1562014-10-17 09:49:22 +080058}
59
Chia-I Wu714df452015-01-01 07:55:04 +080060static void cmd_meta_set_src_for_buf(struct intel_cmd *cmd,
61 const struct intel_buf *buf,
Chia-I Wuc14d1562014-10-17 09:49:22 +080062 XGL_FORMAT format,
63 struct intel_cmd_meta *meta)
64{
Chia-I Wu714df452015-01-01 07:55:04 +080065 struct intel_buf_view *view;
66 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +080067
Chia-I Wu714df452015-01-01 07:55:04 +080068 res = cmd_meta_create_buf_view(cmd, (XGL_BUFFER) buf,
69 buf->size, format, &view);
70 if (res != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -070071 cmd_fail(cmd, res);
Chia-I Wu714df452015-01-01 07:55:04 +080072 return;
73 }
Chia-I Wuc14d1562014-10-17 09:49:22 +080074
75 meta->src.valid = true;
76
Chia-I Wu714df452015-01-01 07:55:04 +080077 memcpy(meta->src.surface, view->cmd,
78 sizeof(view->cmd[0]) * view->cmd_len);
79 meta->src.surface_len = view->cmd_len;
Chia-I Wuc14d1562014-10-17 09:49:22 +080080
Chia-I Wu714df452015-01-01 07:55:04 +080081 intel_buf_view_destroy(view);
82
83 meta->src.reloc_target = (intptr_t) buf->obj.mem->bo;
Chia-I Wuc14d1562014-10-17 09:49:22 +080084 meta->src.reloc_offset = 0;
85 meta->src.reloc_flags = 0;
86}
87
Chia-I Wu714df452015-01-01 07:55:04 +080088static void cmd_meta_set_dst_for_buf(struct intel_cmd *cmd,
89 const struct intel_buf *buf,
Chia-I Wuc14d1562014-10-17 09:49:22 +080090 XGL_FORMAT format,
91 struct intel_cmd_meta *meta)
92{
Chia-I Wu714df452015-01-01 07:55:04 +080093 struct intel_buf_view *view;
94 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +080095
Chia-I Wu714df452015-01-01 07:55:04 +080096 res = cmd_meta_create_buf_view(cmd, (XGL_BUFFER) buf,
97 buf->size, format, &view);
98 if (res != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -070099 cmd_fail(cmd, res);
Chia-I Wu714df452015-01-01 07:55:04 +0800100 return;
101 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800102
103 meta->dst.valid = true;
104
Chia-I Wu714df452015-01-01 07:55:04 +0800105 memcpy(meta->dst.surface, view->cmd,
106 sizeof(view->cmd[0]) * view->cmd_len);
107 meta->dst.surface_len = view->cmd_len;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800108
Chia-I Wu714df452015-01-01 07:55:04 +0800109 intel_buf_view_destroy(view);
110
111 meta->dst.reloc_target = (intptr_t) buf->obj.mem->bo;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800112 meta->dst.reloc_offset = 0;
Chia-I Wuc5e2ae32014-11-25 11:00:12 +0800113 meta->dst.reloc_flags = INTEL_RELOC_WRITE;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800114}
115
116static void cmd_meta_set_src_for_img(struct intel_cmd *cmd,
117 const struct intel_img *img,
118 XGL_FORMAT format,
119 XGL_IMAGE_ASPECT aspect,
120 struct intel_cmd_meta *meta)
121{
122 XGL_IMAGE_VIEW_CREATE_INFO info;
123 struct intel_img_view *view;
124 XGL_RESULT ret;
125
126 memset(&info, 0, sizeof(info));
127 info.sType = XGL_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO;
128 info.image = (XGL_IMAGE) img;
129
130 switch (img->type) {
131 case XGL_IMAGE_1D:
132 info.viewType = XGL_IMAGE_VIEW_1D;
133 break;
134 case XGL_IMAGE_2D:
135 info.viewType = XGL_IMAGE_VIEW_2D;
136 break;
137 case XGL_IMAGE_3D:
138 info.viewType = XGL_IMAGE_VIEW_3D;
139 break;
140 default:
141 break;
142 }
143
144 info.format = format;
145 info.channels.r = XGL_CHANNEL_SWIZZLE_R;
146 info.channels.g = XGL_CHANNEL_SWIZZLE_G;
147 info.channels.b = XGL_CHANNEL_SWIZZLE_B;
148 info.channels.a = XGL_CHANNEL_SWIZZLE_A;
149 info.subresourceRange.aspect = aspect;
150 info.subresourceRange.baseMipLevel = 0;
151 info.subresourceRange.mipLevels = XGL_LAST_MIP_OR_SLICE;
152 info.subresourceRange.baseArraySlice = 0;
153 info.subresourceRange.arraySize = XGL_LAST_MIP_OR_SLICE;
154
155 ret = intel_img_view_create(cmd->dev, &info, &view);
156 if (ret != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700157 cmd_fail(cmd, ret);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800158 return;
159 }
160
161 meta->src.valid = true;
162
163 memcpy(meta->src.surface, view->cmd,
164 sizeof(view->cmd[0]) * view->cmd_len);
165 meta->src.surface_len = view->cmd_len;
166
167 meta->src.reloc_target = (intptr_t) img->obj.mem->bo;
168 meta->src.reloc_offset = 0;
169 meta->src.reloc_flags = 0;
170
171 intel_img_view_destroy(view);
172}
173
Chia-I Wu83084ba2014-12-04 12:49:52 +0800174static void cmd_meta_adjust_compressed_dst(struct intel_cmd *cmd,
175 const struct intel_img *img,
176 struct intel_cmd_meta *meta)
177{
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600178 int32_t w, h, layer;
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800179 unsigned x_offset, y_offset;
Chia-I Wu83084ba2014-12-04 12:49:52 +0800180
181 if (cmd_gen(cmd) >= INTEL_GEN(7)) {
182 w = GEN_EXTRACT(meta->dst.surface[2], GEN7_SURFACE_DW2_WIDTH);
183 h = GEN_EXTRACT(meta->dst.surface[2], GEN7_SURFACE_DW2_HEIGHT);
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800184 layer = GEN_EXTRACT(meta->dst.surface[4],
185 GEN7_SURFACE_DW4_MIN_ARRAY_ELEMENT);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800186 } else {
187 w = GEN_EXTRACT(meta->dst.surface[2], GEN6_SURFACE_DW2_WIDTH);
188 h = GEN_EXTRACT(meta->dst.surface[2], GEN6_SURFACE_DW2_HEIGHT);
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800189 layer = GEN_EXTRACT(meta->dst.surface[4],
190 GEN6_SURFACE_DW4_MIN_ARRAY_ELEMENT);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800191 }
192
193 /* note that the width/height fields have the real values minus 1 */
194 w = (w + img->layout.block_width) / img->layout.block_width - 1;
195 h = (h + img->layout.block_height) / img->layout.block_height - 1;
196
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800197 /* adjust width and height */
Chia-I Wu83084ba2014-12-04 12:49:52 +0800198 if (cmd_gen(cmd) >= INTEL_GEN(7)) {
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800199 meta->dst.surface[2] &= ~(GEN7_SURFACE_DW2_WIDTH__MASK |
200 GEN7_SURFACE_DW2_HEIGHT__MASK);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800201 meta->dst.surface[2] |= GEN_SHIFT32(w, GEN7_SURFACE_DW2_WIDTH) |
202 GEN_SHIFT32(h, GEN7_SURFACE_DW2_HEIGHT);
203 } else {
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800204 meta->dst.surface[2] &= ~(GEN6_SURFACE_DW2_WIDTH__MASK |
205 GEN6_SURFACE_DW2_HEIGHT__MASK);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800206 meta->dst.surface[2] |= GEN_SHIFT32(w, GEN6_SURFACE_DW2_WIDTH) |
207 GEN_SHIFT32(h, GEN6_SURFACE_DW2_HEIGHT);
208 }
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800209
210 if (!layer)
211 return;
212
213 meta->dst.reloc_offset = intel_layout_get_slice_tile_offset(&img->layout,
214 0, layer, &x_offset, &y_offset);
215
216 /*
217 * The lower 2 bits (or 1 bit for Y) are missing. This may be a problem
218 * for small images (16x16 or smaller). We will need to adjust the
219 * drawing rectangle instead.
220 */
221 x_offset = (x_offset / img->layout.block_width) >> 2;
222 y_offset = (y_offset / img->layout.block_height) >> 1;
223
224 /* adjust min array element and X/Y offsets */
225 if (cmd_gen(cmd) >= INTEL_GEN(7)) {
226 meta->dst.surface[4] &= ~GEN7_SURFACE_DW4_MIN_ARRAY_ELEMENT__MASK;
227 meta->dst.surface[5] |= GEN_SHIFT32(x_offset, GEN7_SURFACE_DW5_X_OFFSET) |
228 GEN_SHIFT32(y_offset, GEN7_SURFACE_DW5_Y_OFFSET);
229 } else {
230 meta->dst.surface[4] &= ~GEN6_SURFACE_DW4_MIN_ARRAY_ELEMENT__MASK;
231 meta->dst.surface[5] |= GEN_SHIFT32(x_offset, GEN6_SURFACE_DW5_X_OFFSET) |
232 GEN_SHIFT32(y_offset, GEN6_SURFACE_DW5_Y_OFFSET);
233 }
Chia-I Wu83084ba2014-12-04 12:49:52 +0800234}
235
Chia-I Wuc14d1562014-10-17 09:49:22 +0800236static void cmd_meta_set_dst_for_img(struct intel_cmd *cmd,
237 const struct intel_img *img,
238 XGL_FORMAT format,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600239 uint32_t lod, uint32_t layer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800240 struct intel_cmd_meta *meta)
241{
242 XGL_COLOR_ATTACHMENT_VIEW_CREATE_INFO info;
243 struct intel_rt_view *rt;
244 XGL_RESULT ret;
245
246 memset(&info, 0, sizeof(info));
247 info.sType = XGL_STRUCTURE_TYPE_COLOR_ATTACHMENT_VIEW_CREATE_INFO;
248 info.image = (XGL_IMAGE) img;
249 info.format = format;
250 info.mipLevel = lod;
251 info.baseArraySlice = layer;
252 info.arraySize = 1;
253
254 ret = intel_rt_view_create(cmd->dev, &info, &rt);
255 if (ret != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700256 cmd_fail(cmd, ret);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800257 return;
258 }
259
260 meta->dst.valid = true;
261
262 memcpy(meta->dst.surface, rt->cmd, sizeof(rt->cmd[0]) * rt->cmd_len);
263 meta->dst.surface_len = rt->cmd_len;
264
265 meta->dst.reloc_target = (intptr_t) img->obj.mem->bo;
266 meta->dst.reloc_offset = 0;
Chia-I Wuc5e2ae32014-11-25 11:00:12 +0800267 meta->dst.reloc_flags = INTEL_RELOC_WRITE;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800268
Chia-I Wu83084ba2014-12-04 12:49:52 +0800269 if (icd_format_is_compressed(img->layout.format))
270 cmd_meta_adjust_compressed_dst(cmd, img, meta);
271
Chia-I Wuc14d1562014-10-17 09:49:22 +0800272 intel_rt_view_destroy(rt);
273}
274
275static void cmd_meta_set_src_for_writer(struct intel_cmd *cmd,
276 enum intel_cmd_writer_type writer,
277 XGL_GPU_SIZE size,
278 XGL_FORMAT format,
279 struct intel_cmd_meta *meta)
280{
Chia-I Wu714df452015-01-01 07:55:04 +0800281 struct intel_buf_view *view;
282 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800283
Chia-I Wu714df452015-01-01 07:55:04 +0800284 res = cmd_meta_create_buf_view(cmd, (XGL_BUFFER) XGL_NULL_HANDLE,
285 size, format, &view);
286 if (res != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700287 cmd_fail(cmd, res);
Chia-I Wu714df452015-01-01 07:55:04 +0800288 return;
289 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800290
291 meta->src.valid = true;
292
Chia-I Wu714df452015-01-01 07:55:04 +0800293 memcpy(meta->src.surface, view->cmd,
294 sizeof(view->cmd[0]) * view->cmd_len);
295 meta->src.surface_len = view->cmd_len;
296
297 intel_buf_view_destroy(view);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800298
299 meta->src.reloc_target = (intptr_t) writer;
300 meta->src.reloc_offset = 0;
301 meta->src.reloc_flags = INTEL_CMD_RELOC_TARGET_IS_WRITER;
302}
303
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800304static void cmd_meta_set_ds_view(struct intel_cmd *cmd,
305 const struct intel_img *img,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600306 uint32_t lod, uint32_t layer,
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800307 struct intel_cmd_meta *meta)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800308{
309 XGL_DEPTH_STENCIL_VIEW_CREATE_INFO info;
310 struct intel_ds_view *ds;
311 XGL_RESULT ret;
312
313 memset(&info, 0, sizeof(info));
314 info.sType = XGL_STRUCTURE_TYPE_DEPTH_STENCIL_VIEW_CREATE_INFO;
315 info.image = (XGL_IMAGE) img;
316 info.mipLevel = lod;
317 info.baseArraySlice = layer;
318 info.arraySize = 1;
319
320 ret = intel_ds_view_create(cmd->dev, &info, &ds);
321 if (ret != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700322 cmd_fail(cmd, ret);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800323 return;
324 }
325
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800326 meta->ds.view = ds;
327}
328
329static void cmd_meta_set_ds_state(struct intel_cmd *cmd,
330 XGL_IMAGE_ASPECT aspect,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600331 uint32_t stencil_ref,
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800332 struct intel_cmd_meta *meta)
333{
Tony Barbourfa6cac72015-01-16 14:27:35 -0700334 meta->ds.stencil_ref = stencil_ref;
335 meta->ds.aspect = aspect;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800336}
337
338static enum intel_dev_meta_shader get_shader_id(const struct intel_dev *dev,
339 const struct intel_img *img,
340 bool copy_array)
341{
342 enum intel_dev_meta_shader shader_id;
343
344 switch (img->type) {
345 case XGL_IMAGE_1D:
346 shader_id = (copy_array) ?
347 INTEL_DEV_META_FS_COPY_1D_ARRAY : INTEL_DEV_META_FS_COPY_1D;
348 break;
349 case XGL_IMAGE_2D:
350 shader_id = (img->samples > 1) ? INTEL_DEV_META_FS_COPY_2D_MS :
351 (copy_array) ? INTEL_DEV_META_FS_COPY_2D_ARRAY :
352 INTEL_DEV_META_FS_COPY_2D;
353 break;
354 case XGL_IMAGE_3D:
355 default:
356 shader_id = INTEL_DEV_META_FS_COPY_2D_ARRAY;
357 break;
358 }
359
360 return shader_id;
361}
362
Chia-I Wuf3a27252014-11-24 15:27:01 +0800363static bool cmd_meta_mem_dword_aligned(const struct intel_cmd *cmd,
364 XGL_GPU_SIZE src_offset,
365 XGL_GPU_SIZE dst_offset,
366 XGL_GPU_SIZE size)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800367{
Chia-I Wuf3a27252014-11-24 15:27:01 +0800368 return !((src_offset | dst_offset | size) & 0x3);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800369}
370
371static XGL_FORMAT cmd_meta_img_raw_format(const struct intel_cmd *cmd,
372 XGL_FORMAT format)
373{
Chia-I Wuffdde352014-12-20 15:12:16 +0800374 switch (icd_format_get_size(format)) {
375 case 1:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700376 format = XGL_FMT_R8_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800377 break;
378 case 2:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700379 format = XGL_FMT_R16_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800380 break;
381 case 4:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700382 format = XGL_FMT_R32_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800383 break;
384 case 8:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700385 format = XGL_FMT_R32G32_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800386 break;
387 case 16:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700388 format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800389 break;
390 default:
391 assert(!"unsupported image format for raw blit op");
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700392 format = XGL_FMT_UNDEFINED;
Chia-I Wuffdde352014-12-20 15:12:16 +0800393 break;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800394 }
395
396 return format;
397}
398
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600399ICD_EXPORT void XGLAPI xglCmdCopyBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800400 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800401 XGL_BUFFER srcBuffer,
402 XGL_BUFFER destBuffer,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600403 uint32_t regionCount,
Chia-I Wu714df452015-01-01 07:55:04 +0800404 const XGL_BUFFER_COPY* pRegions)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800405{
406 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800407 struct intel_buf *src = intel_buf(srcBuffer);
408 struct intel_buf *dst = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800409 struct intel_cmd_meta meta;
410 XGL_FORMAT format;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600411 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800412
413 memset(&meta, 0, sizeof(meta));
Chia-I Wuf3a27252014-11-24 15:27:01 +0800414 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800415
Chia-I Wuc14d1562014-10-17 09:49:22 +0800416 meta.height = 1;
417 meta.samples = 1;
418
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700419 format = XGL_FMT_UNDEFINED;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800420
421 for (i = 0; i < regionCount; i++) {
Chia-I Wu714df452015-01-01 07:55:04 +0800422 const XGL_BUFFER_COPY *region = &pRegions[i];
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700423 XGL_FORMAT fmt;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800424
Chia-I Wuf3a27252014-11-24 15:27:01 +0800425 meta.src.x = region->srcOffset;
426 meta.dst.x = region->destOffset;
427 meta.width = region->copySize;
428
429 if (cmd_meta_mem_dword_aligned(cmd, region->srcOffset,
430 region->destOffset, region->copySize)) {
431 meta.shader_id = INTEL_DEV_META_VS_COPY_MEM;
432 meta.src.x /= 4;
433 meta.dst.x /= 4;
434 meta.width /= 4;
435
436 /*
437 * INTEL_DEV_META_VS_COPY_MEM is untyped but expects the stride to
438 * be 16
439 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700440 fmt = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuf3a27252014-11-24 15:27:01 +0800441 } else {
442 if (cmd_gen(cmd) == INTEL_GEN(6)) {
443 intel_dev_log(cmd->dev, XGL_DBG_MSG_ERROR,
444 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
Chia-I Wu714df452015-01-01 07:55:04 +0800445 "unaligned xglCmdCopyBuffer unsupported");
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700446 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuf3a27252014-11-24 15:27:01 +0800447 continue;
448 }
449
450 meta.shader_id = INTEL_DEV_META_VS_COPY_MEM_UNALIGNED;
451
452 /*
453 * INTEL_DEV_META_VS_COPY_MEM_UNALIGNED is untyped but expects the
454 * stride to be 4
455 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700456 fmt = XGL_FMT_R8G8B8A8_UINT;
Chia-I Wuf3a27252014-11-24 15:27:01 +0800457 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800458
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700459 if (format != fmt) {
460 format = fmt;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800461
Chia-I Wu714df452015-01-01 07:55:04 +0800462 cmd_meta_set_src_for_buf(cmd, src, format, &meta);
463 cmd_meta_set_dst_for_buf(cmd, dst, format, &meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800464 }
465
Chia-I Wuc14d1562014-10-17 09:49:22 +0800466 cmd_draw_meta(cmd, &meta);
467 }
468}
469
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600470ICD_EXPORT void XGLAPI xglCmdCopyImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800471 XGL_CMD_BUFFER cmdBuffer,
472 XGL_IMAGE srcImage,
473 XGL_IMAGE destImage,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600474 uint32_t regionCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800475 const XGL_IMAGE_COPY* pRegions)
476{
477 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
478 struct intel_img *src = intel_img(srcImage);
479 struct intel_img *dst = intel_img(destImage);
480 struct intel_cmd_meta meta;
481 XGL_FORMAT raw_format;
Cody Northrop30a2b462015-02-10 09:28:30 -0700482 bool raw_copy = false;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600483 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800484
485 if (src->type != dst->type) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700486 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800487 return;
488 }
489
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700490 if (src->layout.format == dst->layout.format) {
Chia-I Wuc14d1562014-10-17 09:49:22 +0800491 raw_copy = true;
492 raw_format = cmd_meta_img_raw_format(cmd, src->layout.format);
493 } else if (icd_format_is_compressed(src->layout.format) ||
494 icd_format_is_compressed(dst->layout.format)) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700495 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800496 return;
497 }
498
499 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800500 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800501
502 cmd_meta_set_src_for_img(cmd, src,
503 (raw_copy) ? raw_format : src->layout.format,
504 XGL_IMAGE_ASPECT_COLOR, &meta);
505
506 meta.samples = dst->samples;
507
508 for (i = 0; i < regionCount; i++) {
509 const XGL_IMAGE_COPY *region = &pRegions[i];
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600510 uint32_t j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800511
512 meta.shader_id = get_shader_id(cmd->dev, src,
513 (region->extent.depth > 1));
514
515 meta.src.lod = region->srcSubresource.mipLevel;
516 meta.src.layer = region->srcSubresource.arraySlice +
517 region->srcOffset.z;
518 meta.src.x = region->srcOffset.x;
519 meta.src.y = region->srcOffset.y;
520
521 meta.dst.lod = region->destSubresource.mipLevel;
522 meta.dst.layer = region->destSubresource.arraySlice +
523 region->destOffset.z;
524 meta.dst.x = region->destOffset.x;
525 meta.dst.y = region->destOffset.y;
526
527 meta.width = region->extent.width;
528 meta.height = region->extent.height;
529
Chia-I Wueccc7682015-03-24 14:15:30 +0800530 if (raw_copy) {
531 const uint32_t block_width =
532 icd_format_get_block_width(raw_format);
533
534 meta.src.x /= block_width;
535 meta.src.y /= block_width;
536 meta.dst.x /= block_width;
537 meta.dst.y /= block_width;
538 meta.width /= block_width;
539 meta.height /= block_width;
540 }
541
Chia-I Wuc14d1562014-10-17 09:49:22 +0800542 for (j = 0; j < region->extent.depth; j++) {
543 cmd_meta_set_dst_for_img(cmd, dst,
544 (raw_copy) ? raw_format : dst->layout.format,
545 meta.dst.lod, meta.dst.layer, &meta);
546
547 cmd_draw_meta(cmd, &meta);
548
549 meta.src.layer++;
550 meta.dst.layer++;
551 }
552 }
553}
554
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600555ICD_EXPORT void XGLAPI xglCmdCopyBufferToImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800556 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800557 XGL_BUFFER srcBuffer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800558 XGL_IMAGE destImage,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600559 uint32_t regionCount,
Chia-I Wu714df452015-01-01 07:55:04 +0800560 const XGL_BUFFER_IMAGE_COPY* pRegions)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800561{
562 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800563 struct intel_buf *buf = intel_buf(srcBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800564 struct intel_img *img = intel_img(destImage);
565 struct intel_cmd_meta meta;
566 XGL_FORMAT format;
Chia-I Wueccc7682015-03-24 14:15:30 +0800567 uint32_t block_width, i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800568
569 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800570 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800571
572 meta.shader_id = INTEL_DEV_META_FS_COPY_MEM_TO_IMG;
573 meta.samples = img->samples;
574
575 format = cmd_meta_img_raw_format(cmd, img->layout.format);
Mike Stroyanbc4e2ed2015-03-24 15:10:24 -0600576 block_width = icd_format_get_block_width(img->layout.format);
Chia-I Wu714df452015-01-01 07:55:04 +0800577 cmd_meta_set_src_for_buf(cmd, buf, format, &meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800578
579 for (i = 0; i < regionCount; i++) {
Chia-I Wu714df452015-01-01 07:55:04 +0800580 const XGL_BUFFER_IMAGE_COPY *region = &pRegions[i];
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600581 uint32_t j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800582
Chia-I Wu714df452015-01-01 07:55:04 +0800583 meta.src.x = region->bufferOffset / icd_format_get_size(format);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800584
585 meta.dst.lod = region->imageSubresource.mipLevel;
586 meta.dst.layer = region->imageSubresource.arraySlice +
587 region->imageOffset.z;
Chia-I Wueccc7682015-03-24 14:15:30 +0800588 meta.dst.x = region->imageOffset.x / block_width;
589 meta.dst.y = region->imageOffset.y / block_width;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800590
Chia-I Wueccc7682015-03-24 14:15:30 +0800591 meta.width = region->imageExtent.width / block_width;
592 meta.height = region->imageExtent.height / block_width;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800593
594 for (j = 0; j < region->imageExtent.depth; j++) {
595 cmd_meta_set_dst_for_img(cmd, img, format,
596 meta.dst.lod, meta.dst.layer, &meta);
597
598 cmd_draw_meta(cmd, &meta);
599
600 meta.src.x += meta.width * meta.height;
601 meta.dst.layer++;
602 }
603 }
604}
605
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600606ICD_EXPORT void XGLAPI xglCmdCopyImageToBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800607 XGL_CMD_BUFFER cmdBuffer,
608 XGL_IMAGE srcImage,
Chia-I Wu714df452015-01-01 07:55:04 +0800609 XGL_BUFFER destBuffer,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600610 uint32_t regionCount,
Chia-I Wu714df452015-01-01 07:55:04 +0800611 const XGL_BUFFER_IMAGE_COPY* pRegions)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800612{
613 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
614 struct intel_img *img = intel_img(srcImage);
Chia-I Wu714df452015-01-01 07:55:04 +0800615 struct intel_buf *buf = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800616 struct intel_cmd_meta meta;
Chia-I Wu714df452015-01-01 07:55:04 +0800617 XGL_FORMAT img_format, buf_format;
Chia-I Wueccc7682015-03-24 14:15:30 +0800618 uint32_t block_width, i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800619
620 memset(&meta, 0, sizeof(meta));
Chia-I Wua44b6482014-12-20 14:58:01 +0800621 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800622
Chia-I Wua44b6482014-12-20 14:58:01 +0800623 img_format = cmd_meta_img_raw_format(cmd, img->layout.format);
Chia-I Wueccc7682015-03-24 14:15:30 +0800624 block_width = icd_format_get_block_width(img_format);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800625
Chia-I Wu714df452015-01-01 07:55:04 +0800626 /* buf_format is ignored by hw, but we derive stride from it */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700627 switch (img_format) {
628 case XGL_FMT_R8_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800629 meta.shader_id = INTEL_DEV_META_VS_COPY_R8_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700630 buf_format = XGL_FMT_R8G8B8A8_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800631 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700632 case XGL_FMT_R16_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800633 meta.shader_id = INTEL_DEV_META_VS_COPY_R16_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700634 buf_format = XGL_FMT_R8G8B8A8_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800635 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700636 case XGL_FMT_R32_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800637 meta.shader_id = INTEL_DEV_META_VS_COPY_R32_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700638 buf_format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800639 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700640 case XGL_FMT_R32G32_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800641 meta.shader_id = INTEL_DEV_META_VS_COPY_R32G32_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700642 buf_format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800643 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700644 case XGL_FMT_R32G32B32A32_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800645 meta.shader_id = INTEL_DEV_META_VS_COPY_R32G32B32A32_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700646 buf_format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800647 break;
648 default:
Chia-I Wub93638e2015-02-18 10:30:50 -0700649 img_format = XGL_FMT_UNDEFINED;
650 buf_format = XGL_FMT_UNDEFINED;
Chia-I Wua44b6482014-12-20 14:58:01 +0800651 break;
652 }
653
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700654 if (img_format == XGL_FMT_UNDEFINED ||
Chia-I Wua44b6482014-12-20 14:58:01 +0800655 (cmd_gen(cmd) == INTEL_GEN(6) &&
656 icd_format_get_size(img_format) < 4)) {
657 intel_dev_log(cmd->dev, XGL_DBG_MSG_ERROR,
658 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
Chia-I Wu714df452015-01-01 07:55:04 +0800659 "xglCmdCopyImageToBuffer with bpp %d unsupported",
Chia-I Wua44b6482014-12-20 14:58:01 +0800660 icd_format_get_size(img->layout.format));
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700661 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wua44b6482014-12-20 14:58:01 +0800662 return;
663 }
664
665 cmd_meta_set_src_for_img(cmd, img, img_format,
666 XGL_IMAGE_ASPECT_COLOR, &meta);
Chia-I Wu714df452015-01-01 07:55:04 +0800667 cmd_meta_set_dst_for_buf(cmd, buf, buf_format, &meta);
Chia-I Wua44b6482014-12-20 14:58:01 +0800668
Chia-I Wuc14d1562014-10-17 09:49:22 +0800669 meta.samples = 1;
670
671 for (i = 0; i < regionCount; i++) {
Chia-I Wu714df452015-01-01 07:55:04 +0800672 const XGL_BUFFER_IMAGE_COPY *region = &pRegions[i];
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600673 uint32_t j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800674
Chia-I Wuc14d1562014-10-17 09:49:22 +0800675 meta.src.lod = region->imageSubresource.mipLevel;
676 meta.src.layer = region->imageSubresource.arraySlice +
677 region->imageOffset.z;
Chia-I Wueccc7682015-03-24 14:15:30 +0800678 meta.src.x = region->imageOffset.x / block_width;
679 meta.src.y = region->imageOffset.y / block_width;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800680
Chia-I Wu714df452015-01-01 07:55:04 +0800681 meta.dst.x = region->bufferOffset / icd_format_get_size(img_format);
Chia-I Wueccc7682015-03-24 14:15:30 +0800682 meta.width = region->imageExtent.width / block_width;
683 meta.height = region->imageExtent.height / block_width;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800684
685 for (j = 0; j < region->imageExtent.depth; j++) {
686 cmd_draw_meta(cmd, &meta);
687
688 meta.src.layer++;
Chia-I Wua44b6482014-12-20 14:58:01 +0800689 meta.dst.x += meta.width * meta.height;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800690 }
691 }
692}
693
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600694ICD_EXPORT void XGLAPI xglCmdCloneImageData(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800695 XGL_CMD_BUFFER cmdBuffer,
696 XGL_IMAGE srcImage,
Mike Stroyan55658c22014-12-04 11:08:39 +0000697 XGL_IMAGE_LAYOUT srcImageLayout,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800698 XGL_IMAGE destImage,
Mike Stroyan55658c22014-12-04 11:08:39 +0000699 XGL_IMAGE_LAYOUT destImageLayout)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800700{
Chia-I Wud788fc62014-12-22 14:24:11 +0800701 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
702 struct intel_img *src = intel_img(srcImage);
703 struct intel_img *dst = intel_img(destImage);
Chia-I Wu714df452015-01-01 07:55:04 +0800704 struct intel_buf *src_buf, *dst_buf;
705 XGL_BUFFER_CREATE_INFO buf_info;
706 XGL_BUFFER_COPY buf_region;
707 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800708
Chia-I Wu714df452015-01-01 07:55:04 +0800709 memset(&buf_info, 0, sizeof(buf_info));
710 buf_info.sType = XGL_STRUCTURE_TYPE_BUFFER_CREATE_INFO;
711 buf_info.size = src->obj.mem->size;
712
713 memset(&buf_region, 0, sizeof(buf_region));
714 buf_region.copySize = src->obj.mem->size;
715
716 res = intel_buf_create(cmd->dev, &buf_info, &src_buf);
717 if (res != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700718 cmd_fail(cmd, res);
Chia-I Wu714df452015-01-01 07:55:04 +0800719 return;
720 }
721
722 res = intel_buf_create(cmd->dev, &buf_info, &dst_buf);
723 if (res != XGL_SUCCESS) {
724 intel_buf_destroy(src_buf);
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700725 cmd_fail(cmd, res);
Chia-I Wu714df452015-01-01 07:55:04 +0800726 return;
727 }
728
729 intel_obj_bind_mem(&src_buf->obj, src->obj.mem, 0);
730 intel_obj_bind_mem(&dst_buf->obj, dst->obj.mem, 0);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800731
Chia-I Wud788fc62014-12-22 14:24:11 +0800732 cmd_batch_flush(cmd, GEN6_PIPE_CONTROL_RENDER_CACHE_FLUSH);
Chia-I Wu714df452015-01-01 07:55:04 +0800733 xglCmdCopyBuffer(cmdBuffer, (XGL_BUFFER) src_buf,
734 (XGL_BUFFER) dst_buf, 1, &buf_region);
735
736 intel_buf_destroy(src_buf);
737 intel_buf_destroy(dst_buf);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800738}
739
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600740ICD_EXPORT void XGLAPI xglCmdUpdateBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800741 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800742 XGL_BUFFER destBuffer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800743 XGL_GPU_SIZE destOffset,
744 XGL_GPU_SIZE dataSize,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600745 const uint32_t* pData)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800746{
747 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800748 struct intel_buf *dst = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800749 struct intel_cmd_meta meta;
750 XGL_FORMAT format;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800751 uint32_t *ptr;
752 uint32_t offset;
753
Chia-I Wuf3a27252014-11-24 15:27:01 +0800754 /* must be 4-byte aligned */
755 if ((destOffset | dataSize) & 3) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700756 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuf3a27252014-11-24 15:27:01 +0800757 return;
758 }
759
Chia-I Wuc14d1562014-10-17 09:49:22 +0800760 /* write to dynamic state writer first */
761 offset = cmd_state_pointer(cmd, INTEL_CMD_ITEM_BLOB, 32,
762 (dataSize + 3) / 4, &ptr);
763 memcpy(ptr, pData, dataSize);
764
Chia-I Wuc14d1562014-10-17 09:49:22 +0800765 memset(&meta, 0, sizeof(meta));
Chia-I Wuf3a27252014-11-24 15:27:01 +0800766 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800767
Chia-I Wuf3a27252014-11-24 15:27:01 +0800768 meta.shader_id = INTEL_DEV_META_VS_COPY_MEM;
769
770 meta.src.x = offset / 4;
771 meta.dst.x = destOffset / 4;
772 meta.width = dataSize / 4;
773 meta.height = 1;
774 meta.samples = 1;
775
776 /*
777 * INTEL_DEV_META_VS_COPY_MEM is untyped but expects the stride to be 16
778 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700779 format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800780
781 cmd_meta_set_src_for_writer(cmd, INTEL_CMD_WRITER_STATE,
782 offset + dataSize, format, &meta);
Chia-I Wu714df452015-01-01 07:55:04 +0800783 cmd_meta_set_dst_for_buf(cmd, dst, format, &meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800784
Chia-I Wuc14d1562014-10-17 09:49:22 +0800785 cmd_draw_meta(cmd, &meta);
786}
787
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600788ICD_EXPORT void XGLAPI xglCmdFillBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800789 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800790 XGL_BUFFER destBuffer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800791 XGL_GPU_SIZE destOffset,
792 XGL_GPU_SIZE fillSize,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600793 uint32_t data)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800794{
795 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800796 struct intel_buf *dst = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800797 struct intel_cmd_meta meta;
798 XGL_FORMAT format;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800799
800 /* must be 4-byte aligned */
801 if ((destOffset | fillSize) & 3) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700802 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800803 return;
804 }
805
806 memset(&meta, 0, sizeof(meta));
Chia-I Wuf3a27252014-11-24 15:27:01 +0800807 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800808
Chia-I Wuf3a27252014-11-24 15:27:01 +0800809 meta.shader_id = INTEL_DEV_META_VS_FILL_MEM;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800810
811 meta.clear_val[0] = data;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800812
Chia-I Wuf3a27252014-11-24 15:27:01 +0800813 meta.dst.x = destOffset / 4;
814 meta.width = fillSize / 4;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800815 meta.height = 1;
816 meta.samples = 1;
817
Chia-I Wuf3a27252014-11-24 15:27:01 +0800818 /*
819 * INTEL_DEV_META_VS_FILL_MEM is untyped but expects the stride to be 16
820 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700821 format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuf3a27252014-11-24 15:27:01 +0800822
Chia-I Wu714df452015-01-01 07:55:04 +0800823 cmd_meta_set_dst_for_buf(cmd, dst, format, &meta);
Chia-I Wuf3a27252014-11-24 15:27:01 +0800824
Chia-I Wuc14d1562014-10-17 09:49:22 +0800825 cmd_draw_meta(cmd, &meta);
826}
827
828static void cmd_meta_clear_image(struct intel_cmd *cmd,
829 struct intel_img *img,
830 XGL_FORMAT format,
831 struct intel_cmd_meta *meta,
832 const XGL_IMAGE_SUBRESOURCE_RANGE *range)
833{
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600834 uint32_t mip_levels, array_size;
835 uint32_t i, j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800836
837 if (range->baseMipLevel >= img->mip_levels ||
838 range->baseArraySlice >= img->array_size)
839 return;
840
841 mip_levels = img->mip_levels - range->baseMipLevel;
842 if (mip_levels > range->mipLevels)
843 mip_levels = range->mipLevels;
844
845 array_size = img->array_size - range->baseArraySlice;
846 if (array_size > range->arraySize)
847 array_size = range->arraySize;
848
Chia-I Wuc14d1562014-10-17 09:49:22 +0800849 for (i = 0; i < mip_levels; i++) {
Chia-I Wufaaed472014-10-28 14:17:43 +0800850 meta->dst.lod = range->baseMipLevel + i;
851 meta->dst.layer = range->baseArraySlice;
852
Chia-I Wu73520ac2015-02-19 11:17:45 -0700853 /* TODO INTEL_CMD_META_DS_HIZ_CLEAR requires 8x4 aligned rectangle */
Chia-I Wuc14d1562014-10-17 09:49:22 +0800854 meta->width = u_minify(img->layout.width0, meta->dst.lod);
855 meta->height = u_minify(img->layout.height0, meta->dst.lod);
856
Chia-I Wu73520ac2015-02-19 11:17:45 -0700857 if (meta->ds.op != INTEL_CMD_META_DS_NOP &&
858 !intel_img_can_enable_hiz(img, meta->dst.lod))
859 continue;
860
Chia-I Wuc14d1562014-10-17 09:49:22 +0800861 for (j = 0; j < array_size; j++) {
862 if (range->aspect == XGL_IMAGE_ASPECT_COLOR) {
863 cmd_meta_set_dst_for_img(cmd, img, format,
864 meta->dst.lod, meta->dst.layer, meta);
865
866 cmd_draw_meta(cmd, meta);
867 } else {
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800868 cmd_meta_set_ds_view(cmd, img, meta->dst.lod,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800869 meta->dst.layer, meta);
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800870 cmd_meta_set_ds_state(cmd, range->aspect,
871 meta->clear_val[1], meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800872
873 cmd_draw_meta(cmd, meta);
874
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800875 intel_ds_view_destroy(meta->ds.view);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800876 }
877
878 meta->dst.layer++;
879 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800880 }
881}
882
Chia-I Wu73520ac2015-02-19 11:17:45 -0700883void cmd_meta_ds_op(struct intel_cmd *cmd,
884 enum intel_cmd_meta_ds_op op,
885 struct intel_img *img,
886 const XGL_IMAGE_SUBRESOURCE_RANGE *range)
887{
888 struct intel_cmd_meta meta;
889
890 if (img->layout.aux != INTEL_LAYOUT_AUX_HIZ)
891 return;
892 if (range->aspect != XGL_IMAGE_ASPECT_DEPTH)
893 return;
894
895 memset(&meta, 0, sizeof(meta));
896 meta.mode = INTEL_CMD_META_DEPTH_STENCIL_RECT;
897 meta.samples = img->samples;
898
899 meta.ds.aspect = XGL_IMAGE_ASPECT_DEPTH;
900 meta.ds.op = op;
901 meta.ds.optimal = true;
902
903 cmd_meta_clear_image(cmd, img, img->layout.format, &meta, range);
904}
905
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600906ICD_EXPORT void XGLAPI xglCmdClearColorImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800907 XGL_CMD_BUFFER cmdBuffer,
908 XGL_IMAGE image,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600909 const float color[4],
910 uint32_t rangeCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800911 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
912{
913 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
914 struct intel_img *img = intel_img(image);
915 struct intel_cmd_meta meta;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600916 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800917
918 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800919 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800920
921 meta.shader_id = INTEL_DEV_META_FS_CLEAR_COLOR;
922 meta.samples = img->samples;
923
924 meta.clear_val[0] = u_fui(color[0]);
925 meta.clear_val[1] = u_fui(color[1]);
926 meta.clear_val[2] = u_fui(color[2]);
927 meta.clear_val[3] = u_fui(color[3]);
928
929 for (i = 0; i < rangeCount; i++) {
930 cmd_meta_clear_image(cmd, img, img->layout.format,
931 &meta, &pRanges[i]);
932 }
933}
934
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600935ICD_EXPORT void XGLAPI xglCmdClearColorImageRaw(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800936 XGL_CMD_BUFFER cmdBuffer,
937 XGL_IMAGE image,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600938 const uint32_t color[4],
939 uint32_t rangeCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800940 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
941{
942 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
943 struct intel_img *img = intel_img(image);
944 struct intel_cmd_meta meta;
945 XGL_FORMAT format;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600946 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800947
948 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800949 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800950
951 meta.shader_id = INTEL_DEV_META_FS_CLEAR_COLOR;
952 meta.samples = img->samples;
953
Chia-I Wuffdde352014-12-20 15:12:16 +0800954 icd_format_get_raw_value(img->layout.format, color, meta.clear_val);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800955 format = cmd_meta_img_raw_format(cmd, img->layout.format);
956
957 for (i = 0; i < rangeCount; i++)
958 cmd_meta_clear_image(cmd, img, format, &meta, &pRanges[i]);
959}
960
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600961ICD_EXPORT void XGLAPI xglCmdClearDepthStencil(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800962 XGL_CMD_BUFFER cmdBuffer,
963 XGL_IMAGE image,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600964 float depth,
965 uint32_t stencil,
966 uint32_t rangeCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800967 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
968{
969 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
970 struct intel_img *img = intel_img(image);
971 struct intel_cmd_meta meta;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600972 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800973
974 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800975 meta.mode = INTEL_CMD_META_DEPTH_STENCIL_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800976
977 meta.shader_id = INTEL_DEV_META_FS_CLEAR_DEPTH;
978 meta.samples = img->samples;
979
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800980 meta.clear_val[0] = u_fui(depth);
981 meta.clear_val[1] = stencil;
982
Chia-I Wu73520ac2015-02-19 11:17:45 -0700983 /* assume optimal DS until revision 59 */
984 meta.ds.optimal = true;
985
Chia-I Wuc14d1562014-10-17 09:49:22 +0800986 for (i = 0; i < rangeCount; i++) {
987 const XGL_IMAGE_SUBRESOURCE_RANGE *range = &pRanges[i];
988
Chia-I Wuc14d1562014-10-17 09:49:22 +0800989 cmd_meta_clear_image(cmd, img, img->layout.format,
990 &meta, range);
991 }
992}
993
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600994ICD_EXPORT void XGLAPI xglCmdResolveImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800995 XGL_CMD_BUFFER cmdBuffer,
996 XGL_IMAGE srcImage,
997 XGL_IMAGE destImage,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600998 uint32_t rectCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800999 const XGL_IMAGE_RESOLVE* pRects)
1000{
1001 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
1002 struct intel_img *src = intel_img(srcImage);
1003 struct intel_img *dst = intel_img(destImage);
1004 struct intel_cmd_meta meta;
1005 XGL_FORMAT format;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -06001006 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +08001007
1008 if (src->samples <= 1 || dst->samples > 1 ||
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -07001009 src->layout.format != dst->layout.format) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -07001010 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuc14d1562014-10-17 09:49:22 +08001011 return;
1012 }
1013
1014 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +08001015 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +08001016
1017 switch (src->samples) {
1018 case 2:
1019 default:
1020 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_2X;
1021 break;
1022 case 4:
1023 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_4X;
1024 break;
1025 case 8:
1026 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_8X;
1027 break;
1028 case 16:
1029 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_16X;
1030 break;
1031 }
1032
1033 meta.samples = 1;
1034
1035 format = cmd_meta_img_raw_format(cmd, src->layout.format);
1036 cmd_meta_set_src_for_img(cmd, src, format, XGL_IMAGE_ASPECT_COLOR, &meta);
1037
1038 for (i = 0; i < rectCount; i++) {
1039 const XGL_IMAGE_RESOLVE *rect = &pRects[i];
1040
1041 meta.src.lod = rect->srcSubresource.mipLevel;
1042 meta.src.layer = rect->srcSubresource.arraySlice;
1043 meta.src.x = rect->srcOffset.x;
1044 meta.src.y = rect->srcOffset.y;
1045
1046 meta.dst.lod = rect->destSubresource.mipLevel;
1047 meta.dst.layer = rect->destSubresource.arraySlice;
1048 meta.dst.x = rect->destOffset.x;
1049 meta.dst.y = rect->destOffset.y;
1050
1051 meta.width = rect->extent.width;
1052 meta.height = rect->extent.height;
1053
1054 cmd_meta_set_dst_for_img(cmd, dst, format,
1055 meta.dst.lod, meta.dst.layer, &meta);
1056
1057 cmd_draw_meta(cmd, &meta);
1058 }
1059}