blob: 796292f38d580e1a1f7d6372df90d37ea657be2f [file] [log] [blame]
Chia-I Wuc14d1562014-10-17 09:49:22 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
Chia-I Wu714df452015-01-01 07:55:04 +080028#include "buf.h"
Chia-I Wuc14d1562014-10-17 09:49:22 +080029#include "img.h"
30#include "mem.h"
Chia-I Wu429a0aa2014-10-24 11:57:51 +080031#include "state.h"
Chia-I Wuc14d1562014-10-17 09:49:22 +080032#include "cmd_priv.h"
33
Chia-I Wu714df452015-01-01 07:55:04 +080034static XGL_RESULT cmd_meta_create_buf_view(struct intel_cmd *cmd,
35 XGL_BUFFER buf,
36 XGL_GPU_SIZE range,
37 XGL_FORMAT format,
38 struct intel_buf_view **view)
Chia-I Wuc14d1562014-10-17 09:49:22 +080039{
Chia-I Wu714df452015-01-01 07:55:04 +080040 XGL_BUFFER_VIEW_CREATE_INFO info;
Chia-I Wuc14d1562014-10-17 09:49:22 +080041
42 memset(&info, 0, sizeof(info));
Chia-I Wu714df452015-01-01 07:55:04 +080043 info.sType = XGL_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO;
44 info.buffer = buf;
45 info.viewType = XGL_BUFFER_VIEW_TYPED;
Chia-I Wuc14d1562014-10-17 09:49:22 +080046 info.stride = icd_format_get_size(format);
47 info.format = format;
Chia-I Wu714df452015-01-01 07:55:04 +080048 info.channels.r = XGL_CHANNEL_SWIZZLE_R;
49 info.channels.g = XGL_CHANNEL_SWIZZLE_G;
50 info.channels.b = XGL_CHANNEL_SWIZZLE_B;
51 info.channels.a = XGL_CHANNEL_SWIZZLE_A;
52 info.range = range;
Chia-I Wuc14d1562014-10-17 09:49:22 +080053
Chia-I Wubc7a30c2014-12-13 15:54:10 +080054 /*
55 * We do not rely on the hardware to avoid out-of-bound access. But we do
56 * not want the hardware to ignore the last element either.
57 */
58 if (info.range % info.stride)
59 info.range += info.stride - (info.range % info.stride);
60
Chia-I Wu714df452015-01-01 07:55:04 +080061 return intel_buf_view_create(cmd->dev, &info, view);
Chia-I Wuc14d1562014-10-17 09:49:22 +080062}
63
Chia-I Wu714df452015-01-01 07:55:04 +080064static void cmd_meta_set_src_for_buf(struct intel_cmd *cmd,
65 const struct intel_buf *buf,
Chia-I Wuc14d1562014-10-17 09:49:22 +080066 XGL_FORMAT format,
67 struct intel_cmd_meta *meta)
68{
Chia-I Wu714df452015-01-01 07:55:04 +080069 struct intel_buf_view *view;
70 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +080071
Chia-I Wu714df452015-01-01 07:55:04 +080072 res = cmd_meta_create_buf_view(cmd, (XGL_BUFFER) buf,
73 buf->size, format, &view);
74 if (res != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -070075 cmd_fail(cmd, res);
Chia-I Wu714df452015-01-01 07:55:04 +080076 return;
77 }
Chia-I Wuc14d1562014-10-17 09:49:22 +080078
79 meta->src.valid = true;
80
Chia-I Wu714df452015-01-01 07:55:04 +080081 memcpy(meta->src.surface, view->cmd,
82 sizeof(view->cmd[0]) * view->cmd_len);
83 meta->src.surface_len = view->cmd_len;
Chia-I Wuc14d1562014-10-17 09:49:22 +080084
Chia-I Wu714df452015-01-01 07:55:04 +080085 intel_buf_view_destroy(view);
86
87 meta->src.reloc_target = (intptr_t) buf->obj.mem->bo;
Chia-I Wuc14d1562014-10-17 09:49:22 +080088 meta->src.reloc_offset = 0;
89 meta->src.reloc_flags = 0;
90}
91
Chia-I Wu714df452015-01-01 07:55:04 +080092static void cmd_meta_set_dst_for_buf(struct intel_cmd *cmd,
93 const struct intel_buf *buf,
Chia-I Wuc14d1562014-10-17 09:49:22 +080094 XGL_FORMAT format,
95 struct intel_cmd_meta *meta)
96{
Chia-I Wu714df452015-01-01 07:55:04 +080097 struct intel_buf_view *view;
98 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +080099
Chia-I Wu714df452015-01-01 07:55:04 +0800100 res = cmd_meta_create_buf_view(cmd, (XGL_BUFFER) buf,
101 buf->size, format, &view);
102 if (res != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700103 cmd_fail(cmd, res);
Chia-I Wu714df452015-01-01 07:55:04 +0800104 return;
105 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800106
107 meta->dst.valid = true;
108
Chia-I Wu714df452015-01-01 07:55:04 +0800109 memcpy(meta->dst.surface, view->cmd,
110 sizeof(view->cmd[0]) * view->cmd_len);
111 meta->dst.surface_len = view->cmd_len;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800112
Chia-I Wu714df452015-01-01 07:55:04 +0800113 intel_buf_view_destroy(view);
114
115 meta->dst.reloc_target = (intptr_t) buf->obj.mem->bo;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800116 meta->dst.reloc_offset = 0;
Chia-I Wuc5e2ae32014-11-25 11:00:12 +0800117 meta->dst.reloc_flags = INTEL_RELOC_WRITE;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800118}
119
120static void cmd_meta_set_src_for_img(struct intel_cmd *cmd,
121 const struct intel_img *img,
122 XGL_FORMAT format,
123 XGL_IMAGE_ASPECT aspect,
124 struct intel_cmd_meta *meta)
125{
126 XGL_IMAGE_VIEW_CREATE_INFO info;
127 struct intel_img_view *view;
128 XGL_RESULT ret;
129
130 memset(&info, 0, sizeof(info));
131 info.sType = XGL_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO;
132 info.image = (XGL_IMAGE) img;
133
134 switch (img->type) {
135 case XGL_IMAGE_1D:
136 info.viewType = XGL_IMAGE_VIEW_1D;
137 break;
138 case XGL_IMAGE_2D:
139 info.viewType = XGL_IMAGE_VIEW_2D;
140 break;
141 case XGL_IMAGE_3D:
142 info.viewType = XGL_IMAGE_VIEW_3D;
143 break;
144 default:
145 break;
146 }
147
148 info.format = format;
149 info.channels.r = XGL_CHANNEL_SWIZZLE_R;
150 info.channels.g = XGL_CHANNEL_SWIZZLE_G;
151 info.channels.b = XGL_CHANNEL_SWIZZLE_B;
152 info.channels.a = XGL_CHANNEL_SWIZZLE_A;
153 info.subresourceRange.aspect = aspect;
154 info.subresourceRange.baseMipLevel = 0;
155 info.subresourceRange.mipLevels = XGL_LAST_MIP_OR_SLICE;
156 info.subresourceRange.baseArraySlice = 0;
157 info.subresourceRange.arraySize = XGL_LAST_MIP_OR_SLICE;
158
159 ret = intel_img_view_create(cmd->dev, &info, &view);
160 if (ret != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700161 cmd_fail(cmd, ret);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800162 return;
163 }
164
165 meta->src.valid = true;
166
167 memcpy(meta->src.surface, view->cmd,
168 sizeof(view->cmd[0]) * view->cmd_len);
169 meta->src.surface_len = view->cmd_len;
170
171 meta->src.reloc_target = (intptr_t) img->obj.mem->bo;
172 meta->src.reloc_offset = 0;
173 meta->src.reloc_flags = 0;
174
175 intel_img_view_destroy(view);
176}
177
Chia-I Wu83084ba2014-12-04 12:49:52 +0800178static void cmd_meta_adjust_compressed_dst(struct intel_cmd *cmd,
179 const struct intel_img *img,
180 struct intel_cmd_meta *meta)
181{
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600182 int32_t w, h, layer;
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800183 unsigned x_offset, y_offset;
Chia-I Wu83084ba2014-12-04 12:49:52 +0800184
185 if (cmd_gen(cmd) >= INTEL_GEN(7)) {
186 w = GEN_EXTRACT(meta->dst.surface[2], GEN7_SURFACE_DW2_WIDTH);
187 h = GEN_EXTRACT(meta->dst.surface[2], GEN7_SURFACE_DW2_HEIGHT);
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800188 layer = GEN_EXTRACT(meta->dst.surface[4],
189 GEN7_SURFACE_DW4_MIN_ARRAY_ELEMENT);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800190 } else {
191 w = GEN_EXTRACT(meta->dst.surface[2], GEN6_SURFACE_DW2_WIDTH);
192 h = GEN_EXTRACT(meta->dst.surface[2], GEN6_SURFACE_DW2_HEIGHT);
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800193 layer = GEN_EXTRACT(meta->dst.surface[4],
194 GEN6_SURFACE_DW4_MIN_ARRAY_ELEMENT);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800195 }
196
197 /* note that the width/height fields have the real values minus 1 */
198 w = (w + img->layout.block_width) / img->layout.block_width - 1;
199 h = (h + img->layout.block_height) / img->layout.block_height - 1;
200
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800201 /* adjust width and height */
Chia-I Wu83084ba2014-12-04 12:49:52 +0800202 if (cmd_gen(cmd) >= INTEL_GEN(7)) {
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800203 meta->dst.surface[2] &= ~(GEN7_SURFACE_DW2_WIDTH__MASK |
204 GEN7_SURFACE_DW2_HEIGHT__MASK);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800205 meta->dst.surface[2] |= GEN_SHIFT32(w, GEN7_SURFACE_DW2_WIDTH) |
206 GEN_SHIFT32(h, GEN7_SURFACE_DW2_HEIGHT);
207 } else {
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800208 meta->dst.surface[2] &= ~(GEN6_SURFACE_DW2_WIDTH__MASK |
209 GEN6_SURFACE_DW2_HEIGHT__MASK);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800210 meta->dst.surface[2] |= GEN_SHIFT32(w, GEN6_SURFACE_DW2_WIDTH) |
211 GEN_SHIFT32(h, GEN6_SURFACE_DW2_HEIGHT);
212 }
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800213
214 if (!layer)
215 return;
216
217 meta->dst.reloc_offset = intel_layout_get_slice_tile_offset(&img->layout,
218 0, layer, &x_offset, &y_offset);
219
220 /*
221 * The lower 2 bits (or 1 bit for Y) are missing. This may be a problem
222 * for small images (16x16 or smaller). We will need to adjust the
223 * drawing rectangle instead.
224 */
225 x_offset = (x_offset / img->layout.block_width) >> 2;
226 y_offset = (y_offset / img->layout.block_height) >> 1;
227
228 /* adjust min array element and X/Y offsets */
229 if (cmd_gen(cmd) >= INTEL_GEN(7)) {
230 meta->dst.surface[4] &= ~GEN7_SURFACE_DW4_MIN_ARRAY_ELEMENT__MASK;
231 meta->dst.surface[5] |= GEN_SHIFT32(x_offset, GEN7_SURFACE_DW5_X_OFFSET) |
232 GEN_SHIFT32(y_offset, GEN7_SURFACE_DW5_Y_OFFSET);
233 } else {
234 meta->dst.surface[4] &= ~GEN6_SURFACE_DW4_MIN_ARRAY_ELEMENT__MASK;
235 meta->dst.surface[5] |= GEN_SHIFT32(x_offset, GEN6_SURFACE_DW5_X_OFFSET) |
236 GEN_SHIFT32(y_offset, GEN6_SURFACE_DW5_Y_OFFSET);
237 }
Chia-I Wu83084ba2014-12-04 12:49:52 +0800238}
239
Chia-I Wuc14d1562014-10-17 09:49:22 +0800240static void cmd_meta_set_dst_for_img(struct intel_cmd *cmd,
241 const struct intel_img *img,
242 XGL_FORMAT format,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600243 uint32_t lod, uint32_t layer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800244 struct intel_cmd_meta *meta)
245{
246 XGL_COLOR_ATTACHMENT_VIEW_CREATE_INFO info;
247 struct intel_rt_view *rt;
248 XGL_RESULT ret;
249
250 memset(&info, 0, sizeof(info));
251 info.sType = XGL_STRUCTURE_TYPE_COLOR_ATTACHMENT_VIEW_CREATE_INFO;
252 info.image = (XGL_IMAGE) img;
253 info.format = format;
254 info.mipLevel = lod;
255 info.baseArraySlice = layer;
256 info.arraySize = 1;
257
258 ret = intel_rt_view_create(cmd->dev, &info, &rt);
259 if (ret != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700260 cmd_fail(cmd, ret);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800261 return;
262 }
263
264 meta->dst.valid = true;
265
266 memcpy(meta->dst.surface, rt->cmd, sizeof(rt->cmd[0]) * rt->cmd_len);
267 meta->dst.surface_len = rt->cmd_len;
268
269 meta->dst.reloc_target = (intptr_t) img->obj.mem->bo;
270 meta->dst.reloc_offset = 0;
Chia-I Wuc5e2ae32014-11-25 11:00:12 +0800271 meta->dst.reloc_flags = INTEL_RELOC_WRITE;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800272
Chia-I Wu83084ba2014-12-04 12:49:52 +0800273 if (icd_format_is_compressed(img->layout.format))
274 cmd_meta_adjust_compressed_dst(cmd, img, meta);
275
Chia-I Wuc14d1562014-10-17 09:49:22 +0800276 intel_rt_view_destroy(rt);
277}
278
279static void cmd_meta_set_src_for_writer(struct intel_cmd *cmd,
280 enum intel_cmd_writer_type writer,
281 XGL_GPU_SIZE size,
282 XGL_FORMAT format,
283 struct intel_cmd_meta *meta)
284{
Chia-I Wu714df452015-01-01 07:55:04 +0800285 struct intel_buf_view *view;
286 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800287
Chia-I Wu714df452015-01-01 07:55:04 +0800288 res = cmd_meta_create_buf_view(cmd, (XGL_BUFFER) XGL_NULL_HANDLE,
289 size, format, &view);
290 if (res != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700291 cmd_fail(cmd, res);
Chia-I Wu714df452015-01-01 07:55:04 +0800292 return;
293 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800294
295 meta->src.valid = true;
296
Chia-I Wu714df452015-01-01 07:55:04 +0800297 memcpy(meta->src.surface, view->cmd,
298 sizeof(view->cmd[0]) * view->cmd_len);
299 meta->src.surface_len = view->cmd_len;
300
301 intel_buf_view_destroy(view);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800302
303 meta->src.reloc_target = (intptr_t) writer;
304 meta->src.reloc_offset = 0;
305 meta->src.reloc_flags = INTEL_CMD_RELOC_TARGET_IS_WRITER;
306}
307
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800308static void cmd_meta_set_ds_view(struct intel_cmd *cmd,
309 const struct intel_img *img,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600310 uint32_t lod, uint32_t layer,
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800311 struct intel_cmd_meta *meta)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800312{
313 XGL_DEPTH_STENCIL_VIEW_CREATE_INFO info;
314 struct intel_ds_view *ds;
315 XGL_RESULT ret;
316
317 memset(&info, 0, sizeof(info));
318 info.sType = XGL_STRUCTURE_TYPE_DEPTH_STENCIL_VIEW_CREATE_INFO;
319 info.image = (XGL_IMAGE) img;
320 info.mipLevel = lod;
321 info.baseArraySlice = layer;
322 info.arraySize = 1;
323
324 ret = intel_ds_view_create(cmd->dev, &info, &ds);
325 if (ret != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700326 cmd_fail(cmd, ret);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800327 return;
328 }
329
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800330 meta->ds.view = ds;
331}
332
333static void cmd_meta_set_ds_state(struct intel_cmd *cmd,
334 XGL_IMAGE_ASPECT aspect,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600335 uint32_t stencil_ref,
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800336 struct intel_cmd_meta *meta)
337{
Tony Barbourfa6cac72015-01-16 14:27:35 -0700338 meta->ds.stencil_ref = stencil_ref;
339 meta->ds.aspect = aspect;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800340}
341
342static enum intel_dev_meta_shader get_shader_id(const struct intel_dev *dev,
343 const struct intel_img *img,
344 bool copy_array)
345{
346 enum intel_dev_meta_shader shader_id;
347
348 switch (img->type) {
349 case XGL_IMAGE_1D:
350 shader_id = (copy_array) ?
351 INTEL_DEV_META_FS_COPY_1D_ARRAY : INTEL_DEV_META_FS_COPY_1D;
352 break;
353 case XGL_IMAGE_2D:
354 shader_id = (img->samples > 1) ? INTEL_DEV_META_FS_COPY_2D_MS :
355 (copy_array) ? INTEL_DEV_META_FS_COPY_2D_ARRAY :
356 INTEL_DEV_META_FS_COPY_2D;
357 break;
358 case XGL_IMAGE_3D:
359 default:
360 shader_id = INTEL_DEV_META_FS_COPY_2D_ARRAY;
361 break;
362 }
363
364 return shader_id;
365}
366
Chia-I Wuf3a27252014-11-24 15:27:01 +0800367static bool cmd_meta_mem_dword_aligned(const struct intel_cmd *cmd,
368 XGL_GPU_SIZE src_offset,
369 XGL_GPU_SIZE dst_offset,
370 XGL_GPU_SIZE size)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800371{
Chia-I Wuf3a27252014-11-24 15:27:01 +0800372 return !((src_offset | dst_offset | size) & 0x3);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800373}
374
375static XGL_FORMAT cmd_meta_img_raw_format(const struct intel_cmd *cmd,
376 XGL_FORMAT format)
377{
Chia-I Wuffdde352014-12-20 15:12:16 +0800378 switch (icd_format_get_size(format)) {
379 case 1:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700380 format = XGL_FMT_R8_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800381 break;
382 case 2:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700383 format = XGL_FMT_R16_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800384 break;
385 case 4:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700386 format = XGL_FMT_R32_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800387 break;
388 case 8:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700389 format = XGL_FMT_R32G32_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800390 break;
391 case 16:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700392 format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800393 break;
394 default:
395 assert(!"unsupported image format for raw blit op");
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700396 format = XGL_FMT_UNDEFINED;
Chia-I Wuffdde352014-12-20 15:12:16 +0800397 break;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800398 }
399
400 return format;
401}
402
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600403ICD_EXPORT void XGLAPI xglCmdCopyBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800404 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800405 XGL_BUFFER srcBuffer,
406 XGL_BUFFER destBuffer,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600407 uint32_t regionCount,
Chia-I Wu714df452015-01-01 07:55:04 +0800408 const XGL_BUFFER_COPY* pRegions)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800409{
410 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800411 struct intel_buf *src = intel_buf(srcBuffer);
412 struct intel_buf *dst = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800413 struct intel_cmd_meta meta;
414 XGL_FORMAT format;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600415 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800416
417 memset(&meta, 0, sizeof(meta));
Chia-I Wuf3a27252014-11-24 15:27:01 +0800418 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800419
Chia-I Wuc14d1562014-10-17 09:49:22 +0800420 meta.height = 1;
421 meta.samples = 1;
422
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700423 format = XGL_FMT_UNDEFINED;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800424
425 for (i = 0; i < regionCount; i++) {
Chia-I Wu714df452015-01-01 07:55:04 +0800426 const XGL_BUFFER_COPY *region = &pRegions[i];
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700427 XGL_FORMAT fmt;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800428
Chia-I Wuf3a27252014-11-24 15:27:01 +0800429 meta.src.x = region->srcOffset;
430 meta.dst.x = region->destOffset;
431 meta.width = region->copySize;
432
433 if (cmd_meta_mem_dword_aligned(cmd, region->srcOffset,
434 region->destOffset, region->copySize)) {
435 meta.shader_id = INTEL_DEV_META_VS_COPY_MEM;
436 meta.src.x /= 4;
437 meta.dst.x /= 4;
438 meta.width /= 4;
439
440 /*
441 * INTEL_DEV_META_VS_COPY_MEM is untyped but expects the stride to
442 * be 16
443 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700444 fmt = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuf3a27252014-11-24 15:27:01 +0800445 } else {
446 if (cmd_gen(cmd) == INTEL_GEN(6)) {
447 intel_dev_log(cmd->dev, XGL_DBG_MSG_ERROR,
448 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
Chia-I Wu714df452015-01-01 07:55:04 +0800449 "unaligned xglCmdCopyBuffer unsupported");
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700450 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuf3a27252014-11-24 15:27:01 +0800451 continue;
452 }
453
454 meta.shader_id = INTEL_DEV_META_VS_COPY_MEM_UNALIGNED;
455
456 /*
457 * INTEL_DEV_META_VS_COPY_MEM_UNALIGNED is untyped but expects the
458 * stride to be 4
459 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700460 fmt = XGL_FMT_R8G8B8A8_UINT;
Chia-I Wuf3a27252014-11-24 15:27:01 +0800461 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800462
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700463 if (format != fmt) {
464 format = fmt;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800465
Chia-I Wu714df452015-01-01 07:55:04 +0800466 cmd_meta_set_src_for_buf(cmd, src, format, &meta);
467 cmd_meta_set_dst_for_buf(cmd, dst, format, &meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800468 }
469
Chia-I Wuc14d1562014-10-17 09:49:22 +0800470 cmd_draw_meta(cmd, &meta);
471 }
472}
473
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600474ICD_EXPORT void XGLAPI xglCmdCopyImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800475 XGL_CMD_BUFFER cmdBuffer,
476 XGL_IMAGE srcImage,
477 XGL_IMAGE destImage,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600478 uint32_t regionCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800479 const XGL_IMAGE_COPY* pRegions)
480{
481 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
482 struct intel_img *src = intel_img(srcImage);
483 struct intel_img *dst = intel_img(destImage);
484 struct intel_cmd_meta meta;
485 XGL_FORMAT raw_format;
Cody Northrop30a2b462015-02-10 09:28:30 -0700486 bool raw_copy = false;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600487 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800488
489 if (src->type != dst->type) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700490 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800491 return;
492 }
493
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700494 if (src->layout.format == dst->layout.format) {
Chia-I Wuc14d1562014-10-17 09:49:22 +0800495 raw_copy = true;
496 raw_format = cmd_meta_img_raw_format(cmd, src->layout.format);
497 } else if (icd_format_is_compressed(src->layout.format) ||
498 icd_format_is_compressed(dst->layout.format)) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700499 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800500 return;
501 }
502
503 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800504 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800505
506 cmd_meta_set_src_for_img(cmd, src,
507 (raw_copy) ? raw_format : src->layout.format,
508 XGL_IMAGE_ASPECT_COLOR, &meta);
509
510 meta.samples = dst->samples;
511
512 for (i = 0; i < regionCount; i++) {
513 const XGL_IMAGE_COPY *region = &pRegions[i];
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600514 uint32_t j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800515
516 meta.shader_id = get_shader_id(cmd->dev, src,
517 (region->extent.depth > 1));
518
519 meta.src.lod = region->srcSubresource.mipLevel;
520 meta.src.layer = region->srcSubresource.arraySlice +
521 region->srcOffset.z;
522 meta.src.x = region->srcOffset.x;
523 meta.src.y = region->srcOffset.y;
524
525 meta.dst.lod = region->destSubresource.mipLevel;
526 meta.dst.layer = region->destSubresource.arraySlice +
527 region->destOffset.z;
528 meta.dst.x = region->destOffset.x;
529 meta.dst.y = region->destOffset.y;
530
531 meta.width = region->extent.width;
532 meta.height = region->extent.height;
533
Chia-I Wueccc7682015-03-24 14:15:30 +0800534 if (raw_copy) {
535 const uint32_t block_width =
536 icd_format_get_block_width(raw_format);
537
538 meta.src.x /= block_width;
539 meta.src.y /= block_width;
540 meta.dst.x /= block_width;
541 meta.dst.y /= block_width;
542 meta.width /= block_width;
543 meta.height /= block_width;
544 }
545
Chia-I Wuc14d1562014-10-17 09:49:22 +0800546 for (j = 0; j < region->extent.depth; j++) {
547 cmd_meta_set_dst_for_img(cmd, dst,
548 (raw_copy) ? raw_format : dst->layout.format,
549 meta.dst.lod, meta.dst.layer, &meta);
550
551 cmd_draw_meta(cmd, &meta);
552
553 meta.src.layer++;
554 meta.dst.layer++;
555 }
556 }
557}
558
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600559ICD_EXPORT void XGLAPI xglCmdCopyBufferToImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800560 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800561 XGL_BUFFER srcBuffer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800562 XGL_IMAGE destImage,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600563 uint32_t regionCount,
Chia-I Wu714df452015-01-01 07:55:04 +0800564 const XGL_BUFFER_IMAGE_COPY* pRegions)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800565{
566 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800567 struct intel_buf *buf = intel_buf(srcBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800568 struct intel_img *img = intel_img(destImage);
569 struct intel_cmd_meta meta;
570 XGL_FORMAT format;
Chia-I Wueccc7682015-03-24 14:15:30 +0800571 uint32_t block_width, i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800572
573 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800574 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800575
576 meta.shader_id = INTEL_DEV_META_FS_COPY_MEM_TO_IMG;
577 meta.samples = img->samples;
578
579 format = cmd_meta_img_raw_format(cmd, img->layout.format);
Chia-I Wueccc7682015-03-24 14:15:30 +0800580 block_width = icd_format_get_block_width(format);
Chia-I Wu714df452015-01-01 07:55:04 +0800581 cmd_meta_set_src_for_buf(cmd, buf, format, &meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800582
583 for (i = 0; i < regionCount; i++) {
Chia-I Wu714df452015-01-01 07:55:04 +0800584 const XGL_BUFFER_IMAGE_COPY *region = &pRegions[i];
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600585 uint32_t j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800586
Chia-I Wu714df452015-01-01 07:55:04 +0800587 meta.src.x = region->bufferOffset / icd_format_get_size(format);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800588
589 meta.dst.lod = region->imageSubresource.mipLevel;
590 meta.dst.layer = region->imageSubresource.arraySlice +
591 region->imageOffset.z;
Chia-I Wueccc7682015-03-24 14:15:30 +0800592 meta.dst.x = region->imageOffset.x / block_width;
593 meta.dst.y = region->imageOffset.y / block_width;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800594
Chia-I Wueccc7682015-03-24 14:15:30 +0800595 meta.width = region->imageExtent.width / block_width;
596 meta.height = region->imageExtent.height / block_width;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800597
598 for (j = 0; j < region->imageExtent.depth; j++) {
599 cmd_meta_set_dst_for_img(cmd, img, format,
600 meta.dst.lod, meta.dst.layer, &meta);
601
602 cmd_draw_meta(cmd, &meta);
603
604 meta.src.x += meta.width * meta.height;
605 meta.dst.layer++;
606 }
607 }
608}
609
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600610ICD_EXPORT void XGLAPI xglCmdCopyImageToBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800611 XGL_CMD_BUFFER cmdBuffer,
612 XGL_IMAGE srcImage,
Chia-I Wu714df452015-01-01 07:55:04 +0800613 XGL_BUFFER destBuffer,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600614 uint32_t regionCount,
Chia-I Wu714df452015-01-01 07:55:04 +0800615 const XGL_BUFFER_IMAGE_COPY* pRegions)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800616{
617 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
618 struct intel_img *img = intel_img(srcImage);
Chia-I Wu714df452015-01-01 07:55:04 +0800619 struct intel_buf *buf = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800620 struct intel_cmd_meta meta;
Chia-I Wu714df452015-01-01 07:55:04 +0800621 XGL_FORMAT img_format, buf_format;
Chia-I Wueccc7682015-03-24 14:15:30 +0800622 uint32_t block_width, i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800623
624 memset(&meta, 0, sizeof(meta));
Chia-I Wua44b6482014-12-20 14:58:01 +0800625 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800626
Chia-I Wua44b6482014-12-20 14:58:01 +0800627 img_format = cmd_meta_img_raw_format(cmd, img->layout.format);
Chia-I Wueccc7682015-03-24 14:15:30 +0800628 block_width = icd_format_get_block_width(img_format);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800629
Chia-I Wu714df452015-01-01 07:55:04 +0800630 /* buf_format is ignored by hw, but we derive stride from it */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700631 switch (img_format) {
632 case XGL_FMT_R8_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800633 meta.shader_id = INTEL_DEV_META_VS_COPY_R8_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700634 buf_format = XGL_FMT_R8G8B8A8_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800635 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700636 case XGL_FMT_R16_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800637 meta.shader_id = INTEL_DEV_META_VS_COPY_R16_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700638 buf_format = XGL_FMT_R8G8B8A8_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800639 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700640 case XGL_FMT_R32_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800641 meta.shader_id = INTEL_DEV_META_VS_COPY_R32_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700642 buf_format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800643 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700644 case XGL_FMT_R32G32_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800645 meta.shader_id = INTEL_DEV_META_VS_COPY_R32G32_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700646 buf_format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800647 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700648 case XGL_FMT_R32G32B32A32_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800649 meta.shader_id = INTEL_DEV_META_VS_COPY_R32G32B32A32_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700650 buf_format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800651 break;
652 default:
Chia-I Wub93638e2015-02-18 10:30:50 -0700653 img_format = XGL_FMT_UNDEFINED;
654 buf_format = XGL_FMT_UNDEFINED;
Chia-I Wua44b6482014-12-20 14:58:01 +0800655 break;
656 }
657
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700658 if (img_format == XGL_FMT_UNDEFINED ||
Chia-I Wua44b6482014-12-20 14:58:01 +0800659 (cmd_gen(cmd) == INTEL_GEN(6) &&
660 icd_format_get_size(img_format) < 4)) {
661 intel_dev_log(cmd->dev, XGL_DBG_MSG_ERROR,
662 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
Chia-I Wu714df452015-01-01 07:55:04 +0800663 "xglCmdCopyImageToBuffer with bpp %d unsupported",
Chia-I Wua44b6482014-12-20 14:58:01 +0800664 icd_format_get_size(img->layout.format));
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700665 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wua44b6482014-12-20 14:58:01 +0800666 return;
667 }
668
669 cmd_meta_set_src_for_img(cmd, img, img_format,
670 XGL_IMAGE_ASPECT_COLOR, &meta);
Chia-I Wu714df452015-01-01 07:55:04 +0800671 cmd_meta_set_dst_for_buf(cmd, buf, buf_format, &meta);
Chia-I Wua44b6482014-12-20 14:58:01 +0800672
Chia-I Wuc14d1562014-10-17 09:49:22 +0800673 meta.samples = 1;
674
675 for (i = 0; i < regionCount; i++) {
Chia-I Wu714df452015-01-01 07:55:04 +0800676 const XGL_BUFFER_IMAGE_COPY *region = &pRegions[i];
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600677 uint32_t j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800678
Chia-I Wuc14d1562014-10-17 09:49:22 +0800679 meta.src.lod = region->imageSubresource.mipLevel;
680 meta.src.layer = region->imageSubresource.arraySlice +
681 region->imageOffset.z;
Chia-I Wueccc7682015-03-24 14:15:30 +0800682 meta.src.x = region->imageOffset.x / block_width;
683 meta.src.y = region->imageOffset.y / block_width;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800684
Chia-I Wu714df452015-01-01 07:55:04 +0800685 meta.dst.x = region->bufferOffset / icd_format_get_size(img_format);
Chia-I Wueccc7682015-03-24 14:15:30 +0800686 meta.width = region->imageExtent.width / block_width;
687 meta.height = region->imageExtent.height / block_width;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800688
689 for (j = 0; j < region->imageExtent.depth; j++) {
690 cmd_draw_meta(cmd, &meta);
691
692 meta.src.layer++;
Chia-I Wua44b6482014-12-20 14:58:01 +0800693 meta.dst.x += meta.width * meta.height;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800694 }
695 }
696}
697
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600698ICD_EXPORT void XGLAPI xglCmdCloneImageData(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800699 XGL_CMD_BUFFER cmdBuffer,
700 XGL_IMAGE srcImage,
Mike Stroyan55658c22014-12-04 11:08:39 +0000701 XGL_IMAGE_LAYOUT srcImageLayout,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800702 XGL_IMAGE destImage,
Mike Stroyan55658c22014-12-04 11:08:39 +0000703 XGL_IMAGE_LAYOUT destImageLayout)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800704{
Chia-I Wud788fc62014-12-22 14:24:11 +0800705 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
706 struct intel_img *src = intel_img(srcImage);
707 struct intel_img *dst = intel_img(destImage);
Chia-I Wu714df452015-01-01 07:55:04 +0800708 struct intel_buf *src_buf, *dst_buf;
709 XGL_BUFFER_CREATE_INFO buf_info;
710 XGL_BUFFER_COPY buf_region;
711 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800712
Chia-I Wu714df452015-01-01 07:55:04 +0800713 memset(&buf_info, 0, sizeof(buf_info));
714 buf_info.sType = XGL_STRUCTURE_TYPE_BUFFER_CREATE_INFO;
715 buf_info.size = src->obj.mem->size;
716
717 memset(&buf_region, 0, sizeof(buf_region));
718 buf_region.copySize = src->obj.mem->size;
719
720 res = intel_buf_create(cmd->dev, &buf_info, &src_buf);
721 if (res != XGL_SUCCESS) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700722 cmd_fail(cmd, res);
Chia-I Wu714df452015-01-01 07:55:04 +0800723 return;
724 }
725
726 res = intel_buf_create(cmd->dev, &buf_info, &dst_buf);
727 if (res != XGL_SUCCESS) {
728 intel_buf_destroy(src_buf);
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700729 cmd_fail(cmd, res);
Chia-I Wu714df452015-01-01 07:55:04 +0800730 return;
731 }
732
733 intel_obj_bind_mem(&src_buf->obj, src->obj.mem, 0);
734 intel_obj_bind_mem(&dst_buf->obj, dst->obj.mem, 0);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800735
Chia-I Wud788fc62014-12-22 14:24:11 +0800736 cmd_batch_flush(cmd, GEN6_PIPE_CONTROL_RENDER_CACHE_FLUSH);
Chia-I Wu714df452015-01-01 07:55:04 +0800737 xglCmdCopyBuffer(cmdBuffer, (XGL_BUFFER) src_buf,
738 (XGL_BUFFER) dst_buf, 1, &buf_region);
739
740 intel_buf_destroy(src_buf);
741 intel_buf_destroy(dst_buf);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800742}
743
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600744ICD_EXPORT void XGLAPI xglCmdUpdateBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800745 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800746 XGL_BUFFER destBuffer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800747 XGL_GPU_SIZE destOffset,
748 XGL_GPU_SIZE dataSize,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600749 const uint32_t* pData)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800750{
751 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800752 struct intel_buf *dst = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800753 struct intel_cmd_meta meta;
754 XGL_FORMAT format;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800755 uint32_t *ptr;
756 uint32_t offset;
757
Chia-I Wuf3a27252014-11-24 15:27:01 +0800758 /* must be 4-byte aligned */
759 if ((destOffset | dataSize) & 3) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700760 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuf3a27252014-11-24 15:27:01 +0800761 return;
762 }
763
Chia-I Wuc14d1562014-10-17 09:49:22 +0800764 /* write to dynamic state writer first */
765 offset = cmd_state_pointer(cmd, INTEL_CMD_ITEM_BLOB, 32,
766 (dataSize + 3) / 4, &ptr);
767 memcpy(ptr, pData, dataSize);
768
Chia-I Wuc14d1562014-10-17 09:49:22 +0800769 memset(&meta, 0, sizeof(meta));
Chia-I Wuf3a27252014-11-24 15:27:01 +0800770 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800771
Chia-I Wuf3a27252014-11-24 15:27:01 +0800772 meta.shader_id = INTEL_DEV_META_VS_COPY_MEM;
773
774 meta.src.x = offset / 4;
775 meta.dst.x = destOffset / 4;
776 meta.width = dataSize / 4;
777 meta.height = 1;
778 meta.samples = 1;
779
780 /*
781 * INTEL_DEV_META_VS_COPY_MEM is untyped but expects the stride to be 16
782 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700783 format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800784
785 cmd_meta_set_src_for_writer(cmd, INTEL_CMD_WRITER_STATE,
786 offset + dataSize, format, &meta);
Chia-I Wu714df452015-01-01 07:55:04 +0800787 cmd_meta_set_dst_for_buf(cmd, dst, format, &meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800788
Chia-I Wuc14d1562014-10-17 09:49:22 +0800789 cmd_draw_meta(cmd, &meta);
790}
791
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600792ICD_EXPORT void XGLAPI xglCmdFillBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800793 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800794 XGL_BUFFER destBuffer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800795 XGL_GPU_SIZE destOffset,
796 XGL_GPU_SIZE fillSize,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600797 uint32_t data)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800798{
799 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800800 struct intel_buf *dst = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800801 struct intel_cmd_meta meta;
802 XGL_FORMAT format;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800803
804 /* must be 4-byte aligned */
805 if ((destOffset | fillSize) & 3) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -0700806 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800807 return;
808 }
809
810 memset(&meta, 0, sizeof(meta));
Chia-I Wuf3a27252014-11-24 15:27:01 +0800811 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800812
Chia-I Wuf3a27252014-11-24 15:27:01 +0800813 meta.shader_id = INTEL_DEV_META_VS_FILL_MEM;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800814
815 meta.clear_val[0] = data;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800816
Chia-I Wuf3a27252014-11-24 15:27:01 +0800817 meta.dst.x = destOffset / 4;
818 meta.width = fillSize / 4;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800819 meta.height = 1;
820 meta.samples = 1;
821
Chia-I Wuf3a27252014-11-24 15:27:01 +0800822 /*
823 * INTEL_DEV_META_VS_FILL_MEM is untyped but expects the stride to be 16
824 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700825 format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuf3a27252014-11-24 15:27:01 +0800826
Chia-I Wu714df452015-01-01 07:55:04 +0800827 cmd_meta_set_dst_for_buf(cmd, dst, format, &meta);
Chia-I Wuf3a27252014-11-24 15:27:01 +0800828
Chia-I Wuc14d1562014-10-17 09:49:22 +0800829 cmd_draw_meta(cmd, &meta);
830}
831
832static void cmd_meta_clear_image(struct intel_cmd *cmd,
833 struct intel_img *img,
834 XGL_FORMAT format,
835 struct intel_cmd_meta *meta,
836 const XGL_IMAGE_SUBRESOURCE_RANGE *range)
837{
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600838 uint32_t mip_levels, array_size;
839 uint32_t i, j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800840
841 if (range->baseMipLevel >= img->mip_levels ||
842 range->baseArraySlice >= img->array_size)
843 return;
844
845 mip_levels = img->mip_levels - range->baseMipLevel;
846 if (mip_levels > range->mipLevels)
847 mip_levels = range->mipLevels;
848
849 array_size = img->array_size - range->baseArraySlice;
850 if (array_size > range->arraySize)
851 array_size = range->arraySize;
852
Chia-I Wuc14d1562014-10-17 09:49:22 +0800853 for (i = 0; i < mip_levels; i++) {
Chia-I Wufaaed472014-10-28 14:17:43 +0800854 meta->dst.lod = range->baseMipLevel + i;
855 meta->dst.layer = range->baseArraySlice;
856
Chia-I Wu73520ac2015-02-19 11:17:45 -0700857 /* TODO INTEL_CMD_META_DS_HIZ_CLEAR requires 8x4 aligned rectangle */
Chia-I Wuc14d1562014-10-17 09:49:22 +0800858 meta->width = u_minify(img->layout.width0, meta->dst.lod);
859 meta->height = u_minify(img->layout.height0, meta->dst.lod);
860
Chia-I Wu73520ac2015-02-19 11:17:45 -0700861 if (meta->ds.op != INTEL_CMD_META_DS_NOP &&
862 !intel_img_can_enable_hiz(img, meta->dst.lod))
863 continue;
864
Chia-I Wuc14d1562014-10-17 09:49:22 +0800865 for (j = 0; j < array_size; j++) {
866 if (range->aspect == XGL_IMAGE_ASPECT_COLOR) {
867 cmd_meta_set_dst_for_img(cmd, img, format,
868 meta->dst.lod, meta->dst.layer, meta);
869
870 cmd_draw_meta(cmd, meta);
871 } else {
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800872 cmd_meta_set_ds_view(cmd, img, meta->dst.lod,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800873 meta->dst.layer, meta);
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800874 cmd_meta_set_ds_state(cmd, range->aspect,
875 meta->clear_val[1], meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800876
877 cmd_draw_meta(cmd, meta);
878
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800879 intel_ds_view_destroy(meta->ds.view);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800880 }
881
882 meta->dst.layer++;
883 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800884 }
885}
886
Chia-I Wu73520ac2015-02-19 11:17:45 -0700887void cmd_meta_ds_op(struct intel_cmd *cmd,
888 enum intel_cmd_meta_ds_op op,
889 struct intel_img *img,
890 const XGL_IMAGE_SUBRESOURCE_RANGE *range)
891{
892 struct intel_cmd_meta meta;
893
894 if (img->layout.aux != INTEL_LAYOUT_AUX_HIZ)
895 return;
896 if (range->aspect != XGL_IMAGE_ASPECT_DEPTH)
897 return;
898
899 memset(&meta, 0, sizeof(meta));
900 meta.mode = INTEL_CMD_META_DEPTH_STENCIL_RECT;
901 meta.samples = img->samples;
902
903 meta.ds.aspect = XGL_IMAGE_ASPECT_DEPTH;
904 meta.ds.op = op;
905 meta.ds.optimal = true;
906
907 cmd_meta_clear_image(cmd, img, img->layout.format, &meta, range);
908}
909
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600910ICD_EXPORT void XGLAPI xglCmdClearColorImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800911 XGL_CMD_BUFFER cmdBuffer,
912 XGL_IMAGE image,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600913 const float color[4],
914 uint32_t rangeCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800915 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
916{
917 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
918 struct intel_img *img = intel_img(image);
919 struct intel_cmd_meta meta;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600920 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800921
922 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800923 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800924
925 meta.shader_id = INTEL_DEV_META_FS_CLEAR_COLOR;
926 meta.samples = img->samples;
927
928 meta.clear_val[0] = u_fui(color[0]);
929 meta.clear_val[1] = u_fui(color[1]);
930 meta.clear_val[2] = u_fui(color[2]);
931 meta.clear_val[3] = u_fui(color[3]);
932
933 for (i = 0; i < rangeCount; i++) {
934 cmd_meta_clear_image(cmd, img, img->layout.format,
935 &meta, &pRanges[i]);
936 }
937}
938
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600939ICD_EXPORT void XGLAPI xglCmdClearColorImageRaw(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800940 XGL_CMD_BUFFER cmdBuffer,
941 XGL_IMAGE image,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600942 const uint32_t color[4],
943 uint32_t rangeCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800944 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
945{
946 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
947 struct intel_img *img = intel_img(image);
948 struct intel_cmd_meta meta;
949 XGL_FORMAT format;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600950 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800951
952 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800953 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800954
955 meta.shader_id = INTEL_DEV_META_FS_CLEAR_COLOR;
956 meta.samples = img->samples;
957
Chia-I Wuffdde352014-12-20 15:12:16 +0800958 icd_format_get_raw_value(img->layout.format, color, meta.clear_val);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800959 format = cmd_meta_img_raw_format(cmd, img->layout.format);
960
961 for (i = 0; i < rangeCount; i++)
962 cmd_meta_clear_image(cmd, img, format, &meta, &pRanges[i]);
963}
964
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600965ICD_EXPORT void XGLAPI xglCmdClearDepthStencil(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800966 XGL_CMD_BUFFER cmdBuffer,
967 XGL_IMAGE image,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600968 float depth,
969 uint32_t stencil,
970 uint32_t rangeCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800971 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
972{
973 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
974 struct intel_img *img = intel_img(image);
975 struct intel_cmd_meta meta;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600976 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800977
978 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800979 meta.mode = INTEL_CMD_META_DEPTH_STENCIL_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800980
981 meta.shader_id = INTEL_DEV_META_FS_CLEAR_DEPTH;
982 meta.samples = img->samples;
983
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800984 meta.clear_val[0] = u_fui(depth);
985 meta.clear_val[1] = stencil;
986
Chia-I Wu73520ac2015-02-19 11:17:45 -0700987 /* assume optimal DS until revision 59 */
988 meta.ds.optimal = true;
989
Chia-I Wuc14d1562014-10-17 09:49:22 +0800990 for (i = 0; i < rangeCount; i++) {
991 const XGL_IMAGE_SUBRESOURCE_RANGE *range = &pRanges[i];
992
Chia-I Wuc14d1562014-10-17 09:49:22 +0800993 cmd_meta_clear_image(cmd, img, img->layout.format,
994 &meta, range);
995 }
996}
997
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600998ICD_EXPORT void XGLAPI xglCmdResolveImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800999 XGL_CMD_BUFFER cmdBuffer,
1000 XGL_IMAGE srcImage,
1001 XGL_IMAGE destImage,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -06001002 uint32_t rectCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +08001003 const XGL_IMAGE_RESOLVE* pRects)
1004{
1005 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
1006 struct intel_img *src = intel_img(srcImage);
1007 struct intel_img *dst = intel_img(destImage);
1008 struct intel_cmd_meta meta;
1009 XGL_FORMAT format;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -06001010 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +08001011
1012 if (src->samples <= 1 || dst->samples > 1 ||
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -07001013 src->layout.format != dst->layout.format) {
Chia-I Wu4e5577a2015-02-10 11:04:44 -07001014 cmd_fail(cmd, XGL_ERROR_UNKNOWN);
Chia-I Wuc14d1562014-10-17 09:49:22 +08001015 return;
1016 }
1017
1018 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +08001019 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +08001020
1021 switch (src->samples) {
1022 case 2:
1023 default:
1024 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_2X;
1025 break;
1026 case 4:
1027 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_4X;
1028 break;
1029 case 8:
1030 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_8X;
1031 break;
1032 case 16:
1033 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_16X;
1034 break;
1035 }
1036
1037 meta.samples = 1;
1038
1039 format = cmd_meta_img_raw_format(cmd, src->layout.format);
1040 cmd_meta_set_src_for_img(cmd, src, format, XGL_IMAGE_ASPECT_COLOR, &meta);
1041
1042 for (i = 0; i < rectCount; i++) {
1043 const XGL_IMAGE_RESOLVE *rect = &pRects[i];
1044
1045 meta.src.lod = rect->srcSubresource.mipLevel;
1046 meta.src.layer = rect->srcSubresource.arraySlice;
1047 meta.src.x = rect->srcOffset.x;
1048 meta.src.y = rect->srcOffset.y;
1049
1050 meta.dst.lod = rect->destSubresource.mipLevel;
1051 meta.dst.layer = rect->destSubresource.arraySlice;
1052 meta.dst.x = rect->destOffset.x;
1053 meta.dst.y = rect->destOffset.y;
1054
1055 meta.width = rect->extent.width;
1056 meta.height = rect->extent.height;
1057
1058 cmd_meta_set_dst_for_img(cmd, dst, format,
1059 meta.dst.lod, meta.dst.layer, &meta);
1060
1061 cmd_draw_meta(cmd, &meta);
1062 }
1063}