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Chia-I Wu214dac62014-08-05 11:07:40 +08001/*
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -06002 * Vulkan
Chia-I Wu214dac62014-08-05 11:07:40 +08003 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wu214dac62014-08-05 11:07:40 +080026 */
27
28#ifndef GPU_H
29#define GPU_H
30
31#include "intel.h"
Courtney Goeltzenleuchter53e33ec2015-06-09 08:18:13 -060032#include "extension_info.h"
Chia-I Wu214dac62014-08-05 11:07:40 +080033
Chia-I Wu9269d1c2014-08-16 12:47:47 +080034#define INTEL_GPU_ASSERT(gpu, min_gen, max_gen) \
35 assert(intel_gpu_gen(gpu) >= INTEL_GEN(min_gen) && \
36 intel_gpu_gen(gpu) <= INTEL_GEN(max_gen))
37
Chia-I Wu214dac62014-08-05 11:07:40 +080038enum intel_gpu_engine_type {
39 /* TODO BLT support */
40 INTEL_GPU_ENGINE_3D,
41
42 INTEL_GPU_ENGINE_COUNT
43};
44
Chia-I Wud71ff552015-02-20 12:50:12 -070045struct intel_instance;
Chia-I Wu8635e912015-04-09 14:13:57 +080046struct intel_wsi_display;
Chia-I Wud8965932014-10-13 13:32:37 +080047struct intel_winsys;
Chia-I Wu1db76e02014-09-15 14:21:14 +080048
Chia-I Wu214dac62014-08-05 11:07:40 +080049/*
50 * intel_gpu is the only object that does not inherit from intel_base.
51 */
52struct intel_gpu {
Chia-I Wu924c1fc2015-01-19 11:14:00 +080053 struct intel_handle handle;
Chia-I Wu214dac62014-08-05 11:07:40 +080054
55 struct intel_gpu *next;
56
57 int devid; /* PCI device ID */
Chia-I Wuf07865e2014-09-15 13:52:21 +080058 char *primary_node; /* path to the primary node */
59 char *render_node; /* path to the render node */
60 int gen_opaque; /* always read this with intel_gpu_gen() */
Chia-I Wu960f1952014-08-28 23:27:10 +080061 int gt;
Chia-I Wu214dac62014-08-05 11:07:40 +080062
Tony Barbour8205d902015-04-16 15:59:00 -060063 VkDeviceSize max_batch_buffer_size;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -060064 uint32_t batch_buffer_reloc_count;
Chia-I Wu214dac62014-08-05 11:07:40 +080065
66 /*
Chia-I Wuf07865e2014-09-15 13:52:21 +080067 * The enabled hardware features could be limited by the kernel. These
68 * mutable fds allows us to talk to the kernel before the device is
69 * created.
Chia-I Wu214dac62014-08-05 11:07:40 +080070 */
Chia-I Wuf07865e2014-09-15 13:52:21 +080071 int primary_fd_internal;
72 int render_fd_internal;
Chia-I Wu214dac62014-08-05 11:07:40 +080073
Chia-I Wud8965932014-10-13 13:32:37 +080074 struct intel_winsys *winsys;
Chia-I Wu41858c82015-04-04 16:39:25 +080075
Chia-I Wu8635e912015-04-09 14:13:57 +080076 struct intel_wsi_display **displays;
77 uint32_t display_count;
Chia-I Wu214dac62014-08-05 11:07:40 +080078};
79
Tony Barbour8205d902015-04-16 15:59:00 -060080static inline struct intel_gpu *intel_gpu(VkPhysicalDevice gpu)
Chia-I Wu214dac62014-08-05 11:07:40 +080081{
82 return (struct intel_gpu *) gpu;
83}
84
85static inline int intel_gpu_gen(const struct intel_gpu *gpu)
86{
87#ifdef INTEL_GEN_SPECIALIZED
88 return INTEL_GEN(INTEL_GEN_SPECIALIZED);
89#else
90 return gpu->gen_opaque;
91#endif
92}
93
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -060094VkResult intel_gpu_create(const struct intel_instance *instance, int devid,
Chia-I Wud71ff552015-02-20 12:50:12 -070095 const char *primary_node, const char *render_node,
96 struct intel_gpu **gpu_ret);
97void intel_gpu_destroy(struct intel_gpu *gpu);
Chia-I Wu214dac62014-08-05 11:07:40 +080098
99void intel_gpu_get_props(const struct intel_gpu *gpu,
Tony Barbour8205d902015-04-16 15:59:00 -0600100 VkPhysicalDeviceProperties *props);
Chia-I Wu214dac62014-08-05 11:07:40 +0800101void intel_gpu_get_perf(const struct intel_gpu *gpu,
Tony Barbour8205d902015-04-16 15:59:00 -0600102 VkPhysicalDevicePerformance *perf);
Chia-I Wu214dac62014-08-05 11:07:40 +0800103void intel_gpu_get_queue_props(const struct intel_gpu *gpu,
104 enum intel_gpu_engine_type engine,
Tony Barbour8205d902015-04-16 15:59:00 -0600105 VkPhysicalDeviceQueueProperties *props);
Chia-I Wu214dac62014-08-05 11:07:40 +0800106void intel_gpu_get_memory_props(const struct intel_gpu *gpu,
Tony Barbour8205d902015-04-16 15:59:00 -0600107 VkPhysicalDeviceMemoryProperties *props);
Chia-I Wu214dac62014-08-05 11:07:40 +0800108
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800109int intel_gpu_get_max_threads(const struct intel_gpu *gpu,
Tony Barbour8205d902015-04-16 15:59:00 -0600110 VkShaderStage stage);
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800111
Chia-I Wu41858c82015-04-04 16:39:25 +0800112int intel_gpu_get_primary_fd(struct intel_gpu *gpu);
113
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600114VkResult intel_gpu_init_winsys(struct intel_gpu *gpu);
Chia-I Wu41858c82015-04-04 16:39:25 +0800115void intel_gpu_cleanup_winsys(struct intel_gpu *gpu);
Chia-I Wu214dac62014-08-05 11:07:40 +0800116
Courtney Goeltzenleuchter95b73722015-06-08 18:08:35 -0600117enum intel_phy_dev_ext_type intel_gpu_lookup_phy_dev_extension(
118 const struct intel_gpu *gpu,
119 const VkExtensionProperties *ext);
Chia-I Wu214dac62014-08-05 11:07:40 +0800120
Chia-I Wu214dac62014-08-05 11:07:40 +0800121#endif /* GPU_H */