Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 1 | /* |
Courtney Goeltzenleuchter | 9cc421e | 2015-04-08 15:36:08 -0600 | [diff] [blame] | 2 | * Vulkan |
Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2014 LunarG, Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included |
| 14 | * in all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
Chia-I Wu | 44e4236 | 2014-09-02 08:32:09 +0800 | [diff] [blame] | 23 | * |
| 24 | * Authors: |
| 25 | * Chia-I Wu <olv@lunarg.com> |
Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 26 | */ |
| 27 | |
| 28 | #ifndef CMD_PRIV_H |
| 29 | #define CMD_PRIV_H |
| 30 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 31 | #include "genhw/genhw.h" |
Chia-I Wu | 32710d7 | 2014-08-20 16:05:22 +0800 | [diff] [blame] | 32 | #include "dev.h" |
Chia-I Wu | bdeed15 | 2015-07-09 12:16:29 +0800 | [diff] [blame] | 33 | #include "fb.h" |
Chia-I Wu | 32710d7 | 2014-08-20 16:05:22 +0800 | [diff] [blame] | 34 | #include "gpu.h" |
Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 35 | #include "cmd.h" |
| 36 | |
Chia-I Wu | 32710d7 | 2014-08-20 16:05:22 +0800 | [diff] [blame] | 37 | #define CMD_ASSERT(cmd, min_gen, max_gen) \ |
| 38 | INTEL_GPU_ASSERT((cmd)->dev->gpu, (min_gen), (max_gen)) |
| 39 | |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 40 | enum intel_cmd_item_type { |
| 41 | /* for state buffer */ |
| 42 | INTEL_CMD_ITEM_BLOB, |
| 43 | INTEL_CMD_ITEM_CLIP_VIEWPORT, |
| 44 | INTEL_CMD_ITEM_SF_VIEWPORT, |
| 45 | INTEL_CMD_ITEM_SCISSOR_RECT, |
| 46 | INTEL_CMD_ITEM_CC_VIEWPORT, |
| 47 | INTEL_CMD_ITEM_COLOR_CALC, |
| 48 | INTEL_CMD_ITEM_DEPTH_STENCIL, |
| 49 | INTEL_CMD_ITEM_BLEND, |
| 50 | INTEL_CMD_ITEM_SAMPLER, |
| 51 | |
| 52 | /* for surface buffer */ |
| 53 | INTEL_CMD_ITEM_SURFACE, |
| 54 | INTEL_CMD_ITEM_BINDING_TABLE, |
| 55 | |
| 56 | /* for instruction buffer */ |
| 57 | INTEL_CMD_ITEM_KERNEL, |
| 58 | |
| 59 | INTEL_CMD_ITEM_COUNT, |
| 60 | }; |
| 61 | |
| 62 | struct intel_cmd_item { |
| 63 | enum intel_cmd_item_type type; |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 64 | size_t offset; |
| 65 | size_t size; |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 66 | }; |
| 67 | |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 68 | #define INTEL_CMD_RELOC_TARGET_IS_WRITER (1u << 31) |
Chia-I Wu | 958d1b7 | 2014-08-21 11:28:11 +0800 | [diff] [blame] | 69 | struct intel_cmd_reloc { |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 70 | enum intel_cmd_writer_type which; |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 71 | size_t offset; |
Chia-I Wu | 958d1b7 | 2014-08-21 11:28:11 +0800 | [diff] [blame] | 72 | |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 73 | intptr_t target; |
| 74 | uint32_t target_offset; |
Chia-I Wu | 958d1b7 | 2014-08-21 11:28:11 +0800 | [diff] [blame] | 75 | |
Chia-I Wu | 32a2246 | 2014-08-26 14:13:46 +0800 | [diff] [blame] | 76 | uint32_t flags; |
Chia-I Wu | 958d1b7 | 2014-08-21 11:28:11 +0800 | [diff] [blame] | 77 | }; |
| 78 | |
Chia-I Wu | 3d4d4a6 | 2015-07-09 10:34:10 +0800 | [diff] [blame] | 79 | struct intel_att_view; |
Chia-I Wu | c14d156 | 2014-10-17 09:49:22 +0800 | [diff] [blame] | 80 | |
Chia-I Wu | 29e6f50 | 2014-11-24 14:27:29 +0800 | [diff] [blame] | 81 | enum intel_cmd_meta_mode { |
| 82 | /* |
Chia-I Wu | 4d344e6 | 2014-12-20 21:06:04 +0800 | [diff] [blame] | 83 | * Draw POINTLIST of (width * height) vertices with only VS enabled. The |
| 84 | * vertex id is from 0 to (width * height - 1). |
Chia-I Wu | 29e6f50 | 2014-11-24 14:27:29 +0800 | [diff] [blame] | 85 | */ |
| 86 | INTEL_CMD_META_VS_POINTS, |
| 87 | |
| 88 | /* |
| 89 | * Draw a RECTLIST from (dst.x, dst.y) to (dst.x + width, dst.y + height) |
| 90 | * with only FS enabled. |
| 91 | */ |
| 92 | INTEL_CMD_META_FS_RECT, |
| 93 | |
| 94 | /* |
| 95 | * Draw a RECTLIST from (dst.x, dst.y) to (dst.x + width, dst.y + height) |
| 96 | * with only depth/stencil enabled. |
| 97 | */ |
| 98 | INTEL_CMD_META_DEPTH_STENCIL_RECT, |
| 99 | }; |
| 100 | |
Chia-I Wu | 73520ac | 2015-02-19 11:17:45 -0700 | [diff] [blame] | 101 | enum intel_cmd_meta_ds_op { |
| 102 | INTEL_CMD_META_DS_NOP, |
| 103 | INTEL_CMD_META_DS_HIZ_CLEAR, |
| 104 | INTEL_CMD_META_DS_HIZ_RESOLVE, |
| 105 | INTEL_CMD_META_DS_RESOLVE, |
| 106 | }; |
| 107 | |
Chia-I Wu | c14d156 | 2014-10-17 09:49:22 +0800 | [diff] [blame] | 108 | struct intel_cmd_meta { |
Chia-I Wu | 29e6f50 | 2014-11-24 14:27:29 +0800 | [diff] [blame] | 109 | enum intel_cmd_meta_mode mode; |
Chia-I Wu | c14d156 | 2014-10-17 09:49:22 +0800 | [diff] [blame] | 110 | enum intel_dev_meta_shader shader_id; |
| 111 | |
| 112 | struct { |
| 113 | bool valid; |
| 114 | |
| 115 | uint32_t surface[8]; |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 116 | uint32_t surface_len; |
Chia-I Wu | c14d156 | 2014-10-17 09:49:22 +0800 | [diff] [blame] | 117 | |
| 118 | intptr_t reloc_target; |
| 119 | uint32_t reloc_offset; |
| 120 | uint32_t reloc_flags; |
| 121 | |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 122 | uint32_t lod, layer; |
| 123 | uint32_t x, y; |
Chia-I Wu | c14d156 | 2014-10-17 09:49:22 +0800 | [diff] [blame] | 124 | } src, dst; |
| 125 | |
Chia-I Wu | 429a0aa | 2014-10-24 11:57:51 +0800 | [diff] [blame] | 126 | struct { |
Chia-I Wu | 3d4d4a6 | 2015-07-09 10:34:10 +0800 | [diff] [blame] | 127 | struct intel_att_view *view; |
Tony Barbour | fa6cac7 | 2015-01-16 14:27:35 -0700 | [diff] [blame] | 128 | uint32_t stencil_ref; |
Courtney Goeltzenleuchter | 382489d | 2015-04-10 08:34:15 -0600 | [diff] [blame] | 129 | VkImageAspect aspect; |
Chia-I Wu | 73520ac | 2015-02-19 11:17:45 -0700 | [diff] [blame] | 130 | |
| 131 | enum intel_cmd_meta_ds_op op; |
| 132 | bool optimal; |
Chia-I Wu | 429a0aa | 2014-10-24 11:57:51 +0800 | [diff] [blame] | 133 | } ds; |
| 134 | |
Chia-I Wu | c14d156 | 2014-10-17 09:49:22 +0800 | [diff] [blame] | 135 | uint32_t clear_val[4]; |
| 136 | |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 137 | uint32_t width, height; |
| 138 | uint32_t samples; |
Chia-I Wu | c14d156 | 2014-10-17 09:49:22 +0800 | [diff] [blame] | 139 | }; |
| 140 | |
Chia-I Wu | 9f03986 | 2014-08-20 15:39:56 +0800 | [diff] [blame] | 141 | static inline int cmd_gen(const struct intel_cmd *cmd) |
| 142 | { |
| 143 | return intel_gpu_gen(cmd->dev->gpu); |
| 144 | } |
| 145 | |
Courtney Goeltzenleuchter | 382489d | 2015-04-10 08:34:15 -0600 | [diff] [blame] | 146 | static inline void cmd_fail(struct intel_cmd *cmd, VkResult result) |
Chia-I Wu | 4e5577a | 2015-02-10 11:04:44 -0700 | [diff] [blame] | 147 | { |
Courtney Goeltzenleuchter | 1c7c65d | 2015-06-10 17:39:03 -0600 | [diff] [blame] | 148 | intel_dev_log(cmd->dev, VK_DBG_REPORT_ERROR_BIT, |
| 149 | &cmd->obj.base, 0, 0, |
| 150 | "command building error"); |
Chia-I Wu | 4e5577a | 2015-02-10 11:04:44 -0700 | [diff] [blame] | 151 | |
| 152 | cmd->result = result; |
| 153 | } |
| 154 | |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 155 | static inline void cmd_reserve_reloc(struct intel_cmd *cmd, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 156 | uint32_t reloc_len) |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 157 | { |
| 158 | /* fail silently */ |
| 159 | if (cmd->reloc_used + reloc_len > cmd->reloc_count) { |
| 160 | cmd->reloc_used = 0; |
Courtney Goeltzenleuchter | ac83452 | 2015-05-01 17:56:13 -0600 | [diff] [blame] | 161 | cmd_fail(cmd, VK_ERROR_UNKNOWN); |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 162 | } |
| 163 | assert(cmd->reloc_used + reloc_len <= cmd->reloc_count); |
| 164 | } |
| 165 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 166 | void cmd_writer_grow(struct intel_cmd *cmd, |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 167 | enum intel_cmd_writer_type which, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 168 | size_t new_size); |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 169 | |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 170 | void cmd_writer_record(struct intel_cmd *cmd, |
| 171 | enum intel_cmd_writer_type which, |
| 172 | enum intel_cmd_item_type type, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 173 | size_t offset, size_t size); |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 174 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 175 | /** |
| 176 | * Return an offset to a region that is aligned to \p alignment and has at |
| 177 | * least \p size bytes. |
| 178 | */ |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 179 | static inline size_t cmd_writer_reserve(struct intel_cmd *cmd, |
| 180 | enum intel_cmd_writer_type which, |
| 181 | size_t alignment, size_t size) |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 182 | { |
| 183 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 184 | size_t offset; |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 185 | |
| 186 | assert(alignment && u_is_pow2(alignment)); |
| 187 | offset = u_align(writer->used, alignment); |
| 188 | |
| 189 | if (offset + size > writer->size) { |
| 190 | cmd_writer_grow(cmd, which, offset + size); |
| 191 | /* align again in case of errors */ |
| 192 | offset = u_align(writer->used, alignment); |
| 193 | |
| 194 | assert(offset + size <= writer->size); |
| 195 | } |
| 196 | |
| 197 | return offset; |
| 198 | } |
Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 199 | |
Chia-I Wu | 32710d7 | 2014-08-20 16:05:22 +0800 | [diff] [blame] | 200 | /** |
Chia-I Wu | bda55fd | 2014-08-25 12:46:10 +0800 | [diff] [blame] | 201 | * Add a reloc at \p pos. No error checking. |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 202 | */ |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 203 | static inline void cmd_writer_reloc(struct intel_cmd *cmd, |
| 204 | enum intel_cmd_writer_type which, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 205 | size_t offset, intptr_t target, |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 206 | uint32_t target_offset, uint32_t flags) |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 207 | { |
| 208 | struct intel_cmd_reloc *reloc = &cmd->relocs[cmd->reloc_used]; |
| 209 | |
| 210 | assert(cmd->reloc_used < cmd->reloc_count); |
| 211 | |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 212 | reloc->which = which; |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 213 | reloc->offset = offset; |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 214 | reloc->target = target; |
| 215 | reloc->target_offset = target_offset; |
Chia-I Wu | 32a2246 | 2014-08-26 14:13:46 +0800 | [diff] [blame] | 216 | reloc->flags = flags; |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 217 | |
| 218 | cmd->reloc_used++; |
| 219 | } |
| 220 | |
| 221 | /** |
Chia-I Wu | 5da476a | 2014-12-10 08:50:28 +0800 | [diff] [blame] | 222 | * Reserve a region from the state buffer. The offset, in bytes, to the |
| 223 | * reserved region is returned. |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 224 | * |
| 225 | * Note that \p alignment is in bytes and \p len is in DWords. |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 226 | */ |
Chia-I Wu | 5da476a | 2014-12-10 08:50:28 +0800 | [diff] [blame] | 227 | static inline uint32_t cmd_state_reserve(struct intel_cmd *cmd, |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 228 | enum intel_cmd_item_type item, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 229 | size_t alignment, uint32_t len) |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 230 | { |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 231 | const enum intel_cmd_writer_type which = INTEL_CMD_WRITER_STATE; |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 232 | const size_t size = len << 2; |
| 233 | const size_t offset = cmd_writer_reserve(cmd, which, alignment, size); |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 234 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 235 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 236 | /* all states are at least aligned to 32-bytes */ |
| 237 | assert(alignment % 32 == 0); |
| 238 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 239 | writer->used = offset + size; |
| 240 | |
Chia-I Wu | 465fe21 | 2015-02-11 11:27:06 -0700 | [diff] [blame] | 241 | if (intel_debug & (INTEL_DEBUG_BATCH | INTEL_DEBUG_HANG)) |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 242 | cmd_writer_record(cmd, which, item, offset, size); |
| 243 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 244 | return offset; |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 245 | } |
| 246 | |
| 247 | /** |
Chia-I Wu | 5da476a | 2014-12-10 08:50:28 +0800 | [diff] [blame] | 248 | * Get the pointer to a reserved region for updating. The pointer is only |
| 249 | * valid until the next reserve call. |
| 250 | */ |
| 251 | static inline void cmd_state_update(struct intel_cmd *cmd, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 252 | uint32_t offset, uint32_t len, |
Chia-I Wu | 5da476a | 2014-12-10 08:50:28 +0800 | [diff] [blame] | 253 | uint32_t **dw) |
| 254 | { |
| 255 | const enum intel_cmd_writer_type which = INTEL_CMD_WRITER_STATE; |
| 256 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
| 257 | |
| 258 | assert(offset + (len << 2) <= writer->used); |
| 259 | |
| 260 | *dw = (uint32_t *) ((char *) writer->ptr + offset); |
| 261 | } |
| 262 | |
| 263 | /** |
| 264 | * Reserve a region from the state buffer. Both the offset, in bytes, and the |
| 265 | * pointer to the reserved region are returned. The pointer is only valid |
| 266 | * until the next reserve call. |
| 267 | * |
| 268 | * Note that \p alignment is in bytes and \p len is in DWords. |
| 269 | */ |
| 270 | static inline uint32_t cmd_state_pointer(struct intel_cmd *cmd, |
| 271 | enum intel_cmd_item_type item, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 272 | size_t alignment, uint32_t len, |
Chia-I Wu | 5da476a | 2014-12-10 08:50:28 +0800 | [diff] [blame] | 273 | uint32_t **dw) |
| 274 | { |
| 275 | const uint32_t offset = cmd_state_reserve(cmd, item, alignment, len); |
| 276 | |
| 277 | cmd_state_update(cmd, offset, len, dw); |
| 278 | |
| 279 | return offset; |
| 280 | } |
| 281 | |
| 282 | /** |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 283 | * Write a dynamic state to the state buffer. |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 284 | */ |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 285 | static inline uint32_t cmd_state_write(struct intel_cmd *cmd, |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 286 | enum intel_cmd_item_type item, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 287 | size_t alignment, uint32_t len, |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 288 | const uint32_t *dw) |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 289 | { |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 290 | uint32_t offset, *dst; |
| 291 | |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 292 | offset = cmd_state_pointer(cmd, item, alignment, len, &dst); |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 293 | memcpy(dst, dw, len << 2); |
| 294 | |
| 295 | return offset; |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 296 | } |
| 297 | |
| 298 | /** |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 299 | * Write a surface state to the surface buffer. The offset, in bytes, of the |
| 300 | * state is returned. |
| 301 | * |
| 302 | * Note that \p alignment is in bytes and \p len is in DWords. |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 303 | */ |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 304 | static inline uint32_t cmd_surface_write(struct intel_cmd *cmd, |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 305 | enum intel_cmd_item_type item, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 306 | size_t alignment, uint32_t len, |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 307 | const uint32_t *dw) |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 308 | { |
Chia-I Wu | 15cccf7 | 2015-02-10 04:07:40 +0800 | [diff] [blame] | 309 | const enum intel_cmd_writer_type which = INTEL_CMD_WRITER_SURFACE; |
Chia-I Wu | f98dd88 | 2015-02-10 04:17:47 +0800 | [diff] [blame] | 310 | const size_t size = len << 2; |
Chia-I Wu | 15cccf7 | 2015-02-10 04:07:40 +0800 | [diff] [blame] | 311 | const uint32_t offset = cmd_writer_reserve(cmd, which, alignment, size); |
| 312 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
| 313 | uint32_t *dst; |
| 314 | |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 315 | assert(item == INTEL_CMD_ITEM_SURFACE || |
| 316 | item == INTEL_CMD_ITEM_BINDING_TABLE); |
| 317 | |
Chia-I Wu | 15cccf7 | 2015-02-10 04:07:40 +0800 | [diff] [blame] | 318 | /* all states are at least aligned to 32-bytes */ |
| 319 | assert(alignment % 32 == 0); |
| 320 | |
| 321 | writer->used = offset + size; |
| 322 | |
| 323 | if (intel_debug & INTEL_DEBUG_BATCH) |
| 324 | cmd_writer_record(cmd, which, item, offset, size); |
| 325 | |
| 326 | dst = (uint32_t *) ((char *) writer->ptr + offset); |
| 327 | memcpy(dst, dw, size); |
| 328 | |
| 329 | return offset; |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 330 | } |
| 331 | |
| 332 | /** |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 333 | * Add a relocation entry for a DWord of a surface state. |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 334 | */ |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 335 | static inline void cmd_surface_reloc(struct intel_cmd *cmd, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 336 | uint32_t offset, uint32_t dw_index, |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 337 | struct intel_bo *bo, |
| 338 | uint32_t bo_offset, uint32_t reloc_flags) |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 339 | { |
Chia-I Wu | 15cccf7 | 2015-02-10 04:07:40 +0800 | [diff] [blame] | 340 | const enum intel_cmd_writer_type which = INTEL_CMD_WRITER_SURFACE; |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 341 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 342 | cmd_writer_reloc(cmd, which, offset + (dw_index << 2), |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 343 | (intptr_t) bo, bo_offset, reloc_flags); |
| 344 | } |
| 345 | |
| 346 | static inline void cmd_surface_reloc_writer(struct intel_cmd *cmd, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 347 | uint32_t offset, uint32_t dw_index, |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 348 | enum intel_cmd_writer_type writer, |
| 349 | uint32_t writer_offset) |
| 350 | { |
Chia-I Wu | 15cccf7 | 2015-02-10 04:07:40 +0800 | [diff] [blame] | 351 | const enum intel_cmd_writer_type which = INTEL_CMD_WRITER_SURFACE; |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 352 | |
| 353 | cmd_writer_reloc(cmd, which, offset + (dw_index << 2), |
| 354 | (intptr_t) writer, writer_offset, |
| 355 | INTEL_CMD_RELOC_TARGET_IS_WRITER); |
Chia-I Wu | cdff059 | 2014-08-22 09:27:36 +0800 | [diff] [blame] | 356 | } |
| 357 | |
| 358 | /** |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 359 | * Write a kernel to the instruction buffer. The offset, in bytes, of the |
| 360 | * kernel is returned. |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 361 | */ |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 362 | static inline uint32_t cmd_instruction_write(struct intel_cmd *cmd, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 363 | size_t size, |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 364 | const void *kernel) |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 365 | { |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 366 | const enum intel_cmd_writer_type which = INTEL_CMD_WRITER_INSTRUCTION; |
| 367 | /* |
| 368 | * From the Sandy Bridge PRM, volume 4 part 2, page 112: |
| 369 | * |
| 370 | * "Due to prefetch of the instruction stream, the EUs may attempt to |
| 371 | * access up to 8 instructions (128 bytes) beyond the end of the |
| 372 | * kernel program - possibly into the next memory page. Although |
| 373 | * these instructions will not be executed, software must account for |
| 374 | * the prefetch in order to avoid invalid page access faults." |
| 375 | */ |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 376 | const size_t reserved_size = size + 128; |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 377 | /* kernels are aligned to 64 bytes */ |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 378 | const size_t alignment = 64; |
| 379 | const size_t offset = cmd_writer_reserve(cmd, |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 380 | which, alignment, reserved_size); |
| 381 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 382 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 383 | memcpy((char *) writer->ptr + offset, kernel, size); |
Chia-I Wu | 5e25c27 | 2014-08-21 20:19:12 +0800 | [diff] [blame] | 384 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 385 | writer->used = offset + size; |
| 386 | |
Chia-I Wu | 465fe21 | 2015-02-11 11:27:06 -0700 | [diff] [blame] | 387 | if (intel_debug & (INTEL_DEBUG_BATCH | INTEL_DEBUG_HANG)) |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 388 | cmd_writer_record(cmd, which, INTEL_CMD_ITEM_KERNEL, offset, size); |
| 389 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 390 | return offset; |
| 391 | } |
| 392 | |
| 393 | /** |
| 394 | * Reserve a region from the batch buffer. Both the offset, in DWords, and |
Chia-I Wu | 5da476a | 2014-12-10 08:50:28 +0800 | [diff] [blame] | 395 | * the pointer to the reserved region are returned. The pointer is only valid |
| 396 | * until the next reserve call. |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 397 | * |
| 398 | * Note that \p len is in DWords. |
| 399 | */ |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 400 | static inline uint32_t cmd_batch_pointer(struct intel_cmd *cmd, |
| 401 | uint32_t len, uint32_t **dw) |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 402 | { |
| 403 | const enum intel_cmd_writer_type which = INTEL_CMD_WRITER_BATCH; |
| 404 | /* |
| 405 | * We know the batch bo is always aligned. Using 1 here should allow the |
| 406 | * compiler to optimize away aligning. |
| 407 | */ |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 408 | const size_t alignment = 1; |
| 409 | const size_t size = len << 2; |
| 410 | const size_t offset = cmd_writer_reserve(cmd, which, alignment, size); |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 411 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
| 412 | |
| 413 | assert(offset % 4 == 0); |
| 414 | *dw = (uint32_t *) ((char *) writer->ptr + offset); |
| 415 | |
| 416 | writer->used = offset + size; |
| 417 | |
| 418 | return offset >> 2; |
| 419 | } |
| 420 | |
| 421 | /** |
| 422 | * Write a command to the batch buffer. |
| 423 | */ |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 424 | static inline uint32_t cmd_batch_write(struct intel_cmd *cmd, |
| 425 | uint32_t len, const uint32_t *dw) |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 426 | { |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 427 | uint32_t pos; |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 428 | uint32_t *dst; |
| 429 | |
| 430 | pos = cmd_batch_pointer(cmd, len, &dst); |
| 431 | memcpy(dst, dw, len << 2); |
| 432 | |
| 433 | return pos; |
| 434 | } |
| 435 | |
| 436 | /** |
| 437 | * Add a relocation entry for a DWord of a command. |
| 438 | */ |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 439 | static inline void cmd_batch_reloc(struct intel_cmd *cmd, uint32_t pos, |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 440 | struct intel_bo *bo, |
| 441 | uint32_t bo_offset, uint32_t reloc_flags) |
| 442 | { |
| 443 | const enum intel_cmd_writer_type which = INTEL_CMD_WRITER_BATCH; |
| 444 | |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 445 | cmd_writer_reloc(cmd, which, pos << 2, (intptr_t) bo, bo_offset, reloc_flags); |
| 446 | } |
| 447 | |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 448 | static inline void cmd_batch_reloc_writer(struct intel_cmd *cmd, uint32_t pos, |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 449 | enum intel_cmd_writer_type writer, |
| 450 | uint32_t writer_offset) |
| 451 | { |
| 452 | const enum intel_cmd_writer_type which = INTEL_CMD_WRITER_BATCH; |
| 453 | |
| 454 | cmd_writer_reloc(cmd, which, pos << 2, (intptr_t) writer, writer_offset, |
| 455 | INTEL_CMD_RELOC_TARGET_IS_WRITER); |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 456 | } |
| 457 | |
Chia-I Wu | 66bdcd7 | 2015-02-10 04:11:31 +0800 | [diff] [blame] | 458 | void cmd_batch_state_base_address(struct intel_cmd *cmd); |
Chia-I Wu | 7c85356 | 2015-02-27 14:35:08 -0700 | [diff] [blame] | 459 | void cmd_batch_push_const_alloc(struct intel_cmd *cmd); |
Chia-I Wu | 66bdcd7 | 2015-02-10 04:11:31 +0800 | [diff] [blame] | 460 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 461 | /** |
Chia-I Wu | 48c283d | 2014-08-25 23:13:46 +0800 | [diff] [blame] | 462 | * Begin the batch buffer. |
Chia-I Wu | 79dfbb3 | 2014-08-25 12:19:02 +0800 | [diff] [blame] | 463 | */ |
| 464 | static inline void cmd_batch_begin(struct intel_cmd *cmd) |
| 465 | { |
Chia-I Wu | 66bdcd7 | 2015-02-10 04:11:31 +0800 | [diff] [blame] | 466 | cmd_batch_state_base_address(cmd); |
Chia-I Wu | 7c85356 | 2015-02-27 14:35:08 -0700 | [diff] [blame] | 467 | cmd_batch_push_const_alloc(cmd); |
Chia-I Wu | 79dfbb3 | 2014-08-25 12:19:02 +0800 | [diff] [blame] | 468 | } |
| 469 | |
| 470 | /** |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 471 | * End the batch buffer. |
| 472 | */ |
| 473 | static inline void cmd_batch_end(struct intel_cmd *cmd) |
| 474 | { |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 475 | struct intel_cmd_writer *writer = &cmd->writers[INTEL_CMD_WRITER_BATCH]; |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 476 | uint32_t *dw; |
Chia-I Wu | 79dfbb3 | 2014-08-25 12:19:02 +0800 | [diff] [blame] | 477 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 478 | if (writer->used & 0x7) { |
| 479 | cmd_batch_pointer(cmd, 1, &dw); |
| 480 | dw[0] = GEN6_MI_CMD(MI_BATCH_BUFFER_END); |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 481 | } else { |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 482 | cmd_batch_pointer(cmd, 2, &dw); |
| 483 | dw[0] = GEN6_MI_CMD(MI_BATCH_BUFFER_END); |
| 484 | dw[1] = GEN6_MI_CMD(MI_NOOP); |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 485 | } |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 486 | } |
| 487 | |
Chia-I Wu | b5af7c5 | 2015-02-18 14:51:59 -0700 | [diff] [blame] | 488 | static inline void cmd_begin_render_pass(struct intel_cmd *cmd, |
Courtney Goeltzenleuchter | e3b0f3a | 2015-04-03 15:25:24 -0600 | [diff] [blame] | 489 | const struct intel_render_pass *rp, |
Chia-I Wu | 513ae5b | 2015-07-01 19:04:59 +0800 | [diff] [blame] | 490 | const struct intel_fb *fb, |
| 491 | VkRenderPassContents contents) |
Chia-I Wu | b5af7c5 | 2015-02-18 14:51:59 -0700 | [diff] [blame] | 492 | { |
Chia-I Wu | bbc7d91 | 2015-02-27 14:59:50 -0700 | [diff] [blame] | 493 | cmd->bind.render_pass_changed = true; |
Chia-I Wu | bdeed15 | 2015-07-09 12:16:29 +0800 | [diff] [blame] | 494 | cmd->bind.render_pass = rp; |
| 495 | cmd->bind.render_pass_subpass = &rp->subpasses[0]; |
Courtney Goeltzenleuchter | e3b0f3a | 2015-04-03 15:25:24 -0600 | [diff] [blame] | 496 | cmd->bind.fb = fb; |
Chia-I Wu | 513ae5b | 2015-07-01 19:04:59 +0800 | [diff] [blame] | 497 | cmd->bind.render_pass_contents = contents; |
Chia-I Wu | b5af7c5 | 2015-02-18 14:51:59 -0700 | [diff] [blame] | 498 | } |
| 499 | |
Chia-I Wu | 88eaa3b | 2015-06-26 15:34:39 +0800 | [diff] [blame] | 500 | static inline void cmd_end_render_pass(struct intel_cmd *cmd) |
Chia-I Wu | b5af7c5 | 2015-02-18 14:51:59 -0700 | [diff] [blame] | 501 | { |
| 502 | //note what to do if rp != bound rp |
| 503 | cmd->bind.render_pass = 0; |
Courtney Goeltzenleuchter | e3b0f3a | 2015-04-03 15:25:24 -0600 | [diff] [blame] | 504 | cmd->bind.fb = 0; |
Chia-I Wu | b5af7c5 | 2015-02-18 14:51:59 -0700 | [diff] [blame] | 505 | } |
| 506 | |
Chia-I Wu | 525c660 | 2014-08-27 10:22:34 +0800 | [diff] [blame] | 507 | void cmd_batch_flush(struct intel_cmd *cmd, uint32_t pipe_control_dw0); |
Chia-I Wu | 3fb47ce | 2014-10-28 11:19:36 +0800 | [diff] [blame] | 508 | void cmd_batch_flush_all(struct intel_cmd *cmd); |
Chia-I Wu | 525c660 | 2014-08-27 10:22:34 +0800 | [diff] [blame] | 509 | |
Chia-I Wu | 759fa2e | 2014-08-30 18:44:47 +0800 | [diff] [blame] | 510 | void cmd_batch_depth_count(struct intel_cmd *cmd, |
| 511 | struct intel_bo *bo, |
Tony Barbour | 8205d90 | 2015-04-16 15:59:00 -0600 | [diff] [blame] | 512 | VkDeviceSize offset); |
Chia-I Wu | 759fa2e | 2014-08-30 18:44:47 +0800 | [diff] [blame] | 513 | |
Chia-I Wu | e8dbd5d | 2014-08-31 13:15:58 +0800 | [diff] [blame] | 514 | void cmd_batch_timestamp(struct intel_cmd *cmd, |
| 515 | struct intel_bo *bo, |
Tony Barbour | 8205d90 | 2015-04-16 15:59:00 -0600 | [diff] [blame] | 516 | VkDeviceSize offset); |
Chia-I Wu | e8dbd5d | 2014-08-31 13:15:58 +0800 | [diff] [blame] | 517 | |
| 518 | void cmd_batch_immediate(struct intel_cmd *cmd, |
Mike Stroyan | 55658c2 | 2014-12-04 11:08:39 +0000 | [diff] [blame] | 519 | uint32_t pipe_control_flags, |
Chia-I Wu | e8dbd5d | 2014-08-31 13:15:58 +0800 | [diff] [blame] | 520 | struct intel_bo *bo, |
Tony Barbour | 8205d90 | 2015-04-16 15:59:00 -0600 | [diff] [blame] | 521 | VkDeviceSize offset, |
Chia-I Wu | e8dbd5d | 2014-08-31 13:15:58 +0800 | [diff] [blame] | 522 | uint64_t val); |
Chia-I Wu | 1cbc005 | 2014-08-25 09:50:12 +0800 | [diff] [blame] | 523 | |
Chia-I Wu | c14d156 | 2014-10-17 09:49:22 +0800 | [diff] [blame] | 524 | void cmd_draw_meta(struct intel_cmd *cmd, const struct intel_cmd_meta *meta); |
| 525 | |
Chia-I Wu | 73520ac | 2015-02-19 11:17:45 -0700 | [diff] [blame] | 526 | void cmd_meta_ds_op(struct intel_cmd *cmd, |
| 527 | enum intel_cmd_meta_ds_op op, |
| 528 | struct intel_img *img, |
Courtney Goeltzenleuchter | 382489d | 2015-04-10 08:34:15 -0600 | [diff] [blame] | 529 | const VkImageSubresourceRange *range); |
Chia-I Wu | 73520ac | 2015-02-19 11:17:45 -0700 | [diff] [blame] | 530 | |
Chris Forbes | fff9bf4 | 2015-06-15 15:26:19 +1200 | [diff] [blame] | 531 | void cmd_meta_clear_color_image( |
| 532 | VkCmdBuffer cmdBuffer, |
Tony Barbour | de4124d | 2015-07-03 10:33:54 -0600 | [diff] [blame^] | 533 | struct intel_img *img, |
Chris Forbes | fff9bf4 | 2015-06-15 15:26:19 +1200 | [diff] [blame] | 534 | VkImageLayout imageLayout, |
Chris Forbes | e310597 | 2015-06-24 14:34:53 +1200 | [diff] [blame] | 535 | const VkClearColorValue *pClearColor, |
Chris Forbes | fff9bf4 | 2015-06-15 15:26:19 +1200 | [diff] [blame] | 536 | uint32_t rangeCount, |
| 537 | const VkImageSubresourceRange *pRanges); |
| 538 | |
Chris Forbes | 4cf9d10 | 2015-06-22 18:46:05 +1200 | [diff] [blame] | 539 | void cmd_meta_clear_depth_stencil_image( |
| 540 | VkCmdBuffer cmdBuffer, |
Tony Barbour | de4124d | 2015-07-03 10:33:54 -0600 | [diff] [blame^] | 541 | struct intel_img* img, |
Chris Forbes | 4cf9d10 | 2015-06-22 18:46:05 +1200 | [diff] [blame] | 542 | VkImageLayout imageLayout, |
| 543 | float depth, |
| 544 | uint32_t stencil, |
| 545 | uint32_t rangeCount, |
| 546 | const VkImageSubresourceRange* pRanges); |
| 547 | |
Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 548 | #endif /* CMD_PRIV_H */ |